Re: [kicad-users] Re: libs silkscreens unusable
For me, having a few silk screen arrangement iterations once all electric routing is finished is mandatory. I take care on a per pad basis not to have any writing on pads. And also avoid having writing over vias, which makes the printing unreadable. And no matter how good the libraries are, you will always have to manually take care that the writing does not get over vias, or over he pads of adjacent components. Regards, Cristian --- On Fri, 1/22/10, Robert birmingham_spi...@gmx.net wrote: From: Robert birmingham_spi...@gmx.net Subject: Re: [kicad-users] Re: libs silkscreens unusable To: kicad-users@yahoogroups.com Date: Friday, January 22, 2010, 2:59 PM n1ist wrote: Is this really an issue? All of the board houses that I have used In my experience yes, it can be. Even if the board house will fix it for you, a customer who chooses to look over the Gerbers is likely to complain. Regards, Robert. Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links -Inline Attachment Follows- No virus found in this outgoing message. Checked by AVG - www.avg.com Version: 9.0.730 / Virus Database: 271.1.1/2637 - Release Date: 01/21/10 19:34:00
Re: [kicad-users] multilayer pcb houses...
www.batchpcb.com --- On Sun, 1/3/10, mike m...@pikeaero.com wrote: From: mike m...@pikeaero.com Subject: [kicad-users] multilayer pcb houses... To: kicad-users@yahoogroups.com Date: Sunday, January 3, 2010, 12:41 PM Looking for advise on a pcb house that does multilayer (4) prototypes at very low cost. Thanks! --Mike Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
Re: [kicad-users] Additional attachement: NC pins appear differently in PCBnew
Thanks, Patrick and Andy, you guys were right, looking in the text library file I could see the pins were duplicated. For some unexplained reason, however, I could not see that in the library editor. I made that component myself, but I did not make it from scratch, but by taking a former 28-pin component, renaming the pins, and then adding more pins up to a total of 64. After manually deleting the double entries from the library (in text file mode) it now works ok. Thanks for the help and for the investigative work. Regards, Cristian --- On Tue, 10/20/09, Patrick Maupin pmau...@gmail.com wrote: From: Patrick Maupin pmau...@gmail.com Subject: Re: [kicad-users] Additional attachement: NC pins appear differently in PCBnew To: kicad-users@yahoogroups.com Date: Tuesday, October 20, 2009, 6:47 PM On Tue, Oct 20, 2009 at 12:32 AM, Berceanu Cristian brumbarch...@yahoo.com wrote: Hi, just for reference, I have archived the project and added it to the Files of this group. The archive is test.zip. Just check pins 64 and 2 of the micro. They are identical, they are marked as NC, but pin 64 is assigned a N-47 net name (unique, so it is not connected to any other pins) while Pin 2 is assigned the ? net name. I fail to see any reason for this. Regards, Cristian I have run my ERC script against this file. It reports some real strange stuff. Apparently there are duplicated library pins on your part. There are also other issues that you might be concerned about. I have annotated the generated warnings below with * in front of my comments. You can download the Python script from kipy.org and run it yourself. Just look at the readme for details. Checking 1 pages * These NoConn warnings are because multiple pins are connected at these locations. Warning on page test: Ignoring unexpected NoConn on page test at (6000, 3650) Ignoring unexpected NoConn on page test at (6000, 3750) Ignoring unexpected NoConn on page test at (6000, 3850) Ignoring unexpected NoConn on page test at (10200, 3150) Ignoring unexpected NoConn on page test at (10200, 3250) Ignoring unexpected NoConn on page test at (10200, 3800) Ignoring unexpected NoConn on page test at (10200, 3900) Ignoring unexpected NoConn on page test at (10200, 4000) Ignoring unexpected NoConn on page test at (10200, 4100) Ignoring unexpected NoConn on page test at (10200, 4200) Ignoring unexpected NoConn on page test at (10200, 4300) Ignoring unexpected NoConn on page test at (10200, 4600) Ignoring unexpected NoConn on page test at (10200, 4700) Ignoring unexpected NoConn on page test at (10200, 4800) Ignoring unexpected NoConn on page test at (10200, 4900) Ignoring unexpected NoConn on page test at (10200, 5000) Ignoring unexpected NoConn on page test at (10200, 5100) * These are the real problems, I think. Warning: Duplicate pin number Component PIC32MX440F512H_TQFP64 U201 pin 15 (PGEC1/AN1/VREF-/CVREF-/CN3/RB1) on page test at (6000, 5700) Component PIC32MX440F512H_TQFP64 U201 pin 16 (PGED1/EMUD1/PMA6/AN0/VREF+/CVREF+/CN2/RB0) on page test at (6000, 5800) Component PIC32MX440F512H_TQFP64 U201 pin 17 (PGEC2/AN6/OCFA/RB6) on page test at (6000, 5300) Component PIC32MX440F512H_TQFP64 U201 pin 18 (PGED2/AN7/RB7) on page test at (6000, 5200) Component PIC32MX440F512H_TQFP64 U201 pin 19 (AVDD) on page test at (8400, 2650) Component PIC32MX440F512H_TQFP64 U201 pin 20 (AVSS) on page test at (8400, 7350) Component PIC32MX440F512H_TQFP64 U201 pin 21 (U2CTS/C1OUT/AN8/RB8) on page test at (10200, 3550) Component PIC32MX440F512H_TQFP64 U201 pin 22 (PMA7/C2OUT/AN9/RB9) on page test at (10200, 3450) Component PIC32MX440F512H_TQFP64 U201 pin 23 (TMS/CVREFOUT/PMA13/AN10/RB10) on page test at (10200, 3350) Component PIC32MX440F512H_TQFP64 U201 pin 24 (TDO/PMA12/AN11/RB11) on page test at (10200, 3250) Component PIC32MX440F512H_TQFP64 U201 pin 25 (VSS) on page test at (8200, 7350) Component PIC32MX440F512H_TQFP64 U201 pin 26 (VDD) on page test at (8200, 2650) Component PIC32MX440F512H_TQFP64 U201 pin 27 (TCK/PMA11/AN12/RB12) on page test at (10200, 3150) Component PIC32MX440F512H_TQFP64 U201 pin 28 (TDI/PMA10/AN13/RB13) on page test at (10200, 3050) Component PIC32MX440F512H_TQFP64 U201 pin 29 (PMALH/PMA1/U2RTS/BCLK2/AN14/RB14) on page test at (10200, 4500) Component PIC32MX440F512H_TQFP64 U201 pin 30 (PMALL/PMA0/AN15/OCFB/CN12/RB15) on page test at (10200, 4400) Component PIC32MX440F512H_TQFP64 U201 pin 31 (PMA9/U2RX/SDA2/CN17/RF4) on page test at (10200, 6950) Component PIC32MX440F512H_TQFP64 U201 pin 32 (PMA8/U2TX/SCL2/CN18/RF5) on page test at (10200, 6850) Component PIC32MX440F512H_TQFP64 U201 pin 33 (USBID/RF3) on page test at (10200, 6150) Component PIC32MX440F512H_TQFP64 U201
[kicad-users] NC pins appear differently in PCBnew
Hi guys, I have a microcontroller with several pins being NC (and I have explicitly placed NC markings in the schematic. However, when I generate the netlist, some of the pins to get the ? mark but others get a numeric net name. These last ones, which do get a net name, do not get connected to any other pins, but I am concerned as to why some NC pins are treated differently from others in the netlist. I have uploaded the file test.net, representing the netlist. Pins 2,3,8,12,13,14 and pins 21, 22, 23, 24 are all marked as NC in the schematic. However the first ones appear in the netlist as ?, while the latter do get unique net names. What could be the caouse of this? Regards, Cristian
Re: [kicad-users] NC pins appear differently in PCBnew
Hi Andy, I had alread checked for these aspects, these were also my initial suspicions. The component is drawn exactly on the grid and the pins are completely identical except their number, of course. Any other ideas? Thanks! Cristian --- On Tue, 10/20/09, Andy Eskelson andyya...@g0poy.co.uk wrote: From: Andy Eskelson andyya...@g0poy.co.uk Subject: Re: [kicad-users] NC pins appear differently in PCBnew To: kicad-users@yahoogroups.com Date: Tuesday, October 20, 2009, 1:06 AM Check that: 1. you have hit the pin with the X (no connection) marker (if you change grid sizes sometimes things do not align up correctly) 2. Check that the pins are really defined as normal pins in the lib editor. If they are anything special such as power out, power in and so on, the system may try to assign nets to them. Andy On Mon, 19 Oct 2009 13:46:26 -0700 (PDT) Berceanu Cristian brumbarch...@yahoo.com wrote: Hi guys, I have a microcontroller with several pins being NC (and I have explicitly placed NC markings in the schematic. However, when I generate the netlist, some of the pins to get the ? mark but others get a numeric net name. These last ones, which do get a net name, do not get connected to any other pins, but I am concerned as to why some NC pins are treated differently from others in the netlist. I have uploaded the file test.net, representing the netlist. Pins 2,3,8,12,13,14 and pins 21, 22, 23, 24 are all marked as NC in the schematic. However the first ones appear in the netlist as ?, while the latter do get unique net names. What could be the caouse of this? Regards, Cristian Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
[kicad-users] Additional attachement: NC pins appear differently in PCBnew
Hi, just for reference, I have archived the project and added it to the Files of this group. The archive is test.zip. Just check pins 64 and 2 of the micro. They are identical, they are marked as NC, but pin 64 is assigned a N-47 net name (unique, so it is not connected to any other pins) while Pin 2 is assigned the ? net name. I fail to see any reason for this. Regards, Cristian --- On Tue, 10/20/09, Berceanu Cristian brumbarch...@yahoo.com wrote: From: Berceanu Cristian brumbarch...@yahoo.com Subject: Re: [kicad-users] NC pins appear differently in PCBnew To: kicad-users@yahoogroups.com Date: Tuesday, October 20, 2009, 7:55 AM Hi Andy, I had alread checked for these aspects, these were also my initial suspicions. The component is drawn exactly on the grid and the pins are completely identical except their number, of course. Any other ideas? Thanks! Cristian --- On Tue, 10/20/09, Andy Eskelson andyya...@g0poy.co.uk wrote: From: Andy Eskelson andyya...@g0poy.co.uk Subject: Re: [kicad-users] NC pins appear differently in PCBnew To: kicad-users@yahoogroups.com Date: Tuesday, October 20, 2009, 1:06 AM Check that: 1. you have hit the pin with the X (no connection) marker (if you change grid sizes sometimes things do not align up correctly) 2. Check that the pins are really defined as normal pins in the lib editor. If they are anything special such as power out, power in and so on, the system may try to assign nets to them. Andy On Mon, 19 Oct 2009 13:46:26 -0700 (PDT) Berceanu Cristian brumbarch...@yahoo.com wrote: Hi guys, I have a microcontroller with several pins being NC (and I have explicitly placed NC markings in the schematic. However, when I generate the netlist, some of the pins to get the ? mark but others get a numeric net name. These last ones, which do get a net name, do not get connected to any other pins, but I am concerned as to why some NC pins are treated differently from others in the netlist. I have uploaded the file test.net, representing the netlist. Pins 2,3,8,12,13,14 and pins 21, 22, 23, 24 are all marked as NC in the schematic. However the first ones appear in the netlist as ?, while the latter do get unique net names. What could be the caouse of this? Regards, Cristian Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
Re: [kicad-users] Right hand menu missing from both EEschema and PCBnew
Hi all, Just wanted to point out that I figured out why it was not working. It had to do something with the Windows XP version that I was using. Using the same Windows CD to install the Os on several different PCs made it impossible to use the right hand menu. However, installing Windows on the same PCs but from different instalation CDs, solved the problems! Regards, Cristian --- On Sun, 6/14/09, Berceanu Cristian brumbarch...@yahoo.com wrote: From: Berceanu Cristian brumbarch...@yahoo.com Subject: Re: [kicad-users] Right hand menu missing from both EEschema and PCBnew To: kicad-users@yahoogroups.com Date: Sunday, June 14, 2009, 2:18 PM I have, unfortunately, come across this message on the group: http://tech.groups.yahoo.com/group/kicad-users/message/2274 It has no reply, which makes me think this is an unsolved problem... Cristian --- On Sun, 6/14/09, Berceanu Cristian brumbarch...@yahoo.com wrote: From: Berceanu Cristian brumbarch...@yahoo.com Subject: [kicad-users] Right hand menu missing from both EEschema and PCBnew [1 Attachment] To: kicad-users@yahoogroups.com Date: Sunday, June 14, 2009, 1:34 PM [Attachment(s) from Berceanu Cristian included below] Hi all, I have just installed KiCAD 20090216-final on a regular Win XP SP2 laptop. Unfortunately, all the icons on the right side of the screen are missing from both EEsch and PCBnew. I have attached a small screen shot so that you clearly see what I am talking about. Has anybody experienced this before? If yes, is there a workaround for it? I have instaled same version of KiCAD on other PCs in the same OS configuration as this and the icons of the menu would always be there by default. Regards, Cristian Attachment(s) from Berceanu Cristian 1 of 1 Photo(s) missing icons.PNG
[kicad-users] Right hand menu missing from both EEschema and PCBnew [1 Attachment]
Hi all, I have just installed KiCAD 20090216-final on a regular Win XP SP2 laptop. Unfortunately, all the icons on the right side of the screen are missing from both EEsch and PCBnew. I have attached a small screen shot so that you clearly see what I am talking about. Has anybody experienced this before? If yes, is there a workaround for it? I have instaled same version of KiCAD on other PCs in the same OS configuration as this and the icons of the menu would always be there by default. Regards, Cristian
Re: [kicad-users] Re: Unplated hole in module editor
You might want an unplated hole when you need a hole to be of a better precision. For instance, my PCB manufactureres offer +/-0.1mm diameter tolerance for plated through holes, but they can offer +/-0.05mm diameter tolerance for unplated through holes. This comes from the fact that it is a little more difficult to control the thickness of the metal inside the hole. Bear in mind that this is just an example. There can be countless reasons for which you might want a hole not to be plated. Cristian --- On Thu, 6/4/09, Alain M. ala...@pobox.com wrote: From: Alain M. ala...@pobox.com Subject: Re: [kicad-users] Re: Unplated hole in module editor To: kicad-users@yahoogroups.com Date: Thursday, June 4, 2009, 6:07 PM Hi, this thread seems interesting, but... When do you realy need a hole *not* to be plated? Specialy it that will be an extra manufacturing cost (you may negociate and not be billed, but the cost is there) What I usualy do, and manufacturers understand is this: the pad *and* the hole with the same size. This is usefull just in case where there may be doubt, and may otherwyse thing that I made a mistake. This usualy result in a hole that *is* metalized, but has no copper around it. Sometimes for mechanical reasons I can even make it just a little bigger just because it will be more rigid so a plastic fixture may need the extra space. I am interesting in some feedback :) Alain dennevi escreveu: Hi again Your exactly right Pedro. The problem is that there's no good way of telling the pcb-maker. You can give him additional information in a comments layer or in some instruction, but it would be great if this were automatic. Some PCB applications has the ability of generating two separate drill-files with plated and unplated holes. This would save a lot of manual work and confusion. As you say, when all the holes are in the same drill-file it's very hard to tell the difference. But I'm not complaining! I love the application and I very much appreciate the huge work that has been done in the last year! Yours Albin, Sweden Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
[kicad-users] how to define the name for a net [1 Attachment]
Hi all, I have a net which connects three different symbols in the schematic (see attached picture). Two of these components are on one schematic sheet, and the third is in a different hierarchical schematic sheet (I just print-screened from each sheet to show all connections in one picture). I can successfully export a netlist and import in in PCBnew and the three pins are indeed connected together... but unfortunately, the net does not retain the EPWMSYNCHI name. It is rather called M200_-_39. I do not understand why this happends, as I have explicitly used names placed on each branch of the connections in the schematic (as it can be seen in the attached picture) and expected the name to be transfered to the PCBnew. What am I doing wrong? Best regards, Cristian P.S. I should mention that the value of the Sheetname field one of the hierarchical schemati sheets in which this connection appears is M200 - Main Controller so probably htat is where the M200 in the PCBnew name of the net comes from.
Re: [kicad-users] I want to like it but...
Hi, You can actually clone a component quite easy. All you have to do is to select as working library the one in which you have the original component, then select for edit that original component. Change the Field value of the Value field to what you want your new component to be called and click Save current loaded library on disk. That's it! Cristian --- On Fri, 5/8/09, holman_michael holman_mich...@hotmail.com wrote: From: holman_michael holman_mich...@hotmail.com Subject: [kicad-users] I want to like it but... To: kicad-users@yahoogroups.com Date: Friday, May 8, 2009, 11:28 PM One of my basic requirements for Schematic capture programs is easy creation and editing of library components. At first, this program looked promising, but I was very disappointed to see that I could not create a new part by starting with an existing one (no clone/copy etc. functionality). I don't even see how you rename a part. It's also strange that, unlike the schematic editor, the library editor has no menu bar (I know it has the icons but it's a little odd and limiting). I don't want to be critical since the program is quite an achievement for a single person, but I know from experience I will be wanting to clone many parts and I think the library interface will frustrate me. I also find the parts placement cumbersome and would prefer a scrollable toolbar like many programs use. It's a bit over the top to invoke a whole window to select a device. I suppose once you get a history list going it's not so bad assuming it saves that information. Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
Re: [kicad-users] Re: How to change layer of text on silkscreen?
I also tried to do it. Well,to say it more into detail, I tried to design a module (footprint) that would contain text on both silkscreen layers. Unfortunately, I noticed this thing is not possible, can anybody confirm this? Thanks! Cristian --- On Wed, 5/6/09, Pedro Martin pki...@yahoo.es wrote: From: Pedro Martin pki...@yahoo.es Subject: Re: [kicad-users] Re: How to change layer of text on silkscreen? To: kicad-users@yahoogroups.com Date: Wednesday, May 6, 2009, 2:10 PM Hi, Maybe you are using a version with a bug. I have try to force a text to change from component silkscreen to copper silscreen and I couldn't. Does it happen to all your components on the component layer? Does it happen when printing, generating gerbers or in the pcbnew editor? Regards, Pedro. The silkscreen appears on the same side as the component. If the component is on the botton layer, the correspondent text appears on the botton silkscreen layer. I double checked this and unfortunately this is not the case. All these components are placed on component layer but their silkscreen text appears on copper layer anyway. Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
[kicad-users] are these three components connected? [1 Attachment]
Hi all, I actually have to things I am a little confused about: 1. Am I right to assume that R2 is not connected to R1 and R3 in the attached screenshot? On the other hand, R4, R5 and R6 are connected fine. Would you not find it normal for R2 to be connected even if no explicit junction is present, or am I just odd? I am not complaining, I just want to get a confirmation that the way R4, R5 and R6 are drawn is the ONLY way I should go forward. 2. Is it possible to adjust the text size of a global label? I have not found where the setting is (if there is one). Modifying the size of the label itself leads to a proportional modification of the text of the label too, which is not what I want. Thank you for your help! Regards, Cristian
[kicad-users] Vias covered by solder resist(tented)
Hi, I have been working with several PCB manufacturers who usually complain about the vias being covered with solder resist (I believe tented is the correct term). When I generate the gerbers from KiCAD, I can see that no openings for the VIAs are operated in the solder mask, which means that basically the vias are covered in solder mask (green stuff). Is there an automated way to make solder mask openings around all the vias in the design (I mean, a different way than doing it manually for every via, with zones)? I am familiar with the Mask Clearance setting under the Dimensions- Traks and vias menu, but it does not seem to operate on vias. Thanks in advance, Cristian
Re: [kicad-users] Vias covered by solder resist(tented)
Guys, this is great, it works! Thanks for the help. Cristian --- On Thu, 3/12/09, Pedro Martin pki...@yahoo.es wrote: From: Pedro Martin pki...@yahoo.es Subject: Re: [kicad-users] Vias covered by solder resist(tented) To: kicad-users@yahoogroups.com Date: Thursday, March 12, 2009, 5:35 PM Helllo, On gerber generation, have you checked the vias on mask box? Pedro. Hi, I have been working with several PCB manufacturers who usually complain about the vias being covered with solder resist (I believe tented is the correct term). When I generate the gerbers from KiCAD, I can see that no openings for the VIAs are operated in the solder mask, which means that basically the vias are covered in solder mask (green stuff). Is there an automated way to make solder mask openings around all the vias in the design (I mean, a different way than doing it manually for every via, with zones)? I am familiar with the Mask Clearance setting under the Dimensions- Traks and vias menu, but it does not seem to operate on vias. Thanks in advance, Cristian Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
Re: [kicad-users] layer stack-up question
Hi Dan, thanks for the reply. I did a little experiment that would seem to contradict what you are saying. I routed a track on the copper layer and then I placed a microvia. The router tool automatically changed to Inner_L1. For me, this means that copper is on top. I confirmed this by routing a track on the component layer. I then placed a microvia and the routing tool changed to Inner_L14. For me, this would indicate that component is on bottom. All these are proofs to the extent to which we accept that Inner_L1 is immediately below the Top layer and that Inner_L14 is immediately above bottom layer. In addition, the attached screencapture would also suggest that copper is top and component is bottom. Still, this would not explain why in the libraries yo find the smd components defined on component layer, so this would indicate you being right, and my experiments being wrong. Has anybody encountered any problems when using blind or buried vias? Regards, Cristian --- On Sat, 2/7/09, Dan Andersson d...@andersson.co.uk wrote: From: Dan Andersson d...@andersson.co.uk Subject: Re: [kicad-users] layer stack-up question To: kicad-users@yahoogroups.com Date: Saturday, February 7, 2009, 3:47 PM The copper layer is the bottom layer and it's more natural to see it as such when designing with axial components. The upper surface layer is called component layer. This is a surviving description from the pre-smd age. The reason for mirroring text on the copper layer i that you are looking on the pcb from above, you are looking trough your component layer as your viewpoint is above the top of the pcb board. The defacto standard of mounting SMD's is on the top - component side. YOU DO NOT PLACE SMD ON BOTH SIDES! Unless you solder it by hand. //Dan, M0DFI On Saturday 07 February 2009 12:26:37 Berceanu Cristian wrote: Hi, I have only recently started to use KiCAd and I think it is great. However, I encountered some...contradictions. I am having trouble in understanding which is the Top layer and which is the Bottom Layer. In the help of Pcbnew I found the following statements: 1. They are the usual layers of work, used by the automatic router, on which tracks can be placed. Layer 1 is the copper (solder) layer. Layer 16 is the component layer. The other layers are the internal layers (L2 to L15). 2. All text on the 'copper' (sometimes called 'solder' or 'bottom') side must be mirrored. For me, the first statement would indicate that the layer called copper is the top layer. But the second statement says that copper is the bottom layer. If the copper is the bottom layer, then it comes in contradiction not only with statement 1, but also with the fact that the SMD footprints in the library have their pads defined on the component layer (and normally, one would expect the SMDs to be defined by default on top, and only when you mirror them, they get on bottom). So...which is Top and which is Bottom? Thank you for your help! Regards, Cristian Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
