Re: [PATCH RFC] kvm: optimize out smp_mb using srcu_read_unlock

2013-10-31 Thread Gleb Natapov
On Wed, Oct 30, 2013 at 09:56:29PM -0700, Paul E. McKenney wrote:
 On Thu, Oct 31, 2013 at 01:26:05AM +0200, Michael S. Tsirkin wrote:
Paul, could you review this patch please?
Documentation/memory-barriers.txt says that unlock has a weaker
uni-directional barrier, but in practice srcu_read_unlock calls
smp_mb().

Is it OK to rely on this? If not, can I add
smp_mb__after_srcu_read_unlock (making it an empty macro for now)
so we can avoid an actual extra smp_mb()?
   
   Please use smp_mb__after_srcu_read_unlock().  After all, it was not
   that long ago that srcu_read_unlock() contained no memory barriers,
   and perhaps some day it won't need to once again.
   
 Thanx, Paul
  
  
  Thanks!
  Something like this will be enough?
  
  diff --git a/include/linux/srcu.h b/include/linux/srcu.h
  index c114614..9b058ee 100644
  --- a/include/linux/srcu.h
  +++ b/include/linux/srcu.h
  @@ -237,4 +237,18 @@ static inline void srcu_read_unlock(struct srcu_struct 
  *sp, int idx)
  __srcu_read_unlock(sp, idx);
   }
  
  +/**
  + * smp_mb__after_srcu_read_unlock - ensure full ordering after 
  srcu_read_unlock
  + *
  + * Converts the preceding srcu_read_unlock into a two-way memory barrier.
  + *
  + * Call this after srcu_read_unlock, to guarantee that all memory 
  operations
  + * that occur after smp_mb__after_srcu_read_unlock will appear to happen 
  after
  + * the preceding srcu_read_unlock.
  + */
  +static inline void smp_mb__after_srcu_read_unlock(void)
  +{
  +   /* __srcu_read_unlock has smp_mb() internally so nothing to do here. */
  +}
  +
   #endif
 
 Yep, that should do it!
 
This looks dubious to me. All other smp_mb__after_* variants are there
because some atomic operations have different memory barrier semantics on
different arches, but srcu_read_unlock() have the same semantics on all
arches, so smp_mb__after_srcu_read_unlock() becomes
smp_mb__after_a_function_that_happens_to_have_mb_now_but_may_not_have_in_the_feature().
How likely it is that smp_mb() will disappear from srcu_read_unlock()
(if was added for a reason I guess)?  May be we should change documentation
to say that srcu_read_unlock() is a memory barrier which will reflect
the reality.

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Re: 8bf00a529967dafbbb210b377c38a15834d1e979 - performance regression?

2013-10-31 Thread Gleb Natapov
On Thu, Oct 31, 2013 at 02:21:46AM +0200, Michael S. Tsirkin wrote:
 commit 8bf00a529967dafbbb210b377c38a15834d1e979:
 KVM: VMX: add support for switching of PERF_GLOBAL_CTRL  was
 as far as I can tell supposed to bring about performance improvement
 on hardware that supports it?
No, it (and commits after it) supposed to fix a bug which it did.

 Instead it seems to make the typical case (not running guest
 under perf) a bit slower than it used to be.
 the cost of VMexit goes up by about 50 cycles
 on sandy bridge where the optimization in question
 actually is activated.

You seams to be confused. 8bf00a529967dafbbb210 adds support for special
PERF_GLOBAL_CTRL switching, but does not add code to switch anything,
so the commit itself is a nop. Next commit d7cd97964ba6d70c5
uses add_atomic_switch_msr()/clear_atomic_switch_msr()
to switch PERF_GLOBAL_CTRL, but it does not depend on
VM_(ENTRY|EXIT)_LOAD_IA32_PERF_GLOBAL_CTRL support which previous
patch added, if the support is not there the switching will use
another mechanism which is even slower. So MSR is switched no matter
if PERF_GLOBAL_CTRL is enabled or not.  If you saying that using
VM_(ENTRY|EXIT)_LOAD_IA32_PERF_GLOBAL_CTRL is slower than using generic
vmentry MSR switching then I pretty much doubt it since the only purpose
of special VM_(ENTRY|EXIT)_LOAD_IA32_PERF_GLOBAL_CTRL is to be faster
then general mechanism.

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Re: Calling to kvm_mmu_load

2013-10-31 Thread Arthur Chunqi Li
Hi Paolo,

On Tue, Oct 29, 2013 at 8:55 PM, Paolo Bonzini pbonz...@redhat.com wrote:
 Il 29/10/2013 06:39, Arthur Chunqi Li ha scritto:
 What is the dirty page tracking code path? I find a obsoleted flag
 dirty_page_log_all in the very previous codes, but I cannot get the
 most recent version of tracking dirty pages.

 Basically everything that accesses the dirty_bitmap field of struct
 kvm_memory_slot is involved.  It all starts when the
 KVM_SET_USER_MEMORY_REGION ioctl is called with the
 KVM_MEM_LOG_DIRTY_PAGES flag set.

I find the mechanism here is set all pages read-only to track all the
dirty pages. But EPT provides such a dirty bit in EPT paging
structures. Why don't we use this?

Arthur

 Besides, I noticed that memory management in KVM uses the mechanism
 with struct kvm_memory_slot. How is kvm_memory_slot used with the
 cooperation of Linux memory management?

 kvm_memory_slot just maps a host userspace address range to a guest
 physical address range.  Cooperation with Linux memory management is
 done with the Linux MMU notifiers.  MMU notifiers let KVM know that a
 page has been swapped out, and KVM reacts by invalidating the shadow
 page tables for the corresponding guest physical address.

 Paolo



-- 
Arthur Chunqi Li
Department of Computer Science
School of EECS
Peking University
Beijing, China
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Re: RFC: paravirtualizing perf_clock

2013-10-31 Thread Masami Hiramatsu
(2013/10/30 23:03), David Ahern wrote:
 On 10/29/13 11:59 PM, Masami Hiramatsu wrote:
 (2013/10/29 11:58), David Ahern wrote:
 To back out a bit, my end goal is to be able to create and merge
 perf-events from any context on a KVM-based host -- guest userspace,
 guest kernel space, host userspace and host kernel space (userspace
 events with a perf-clock timestamp is another topic ;-)).

 That is almost same as what we(Yoshihiro and I) are trying on integrated
 tracing, we are doing it on ftrace and trace-cmd (but perhaps, it eventually
 works on perf-ftrace).
 
 I thought at this point (well, once perf-ftrace gets committed) that you 
 can do everything with perf. What feature is missing in perf that you 
 get with trace-cmd or using debugfs directly?

The perftools interface is the best for profiling a process or in a short 
period.
However, what we'd like to do is monitoring or tracing in background a long
period on the memory, while the system life cycle, as a flight recorder.
This kind of tracing interface is required for mission-critical system for
trouble shooting.

Also, on-the-fly configurability of ftrace such as snapshot, multi-buffer,
event-adding/removing are very useful, since in the flight-recorder
use-case, we can't stop tracing for even a moment.

Moreover, our guest/host integrated tracer can pass event buffers from
guest to host with very small overhead, because it uses ftrace ringbuffer
and virtio-serial with splice (so, zero page copying in the guest).
Note that we need low overhead tracing as small as possible because it
is running always in background.

That's why we're using ftrace for our purpose. But anyway, the time
synchronization is common issue. Let's share the solution :)


 And then for the cherry on top a design that works across architectures
 (e.g., x86 now, but arm later).

 I think your proposal is good for the default implementation, it doesn't
 depends on the arch specific feature. However, since physical timer(clock)
 interfaces and virtualization interfaces strongly depends on the arch,
 I guess the optimized implementations will become different on each arch.
 For example, maybe we can export tsc-offset to the guest to adjust clock
 on x86, but not on ARM, or other devices. In that case, until implementing
 optimized one, we can use paravirt perf_clock.
 
 So this MSR read takes about 1.6usecs (from 'perf stat kvm live') and 
 that is total time between VMEXIT and VMENTRY. The time it takes to run 
 perf_clock in the host should be a very small part of that 1.6 usec. 

Yeah, a hypercall is always heavy operation. So that is not the best
solution, we need a optimized one for each arch.

 I'll take a look at the TSC path to see how it is optimized (suggestions 
 appreciated).

At least on the machine which has stable tsc, we can relay on that.
We just need the tsc-offset to adjust it in the guest. Note that this
offset can change if the guest sleeps/resumes or does a live-migration.
Each time we need to refresh the tsc-offset.

 Another thought is to make the use of pv_perf_clock an option -- user 
 can knowingly decide the additional latency/overhead is worth the feature.

Yeah. BTW, would you see the paravirt_sched_clock(pv_time_ops)?
It seems that such synchronized clock is there.

Thank you,

-- 
Masami HIRAMATSU
IT Management Research Dept. Linux Technology Center
Hitachi, Ltd., Yokohama Research Laboratory
E-mail: masami.hiramatsu...@hitachi.com


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Re: [PATCH 0/2] KVM_SET_XCRS fixes

2013-10-31 Thread Gleb Natapov
On Thu, Oct 17, 2013 at 04:50:45PM +0200, Paolo Bonzini wrote:
 The first patch fixes bugs 63121 and 63131 (yeah, all kernel bugs
 end with 1).  The second patch fixes a typo (the same typo exists
 in QEMU).
 
 Paolo Bonzini (2):
   KVM: x86: fix KVM_SET_XCRS for CPUs that do not support XSAVE
   KVM: x86: fix KVM_SET_XCRS loop
 
  arch/x86/kvm/x86.c | 15 ---
  1 file changed, 12 insertions(+), 3 deletions(-)
 
Reviewed-by: Gleb Natapov g...@redhat.com

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Re: Calling to kvm_mmu_load

2013-10-31 Thread Paolo Bonzini
Il 31/10/2013 09:05, Arthur Chunqi Li ha scritto:
 
  Basically everything that accesses the dirty_bitmap field of struct
  kvm_memory_slot is involved.  It all starts when the
  KVM_SET_USER_MEMORY_REGION ioctl is called with the
  KVM_MEM_LOG_DIRTY_PAGES flag set.
 I find the mechanism here is set all pages read-only to track all the
 dirty pages. But EPT provides such a dirty bit in EPT paging
 structures. Why don't we use this?

It doesn't provide it on all processors.  Check eptad in
/sys/module/kvm_intel/parameters.

Paolo
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[PATCH] KVM: x86: emulate SAHF instruction

2013-10-31 Thread Paolo Bonzini
Yet another instruction that we fail to emulate, this time found
in Windows 2008R2 32-bit.

Cc: sta...@vger.kernel.org
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
Testcase on its way.  BTW, lahf/sahf is another candidate for
#UD emulation.

 arch/x86/kvm/emulate.c | 14 +-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 8e2a07bd8eac..ef750e75c930 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -3296,6 +3296,18 @@ static int em_cpuid(struct x86_emulate_ctxt *ctxt)
return X86EMUL_CONTINUE;
 }
 
+static int em_sahf(struct x86_emulate_ctxt *ctxt)
+{
+   u32 flags;
+
+   flags = EFLG_CF | EFLG_PF | EFLG_AF | EFLG_ZF | EFLG_SF;
+   flags = *reg_rmw(ctxt, VCPU_REGS_RAX)  8;
+
+   ctxt-eflags = ~0xffUL;
+   ctxt-eflags |= flags | X86_EFLAGS_FIXED;
+   return X86EMUL_CONTINUE;
+}
+
 static int em_lahf(struct x86_emulate_ctxt *ctxt)
 {
*reg_rmw(ctxt, VCPU_REGS_RAX) = ~0xff00UL;
@@ -3788,7 +3800,7 @@ static const struct opcode opcode_table[256] = {
DI(SrcAcc | DstReg, pause), X7(D(SrcAcc | DstReg)),
/* 0x98 - 0x9F */
D(DstAcc | SrcNone), I(ImplicitOps | SrcAcc, em_cwd),
-   I(SrcImmFAddr | No64, em_call_far), N,
+   I(SrcImmFAddr | No64, em_call_far), I(ImplicitOps, em_sahf),
II(ImplicitOps | Stack, em_pushf, pushf),
II(ImplicitOps | Stack, em_popf, popf), N, I(ImplicitOps, em_lahf),
/* 0xA0 - 0xA7 */
-- 
1.8.3.1

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[PATCH] [kvm-unit-tests] realmode: test SAHF instruction

2013-10-31 Thread Paolo Bonzini
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
 x86/realmode.c | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/x86/realmode.c b/x86/realmode.c
index 3546771..b9cb634 100644
--- a/x86/realmode.c
+++ b/x86/realmode.c
@@ -1409,6 +1409,15 @@ static void test_sgdt_sidt(void)
 report(sidt, 0, x == y);
 }
 
+static void test_sahf(void)
+{
+MK_INSN(sahf, sahf; pushfw; mov (%esp), %al; popfw);
+
+inregs.eax = 0xfd00;
+exec_in_big_real_mode(insn_sahf);
+report(sahf, R_AX, outregs.eax == (inregs.eax | 0xd7));
+}
+
 static void test_lahf(void)
 {
 MK_INSN(lahf, pushfw; mov %al, (%esp); popfw; lahf);
@@ -1554,6 +1563,7 @@ void realmode_start(void)
test_ss_base_for_esp_ebp();
test_sgdt_sidt();
test_lahf();
+   test_sahf();
test_movzx_movsx();
test_bswap();
test_aad();
-- 
1.8.3.1

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Re: EPT page fault procedure

2013-10-31 Thread Paolo Bonzini
Il 31/10/2013 10:07, Arthur Chunqi Li ha scritto:
 Sorry to disturb you with so many trivial questions in KVM EPT memory
 management and thanks for your patience.

No problem, please remain onlist though.  Adding back kvm@vger.kernel.org.


 I got confused in the EPT
 page fault processing function (tdp_page_fault). I think when Qemu
 registers the memory region for a VM, physical memory mapped to this
 PVA region isn't allocated indeed. So the page fault procedure of EPT
 violation which maps GFN to PFN should allocate the real physical
 memory and establish the real mapping from PVA to PFA in Qemu's page

Do you mean HVA to PFN?  If so, you can look at function hva_to_pfn. :)

 table. What is the point in tdp_page_fault() handling such mapping
 from PVA to PFA?

The EPT page table entry is created in __direct_map using the pfn
returned by try_async_pf.  try_async_pf itself gets the pfn from
gfn_to_pfn_async and gfn_to_pfn_prot.  Both of them call __gfn_to_pfn
with different arguments.  __gfn_to_pfn first goes from GFN to HVA using
the memslots (gfn_to_memslot and, in __gfn_to_pfn_memslot,
__gfn_to_hva_many), then it calls hva_to_pfn.

Ultimately, hva_to_pfn_fast and hva_to_pfn_slow is where KVM calls
functions from the kernel's get_user_page family.

Paolo
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Re: [PATCH 2/3] Documentation/kvm: patches should be against linux.git

2013-10-31 Thread Paolo Bonzini
Il 31/10/2013 11:46, Ramkumar Ramachandra ha scritto:
 The document hasn't been updated since cf3e3d3 (KVM: Document KVM
 specific review items, 2010-06-24); kvm does not have a separate
 repository anymore.

Maintainer have their repository at
git://git.kernel.org/pub/scm/virt/kvm/kvm.git.  The right fix is to add
that tree to MAINTAINERS.

Paolo

 Cc: Avi Kivity a...@redhat.com
 Cc: Gleb Natapov g...@redhat.com
 Cc: Paolo Bonzini pbonz...@redhat.com
 Signed-off-by: Ramkumar Ramachandra artag...@gmail.com
 ---
  Documentation/virtual/kvm/review-checklist.txt | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/Documentation/virtual/kvm/review-checklist.txt 
 b/Documentation/virtual/kvm/review-checklist.txt
 index a850986..8385c4d 100644
 --- a/Documentation/virtual/kvm/review-checklist.txt
 +++ b/Documentation/virtual/kvm/review-checklist.txt
 @@ -4,7 +4,7 @@ Review checklist for kvm patches
  1.  The patch must follow Documentation/CodingStyle and
  Documentation/SubmittingPatches.
  
 -2.  Patches should be against kvm.git master branch.
 +2.  Patches should be against linux.git master branch.
  
  3.  If the patch introduces or modifies a new userspace API:
  - the API must be documented in Documentation/virtual/kvm/api.txt
 

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[PATCH v2] MAINTAINERS: add tree for kvm.git

2013-10-31 Thread Ramkumar Ramachandra
Cc: Gleb Natapov g...@redhat.com
Cc: Paolo Bonzini pbonz...@redhat.com
Cc: KVM List kvm@vger.kernel.org
Signed-off-by: Ramkumar Ramachandra artag...@gmail.com
---
 This is a replacement for [PATCH 2/3] Documentation/kvm: patches
 should be against linux.git

 Thanks to Paolo for pointing to the right tree.

 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 1dd73f7..36b05119 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4836,6 +4836,7 @@ M:Gleb Natapov g...@redhat.com
 M: Paolo Bonzini pbonz...@redhat.com
 L: kvm@vger.kernel.org
 W: http://www.linux-kvm.org
+T: git git://git.kernel.org/pub/scm/virt/kvm/kvm.git
 S: Supported
 F: Documentation/*/kvm*.txt
 F: Documentation/virtual/kvm/
-- 
1.8.5.rc0

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[PATCH] MAINTAINERS: Add git tree for KVM

2013-10-31 Thread Paolo Bonzini
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index fed84d861e7f..366f90cc6fdb 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4815,6 +4815,7 @@ M:Gleb Natapov g...@redhat.com
 M: Paolo Bonzini pbonz...@redhat.com
 L: kvm@vger.kernel.org
 W: http://www.linux-kvm.org
+T: git git://git.kernel.org/pub/scm/virt/kvm/kvm.git
 S: Supported
 F: Documentation/*/kvm*.txt
 F: Documentation/virtual/kvm/
-- 
1.8.3.1

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Re: [PATCH v2] MAINTAINERS: add tree for kvm.git

2013-10-31 Thread Paolo Bonzini
Il 31/10/2013 11:59, Ramkumar Ramachandra ha scritto:
 Cc: Gleb Natapov g...@redhat.com
 Cc: Paolo Bonzini pbonz...@redhat.com
 Cc: KVM List kvm@vger.kernel.org
 Signed-off-by: Ramkumar Ramachandra artag...@gmail.com
 ---
  This is a replacement for [PATCH 2/3] Documentation/kvm: patches
  should be against linux.git
 
  Thanks to Paolo for pointing to the right tree.
 
  MAINTAINERS | 1 +
  1 file changed, 1 insertion(+)
 
 diff --git a/MAINTAINERS b/MAINTAINERS
 index 1dd73f7..36b05119 100644
 --- a/MAINTAINERS
 +++ b/MAINTAINERS
 @@ -4836,6 +4836,7 @@ M:  Gleb Natapov g...@redhat.com
  M:   Paolo Bonzini pbonz...@redhat.com
  L:   kvm@vger.kernel.org
  W:   http://www.linux-kvm.org
 +T:   git git://git.kernel.org/pub/scm/virt/kvm/kvm.git
  S:   Supported
  F:   Documentation/*/kvm*.txt
  F:   Documentation/virtual/kvm/
 

Looks like we crossed. :)  I'm applying this patch and the other 2 from
the first submission.  Thanks!

Paolo
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Re: [PATCH RFC] kvm: optimize out smp_mb using srcu_read_unlock

2013-10-31 Thread Paolo Bonzini
Il 31/10/2013 07:47, Gleb Natapov ha scritto:
 This looks dubious to me. All other smp_mb__after_* variants are there
 because some atomic operations have different memory barrier semantics on
 different arches,

It doesn't have to be arches; unlock APIs typically have release
semantics only, but SRCU is stronger.

 but srcu_read_unlock() have the same semantics on all
 arches, so smp_mb__after_srcu_read_unlock() becomes
 smp_mb__after_a_function_that_happens_to_have_mb_now_but_may_not_have_in_the_feature().
 How likely it is that smp_mb() will disappear from srcu_read_unlock()
 (if was added for a reason I guess)?  May be we should change documentation
 to say that srcu_read_unlock() is a memory barrier which will reflect
 the reality.

That would be different from all other unlock APIs.

Paolo
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Re: [PATCH RFC] kvm: optimize out smp_mb using srcu_read_unlock

2013-10-31 Thread Paolo Bonzini
Il 30/10/2013 20:09, Michael S. Tsirkin ha scritto:
 I noticed that srcu_read_lock/unlock both have a memory barrier,
 so just by moving srcu_read_unlock earlier we can get rid of
 one call to smp_mb().
 
 Unsurprisingly, the gain is small but measureable using the unit test
 microbenchmark:
 before
   vmcall 1407
 after
   vmcall 1357
 
 Signed-off-by: Michael S. Tsirkin m...@redhat.com

Across how many runs?  Best or average or all runs were in that
ballpark, :) and what's the minimum/maximum before and after the patch?

As you say the benefit is not surprising, but the experiments should be
documented properly.

Paolo
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Re: [PATCH RFC] kvm: optimize out smp_mb using srcu_read_unlock

2013-10-31 Thread Michael S. Tsirkin
On Thu, Oct 31, 2013 at 12:14:15PM +0100, Paolo Bonzini wrote:
 Il 30/10/2013 20:09, Michael S. Tsirkin ha scritto:
  I noticed that srcu_read_lock/unlock both have a memory barrier,
  so just by moving srcu_read_unlock earlier we can get rid of
  one call to smp_mb().
  
  Unsurprisingly, the gain is small but measureable using the unit test
  microbenchmark:
  before
  vmcall 1407
  after
  vmcall 1357
  
  Signed-off-by: Michael S. Tsirkin m...@redhat.com
 
 Across how many runs?


It's the experiment that vmexit test does:
it runs for 2^30 cycles, then divides the number of cycles by the
number of iterations.
You get in the ballpark of 130 iterations normally.

 Best or average or all runs were in that
 ballpark, :) and what's the minimum/maximum before and after the patch?
 
 As you say the benefit is not surprising, but the experiments should be
 documented properly.
 
 Paolo

All runs in that ballpark.

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Re: [PATCH RFC] kvm: optimize out smp_mb using srcu_read_unlock

2013-10-31 Thread Gleb Natapov
On Thu, Oct 31, 2013 at 12:11:21PM +0100, Paolo Bonzini wrote:
 Il 31/10/2013 07:47, Gleb Natapov ha scritto:
  This looks dubious to me. All other smp_mb__after_* variants are there
  because some atomic operations have different memory barrier semantics on
  different arches,
 
 It doesn't have to be arches; 
Of course it doesn't, but it is now :)

   unlock APIs typically have release
 semantics only, but SRCU is stronger.
 
Yes the question is if it is by design or implementation detail we should
not rely on.

  but srcu_read_unlock() have the same semantics on all
  arches, so smp_mb__after_srcu_read_unlock() becomes
  smp_mb__after_a_function_that_happens_to_have_mb_now_but_may_not_have_in_the_feature().
  How likely it is that smp_mb() will disappear from srcu_read_unlock()
  (if was added for a reason I guess)?  May be we should change documentation
  to say that srcu_read_unlock() is a memory barrier which will reflect
  the reality.
 
 That would be different from all other unlock APIs.
 
As long as it is documented... smp_mb__after_srcu_read_unlock() is just
a form of documentation anyway right now. I do not have strong objection
to smp_mb__after_srcu_read_unlock() though, the improvement is impressive
for such a small change.

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Re: [PATCH] kvm_host: typo fix

2013-10-31 Thread Paolo Bonzini
Il 30/10/2013 20:43, Michael S. Tsirkin ha scritto:
 fix up typo in comment.
 
 Signed-off-by: Michael S. Tsirkin m...@redhat.com
 ---
  include/linux/kvm_host.h | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h
 index 0fbbc7a..7445013 100644
 --- a/include/linux/kvm_host.h
 +++ b/include/linux/kvm_host.h
 @@ -789,7 +789,7 @@ static inline void kvm_guest_enter(void)
  
   /* KVM does not hold any references to rcu protected data when it
* switches CPU into a guest mode. In fact switching to a guest mode
 -  * is very similar to exiting to userspase from rcu point of view. In
 +  * is very similar to exiting to userspace from rcu point of view. In
* addition CPU may stay in a guest mode for quite a long time (up to
* one time slice). Lets treat guest mode as quiescent state, just like
* we do with user-mode execution.
 

Applying this to kvm/queue, thanks.

Paolo
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Re: [PATCH RFC] kvm: optimize out smp_mb using srcu_read_unlock

2013-10-31 Thread Michael S. Tsirkin
On Wed, Oct 30, 2013 at 09:56:29PM -0700, Paul E. McKenney wrote:
 On Thu, Oct 31, 2013 at 01:26:05AM +0200, Michael S. Tsirkin wrote:
Paul, could you review this patch please?
Documentation/memory-barriers.txt says that unlock has a weaker
uni-directional barrier, but in practice srcu_read_unlock calls
smp_mb().

Is it OK to rely on this? If not, can I add
smp_mb__after_srcu_read_unlock (making it an empty macro for now)
so we can avoid an actual extra smp_mb()?
   
   Please use smp_mb__after_srcu_read_unlock().  After all, it was not
   that long ago that srcu_read_unlock() contained no memory barriers,
   and perhaps some day it won't need to once again.
   
 Thanx, Paul
  
  
  Thanks!
  Something like this will be enough?
  
  diff --git a/include/linux/srcu.h b/include/linux/srcu.h
  index c114614..9b058ee 100644
  --- a/include/linux/srcu.h
  +++ b/include/linux/srcu.h
  @@ -237,4 +237,18 @@ static inline void srcu_read_unlock(struct srcu_struct 
  *sp, int idx)
  __srcu_read_unlock(sp, idx);
   }
  
  +/**
  + * smp_mb__after_srcu_read_unlock - ensure full ordering after 
  srcu_read_unlock
  + *
  + * Converts the preceding srcu_read_unlock into a two-way memory barrier.
  + *
  + * Call this after srcu_read_unlock, to guarantee that all memory 
  operations
  + * that occur after smp_mb__after_srcu_read_unlock will appear to happen 
  after
  + * the preceding srcu_read_unlock.
  + */
  +static inline void smp_mb__after_srcu_read_unlock(void)
  +{
  +   /* __srcu_read_unlock has smp_mb() internally so nothing to do here. */
  +}
  +
   #endif
 
 Yep, that should do it!
 
   Thanx, Paul

BTW I'm wondering about the smb_mb within srcu_read_lock.
If we kept the index in the same memory with the buffer we
dereference, could we get rid of it and use a dependency barrier
instead? It does appear prominently in the profiles.
Thoughts?


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Re: [PATCH] KVM: x86: emulate SAHF instruction

2013-10-31 Thread Gleb Natapov
On Thu, Oct 31, 2013 at 11:29:42AM +0100, Paolo Bonzini wrote:
 Yet another instruction that we fail to emulate, this time found
 in Windows 2008R2 32-bit.
 
 Cc: sta...@vger.kernel.org
 Signed-off-by: Paolo Bonzini pbonz...@redhat.com
 ---
   Testcase on its way.  BTW, lahf/sahf is another candidate for
   #UD emulation.
 
  arch/x86/kvm/emulate.c | 14 +-
  1 file changed, 13 insertions(+), 1 deletion(-)
 
 diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
 index 8e2a07bd8eac..ef750e75c930 100644
 --- a/arch/x86/kvm/emulate.c
 +++ b/arch/x86/kvm/emulate.c
 @@ -3296,6 +3296,18 @@ static int em_cpuid(struct x86_emulate_ctxt *ctxt)
   return X86EMUL_CONTINUE;
  }
  
 +static int em_sahf(struct x86_emulate_ctxt *ctxt)
 +{
 + u32 flags;
 +
Shouldn't we check CPUID.8001H.ECX[0] = 1 in 64 bit mode?

 + flags = EFLG_CF | EFLG_PF | EFLG_AF | EFLG_ZF | EFLG_SF;
 + flags = *reg_rmw(ctxt, VCPU_REGS_RAX)  8;
 +
 + ctxt-eflags = ~0xffUL;
 + ctxt-eflags |= flags | X86_EFLAGS_FIXED;
 + return X86EMUL_CONTINUE;
 +}
 +
  static int em_lahf(struct x86_emulate_ctxt *ctxt)
  {
   *reg_rmw(ctxt, VCPU_REGS_RAX) = ~0xff00UL;
 @@ -3788,7 +3800,7 @@ static const struct opcode opcode_table[256] = {
   DI(SrcAcc | DstReg, pause), X7(D(SrcAcc | DstReg)),
   /* 0x98 - 0x9F */
   D(DstAcc | SrcNone), I(ImplicitOps | SrcAcc, em_cwd),
 - I(SrcImmFAddr | No64, em_call_far), N,
 + I(SrcImmFAddr | No64, em_call_far), I(ImplicitOps, em_sahf),
   II(ImplicitOps | Stack, em_pushf, pushf),
   II(ImplicitOps | Stack, em_popf, popf), N, I(ImplicitOps, em_lahf),
   /* 0xA0 - 0xA7 */
 -- 
 1.8.3.1

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Re: [PATCH] KVM: x86: emulate SAHF instruction

2013-10-31 Thread Paolo Bonzini
Il 31/10/2013 15:21, Gleb Natapov ha scritto:
 On Thu, Oct 31, 2013 at 11:29:42AM +0100, Paolo Bonzini wrote:
 Yet another instruction that we fail to emulate, this time found
 in Windows 2008R2 32-bit.

 Cc: sta...@vger.kernel.org
 Signed-off-by: Paolo Bonzini pbonz...@redhat.com
 ---
  Testcase on its way.  BTW, lahf/sahf is another candidate for
  #UD emulation.

  arch/x86/kvm/emulate.c | 14 +-
  1 file changed, 13 insertions(+), 1 deletion(-)

 diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
 index 8e2a07bd8eac..ef750e75c930 100644
 --- a/arch/x86/kvm/emulate.c
 +++ b/arch/x86/kvm/emulate.c
 @@ -3296,6 +3296,18 @@ static int em_cpuid(struct x86_emulate_ctxt *ctxt)
  return X86EMUL_CONTINUE;
  }
  
 +static int em_sahf(struct x86_emulate_ctxt *ctxt)
 +{
 +u32 flags;
 +
 Shouldn't we check CPUID.8001H.ECX[0] = 1 in 64 bit mode?

If we want to we should check for it in em_lahf too.  But we don't
usually check for CPUID bits.  The recently added movbe is an exception,
and syscall too, but we don't do that for SSE or MMX instructions.

The way I understand it, either AMD was lazy, or they wanted to use
lahf/sahf as prefixes later on.  But it didn't work out that way, so I
think it's fine to skip the check.

Paolo

 +flags = EFLG_CF | EFLG_PF | EFLG_AF | EFLG_ZF | EFLG_SF;
 +flags = *reg_rmw(ctxt, VCPU_REGS_RAX)  8;
 +
 +ctxt-eflags = ~0xffUL;
 +ctxt-eflags |= flags | X86_EFLAGS_FIXED;
 +return X86EMUL_CONTINUE;
 +}
 +
  static int em_lahf(struct x86_emulate_ctxt *ctxt)
  {
  *reg_rmw(ctxt, VCPU_REGS_RAX) = ~0xff00UL;
 @@ -3788,7 +3800,7 @@ static const struct opcode opcode_table[256] = {
  DI(SrcAcc | DstReg, pause), X7(D(SrcAcc | DstReg)),
  /* 0x98 - 0x9F */
  D(DstAcc | SrcNone), I(ImplicitOps | SrcAcc, em_cwd),
 -I(SrcImmFAddr | No64, em_call_far), N,
 +I(SrcImmFAddr | No64, em_call_far), I(ImplicitOps, em_sahf),
  II(ImplicitOps | Stack, em_pushf, pushf),
  II(ImplicitOps | Stack, em_popf, popf), N, I(ImplicitOps, em_lahf),
  /* 0xA0 - 0xA7 */
 -- 
 1.8.3.1
 
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Re: [PATCH] KVM: x86: emulate SAHF instruction

2013-10-31 Thread Gleb Natapov
On Thu, Oct 31, 2013 at 03:27:48PM +0100, Paolo Bonzini wrote:
 Il 31/10/2013 15:21, Gleb Natapov ha scritto:
  On Thu, Oct 31, 2013 at 11:29:42AM +0100, Paolo Bonzini wrote:
  Yet another instruction that we fail to emulate, this time found
  in Windows 2008R2 32-bit.
 
  Cc: sta...@vger.kernel.org
  Signed-off-by: Paolo Bonzini pbonz...@redhat.com
  ---
 Testcase on its way.  BTW, lahf/sahf is another candidate for
 #UD emulation.
 
   arch/x86/kvm/emulate.c | 14 +-
   1 file changed, 13 insertions(+), 1 deletion(-)
 
  diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
  index 8e2a07bd8eac..ef750e75c930 100644
  --- a/arch/x86/kvm/emulate.c
  +++ b/arch/x86/kvm/emulate.c
  @@ -3296,6 +3296,18 @@ static int em_cpuid(struct x86_emulate_ctxt *ctxt)
 return X86EMUL_CONTINUE;
   }
   
  +static int em_sahf(struct x86_emulate_ctxt *ctxt)
  +{
  +  u32 flags;
  +
  Shouldn't we check CPUID.8001H.ECX[0] = 1 in 64 bit mode?
 
 If we want to we should check for it in em_lahf too.  But we don't
Right.

 usually check for CPUID bits.  The recently added movbe is an exception,
 and syscall too, but we don't do that for SSE or MMX instructions.
 
 The way I understand it, either AMD was lazy, or they wanted to use
 lahf/sahf as prefixes later on.  But it didn't work out that way, so I
 think it's fine to skip the check.
 
I haven't checked AMD doc, but if it is documented that lahf/sahf #UDs at 64
bit we should emulate it correctly. Who knows what code depends on it.
Of course I pretty much doubt we will ever emulate sahf in 64 bit mode
:)

 Paolo
 
  +  flags = EFLG_CF | EFLG_PF | EFLG_AF | EFLG_ZF | EFLG_SF;
  +  flags = *reg_rmw(ctxt, VCPU_REGS_RAX)  8;
  +
  +  ctxt-eflags = ~0xffUL;
  +  ctxt-eflags |= flags | X86_EFLAGS_FIXED;
  +  return X86EMUL_CONTINUE;
  +}
  +
   static int em_lahf(struct x86_emulate_ctxt *ctxt)
   {
 *reg_rmw(ctxt, VCPU_REGS_RAX) = ~0xff00UL;
  @@ -3788,7 +3800,7 @@ static const struct opcode opcode_table[256] = {
 DI(SrcAcc | DstReg, pause), X7(D(SrcAcc | DstReg)),
 /* 0x98 - 0x9F */
 D(DstAcc | SrcNone), I(ImplicitOps | SrcAcc, em_cwd),
  -  I(SrcImmFAddr | No64, em_call_far), N,
  +  I(SrcImmFAddr | No64, em_call_far), I(ImplicitOps, em_sahf),
 II(ImplicitOps | Stack, em_pushf, pushf),
 II(ImplicitOps | Stack, em_popf, popf), N, I(ImplicitOps, em_lahf),
 /* 0xA0 - 0xA7 */
  -- 
  1.8.3.1
  
  --
  Gleb.
  

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Re: [PATCH] KVM: x86: emulate SAHF instruction

2013-10-31 Thread Paolo Bonzini
Il 31/10/2013 15:34, Gleb Natapov ha scritto:
 I haven't checked AMD doc, but if it is documented that lahf/sahf #UDs at 64
 bit we should emulate it correctly.

It says The LAHF instruction can only be executed in 64-bit mode if
supported by the processor implementation. Check the status of ECX bit 0
returned by CPUID function 8000_0001h to verify that the processor
supports LAHF in 64-bit mode.  Same as Intel---in fact 8001h is an
AMD leaf so to speak.

I found AMD introduced support for the instructions with their Athlon
64, Opteron and Turion 64 revision D processors in March 2005 and Intel
introduced support for the instructions with the Pentium 4 G1 stepping
in December 2005.  I think we can for all practical purposes ignore the
lahf_lm CPUID flag.

 Who knows what code depends on it.
 Of course I pretty much doubt we will ever emulate sahf in 64 bit mode

Yep.

Paolo

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Re: [PATCH] KVM: x86: emulate SAHF instruction

2013-10-31 Thread Borislav Petkov
On Thu, Oct 31, 2013 at 03:49:04PM +0100, Paolo Bonzini wrote:
 Il 31/10/2013 15:34, Gleb Natapov ha scritto:
  I haven't checked AMD doc, but if it is documented that lahf/sahf #UDs at 64
  bit we should emulate it correctly.
 
 It says The LAHF instruction can only be executed in 64-bit mode if
 supported by the processor implementation. Check the status of ECX bit 0
 returned by CPUID function 8000_0001h to verify that the processor
 supports LAHF in 64-bit mode.  Same as Intel---in fact 8001h is an
 AMD leaf so to speak.

Yes, we #UD if L/SAHF are not supported:

Invalid opcode, The LAHF instruction is not supported, as 
indicated by CPUID
#UD Fn8000_0001_ECX[LahfSahf] = 0.

 I found AMD introduced support for the instructions with their Athlon
 64, Opteron and Turion 64 revision D processors in March 2005 and Intel
 introduced support for the instructions with the Pentium 4 G1 stepping
 in December 2005.  I think we can for all practical purposes ignore the
 lahf_lm CPUID flag.
 
  Who knows what code depends on it.

I remember an issue where we had to turn off the LAHF_LM CPUID bit for
certain K8s because otherwise the flashplayer would SIGSEGV as it was
trying to execute LAHF but the CPU was not really supporting it although
CPUID said so :). See fbd8b1819e80a and 6b0f43ddfa358.

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Boris.

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Re: [PATCH] KVM: x86: emulate SAHF instruction

2013-10-31 Thread Gleb Natapov
On Thu, Oct 31, 2013 at 03:49:04PM +0100, Paolo Bonzini wrote:
 Il 31/10/2013 15:34, Gleb Natapov ha scritto:
  I haven't checked AMD doc, but if it is documented that lahf/sahf #UDs at 64
  bit we should emulate it correctly.
 
 It says The LAHF instruction can only be executed in 64-bit mode if
 supported by the processor implementation. Check the status of ECX bit 0
 returned by CPUID function 8000_0001h to verify that the processor
 supports LAHF in 64-bit mode.  Same as Intel---in fact 8001h is an
 AMD leaf so to speak.
 
 I found AMD introduced support for the instructions with their Athlon
 64, Opteron and Turion 64 revision D processors in March 2005 and Intel
 introduced support for the instructions with the Pentium 4 G1 stepping
 in December 2005.  I think we can for all practical purposes ignore the
 lahf_lm CPUID flag.
 
Yep,

Reviewed-by: Gleb Natapov g...@redhat.com

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Re: RFC: paravirtualizing perf_clock

2013-10-31 Thread David Ahern

On 10/31/13, 2:09 AM, Masami Hiramatsu wrote:

(2013/10/30 23:03), David Ahern wrote:

On 10/29/13 11:59 PM, Masami Hiramatsu wrote:

(2013/10/29 11:58), David Ahern wrote:

To back out a bit, my end goal is to be able to create and merge
perf-events from any context on a KVM-based host -- guest userspace,
guest kernel space, host userspace and host kernel space (userspace
events with a perf-clock timestamp is another topic ;-)).


That is almost same as what we(Yoshihiro and I) are trying on integrated
tracing, we are doing it on ftrace and trace-cmd (but perhaps, it eventually
works on perf-ftrace).


I thought at this point (well, once perf-ftrace gets committed) that you
can do everything with perf. What feature is missing in perf that you
get with trace-cmd or using debugfs directly?


The perftools interface is the best for profiling a process or in a short 
period.
However, what we'd like to do is monitoring or tracing in background a long
period on the memory, while the system life cycle, as a flight recorder.
This kind of tracing interface is required for mission-critical system for
trouble shooting.


right. I have a perf-based scheduling daemon that runs in a flight 
recorder mode - retain the last N-seconds of scheduling data. 
Challenging mostly to handle memory growth with task-based records 
(MMAP, FORK, EXIT, COMM). Other events are handled fairly well.




Also, on-the-fly configurability of ftrace such as snapshot, multi-buffer,
event-adding/removing are very useful, since in the flight-recorder
use-case, we can't stop tracing for even a moment.


interesting.


Moreover, our guest/host integrated tracer can pass event buffers from
guest to host with very small overhead, because it uses ftrace ringbuffer
and virtio-serial with splice (so, zero page copying in the guest).
Note that we need low overhead tracing as small as possible because it
is running always in background.


Right. Been meaning to look at what you guys have done, just have not 
had the time.



That's why we're using ftrace for our purpose. But anyway, the time
synchronization is common issue. Let's share the solution :)


Yes, that was one of the key takeaways from the Tracing Summit is the 
need to have a common time-source - just extending it to VMs as well.



And then for the cherry on top a design that works across architectures
(e.g., x86 now, but arm later).


I think your proposal is good for the default implementation, it doesn't
depends on the arch specific feature. However, since physical timer(clock)
interfaces and virtualization interfaces strongly depends on the arch,
I guess the optimized implementations will become different on each arch.
For example, maybe we can export tsc-offset to the guest to adjust clock
on x86, but not on ARM, or other devices. In that case, until implementing
optimized one, we can use paravirt perf_clock.


So this MSR read takes about 1.6usecs (from 'perf stat kvm live') and
that is total time between VMEXIT and VMENTRY. The time it takes to run
perf_clock in the host should be a very small part of that 1.6 usec.


Yeah, a hypercall is always heavy operation. So that is not the best
solution, we need a optimized one for each arch.


I'll take a look at the TSC path to see how it is optimized (suggestions
appreciated).


At least on the machine which has stable tsc, we can relay on that.
We just need the tsc-offset to adjust it in the guest. Note that this
offset can change if the guest sleeps/resumes or does a live-migration.
Each time we need to refresh the tsc-offset.


Another thought is to make the use of pv_perf_clock an option -- user
can knowingly decide the additional latency/overhead is worth the feature.


Yeah. BTW, would you see the paravirt_sched_clock(pv_time_ops)?
It seems that such synchronized clock is there.


I have poked around with it a bit.

David
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[PULL 04/51] KVM: PPC: Book3S: Add GET/SET_ONE_REG interface for VRSAVE

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

The VRSAVE register value for a vcpu is accessible through the
GET/SET_SREGS interface for Book E processors, but not for Book 3S
processors.  In order to make this accessible for Book 3S processors,
this adds a new register identifier for GET/SET_ONE_REG, and adds
the code to implement it.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 Documentation/virtual/kvm/api.txt   |  1 +
 arch/powerpc/include/uapi/asm/kvm.h |  2 ++
 arch/powerpc/kvm/book3s.c   | 10 ++
 3 files changed, 13 insertions(+)

diff --git a/Documentation/virtual/kvm/api.txt 
b/Documentation/virtual/kvm/api.txt
index e43c6f1..26fc373 100644
--- a/Documentation/virtual/kvm/api.txt
+++ b/Documentation/virtual/kvm/api.txt
@@ -1834,6 +1834,7 @@ registers, find a list below:
   PPC   | KVM_REG_PPC_TCSCR| 64
   PPC   | KVM_REG_PPC_PID  | 64
   PPC   | KVM_REG_PPC_ACOP | 64
+  PPC   | KVM_REG_PPC_VRSAVE   | 32
   PPC   | KVM_REG_PPC_TM_GPR0  | 64
   ...
   PPC   | KVM_REG_PPC_TM_GPR31 | 64
diff --git a/arch/powerpc/include/uapi/asm/kvm.h 
b/arch/powerpc/include/uapi/asm/kvm.h
index a8124fe..b98bf3f 100644
--- a/arch/powerpc/include/uapi/asm/kvm.h
+++ b/arch/powerpc/include/uapi/asm/kvm.h
@@ -532,6 +532,8 @@ struct kvm_get_htab_header {
 #define KVM_REG_PPC_PID(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb2)
 #define KVM_REG_PPC_ACOP   (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb3)
 
+#define KVM_REG_PPC_VRSAVE (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb4)
+
 /* Transactional Memory checkpointed state:
  * This is all GPRs, all VSX regs and a subset of SPRs
  */
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index 700df6f..f97369d 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -528,6 +528,9 @@ int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, 
struct kvm_one_reg *reg)
}
val = get_reg_val(reg-id, vcpu-arch.vscr.u[3]);
break;
+   case KVM_REG_PPC_VRSAVE:
+   val = get_reg_val(reg-id, vcpu-arch.vrsave);
+   break;
 #endif /* CONFIG_ALTIVEC */
case KVM_REG_PPC_DEBUG_INST: {
u32 opcode = INS_TW;
@@ -605,6 +608,13 @@ int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, 
struct kvm_one_reg *reg)
}
vcpu-arch.vscr.u[3] = set_reg_val(reg-id, val);
break;
+   case KVM_REG_PPC_VRSAVE:
+   if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
+   r = -ENXIO;
+   break;
+   }
+   vcpu-arch.vrsave = set_reg_val(reg-id, val);
+   break;
 #endif /* CONFIG_ALTIVEC */
 #ifdef CONFIG_KVM_XICS
case KVM_REG_PPC_ICP_STATE:
-- 
1.8.1.4

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[PULL 00/51] ppc patch queue 2013-10-31

2013-10-31 Thread Alexander Graf
Hi Paolo / Gleb,

This is my current patch queue for ppc.  Please pull.

Highlights of this request are:

  - Book3s HV and PR can be built into the same kernel
  - e500 target debug support
  - Book3s POWER8 preparation
  - Lots of book3s PR fixes

I left out the FPU rework from Paul in this round, as kvm/next is still on rc2.
I think it'll just have to wait for 3.14.


Alex

The following changes since commit d570142674890fe10b3d7d86aa105e3dfce1ddfa:

  Merge tag 'kvm-arm-for-3.13-1' of 
git://git.linaro.org/people/cdall/linux-kvm-arm into next (2013-10-16 15:30:32 
+0300)

are available in the git repository at:


  git://github.com/agraf/linux-2.6.git kvm-ppc-queue

for you to fetch changes up to a78b55d1c0218b6d91d504941d20e36435c276f5:

  kvm: powerpc: book3s: drop is_hv_enabled (2013-10-17 18:43:34 +0200)


Aneesh Kumar K.V (11):
  kvm: powerpc: book3s: pr: Rename KVM_BOOK3S_PR to KVM_BOOK3S_PR_POSSIBLE
  kvm: powerpc: book3s: Add a new config variable 
CONFIG_KVM_BOOK3S_HV_POSSIBLE
  kvm: powerpc: Add kvmppc_ops callback
  kvm: powerpc: book3s: Cleanup interrupt handling code
  kvm: powerpc: book3s: Add is_hv_enabled to kvmppc_ops
  kvm: powerpc: book3s: pr: move PR related tracepoints to a separate header
  kvm: powerpc: booke: Move booke related tracepoints to separate header
  kvm: powerpc: book3s: Support building HV and PR KVM as module
  kvm: Add struct kvm arg to memslot APIs
  kvm: powerpc: book3s: Allow the HV and PR selection per virtual machine
  kvm: powerpc: book3s: drop is_hv_enabled

Bharat Bhushan (10):
  powerpc: book3e: _PAGE_LENDIAN must be _PAGE_ENDIAN
  kvm: powerpc: allow guest control E attribute in mas2
  kvm: powerpc: allow guest control G attribute in mas2
  kvm: powerpc: e500: mark page accessed when mapping a guest page
  powerpc: remove unnecessary line continuations
  powerpc: move debug registers in a structure
  powerpc: export debug registers save function for KVM
  KVM: PPC: E500: exit to user space on ehpriv 1 instruction
  KVM: PPC: E500: Using struct debug_reg
  KVM: PPC: E500: Add userspace debug stub support

Michael Neuling (1):
  KVM: PPC: Book3S HV: Reserve POWER8 space in get/set_one_reg

Paul Mackerras (29):
  KVM: PPC: Book3S HV: Save/restore SIAR and SDAR along with other PMU 
registers
  KVM: PPC: Book3S HV: Implement timebase offset for guests
  KVM: PPC: Book3S: Add GET/SET_ONE_REG interface for VRSAVE
  KVM: PPC: Book3S HV: Implement H_CONFER
  KVM: PPC: Book3S HV: Restructure kvmppc_hv_entry to be a subroutine
  KVM: PPC: Book3S HV: Pull out interrupt-reading code into a subroutine
  KVM: PPC: Book3S HV: Avoid unbalanced increments of VPA yield count
  KVM: PPC: BookE: Add GET/SET_ONE_REG interface for VRSAVE
  KVM: PPC: Book3S HV: Store LPCR value for each virtual core
  KVM: PPC: Book3S HV: Add support for guest Program Priority Register
  KVM: PPC: Book3S HV: Support POWER6 compatibility mode on POWER7
  KVM: PPC: Book3S HV: Don't crash host on unknown guest interrupt
  KVM: PPC: Book3S PR: Fix compilation without CONFIG_ALTIVEC
  KVM: PPC: Book3S PR: Keep volatile reg values in vcpu rather than 
shadow_vcpu
  KVM: PPC: Book3S PR: Allow guest to use 64k pages
  KVM: PPC: Book3S PR: Use 64k host pages where possible
  KVM: PPC: Book3S PR: Handle PP0 page-protection bit in guest HPTEs
  KVM: PPC: Book3S PR: Correct errors in H_ENTER implementation
  KVM: PPC: Book3S PR: Make HPT accesses and updates SMP-safe
  KVM: PPC: Book3S PR: Allocate kvm_vcpu structs from kvm_vcpu_cache
  KVM: PPC: Book3S: Move skip-interrupt handlers to common code
  KVM: PPC: Book3S PR: Better handling of host-side read-only pages
  KVM: PPC: Book3S PR: Use mmu_notifier_retry() in kvmppc_mmu_map_page()
  KVM: PPC: Book3S PR: Mark pages accessed, and dirty if being written
  KVM: PPC: Book3S PR: Reduce number of shadow PTEs invalidated by MMU 
notifiers
  kvm: powerpc: book3s hv: Fix vcore leak
  KVM: PPC: Book3S HV: Better handling of exceptions that happen in real 
mode
  kvm: powerpc: book3s: remove kvmppc_handler_highmem label
  kvm: powerpc: book3s: move book3s_64_vio_hv.c into the main kernel binary

 Documentation/virtual/kvm/api.txt |  44 +++
 arch/arm/kvm/arm.c|   5 +-
 arch/ia64/kvm/kvm-ia64.c  |   5 +-
 arch/mips/kvm/kvm_mips.c  |   5 +-
 arch/powerpc/include/asm/disassemble.h|   4 +
 arch/powerpc/include/asm/exception-64s.h  |  21 +-
 arch/powerpc/include/asm/kvm_asm.h|   4 +
 arch/powerpc/include/asm/kvm_book3s.h | 232 +--
 arch/powerpc/include/asm/kvm_book3s_32.h  |   2 +-
 arch/powerpc/include/asm/kvm_book3s_64.h  |   8 +-
 arch/powerpc/include/asm/kvm_book3s_asm.h |   9 +-
 

[PULL 05/51] KVM: PPC: Book3S HV: Implement H_CONFER

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

The H_CONFER hypercall is used when a guest vcpu is spinning on a lock
held by another vcpu which has been preempted, and the spinning vcpu
wishes to give its timeslice to the lock holder.  We implement this
in the straightforward way using kvm_vcpu_yield_to().

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/book3s_hv.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 56f57af..a010aa4 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -538,6 +538,15 @@ int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
}
break;
case H_CONFER:
+   target = kvmppc_get_gpr(vcpu, 4);
+   if (target == -1)
+   break;
+   tvcpu = kvmppc_find_vcpu(vcpu-kvm, target);
+   if (!tvcpu) {
+   ret = H_PARAMETER;
+   break;
+   }
+   kvm_vcpu_yield_to(tvcpu);
break;
case H_REGISTER_VPA:
ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4),
-- 
1.8.1.4

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[PULL 47/51] kvm: powerpc: booke: Move booke related tracepoints to separate header

2013-10-31 Thread Alexander Graf
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/booke.c |   4 +-
 arch/powerpc/kvm/e500_mmu.c  |   2 +-
 arch/powerpc/kvm/e500_mmu_host.c |   3 +-
 arch/powerpc/kvm/trace.h | 204 ---
 arch/powerpc/kvm/trace_booke.h   | 177 +
 5 files changed, 183 insertions(+), 207 deletions(-)
 create mode 100644 arch/powerpc/kvm/trace_booke.h

diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index e5f8ba7..1769354 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -40,7 +40,9 @@
 
 #include timing.h
 #include booke.h
-#include trace.h
+
+#define CREATE_TRACE_POINTS
+#include trace_booke.h
 
 unsigned long kvmppc_booke_handlers;
 
diff --git a/arch/powerpc/kvm/e500_mmu.c b/arch/powerpc/kvm/e500_mmu.c
index d25bb75..ebca6b8 100644
--- a/arch/powerpc/kvm/e500_mmu.c
+++ b/arch/powerpc/kvm/e500_mmu.c
@@ -32,7 +32,7 @@
 #include asm/kvm_ppc.h
 
 #include e500.h
-#include trace.h
+#include trace_booke.h
 #include timing.h
 #include e500_mmu_host.h
 
diff --git a/arch/powerpc/kvm/e500_mmu_host.c b/arch/powerpc/kvm/e500_mmu_host.c
index 8f0d532..e7dde4b 100644
--- a/arch/powerpc/kvm/e500_mmu_host.c
+++ b/arch/powerpc/kvm/e500_mmu_host.c
@@ -32,10 +32,11 @@
 #include asm/kvm_ppc.h
 
 #include e500.h
-#include trace.h
 #include timing.h
 #include e500_mmu_host.h
 
+#include trace_booke.h
+
 #define to_htlb1_esel(esel) (host_tlb_params[1].entries - (esel) - 1)
 
 static struct kvmppc_e500_tlb_params host_tlb_params[E500_TLB_NUM];
diff --git a/arch/powerpc/kvm/trace.h b/arch/powerpc/kvm/trace.h
index 80f252a..2e0e67e 100644
--- a/arch/powerpc/kvm/trace.h
+++ b/arch/powerpc/kvm/trace.h
@@ -31,116 +31,6 @@ TRACE_EVENT(kvm_ppc_instr,
  __entry-inst, __entry-pc, __entry-emulate)
 );
 
-#ifdef CONFIG_PPC_BOOK3S
-#define kvm_trace_symbol_exit \
-   {0x100, SYSTEM_RESET}, \
-   {0x200, MACHINE_CHECK}, \
-   {0x300, DATA_STORAGE}, \
-   {0x380, DATA_SEGMENT}, \
-   {0x400, INST_STORAGE}, \
-   {0x480, INST_SEGMENT}, \
-   {0x500, EXTERNAL}, \
-   {0x501, EXTERNAL_LEVEL}, \
-   {0x502, EXTERNAL_HV}, \
-   {0x600, ALIGNMENT}, \
-   {0x700, PROGRAM}, \
-   {0x800, FP_UNAVAIL}, \
-   {0x900, DECREMENTER}, \
-   {0x980, HV_DECREMENTER}, \
-   {0xc00, SYSCALL}, \
-   {0xd00, TRACE}, \
-   {0xe00, H_DATA_STORAGE}, \
-   {0xe20, H_INST_STORAGE}, \
-   {0xe40, H_EMUL_ASSIST}, \
-   {0xf00, PERFMON}, \
-   {0xf20, ALTIVEC}, \
-   {0xf40, VSX}
-#else
-#define kvm_trace_symbol_exit \
-   {0, CRITICAL}, \
-   {1, MACHINE_CHECK}, \
-   {2, DATA_STORAGE}, \
-   {3, INST_STORAGE}, \
-   {4, EXTERNAL}, \
-   {5, ALIGNMENT}, \
-   {6, PROGRAM}, \
-   {7, FP_UNAVAIL}, \
-   {8, SYSCALL}, \
-   {9, AP_UNAVAIL}, \
-   {10, DECREMENTER}, \
-   {11, FIT}, \
-   {12, WATCHDOG}, \
-   {13, DTLB_MISS}, \
-   {14, ITLB_MISS}, \
-   {15, DEBUG}, \
-   {32, SPE_UNAVAIL}, \
-   {33, SPE_FP_DATA}, \
-   {34, SPE_FP_ROUND}, \
-   {35, PERFORMANCE_MONITOR}, \
-   {36, DOORBELL}, \
-   {37, DOORBELL_CRITICAL}, \
-   {38, GUEST_DBELL}, \
-   {39, GUEST_DBELL_CRIT}, \
-   {40, HV_SYSCALL}, \
-   {41, HV_PRIV}
-#endif
-
-#ifndef CONFIG_KVM_BOOK3S_PR_POSSIBLE
-/*
- * For pr we define this in trace_pr.h since it pr can be built as
- * a module
- */
-
-TRACE_EVENT(kvm_exit,
-   TP_PROTO(unsigned int exit_nr, struct kvm_vcpu *vcpu),
-   TP_ARGS(exit_nr, vcpu),
-
-   TP_STRUCT__entry(
-   __field(unsigned int,   exit_nr )
-   __field(unsigned long,  pc  )
-   __field(unsigned long,  msr )
-   __field(unsigned long,  dar )
-   __field(unsigned long,  last_inst   )
-   ),
-
-   TP_fast_assign(
-   __entry-exit_nr= exit_nr;
-   __entry-pc = kvmppc_get_pc(vcpu);
-   __entry-dar= kvmppc_get_fault_dar(vcpu);
-   __entry-msr= vcpu-arch.shared-msr;
-   __entry-last_inst  = vcpu-arch.last_inst;
-   ),
-
-   TP_printk(exit=%s
-| pc=0x%lx
-| msr=0x%lx
-| dar=0x%lx
-| last_inst=0x%lx
-   ,
-   __print_symbolic(__entry-exit_nr, kvm_trace_symbol_exit),
-   __entry-pc,
-   __entry-msr,
-   __entry-dar,
-   __entry-last_inst
-   )
-);
-
-TRACE_EVENT(kvm_unmap_hva,
-   TP_PROTO(unsigned long hva),
-   TP_ARGS(hva),
-
-   TP_STRUCT__entry(
-   __field(unsigned long,  hva 

[PULL 44/51] kvm: powerpc: book3s: Cleanup interrupt handling code

2013-10-31 Thread Alexander Graf
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

With this patch if HV is included, interrupts come in to the HV version
of the kvmppc_interrupt code, which then jumps to the PR handler,
renamed to kvmppc_interrupt_pr, if the guest is a PR guest. This helps
in enabling both HV and PR, which we do in later patch

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/exception-64s.h | 11 +++
 arch/powerpc/kvm/book3s_hv_rmhandlers.S  |  9 +++--
 arch/powerpc/kvm/book3s_segment.S|  4 ++--
 3 files changed, 20 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/include/asm/exception-64s.h 
b/arch/powerpc/include/asm/exception-64s.h
index a22c985..894662a 100644
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -198,6 +198,17 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
cmpwi   r10,0;  \
bne do_kvm_##n
 
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
+/*
+ * If hv is possible, interrupts come into to the hv version
+ * of the kvmppc_interrupt code, which then jumps to the PR handler,
+ * kvmppc_interrupt_pr, if the guest is a PR guest.
+ */
+#define kvmppc_interrupt kvmppc_interrupt_hv
+#else
+#define kvmppc_interrupt kvmppc_interrupt_pr
+#endif
+
 #define __KVM_HANDLER(area, h, n)  \
 do_kvm_##n:\
BEGIN_FTR_SECTION_NESTED(947)   \
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S 
b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 84105eb..f7e24c6 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -742,8 +742,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
 /*
  * We come here from the first-level interrupt handlers.
  */
-   .globl  kvmppc_interrupt
-kvmppc_interrupt:
+   .globl  kvmppc_interrupt_hv
+kvmppc_interrupt_hv:
/*
 * Register contents:
 * R12  = interrupt vector
@@ -757,6 +757,11 @@ kvmppc_interrupt:
lbz r9, HSTATE_IN_GUEST(r13)
cmpwi   r9, KVM_GUEST_MODE_HOST_HV
beq kvmppc_bad_host_intr
+#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
+   cmpwi   r9, KVM_GUEST_MODE_GUEST
+   ld  r9, HSTATE_HOST_R2(r13)
+   beq kvmppc_interrupt_pr
+#endif
/* We're now back in the host but in guest MMU context */
li  r9, KVM_GUEST_MODE_HOST_HV
stb r9, HSTATE_IN_GUEST(r13)
diff --git a/arch/powerpc/kvm/book3s_segment.S 
b/arch/powerpc/kvm/book3s_segment.S
index 1abe478..bc50c97 100644
--- a/arch/powerpc/kvm/book3s_segment.S
+++ b/arch/powerpc/kvm/book3s_segment.S
@@ -161,8 +161,8 @@ kvmppc_handler_trampoline_enter_end:
 .global kvmppc_handler_trampoline_exit
 kvmppc_handler_trampoline_exit:
 
-.global kvmppc_interrupt
-kvmppc_interrupt:
+.global kvmppc_interrupt_pr
+kvmppc_interrupt_pr:
 
/* Register usage at this point:
 *
-- 
1.8.1.4

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[PULL 42/51] kvm: powerpc: book3s: Add a new config variable CONFIG_KVM_BOOK3S_HV_POSSIBLE

2013-10-31 Thread Alexander Graf
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

This help ups to select the relevant code in the kernel code
when we later move HV and PR bits as seperate modules. The patch
also makes the config options for PR KVM selectable

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_book3s.h |  2 --
 arch/powerpc/include/asm/kvm_book3s_64.h  |  6 +++---
 arch/powerpc/include/asm/kvm_book3s_asm.h |  2 +-
 arch/powerpc/include/asm/kvm_host.h   | 10 +-
 arch/powerpc/include/asm/kvm_ppc.h|  2 +-
 arch/powerpc/kernel/asm-offsets.c |  8 
 arch/powerpc/kernel/idle_power7.S |  2 +-
 arch/powerpc/kvm/Kconfig  | 18 +-
 arch/powerpc/kvm/Makefile | 12 
 arch/powerpc/kvm/book3s_exports.c |  5 +++--
 10 files changed, 43 insertions(+), 24 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_book3s.h 
b/arch/powerpc/include/asm/kvm_book3s.h
index 5c07d10..99ef871 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -199,8 +199,6 @@ static inline struct kvmppc_vcpu_book3s *to_book3s(struct 
kvm_vcpu *vcpu)
return vcpu-arch.book3s;
 }
 
-extern void kvm_return_point(void);
-
 /* Also add subarch specific defines */
 
 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h 
b/arch/powerpc/include/asm/kvm_book3s_64.h
index e6ee7fd..bf0fa8b 100644
--- a/arch/powerpc/include/asm/kvm_book3s_64.h
+++ b/arch/powerpc/include/asm/kvm_book3s_64.h
@@ -35,7 +35,7 @@ static inline void svcpu_put(struct kvmppc_book3s_shadow_vcpu 
*svcpu)
 
 #define SPAPR_TCE_SHIFT12
 
-#ifdef CONFIG_KVM_BOOK3S_64_HV
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 #define KVM_DEFAULT_HPT_ORDER  24  /* 16MB HPT by default */
 extern unsigned long kvm_rma_pages;
 #endif
@@ -278,7 +278,7 @@ static inline int is_vrma_hpte(unsigned long hpte_v)
(HPTE_V_1TB_SEG | (VRMA_VSID  (40 - 16)));
 }
 
-#ifdef CONFIG_KVM_BOOK3S_64_HV
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 /*
  * Note modification of an HPTE; set the HPTE modified bit
  * if anyone is interested.
@@ -289,6 +289,6 @@ static inline void note_hpte_modification(struct kvm *kvm,
if (atomic_read(kvm-arch.hpte_mod_interest))
rev-guest_rpte |= HPTE_GR_MODIFIED;
 }
-#endif /* CONFIG_KVM_BOOK3S_64_HV */
+#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
 
 #endif /* __ASM_KVM_BOOK3S_64_H__ */
diff --git a/arch/powerpc/include/asm/kvm_book3s_asm.h 
b/arch/powerpc/include/asm/kvm_book3s_asm.h
index 6273711..0bd9348 100644
--- a/arch/powerpc/include/asm/kvm_book3s_asm.h
+++ b/arch/powerpc/include/asm/kvm_book3s_asm.h
@@ -83,7 +83,7 @@ struct kvmppc_host_state {
u8 restore_hid5;
u8 napping;
 
-#ifdef CONFIG_KVM_BOOK3S_64_HV
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
u8 hwthread_req;
u8 hwthread_state;
u8 host_ipi;
diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index 9e9f689..61ce4dc 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -224,15 +224,15 @@ struct revmap_entry {
 #define KVMPPC_GOT_PAGE0x80
 
 struct kvm_arch_memory_slot {
-#ifdef CONFIG_KVM_BOOK3S_64_HV
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
unsigned long *rmap;
unsigned long *slot_phys;
-#endif /* CONFIG_KVM_BOOK3S_64_HV */
+#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
 };
 
 struct kvm_arch {
unsigned int lpid;
-#ifdef CONFIG_KVM_BOOK3S_64_HV
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
unsigned long hpt_virt;
struct revmap_entry *revmap;
unsigned int host_lpid;
@@ -256,7 +256,7 @@ struct kvm_arch {
cpumask_t need_tlb_flush;
struct kvmppc_vcore *vcores[KVM_MAX_VCORES];
int hpt_cma_alloc;
-#endif /* CONFIG_KVM_BOOK3S_64_HV */
+#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
struct mutex hpt_mutex;
 #endif
@@ -592,7 +592,7 @@ struct kvm_vcpu_arch {
struct kvmppc_icp *icp; /* XICS presentation controller */
 #endif
 
-#ifdef CONFIG_KVM_BOOK3S_64_HV
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
struct kvm_vcpu_arch_shared shregs;
 
unsigned long pgfault_addr;
diff --git a/arch/powerpc/include/asm/kvm_ppc.h 
b/arch/powerpc/include/asm/kvm_ppc.h
index b15554a..1823f38 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -260,7 +260,7 @@ void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid);
 
 struct openpic;
 
-#ifdef CONFIG_KVM_BOOK3S_64_HV
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 extern void kvm_cma_reserve(void) __init;
 static inline void kvmppc_set_xics_phys(int cpu, unsigned long addr)
 {
diff --git a/arch/powerpc/kernel/asm-offsets.c 
b/arch/powerpc/kernel/asm-offsets.c
index 2979655..1fbb2b6 100644
--- 

[PULL 48/51] kvm: powerpc: book3s: Support building HV and PR KVM as module

2013-10-31 Thread Alexander Graf
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
[agraf: squash in compile fix]
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/Kconfig  |  6 +++---
 arch/powerpc/kvm/Makefile | 11 ---
 arch/powerpc/kvm/book3s.c | 12 +++-
 arch/powerpc/kvm/book3s_emulate.c |  2 +-
 arch/powerpc/kvm/book3s_hv.c  |  2 ++
 arch/powerpc/kvm/book3s_pr.c  |  5 -
 arch/powerpc/kvm/book3s_rtas.c|  1 +
 arch/powerpc/kvm/book3s_xics.c|  1 +
 arch/powerpc/kvm/emulate.c|  1 +
 arch/powerpc/kvm/powerpc.c| 10 ++
 virt/kvm/kvm_main.c   |  4 
 11 files changed, 46 insertions(+), 9 deletions(-)

diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig
index a96d7c3..8aeeda1 100644
--- a/arch/powerpc/kvm/Kconfig
+++ b/arch/powerpc/kvm/Kconfig
@@ -73,7 +73,7 @@ config KVM_BOOK3S_64
  If unsure, say N.
 
 config KVM_BOOK3S_64_HV
-   bool KVM support for POWER7 and PPC970 using hypervisor mode in host
+   tristate KVM support for POWER7 and PPC970 using hypervisor mode in 
host
depends on KVM_BOOK3S_64
select KVM_BOOK3S_HV_POSSIBLE
select MMU_NOTIFIER
@@ -94,8 +94,8 @@ config KVM_BOOK3S_64_HV
  If unsure, say N.
 
 config KVM_BOOK3S_64_PR
-   bool KVM support without using hypervisor mode in host
-   depends on KVM_BOOK3S_64  !KVM_BOOK3S_64_HV
+   tristate KVM support without using hypervisor mode in host
+   depends on KVM_BOOK3S_64
select KVM_BOOK3S_PR_POSSIBLE
---help---
  Support running guest kernels in virtual machines on processors
diff --git a/arch/powerpc/kvm/Makefile b/arch/powerpc/kvm/Makefile
index fa17b33..ce569b6 100644
--- a/arch/powerpc/kvm/Makefile
+++ b/arch/powerpc/kvm/Makefile
@@ -56,7 +56,7 @@ kvm-objs-$(CONFIG_KVM_E500MC) := $(kvm-e500mc-objs)
 kvm-book3s_64-builtin-objs-$(CONFIG_KVM_BOOK3S_64_HANDLER) := \
book3s_64_vio_hv.o
 
-kvm-book3s_64-objs-$(CONFIG_KVM_BOOK3S_64_PR) := \
+kvm-pr-y := \
fpu.o \
book3s_paired_singles.o \
book3s_pr.o \
@@ -76,7 +76,7 @@ kvm-book3s_64-builtin-objs-$(CONFIG_KVM_BOOK3S_64_HANDLER) += 
\
book3s_rmhandlers.o
 endif
 
-kvm-book3s_64-objs-$(CONFIG_KVM_BOOK3S_64_HV)  += \
+kvm-hv-y += \
book3s_hv.o \
book3s_hv_interrupts.o \
book3s_64_mmu_hv.o
@@ -84,13 +84,15 @@ kvm-book3s_64-objs-$(CONFIG_KVM_BOOK3S_64_HV)  += \
 kvm-book3s_64-builtin-xics-objs-$(CONFIG_KVM_XICS) := \
book3s_hv_rm_xics.o
 
-kvm-book3s_64-builtin-objs-$(CONFIG_KVM_BOOK3S_64_HV) += \
+ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
+kvm-book3s_64-builtin-objs-$(CONFIG_KVM_BOOK3S_64_HANDLER) += \
book3s_hv_rmhandlers.o \
book3s_hv_rm_mmu.o \
book3s_hv_ras.o \
book3s_hv_builtin.o \
book3s_hv_cma.o \
$(kvm-book3s_64-builtin-xics-objs-y)
+endif
 
 kvm-book3s_64-objs-$(CONFIG_KVM_XICS) += \
book3s_xics.o
@@ -131,4 +133,7 @@ obj-$(CONFIG_KVM_E500MC) += kvm.o
 obj-$(CONFIG_KVM_BOOK3S_64) += kvm.o
 obj-$(CONFIG_KVM_BOOK3S_32) += kvm.o
 
+obj-$(CONFIG_KVM_BOOK3S_64_PR) += kvm-pr.o
+obj-$(CONFIG_KVM_BOOK3S_64_HV) += kvm-hv.o
+
 obj-y += $(kvm-book3s_64-builtin-objs-y)
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index 493aff7..39d2994 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -170,28 +170,32 @@ void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, 
unsigned int vec)
printk(KERN_INFO Queueing interrupt %x\n, vec);
 #endif
 }
-
+EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
 
 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
 {
/* might as well deliver this straight away */
kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags);
 }
+EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
 
 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
 {
kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
 }
+EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
 
 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
 {
return test_bit(BOOK3S_IRQPRIO_DECREMENTER, 
vcpu-arch.pending_exceptions);
 }
+EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
 
 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
 {
kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
 }
+EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
 
 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
 struct kvm_interrupt *irq)
@@ -329,6 +333,7 @@ int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
 
return 0;
 }
+EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
 
 pfn_t kvmppc_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn, bool writing,
bool *writable)
@@ -354,6 +359,7 @@ pfn_t kvmppc_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn, 
bool writing,
 
return gfn_to_pfn_prot(vcpu-kvm, gfn, writing, 

[PULL 08/51] KVM: PPC: Book3S HV: Avoid unbalanced increments of VPA yield count

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

The yield count in the VPA is supposed to be incremented every time
we enter the guest, and every time we exit the guest, so that its
value is even when the vcpu is running in the guest and odd when it
isn't.  However, it's currently possible that we increment the yield
count on the way into the guest but then find that other CPU threads
are already exiting the guest, so we go back to nap mode via the
secondary_too_late label.  In this situation we don't increment the
yield count again, breaking the relationship between the LSB of the
count and whether the vcpu is in the guest.

To fix this, we move the increment of the yield count to a point
after we have checked whether other CPU threads are exiting.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/book3s_hv_rmhandlers.S | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S 
b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index c91ae2b..0effcd1 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -405,16 +405,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
/* Save R1 in the PACA */
std r1, HSTATE_HOST_R1(r13)
 
-   /* Increment yield count if they have a VPA */
-   ld  r3, VCPU_VPA(r4)
-   cmpdi   r3, 0
-   beq 25f
-   lwz r5, LPPACA_YIELDCOUNT(r3)
-   addir5, r5, 1
-   stw r5, LPPACA_YIELDCOUNT(r3)
-   li  r6, 1
-   stb r6, VCPU_VPA_DIRTY(r4)
-25:
/* Load up DAR and DSISR */
ld  r5, VCPU_DAR(r4)
lwz r6, VCPU_DSISR(r4)
@@ -525,6 +515,16 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
mtspr   SPRN_RMOR,r8
isync
 
+   /* Increment yield count if they have a VPA */
+   ld  r3, VCPU_VPA(r4)
+   cmpdi   r3, 0
+   beq 25f
+   lwz r5, LPPACA_YIELDCOUNT(r3)
+   addir5, r5, 1
+   stw r5, LPPACA_YIELDCOUNT(r3)
+   li  r6, 1
+   stb r6, VCPU_VPA_DIRTY(r4)
+25:
/* Check if HDEC expires soon */
mfspr   r3,SPRN_HDEC
cmpwi   r3,10
-- 
1.8.1.4

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[PULL 51/51] kvm: powerpc: book3s: drop is_hv_enabled

2013-10-31 Thread Alexander Graf
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

drop is_hv_enabled, because that should not be a callback property

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_ppc.h | 6 +-
 arch/powerpc/kvm/book3s.c  | 6 +++---
 arch/powerpc/kvm/book3s_hv.c   | 1 -
 arch/powerpc/kvm/book3s_pr.c   | 1 -
 arch/powerpc/kvm/book3s_xics.c | 2 +-
 arch/powerpc/kvm/powerpc.c | 2 +-
 6 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_ppc.h 
b/arch/powerpc/include/asm/kvm_ppc.h
index 3069cf4..c8317fb 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -183,7 +183,6 @@ union kvmppc_one_reg {
 
 struct kvmppc_ops {
struct module *owner;
-   bool is_hv_enabled;
int (*get_sregs)(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
int (*set_sregs)(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
int (*get_one_reg)(struct kvm_vcpu *vcpu, u64 id,
@@ -232,6 +231,11 @@ struct kvmppc_ops {
 extern struct kvmppc_ops *kvmppc_hv_ops;
 extern struct kvmppc_ops *kvmppc_pr_ops;
 
+static inline bool is_kvmppc_hv_enabled(struct kvm *kvm)
+{
+   return kvm-arch.kvm_ops == kvmppc_hv_ops;
+}
+
 /*
  * Cuts out inst bits with ordering according to spec.
  * That means the leftmost bit is zero. All given bits are included.
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index ad8f6ed..8912608 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -72,7 +72,7 @@ void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)
 
 static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
 {
-   if (!vcpu-kvm-arch.kvm_ops-is_hv_enabled)
+   if (!is_kvmppc_hv_enabled(vcpu-kvm))
return to_book3s(vcpu)-hior;
return 0;
 }
@@ -80,7 +80,7 @@ static inline unsigned long kvmppc_interrupt_offset(struct 
kvm_vcpu *vcpu)
 static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
unsigned long pending_now, unsigned long old_pending)
 {
-   if (vcpu-kvm-arch.kvm_ops-is_hv_enabled)
+   if (is_kvmppc_hv_enabled(vcpu-kvm))
return;
if (pending_now)
vcpu-arch.shared-int_pending = 1;
@@ -94,7 +94,7 @@ static inline bool kvmppc_critical_section(struct kvm_vcpu 
*vcpu)
ulong crit_r1;
bool crit;
 
-   if (vcpu-kvm-arch.kvm_ops-is_hv_enabled)
+   if (is_kvmppc_hv_enabled(vcpu-kvm))
return false;
 
crit_raw = vcpu-arch.shared-critical;
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 8743048..072287f 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -2160,7 +2160,6 @@ static long kvm_arch_vm_ioctl_hv(struct file *filp,
 }
 
 static struct kvmppc_ops kvm_ops_hv = {
-   .is_hv_enabled = true,
.get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv,
.set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv,
.get_one_reg = kvmppc_get_one_reg_hv,
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index fbd985f..df36cf2 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -1526,7 +1526,6 @@ static long kvm_arch_vm_ioctl_pr(struct file *filp,
 }
 
 static struct kvmppc_ops kvm_ops_pr = {
-   .is_hv_enabled = false,
.get_sregs = kvm_arch_vcpu_ioctl_get_sregs_pr,
.set_sregs = kvm_arch_vcpu_ioctl_set_sregs_pr,
.get_one_reg = kvmppc_get_one_reg_pr,
diff --git a/arch/powerpc/kvm/book3s_xics.c b/arch/powerpc/kvm/book3s_xics.c
index f7a5108..02a17dc 100644
--- a/arch/powerpc/kvm/book3s_xics.c
+++ b/arch/powerpc/kvm/book3s_xics.c
@@ -818,7 +818,7 @@ int kvmppc_xics_hcall(struct kvm_vcpu *vcpu, u32 req)
}
 
/* Check for real mode returning too hard */
-   if (xics-real_mode  vcpu-kvm-arch.kvm_ops-is_hv_enabled)
+   if (xics-real_mode  is_kvmppc_hv_enabled(vcpu-kvm))
return kvmppc_xics_rm_complete(vcpu, req);
 
switch (req) {
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index 0320c17..9ae9768 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -200,7 +200,7 @@ int kvmppc_sanity_check(struct kvm_vcpu *vcpu)
goto out;
 
/* HV KVM can only do PAPR mode for now */
-   if (!vcpu-arch.papr_enabled  vcpu-kvm-arch.kvm_ops-is_hv_enabled)
+   if (!vcpu-arch.papr_enabled  is_kvmppc_hv_enabled(vcpu-kvm))
goto out;
 
 #ifdef CONFIG_KVM_BOOKE_HV
-- 
1.8.1.4

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[PULL 46/51] kvm: powerpc: book3s: pr: move PR related tracepoints to a separate header

2013-10-31 Thread Alexander Graf
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

This patch moves PR related tracepoints to a separate header. This
enables in converting PR to a kernel module which will be done in
later patches

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/book3s_64_mmu_host.c |   2 +-
 arch/powerpc/kvm/book3s_mmu_hpte.c|   2 +-
 arch/powerpc/kvm/book3s_pr.c  |   4 +-
 arch/powerpc/kvm/trace.h  | 234 +--
 arch/powerpc/kvm/trace_pr.h   | 297 ++
 5 files changed, 309 insertions(+), 230 deletions(-)
 create mode 100644 arch/powerpc/kvm/trace_pr.h

diff --git a/arch/powerpc/kvm/book3s_64_mmu_host.c 
b/arch/powerpc/kvm/book3s_64_mmu_host.c
index 819672c..0d513af 100644
--- a/arch/powerpc/kvm/book3s_64_mmu_host.c
+++ b/arch/powerpc/kvm/book3s_64_mmu_host.c
@@ -27,7 +27,7 @@
 #include asm/machdep.h
 #include asm/mmu_context.h
 #include asm/hw_irq.h
-#include trace.h
+#include trace_pr.h
 
 #define PTE_SIZE 12
 
diff --git a/arch/powerpc/kvm/book3s_mmu_hpte.c 
b/arch/powerpc/kvm/book3s_mmu_hpte.c
index 6b79bfc..5a1ab12 100644
--- a/arch/powerpc/kvm/book3s_mmu_hpte.c
+++ b/arch/powerpc/kvm/book3s_mmu_hpte.c
@@ -28,7 +28,7 @@
 #include asm/mmu_context.h
 #include asm/hw_irq.h
 
-#include trace.h
+#include trace_pr.h
 
 #define PTE_SIZE   12
 
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index b6a525d..ca6c73d 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -42,7 +42,9 @@
 #include linux/highmem.h
 
 #include book3s.h
-#include trace.h
+
+#define CREATE_TRACE_POINTS
+#include trace_pr.h
 
 /* #define EXIT_DEBUG */
 /* #define DEBUG_EXT */
diff --git a/arch/powerpc/kvm/trace.h b/arch/powerpc/kvm/trace.h
index 9e8368e..80f252a 100644
--- a/arch/powerpc/kvm/trace.h
+++ b/arch/powerpc/kvm/trace.h
@@ -85,6 +85,12 @@ TRACE_EVENT(kvm_ppc_instr,
{41, HV_PRIV}
 #endif
 
+#ifndef CONFIG_KVM_BOOK3S_PR_POSSIBLE
+/*
+ * For pr we define this in trace_pr.h since it pr can be built as
+ * a module
+ */
+
 TRACE_EVENT(kvm_exit,
TP_PROTO(unsigned int exit_nr, struct kvm_vcpu *vcpu),
TP_ARGS(exit_nr, vcpu),
@@ -94,9 +100,6 @@ TRACE_EVENT(kvm_exit,
__field(unsigned long,  pc  )
__field(unsigned long,  msr )
__field(unsigned long,  dar )
-#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
-   __field(unsigned long,  srr1)
-#endif
__field(unsigned long,  last_inst   )
),
 
@@ -105,9 +108,6 @@ TRACE_EVENT(kvm_exit,
__entry-pc = kvmppc_get_pc(vcpu);
__entry-dar= kvmppc_get_fault_dar(vcpu);
__entry-msr= vcpu-arch.shared-msr;
-#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
-   __entry-srr1   = vcpu-arch.shadow_srr1;
-#endif
__entry-last_inst  = vcpu-arch.last_inst;
),
 
@@ -115,18 +115,12 @@ TRACE_EVENT(kvm_exit,
 | pc=0x%lx
 | msr=0x%lx
 | dar=0x%lx
-#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
-| srr1=0x%lx
-#endif
 | last_inst=0x%lx
,
__print_symbolic(__entry-exit_nr, kvm_trace_symbol_exit),
__entry-pc,
__entry-msr,
__entry-dar,
-#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
-   __entry-srr1,
-#endif
__entry-last_inst
)
 );
@@ -145,6 +139,7 @@ TRACE_EVENT(kvm_unmap_hva,
 
TP_printk(unmap hva 0x%lx\n, __entry-hva)
 );
+#endif
 
 TRACE_EVENT(kvm_stlb_inval,
TP_PROTO(unsigned int stlb_index),
@@ -231,221 +226,6 @@ TRACE_EVENT(kvm_check_requests,
__entry-cpu_nr, __entry-requests)
 );
 
-
-/*
- * Book3S trace points   *
- */
-
-#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
-
-TRACE_EVENT(kvm_book3s_reenter,
-   TP_PROTO(int r, struct kvm_vcpu *vcpu),
-   TP_ARGS(r, vcpu),
-
-   TP_STRUCT__entry(
-   __field(unsigned int,   r   )
-   __field(unsigned long,  pc  )
-   ),
-
-   TP_fast_assign(
-   __entry-r  = r;
-   __entry-pc = kvmppc_get_pc(vcpu);
-   ),
-
-   TP_printk(reentry r=%d | pc=0x%lx, __entry-r, __entry-pc)
-);
-
-#ifdef CONFIG_PPC_BOOK3S_64
-
-TRACE_EVENT(kvm_book3s_64_mmu_map,
-   TP_PROTO(int rflags, ulong hpteg, ulong va, pfn_t hpaddr,
-struct kvmppc_pte *orig_pte),
-   TP_ARGS(rflags, hpteg, va, hpaddr, orig_pte),
-
-   TP_STRUCT__entry(
-

[PULL 50/51] kvm: powerpc: book3s: Allow the HV and PR selection per virtual machine

2013-10-31 Thread Alexander Graf
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

This moves the kvmppc_ops callbacks to be a per VM entity. This
enables us to select HV and PR mode when creating a VM. We also
allow both kvm-hv and kvm-pr kernel module to be loaded. To
achieve this we move /dev/kvm ownership to kvm.ko module. Depending on
which KVM mode we select during VM creation we take a reference
count on respective module

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
[agraf: fix coding style]
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_host.h |  1 +
 arch/powerpc/include/asm/kvm_ppc.h  |  7 +--
 arch/powerpc/kvm/44x.c  |  7 ++-
 arch/powerpc/kvm/book3s.c   | 89 +
 arch/powerpc/kvm/book3s.h   |  2 +
 arch/powerpc/kvm/book3s_hv.c| 18 
 arch/powerpc/kvm/book3s_pr.c| 25 +++
 arch/powerpc/kvm/book3s_xics.c  |  2 +-
 arch/powerpc/kvm/booke.c| 22 -
 arch/powerpc/kvm/e500.c |  8 +++-
 arch/powerpc/kvm/e500mc.c   |  6 ++-
 arch/powerpc/kvm/emulate.c  | 11 ++---
 arch/powerpc/kvm/powerpc.c  | 76 ++-
 include/uapi/linux/kvm.h|  4 ++
 14 files changed, 187 insertions(+), 91 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index 61ce4dc..237d1d2 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -270,6 +270,7 @@ struct kvm_arch {
 #ifdef CONFIG_KVM_XICS
struct kvmppc_xics *xics;
 #endif
+   struct kvmppc_ops *kvm_ops;
 };
 
 /*
diff --git a/arch/powerpc/include/asm/kvm_ppc.h 
b/arch/powerpc/include/asm/kvm_ppc.h
index 20f4616..3069cf4 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -182,6 +182,7 @@ union kvmppc_one_reg {
 };
 
 struct kvmppc_ops {
+   struct module *owner;
bool is_hv_enabled;
int (*get_sregs)(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
int (*set_sregs)(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
@@ -217,7 +218,6 @@ struct kvmppc_ops {
  unsigned long npages);
int (*init_vm)(struct kvm *kvm);
void (*destroy_vm)(struct kvm *kvm);
-   int (*check_processor_compat)(void);
int (*get_smmu_info)(struct kvm *kvm, struct kvm_ppc_smmu_info *info);
int (*emulate_op)(struct kvm_run *run, struct kvm_vcpu *vcpu,
  unsigned int inst, int *advance);
@@ -229,7 +229,8 @@ struct kvmppc_ops {
 
 };
 
-extern struct kvmppc_ops *kvmppc_ops;
+extern struct kvmppc_ops *kvmppc_hv_ops;
+extern struct kvmppc_ops *kvmppc_pr_ops;
 
 /*
  * Cuts out inst bits with ordering according to spec.
@@ -326,7 +327,7 @@ static inline void kvmppc_set_host_ipi(int cpu, u8 host_ipi)
 
 static inline void kvmppc_fast_vcpu_kick(struct kvm_vcpu *vcpu)
 {
-   kvmppc_ops-fast_vcpu_kick(vcpu);
+   vcpu-kvm-arch.kvm_ops-fast_vcpu_kick(vcpu);
 }
 
 #else
diff --git a/arch/powerpc/kvm/44x.c b/arch/powerpc/kvm/44x.c
index a765bcd..93221e8 100644
--- a/arch/powerpc/kvm/44x.c
+++ b/arch/powerpc/kvm/44x.c
@@ -213,16 +213,19 @@ static int __init kvmppc_44x_init(void)
if (r)
goto err_out;
 
-   r = kvm_init(kvm_ops_44x, sizeof(struct kvmppc_vcpu_44x),
-0, THIS_MODULE);
+   r = kvm_init(NULL, sizeof(struct kvmppc_vcpu_44x), 0, THIS_MODULE);
if (r)
goto err_out;
+   kvm_ops_44x.owner = THIS_MODULE;
+   kvmppc_pr_ops = kvm_ops_44x;
+
 err_out:
return r;
 }
 
 static void __exit kvmppc_44x_exit(void)
 {
+   kvmppc_pr_ops = NULL;
kvmppc_booke_exit();
 }
 
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index 130fe1d..ad8f6ed 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -34,6 +34,7 @@
 #include linux/vmalloc.h
 #include linux/highmem.h
 
+#include book3s.h
 #include trace.h
 
 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
@@ -71,7 +72,7 @@ void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)
 
 static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
 {
-   if (!kvmppc_ops-is_hv_enabled)
+   if (!vcpu-kvm-arch.kvm_ops-is_hv_enabled)
return to_book3s(vcpu)-hior;
return 0;
 }
@@ -79,7 +80,7 @@ static inline unsigned long kvmppc_interrupt_offset(struct 
kvm_vcpu *vcpu)
 static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
unsigned long pending_now, unsigned long old_pending)
 {
-   if (kvmppc_ops-is_hv_enabled)
+   if (vcpu-kvm-arch.kvm_ops-is_hv_enabled)
return;
if (pending_now)
vcpu-arch.shared-int_pending = 1;
@@ -93,7 +94,7 @@ static inline bool kvmppc_critical_section(struct kvm_vcpu 
*vcpu)
ulong crit_r1;
bool crit;
 
- 

[PULL 41/51] kvm: powerpc: book3s: pr: Rename KVM_BOOK3S_PR to KVM_BOOK3S_PR_POSSIBLE

2013-10-31 Thread Alexander Graf
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

With later patches supporting PR kvm as a kernel module, the changes
that has to be built into the main kernel binary to enable PR KVM module
is now selected via KVM_BOOK3S_PR_POSSIBLE

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/exception-64s.h |  2 +-
 arch/powerpc/include/asm/kvm_book3s.h|  4 ++--
 arch/powerpc/include/asm/kvm_book3s_64.h |  2 +-
 arch/powerpc/include/asm/kvm_host.h  |  2 +-
 arch/powerpc/include/asm/paca.h  |  2 +-
 arch/powerpc/kernel/asm-offsets.c|  2 +-
 arch/powerpc/kernel/exceptions-64s.S |  2 +-
 arch/powerpc/kvm/Kconfig |  6 +++---
 arch/powerpc/kvm/trace.h | 10 +-
 9 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/arch/powerpc/include/asm/exception-64s.h 
b/arch/powerpc/include/asm/exception-64s.h
index 402c1c4..a22c985 100644
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -244,7 +244,7 @@ do_kvm_##n: 
\
 #define KVM_HANDLER_SKIP(area, h, n)
 #endif
 
-#ifdef CONFIG_KVM_BOOK3S_PR
+#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
 #define KVMTEST_PR(n)  __KVMTEST(n)
 #define KVM_HANDLER_PR(area, h, n) __KVM_HANDLER(area, h, n)
 #define KVM_HANDLER_PR_SKIP(area, h, n)__KVM_HANDLER_SKIP(area, h, n)
diff --git a/arch/powerpc/include/asm/kvm_book3s.h 
b/arch/powerpc/include/asm/kvm_book3s.h
index 0ec00f4..5c07d10 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -304,7 +304,7 @@ static inline ulong kvmppc_get_fault_dar(struct kvm_vcpu 
*vcpu)
return vcpu-arch.fault_dar;
 }
 
-#ifdef CONFIG_KVM_BOOK3S_PR
+#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
 
 static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
 {
@@ -339,7 +339,7 @@ static inline bool kvmppc_critical_section(struct kvm_vcpu 
*vcpu)
 
return crit;
 }
-#else /* CONFIG_KVM_BOOK3S_PR */
+#else /* CONFIG_KVM_BOOK3S_PR_POSSIBLE */
 
 static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
 {
diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h 
b/arch/powerpc/include/asm/kvm_book3s_64.h
index 86d638a..e6ee7fd 100644
--- a/arch/powerpc/include/asm/kvm_book3s_64.h
+++ b/arch/powerpc/include/asm/kvm_book3s_64.h
@@ -20,7 +20,7 @@
 #ifndef __ASM_KVM_BOOK3S_64_H__
 #define __ASM_KVM_BOOK3S_64_H__
 
-#ifdef CONFIG_KVM_BOOK3S_PR
+#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
 static inline struct kvmppc_book3s_shadow_vcpu *svcpu_get(struct kvm_vcpu 
*vcpu)
 {
preempt_disable();
diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index 4959ff1..9e9f689 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -257,7 +257,7 @@ struct kvm_arch {
struct kvmppc_vcore *vcores[KVM_MAX_VCORES];
int hpt_cma_alloc;
 #endif /* CONFIG_KVM_BOOK3S_64_HV */
-#ifdef CONFIG_KVM_BOOK3S_PR
+#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
struct mutex hpt_mutex;
 #endif
 #ifdef CONFIG_PPC_BOOK3S_64
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index a5954ce..b6ea9e0 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -166,7 +166,7 @@ struct paca_struct {
struct dtl_entry *dtl_curr; /* pointer corresponding to dtl_ridx */
 
 #ifdef CONFIG_KVM_BOOK3S_HANDLER
-#ifdef CONFIG_KVM_BOOK3S_PR
+#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
/* We use this to store guest state in */
struct kvmppc_book3s_shadow_vcpu shadow_vcpu;
 #endif
diff --git a/arch/powerpc/kernel/asm-offsets.c 
b/arch/powerpc/kernel/asm-offsets.c
index 95ba809..2979655 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -533,7 +533,7 @@ int main(void)
DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
 
 #ifdef CONFIG_PPC_BOOK3S_64
-#ifdef CONFIG_KVM_BOOK3S_PR
+#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
DEFINE(PACA_SVCPU, offsetof(struct paca_struct, shadow_vcpu));
 # define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, 
shadow_vcpu.f))
 #else
diff --git a/arch/powerpc/kernel/exceptions-64s.S 
b/arch/powerpc/kernel/exceptions-64s.S
index 2a273be..3d1c42b 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -425,7 +425,7 @@ data_access_check_stab:
mfspr   r9,SPRN_DSISR
srdir10,r10,60
rlwimi  r10,r9,16,0x20
-#ifdef CONFIG_KVM_BOOK3S_PR
+#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
lbz r9,HSTATE_IN_GUEST(r13)
rlwimi  r10,r9,8,0x300
 #endif
diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig
index ffaef2c..d0665f2 100644
--- a/arch/powerpc/kvm/Kconfig
+++ b/arch/powerpc/kvm/Kconfig
@@ -34,7 +34,7 @@ config KVM_BOOK3S_64_HANDLER
 

[PULL 36/51] KVM: PPC: E500: exit to user space on ehpriv 1 instruction

2013-10-31 Thread Alexander Graf
From: Bharat Bhushan r65...@freescale.com

ehpriv 1 instruction is used for setting software breakpoints
by user space. This patch adds support to exit to user space
with run-debug have relevant information.

As this is the first point we are using run-debug, also defined
the run-debug structure.

Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/disassemble.h |  4 
 arch/powerpc/include/asm/kvm_booke.h   |  7 ++-
 arch/powerpc/include/uapi/asm/kvm.h| 21 +
 arch/powerpc/kvm/booke.c   |  2 +-
 arch/powerpc/kvm/e500_emulate.c| 26 ++
 5 files changed, 54 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/include/asm/disassemble.h 
b/arch/powerpc/include/asm/disassemble.h
index 9b198d1..856f8de 100644
--- a/arch/powerpc/include/asm/disassemble.h
+++ b/arch/powerpc/include/asm/disassemble.h
@@ -77,4 +77,8 @@ static inline unsigned int get_d(u32 inst)
return inst  0x;
 }
 
+static inline unsigned int get_oc(u32 inst)
+{
+   return (inst  11)  0x7fff;
+}
 #endif /* __ASM_PPC_DISASSEMBLE_H__ */
diff --git a/arch/powerpc/include/asm/kvm_booke.h 
b/arch/powerpc/include/asm/kvm_booke.h
index d3c1eb3..dd8f615 100644
--- a/arch/powerpc/include/asm/kvm_booke.h
+++ b/arch/powerpc/include/asm/kvm_booke.h
@@ -26,7 +26,12 @@
 /* LPIDs we support with this build -- runtime limit may be lower */
 #define KVMPPC_NR_LPIDS64
 
-#define KVMPPC_INST_EHPRIV 0x7c00021c
+#define KVMPPC_INST_EHPRIV 0x7c00021c
+#define EHPRIV_OC_SHIFT11
+/* ehpriv 1 : ehpriv with OC = 1 is used for debug emulation */
+#define EHPRIV_OC_DEBUG1
+#define KVMPPC_INST_EHPRIV_DEBUG   (KVMPPC_INST_EHPRIV | \
+(EHPRIV_OC_DEBUG  EHPRIV_OC_SHIFT))
 
 static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val)
 {
diff --git a/arch/powerpc/include/uapi/asm/kvm.h 
b/arch/powerpc/include/uapi/asm/kvm.h
index e420d46..482bba5 100644
--- a/arch/powerpc/include/uapi/asm/kvm.h
+++ b/arch/powerpc/include/uapi/asm/kvm.h
@@ -269,7 +269,24 @@ struct kvm_fpu {
__u64 fpr[32];
 };
 
+/*
+ * Defines for h/w breakpoint, watchpoint (read, write or both) and
+ * software breakpoint.
+ * These are used as type in KVM_SET_GUEST_DEBUG ioctl and status
+ * for KVM_DEBUG_EXIT.
+ */
+#define KVMPPC_DEBUG_NONE  0x0
+#define KVMPPC_DEBUG_BREAKPOINT(1UL  1)
+#define KVMPPC_DEBUG_WATCH_WRITE   (1UL  2)
+#define KVMPPC_DEBUG_WATCH_READ(1UL  3)
 struct kvm_debug_exit_arch {
+   __u64 address;
+   /*
+* exiting to userspace because of h/w breakpoint, watchpoint
+* (read, write or both) and software breakpoint.
+*/
+   __u32 status;
+   __u32 reserved;
 };
 
 /* for KVM_SET_GUEST_DEBUG */
@@ -281,10 +298,6 @@ struct kvm_guest_debug_arch {
 * Type denotes h/w breakpoint, read watchpoint, write
 * watchpoint or watchpoint (both read and write).
 */
-#define KVMPPC_DEBUG_NONE  0x0
-#define KVMPPC_DEBUG_BREAKPOINT(1UL  1)
-#define KVMPPC_DEBUG_WATCH_WRITE   (1UL  2)
-#define KVMPPC_DEBUG_WATCH_READ(1UL  3)
__u32 type;
__u32 reserved;
} bp[16];
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 65fa775..1d6edf0 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -1477,7 +1477,7 @@ int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, 
struct kvm_one_reg *reg)
val = get_reg_val(reg-id, vcpu-arch.tsr);
break;
case KVM_REG_PPC_DEBUG_INST:
-   val = get_reg_val(reg-id, KVMPPC_INST_EHPRIV);
+   val = get_reg_val(reg-id, KVMPPC_INST_EHPRIV_DEBUG);
break;
case KVM_REG_PPC_VRSAVE:
val = get_reg_val(reg-id, vcpu-arch.vrsave);
diff --git a/arch/powerpc/kvm/e500_emulate.c b/arch/powerpc/kvm/e500_emulate.c
index b10a012..6163a03 100644
--- a/arch/powerpc/kvm/e500_emulate.c
+++ b/arch/powerpc/kvm/e500_emulate.c
@@ -26,6 +26,7 @@
 #define XOP_TLBRE   946
 #define XOP_TLBWE   978
 #define XOP_TLBILX  18
+#define XOP_EHPRIV  270
 
 #ifdef CONFIG_KVM_E500MC
 static int dbell2prio(ulong param)
@@ -82,6 +83,26 @@ static int kvmppc_e500_emul_msgsnd(struct kvm_vcpu *vcpu, 
int rb)
 }
 #endif
 
+static int kvmppc_e500_emul_ehpriv(struct kvm_run *run, struct kvm_vcpu *vcpu,
+  unsigned int inst, int *advance)
+{
+   int emulated = EMULATE_DONE;
+
+   switch (get_oc(inst)) {
+   case EHPRIV_OC_DEBUG:
+   run-exit_reason = KVM_EXIT_DEBUG;
+   run-debug.arch.address = vcpu-arch.pc;
+   run-debug.arch.status = 0;
+   kvmppc_account_exit(vcpu, 

[PULL 29/51] powerpc: book3e: _PAGE_LENDIAN must be _PAGE_ENDIAN

2013-10-31 Thread Alexander Graf
From: Bharat Bhushan r65...@freescale.com

For booke3e _PAGE_ENDIAN is not defined. Infact what is defined
is _PAGE_LENDIAN which is wrong and that should be _PAGE_ENDIAN.
There are no compilation errors as
arch/powerpc/include/asm/pte-common.h defines _PAGE_ENDIAN to 0
as it is not defined anywhere.

Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/pte-book3e.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/pte-book3e.h 
b/arch/powerpc/include/asm/pte-book3e.h
index 0156702..576ad88 100644
--- a/arch/powerpc/include/asm/pte-book3e.h
+++ b/arch/powerpc/include/asm/pte-book3e.h
@@ -40,7 +40,7 @@
 #define _PAGE_U1   0x01
 #define _PAGE_U0   0x02
 #define _PAGE_ACCESSED 0x04
-#define _PAGE_LENDIAN  0x08
+#define _PAGE_ENDIAN   0x08
 #define _PAGE_GUARDED  0x10
 #define _PAGE_COHERENT 0x20 /* M: enforce memory coherence */
 #define _PAGE_NO_CACHE 0x40 /* I: cache inhibit */
-- 
1.8.1.4

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[PULL 45/51] kvm: powerpc: book3s: Add is_hv_enabled to kvmppc_ops

2013-10-31 Thread Alexander Graf
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

This help us to identify whether we are running with hypervisor mode KVM
enabled. The change is needed so that we can have both HV and PR kvm
enabled in the same kernel.

If both HV and PR KVM are included, interrupts come in to the HV version
of the kvmppc_interrupt code, which then jumps to the PR handler,
renamed to kvmppc_interrupt_pr, if the guest is a PR guest.

Allowing both PR and HV in the same kernel required some changes to
kvm_dev_ioctl_check_extension(), since the values returned now can't
be selected with #ifdefs as much as previously. We look at is_hv_enabled
to return the right value when checking for capabilities.For capabilities that
are only provided by HV KVM, we return the HV value only if
is_hv_enabled is true. For capabilities provided by PR KVM but not HV,
we return the PR value only if is_hv_enabled is false.

NOTE: in later patch we replace is_hv_enabled with a static inline
function comparing kvm_ppc_ops

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_book3s.h | 53 --
 arch/powerpc/include/asm/kvm_ppc.h|  5 ++--
 arch/powerpc/kvm/book3s.c | 44 
 arch/powerpc/kvm/book3s_hv.c  |  1 +
 arch/powerpc/kvm/book3s_pr.c  |  1 +
 arch/powerpc/kvm/book3s_xics.c|  2 +-
 arch/powerpc/kvm/powerpc.c| 54 +++
 7 files changed, 79 insertions(+), 81 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_book3s.h 
b/arch/powerpc/include/asm/kvm_book3s.h
index 315a5d6..4a594b7 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -301,59 +301,6 @@ static inline ulong kvmppc_get_fault_dar(struct kvm_vcpu 
*vcpu)
return vcpu-arch.fault_dar;
 }
 
-#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
-
-static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
-{
-   return to_book3s(vcpu)-hior;
-}
-
-static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
-   unsigned long pending_now, unsigned long old_pending)
-{
-   if (pending_now)
-   vcpu-arch.shared-int_pending = 1;
-   else if (old_pending)
-   vcpu-arch.shared-int_pending = 0;
-}
-
-static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
-{
-   ulong crit_raw = vcpu-arch.shared-critical;
-   ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
-   bool crit;
-
-   /* Truncate crit indicators in 32 bit mode */
-   if (!(vcpu-arch.shared-msr  MSR_SF)) {
-   crit_raw = 0x;
-   crit_r1 = 0x;
-   }
-
-   /* Critical section when crit == r1 */
-   crit = (crit_raw == crit_r1);
-   /* ... and we're in supervisor mode */
-   crit = crit  !(vcpu-arch.shared-msr  MSR_PR);
-
-   return crit;
-}
-#else /* CONFIG_KVM_BOOK3S_PR_POSSIBLE */
-
-static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
-{
-   return 0;
-}
-
-static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
-   unsigned long pending_now, unsigned long old_pending)
-{
-}
-
-static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
-{
-   return false;
-}
-#endif
-
 /* Magic register values loaded into r3 and r4 before the 'sc' assembly
  * instruction for the OSI hypercalls */
 #define OSI_SC_MAGIC_R30x113724FA
diff --git a/arch/powerpc/include/asm/kvm_ppc.h 
b/arch/powerpc/include/asm/kvm_ppc.h
index 326033c..c13f15d 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -180,6 +180,7 @@ union kvmppc_one_reg {
 };
 
 struct kvmppc_ops {
+   bool is_hv_enabled;
int (*get_sregs)(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
int (*set_sregs)(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
int (*get_one_reg)(struct kvm_vcpu *vcpu, u64 id,
@@ -309,10 +310,10 @@ static inline void kvmppc_set_xics_phys(int cpu, unsigned 
long addr)
 
 static inline u32 kvmppc_get_xics_latch(void)
 {
-   u32 xirr = get_paca()-kvm_hstate.saved_xirr;
+   u32 xirr;
 
+   xirr = get_paca()-kvm_hstate.saved_xirr;
get_paca()-kvm_hstate.saved_xirr = 0;
-
return xirr;
 }
 
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index 784a1d5..493aff7 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -69,6 +69,50 @@ void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)
 {
 }
 
+static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
+{
+   if (!kvmppc_ops-is_hv_enabled)
+   return to_book3s(vcpu)-hior;
+   return 0;
+}
+
+static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
+   unsigned long pending_now, unsigned long old_pending)
+{

[PULL 49/51] kvm: Add struct kvm arg to memslot APIs

2013-10-31 Thread Alexander Graf
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

We will use that in the later patch to find the kvm ops handler

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/arm/kvm/arm.c |  5 +++--
 arch/ia64/kvm/kvm-ia64.c   |  5 +++--
 arch/mips/kvm/kvm_mips.c   |  5 +++--
 arch/powerpc/include/asm/kvm_ppc.h |  6 --
 arch/powerpc/kvm/book3s.c  |  4 ++--
 arch/powerpc/kvm/booke.c   |  4 ++--
 arch/powerpc/kvm/powerpc.c |  9 +
 arch/s390/kvm/kvm-s390.c   |  5 +++--
 arch/x86/kvm/x86.c |  5 +++--
 include/linux/kvm_host.h   |  5 +++--
 virt/kvm/kvm_main.c| 12 ++--
 11 files changed, 37 insertions(+), 28 deletions(-)

diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index cc5adb9..e312e4a 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -152,12 +152,13 @@ int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct 
vm_fault *vmf)
return VM_FAULT_SIGBUS;
 }
 
-void kvm_arch_free_memslot(struct kvm_memory_slot *free,
+void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
   struct kvm_memory_slot *dont)
 {
 }
 
-int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
+int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
+   unsigned long npages)
 {
return 0;
 }
diff --git a/arch/ia64/kvm/kvm-ia64.c b/arch/ia64/kvm/kvm-ia64.c
index bdfd878..985bf80 100644
--- a/arch/ia64/kvm/kvm-ia64.c
+++ b/arch/ia64/kvm/kvm-ia64.c
@@ -1550,12 +1550,13 @@ int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct 
vm_fault *vmf)
return VM_FAULT_SIGBUS;
 }
 
-void kvm_arch_free_memslot(struct kvm_memory_slot *free,
+void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
   struct kvm_memory_slot *dont)
 {
 }
 
-int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
+int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
+   unsigned long npages)
 {
return 0;
 }
diff --git a/arch/mips/kvm/kvm_mips.c b/arch/mips/kvm/kvm_mips.c
index a7b0445..73b3482 100644
--- a/arch/mips/kvm/kvm_mips.c
+++ b/arch/mips/kvm/kvm_mips.c
@@ -198,12 +198,13 @@ kvm_arch_dev_ioctl(struct file *filp, unsigned int ioctl, 
unsigned long arg)
return -ENOIOCTLCMD;
 }
 
-void kvm_arch_free_memslot(struct kvm_memory_slot *free,
+void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
   struct kvm_memory_slot *dont)
 {
 }
 
-int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
+int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
+   unsigned long npages)
 {
return 0;
 }
diff --git a/arch/powerpc/include/asm/kvm_ppc.h 
b/arch/powerpc/include/asm/kvm_ppc.h
index c13f15d..20f4616 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -134,9 +134,11 @@ extern struct page *kvm_alloc_hpt(unsigned long nr_pages);
 extern void kvm_release_hpt(struct page *page, unsigned long nr_pages);
 extern int kvmppc_core_init_vm(struct kvm *kvm);
 extern void kvmppc_core_destroy_vm(struct kvm *kvm);
-extern void kvmppc_core_free_memslot(struct kvm_memory_slot *free,
+extern void kvmppc_core_free_memslot(struct kvm *kvm,
+struct kvm_memory_slot *free,
 struct kvm_memory_slot *dont);
-extern int kvmppc_core_create_memslot(struct kvm_memory_slot *slot,
+extern int kvmppc_core_create_memslot(struct kvm *kvm,
+ struct kvm_memory_slot *slot,
  unsigned long npages);
 extern int kvmppc_core_prepare_memory_region(struct kvm *kvm,
struct kvm_memory_slot *memslot,
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index 39d2994..130fe1d 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -761,13 +761,13 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct 
kvm_dirty_log *log)
return kvmppc_ops-get_dirty_log(kvm, log);
 }
 
-void kvmppc_core_free_memslot(struct kvm_memory_slot *free,
+void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
  struct kvm_memory_slot *dont)
 {
kvmppc_ops-free_memslot(free, dont);
 }
 
-int kvmppc_core_create_memslot(struct kvm_memory_slot *slot,
+int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
   unsigned long npages)
 {
return kvmppc_ops-create_memslot(slot, npages);
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 1769354..cb2d986 100644
--- a/arch/powerpc/kvm/booke.c
+++ 

[PULL 34/51] powerpc: move debug registers in a structure

2013-10-31 Thread Alexander Graf
From: Bharat Bhushan r65...@freescale.com

This way we can use same data type struct with KVM and
also help in using other debug related function.

Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/processor.h |  38 +
 arch/powerpc/include/asm/reg_booke.h |   8 +-
 arch/powerpc/kernel/asm-offsets.c|   2 +-
 arch/powerpc/kernel/process.c|  42 +-
 arch/powerpc/kernel/ptrace.c | 154 +--
 arch/powerpc/kernel/ptrace32.c   |   2 +-
 arch/powerpc/kernel/signal_32.c  |   6 +-
 arch/powerpc/kernel/traps.c  |  35 
 8 files changed, 147 insertions(+), 140 deletions(-)

diff --git a/arch/powerpc/include/asm/processor.h 
b/arch/powerpc/include/asm/processor.h
index e378ccc..b438444 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -147,22 +147,7 @@ typedef struct {
 #define TS_FPR(i) fpr[i][TS_FPROFFSET]
 #define TS_TRANS_FPR(i) transact_fpr[i][TS_FPROFFSET]
 
-struct thread_struct {
-   unsigned long   ksp;/* Kernel stack pointer */
-   unsigned long   ksp_limit;  /* if ksp = ksp_limit stack overflow */
-
-#ifdef CONFIG_PPC64
-   unsigned long   ksp_vsid;
-#endif
-   struct pt_regs  *regs;  /* Pointer to saved register state */
-   mm_segment_tfs; /* for get_fs() validation */
-#ifdef CONFIG_BOOKE
-   /* BookE base exception scratch space; align on cacheline */
-   unsigned long   normsave[8] cacheline_aligned;
-#endif
-#ifdef CONFIG_PPC32
-   void*pgdir; /* root of page-table tree */
-#endif
+struct debug_reg {
 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
/*
 * The following help to manage the use of Debug Control Registers
@@ -199,6 +184,27 @@ struct thread_struct {
unsigned long   dvc2;
 #endif
 #endif
+};
+
+struct thread_struct {
+   unsigned long   ksp;/* Kernel stack pointer */
+   unsigned long   ksp_limit;  /* if ksp = ksp_limit stack overflow */
+
+#ifdef CONFIG_PPC64
+   unsigned long   ksp_vsid;
+#endif
+   struct pt_regs  *regs;  /* Pointer to saved register state */
+   mm_segment_tfs; /* for get_fs() validation */
+#ifdef CONFIG_BOOKE
+   /* BookE base exception scratch space; align on cacheline */
+   unsigned long   normsave[8] cacheline_aligned;
+#endif
+#ifdef CONFIG_PPC32
+   void*pgdir; /* root of page-table tree */
+#endif
+   /* Debug Registers */
+   struct debug_reg debug;
+
/* FP and VSX 0-31 register set */
double  fpr[32][TS_FPRWIDTH] __attribute__((aligned(16)));
struct {
diff --git a/arch/powerpc/include/asm/reg_booke.h 
b/arch/powerpc/include/asm/reg_booke.h
index ed8f836..2e31aac 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -381,7 +381,7 @@
 #define DBCR0_IA34T0x4000  /* Instr Addr 3-4 range Toggle */
 #define DBCR0_FT   0x0001  /* Freeze Timers on debug event */
 
-#define dbcr_iac_range(task)   ((task)-thread.dbcr0)
+#define dbcr_iac_range(task)   ((task)-thread.debug.dbcr0)
 #define DBCR_IAC12IDBCR0_IA12  /* Range Inclusive */
 #define DBCR_IAC12X(DBCR0_IA12 | DBCR0_IA12X)  /* Range Exclusive */
 #define DBCR_IAC12MODE (DBCR0_IA12 | DBCR0_IA12X)  /* IAC 1-2 Mode Bits */
@@ -395,7 +395,7 @@
 #define DBCR1_DAC1W0x2000  /* DAC1 Write Debug Event */
 #define DBCR1_DAC2W0x1000  /* DAC2 Write Debug Event */
 
-#define dbcr_dac(task) ((task)-thread.dbcr1)
+#define dbcr_dac(task) ((task)-thread.debug.dbcr1)
 #define DBCR_DAC1R DBCR1_DAC1R
 #define DBCR_DAC1W DBCR1_DAC1W
 #define DBCR_DAC2R DBCR1_DAC2R
@@ -441,7 +441,7 @@
 #define DBCR0_CRET 0x0020  /* Critical Return Debug Event */
 #define DBCR0_FT   0x0001  /* Freeze Timers on debug event */
 
-#define dbcr_dac(task) ((task)-thread.dbcr0)
+#define dbcr_dac(task) ((task)-thread.debug.dbcr0)
 #define DBCR_DAC1R DBCR0_DAC1R
 #define DBCR_DAC1W DBCR0_DAC1W
 #define DBCR_DAC2R DBCR0_DAC2R
@@ -475,7 +475,7 @@
 #define DBCR1_IAC34MX  0x00C0  /* Instr Addr 3-4 range eXclusive */
 #define DBCR1_IAC34AT  0x0001  /* Instr Addr 3-4 range Toggle */
 
-#define dbcr_iac_range(task)   ((task)-thread.dbcr1)
+#define dbcr_iac_range(task)   ((task)-thread.debug.dbcr1)
 #define DBCR_IAC12IDBCR1_IAC12M/* Range Inclusive */
 #define DBCR_IAC12XDBCR1_IAC12MX   /* Range Exclusive */
 #define DBCR_IAC12MODE DBCR1_IAC12MX   /* IAC 1-2 Mode Bits */
diff --git a/arch/powerpc/kernel/asm-offsets.c 
b/arch/powerpc/kernel/asm-offsets.c
index fda7f40..95ba809 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -113,7 +113,7 @@ int main(void)
 #endif /* CONFIG_SPE */
 

[PULL 31/51] kvm: powerpc: allow guest control G attribute in mas2

2013-10-31 Thread Alexander Graf
From: Bharat Bhushan r65...@freescale.com

G bit in MAS2 indicates whether the page is Guarded.
There is no reason to stop guest setting  G, so allow him.

Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/e500.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/kvm/e500.h b/arch/powerpc/kvm/e500.h
index 277cb18..4fd9650 100644
--- a/arch/powerpc/kvm/e500.h
+++ b/arch/powerpc/kvm/e500.h
@@ -117,7 +117,7 @@ static inline struct kvmppc_vcpu_e500 *to_e500(struct 
kvm_vcpu *vcpu)
 #define E500_TLB_USER_PERM_MASK (MAS3_UX|MAS3_UR|MAS3_UW)
 #define E500_TLB_SUPER_PERM_MASK (MAS3_SX|MAS3_SR|MAS3_SW)
 #define MAS2_ATTRIB_MASK \
- (MAS2_X0 | MAS2_X1 | MAS2_E)
+ (MAS2_X0 | MAS2_X1 | MAS2_E | MAS2_G)
 #define MAS3_ATTRIB_MASK \
  (MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3 \
   | E500_TLB_USER_PERM_MASK | E500_TLB_SUPER_PERM_MASK)
-- 
1.8.1.4

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[PULL 18/51] KVM: PPC: Book3S PR: Handle PP0 page-protection bit in guest HPTEs

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

64-bit POWER processors have a three-bit field for page protection in
the hashed page table entry (HPTE).  Currently we only interpret the two
bits that were present in older versions of the architecture.  The only
defined combination that has the new bit set is 110, meaning read-only
for supervisor and no access for user mode.

This adds code to kvmppc_mmu_book3s_64_xlate() to interpret the extra
bit appropriately.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/book3s_64_mmu.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/powerpc/kvm/book3s_64_mmu.c b/arch/powerpc/kvm/book3s_64_mmu.c
index ffcde01..9e6e112 100644
--- a/arch/powerpc/kvm/book3s_64_mmu.c
+++ b/arch/powerpc/kvm/book3s_64_mmu.c
@@ -298,6 +298,8 @@ do_second:
v = pteg[i];
r = pteg[i+1];
pp = (r  HPTE_R_PP) | key;
+   if (r  HPTE_R_PP0)
+   pp |= 8;
 
gpte-eaddr = eaddr;
gpte-vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data);
@@ -319,6 +321,7 @@ do_second:
case 3:
case 5:
case 7:
+   case 10:
gpte-may_read = true;
break;
}
-- 
1.8.1.4

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[PULL 12/51] KVM: PPC: Book3S HV: Support POWER6 compatibility mode on POWER7

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

This enables us to use the Processor Compatibility Register (PCR) on
POWER7 to put the processor into architecture 2.05 compatibility mode
when running a guest.  In this mode the new instructions and registers
that were introduced on POWER7 are disabled in user mode.  This
includes all the VSX facilities plus several other instructions such
as ldbrx, stdbrx, popcntw, popcntd, etc.

To select this mode, we have a new register accessible through the
set/get_one_reg interface, called KVM_REG_PPC_ARCH_COMPAT.  Setting
this to zero gives the full set of capabilities of the processor.
Setting it to one of the logical PVR values defined in PAPR puts
the vcpu into the compatibility mode for the corresponding
architecture level.  The supported values are:

0x0f02  Architecture 2.05 (POWER6)
0x0f03  Architecture 2.06 (POWER7)
0x0f13  Architecture 2.06+ (POWER7+)

Since the PCR is per-core, the architecture compatibility level and
the corresponding PCR value are stored in the struct kvmppc_vcore, and
are therefore shared between all vcpus in a virtual core.

Signed-off-by: Paul Mackerras pau...@samba.org
[agraf: squash in fix to add missing break statements and documentation]
Signed-off-by: Alexander Graf ag...@suse.de
---
 Documentation/virtual/kvm/api.txt   |  1 +
 arch/powerpc/include/asm/kvm_host.h |  2 ++
 arch/powerpc/include/asm/reg.h  | 11 +++
 arch/powerpc/include/uapi/asm/kvm.h |  3 +++
 arch/powerpc/kernel/asm-offsets.c   |  1 +
 arch/powerpc/kvm/book3s_hv.c| 35 +
 arch/powerpc/kvm/book3s_hv_rmhandlers.S | 16 +--
 7 files changed, 67 insertions(+), 2 deletions(-)

diff --git a/Documentation/virtual/kvm/api.txt 
b/Documentation/virtual/kvm/api.txt
index a9d1072..25a1957 100644
--- a/Documentation/virtual/kvm/api.txt
+++ b/Documentation/virtual/kvm/api.txt
@@ -1837,6 +1837,7 @@ registers, find a list below:
   PPC   | KVM_REG_PPC_VRSAVE   | 32
   PPC   | KVM_REG_PPC_LPCR | 64
   PPC   | KVM_REG_PPC_PPR  | 64
+  PPC   | KVM_REG_PPC_ARCH_COMPAT 32
   PPC   | KVM_REG_PPC_TM_GPR0  | 64
   ...
   PPC   | KVM_REG_PPC_TM_GPR31 | 64
diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index 4934e13..b1e8f2b 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -291,6 +291,8 @@ struct kvmppc_vcore {
struct kvm_vcpu *runner;
u64 tb_offset;  /* guest timebase - host timebase */
ulong lpcr;
+   u32 arch_compat;
+   ulong pcr;
 };
 
 #define VCORE_ENTRY_COUNT(vc)  ((vc)-entry_exit_count  0xff)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 4bec4df..e294673 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -314,6 +314,10 @@
 #define   LPID_RSVD0x3ff   /* Reserved LPID for partn switching */
 #defineSPRN_HMER   0x150   /* Hardware m? error recovery */
 #defineSPRN_HMEER  0x151   /* Hardware m? enable error recovery */
+#define SPRN_PCR   0x152   /* Processor compatibility register */
+#define   PCR_VEC_DIS  (1ul  (63-0)) /* Vec. disable (bit NA since POWER8) */
+#define   PCR_VSX_DIS  (1ul  (63-1)) /* VSX disable (bit NA since POWER8) */
+#define   PCR_ARCH_205 0x2 /* Architecture 2.05 */
 #defineSPRN_HEIR   0x153   /* Hypervisor Emulated Instruction 
Register */
 #define SPRN_TLBINDEXR 0x154   /* P7 TLB control register */
 #define SPRN_TLBVPNR   0x155   /* P7 TLB control register */
@@ -1106,6 +1110,13 @@
 #define PVR_BE 0x0070
 #define PVR_PA6T   0x0090
 
+/* Logical PVR values defined in PAPR, representing architecture levels */
+#define PVR_ARCH_204   0x0f01
+#define PVR_ARCH_205   0x0f02
+#define PVR_ARCH_206   0x0f03
+#define PVR_ARCH_206p  0x0f13
+#define PVR_ARCH_207   0x0f04
+
 /* Macros for setting and retrieving special purpose registers */
 #ifndef __ASSEMBLY__
 #define mfmsr()({unsigned long rval; \
diff --git a/arch/powerpc/include/uapi/asm/kvm.h 
b/arch/powerpc/include/uapi/asm/kvm.h
index fab6bc1..e420d46 100644
--- a/arch/powerpc/include/uapi/asm/kvm.h
+++ b/arch/powerpc/include/uapi/asm/kvm.h
@@ -536,6 +536,9 @@ struct kvm_get_htab_header {
 #define KVM_REG_PPC_LPCR   (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb5)
 #define KVM_REG_PPC_PPR(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb6)
 
+/* Architecture compatibility level */
+#define KVM_REG_PPC_ARCH_COMPAT(KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb7)
+
 /* Transactional Memory checkpointed state:
  * This is all GPRs, all VSX regs and a subset of SPRs
  */
diff --git a/arch/powerpc/kernel/asm-offsets.c 
b/arch/powerpc/kernel/asm-offsets.c
index 5fda4ef..5a285ef 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -526,6 +526,7 @@ int main(void)

[PULL 19/51] KVM: PPC: Book3S PR: Correct errors in H_ENTER implementation

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

The implementation of H_ENTER in PR KVM has some errors:

* With H_EXACT not set, if the HPTEG is full, we return H_PTEG_FULL
  as the return value of kvmppc_h_pr_enter, but the caller is expecting
  one of the EMULATE_* values.  The H_PTEG_FULL needs to go in the
  guest's R3 instead.

* With H_EXACT set, if the selected HPTE is already valid, the H_ENTER
  call should return a H_PTEG_FULL error.

This fixes these errors and also makes it write only the selected HPTE,
not the whole group, since only the selected HPTE has been modified.
This also micro-optimizes the calculations involving pte_index and i.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/book3s_pr_papr.c | 19 ++-
 1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/kvm/book3s_pr_papr.c 
b/arch/powerpc/kvm/book3s_pr_papr.c
index da0e0bc..38f1899 100644
--- a/arch/powerpc/kvm/book3s_pr_papr.c
+++ b/arch/powerpc/kvm/book3s_pr_papr.c
@@ -21,6 +21,8 @@
 #include asm/kvm_ppc.h
 #include asm/kvm_book3s.h
 
+#define HPTE_SIZE  16  /* bytes per HPT entry */
+
 static unsigned long get_pteg_addr(struct kvm_vcpu *vcpu, long pte_index)
 {
struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
@@ -40,32 +42,39 @@ static int kvmppc_h_pr_enter(struct kvm_vcpu *vcpu)
long pte_index = kvmppc_get_gpr(vcpu, 5);
unsigned long pteg[2 * 8];
unsigned long pteg_addr, i, *hpte;
+   long int ret;
 
+   i = pte_index  7;
pte_index = ~7UL;
pteg_addr = get_pteg_addr(vcpu, pte_index);
 
copy_from_user(pteg, (void __user *)pteg_addr, sizeof(pteg));
hpte = pteg;
 
+   ret = H_PTEG_FULL;
if (likely((flags  H_EXACT) == 0)) {
-   pte_index = ~7UL;
for (i = 0; ; ++i) {
if (i == 8)
-   return H_PTEG_FULL;
+   goto done;
if ((*hpte  HPTE_V_VALID) == 0)
break;
hpte += 2;
}
} else {
-   i = kvmppc_get_gpr(vcpu, 5)  7UL;
hpte += i * 2;
+   if (*hpte  HPTE_V_VALID)
+   goto done;
}
 
hpte[0] = kvmppc_get_gpr(vcpu, 6);
hpte[1] = kvmppc_get_gpr(vcpu, 7);
-   copy_to_user((void __user *)pteg_addr, pteg, sizeof(pteg));
-   kvmppc_set_gpr(vcpu, 3, H_SUCCESS);
+   pteg_addr += i * HPTE_SIZE;
+   copy_to_user((void __user *)pteg_addr, hpte, HPTE_SIZE);
kvmppc_set_gpr(vcpu, 4, pte_index | i);
+   ret = H_SUCCESS;
+
+ done:
+   kvmppc_set_gpr(vcpu, 3, ret);
 
return EMULATE_DONE;
 }
-- 
1.8.1.4

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[PULL 27/51] kvm: powerpc: book3s hv: Fix vcore leak

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

add kvmppc_free_vcores() to free the kvmppc_vcore structures
that we allocate for a guest, which are currently being leaked.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/book3s_hv.c | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index de9520f..b4d5b3b 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -2050,10 +2050,20 @@ int kvmppc_core_init_vm(struct kvm *kvm)
return 0;
 }
 
+static void kvmppc_free_vcores(struct kvm *kvm)
+{
+   long int i;
+
+   for (i = 0; i  KVM_MAX_VCORES; ++i)
+   kfree(kvm-arch.vcores[i]);
+   kvm-arch.online_vcores = 0;
+}
+
 void kvmppc_core_destroy_vm(struct kvm *kvm)
 {
uninhibit_secondary_onlining();
 
+   kvmppc_free_vcores(kvm);
if (kvm-arch.rma) {
kvm_release_rma(kvm-arch.rma);
kvm-arch.rma = NULL;
-- 
1.8.1.4

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[PULL 24/51] KVM: PPC: Book3S PR: Use mmu_notifier_retry() in kvmppc_mmu_map_page()

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

When the MM code is invalidating a range of pages, it calls the KVM
kvm_mmu_notifier_invalidate_range_start() notifier function, which calls
kvm_unmap_hva_range(), which arranges to flush all the existing host
HPTEs for guest pages.  However, the Linux PTEs for the range being
flushed are still valid at that point.  We are not supposed to establish
any new references to pages in the range until the ...range_end()
notifier gets called.  The PPC-specific KVM code doesn't get any
explicit notification of that; instead, we are supposed to use
mmu_notifier_retry() to test whether we are or have been inside a
range flush notifier pair while we have been getting a page and
instantiating a host HPTE for the page.

This therefore adds a call to mmu_notifier_retry inside
kvmppc_mmu_map_page().  This call is inside a region locked with
kvm-mmu_lock, which is the same lock that is called by the KVM
MMU notifier functions, thus ensuring that no new notification can
proceed while we are in the locked region.  Inside this region we
also create the host HPTE and link the corresponding hpte_cache
structure into the lists used to find it later.  We cannot allocate
the hpte_cache structure inside this locked region because that can
lead to deadlock, so we allocate it outside the region and free it
if we end up not using it.

This also moves the updates of vcpu3s-hpte_cache_count inside the
regions locked with vcpu3s-mmu_lock, and does the increment in
kvmppc_mmu_hpte_cache_map() when the pte is added to the cache
rather than when it is allocated, in order that the hpte_cache_count
is accurate.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_book3s.h |  1 +
 arch/powerpc/kvm/book3s_64_mmu_host.c | 37 ++-
 arch/powerpc/kvm/book3s_mmu_hpte.c| 14 +
 3 files changed, 39 insertions(+), 13 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_book3s.h 
b/arch/powerpc/include/asm/kvm_book3s.h
index a07bd7e..0ec00f4 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -142,6 +142,7 @@ extern long kvmppc_hv_find_lock_hpte(struct kvm *kvm, gva_t 
eaddr,
 
 extern void kvmppc_mmu_hpte_cache_map(struct kvm_vcpu *vcpu, struct hpte_cache 
*pte);
 extern struct hpte_cache *kvmppc_mmu_hpte_cache_next(struct kvm_vcpu *vcpu);
+extern void kvmppc_mmu_hpte_cache_free(struct hpte_cache *pte);
 extern void kvmppc_mmu_hpte_destroy(struct kvm_vcpu *vcpu);
 extern int kvmppc_mmu_hpte_init(struct kvm_vcpu *vcpu);
 extern void kvmppc_mmu_invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache 
*pte);
diff --git a/arch/powerpc/kvm/book3s_64_mmu_host.c 
b/arch/powerpc/kvm/book3s_64_mmu_host.c
index cc9fb89..307e6e8 100644
--- a/arch/powerpc/kvm/book3s_64_mmu_host.c
+++ b/arch/powerpc/kvm/book3s_64_mmu_host.c
@@ -93,6 +93,13 @@ int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct 
kvmppc_pte *orig_pte,
int r = 0;
int hpsize = MMU_PAGE_4K;
bool writable;
+   unsigned long mmu_seq;
+   struct kvm *kvm = vcpu-kvm;
+   struct hpte_cache *cpte;
+
+   /* used to check for invalidations in progress */
+   mmu_seq = kvm-mmu_notifier_seq;
+   smp_rmb();
 
/* Get host physical address for gpa */
hpaddr = kvmppc_gfn_to_pfn(vcpu, orig_pte-raddr  PAGE_SHIFT,
@@ -143,6 +150,14 @@ int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct 
kvmppc_pte *orig_pte,
 
hash = hpt_hash(vpn, mmu_psize_defs[hpsize].shift, MMU_SEGSIZE_256M);
 
+   cpte = kvmppc_mmu_hpte_cache_next(vcpu);
+
+   spin_lock(kvm-mmu_lock);
+   if (!cpte || mmu_notifier_retry(kvm, mmu_seq)) {
+   r = -EAGAIN;
+   goto out_unlock;
+   }
+
 map_again:
hpteg = ((hash  htab_hash_mask) * HPTES_PER_GROUP);
 
@@ -150,7 +165,7 @@ map_again:
if (attempt  1)
if (ppc_md.hpte_remove(hpteg)  0) {
r = -1;
-   goto out;
+   goto out_unlock;
}
 
ret = ppc_md.hpte_insert(hpteg, vpn, hpaddr, rflags, vflags,
@@ -163,8 +178,6 @@ map_again:
attempt++;
goto map_again;
} else {
-   struct hpte_cache *pte = kvmppc_mmu_hpte_cache_next(vcpu);
-
trace_kvm_book3s_64_mmu_map(rflags, hpteg,
vpn, hpaddr, orig_pte);
 
@@ -175,15 +188,21 @@ map_again:
hpteg = ((hash  htab_hash_mask) * HPTES_PER_GROUP);
}
 
-   pte-slot = hpteg + (ret  7);
-   pte-host_vpn = vpn;
-   pte-pte = *orig_pte;
-   pte-pfn = hpaddr  PAGE_SHIFT;
-   pte-pagesize = hpsize;
+   cpte-slot = hpteg + (ret  7);
+   cpte-host_vpn = vpn;
+   cpte-pte = *orig_pte;
+   cpte-pfn = 

[PULL 20/51] KVM: PPC: Book3S PR: Make HPT accesses and updates SMP-safe

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

This adds a per-VM mutex to provide mutual exclusion between vcpus
for accesses to and updates of the guest hashed page table (HPT).
This also makes the code use single-byte writes to the HPT entry
when updating of the reference (R) and change (C) bits.  The reason
for doing this, rather than writing back the whole HPTE, is that on
non-PAPR virtual machines, the guest OS might be writing to the HPTE
concurrently, and writing back the whole HPTE might conflict with
that.  Also, real hardware does single-byte writes to update R and C.

The new mutex is taken in kvmppc_mmu_book3s_64_xlate() when reading
the HPT and updating R and/or C, and in the PAPR HPT update hcalls
(H_ENTER, H_REMOVE, etc.).  Having the mutex means that we don't need
to use a hypervisor lock bit in the HPT update hcalls, and we don't
need to be careful about the order in which the bytes of the HPTE are
updated by those hcalls.

The other change here is to make emulated TLB invalidations (tlbie)
effective across all vcpus.  To do this we call kvmppc_mmu_pte_vflush
for all vcpus in kvmppc_ppc_book3s_64_tlbie().

For 32-bit, this makes the setting of the accessed and dirty bits use
single-byte writes, and makes tlbie invalidate shadow HPTEs for all
vcpus.

With this, PR KVM can successfully run SMP guests.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_host.h |  3 +++
 arch/powerpc/kvm/book3s_32_mmu.c| 36 ++--
 arch/powerpc/kvm/book3s_64_mmu.c| 33 +++--
 arch/powerpc/kvm/book3s_pr.c|  1 +
 arch/powerpc/kvm/book3s_pr_papr.c   | 33 +++--
 5 files changed, 72 insertions(+), 34 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index 3d8b8a8..0fe4872 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -254,6 +254,9 @@ struct kvm_arch {
struct kvmppc_vcore *vcores[KVM_MAX_VCORES];
int hpt_cma_alloc;
 #endif /* CONFIG_KVM_BOOK3S_64_HV */
+#ifdef CONFIG_KVM_BOOK3S_PR
+   struct mutex hpt_mutex;
+#endif
 #ifdef CONFIG_PPC_BOOK3S_64
struct list_head spapr_tce_tables;
struct list_head rtas_tokens;
diff --git a/arch/powerpc/kvm/book3s_32_mmu.c b/arch/powerpc/kvm/book3s_32_mmu.c
index af04553..856af98 100644
--- a/arch/powerpc/kvm/book3s_32_mmu.c
+++ b/arch/powerpc/kvm/book3s_32_mmu.c
@@ -271,19 +271,22 @@ static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu 
*vcpu, gva_t eaddr,
/* Update PTE C and A bits, so the guest's swapper knows we used the
   page */
if (found) {
-   u32 oldpte = pteg[i+1];
-
-   if (pte-may_read)
-   pteg[i+1] |= PTEG_FLAG_ACCESSED;
-   if (pte-may_write)
-   pteg[i+1] |= PTEG_FLAG_DIRTY;
-   else
-   dprintk_pte(KVM: Mapping read-only page!\n);
-
-   /* Write back into the PTEG */
-   if (pteg[i+1] != oldpte)
-   copy_to_user((void __user *)ptegp, pteg, sizeof(pteg));
-
+   u32 pte_r = pteg[i+1];
+   char __user *addr = (char __user *) pteg[i+1];
+
+   /*
+* Use single-byte writes to update the HPTE, to
+* conform to what real hardware does.
+*/
+   if (pte-may_read  !(pte_r  PTEG_FLAG_ACCESSED)) {
+   pte_r |= PTEG_FLAG_ACCESSED;
+   put_user(pte_r  8, addr + 2);
+   }
+   if (pte-may_write  !(pte_r  PTEG_FLAG_DIRTY)) {
+   /* XXX should only set this for stores */
+   pte_r |= PTEG_FLAG_DIRTY;
+   put_user(pte_r, addr + 3);
+   }
return 0;
}
 
@@ -348,7 +351,12 @@ static void kvmppc_mmu_book3s_32_mtsrin(struct kvm_vcpu 
*vcpu, u32 srnum,
 
 static void kvmppc_mmu_book3s_32_tlbie(struct kvm_vcpu *vcpu, ulong ea, bool 
large)
 {
-   kvmppc_mmu_pte_flush(vcpu, ea, 0x0000);
+   int i;
+   struct kvm_vcpu *v;
+
+   /* flush this VA on all cpus */
+   kvm_for_each_vcpu(i, v, vcpu-kvm)
+   kvmppc_mmu_pte_flush(v, ea, 0x0000);
 }
 
 static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
diff --git a/arch/powerpc/kvm/book3s_64_mmu.c b/arch/powerpc/kvm/book3s_64_mmu.c
index 9e6e112..ad9ecfd 100644
--- a/arch/powerpc/kvm/book3s_64_mmu.c
+++ b/arch/powerpc/kvm/book3s_64_mmu.c
@@ -257,6 +257,8 @@ static int kvmppc_mmu_book3s_64_xlate(struct kvm_vcpu 
*vcpu, gva_t eaddr,
 
pgsize = slbe-large ? MMU_PAGE_16M : MMU_PAGE_4K;
 
+   mutex_lock(vcpu-kvm-arch.hpt_mutex);
+
 do_second:
ptegp = kvmppc_mmu_book3s_64_get_pteg(vcpu_book3s, slbe, eaddr, second);
if 

[PULL 23/51] KVM: PPC: Book3S PR: Better handling of host-side read-only pages

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

Currently we request write access to all pages that get mapped into the
guest, even if the guest is only loading from the page.  This reduces
the effectiveness of KSM because it means that we unshare every page we
access.  Also, we always set the changed (C) bit in the guest HPTE if
it allows writing, even for a guest load.

This fixes both these problems.  We pass an 'iswrite' flag to the
mmu.xlate() functions and to kvmppc_mmu_map_page() to indicate whether
the access is a load or a store.  The mmu.xlate() functions now only
set C for stores.  kvmppc_gfn_to_pfn() now calls gfn_to_pfn_prot()
instead of gfn_to_pfn() so that it can indicate whether we need write
access to the page, and get back a 'writable' flag to indicate whether
the page is writable or not.  If that 'writable' flag is clear, we then
make the host HPTE read-only even if the guest HPTE allowed writing.

This means that we can get a protection fault when the guest writes to a
page that it has mapped read-write but which is read-only on the host
side (perhaps due to KSM having merged the page).  Thus we now call
kvmppc_handle_pagefault() for protection faults as well as HPTE not found
faults.  In kvmppc_handle_pagefault(), if the access was allowed by the
guest HPTE and we thus need to install a new host HPTE, we then need to
remove the old host HPTE if there is one.  This is done with a new
function, kvmppc_mmu_unmap_page(), which uses kvmppc_mmu_pte_vflush() to
find and remove the old host HPTE.

Since the memslot-related functions require the KVM SRCU read lock to
be held, this adds srcu_read_lock/unlock pairs around the calls to
kvmppc_handle_pagefault().

Finally, this changes kvmppc_mmu_book3s_32_xlate_pte() to not ignore
guest HPTEs that don't permit access, and to return -EPERM for accesses
that are not permitted by the page protections.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_book3s.h |  7 +--
 arch/powerpc/include/asm/kvm_host.h   |  3 ++-
 arch/powerpc/kvm/book3s.c | 15 +--
 arch/powerpc/kvm/book3s_32_mmu.c  | 32 +---
 arch/powerpc/kvm/book3s_32_mmu_host.c | 14 +++---
 arch/powerpc/kvm/book3s_64_mmu.c  |  9 +
 arch/powerpc/kvm/book3s_64_mmu_host.c | 20 +---
 arch/powerpc/kvm/book3s_64_mmu_hv.c   |  2 +-
 arch/powerpc/kvm/book3s_pr.c  | 29 -
 9 files changed, 91 insertions(+), 40 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_book3s.h 
b/arch/powerpc/include/asm/kvm_book3s.h
index 603fba4..a07bd7e 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -128,7 +128,9 @@ extern void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr);
 extern void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu);
 extern void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu);
 extern void kvmppc_mmu_book3s_hv_init(struct kvm_vcpu *vcpu);
-extern int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte);
+extern int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte,
+  bool iswrite);
+extern void kvmppc_mmu_unmap_page(struct kvm_vcpu *vcpu, struct kvmppc_pte 
*pte);
 extern int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr);
 extern void kvmppc_mmu_flush_segment(struct kvm_vcpu *vcpu, ulong eaddr, ulong 
seg_size);
 extern void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu);
@@ -157,7 +159,8 @@ extern void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct 
kvmppc_bat *bat,
   bool upper, u32 val);
 extern void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr);
 extern int kvmppc_emulate_paired_single(struct kvm_run *run, struct kvm_vcpu 
*vcpu);
-extern pfn_t kvmppc_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn);
+extern pfn_t kvmppc_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn, bool writing,
+   bool *writable);
 extern void kvmppc_add_revmap_chain(struct kvm *kvm, struct revmap_entry *rev,
unsigned long *rmap, long pte_index, int realmode);
 extern void kvmppc_invalidate_hpte(struct kvm *kvm, unsigned long *hptep,
diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index 404dbc8..b688191 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -348,7 +348,8 @@ struct kvmppc_mmu {
/* book3s */
void (*mtsrin)(struct kvm_vcpu *vcpu, u32 srnum, ulong value);
u32  (*mfsrin)(struct kvm_vcpu *vcpu, u32 srnum);
-   int  (*xlate)(struct kvm_vcpu *vcpu, gva_t eaddr, struct kvmppc_pte 
*pte, bool data);
+   int  (*xlate)(struct kvm_vcpu *vcpu, gva_t eaddr,
+ struct kvmppc_pte *pte, bool data, bool iswrite);
void (*reset_msr)(struct kvm_vcpu *vcpu);
void (*tlbie)(struct kvm_vcpu *vcpu, ulong 

[PULL 10/51] KVM: PPC: Book3S HV: Store LPCR value for each virtual core

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

This adds the ability to have a separate LPCR (Logical Partitioning
Control Register) value relating to a guest for each virtual core,
rather than only having a single value for the whole VM.  This
corresponds to what real POWER hardware does, where there is a LPCR
per CPU thread but most of the fields are required to have the same
value on all active threads in a core.

The per-virtual-core LPCR can be read and written using the
GET/SET_ONE_REG interface.  Userspace can can only modify the
following fields of the LPCR value:

DPFDDefault prefetch depth
ILE Interrupt little-endian
TC  Translation control (secondary HPT hash group search disable)

We still maintain a per-VM default LPCR value in kvm-arch.lpcr, which
contains bits relating to memory management, i.e. the Virtualized
Partition Memory (VPM) bits and the bits relating to guest real mode.
When this default value is updated, the update needs to be propagated
to the per-vcore values, so we add a kvmppc_update_lpcr() helper to do
that.

Signed-off-by: Paul Mackerras pau...@samba.org
[agraf: fix whitespace]
Signed-off-by: Alexander Graf ag...@suse.de
---
 Documentation/virtual/kvm/api.txt   |  1 +
 arch/powerpc/include/asm/kvm_book3s.h   |  2 +
 arch/powerpc/include/asm/kvm_host.h |  1 +
 arch/powerpc/include/asm/reg.h  |  3 ++
 arch/powerpc/include/uapi/asm/kvm.h |  1 +
 arch/powerpc/kernel/asm-offsets.c   |  1 +
 arch/powerpc/kvm/book3s_64_mmu_hv.c |  5 +--
 arch/powerpc/kvm/book3s_hv.c| 73 +++--
 arch/powerpc/kvm/book3s_hv_rmhandlers.S |  5 ++-
 9 files changed, 75 insertions(+), 17 deletions(-)

diff --git a/Documentation/virtual/kvm/api.txt 
b/Documentation/virtual/kvm/api.txt
index 26fc373..387f4c7 100644
--- a/Documentation/virtual/kvm/api.txt
+++ b/Documentation/virtual/kvm/api.txt
@@ -1835,6 +1835,7 @@ registers, find a list below:
   PPC   | KVM_REG_PPC_PID  | 64
   PPC   | KVM_REG_PPC_ACOP | 64
   PPC   | KVM_REG_PPC_VRSAVE   | 32
+  PPC   | KVM_REG_PPC_LPCR | 64
   PPC   | KVM_REG_PPC_TM_GPR0  | 64
   ...
   PPC   | KVM_REG_PPC_TM_GPR31 | 64
diff --git a/arch/powerpc/include/asm/kvm_book3s.h 
b/arch/powerpc/include/asm/kvm_book3s.h
index fa19e2f..14a4741 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -172,6 +172,8 @@ extern long kvmppc_do_h_remove(struct kvm *kvm, unsigned 
long flags,
unsigned long *hpret);
 extern long kvmppc_hv_get_dirty_log(struct kvm *kvm,
struct kvm_memory_slot *memslot, unsigned long *map);
+extern void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr,
+   unsigned long mask);
 
 extern void kvmppc_entry_trampoline(void);
 extern void kvmppc_hv_entry_trampoline(void);
diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index e4d67a6..6eabffc 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -290,6 +290,7 @@ struct kvmppc_vcore {
u64 preempt_tb;
struct kvm_vcpu *runner;
u64 tb_offset;  /* guest timebase - host timebase */
+   ulong lpcr;
 };
 
 #define VCORE_ENTRY_COUNT(vc)  ((vc)-entry_exit_count  0xff)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index fd4db15..4bec4df 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -284,6 +284,7 @@
 #define   LPCR_ISL (1ul  (63-2))
 #define   LPCR_VC_SH   (63-2)
 #define   LPCR_DPFD_SH (63-11)
+#define   LPCR_DPFD(7ul  LPCR_DPFD_SH)
 #define   LPCR_VRMASD  (0x1ful  (63-16))
 #define   LPCR_VRMA_L  (1ul  (63-12))
 #define   LPCR_VRMA_LP0(1ul  (63-15))
@@ -300,6 +301,7 @@
 #define LPCR_PECE2 0x1000  /* machine check etc can cause exit */
 #define   LPCR_MER 0x0800  /* Mediated External Exception */
 #define   LPCR_MER_SH  11
+#define   LPCR_TC  0x0200  /* Translation control */
 #define   LPCR_LPES0x000c
 #define   LPCR_LPES0   0x0008  /* LPAR Env selector 0 */
 #define   LPCR_LPES1   0x0004  /* LPAR Env selector 1 */
@@ -421,6 +423,7 @@
 #define HID4_RMLS2_SH   (63 - 2)   /* Real mode limit bottom 2 
bits */
 #define HID4_LPID5_SH   (63 - 6)   /* partition ID bottom 4 bits */
 #define HID4_RMOR_SH(63 - 22)  /* real mode offset (16 bits) */
+#define  HID4_RMOR  (0xul  HID4_RMOR_SH)
 #define  HID4_LPES1 (1  (63-57)) /* LPAR env. sel. bit 1 */
 #define  HID4_RMLS0_SH  (63 - 58)  /* Real mode limit top bit */
 #define HID4_LPID1_SH   0  /* partition ID top 2 bits */
diff --git a/arch/powerpc/include/uapi/asm/kvm.h 
b/arch/powerpc/include/uapi/asm/kvm.h
index b98bf3f..e42127d 100644
--- a/arch/powerpc/include/uapi/asm/kvm.h
+++ b/arch/powerpc/include/uapi/asm/kvm.h
@@ -533,6 +533,7 @@ struct 

[PULL 37/51] KVM: PPC: E500: Using struct debug_reg

2013-10-31 Thread Alexander Graf
From: Bharat Bhushan r65...@freescale.com

For KVM also use the struct debug_reg defined in asm/processor.h

Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_host.h | 13 +
 arch/powerpc/kvm/booke.c| 34 --
 2 files changed, 25 insertions(+), 22 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index b688191..7e83c5f 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -387,17 +387,6 @@ struct kvmppc_slb {
 #define KVMPPC_EPR_USER1 /* exit to userspace to fill EPR */
 #define KVMPPC_EPR_KERNEL  2 /* in-kernel irqchip */
 
-struct kvmppc_booke_debug_reg {
-   u32 dbcr0;
-   u32 dbcr1;
-   u32 dbcr2;
-#ifdef CONFIG_KVM_E500MC
-   u32 dbcr4;
-#endif
-   u64 iac[KVMPPC_BOOKE_MAX_IAC];
-   u64 dac[KVMPPC_BOOKE_MAX_DAC];
-};
-
 #define KVMPPC_IRQ_DEFAULT 0
 #define KVMPPC_IRQ_MPIC1
 #define KVMPPC_IRQ_XICS2
@@ -549,7 +538,7 @@ struct kvm_vcpu_arch {
u32 eptcfg;
u32 epr;
u32 crit_save;
-   struct kvmppc_booke_debug_reg dbg_reg;
+   struct debug_reg dbg_reg;
 #endif
gpa_t paddr_accessed;
gva_t vaddr_accessed;
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 1d6edf0..a972fb6 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -1441,7 +1441,6 @@ int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, 
struct kvm_one_reg *reg)
int r = 0;
union kvmppc_one_reg val;
int size;
-   long int i;
 
size = one_reg_size(reg-id);
if (size  sizeof(val))
@@ -1449,16 +1448,24 @@ int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, 
struct kvm_one_reg *reg)
 
switch (reg-id) {
case KVM_REG_PPC_IAC1:
+   val = get_reg_val(reg-id, vcpu-arch.dbg_reg.iac1);
+   break;
case KVM_REG_PPC_IAC2:
+   val = get_reg_val(reg-id, vcpu-arch.dbg_reg.iac2);
+   break;
+#if CONFIG_PPC_ADV_DEBUG_IACS  2
case KVM_REG_PPC_IAC3:
+   val = get_reg_val(reg-id, vcpu-arch.dbg_reg.iac3);
+   break;
case KVM_REG_PPC_IAC4:
-   i = reg-id - KVM_REG_PPC_IAC1;
-   val = get_reg_val(reg-id, vcpu-arch.dbg_reg.iac[i]);
+   val = get_reg_val(reg-id, vcpu-arch.dbg_reg.iac4);
break;
+#endif
case KVM_REG_PPC_DAC1:
+   val = get_reg_val(reg-id, vcpu-arch.dbg_reg.dac1);
+   break;
case KVM_REG_PPC_DAC2:
-   i = reg-id - KVM_REG_PPC_DAC1;
-   val = get_reg_val(reg-id, vcpu-arch.dbg_reg.dac[i]);
+   val = get_reg_val(reg-id, vcpu-arch.dbg_reg.dac2);
break;
case KVM_REG_PPC_EPR: {
u32 epr = get_guest_epr(vcpu);
@@ -1501,7 +1508,6 @@ int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, 
struct kvm_one_reg *reg)
int r = 0;
union kvmppc_one_reg val;
int size;
-   long int i;
 
size = one_reg_size(reg-id);
if (size  sizeof(val))
@@ -1512,16 +1518,24 @@ int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, 
struct kvm_one_reg *reg)
 
switch (reg-id) {
case KVM_REG_PPC_IAC1:
+   vcpu-arch.dbg_reg.iac1 = set_reg_val(reg-id, val);
+   break;
case KVM_REG_PPC_IAC2:
+   vcpu-arch.dbg_reg.iac2 = set_reg_val(reg-id, val);
+   break;
+#if CONFIG_PPC_ADV_DEBUG_IACS  2
case KVM_REG_PPC_IAC3:
+   vcpu-arch.dbg_reg.iac3 = set_reg_val(reg-id, val);
+   break;
case KVM_REG_PPC_IAC4:
-   i = reg-id - KVM_REG_PPC_IAC1;
-   vcpu-arch.dbg_reg.iac[i] = set_reg_val(reg-id, val);
+   vcpu-arch.dbg_reg.iac4 = set_reg_val(reg-id, val);
break;
+#endif
case KVM_REG_PPC_DAC1:
+   vcpu-arch.dbg_reg.dac1 = set_reg_val(reg-id, val);
+   break;
case KVM_REG_PPC_DAC2:
-   i = reg-id - KVM_REG_PPC_DAC1;
-   vcpu-arch.dbg_reg.dac[i] = set_reg_val(reg-id, val);
+   vcpu-arch.dbg_reg.dac2 = set_reg_val(reg-id, val);
break;
case KVM_REG_PPC_EPR: {
u32 new_epr = set_reg_val(reg-id, val);
-- 
1.8.1.4

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[PULL 38/51] KVM: PPC: E500: Add userspace debug stub support

2013-10-31 Thread Alexander Graf
From: Bharat Bhushan r65...@freescale.com

This patch adds the debug stub support on booke/bookehv.
Now QEMU debug stub can use hw breakpoint, watchpoint and
software breakpoint to debug guest.

This is how we save/restore debug register context when switching
between guest, userspace and kernel user-process:

When QEMU is running
 - thread-debug_reg == QEMU debug register context.
 - Kernel will handle switching the debug register on context switch.
 - no vcpu_load() called

QEMU makes ioctls (except RUN)
 - This will call vcpu_load()
 - should not change context.
 - Some ioctls can change vcpu debug register, context saved in 
vcpu-debug_regs

QEMU Makes RUN ioctl
 - Save thread-debug_reg on STACK
 - Store thread-debug_reg == vcpu-debug_reg
 - load thread-debug_reg
 - RUN VCPU ( So thread points to vcpu context )

Context switch happens When VCPU running
 - makes vcpu_load() should not load any context
 - kernel loads the vcpu context as thread-debug_regs points to vcpu context.

On heavyweight_exit
 - Load the context saved on stack in thread-debug_reg

Currently we do not support debug resource emulation to guest,
On debug exception, always exit to user space irrespective of
user space is expecting the debug exception or not. If this is
unexpected exception (breakpoint/watchpoint event not set by
userspace) then let us leave the action on user space. This
is similar to what it was before, only thing is that now we
have proper exit state available to user space.

Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_host.h |   3 +
 arch/powerpc/include/uapi/asm/kvm.h |   1 +
 arch/powerpc/kvm/booke.c| 240 +---
 arch/powerpc/kvm/booke.h|   5 +
 4 files changed, 231 insertions(+), 18 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index 7e83c5f..4959ff1 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -538,7 +538,10 @@ struct kvm_vcpu_arch {
u32 eptcfg;
u32 epr;
u32 crit_save;
+   /* guest debug registers*/
struct debug_reg dbg_reg;
+   /* hardware visible debug registers when in guest state */
+   struct debug_reg shadow_dbg_reg;
 #endif
gpa_t paddr_accessed;
gva_t vaddr_accessed;
diff --git a/arch/powerpc/include/uapi/asm/kvm.h 
b/arch/powerpc/include/uapi/asm/kvm.h
index 482bba5..6836ec7 100644
--- a/arch/powerpc/include/uapi/asm/kvm.h
+++ b/arch/powerpc/include/uapi/asm/kvm.h
@@ -27,6 +27,7 @@
 #define __KVM_HAVE_PPC_SMT
 #define __KVM_HAVE_IRQCHIP
 #define __KVM_HAVE_IRQ_LINE
+#define __KVM_HAVE_GUEST_DEBUG
 
 struct kvm_regs {
__u64 pc;
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index a972fb6..8b6a790 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -133,6 +133,29 @@ static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu)
 #endif
 }
 
+static void kvmppc_vcpu_sync_debug(struct kvm_vcpu *vcpu)
+{
+   /* Synchronize guest's desire to get debug interrupts into shadow MSR */
+#ifndef CONFIG_KVM_BOOKE_HV
+   vcpu-arch.shadow_msr = ~MSR_DE;
+   vcpu-arch.shadow_msr |= vcpu-arch.shared-msr  MSR_DE;
+#endif
+
+   /* Force enable debug interrupts when user space wants to debug */
+   if (vcpu-guest_debug) {
+#ifdef CONFIG_KVM_BOOKE_HV
+   /*
+* Since there is no shadow MSR, sync MSR_DE into the guest
+* visible MSR.
+*/
+   vcpu-arch.shared-msr |= MSR_DE;
+#else
+   vcpu-arch.shadow_msr |= MSR_DE;
+   vcpu-arch.shared-msr = ~MSR_DE;
+#endif
+   }
+}
+
 /*
  * Helper function for full MSR writes.  No need to call this if only
  * EE/CE/ME/DE/RI are changing.
@@ -150,6 +173,7 @@ void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
kvmppc_mmu_msr_notify(vcpu, old_msr);
kvmppc_vcpu_sync_spe(vcpu);
kvmppc_vcpu_sync_fpu(vcpu);
+   kvmppc_vcpu_sync_debug(vcpu);
 }
 
 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
@@ -655,6 +679,7 @@ int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
 {
int ret, s;
+   struct thread_struct thread;
 #ifdef CONFIG_PPC_FPU
unsigned int fpscr;
int fpexc_mode;
@@ -696,6 +721,12 @@ int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct 
kvm_vcpu *vcpu)
kvmppc_load_guest_fp(vcpu);
 #endif
 
+   /* Switch to guest debug context */
+   thread.debug = vcpu-arch.shadow_dbg_reg;
+   switch_booke_debug_regs(thread);
+   thread.debug = current-thread.debug;
+   current-thread.debug = vcpu-arch.shadow_dbg_reg;
+
kvmppc_fix_ee_before_entry();
 
ret = __kvmppc_vcpu_run(kvm_run, vcpu);
@@ -703,6 +734,10 @@ int kvmppc_vcpu_run(struct kvm_run *kvm_run, 

[PULL 28/51] KVM: PPC: Book3S HV: Better handling of exceptions that happen in real mode

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

When an interrupt or exception happens in the guest that comes to the
host, the CPU goes to hypervisor real mode (MMU off) to handle the
exception but doesn't change the MMU context.  After saving a few
registers, we then clear the in guest flag.  If, for any reason,
we get an exception in the real-mode code, that then gets handled
by the normal kernel exception handlers, which turn the MMU on.  This
is disastrous if the MMU is still set to the guest context, since we
end up executing instructions from random places in the guest kernel
with hypervisor privilege.

In order to catch this situation, we define a new value for the in guest
flag, KVM_GUEST_MODE_HOST_HV, to indicate that we are in hypervisor real
mode with guest MMU context.  If the in guest flag is set to this value,
we branch off to an emergency handler.  For the moment, this just does
a branch to self to stop the CPU from doing anything further.

While we're here, we define another new flag value to indicate that we
are in a HV guest, as distinct from a PR guest.  This will be useful
when we have a kernel that can support both PR and HV guests concurrently.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_asm.h  |  2 ++
 arch/powerpc/kvm/book3s_hv_rmhandlers.S | 31 +--
 2 files changed, 27 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_asm.h 
b/arch/powerpc/include/asm/kvm_asm.h
index e2d4d46..1bd92fd 100644
--- a/arch/powerpc/include/asm/kvm_asm.h
+++ b/arch/powerpc/include/asm/kvm_asm.h
@@ -138,6 +138,8 @@
 #define KVM_GUEST_MODE_NONE0
 #define KVM_GUEST_MODE_GUEST   1
 #define KVM_GUEST_MODE_SKIP2
+#define KVM_GUEST_MODE_GUEST_HV3
+#define KVM_GUEST_MODE_HOST_HV 4
 
 #define KVM_INST_FETCH_FAILED  -1
 
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S 
b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 6e3370f..84105eb 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -387,6 +387,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
mtspr   SPRN_DAR, r5
mtspr   SPRN_DSISR, r6
 
+   li  r6, KVM_GUEST_MODE_HOST_HV
+   stb r6, HSTATE_IN_GUEST(r13)
+
 BEGIN_FTR_SECTION
/* Restore AMR and UAMOR, set AMOR to all 1s */
ld  r5,VCPU_AMR(r4)
@@ -690,7 +693,7 @@ fast_guest_return:
mtspr   SPRN_HSRR1,r11
 
/* Activate guest mode, so faults get handled by KVM */
-   li  r9, KVM_GUEST_MODE_GUEST
+   li  r9, KVM_GUEST_MODE_GUEST_HV
stb r9, HSTATE_IN_GUEST(r13)
 
/* Enter guest */
@@ -750,6 +753,14 @@ kvmppc_interrupt:
 */
/* abuse host_r2 as third scratch area; we get r2 from PACATOC(r13) */
std r9, HSTATE_HOST_R2(r13)
+
+   lbz r9, HSTATE_IN_GUEST(r13)
+   cmpwi   r9, KVM_GUEST_MODE_HOST_HV
+   beq kvmppc_bad_host_intr
+   /* We're now back in the host but in guest MMU context */
+   li  r9, KVM_GUEST_MODE_HOST_HV
+   stb r9, HSTATE_IN_GUEST(r13)
+
ld  r9, HSTATE_KVM_VCPU(r13)
 
/* Save registers */
@@ -801,10 +812,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
std r3, VCPU_GPR(R13)(r9)
std r4, VCPU_LR(r9)
 
-   /* Unset guest mode */
-   li  r0, KVM_GUEST_MODE_NONE
-   stb r0, HSTATE_IN_GUEST(r13)
-
stw r12,VCPU_TRAP(r9)
 
/* Save HEIR (HV emulation assist reg) in last_inst
@@ -1198,6 +1205,10 @@ BEGIN_FTR_SECTION
mtspr   SPRN_AMR,r6
 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
 
+   /* Unset guest mode */
+   li  r0, KVM_GUEST_MODE_NONE
+   stb r0, HSTATE_IN_GUEST(r13)
+
/* Switch DSCR back to host value */
 BEGIN_FTR_SECTION
mfspr   r8, SPRN_DSCR
@@ -1400,7 +1411,7 @@ fast_interrupt_c_return:
stw r8, VCPU_LAST_INST(r9)
 
/* Unset guest mode. */
-   li  r0, KVM_GUEST_MODE_NONE
+   li  r0, KVM_GUEST_MODE_HOST_HV
stb r0, HSTATE_IN_GUEST(r13)
b   guest_exit_cont
 
@@ -1949,3 +1960,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
lwz r7,VCPU_VRSAVE(r4)
mtspr   SPRN_VRSAVE,r7
blr
+
+/*
+ * We come here if we get any exception or interrupt while we are
+ * executing host real mode code while in guest MMU context.
+ * For now just spin, but we should do something better.
+ */
+kvmppc_bad_host_intr:
+   b   .
-- 
1.8.1.4

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[PULL 14/51] KVM: PPC: Book3S PR: Fix compilation without CONFIG_ALTIVEC

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

Commit 9d1ffdd8f3 (KVM: PPC: Book3S PR: Don't corrupt guest state
when kernel uses VMX) added a call to kvmppc_load_up_altivec() that
isn't guarded by CONFIG_ALTIVEC, causing a link failure when building
a kernel without CONFIG_ALTIVEC set.  This adds an #ifdef to fix this.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/book3s_pr.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index 27db1e6..8d45f18 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -619,8 +619,10 @@ static void kvmppc_handle_lost_ext(struct kvm_vcpu *vcpu)
 
if (lost_ext  MSR_FP)
kvmppc_load_up_fpu();
+#ifdef CONFIG_ALTIVEC
if (lost_ext  MSR_VEC)
kvmppc_load_up_altivec();
+#endif
current-thread.regs-msr |= lost_ext;
 }
 
-- 
1.8.1.4

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[PULL 39/51] kvm: powerpc: book3s: remove kvmppc_handler_highmem label

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

This label is not used now.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/book3s_hv_interrupts.S | 3 ---
 arch/powerpc/kvm/book3s_interrupts.S| 3 ---
 2 files changed, 6 deletions(-)

diff --git a/arch/powerpc/kvm/book3s_hv_interrupts.S 
b/arch/powerpc/kvm/book3s_hv_interrupts.S
index 37f1cc4..928142c 100644
--- a/arch/powerpc/kvm/book3s_hv_interrupts.S
+++ b/arch/powerpc/kvm/book3s_hv_interrupts.S
@@ -158,9 +158,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
  * Interrupts are enabled again at this point.
  */
 
-.global kvmppc_handler_highmem
-kvmppc_handler_highmem:
-
/*
 * Register usage at this point:
 *
diff --git a/arch/powerpc/kvm/book3s_interrupts.S 
b/arch/powerpc/kvm/book3s_interrupts.S
index d4e30d8..38166ab 100644
--- a/arch/powerpc/kvm/book3s_interrupts.S
+++ b/arch/powerpc/kvm/book3s_interrupts.S
@@ -121,9 +121,6 @@ kvm_start_lightweight:
  *
  */
 
-.global kvmppc_handler_highmem
-kvmppc_handler_highmem:
-
/*
 * Register usage at this point:
 *
-- 
1.8.1.4

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[PULL 33/51] powerpc: remove unnecessary line continuations

2013-10-31 Thread Alexander Graf
From: Bharat Bhushan r65...@freescale.com

Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kernel/process.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 6f428da..8eb6e39 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -327,7 +327,7 @@ static void set_debug_reg_defaults(struct thread_struct 
*thread)
/*
 * Force User/Supervisor bits to b11 (user-only MSR[PR]=1)
 */
-   thread-dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US |   \
+   thread-dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US |
DBCR1_IAC3US | DBCR1_IAC4US;
/*
 * Force Data Address Compare User/Supervisor bits to be User-only
-- 
1.8.1.4

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[PULL 25/51] KVM: PPC: Book3S PR: Mark pages accessed, and dirty if being written

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

The mark_page_dirty() function, despite what its name might suggest,
doesn't actually mark the page as dirty as far as the MM subsystem is
concerned.  It merely sets a bit in KVM's map of dirty pages, if
userspace has requested dirty tracking for the relevant memslot.
To tell the MM subsystem that the page is dirty, we have to call
kvm_set_pfn_dirty() (or an equivalent such as SetPageDirty()).

This adds a call to kvm_set_pfn_dirty(), and while we are here, also
adds a call to kvm_set_pfn_accessed() to tell the MM subsystem that
the page has been accessed.  Since we are now using the pfn in
several places, this adds a 'pfn' variable to store it and changes
the places that used hpaddr  PAGE_SHIFT to use pfn instead, which
is the same thing.

This also changes a use of HPTE_R_PP to PP_RXRX.  Both are 3, but
PP_RXRX is more informative as being the read-only page permission
bit setting.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/book3s_64_mmu_host.c | 26 +++---
 1 file changed, 15 insertions(+), 11 deletions(-)

diff --git a/arch/powerpc/kvm/book3s_64_mmu_host.c 
b/arch/powerpc/kvm/book3s_64_mmu_host.c
index 307e6e8..e2ab8a7 100644
--- a/arch/powerpc/kvm/book3s_64_mmu_host.c
+++ b/arch/powerpc/kvm/book3s_64_mmu_host.c
@@ -96,20 +96,21 @@ int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct 
kvmppc_pte *orig_pte,
unsigned long mmu_seq;
struct kvm *kvm = vcpu-kvm;
struct hpte_cache *cpte;
+   unsigned long gfn = orig_pte-raddr  PAGE_SHIFT;
+   unsigned long pfn;
 
/* used to check for invalidations in progress */
mmu_seq = kvm-mmu_notifier_seq;
smp_rmb();
 
/* Get host physical address for gpa */
-   hpaddr = kvmppc_gfn_to_pfn(vcpu, orig_pte-raddr  PAGE_SHIFT,
-  iswrite, writable);
-   if (is_error_noslot_pfn(hpaddr)) {
-   printk(KERN_INFO Couldn't get guest page for gfn %lx!\n, 
orig_pte-eaddr);
+   pfn = kvmppc_gfn_to_pfn(vcpu, gfn, iswrite, writable);
+   if (is_error_noslot_pfn(pfn)) {
+   printk(KERN_INFO Couldn't get guest page for gfn %lx!\n, gfn);
r = -EINVAL;
goto out;
}
-   hpaddr = PAGE_SHIFT;
+   hpaddr = pfn  PAGE_SHIFT;
 
/* and write the mapping ea - hpa into the pt */
vcpu-arch.mmu.esid_to_vsid(vcpu, orig_pte-eaddr  SID_SHIFT, vsid);
@@ -129,15 +130,18 @@ int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct 
kvmppc_pte *orig_pte,
 
vpn = hpt_vpn(orig_pte-eaddr, map-host_vsid, MMU_SEGSIZE_256M);
 
+   kvm_set_pfn_accessed(pfn);
if (!orig_pte-may_write || !writable)
-   rflags |= HPTE_R_PP;
-   else
-   mark_page_dirty(vcpu-kvm, orig_pte-raddr  PAGE_SHIFT);
+   rflags |= PP_RXRX;
+   else {
+   mark_page_dirty(vcpu-kvm, gfn);
+   kvm_set_pfn_dirty(pfn);
+   }
 
if (!orig_pte-may_execute)
rflags |= HPTE_R_N;
else
-   kvmppc_mmu_flush_icache(hpaddr  PAGE_SHIFT);
+   kvmppc_mmu_flush_icache(pfn);
 
/*
 * Use 64K pages if possible; otherwise, on 64K page kernels,
@@ -191,7 +195,7 @@ map_again:
cpte-slot = hpteg + (ret  7);
cpte-host_vpn = vpn;
cpte-pte = *orig_pte;
-   cpte-pfn = hpaddr  PAGE_SHIFT;
+   cpte-pfn = pfn;
cpte-pagesize = hpsize;
 
kvmppc_mmu_hpte_cache_map(vcpu, cpte);
@@ -200,7 +204,7 @@ map_again:
 
 out_unlock:
spin_unlock(kvm-mmu_lock);
-   kvm_release_pfn_clean(hpaddr  PAGE_SHIFT);
+   kvm_release_pfn_clean(pfn);
if (cpte)
kvmppc_mmu_hpte_cache_free(cpte);
 
-- 
1.8.1.4

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[PULL 26/51] KVM: PPC: Book3S PR: Reduce number of shadow PTEs invalidated by MMU notifiers

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

Currently, whenever any of the MMU notifier callbacks get called, we
invalidate all the shadow PTEs.  This is inefficient because it means
that we typically then get a lot of DSIs and ISIs in the guest to fault
the shadow PTEs back in.  We do this even if the address range being
notified doesn't correspond to guest memory.

This commit adds code to scan the memslot array to find out what range(s)
of guest physical addresses corresponds to the host virtual address range
being affected.  For each such range we flush only the shadow PTEs
for the range, on all cpus.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/book3s_pr.c | 40 
 1 file changed, 32 insertions(+), 8 deletions(-)

diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index 2f84ed8..6075dbd 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -150,24 +150,48 @@ int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
 }
 
 /* MMU Notifiers */
+static void do_kvm_unmap_hva(struct kvm *kvm, unsigned long start,
+unsigned long end)
+{
+   long i;
+   struct kvm_vcpu *vcpu;
+   struct kvm_memslots *slots;
+   struct kvm_memory_slot *memslot;
+
+   slots = kvm_memslots(kvm);
+   kvm_for_each_memslot(memslot, slots) {
+   unsigned long hva_start, hva_end;
+   gfn_t gfn, gfn_end;
+
+   hva_start = max(start, memslot-userspace_addr);
+   hva_end = min(end, memslot-userspace_addr +
+   (memslot-npages  PAGE_SHIFT));
+   if (hva_start = hva_end)
+   continue;
+   /*
+* {gfn(page) | page intersects with [hva_start, hva_end)} =
+* {gfn, gfn+1, ..., gfn_end-1}.
+*/
+   gfn = hva_to_gfn_memslot(hva_start, memslot);
+   gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
+   kvm_for_each_vcpu(i, vcpu, kvm)
+   kvmppc_mmu_pte_pflush(vcpu, gfn  PAGE_SHIFT,
+ gfn_end  PAGE_SHIFT);
+   }
+}
 
 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
 {
trace_kvm_unmap_hva(hva);
 
-   /*
-* Flush all shadow tlb entries everywhere. This is slow, but
-* we are 100% sure that we catch the to be unmapped page
-*/
-   kvm_flush_remote_tlbs(kvm);
+   do_kvm_unmap_hva(kvm, hva, hva + PAGE_SIZE);
 
return 0;
 }
 
 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long 
end)
 {
-   /* kvm_unmap_hva flushes everything anyways */
-   kvm_unmap_hva(kvm, start);
+   do_kvm_unmap_hva(kvm, start, end);
 
return 0;
 }
@@ -187,7 +211,7 @@ int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
 {
/* The page will get remapped properly on its next fault */
-   kvm_unmap_hva(kvm, hva);
+   do_kvm_unmap_hva(kvm, hva, hva + PAGE_SIZE);
 }
 
 /*/
-- 
1.8.1.4

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[PULL 21/51] KVM: PPC: Book3S PR: Allocate kvm_vcpu structs from kvm_vcpu_cache

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

This makes PR KVM allocate its kvm_vcpu structs from the kvm_vcpu_cache
rather than having them embedded in the kvmppc_vcpu_book3s struct,
which is allocated with vzalloc.  The reason is to reduce the
differences between PR and HV KVM in order to make is easier to have
them coexist in one kernel binary.

With this, the kvm_vcpu struct has a pointer to the kvmppc_vcpu_book3s
struct.  The pointer to the kvmppc_book3s_shadow_vcpu struct has moved
from the kvmppc_vcpu_book3s struct to the kvm_vcpu struct, and is only
present for 32-bit, since it is only used for 32-bit.

Signed-off-by: Paul Mackerras pau...@samba.org
[agraf: squash in compile fix from Aneesh]
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_book3s.h|  4 +---
 arch/powerpc/include/asm/kvm_book3s_32.h |  2 +-
 arch/powerpc/include/asm/kvm_host.h  |  7 +++
 arch/powerpc/kvm/book3s_32_mmu.c |  8 
 arch/powerpc/kvm/book3s_64_mmu.c | 11 +--
 arch/powerpc/kvm/book3s_pr.c | 33 
 6 files changed, 39 insertions(+), 26 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_book3s.h 
b/arch/powerpc/include/asm/kvm_book3s.h
index 6bf20b4..603fba4 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -70,8 +70,6 @@ struct hpte_cache {
 };
 
 struct kvmppc_vcpu_book3s {
-   struct kvm_vcpu vcpu;
-   struct kvmppc_book3s_shadow_vcpu *shadow_vcpu;
struct kvmppc_sid_map sid_map[SID_MAP_NUM];
struct {
u64 esid;
@@ -194,7 +192,7 @@ extern int kvmppc_h_pr(struct kvm_vcpu *vcpu, unsigned long 
cmd);
 
 static inline struct kvmppc_vcpu_book3s *to_book3s(struct kvm_vcpu *vcpu)
 {
-   return container_of(vcpu, struct kvmppc_vcpu_book3s, vcpu);
+   return vcpu-arch.book3s;
 }
 
 extern void kvm_return_point(void);
diff --git a/arch/powerpc/include/asm/kvm_book3s_32.h 
b/arch/powerpc/include/asm/kvm_book3s_32.h
index ce0ef6c..c720e0b 100644
--- a/arch/powerpc/include/asm/kvm_book3s_32.h
+++ b/arch/powerpc/include/asm/kvm_book3s_32.h
@@ -22,7 +22,7 @@
 
 static inline struct kvmppc_book3s_shadow_vcpu *svcpu_get(struct kvm_vcpu 
*vcpu)
 {
-   return to_book3s(vcpu)-shadow_vcpu;
+   return vcpu-arch.shadow_vcpu;
 }
 
 static inline void svcpu_put(struct kvmppc_book3s_shadow_vcpu *svcpu)
diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index 0fe4872..404dbc8 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -86,6 +86,9 @@ struct lppaca;
 struct slb_shadow;
 struct dtl_entry;
 
+struct kvmppc_vcpu_book3s;
+struct kvmppc_book3s_shadow_vcpu;
+
 struct kvm_vm_stat {
u32 remote_tlb_flush;
 };
@@ -408,6 +411,10 @@ struct kvm_vcpu_arch {
int slb_max;/* 1 + index of last valid entry in slb[] */
int slb_nr; /* total number of entries in SLB */
struct kvmppc_mmu mmu;
+   struct kvmppc_vcpu_book3s *book3s;
+#endif
+#ifdef CONFIG_PPC_BOOK3S_32
+   struct kvmppc_book3s_shadow_vcpu *shadow_vcpu;
 #endif
 
ulong gpr[32];
diff --git a/arch/powerpc/kvm/book3s_32_mmu.c b/arch/powerpc/kvm/book3s_32_mmu.c
index 856af98..b14af6d 100644
--- a/arch/powerpc/kvm/book3s_32_mmu.c
+++ b/arch/powerpc/kvm/book3s_32_mmu.c
@@ -111,10 +111,11 @@ static void kvmppc_mmu_book3s_32_reset_msr(struct 
kvm_vcpu *vcpu)
kvmppc_set_msr(vcpu, 0);
 }
 
-static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvmppc_vcpu_book3s 
*vcpu_book3s,
+static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvm_vcpu *vcpu,
  u32 sre, gva_t eaddr,
  bool primary)
 {
+   struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
u32 page, hash, pteg, htabmask;
hva_t r;
 
@@ -132,7 +133,7 @@ static hva_t kvmppc_mmu_book3s_32_get_pteg(struct 
kvmppc_vcpu_book3s *vcpu_book3
kvmppc_get_pc(vcpu_book3s-vcpu), eaddr, vcpu_book3s-sdr1, 
pteg,
sr_vsid(sre));
 
-   r = gfn_to_hva(vcpu_book3s-vcpu.kvm, pteg  PAGE_SHIFT);
+   r = gfn_to_hva(vcpu-kvm, pteg  PAGE_SHIFT);
if (kvm_is_error_hva(r))
return r;
return r | (pteg  ~PAGE_MASK);
@@ -203,7 +204,6 @@ static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu 
*vcpu, gva_t eaddr,
 struct kvmppc_pte *pte, bool data,
 bool primary)
 {
-   struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
u32 sre;
hva_t ptegp;
u32 pteg[16];
@@ -218,7 +218,7 @@ static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu 
*vcpu, gva_t eaddr,
 
pte-vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
 
-   ptegp = kvmppc_mmu_book3s_32_get_pteg(vcpu_book3s, sre, eaddr, primary);
+   ptegp = kvmppc_mmu_book3s_32_get_pteg(vcpu, 

[PULL 22/51] KVM: PPC: Book3S: Move skip-interrupt handlers to common code

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

Both PR and HV KVM have separate, identical copies of the
kvmppc_skip_interrupt and kvmppc_skip_Hinterrupt handlers that are
used for the situation where an interrupt happens when loading the
instruction that caused an exit from the guest.  To eliminate this
duplication and make it easier to compile in both PR and HV KVM,
this moves this code to arch/powerpc/kernel/exceptions-64s.S along
with other kernel interrupt handler code.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kernel/exceptions-64s.S| 26 ++
 arch/powerpc/kvm/book3s_hv_rmhandlers.S | 24 
 arch/powerpc/kvm/book3s_rmhandlers.S| 26 --
 3 files changed, 26 insertions(+), 50 deletions(-)

diff --git a/arch/powerpc/kernel/exceptions-64s.S 
b/arch/powerpc/kernel/exceptions-64s.S
index 3a9ed6a..2a273be 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -650,6 +650,32 @@ slb_miss_user_pseries:
b   .   /* prevent spec. execution */
 #endif /* __DISABLED__ */
 
+#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
+kvmppc_skip_interrupt:
+   /*
+* Here all GPRs are unchanged from when the interrupt happened
+* except for r13, which is saved in SPRG_SCRATCH0.
+*/
+   mfspr   r13, SPRN_SRR0
+   addir13, r13, 4
+   mtspr   SPRN_SRR0, r13
+   GET_SCRATCH0(r13)
+   rfid
+   b   .
+
+kvmppc_skip_Hinterrupt:
+   /*
+* Here all GPRs are unchanged from when the interrupt happened
+* except for r13, which is saved in SPRG_SCRATCH0.
+*/
+   mfspr   r13, SPRN_HSRR0
+   addir13, r13, 4
+   mtspr   SPRN_HSRR0, r13
+   GET_SCRATCH0(r13)
+   hrfid
+   b   .
+#endif
+
 /*
  * Code from here down to __end_handlers is invoked from the
  * exception prologs above.  Because the prologs assemble the
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S 
b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index cd39632..6e3370f 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -33,30 +33,6 @@
 #error Need to fix lppaca and SLB shadow accesses in little endian mode
 #endif
 
-/*
- *   *
- *Real Mode handlers that need to be in the linear mapping   *
- *   *
- /
-
-   .globl  kvmppc_skip_interrupt
-kvmppc_skip_interrupt:
-   mfspr   r13,SPRN_SRR0
-   addir13,r13,4
-   mtspr   SPRN_SRR0,r13
-   GET_SCRATCH0(r13)
-   rfid
-   b   .
-
-   .globl  kvmppc_skip_Hinterrupt
-kvmppc_skip_Hinterrupt:
-   mfspr   r13,SPRN_HSRR0
-   addir13,r13,4
-   mtspr   SPRN_HSRR0,r13
-   GET_SCRATCH0(r13)
-   hrfid
-   b   .
-
 /*
  * Call kvmppc_hv_entry in real mode.
  * Must be called with interrupts hard-disabled.
diff --git a/arch/powerpc/kvm/book3s_rmhandlers.S 
b/arch/powerpc/kvm/book3s_rmhandlers.S
index cd59a3a..a38c4c9 100644
--- a/arch/powerpc/kvm/book3s_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_rmhandlers.S
@@ -38,32 +38,6 @@
 
 #define FUNC(name) GLUE(.,name)
 
-   .globl  kvmppc_skip_interrupt
-kvmppc_skip_interrupt:
-   /*
-* Here all GPRs are unchanged from when the interrupt happened
-* except for r13, which is saved in SPRG_SCRATCH0.
-*/
-   mfspr   r13, SPRN_SRR0
-   addir13, r13, 4
-   mtspr   SPRN_SRR0, r13
-   GET_SCRATCH0(r13)
-   rfid
-   b   .
-
-   .globl  kvmppc_skip_Hinterrupt
-kvmppc_skip_Hinterrupt:
-   /*
-* Here all GPRs are unchanged from when the interrupt happened
-* except for r13, which is saved in SPRG_SCRATCH0.
-*/
-   mfspr   r13, SPRN_HSRR0
-   addir13, r13, 4
-   mtspr   SPRN_HSRR0, r13
-   GET_SCRATCH0(r13)
-   hrfid
-   b   .
-
 #elif defined(CONFIG_PPC_BOOK3S_32)
 
 #define FUNC(name) name
-- 
1.8.1.4

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[PULL 40/51] kvm: powerpc: book3s: move book3s_64_vio_hv.c into the main kernel binary

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

Since the code in book3s_64_vio_hv.c is called from real mode with HV
KVM, and therefore has to be built into the main kernel binary, this
makes it always built-in rather than part of the KVM module.  It gets
called from the KVM module by PR KVM, so this adds an EXPORT_SYMBOL_GPL().

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/Makefile   | 12 
 arch/powerpc/kvm/book3s_64_vio_hv.c |  1 +
 2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/kvm/Makefile b/arch/powerpc/kvm/Makefile
index 6646c95..104e8dc 100644
--- a/arch/powerpc/kvm/Makefile
+++ b/arch/powerpc/kvm/Makefile
@@ -53,32 +53,36 @@ kvm-e500mc-objs := \
e500_emulate.o
 kvm-objs-$(CONFIG_KVM_E500MC) := $(kvm-e500mc-objs)
 
+kvm-book3s_64-builtin-objs-$(CONFIG_KVM_BOOK3S_64_HANDLER) := \
+   book3s_64_vio_hv.o
+
 kvm-book3s_64-objs-$(CONFIG_KVM_BOOK3S_64_PR) := \
$(KVM)/coalesced_mmio.o \
fpu.o \
book3s_paired_singles.o \
book3s_pr.o \
book3s_pr_papr.o \
-   book3s_64_vio_hv.o \
book3s_emulate.o \
book3s_interrupts.o \
book3s_mmu_hpte.o \
book3s_64_mmu_host.o \
book3s_64_mmu.o \
book3s_32_mmu.o
-kvm-book3s_64-builtin-objs-$(CONFIG_KVM_BOOK3S_64_PR) := \
+
+kvm-book3s_64-builtin-objs-$(CONFIG_KVM_BOOK3S_64_PR) += \
book3s_rmhandlers.o
 
 kvm-book3s_64-objs-$(CONFIG_KVM_BOOK3S_64_HV) := \
book3s_hv.o \
book3s_hv_interrupts.o \
book3s_64_mmu_hv.o
+
 kvm-book3s_64-builtin-xics-objs-$(CONFIG_KVM_XICS) := \
book3s_hv_rm_xics.o
-kvm-book3s_64-builtin-objs-$(CONFIG_KVM_BOOK3S_64_HV) := \
+
+kvm-book3s_64-builtin-objs-$(CONFIG_KVM_BOOK3S_64_HV) += \
book3s_hv_rmhandlers.o \
book3s_hv_rm_mmu.o \
-   book3s_64_vio_hv.o \
book3s_hv_ras.o \
book3s_hv_builtin.o \
book3s_hv_cma.o \
diff --git a/arch/powerpc/kvm/book3s_64_vio_hv.c 
b/arch/powerpc/kvm/book3s_64_vio_hv.c
index 30c2f3b..2c25f54 100644
--- a/arch/powerpc/kvm/book3s_64_vio_hv.c
+++ b/arch/powerpc/kvm/book3s_64_vio_hv.c
@@ -74,3 +74,4 @@ long kvmppc_h_put_tce(struct kvm_vcpu *vcpu, unsigned long 
liobn,
/* Didn't find the liobn, punt it to userspace */
return H_TOO_HARD;
 }
+EXPORT_SYMBOL_GPL(kvmppc_h_put_tce);
-- 
1.8.1.4

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[PULL 30/51] kvm: powerpc: allow guest control E attribute in mas2

2013-10-31 Thread Alexander Graf
From: Bharat Bhushan r65...@freescale.com

E bit in MAS2 bit indicates whether the page is accessed
in Little-Endian or Big-Endian byte order.
There is no reason to stop guest setting  E, so allow him.

Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/e500.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/kvm/e500.h b/arch/powerpc/kvm/e500.h
index c2e5e98..277cb18 100644
--- a/arch/powerpc/kvm/e500.h
+++ b/arch/powerpc/kvm/e500.h
@@ -117,7 +117,7 @@ static inline struct kvmppc_vcpu_e500 *to_e500(struct 
kvm_vcpu *vcpu)
 #define E500_TLB_USER_PERM_MASK (MAS3_UX|MAS3_UR|MAS3_UW)
 #define E500_TLB_SUPER_PERM_MASK (MAS3_SX|MAS3_SR|MAS3_SW)
 #define MAS2_ATTRIB_MASK \
- (MAS2_X0 | MAS2_X1)
+ (MAS2_X0 | MAS2_X1 | MAS2_E)
 #define MAS3_ATTRIB_MASK \
  (MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3 \
   | E500_TLB_USER_PERM_MASK | E500_TLB_SUPER_PERM_MASK)
-- 
1.8.1.4

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[PULL 02/51] KVM: PPC: Book3S HV: Save/restore SIAR and SDAR along with other PMU registers

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

Currently we are not saving and restoring the SIAR and SDAR registers in
the PMU (performance monitor unit) on guest entry and exit.  The result
is that performance monitoring tools in the guest could get false
information about where a program was executing and what data it was
accessing at the time of a performance monitor interrupt.  This fixes
it by saving and restoring these registers along with the other PMU
registers on guest entry/exit.

This also provides a way for userspace to access these values for a
vcpu via the one_reg interface.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_host.h |  2 ++
 arch/powerpc/kernel/asm-offsets.c   |  2 ++
 arch/powerpc/kvm/book3s_hv.c| 12 
 arch/powerpc/kvm/book3s_hv_rmhandlers.S |  8 
 4 files changed, 24 insertions(+)

diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index 0866230..d9b21af 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -493,6 +493,8 @@ struct kvm_vcpu_arch {
 
u64 mmcr[3];
u32 pmc[8];
+   u64 siar;
+   u64 sdar;
 
 #ifdef CONFIG_KVM_EXIT_TIMING
struct mutex exit_timing_lock;
diff --git a/arch/powerpc/kernel/asm-offsets.c 
b/arch/powerpc/kernel/asm-offsets.c
index d8958be..19e699d 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -508,6 +508,8 @@ int main(void)
DEFINE(VCPU_PRODDED, offsetof(struct kvm_vcpu, arch.prodded));
DEFINE(VCPU_MMCR, offsetof(struct kvm_vcpu, arch.mmcr));
DEFINE(VCPU_PMC, offsetof(struct kvm_vcpu, arch.pmc));
+   DEFINE(VCPU_SIAR, offsetof(struct kvm_vcpu, arch.siar));
+   DEFINE(VCPU_SDAR, offsetof(struct kvm_vcpu, arch.sdar));
DEFINE(VCPU_SLB, offsetof(struct kvm_vcpu, arch.slb));
DEFINE(VCPU_SLB_MAX, offsetof(struct kvm_vcpu, arch.slb_max));
DEFINE(VCPU_SLB_NR, offsetof(struct kvm_vcpu, arch.slb_nr));
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 62a2b5a..45a9b87 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -749,6 +749,12 @@ int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, 
union kvmppc_one_reg *val)
i = id - KVM_REG_PPC_PMC1;
*val = get_reg_val(id, vcpu-arch.pmc[i]);
break;
+   case KVM_REG_PPC_SIAR:
+   *val = get_reg_val(id, vcpu-arch.siar);
+   break;
+   case KVM_REG_PPC_SDAR:
+   *val = get_reg_val(id, vcpu-arch.sdar);
+   break;
 #ifdef CONFIG_VSX
case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
if (cpu_has_feature(CPU_FTR_VSX)) {
@@ -833,6 +839,12 @@ int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, 
union kvmppc_one_reg *val)
i = id - KVM_REG_PPC_PMC1;
vcpu-arch.pmc[i] = set_reg_val(id, *val);
break;
+   case KVM_REG_PPC_SIAR:
+   vcpu-arch.siar = set_reg_val(id, *val);
+   break;
+   case KVM_REG_PPC_SDAR:
+   vcpu-arch.sdar = set_reg_val(id, *val);
+   break;
 #ifdef CONFIG_VSX
case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
if (cpu_has_feature(CPU_FTR_VSX)) {
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S 
b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 294b7af..541aea0 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -200,8 +200,12 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
ld  r3, VCPU_MMCR(r4)
ld  r5, VCPU_MMCR + 8(r4)
ld  r6, VCPU_MMCR + 16(r4)
+   ld  r7, VCPU_SIAR(r4)
+   ld  r8, VCPU_SDAR(r4)
mtspr   SPRN_MMCR1, r5
mtspr   SPRN_MMCRA, r6
+   mtspr   SPRN_SIAR, r7
+   mtspr   SPRN_SDAR, r8
mtspr   SPRN_MMCR0, r3
isync
 
@@ -1134,9 +1138,13 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
std r3, VCPU_MMCR(r9)   /* if not, set saved MMCR0 to FC */
b   22f
 21:mfspr   r5, SPRN_MMCR1
+   mfspr   r7, SPRN_SIAR
+   mfspr   r8, SPRN_SDAR
std r4, VCPU_MMCR(r9)
std r5, VCPU_MMCR + 8(r9)
std r6, VCPU_MMCR + 16(r9)
+   std r7, VCPU_SIAR(r9)
+   std r8, VCPU_SDAR(r9)
mfspr   r3, SPRN_PMC1
mfspr   r4, SPRN_PMC2
mfspr   r5, SPRN_PMC3
-- 
1.8.1.4

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[PULL 11/51] KVM: PPC: Book3S HV: Add support for guest Program Priority Register

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

POWER7 and later IBM server processors have a register called the
Program Priority Register (PPR), which controls the priority of
each hardware CPU SMT thread, and affects how fast it runs compared
to other SMT threads.  This priority can be controlled by writing to
the PPR or by use of a set of instructions of the form or rN,rN,rN
which are otherwise no-ops but have been defined to set the priority
to particular levels.

This adds code to context switch the PPR when entering and exiting
guests and to make the PPR value accessible through the SET/GET_ONE_REG
interface.  When entering the guest, we set the PPR as late as
possible, because if we are setting a low thread priority it will
make the code run slowly from that point on.  Similarly, the
first-level interrupt handlers save the PPR value in the PACA very
early on, and set the thread priority to the medium level, so that
the interrupt handling code runs at a reasonable speed.

Acked-by: Benjamin Herrenschmidt b...@kernel.crashing.org
Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 Documentation/virtual/kvm/api.txt |  1 +
 arch/powerpc/include/asm/exception-64s.h  |  8 
 arch/powerpc/include/asm/kvm_book3s_asm.h |  1 +
 arch/powerpc/include/asm/kvm_host.h   |  1 +
 arch/powerpc/include/uapi/asm/kvm.h   |  1 +
 arch/powerpc/kernel/asm-offsets.c |  2 ++
 arch/powerpc/kvm/book3s_hv.c  |  6 ++
 arch/powerpc/kvm/book3s_hv_rmhandlers.S   | 12 +++-
 8 files changed, 31 insertions(+), 1 deletion(-)

diff --git a/Documentation/virtual/kvm/api.txt 
b/Documentation/virtual/kvm/api.txt
index 387f4c7..a9d1072 100644
--- a/Documentation/virtual/kvm/api.txt
+++ b/Documentation/virtual/kvm/api.txt
@@ -1836,6 +1836,7 @@ registers, find a list below:
   PPC   | KVM_REG_PPC_ACOP | 64
   PPC   | KVM_REG_PPC_VRSAVE   | 32
   PPC   | KVM_REG_PPC_LPCR | 64
+  PPC   | KVM_REG_PPC_PPR  | 64
   PPC   | KVM_REG_PPC_TM_GPR0  | 64
   ...
   PPC   | KVM_REG_PPC_TM_GPR31 | 64
diff --git a/arch/powerpc/include/asm/exception-64s.h 
b/arch/powerpc/include/asm/exception-64s.h
index cca12f0..402c1c4 100644
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -204,6 +204,10 @@ do_kvm_##n:
\
ld  r10,area+EX_CFAR(r13);  \
std r10,HSTATE_CFAR(r13);   \
END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947);  \
+   BEGIN_FTR_SECTION_NESTED(948)   \
+   ld  r10,area+EX_PPR(r13);   \
+   std r10,HSTATE_PPR(r13);\
+   END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948);\
ld  r10,area+EX_R10(r13);   \
stw r9,HSTATE_SCRATCH1(r13);\
ld  r9,area+EX_R9(r13); \
@@ -217,6 +221,10 @@ do_kvm_##n:
\
ld  r10,area+EX_R10(r13);   \
beq 89f;\
stw r9,HSTATE_SCRATCH1(r13);\
+   BEGIN_FTR_SECTION_NESTED(948)   \
+   ld  r9,area+EX_PPR(r13);\
+   std r9,HSTATE_PPR(r13); \
+   END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948);\
ld  r9,area+EX_R9(r13); \
std r12,HSTATE_SCRATCH0(r13);   \
li  r12,n;  \
diff --git a/arch/powerpc/include/asm/kvm_book3s_asm.h 
b/arch/powerpc/include/asm/kvm_book3s_asm.h
index 9039d3c..22f4606 100644
--- a/arch/powerpc/include/asm/kvm_book3s_asm.h
+++ b/arch/powerpc/include/asm/kvm_book3s_asm.h
@@ -101,6 +101,7 @@ struct kvmppc_host_state {
 #endif
 #ifdef CONFIG_PPC_BOOK3S_64
u64 cfar;
+   u64 ppr;
 #endif
 };
 
diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index 6eabffc..4934e13 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -460,6 +460,7 @@ struct kvm_vcpu_arch {
u32 ctrl;
ulong dabr;
ulong cfar;
+   ulong ppr;
 #endif
u32 vrsave; /* also USPRG0 */
u32 mmucr;
diff --git a/arch/powerpc/include/uapi/asm/kvm.h 
b/arch/powerpc/include/uapi/asm/kvm.h
index e42127d..fab6bc1 100644
--- a/arch/powerpc/include/uapi/asm/kvm.h
+++ b/arch/powerpc/include/uapi/asm/kvm.h
@@ -534,6 +534,7 @@ struct kvm_get_htab_header {
 
 #define 

[PULL 13/51] KVM: PPC: Book3S HV: Don't crash host on unknown guest interrupt

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

If we come out of a guest with an interrupt that we don't know about,
instead of crashing the host with a BUG(), we now return to userspace
with the exit reason set to KVM_EXIT_UNKNOWN and the trap vector in
the hw.hardware_exit_reason field of the kvm_run structure, as is done
on x86.  Note that run-exit_reason is already set to KVM_EXIT_UNKNOWN
at the beginning of kvmppc_handle_exit().

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/book3s_hv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index e42fb54..de9520f 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -709,8 +709,8 @@ static int kvmppc_handle_exit(struct kvm_run *run, struct 
kvm_vcpu *vcpu,
printk(KERN_EMERG trap=0x%x | pc=0x%lx | msr=0x%llx\n,
vcpu-arch.trap, kvmppc_get_pc(vcpu),
vcpu-arch.shregs.msr);
+   run-hw.hardware_exit_reason = vcpu-arch.trap;
r = RESUME_HOST;
-   BUG();
break;
}
 
-- 
1.8.1.4

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[PULL 06/51] KVM: PPC: Book3S HV: Restructure kvmppc_hv_entry to be a subroutine

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

We have two paths into and out of the low-level guest entry and exit
code: from a vcpu task via kvmppc_hv_entry_trampoline, and from the
system reset vector for an offline secondary thread on POWER7 via
kvm_start_guest.  Currently both just branch to kvmppc_hv_entry to
enter the guest, and on guest exit, we test the vcpu physical thread
ID to detect which way we came in and thus whether we should return
to the vcpu task or go back to nap mode.

In order to make the code flow clearer, and to keep the code relating
to each flow together, this turns kvmppc_hv_entry into a subroutine
that follows the normal conventions for call and return.  This means
that kvmppc_hv_entry_trampoline() and kvmppc_hv_entry() now establish
normal stack frames, and we use the normal stack slots for saving
return addresses rather than local_paca-kvm_hstate.vmhandler.  Apart
from that this is mostly moving code around unchanged.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/book3s_hv_rmhandlers.S | 344 +---
 1 file changed, 178 insertions(+), 166 deletions(-)

diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S 
b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 82b06df..2bf2951 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -66,8 +66,11 @@ kvmppc_skip_Hinterrupt:
  * LR = return address to continue at after eventually re-enabling MMU
  */
 _GLOBAL(kvmppc_hv_entry_trampoline)
+   mflrr0
+   std r0, PPC_LR_STKOFF(r1)
+   stdur1, -112(r1)
mfmsr   r10
-   LOAD_REG_ADDR(r5, kvmppc_hv_entry)
+   LOAD_REG_ADDR(r5, kvmppc_call_hv_entry)
li  r0,MSR_RI
andcr0,r10,r0
li  r6,MSR_IR | MSR_DR
@@ -77,11 +80,103 @@ _GLOBAL(kvmppc_hv_entry_trampoline)
mtsrr1  r6
RFI
 
-/**
- **
- *   Entry code   *
- **
- */
+kvmppc_call_hv_entry:
+   bl  kvmppc_hv_entry
+
+   /* Back from guest - restore host state and return to caller */
+
+   /* Restore host DABR and DABRX */
+   ld  r5,HSTATE_DABR(r13)
+   li  r6,7
+   mtspr   SPRN_DABR,r5
+   mtspr   SPRN_DABRX,r6
+
+   /* Restore SPRG3 */
+   ld  r3,PACA_SPRG3(r13)
+   mtspr   SPRN_SPRG3,r3
+
+   /*
+* Reload DEC.  HDEC interrupts were disabled when
+* we reloaded the host's LPCR value.
+*/
+   ld  r3, HSTATE_DECEXP(r13)
+   mftbr4
+   subfr4, r4, r3
+   mtspr   SPRN_DEC, r4
+
+   /* Reload the host's PMU registers */
+   ld  r3, PACALPPACAPTR(r13)  /* is the host using the PMU? */
+   lbz r4, LPPACA_PMCINUSE(r3)
+   cmpwi   r4, 0
+   beq 23f /* skip if not */
+   lwz r3, HSTATE_PMC(r13)
+   lwz r4, HSTATE_PMC + 4(r13)
+   lwz r5, HSTATE_PMC + 8(r13)
+   lwz r6, HSTATE_PMC + 12(r13)
+   lwz r8, HSTATE_PMC + 16(r13)
+   lwz r9, HSTATE_PMC + 20(r13)
+BEGIN_FTR_SECTION
+   lwz r10, HSTATE_PMC + 24(r13)
+   lwz r11, HSTATE_PMC + 28(r13)
+END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
+   mtspr   SPRN_PMC1, r3
+   mtspr   SPRN_PMC2, r4
+   mtspr   SPRN_PMC3, r5
+   mtspr   SPRN_PMC4, r6
+   mtspr   SPRN_PMC5, r8
+   mtspr   SPRN_PMC6, r9
+BEGIN_FTR_SECTION
+   mtspr   SPRN_PMC7, r10
+   mtspr   SPRN_PMC8, r11
+END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
+   ld  r3, HSTATE_MMCR(r13)
+   ld  r4, HSTATE_MMCR + 8(r13)
+   ld  r5, HSTATE_MMCR + 16(r13)
+   mtspr   SPRN_MMCR1, r4
+   mtspr   SPRN_MMCRA, r5
+   mtspr   SPRN_MMCR0, r3
+   isync
+23:
+
+   /*
+* For external and machine check interrupts, we need
+* to call the Linux handler to process the interrupt.
+* We do that by jumping to absolute address 0x500 for
+* external interrupts, or the machine_check_fwnmi label
+* for machine checks (since firmware might have patched
+* the vector area at 0x200).  The [h]rfid at the end of the
+* handler will return to the book3s_hv_interrupts.S code.
+* For other interrupts we do the rfid to get back
+* to the book3s_hv_interrupts.S code here.
+*/
+   ld  r8, 112+PPC_LR_STKOFF(r1)
+   addir1, r1, 112
+   ld  r7, HSTATE_HOST_MSR(r13)
+
+   cmpwi   cr1, r12, BOOK3S_INTERRUPT_MACHINE_CHECK
+   cmpwi   r12, BOOK3S_INTERRUPT_EXTERNAL
+BEGIN_FTR_SECTION
+   beq 11f

[PULL 03/51] KVM: PPC: Book3S HV: Implement timebase offset for guests

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

This allows guests to have a different timebase origin from the host.
This is needed for migration, where a guest can migrate from one host
to another and the two hosts might have a different timebase origin.
However, the timebase seen by the guest must not go backwards, and
should go forwards only by a small amount corresponding to the time
taken for the migration.

Therefore this provides a new per-vcpu value accessed via the one_reg
interface using the new KVM_REG_PPC_TB_OFFSET identifier.  This value
defaults to 0 and is not modified by KVM.  On entering the guest, this
value is added onto the timebase, and on exiting the guest, it is
subtracted from the timebase.

This is only supported for recent POWER hardware which has the TBU40
(timebase upper 40 bits) register.  Writing to the TBU40 register only
alters the upper 40 bits of the timebase, leaving the lower 24 bits
unchanged.  This provides a way to modify the timebase for guest
migration without disturbing the synchronization of the timebase
registers across CPU cores.  The kernel rounds up the value given
to a multiple of 2^24.

Timebase values stored in KVM structures (struct kvm_vcpu, struct
kvmppc_vcore, etc.) are stored as host timebase values.  The timebase
values in the dispatch trace log need to be guest timebase values,
however, since that is read directly by the guest.  This moves the
setting of vcpu-arch.dec_expires on guest exit to a point after we
have restored the host timebase so that vcpu-arch.dec_expires is a
host timebase value.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 Documentation/virtual/kvm/api.txt   |  1 +
 arch/powerpc/include/asm/kvm_host.h |  1 +
 arch/powerpc/include/asm/reg.h  |  1 +
 arch/powerpc/include/uapi/asm/kvm.h |  3 ++
 arch/powerpc/kernel/asm-offsets.c   |  1 +
 arch/powerpc/kvm/book3s_hv.c| 10 ++-
 arch/powerpc/kvm/book3s_hv_rmhandlers.S | 50 +++--
 7 files changed, 57 insertions(+), 10 deletions(-)

diff --git a/Documentation/virtual/kvm/api.txt 
b/Documentation/virtual/kvm/api.txt
index 354a51b..e43c6f1 100644
--- a/Documentation/virtual/kvm/api.txt
+++ b/Documentation/virtual/kvm/api.txt
@@ -1810,6 +1810,7 @@ registers, find a list below:
   PPC   | KVM_REG_PPC_TLB3PS   | 32
   PPC   | KVM_REG_PPC_EPTCFG   | 32
   PPC   | KVM_REG_PPC_ICP_STATE | 64
+  PPC   | KVM_REG_PPC_TB_OFFSET| 64
   PPC   | KVM_REG_PPC_SPMC1| 32
   PPC   | KVM_REG_PPC_SPMC2| 32
   PPC   | KVM_REG_PPC_IAMR | 64
diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index d9b21af..e4d67a6 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -289,6 +289,7 @@ struct kvmppc_vcore {
u64 stolen_tb;
u64 preempt_tb;
struct kvm_vcpu *runner;
+   u64 tb_offset;  /* guest timebase - host timebase */
 };
 
 #define VCORE_ENTRY_COUNT(vc)  ((vc)-entry_exit_count  0xff)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 10d1ef0..fd4db15 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -243,6 +243,7 @@
 #define SPRN_TBRU  0x10D   /* Time Base Read Upper Register (user, R/O) */
 #define SPRN_TBWL  0x11C   /* Time Base Lower Register (super, R/W) */
 #define SPRN_TBWU  0x11D   /* Time Base Upper Register (super, R/W) */
+#define SPRN_TBU40 0x11E   /* Timebase upper 40 bits (hyper, R/W) */
 #define SPRN_SPURR 0x134   /* Scaled PURR */
 #define SPRN_HSPRG00x130   /* Hypervisor Scratch 0 */
 #define SPRN_HSPRG10x131   /* Hypervisor Scratch 1 */
diff --git a/arch/powerpc/include/uapi/asm/kvm.h 
b/arch/powerpc/include/uapi/asm/kvm.h
index 7ed41c0..a8124fe 100644
--- a/arch/powerpc/include/uapi/asm/kvm.h
+++ b/arch/powerpc/include/uapi/asm/kvm.h
@@ -504,6 +504,9 @@ struct kvm_get_htab_header {
 #define KVM_REG_PPC_TLB3PS (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x9a)
 #define KVM_REG_PPC_EPTCFG (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x9b)
 
+/* Timebase offset */
+#define KVM_REG_PPC_TB_OFFSET  (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x9c)
+
 /* POWER8 registers */
 #define KVM_REG_PPC_SPMC1  (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x9d)
 #define KVM_REG_PPC_SPMC2  (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x9e)
diff --git a/arch/powerpc/kernel/asm-offsets.c 
b/arch/powerpc/kernel/asm-offsets.c
index 19e699d..34d63d8 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -523,6 +523,7 @@ int main(void)
DEFINE(VCORE_NAP_COUNT, offsetof(struct kvmppc_vcore, nap_count));
DEFINE(VCORE_IN_GUEST, offsetof(struct kvmppc_vcore, in_guest));
DEFINE(VCORE_NAPPING_THREADS, offsetof(struct kvmppc_vcore, 
napping_threads));
+   DEFINE(VCORE_TB_OFFSET, offsetof(struct kvmppc_vcore, tb_offset));
DEFINE(VCPU_SVCPU, offsetof(struct 

[PULL 15/51] KVM: PPC: Book3S PR: Keep volatile reg values in vcpu rather than shadow_vcpu

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

Currently PR-style KVM keeps the volatile guest register values
(R0 - R13, CR, LR, CTR, XER, PC) in a shadow_vcpu struct rather than
the main kvm_vcpu struct.  For 64-bit, the shadow_vcpu exists in two
places, a kmalloc'd struct and in the PACA, and it gets copied back
and forth in kvmppc_core_vcpu_load/put(), because the real-mode code
can't rely on being able to access the kmalloc'd struct.

This changes the code to copy the volatile values into the shadow_vcpu
as one of the last things done before entering the guest.  Similarly
the values are copied back out of the shadow_vcpu to the kvm_vcpu
immediately after exiting the guest.  We arrange for interrupts to be
still disabled at this point so that we can't get preempted on 64-bit
and end up copying values from the wrong PACA.

This means that the accessor functions in kvm_book3s.h for these
registers are greatly simplified, and are same between PR and HV KVM.
In places where accesses to shadow_vcpu fields are now replaced by
accesses to the kvm_vcpu, we can also remove the svcpu_get/put pairs.
Finally, on 64-bit, we don't need the kmalloc'd struct at all any more.

With this, the time to read the PVR one million times in a loop went
from 567.7ms to 575.5ms (averages of 6 values), an increase of about
1.4% for this worse-case test for guest entries and exits.  The
standard deviation of the measurements is about 11ms, so the
difference is only marginally significant statistically.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_book3s.h | 220 +-
 arch/powerpc/include/asm/kvm_book3s_asm.h |   6 +-
 arch/powerpc/include/asm/kvm_host.h   |   1 +
 arch/powerpc/kernel/asm-offsets.c |   4 +-
 arch/powerpc/kvm/book3s_emulate.c |   8 +-
 arch/powerpc/kvm/book3s_interrupts.S  |  27 +++-
 arch/powerpc/kvm/book3s_pr.c  | 122 -
 arch/powerpc/kvm/book3s_rmhandlers.S  |   6 +-
 arch/powerpc/kvm/trace.h  |   7 +-
 9 files changed, 162 insertions(+), 239 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_book3s.h 
b/arch/powerpc/include/asm/kvm_book3s.h
index 14a4741..40f22d9 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -200,140 +200,76 @@ extern void kvm_return_point(void);
 #include asm/kvm_book3s_64.h
 #endif
 
-#ifdef CONFIG_KVM_BOOK3S_PR
-
-static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
-{
-   return to_book3s(vcpu)-hior;
-}
-
-static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
-   unsigned long pending_now, unsigned long old_pending)
-{
-   if (pending_now)
-   vcpu-arch.shared-int_pending = 1;
-   else if (old_pending)
-   vcpu-arch.shared-int_pending = 0;
-}
-
 static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val)
 {
-   if ( num  14 ) {
-   struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
-   svcpu-gpr[num] = val;
-   svcpu_put(svcpu);
-   to_book3s(vcpu)-shadow_vcpu-gpr[num] = val;
-   } else
-   vcpu-arch.gpr[num] = val;
+   vcpu-arch.gpr[num] = val;
 }
 
 static inline ulong kvmppc_get_gpr(struct kvm_vcpu *vcpu, int num)
 {
-   if ( num  14 ) {
-   struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
-   ulong r = svcpu-gpr[num];
-   svcpu_put(svcpu);
-   return r;
-   } else
-   return vcpu-arch.gpr[num];
+   return vcpu-arch.gpr[num];
 }
 
 static inline void kvmppc_set_cr(struct kvm_vcpu *vcpu, u32 val)
 {
-   struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
-   svcpu-cr = val;
-   svcpu_put(svcpu);
-   to_book3s(vcpu)-shadow_vcpu-cr = val;
+   vcpu-arch.cr = val;
 }
 
 static inline u32 kvmppc_get_cr(struct kvm_vcpu *vcpu)
 {
-   struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
-   u32 r;
-   r = svcpu-cr;
-   svcpu_put(svcpu);
-   return r;
+   return vcpu-arch.cr;
 }
 
 static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, u32 val)
 {
-   struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
-   svcpu-xer = val;
-   to_book3s(vcpu)-shadow_vcpu-xer = val;
-   svcpu_put(svcpu);
+   vcpu-arch.xer = val;
 }
 
 static inline u32 kvmppc_get_xer(struct kvm_vcpu *vcpu)
 {
-   struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
-   u32 r;
-   r = svcpu-xer;
-   svcpu_put(svcpu);
-   return r;
+   return vcpu-arch.xer;
 }
 
 static inline void kvmppc_set_ctr(struct kvm_vcpu *vcpu, ulong val)
 {
-   struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
-   svcpu-ctr = val;
-   svcpu_put(svcpu);
+   vcpu-arch.ctr = val;
 }
 
 static inline ulong kvmppc_get_ctr(struct 

[PULL 09/51] KVM: PPC: BookE: Add GET/SET_ONE_REG interface for VRSAVE

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

This makes the VRSAVE register value for a vcpu accessible through
the GET/SET_ONE_REG interface on Book E systems (in addition to the
existing GET/SET_SREGS interface), for consistency with Book 3S.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/booke.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 17722d8..65fa775 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -1479,6 +1479,9 @@ int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, 
struct kvm_one_reg *reg)
case KVM_REG_PPC_DEBUG_INST:
val = get_reg_val(reg-id, KVMPPC_INST_EHPRIV);
break;
+   case KVM_REG_PPC_VRSAVE:
+   val = get_reg_val(reg-id, vcpu-arch.vrsave);
+   break;
default:
r = kvmppc_get_one_reg(vcpu, reg-id, val);
break;
@@ -1552,6 +1555,9 @@ int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, 
struct kvm_one_reg *reg)
kvmppc_set_tcr(vcpu, tcr);
break;
}
+   case KVM_REG_PPC_VRSAVE:
+   vcpu-arch.vrsave = set_reg_val(reg-id, val);
+   break;
default:
r = kvmppc_set_one_reg(vcpu, reg-id, val);
break;
-- 
1.8.1.4

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[PULL 07/51] KVM: PPC: Book3S HV: Pull out interrupt-reading code into a subroutine

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

This moves the code in book3s_hv_rmhandlers.S that reads any pending
interrupt from the XICS interrupt controller, and works out whether
it is an IPI for the guest, an IPI for the host, or a device interrupt,
into a new function called kvmppc_read_intr.  Later patches will
need this.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/book3s_hv_rmhandlers.S | 117 +++-
 1 file changed, 68 insertions(+), 49 deletions(-)

diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S 
b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 2bf2951..c91ae2b 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -862,46 +862,11 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)
 * set, we know the host wants us out so let's do it now
 */
 do_ext_interrupt:
-   lbz r0, HSTATE_HOST_IPI(r13)
-   cmpwi   r0, 0
-   bne ext_interrupt_to_host
-
-   /* Now read the interrupt from the ICP */
-   ld  r5, HSTATE_XICS_PHYS(r13)
-   li  r7, XICS_XIRR
-   cmpdi   r5, 0
-   beq-ext_interrupt_to_host
-   lwzcix  r3, r5, r7
-   rlwinm. r0, r3, 0, 0xff
-   sync
-   beq 3f  /* if nothing pending in the ICP */
-
-   /* We found something in the ICP...
-*
-* If it's not an IPI, stash it in the PACA and return to
-* the host, we don't (yet) handle directing real external
-* interrupts directly to the guest
-*/
-   cmpwi   r0, XICS_IPI
-   bne ext_stash_for_host
-
-   /* It's an IPI, clear the MFRR and EOI it */
-   li  r0, 0xff
-   li  r6, XICS_MFRR
-   stbcix  r0, r5, r6  /* clear the IPI */
-   stwcix  r3, r5, r7  /* EOI it */
-   sync
-
-   /* We need to re-check host IPI now in case it got set in the
-* meantime. If it's clear, we bounce the interrupt to the
-* guest
-*/
-   lbz r0, HSTATE_HOST_IPI(r13)
-   cmpwi   r0, 0
-   bne-1f
+   bl  kvmppc_read_intr
+   cmpdi   r3, 0
+   bgt ext_interrupt_to_host
 
/* Allright, looks like an IPI for the guest, we need to set MER */
-3:
/* Check if any CPU is heading out to the host, if so head out too */
ld  r5, HSTATE_KVM_VCORE(r13)
lwz r0, VCORE_ENTRY_EXIT(r5)
@@ -930,17 +895,6 @@ do_ext_interrupt:
mtspr   SPRN_LPCR, r8
b   fast_guest_return
 
-   /* We raced with the host, we need to resend that IPI, bummer */
-1: li  r0, IPI_PRIORITY
-   stbcix  r0, r5, r6  /* set the IPI */
-   sync
-   b   ext_interrupt_to_host
-
-ext_stash_for_host:
-   /* It's not an IPI and it's for the host, stash it in the PACA
-* before exit, it will be picked up by the host ICP driver
-*/
-   stw r3, HSTATE_SAVED_XIRR(r13)
 ext_interrupt_to_host:
 
 guest_exit_cont:   /* r9 = vcpu, r12 = trap, r13 = paca */
@@ -1816,6 +1770,71 @@ machine_check_realmode:
b   fast_interrupt_c_return
 
 /*
+ * Determine what sort of external interrupt is pending (if any).
+ * Returns:
+ * 0 if no interrupt is pending
+ * 1 if an interrupt is pending that needs to be handled by the host
+ * -1 if there was a guest wakeup IPI (which has now been cleared)
+ */
+kvmppc_read_intr:
+   /* see if a host IPI is pending */
+   li  r3, 1
+   lbz r0, HSTATE_HOST_IPI(r13)
+   cmpwi   r0, 0
+   bne 1f
+
+   /* Now read the interrupt from the ICP */
+   ld  r6, HSTATE_XICS_PHYS(r13)
+   li  r7, XICS_XIRR
+   cmpdi   r6, 0
+   beq-1f
+   lwzcix  r0, r6, r7
+   rlwinm. r3, r0, 0, 0xff
+   sync
+   beq 1f  /* if nothing pending in the ICP */
+
+   /* We found something in the ICP...
+*
+* If it's not an IPI, stash it in the PACA and return to
+* the host, we don't (yet) handle directing real external
+* interrupts directly to the guest
+*/
+   cmpwi   r3, XICS_IPI/* if there is, is it an IPI? */
+   li  r3, 1
+   bne 42f
+
+   /* It's an IPI, clear the MFRR and EOI it */
+   li  r3, 0xff
+   li  r8, XICS_MFRR
+   stbcix  r3, r6, r8  /* clear the IPI */
+   stwcix  r0, r6, r7  /* EOI it */
+   sync
+
+   /* We need to re-check host IPI now in case it got set in the
+* meantime. If it's clear, we bounce the interrupt to the
+* guest
+*/
+   lbz r0, HSTATE_HOST_IPI(r13)
+   cmpwi   r0, 0
+   bne-43f
+
+   /* OK, it's an IPI for us */
+   li  r3, -1
+1: blr
+
+42:/* It's not an IPI and it's for the host, stash it in the PACA
+* before exit, it will be 

[PULL 16/51] KVM: PPC: Book3S PR: Allow guest to use 64k pages

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

This adds the code to interpret 64k HPTEs in the guest hashed page
table (HPT), 64k SLB entries, and to tell the guest about 64k pages
in kvm_vm_ioctl_get_smmu_info().  Guest 64k pages are still shadowed
by 4k pages.

This also adds another hash table to the four we have already in
book3s_mmu_hpte.c to allow us to find all the PTEs that we have
instantiated that match a given 64k guest page.

The tlbie instruction changed starting with POWER6 to use a bit in
the RB operand to indicate large page invalidations, and to use other
RB bits to indicate the base and actual page sizes and the segment
size.  64k pages came in slightly earlier, with POWER5++.
We use one bit in vcpu-arch.hflags to indicate that the emulated
cpu supports 64k pages, and another to indicate that it has the new
tlbie definition.

The KVM_PPC_GET_SMMU_INFO ioctl presents a bit of a problem, because
the MMU capabilities depend on which CPU model we're emulating, but it
is a VM ioctl not a VCPU ioctl and therefore doesn't get passed a VCPU
fd.  In addition, commonly-used userspace (QEMU) calls it before
setting the PVR for any VCPU.  Therefore, as a best effort we look at
the first vcpu in the VM and return 64k pages or not depending on its
capabilities.  We also make the PVR default to the host PVR on recent
CPUs that support 1TB segments (and therefore multiple page sizes as
well) so that KVM_PPC_GET_SMMU_INFO will include 64k page and 1TB
segment support on those CPUs.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_asm.h|  2 +
 arch/powerpc/include/asm/kvm_book3s.h |  6 +++
 arch/powerpc/include/asm/kvm_host.h   |  4 ++
 arch/powerpc/kvm/book3s_64_mmu.c  | 92 +++
 arch/powerpc/kvm/book3s_mmu_hpte.c| 50 +++
 arch/powerpc/kvm/book3s_pr.c  | 58 +++---
 6 files changed, 197 insertions(+), 15 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_asm.h 
b/arch/powerpc/include/asm/kvm_asm.h
index 851bac7..e2d4d46 100644
--- a/arch/powerpc/include/asm/kvm_asm.h
+++ b/arch/powerpc/include/asm/kvm_asm.h
@@ -123,6 +123,8 @@
 #define BOOK3S_HFLAG_SLB   0x2
 #define BOOK3S_HFLAG_PAIRED_SINGLE 0x4
 #define BOOK3S_HFLAG_NATIVE_PS 0x8
+#define BOOK3S_HFLAG_MULTI_PGSIZE  0x10
+#define BOOK3S_HFLAG_NEW_TLBIE 0x20
 
 #define RESUME_FLAG_NV  (10)  /* Reload guest nonvolatile state? */
 #define RESUME_FLAG_HOST(11)  /* Resume host? */
diff --git a/arch/powerpc/include/asm/kvm_book3s.h 
b/arch/powerpc/include/asm/kvm_book3s.h
index 40f22d9..1d4a120 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -58,6 +58,9 @@ struct hpte_cache {
struct hlist_node list_pte_long;
struct hlist_node list_vpte;
struct hlist_node list_vpte_long;
+#ifdef CONFIG_PPC_BOOK3S_64
+   struct hlist_node list_vpte_64k;
+#endif
struct rcu_head rcu_head;
u64 host_vpn;
u64 pfn;
@@ -99,6 +102,9 @@ struct kvmppc_vcpu_book3s {
struct hlist_head hpte_hash_pte_long[HPTEG_HASH_NUM_PTE_LONG];
struct hlist_head hpte_hash_vpte[HPTEG_HASH_NUM_VPTE];
struct hlist_head hpte_hash_vpte_long[HPTEG_HASH_NUM_VPTE_LONG];
+#ifdef CONFIG_PPC_BOOK3S_64
+   struct hlist_head hpte_hash_vpte_64k[HPTEG_HASH_NUM_VPTE_64K];
+#endif
int hpte_cache_count;
spinlock_t mmu_lock;
 };
diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index f48f3f0..3d8b8a8 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -68,10 +68,12 @@ extern void kvm_set_spte_hva(struct kvm *kvm, unsigned long 
hva, pte_t pte);
 #define HPTEG_HASH_BITS_PTE_LONG   12
 #define HPTEG_HASH_BITS_VPTE   13
 #define HPTEG_HASH_BITS_VPTE_LONG  5
+#define HPTEG_HASH_BITS_VPTE_64K   11
 #define HPTEG_HASH_NUM_PTE (1  HPTEG_HASH_BITS_PTE)
 #define HPTEG_HASH_NUM_PTE_LONG(1  HPTEG_HASH_BITS_PTE_LONG)
 #define HPTEG_HASH_NUM_VPTE(1  HPTEG_HASH_BITS_VPTE)
 #define HPTEG_HASH_NUM_VPTE_LONG   (1  HPTEG_HASH_BITS_VPTE_LONG)
+#define HPTEG_HASH_NUM_VPTE_64K(1  HPTEG_HASH_BITS_VPTE_64K)
 
 /* Physical Address Mask - allowed range of real mode RAM access */
 #define KVM_PAM0x0fffULL
@@ -327,6 +329,7 @@ struct kvmppc_pte {
bool may_read   : 1;
bool may_write  : 1;
bool may_execute: 1;
+   u8 page_size;   /* MMU_PAGE_xxx */
 };
 
 struct kvmppc_mmu {
@@ -359,6 +362,7 @@ struct kvmppc_slb {
bool large  : 1;/* PTEs are 16MB */
bool tb : 1;/* 1TB segment */
bool class  : 1;
+   u8 base_page_size;  /* MMU_PAGE_xxx */
 };
 
 # ifdef 

[PULL 01/51] KVM: PPC: Book3S HV: Reserve POWER8 space in get/set_one_reg

2013-10-31 Thread Alexander Graf
From: Michael Neuling mi...@neuling.org

This reserves space in get/set_one_reg ioctl for the extra guest state
needed for POWER8.  It doesn't implement these at all, it just reserves
them so that the ABI is defined now.

A few things to note here:

- This add *a lot* state for transactional memory.  TM suspend mode,
  this is unavoidable, you can't simply roll back all transactions and
  store only the checkpointed state.  I've added this all to
  get/set_one_reg (including GPRs) rather than creating a new ioctl
  which returns a struct kvm_regs like KVM_GET_REGS does.  This means we
  if we need to extract the TM state, we are going to need a bucket load
  of IOCTLs.  Hopefully most of the time this will not be needed as we
  can look at the MSR to see if TM is active and only grab them when
  needed.  If this becomes a bottle neck in future we can add another
  ioctl to grab all this state in one go.

- The TM state is offset by 0x8000.

- For TM, I've done away with VMX and FP and created a single 64x128 bit
  VSX register space.

- I've left a space of 1 (at 0x9c) since Paulus needs to add a value
  which applies to POWER7 as well.

Signed-off-by: Michael Neuling mi...@neuling.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 Documentation/virtual/kvm/api.txt   | 39 +++
 arch/powerpc/include/uapi/asm/kvm.h | 54 +
 2 files changed, 93 insertions(+)

diff --git a/Documentation/virtual/kvm/api.txt 
b/Documentation/virtual/kvm/api.txt
index a89a5ee..354a51b 100644
--- a/Documentation/virtual/kvm/api.txt
+++ b/Documentation/virtual/kvm/api.txt
@@ -1810,6 +1810,45 @@ registers, find a list below:
   PPC   | KVM_REG_PPC_TLB3PS   | 32
   PPC   | KVM_REG_PPC_EPTCFG   | 32
   PPC   | KVM_REG_PPC_ICP_STATE | 64
+  PPC   | KVM_REG_PPC_SPMC1| 32
+  PPC   | KVM_REG_PPC_SPMC2| 32
+  PPC   | KVM_REG_PPC_IAMR | 64
+  PPC   | KVM_REG_PPC_TFHAR| 64
+  PPC   | KVM_REG_PPC_TFIAR| 64
+  PPC   | KVM_REG_PPC_TEXASR   | 64
+  PPC   | KVM_REG_PPC_FSCR | 64
+  PPC   | KVM_REG_PPC_PSPB | 32
+  PPC   | KVM_REG_PPC_EBBHR| 64
+  PPC   | KVM_REG_PPC_EBBRR| 64
+  PPC   | KVM_REG_PPC_BESCR| 64
+  PPC   | KVM_REG_PPC_TAR  | 64
+  PPC   | KVM_REG_PPC_DPDES| 64
+  PPC   | KVM_REG_PPC_DAWR | 64
+  PPC   | KVM_REG_PPC_DAWRX| 64
+  PPC   | KVM_REG_PPC_CIABR| 64
+  PPC   | KVM_REG_PPC_IC   | 64
+  PPC   | KVM_REG_PPC_VTB  | 64
+  PPC   | KVM_REG_PPC_CSIGR| 64
+  PPC   | KVM_REG_PPC_TACR | 64
+  PPC   | KVM_REG_PPC_TCSCR| 64
+  PPC   | KVM_REG_PPC_PID  | 64
+  PPC   | KVM_REG_PPC_ACOP | 64
+  PPC   | KVM_REG_PPC_TM_GPR0  | 64
+  ...
+  PPC   | KVM_REG_PPC_TM_GPR31 | 64
+  PPC   | KVM_REG_PPC_TM_VSR0  | 128
+  ...
+  PPC   | KVM_REG_PPC_TM_VSR63 | 128
+  PPC   | KVM_REG_PPC_TM_CR| 64
+  PPC   | KVM_REG_PPC_TM_LR| 64
+  PPC   | KVM_REG_PPC_TM_CTR   | 64
+  PPC   | KVM_REG_PPC_TM_FPSCR | 64
+  PPC   | KVM_REG_PPC_TM_AMR   | 64
+  PPC   | KVM_REG_PPC_TM_PPR   | 64
+  PPC   | KVM_REG_PPC_TM_VRSAVE| 64
+  PPC   | KVM_REG_PPC_TM_VSCR  | 32
+  PPC   | KVM_REG_PPC_TM_DSCR  | 64
+  PPC   | KVM_REG_PPC_TM_TAR   | 64
 
 ARM registers are mapped using the lower 32 bits.  The upper 16 of that
 is the register group type, or coprocessor number:
diff --git a/arch/powerpc/include/uapi/asm/kvm.h 
b/arch/powerpc/include/uapi/asm/kvm.h
index 0fb1a6e..7ed41c0 100644
--- a/arch/powerpc/include/uapi/asm/kvm.h
+++ b/arch/powerpc/include/uapi/asm/kvm.h
@@ -429,6 +429,11 @@ struct kvm_get_htab_header {
 #define KVM_REG_PPC_MMCR0  (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x10)
 #define KVM_REG_PPC_MMCR1  (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x11)
 #define KVM_REG_PPC_MMCRA  (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x12)
+#define KVM_REG_PPC_MMCR2  (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x13)
+#define KVM_REG_PPC_MMCRS  (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x14)
+#define KVM_REG_PPC_SIAR   (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x15)
+#define KVM_REG_PPC_SDAR   (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x16)
+#define KVM_REG_PPC_SIER   (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x17)
 
 #define KVM_REG_PPC_PMC1   (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x18)
 #define KVM_REG_PPC_PMC2   (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x19)
@@ -499,6 +504,55 @@ struct kvm_get_htab_header {
 #define KVM_REG_PPC_TLB3PS (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x9a)
 #define KVM_REG_PPC_EPTCFG (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x9b)
 
+/* POWER8 registers */
+#define KVM_REG_PPC_SPMC1  (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x9d)
+#define KVM_REG_PPC_SPMC2  (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x9e)
+#define KVM_REG_PPC_IAMR   (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x9f)
+#define KVM_REG_PPC_TFHAR  (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xa0)
+#define KVM_REG_PPC_TFIAR  (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xa1)
+#define KVM_REG_PPC_TEXASR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xa2)
+#define KVM_REG_PPC_FSCR   

[PULL 17/51] KVM: PPC: Book3S PR: Use 64k host pages where possible

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

Currently, PR KVM uses 4k pages for the host-side mappings of guest
memory, regardless of the host page size.  When the host page size is
64kB, we might as well use 64k host page mappings for guest mappings
of 64kB and larger pages and for guest real-mode mappings.  However,
the magic page has to remain a 4k page.

To implement this, we first add another flag bit to the guest VSID
values we use, to indicate that this segment is one where host pages
should be mapped using 64k pages.  For segments with this bit set
we set the bits in the shadow SLB entry to indicate a 64k base page
size.  When faulting in host HPTEs for this segment, we make them
64k HPTEs instead of 4k.  We record the pagesize in struct hpte_cache
for use when invalidating the HPTE.

For now we restrict the segment containing the magic page (if any) to
4k pages.  It should be possible to lift this restriction in future
by ensuring that the magic 4k page is appropriately positioned within
a host 64k page.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_book3s.h |  6 --
 arch/powerpc/kvm/book3s_32_mmu.c  |  1 +
 arch/powerpc/kvm/book3s_64_mmu.c  | 35 ++-
 arch/powerpc/kvm/book3s_64_mmu_host.c | 27 +--
 arch/powerpc/kvm/book3s_pr.c  |  1 +
 5 files changed, 57 insertions(+), 13 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_book3s.h 
b/arch/powerpc/include/asm/kvm_book3s.h
index 1d4a120..6bf20b4 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -66,6 +66,7 @@ struct hpte_cache {
u64 pfn;
ulong slot;
struct kvmppc_pte pte;
+   int pagesize;
 };
 
 struct kvmppc_vcpu_book3s {
@@ -113,8 +114,9 @@ struct kvmppc_vcpu_book3s {
 #define CONTEXT_GUEST  1
 #define CONTEXT_GUEST_END  2
 
-#define VSID_REAL  0x0fc0ULL
-#define VSID_BAT   0x0fb0ULL
+#define VSID_REAL  0x07c0ULL
+#define VSID_BAT   0x07b0ULL
+#define VSID_64K   0x0800ULL
 #define VSID_1T0x1000ULL
 #define VSID_REAL_DR   0x2000ULL
 #define VSID_REAL_IR   0x4000ULL
diff --git a/arch/powerpc/kvm/book3s_32_mmu.c b/arch/powerpc/kvm/book3s_32_mmu.c
index c8cefdd..af04553 100644
--- a/arch/powerpc/kvm/book3s_32_mmu.c
+++ b/arch/powerpc/kvm/book3s_32_mmu.c
@@ -308,6 +308,7 @@ static int kvmppc_mmu_book3s_32_xlate(struct kvm_vcpu 
*vcpu, gva_t eaddr,
ulong mp_ea = vcpu-arch.magic_page_ea;
 
pte-eaddr = eaddr;
+   pte-page_size = MMU_PAGE_4K;
 
/* Magic page override */
if (unlikely(mp_ea) 
diff --git a/arch/powerpc/kvm/book3s_64_mmu.c b/arch/powerpc/kvm/book3s_64_mmu.c
index 8277264..ffcde01 100644
--- a/arch/powerpc/kvm/book3s_64_mmu.c
+++ b/arch/powerpc/kvm/book3s_64_mmu.c
@@ -542,6 +542,16 @@ static void kvmppc_mmu_book3s_64_tlbie(struct kvm_vcpu 
*vcpu, ulong va,
kvmppc_mmu_pte_vflush(vcpu, va  12, mask);
 }
 
+#ifdef CONFIG_PPC_64K_PAGES
+static int segment_contains_magic_page(struct kvm_vcpu *vcpu, ulong esid)
+{
+   ulong mp_ea = vcpu-arch.magic_page_ea;
+
+   return mp_ea  !(vcpu-arch.shared-msr  MSR_PR) 
+   (mp_ea  SID_SHIFT) == esid;
+}
+#endif
+
 static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
 u64 *vsid)
 {
@@ -549,11 +559,13 @@ static int kvmppc_mmu_book3s_64_esid_to_vsid(struct 
kvm_vcpu *vcpu, ulong esid,
struct kvmppc_slb *slb;
u64 gvsid = esid;
ulong mp_ea = vcpu-arch.magic_page_ea;
+   int pagesize = MMU_PAGE_64K;
 
if (vcpu-arch.shared-msr  (MSR_DR|MSR_IR)) {
slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
if (slb) {
gvsid = slb-vsid;
+   pagesize = slb-base_page_size;
if (slb-tb) {
gvsid = SID_SHIFT_1T - SID_SHIFT;
gvsid |= esid  ((1ul  (SID_SHIFT_1T - 
SID_SHIFT)) - 1);
@@ -564,28 +576,41 @@ static int kvmppc_mmu_book3s_64_esid_to_vsid(struct 
kvm_vcpu *vcpu, ulong esid,
 
switch (vcpu-arch.shared-msr  (MSR_DR|MSR_IR)) {
case 0:
-   *vsid = VSID_REAL | esid;
+   gvsid = VSID_REAL | esid;
break;
case MSR_IR:
-   *vsid = VSID_REAL_IR | gvsid;
+   gvsid |= VSID_REAL_IR;
break;
case MSR_DR:
-   *vsid = VSID_REAL_DR | gvsid;
+   gvsid |= VSID_REAL_DR;
break;
case MSR_DR|MSR_IR:
if (!slb)
goto no_slb;
 
-   *vsid = gvsid;
break;
default:
BUG();
break;
}
 
+#ifdef 

[PULL 32/51] kvm: powerpc: e500: mark page accessed when mapping a guest page

2013-10-31 Thread Alexander Graf
From: Bharat Bhushan r65...@freescale.com

Mark the guest page as accessed so that there is likely
less chances of this page getting swap-out.

Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
Acked-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/e500_mmu_host.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/powerpc/kvm/e500_mmu_host.c b/arch/powerpc/kvm/e500_mmu_host.c
index 1c6a9d72..8f0d532 100644
--- a/arch/powerpc/kvm/e500_mmu_host.c
+++ b/arch/powerpc/kvm/e500_mmu_host.c
@@ -253,6 +253,9 @@ static inline void kvmppc_e500_ref_setup(struct tlbe_ref 
*ref,
ref-pfn = pfn;
ref-flags |= E500_TLB_VALID;
 
+   /* Mark the page accessed */
+   kvm_set_pfn_accessed(pfn);
+
if (tlbe_is_writable(gtlbe))
kvm_set_pfn_dirty(pfn);
 }
-- 
1.8.1.4

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[PULL 35/51] powerpc: export debug registers save function for KVM

2013-10-31 Thread Alexander Graf
From: Bharat Bhushan r65...@freescale.com

KVM need this function when switching from vcpu to user-space
thread. My subsequent patch will use this function.

Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
Acked-by: Michael Neuling mi...@neuling.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/switch_to.h | 1 +
 arch/powerpc/kernel/process.c| 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/switch_to.h 
b/arch/powerpc/include/asm/switch_to.h
index 2be5618..9ee1261 100644
--- a/arch/powerpc/include/asm/switch_to.h
+++ b/arch/powerpc/include/asm/switch_to.h
@@ -35,6 +35,7 @@ extern void giveup_vsx(struct task_struct *);
 extern void enable_kernel_spe(void);
 extern void giveup_spe(struct task_struct *);
 extern void load_up_spe(struct task_struct *);
+extern void switch_booke_debug_regs(struct thread_struct *new_thread);
 
 #ifndef CONFIG_SMP
 extern void discard_lazy_cpu_state(void);
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index a2b9231..c24a906 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -371,12 +371,13 @@ static void prime_debug_regs(struct thread_struct *thread)
  * debug registers, set the debug registers from the values
  * stored in the new thread.
  */
-static void switch_booke_debug_regs(struct thread_struct *new_thread)
+void switch_booke_debug_regs(struct thread_struct *new_thread)
 {
if ((current-thread.debug.dbcr0  DBCR0_IDM)
|| (new_thread-debug.dbcr0  DBCR0_IDM))
prime_debug_regs(new_thread);
 }
+EXPORT_SYMBOL_GPL(switch_booke_debug_regs);
 #else  /* !CONFIG_PPC_ADV_DEBUG_REGS */
 #ifndef CONFIG_HAVE_HW_BREAKPOINT
 static void set_debug_reg_defaults(struct thread_struct *thread)
-- 
1.8.1.4

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Greetings:

2013-10-31 Thread Cham Tao Soon


Hello:
Can you assist me to
move funds from
Singapore? Please reply.

Cham Tao Soon
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Help regarding virsh domifstat

2013-10-31 Thread Rohit Bhat
Hi,

I need a small help. I am working on a project where i have to monitor
network activity of a VM running on KVM.

I am interested in how much data is going into the VM and how much
data is coming out of the VM. I checked on the net and found out virsh
domifstat is the way to go about it.

1. But looks like these stats also include bytes related to control
traffic for the VM. Is there a way to exclude that? I just want the
size of actual data transfers.

2. Is there a way by which i can report the data transfer of VM with
the outside world (outside hypervisor) only while excluding data
transfer with any other VM on the same host?

Please let me know if this is a not the right group for such queries.

Thanks,
Rohit
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[PATCH 0/2] kvm tools: fix vhost-net broken since fa7226f88012713a73d0cba4955444ea109e9458

2013-10-31 Thread Ying-Shiuan Pan
These patch series fix 2 vhost-net problems. There were 2 problems after
commit fa7226f88012713a73d0cba4955444ea109e9458. 
(1) vhost-net requires tap_fd for VHOST_SET_BACKEND, but opening tap device
was postponed to VIRTIO_CONFIG_S_DRIVER_OK. The wrong order of initialization
caused vhost-net used a invalid tap_fd for ioctl.
(2) virtio-net of kvm tool started to support mergeable rx buffers since
commit 8c2684de6fb1afc95321e7e0f30550acdcc08186, but kvm tool did not tell
vhost-net that he is using mergeable rx buffers.

test script:
$ sudo ./lkvm run --kernel ../../arch/x86/boot/bzImage --no-dhcp --net 
mode=tap,vhost=1

Ying-Shiuan Pan (2):
  kvm tools: virtio-net has to open tap device before vhost-net init.
  kvm tools: vhost-net: setup mergeable rx buffers feature

 tools/kvm/virtio/net.c | 54 +++---
 1 file changed, 29 insertions(+), 25 deletions(-)

-- 
1.8.1.2

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[PATCH 1/2] kvm tools: virtio-net has to open tap device before vhost-net init.

2013-10-31 Thread Ying-Shiuan Pan
Enabling vhost-net encounted an error:
  Fatal: VHOST_NET_SET_BACKEND failed 88

The reason is that vhost-net requires tap_fd for VHOST_NET_SET_BACKEND,
however tap_fd is opened after VIRTIO_CONFIG_S_DRIVER_OK. Because the
initialization needs to know the guest features, I suppose the initialization
could be moved to set_guest_features(). Therefore, initialization can be
finished before status VIRTIO_CONFIG_S_DRIVER_OK, and tap_fd can be set
before vhost-net sets backend.

Signed-off-by: Ying-Shiuan Pan ys...@itri.org.tw
---
 tools/kvm/virtio/net.c | 31 ++-
 1 file changed, 10 insertions(+), 21 deletions(-)

diff --git a/tools/kvm/virtio/net.c b/tools/kvm/virtio/net.c
index 3715aaf..dfc4aad 100644
--- a/tools/kvm/virtio/net.c
+++ b/tools/kvm/virtio/net.c
@@ -389,6 +389,16 @@ static void set_guest_features(struct kvm *kvm, void *dev, 
u32 features)
struct net_dev *ndev = dev;
 
ndev-features = features;
+
+   if (ndev-mode == NET_MODE_TAP) {
+   if (!virtio_net__tap_init(ndev))
+   die_perror(You have requested a TAP device, but 
creation of one has failed because);
+   } else {
+   ndev-info.vnet_hdr_len = has_virtio_feature(ndev, 
VIRTIO_NET_F_MRG_RXBUF) ?
+   sizeof(struct 
virtio_net_hdr_mrg_rxbuf) :
+   sizeof(struct virtio_net_hdr);
+   uip_init(ndev-info);
+   }
 }
 
 static bool is_ctrl_vq(struct net_dev *ndev, u32 vq)
@@ -530,8 +540,6 @@ static int set_size_vq(struct kvm *kvm, void *dev, u32 vq, 
int size)
return size;
 }
 
-static void notify_status(struct kvm *kvm, void *dev, u8 status);
-
 static struct virtio_ops net_dev_virtio_ops = (struct virtio_ops) {
.get_config = get_config,
.get_host_features  = get_host_features,
@@ -543,7 +551,6 @@ static struct virtio_ops net_dev_virtio_ops = (struct 
virtio_ops) {
.notify_vq  = notify_vq,
.notify_vq_gsi  = notify_vq_gsi,
.notify_vq_eventfd  = notify_vq_eventfd,
-   .notify_status  = notify_status,
 };
 
 static void virtio_net__vhost_init(struct kvm *kvm, struct net_dev *ndev)
@@ -731,24 +738,6 @@ static int virtio_net__init_one(struct virtio_net_params 
*params)
return 0;
 }
 
-static void notify_status(struct kvm *kvm, void *dev, u8 status)
-{
-   struct net_dev *ndev = dev;
-
-   if (!(status  VIRTIO_CONFIG_S_DRIVER_OK))
-   return;
-
-   if (ndev-mode == NET_MODE_TAP) {
-   if (!virtio_net__tap_init(ndev))
-   die_perror(You have requested a TAP device, but 
creation of one has failed because);
-   } else {
-   ndev-info.vnet_hdr_len = has_virtio_feature(ndev, 
VIRTIO_NET_F_MRG_RXBUF) ?
-   sizeof(struct 
virtio_net_hdr_mrg_rxbuf) :
-   sizeof(struct virtio_net_hdr);
-   uip_init(ndev-info);
-   }
-}
-
 int virtio_net__init(struct kvm *kvm)
 {
int i;
-- 
1.8.1.2

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[PATCH 2/2] kvm tools: vhost-net: setup mergeable rx buffers feature

2013-10-31 Thread Ying-Shiuan Pan
After features negotiation, kvmtool should tell vhost-net that he's
using mergeable rx buffers.

Signed-off-by: Ying-Shiuan Pan ys...@itri.org.tw
---
 tools/kvm/virtio/net.c | 23 +++
 1 file changed, 19 insertions(+), 4 deletions(-)

diff --git a/tools/kvm/virtio/net.c b/tools/kvm/virtio/net.c
index dfc4aad..2f61718 100644
--- a/tools/kvm/virtio/net.c
+++ b/tools/kvm/virtio/net.c
@@ -384,6 +384,22 @@ static u32 get_host_features(struct kvm *kvm, void *dev)
| 1UL  (ndev-queue_pairs  1 ? VIRTIO_NET_F_MQ : 0);
 }
 
+static int virtio_net__vhost_set_features(struct net_dev *ndev)
+{
+   u64 features = 1UL  VIRTIO_RING_F_EVENT_IDX;
+   u64 vhost_features;
+
+   if (ioctl(ndev-vhost_fd, VHOST_GET_FEATURES, vhost_features) != 0)
+   die_perror(VHOST_GET_FEATURES failed);
+
+   /* make sure both side support mergable rx buffers */
+   if (vhost_features  1UL  VIRTIO_NET_F_MRG_RXBUF 
+   has_virtio_feature(ndev, VIRTIO_NET_F_MRG_RXBUF))
+   features |= 1UL  VIRTIO_NET_F_MRG_RXBUF;
+
+   return ioctl(ndev-vhost_fd, VHOST_SET_FEATURES, features);
+}
+
 static void set_guest_features(struct kvm *kvm, void *dev, u32 features)
 {
struct net_dev *ndev = dev;
@@ -393,6 +409,9 @@ static void set_guest_features(struct kvm *kvm, void *dev, 
u32 features)
if (ndev-mode == NET_MODE_TAP) {
if (!virtio_net__tap_init(ndev))
die_perror(You have requested a TAP device, but 
creation of one has failed because);
+   if (ndev-vhost_fd 
+   virtio_net__vhost_set_features(ndev) != 0)
+   die_perror(VHOST_SET_FEATURES failed);
} else {
ndev-info.vnet_hdr_len = has_virtio_feature(ndev, 
VIRTIO_NET_F_MRG_RXBUF) ?
sizeof(struct 
virtio_net_hdr_mrg_rxbuf) :
@@ -555,7 +574,6 @@ static struct virtio_ops net_dev_virtio_ops = (struct 
virtio_ops) {
 
 static void virtio_net__vhost_init(struct kvm *kvm, struct net_dev *ndev)
 {
-   u64 features = 1UL  VIRTIO_RING_F_EVENT_IDX;
struct vhost_memory *mem;
int r;
 
@@ -578,9 +596,6 @@ static void virtio_net__vhost_init(struct kvm *kvm, struct 
net_dev *ndev)
if (r != 0)
die_perror(VHOST_SET_OWNER failed);
 
-   r = ioctl(ndev-vhost_fd, VHOST_SET_FEATURES, features);
-   if (r != 0)
-   die_perror(VHOST_SET_FEATURES failed);
r = ioctl(ndev-vhost_fd, VHOST_SET_MEM_TABLE, mem);
if (r != 0)
die_perror(VHOST_SET_MEM_TABLE failed);
-- 
1.8.1.2

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[PULL 00/51] ppc patch queue 2013-10-31

2013-10-31 Thread Alexander Graf
Hi Paolo / Gleb,

This is my current patch queue for ppc.  Please pull.

Highlights of this request are:

  - Book3s HV and PR can be built into the same kernel
  - e500 target debug support
  - Book3s POWER8 preparation
  - Lots of book3s PR fixes

I left out the FPU rework from Paul in this round, as kvm/next is still on rc2.
I think it'll just have to wait for 3.14.


Alex

The following changes since commit d570142674890fe10b3d7d86aa105e3dfce1ddfa:

  Merge tag 'kvm-arm-for-3.13-1' of 
git://git.linaro.org/people/cdall/linux-kvm-arm into next (2013-10-16 15:30:32 
+0300)

are available in the git repository at:


  git://github.com/agraf/linux-2.6.git kvm-ppc-queue

for you to fetch changes up to a78b55d1c0218b6d91d504941d20e36435c276f5:

  kvm: powerpc: book3s: drop is_hv_enabled (2013-10-17 18:43:34 +0200)


Aneesh Kumar K.V (11):
  kvm: powerpc: book3s: pr: Rename KVM_BOOK3S_PR to KVM_BOOK3S_PR_POSSIBLE
  kvm: powerpc: book3s: Add a new config variable 
CONFIG_KVM_BOOK3S_HV_POSSIBLE
  kvm: powerpc: Add kvmppc_ops callback
  kvm: powerpc: book3s: Cleanup interrupt handling code
  kvm: powerpc: book3s: Add is_hv_enabled to kvmppc_ops
  kvm: powerpc: book3s: pr: move PR related tracepoints to a separate header
  kvm: powerpc: booke: Move booke related tracepoints to separate header
  kvm: powerpc: book3s: Support building HV and PR KVM as module
  kvm: Add struct kvm arg to memslot APIs
  kvm: powerpc: book3s: Allow the HV and PR selection per virtual machine
  kvm: powerpc: book3s: drop is_hv_enabled

Bharat Bhushan (10):
  powerpc: book3e: _PAGE_LENDIAN must be _PAGE_ENDIAN
  kvm: powerpc: allow guest control E attribute in mas2
  kvm: powerpc: allow guest control G attribute in mas2
  kvm: powerpc: e500: mark page accessed when mapping a guest page
  powerpc: remove unnecessary line continuations
  powerpc: move debug registers in a structure
  powerpc: export debug registers save function for KVM
  KVM: PPC: E500: exit to user space on ehpriv 1 instruction
  KVM: PPC: E500: Using struct debug_reg
  KVM: PPC: E500: Add userspace debug stub support

Michael Neuling (1):
  KVM: PPC: Book3S HV: Reserve POWER8 space in get/set_one_reg

Paul Mackerras (29):
  KVM: PPC: Book3S HV: Save/restore SIAR and SDAR along with other PMU 
registers
  KVM: PPC: Book3S HV: Implement timebase offset for guests
  KVM: PPC: Book3S: Add GET/SET_ONE_REG interface for VRSAVE
  KVM: PPC: Book3S HV: Implement H_CONFER
  KVM: PPC: Book3S HV: Restructure kvmppc_hv_entry to be a subroutine
  KVM: PPC: Book3S HV: Pull out interrupt-reading code into a subroutine
  KVM: PPC: Book3S HV: Avoid unbalanced increments of VPA yield count
  KVM: PPC: BookE: Add GET/SET_ONE_REG interface for VRSAVE
  KVM: PPC: Book3S HV: Store LPCR value for each virtual core
  KVM: PPC: Book3S HV: Add support for guest Program Priority Register
  KVM: PPC: Book3S HV: Support POWER6 compatibility mode on POWER7
  KVM: PPC: Book3S HV: Don't crash host on unknown guest interrupt
  KVM: PPC: Book3S PR: Fix compilation without CONFIG_ALTIVEC
  KVM: PPC: Book3S PR: Keep volatile reg values in vcpu rather than 
shadow_vcpu
  KVM: PPC: Book3S PR: Allow guest to use 64k pages
  KVM: PPC: Book3S PR: Use 64k host pages where possible
  KVM: PPC: Book3S PR: Handle PP0 page-protection bit in guest HPTEs
  KVM: PPC: Book3S PR: Correct errors in H_ENTER implementation
  KVM: PPC: Book3S PR: Make HPT accesses and updates SMP-safe
  KVM: PPC: Book3S PR: Allocate kvm_vcpu structs from kvm_vcpu_cache
  KVM: PPC: Book3S: Move skip-interrupt handlers to common code
  KVM: PPC: Book3S PR: Better handling of host-side read-only pages
  KVM: PPC: Book3S PR: Use mmu_notifier_retry() in kvmppc_mmu_map_page()
  KVM: PPC: Book3S PR: Mark pages accessed, and dirty if being written
  KVM: PPC: Book3S PR: Reduce number of shadow PTEs invalidated by MMU 
notifiers
  kvm: powerpc: book3s hv: Fix vcore leak
  KVM: PPC: Book3S HV: Better handling of exceptions that happen in real 
mode
  kvm: powerpc: book3s: remove kvmppc_handler_highmem label
  kvm: powerpc: book3s: move book3s_64_vio_hv.c into the main kernel binary

 Documentation/virtual/kvm/api.txt |  44 +++
 arch/arm/kvm/arm.c|   5 +-
 arch/ia64/kvm/kvm-ia64.c  |   5 +-
 arch/mips/kvm/kvm_mips.c  |   5 +-
 arch/powerpc/include/asm/disassemble.h|   4 +
 arch/powerpc/include/asm/exception-64s.h  |  21 +-
 arch/powerpc/include/asm/kvm_asm.h|   4 +
 arch/powerpc/include/asm/kvm_book3s.h | 232 +--
 arch/powerpc/include/asm/kvm_book3s_32.h  |   2 +-
 arch/powerpc/include/asm/kvm_book3s_64.h  |   8 +-
 arch/powerpc/include/asm/kvm_book3s_asm.h |   9 +-
 

[PULL 02/51] KVM: PPC: Book3S HV: Save/restore SIAR and SDAR along with other PMU registers

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

Currently we are not saving and restoring the SIAR and SDAR registers in
the PMU (performance monitor unit) on guest entry and exit.  The result
is that performance monitoring tools in the guest could get false
information about where a program was executing and what data it was
accessing at the time of a performance monitor interrupt.  This fixes
it by saving and restoring these registers along with the other PMU
registers on guest entry/exit.

This also provides a way for userspace to access these values for a
vcpu via the one_reg interface.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_host.h |  2 ++
 arch/powerpc/kernel/asm-offsets.c   |  2 ++
 arch/powerpc/kvm/book3s_hv.c| 12 
 arch/powerpc/kvm/book3s_hv_rmhandlers.S |  8 
 4 files changed, 24 insertions(+)

diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index 0866230..d9b21af 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -493,6 +493,8 @@ struct kvm_vcpu_arch {
 
u64 mmcr[3];
u32 pmc[8];
+   u64 siar;
+   u64 sdar;
 
 #ifdef CONFIG_KVM_EXIT_TIMING
struct mutex exit_timing_lock;
diff --git a/arch/powerpc/kernel/asm-offsets.c 
b/arch/powerpc/kernel/asm-offsets.c
index d8958be..19e699d 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -508,6 +508,8 @@ int main(void)
DEFINE(VCPU_PRODDED, offsetof(struct kvm_vcpu, arch.prodded));
DEFINE(VCPU_MMCR, offsetof(struct kvm_vcpu, arch.mmcr));
DEFINE(VCPU_PMC, offsetof(struct kvm_vcpu, arch.pmc));
+   DEFINE(VCPU_SIAR, offsetof(struct kvm_vcpu, arch.siar));
+   DEFINE(VCPU_SDAR, offsetof(struct kvm_vcpu, arch.sdar));
DEFINE(VCPU_SLB, offsetof(struct kvm_vcpu, arch.slb));
DEFINE(VCPU_SLB_MAX, offsetof(struct kvm_vcpu, arch.slb_max));
DEFINE(VCPU_SLB_NR, offsetof(struct kvm_vcpu, arch.slb_nr));
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 62a2b5a..45a9b87 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -749,6 +749,12 @@ int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, 
union kvmppc_one_reg *val)
i = id - KVM_REG_PPC_PMC1;
*val = get_reg_val(id, vcpu-arch.pmc[i]);
break;
+   case KVM_REG_PPC_SIAR:
+   *val = get_reg_val(id, vcpu-arch.siar);
+   break;
+   case KVM_REG_PPC_SDAR:
+   *val = get_reg_val(id, vcpu-arch.sdar);
+   break;
 #ifdef CONFIG_VSX
case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
if (cpu_has_feature(CPU_FTR_VSX)) {
@@ -833,6 +839,12 @@ int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, 
union kvmppc_one_reg *val)
i = id - KVM_REG_PPC_PMC1;
vcpu-arch.pmc[i] = set_reg_val(id, *val);
break;
+   case KVM_REG_PPC_SIAR:
+   vcpu-arch.siar = set_reg_val(id, *val);
+   break;
+   case KVM_REG_PPC_SDAR:
+   vcpu-arch.sdar = set_reg_val(id, *val);
+   break;
 #ifdef CONFIG_VSX
case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
if (cpu_has_feature(CPU_FTR_VSX)) {
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S 
b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 294b7af..541aea0 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -200,8 +200,12 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
ld  r3, VCPU_MMCR(r4)
ld  r5, VCPU_MMCR + 8(r4)
ld  r6, VCPU_MMCR + 16(r4)
+   ld  r7, VCPU_SIAR(r4)
+   ld  r8, VCPU_SDAR(r4)
mtspr   SPRN_MMCR1, r5
mtspr   SPRN_MMCRA, r6
+   mtspr   SPRN_SIAR, r7
+   mtspr   SPRN_SDAR, r8
mtspr   SPRN_MMCR0, r3
isync
 
@@ -1134,9 +1138,13 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
std r3, VCPU_MMCR(r9)   /* if not, set saved MMCR0 to FC */
b   22f
 21:mfspr   r5, SPRN_MMCR1
+   mfspr   r7, SPRN_SIAR
+   mfspr   r8, SPRN_SDAR
std r4, VCPU_MMCR(r9)
std r5, VCPU_MMCR + 8(r9)
std r6, VCPU_MMCR + 16(r9)
+   std r7, VCPU_SIAR(r9)
+   std r8, VCPU_SDAR(r9)
mfspr   r3, SPRN_PMC1
mfspr   r4, SPRN_PMC2
mfspr   r5, SPRN_PMC3
-- 
1.8.1.4

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[PULL 05/51] KVM: PPC: Book3S HV: Implement H_CONFER

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

The H_CONFER hypercall is used when a guest vcpu is spinning on a lock
held by another vcpu which has been preempted, and the spinning vcpu
wishes to give its timeslice to the lock holder.  We implement this
in the straightforward way using kvm_vcpu_yield_to().

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/book3s_hv.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 56f57af..a010aa4 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -538,6 +538,15 @@ int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
}
break;
case H_CONFER:
+   target = kvmppc_get_gpr(vcpu, 4);
+   if (target == -1)
+   break;
+   tvcpu = kvmppc_find_vcpu(vcpu-kvm, target);
+   if (!tvcpu) {
+   ret = H_PARAMETER;
+   break;
+   }
+   kvm_vcpu_yield_to(tvcpu);
break;
case H_REGISTER_VPA:
ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4),
-- 
1.8.1.4

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[PULL 44/51] kvm: powerpc: book3s: Cleanup interrupt handling code

2013-10-31 Thread Alexander Graf
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

With this patch if HV is included, interrupts come in to the HV version
of the kvmppc_interrupt code, which then jumps to the PR handler,
renamed to kvmppc_interrupt_pr, if the guest is a PR guest. This helps
in enabling both HV and PR, which we do in later patch

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/exception-64s.h | 11 +++
 arch/powerpc/kvm/book3s_hv_rmhandlers.S  |  9 +++--
 arch/powerpc/kvm/book3s_segment.S|  4 ++--
 3 files changed, 20 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/include/asm/exception-64s.h 
b/arch/powerpc/include/asm/exception-64s.h
index a22c985..894662a 100644
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -198,6 +198,17 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
cmpwi   r10,0;  \
bne do_kvm_##n
 
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
+/*
+ * If hv is possible, interrupts come into to the hv version
+ * of the kvmppc_interrupt code, which then jumps to the PR handler,
+ * kvmppc_interrupt_pr, if the guest is a PR guest.
+ */
+#define kvmppc_interrupt kvmppc_interrupt_hv
+#else
+#define kvmppc_interrupt kvmppc_interrupt_pr
+#endif
+
 #define __KVM_HANDLER(area, h, n)  \
 do_kvm_##n:\
BEGIN_FTR_SECTION_NESTED(947)   \
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S 
b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 84105eb..f7e24c6 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -742,8 +742,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
 /*
  * We come here from the first-level interrupt handlers.
  */
-   .globl  kvmppc_interrupt
-kvmppc_interrupt:
+   .globl  kvmppc_interrupt_hv
+kvmppc_interrupt_hv:
/*
 * Register contents:
 * R12  = interrupt vector
@@ -757,6 +757,11 @@ kvmppc_interrupt:
lbz r9, HSTATE_IN_GUEST(r13)
cmpwi   r9, KVM_GUEST_MODE_HOST_HV
beq kvmppc_bad_host_intr
+#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
+   cmpwi   r9, KVM_GUEST_MODE_GUEST
+   ld  r9, HSTATE_HOST_R2(r13)
+   beq kvmppc_interrupt_pr
+#endif
/* We're now back in the host but in guest MMU context */
li  r9, KVM_GUEST_MODE_HOST_HV
stb r9, HSTATE_IN_GUEST(r13)
diff --git a/arch/powerpc/kvm/book3s_segment.S 
b/arch/powerpc/kvm/book3s_segment.S
index 1abe478..bc50c97 100644
--- a/arch/powerpc/kvm/book3s_segment.S
+++ b/arch/powerpc/kvm/book3s_segment.S
@@ -161,8 +161,8 @@ kvmppc_handler_trampoline_enter_end:
 .global kvmppc_handler_trampoline_exit
 kvmppc_handler_trampoline_exit:
 
-.global kvmppc_interrupt
-kvmppc_interrupt:
+.global kvmppc_interrupt_pr
+kvmppc_interrupt_pr:
 
/* Register usage at this point:
 *
-- 
1.8.1.4

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[PULL 49/51] kvm: Add struct kvm arg to memslot APIs

2013-10-31 Thread Alexander Graf
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

We will use that in the later patch to find the kvm ops handler

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/arm/kvm/arm.c |  5 +++--
 arch/ia64/kvm/kvm-ia64.c   |  5 +++--
 arch/mips/kvm/kvm_mips.c   |  5 +++--
 arch/powerpc/include/asm/kvm_ppc.h |  6 --
 arch/powerpc/kvm/book3s.c  |  4 ++--
 arch/powerpc/kvm/booke.c   |  4 ++--
 arch/powerpc/kvm/powerpc.c |  9 +
 arch/s390/kvm/kvm-s390.c   |  5 +++--
 arch/x86/kvm/x86.c |  5 +++--
 include/linux/kvm_host.h   |  5 +++--
 virt/kvm/kvm_main.c| 12 ++--
 11 files changed, 37 insertions(+), 28 deletions(-)

diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index cc5adb9..e312e4a 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -152,12 +152,13 @@ int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct 
vm_fault *vmf)
return VM_FAULT_SIGBUS;
 }
 
-void kvm_arch_free_memslot(struct kvm_memory_slot *free,
+void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
   struct kvm_memory_slot *dont)
 {
 }
 
-int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
+int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
+   unsigned long npages)
 {
return 0;
 }
diff --git a/arch/ia64/kvm/kvm-ia64.c b/arch/ia64/kvm/kvm-ia64.c
index bdfd878..985bf80 100644
--- a/arch/ia64/kvm/kvm-ia64.c
+++ b/arch/ia64/kvm/kvm-ia64.c
@@ -1550,12 +1550,13 @@ int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct 
vm_fault *vmf)
return VM_FAULT_SIGBUS;
 }
 
-void kvm_arch_free_memslot(struct kvm_memory_slot *free,
+void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
   struct kvm_memory_slot *dont)
 {
 }
 
-int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
+int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
+   unsigned long npages)
 {
return 0;
 }
diff --git a/arch/mips/kvm/kvm_mips.c b/arch/mips/kvm/kvm_mips.c
index a7b0445..73b3482 100644
--- a/arch/mips/kvm/kvm_mips.c
+++ b/arch/mips/kvm/kvm_mips.c
@@ -198,12 +198,13 @@ kvm_arch_dev_ioctl(struct file *filp, unsigned int ioctl, 
unsigned long arg)
return -ENOIOCTLCMD;
 }
 
-void kvm_arch_free_memslot(struct kvm_memory_slot *free,
+void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
   struct kvm_memory_slot *dont)
 {
 }
 
-int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
+int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
+   unsigned long npages)
 {
return 0;
 }
diff --git a/arch/powerpc/include/asm/kvm_ppc.h 
b/arch/powerpc/include/asm/kvm_ppc.h
index c13f15d..20f4616 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -134,9 +134,11 @@ extern struct page *kvm_alloc_hpt(unsigned long nr_pages);
 extern void kvm_release_hpt(struct page *page, unsigned long nr_pages);
 extern int kvmppc_core_init_vm(struct kvm *kvm);
 extern void kvmppc_core_destroy_vm(struct kvm *kvm);
-extern void kvmppc_core_free_memslot(struct kvm_memory_slot *free,
+extern void kvmppc_core_free_memslot(struct kvm *kvm,
+struct kvm_memory_slot *free,
 struct kvm_memory_slot *dont);
-extern int kvmppc_core_create_memslot(struct kvm_memory_slot *slot,
+extern int kvmppc_core_create_memslot(struct kvm *kvm,
+ struct kvm_memory_slot *slot,
  unsigned long npages);
 extern int kvmppc_core_prepare_memory_region(struct kvm *kvm,
struct kvm_memory_slot *memslot,
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index 39d2994..130fe1d 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -761,13 +761,13 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct 
kvm_dirty_log *log)
return kvmppc_ops-get_dirty_log(kvm, log);
 }
 
-void kvmppc_core_free_memslot(struct kvm_memory_slot *free,
+void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
  struct kvm_memory_slot *dont)
 {
kvmppc_ops-free_memslot(free, dont);
 }
 
-int kvmppc_core_create_memslot(struct kvm_memory_slot *slot,
+int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
   unsigned long npages)
 {
return kvmppc_ops-create_memslot(slot, npages);
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 1769354..cb2d986 100644
--- a/arch/powerpc/kvm/booke.c
+++ 

[PULL 41/51] kvm: powerpc: book3s: pr: Rename KVM_BOOK3S_PR to KVM_BOOK3S_PR_POSSIBLE

2013-10-31 Thread Alexander Graf
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

With later patches supporting PR kvm as a kernel module, the changes
that has to be built into the main kernel binary to enable PR KVM module
is now selected via KVM_BOOK3S_PR_POSSIBLE

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/exception-64s.h |  2 +-
 arch/powerpc/include/asm/kvm_book3s.h|  4 ++--
 arch/powerpc/include/asm/kvm_book3s_64.h |  2 +-
 arch/powerpc/include/asm/kvm_host.h  |  2 +-
 arch/powerpc/include/asm/paca.h  |  2 +-
 arch/powerpc/kernel/asm-offsets.c|  2 +-
 arch/powerpc/kernel/exceptions-64s.S |  2 +-
 arch/powerpc/kvm/Kconfig |  6 +++---
 arch/powerpc/kvm/trace.h | 10 +-
 9 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/arch/powerpc/include/asm/exception-64s.h 
b/arch/powerpc/include/asm/exception-64s.h
index 402c1c4..a22c985 100644
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -244,7 +244,7 @@ do_kvm_##n: 
\
 #define KVM_HANDLER_SKIP(area, h, n)
 #endif
 
-#ifdef CONFIG_KVM_BOOK3S_PR
+#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
 #define KVMTEST_PR(n)  __KVMTEST(n)
 #define KVM_HANDLER_PR(area, h, n) __KVM_HANDLER(area, h, n)
 #define KVM_HANDLER_PR_SKIP(area, h, n)__KVM_HANDLER_SKIP(area, h, n)
diff --git a/arch/powerpc/include/asm/kvm_book3s.h 
b/arch/powerpc/include/asm/kvm_book3s.h
index 0ec00f4..5c07d10 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -304,7 +304,7 @@ static inline ulong kvmppc_get_fault_dar(struct kvm_vcpu 
*vcpu)
return vcpu-arch.fault_dar;
 }
 
-#ifdef CONFIG_KVM_BOOK3S_PR
+#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
 
 static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
 {
@@ -339,7 +339,7 @@ static inline bool kvmppc_critical_section(struct kvm_vcpu 
*vcpu)
 
return crit;
 }
-#else /* CONFIG_KVM_BOOK3S_PR */
+#else /* CONFIG_KVM_BOOK3S_PR_POSSIBLE */
 
 static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
 {
diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h 
b/arch/powerpc/include/asm/kvm_book3s_64.h
index 86d638a..e6ee7fd 100644
--- a/arch/powerpc/include/asm/kvm_book3s_64.h
+++ b/arch/powerpc/include/asm/kvm_book3s_64.h
@@ -20,7 +20,7 @@
 #ifndef __ASM_KVM_BOOK3S_64_H__
 #define __ASM_KVM_BOOK3S_64_H__
 
-#ifdef CONFIG_KVM_BOOK3S_PR
+#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
 static inline struct kvmppc_book3s_shadow_vcpu *svcpu_get(struct kvm_vcpu 
*vcpu)
 {
preempt_disable();
diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index 4959ff1..9e9f689 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -257,7 +257,7 @@ struct kvm_arch {
struct kvmppc_vcore *vcores[KVM_MAX_VCORES];
int hpt_cma_alloc;
 #endif /* CONFIG_KVM_BOOK3S_64_HV */
-#ifdef CONFIG_KVM_BOOK3S_PR
+#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
struct mutex hpt_mutex;
 #endif
 #ifdef CONFIG_PPC_BOOK3S_64
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index a5954ce..b6ea9e0 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -166,7 +166,7 @@ struct paca_struct {
struct dtl_entry *dtl_curr; /* pointer corresponding to dtl_ridx */
 
 #ifdef CONFIG_KVM_BOOK3S_HANDLER
-#ifdef CONFIG_KVM_BOOK3S_PR
+#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
/* We use this to store guest state in */
struct kvmppc_book3s_shadow_vcpu shadow_vcpu;
 #endif
diff --git a/arch/powerpc/kernel/asm-offsets.c 
b/arch/powerpc/kernel/asm-offsets.c
index 95ba809..2979655 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -533,7 +533,7 @@ int main(void)
DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
 
 #ifdef CONFIG_PPC_BOOK3S_64
-#ifdef CONFIG_KVM_BOOK3S_PR
+#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
DEFINE(PACA_SVCPU, offsetof(struct paca_struct, shadow_vcpu));
 # define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, 
shadow_vcpu.f))
 #else
diff --git a/arch/powerpc/kernel/exceptions-64s.S 
b/arch/powerpc/kernel/exceptions-64s.S
index 2a273be..3d1c42b 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -425,7 +425,7 @@ data_access_check_stab:
mfspr   r9,SPRN_DSISR
srdir10,r10,60
rlwimi  r10,r9,16,0x20
-#ifdef CONFIG_KVM_BOOK3S_PR
+#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
lbz r9,HSTATE_IN_GUEST(r13)
rlwimi  r10,r9,8,0x300
 #endif
diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig
index ffaef2c..d0665f2 100644
--- a/arch/powerpc/kvm/Kconfig
+++ b/arch/powerpc/kvm/Kconfig
@@ -34,7 +34,7 @@ config KVM_BOOK3S_64_HANDLER
 

[PULL 42/51] kvm: powerpc: book3s: Add a new config variable CONFIG_KVM_BOOK3S_HV_POSSIBLE

2013-10-31 Thread Alexander Graf
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

This help ups to select the relevant code in the kernel code
when we later move HV and PR bits as seperate modules. The patch
also makes the config options for PR KVM selectable

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_book3s.h |  2 --
 arch/powerpc/include/asm/kvm_book3s_64.h  |  6 +++---
 arch/powerpc/include/asm/kvm_book3s_asm.h |  2 +-
 arch/powerpc/include/asm/kvm_host.h   | 10 +-
 arch/powerpc/include/asm/kvm_ppc.h|  2 +-
 arch/powerpc/kernel/asm-offsets.c |  8 
 arch/powerpc/kernel/idle_power7.S |  2 +-
 arch/powerpc/kvm/Kconfig  | 18 +-
 arch/powerpc/kvm/Makefile | 12 
 arch/powerpc/kvm/book3s_exports.c |  5 +++--
 10 files changed, 43 insertions(+), 24 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_book3s.h 
b/arch/powerpc/include/asm/kvm_book3s.h
index 5c07d10..99ef871 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -199,8 +199,6 @@ static inline struct kvmppc_vcpu_book3s *to_book3s(struct 
kvm_vcpu *vcpu)
return vcpu-arch.book3s;
 }
 
-extern void kvm_return_point(void);
-
 /* Also add subarch specific defines */
 
 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h 
b/arch/powerpc/include/asm/kvm_book3s_64.h
index e6ee7fd..bf0fa8b 100644
--- a/arch/powerpc/include/asm/kvm_book3s_64.h
+++ b/arch/powerpc/include/asm/kvm_book3s_64.h
@@ -35,7 +35,7 @@ static inline void svcpu_put(struct kvmppc_book3s_shadow_vcpu 
*svcpu)
 
 #define SPAPR_TCE_SHIFT12
 
-#ifdef CONFIG_KVM_BOOK3S_64_HV
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 #define KVM_DEFAULT_HPT_ORDER  24  /* 16MB HPT by default */
 extern unsigned long kvm_rma_pages;
 #endif
@@ -278,7 +278,7 @@ static inline int is_vrma_hpte(unsigned long hpte_v)
(HPTE_V_1TB_SEG | (VRMA_VSID  (40 - 16)));
 }
 
-#ifdef CONFIG_KVM_BOOK3S_64_HV
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 /*
  * Note modification of an HPTE; set the HPTE modified bit
  * if anyone is interested.
@@ -289,6 +289,6 @@ static inline void note_hpte_modification(struct kvm *kvm,
if (atomic_read(kvm-arch.hpte_mod_interest))
rev-guest_rpte |= HPTE_GR_MODIFIED;
 }
-#endif /* CONFIG_KVM_BOOK3S_64_HV */
+#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
 
 #endif /* __ASM_KVM_BOOK3S_64_H__ */
diff --git a/arch/powerpc/include/asm/kvm_book3s_asm.h 
b/arch/powerpc/include/asm/kvm_book3s_asm.h
index 6273711..0bd9348 100644
--- a/arch/powerpc/include/asm/kvm_book3s_asm.h
+++ b/arch/powerpc/include/asm/kvm_book3s_asm.h
@@ -83,7 +83,7 @@ struct kvmppc_host_state {
u8 restore_hid5;
u8 napping;
 
-#ifdef CONFIG_KVM_BOOK3S_64_HV
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
u8 hwthread_req;
u8 hwthread_state;
u8 host_ipi;
diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index 9e9f689..61ce4dc 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -224,15 +224,15 @@ struct revmap_entry {
 #define KVMPPC_GOT_PAGE0x80
 
 struct kvm_arch_memory_slot {
-#ifdef CONFIG_KVM_BOOK3S_64_HV
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
unsigned long *rmap;
unsigned long *slot_phys;
-#endif /* CONFIG_KVM_BOOK3S_64_HV */
+#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
 };
 
 struct kvm_arch {
unsigned int lpid;
-#ifdef CONFIG_KVM_BOOK3S_64_HV
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
unsigned long hpt_virt;
struct revmap_entry *revmap;
unsigned int host_lpid;
@@ -256,7 +256,7 @@ struct kvm_arch {
cpumask_t need_tlb_flush;
struct kvmppc_vcore *vcores[KVM_MAX_VCORES];
int hpt_cma_alloc;
-#endif /* CONFIG_KVM_BOOK3S_64_HV */
+#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
struct mutex hpt_mutex;
 #endif
@@ -592,7 +592,7 @@ struct kvm_vcpu_arch {
struct kvmppc_icp *icp; /* XICS presentation controller */
 #endif
 
-#ifdef CONFIG_KVM_BOOK3S_64_HV
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
struct kvm_vcpu_arch_shared shregs;
 
unsigned long pgfault_addr;
diff --git a/arch/powerpc/include/asm/kvm_ppc.h 
b/arch/powerpc/include/asm/kvm_ppc.h
index b15554a..1823f38 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -260,7 +260,7 @@ void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid);
 
 struct openpic;
 
-#ifdef CONFIG_KVM_BOOK3S_64_HV
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 extern void kvm_cma_reserve(void) __init;
 static inline void kvmppc_set_xics_phys(int cpu, unsigned long addr)
 {
diff --git a/arch/powerpc/kernel/asm-offsets.c 
b/arch/powerpc/kernel/asm-offsets.c
index 2979655..1fbb2b6 100644
--- 

[PULL 51/51] kvm: powerpc: book3s: drop is_hv_enabled

2013-10-31 Thread Alexander Graf
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

drop is_hv_enabled, because that should not be a callback property

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_ppc.h | 6 +-
 arch/powerpc/kvm/book3s.c  | 6 +++---
 arch/powerpc/kvm/book3s_hv.c   | 1 -
 arch/powerpc/kvm/book3s_pr.c   | 1 -
 arch/powerpc/kvm/book3s_xics.c | 2 +-
 arch/powerpc/kvm/powerpc.c | 2 +-
 6 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_ppc.h 
b/arch/powerpc/include/asm/kvm_ppc.h
index 3069cf4..c8317fb 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -183,7 +183,6 @@ union kvmppc_one_reg {
 
 struct kvmppc_ops {
struct module *owner;
-   bool is_hv_enabled;
int (*get_sregs)(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
int (*set_sregs)(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
int (*get_one_reg)(struct kvm_vcpu *vcpu, u64 id,
@@ -232,6 +231,11 @@ struct kvmppc_ops {
 extern struct kvmppc_ops *kvmppc_hv_ops;
 extern struct kvmppc_ops *kvmppc_pr_ops;
 
+static inline bool is_kvmppc_hv_enabled(struct kvm *kvm)
+{
+   return kvm-arch.kvm_ops == kvmppc_hv_ops;
+}
+
 /*
  * Cuts out inst bits with ordering according to spec.
  * That means the leftmost bit is zero. All given bits are included.
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index ad8f6ed..8912608 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -72,7 +72,7 @@ void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)
 
 static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
 {
-   if (!vcpu-kvm-arch.kvm_ops-is_hv_enabled)
+   if (!is_kvmppc_hv_enabled(vcpu-kvm))
return to_book3s(vcpu)-hior;
return 0;
 }
@@ -80,7 +80,7 @@ static inline unsigned long kvmppc_interrupt_offset(struct 
kvm_vcpu *vcpu)
 static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
unsigned long pending_now, unsigned long old_pending)
 {
-   if (vcpu-kvm-arch.kvm_ops-is_hv_enabled)
+   if (is_kvmppc_hv_enabled(vcpu-kvm))
return;
if (pending_now)
vcpu-arch.shared-int_pending = 1;
@@ -94,7 +94,7 @@ static inline bool kvmppc_critical_section(struct kvm_vcpu 
*vcpu)
ulong crit_r1;
bool crit;
 
-   if (vcpu-kvm-arch.kvm_ops-is_hv_enabled)
+   if (is_kvmppc_hv_enabled(vcpu-kvm))
return false;
 
crit_raw = vcpu-arch.shared-critical;
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 8743048..072287f 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -2160,7 +2160,6 @@ static long kvm_arch_vm_ioctl_hv(struct file *filp,
 }
 
 static struct kvmppc_ops kvm_ops_hv = {
-   .is_hv_enabled = true,
.get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv,
.set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv,
.get_one_reg = kvmppc_get_one_reg_hv,
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index fbd985f..df36cf2 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -1526,7 +1526,6 @@ static long kvm_arch_vm_ioctl_pr(struct file *filp,
 }
 
 static struct kvmppc_ops kvm_ops_pr = {
-   .is_hv_enabled = false,
.get_sregs = kvm_arch_vcpu_ioctl_get_sregs_pr,
.set_sregs = kvm_arch_vcpu_ioctl_set_sregs_pr,
.get_one_reg = kvmppc_get_one_reg_pr,
diff --git a/arch/powerpc/kvm/book3s_xics.c b/arch/powerpc/kvm/book3s_xics.c
index f7a5108..02a17dc 100644
--- a/arch/powerpc/kvm/book3s_xics.c
+++ b/arch/powerpc/kvm/book3s_xics.c
@@ -818,7 +818,7 @@ int kvmppc_xics_hcall(struct kvm_vcpu *vcpu, u32 req)
}
 
/* Check for real mode returning too hard */
-   if (xics-real_mode  vcpu-kvm-arch.kvm_ops-is_hv_enabled)
+   if (xics-real_mode  is_kvmppc_hv_enabled(vcpu-kvm))
return kvmppc_xics_rm_complete(vcpu, req);
 
switch (req) {
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index 0320c17..9ae9768 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -200,7 +200,7 @@ int kvmppc_sanity_check(struct kvm_vcpu *vcpu)
goto out;
 
/* HV KVM can only do PAPR mode for now */
-   if (!vcpu-arch.papr_enabled  vcpu-kvm-arch.kvm_ops-is_hv_enabled)
+   if (!vcpu-arch.papr_enabled  is_kvmppc_hv_enabled(vcpu-kvm))
goto out;
 
 #ifdef CONFIG_KVM_BOOKE_HV
-- 
1.8.1.4

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[PULL 34/51] powerpc: move debug registers in a structure

2013-10-31 Thread Alexander Graf
From: Bharat Bhushan r65...@freescale.com

This way we can use same data type struct with KVM and
also help in using other debug related function.

Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/processor.h |  38 +
 arch/powerpc/include/asm/reg_booke.h |   8 +-
 arch/powerpc/kernel/asm-offsets.c|   2 +-
 arch/powerpc/kernel/process.c|  42 +-
 arch/powerpc/kernel/ptrace.c | 154 +--
 arch/powerpc/kernel/ptrace32.c   |   2 +-
 arch/powerpc/kernel/signal_32.c  |   6 +-
 arch/powerpc/kernel/traps.c  |  35 
 8 files changed, 147 insertions(+), 140 deletions(-)

diff --git a/arch/powerpc/include/asm/processor.h 
b/arch/powerpc/include/asm/processor.h
index e378ccc..b438444 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -147,22 +147,7 @@ typedef struct {
 #define TS_FPR(i) fpr[i][TS_FPROFFSET]
 #define TS_TRANS_FPR(i) transact_fpr[i][TS_FPROFFSET]
 
-struct thread_struct {
-   unsigned long   ksp;/* Kernel stack pointer */
-   unsigned long   ksp_limit;  /* if ksp = ksp_limit stack overflow */
-
-#ifdef CONFIG_PPC64
-   unsigned long   ksp_vsid;
-#endif
-   struct pt_regs  *regs;  /* Pointer to saved register state */
-   mm_segment_tfs; /* for get_fs() validation */
-#ifdef CONFIG_BOOKE
-   /* BookE base exception scratch space; align on cacheline */
-   unsigned long   normsave[8] cacheline_aligned;
-#endif
-#ifdef CONFIG_PPC32
-   void*pgdir; /* root of page-table tree */
-#endif
+struct debug_reg {
 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
/*
 * The following help to manage the use of Debug Control Registers
@@ -199,6 +184,27 @@ struct thread_struct {
unsigned long   dvc2;
 #endif
 #endif
+};
+
+struct thread_struct {
+   unsigned long   ksp;/* Kernel stack pointer */
+   unsigned long   ksp_limit;  /* if ksp = ksp_limit stack overflow */
+
+#ifdef CONFIG_PPC64
+   unsigned long   ksp_vsid;
+#endif
+   struct pt_regs  *regs;  /* Pointer to saved register state */
+   mm_segment_tfs; /* for get_fs() validation */
+#ifdef CONFIG_BOOKE
+   /* BookE base exception scratch space; align on cacheline */
+   unsigned long   normsave[8] cacheline_aligned;
+#endif
+#ifdef CONFIG_PPC32
+   void*pgdir; /* root of page-table tree */
+#endif
+   /* Debug Registers */
+   struct debug_reg debug;
+
/* FP and VSX 0-31 register set */
double  fpr[32][TS_FPRWIDTH] __attribute__((aligned(16)));
struct {
diff --git a/arch/powerpc/include/asm/reg_booke.h 
b/arch/powerpc/include/asm/reg_booke.h
index ed8f836..2e31aac 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -381,7 +381,7 @@
 #define DBCR0_IA34T0x4000  /* Instr Addr 3-4 range Toggle */
 #define DBCR0_FT   0x0001  /* Freeze Timers on debug event */
 
-#define dbcr_iac_range(task)   ((task)-thread.dbcr0)
+#define dbcr_iac_range(task)   ((task)-thread.debug.dbcr0)
 #define DBCR_IAC12IDBCR0_IA12  /* Range Inclusive */
 #define DBCR_IAC12X(DBCR0_IA12 | DBCR0_IA12X)  /* Range Exclusive */
 #define DBCR_IAC12MODE (DBCR0_IA12 | DBCR0_IA12X)  /* IAC 1-2 Mode Bits */
@@ -395,7 +395,7 @@
 #define DBCR1_DAC1W0x2000  /* DAC1 Write Debug Event */
 #define DBCR1_DAC2W0x1000  /* DAC2 Write Debug Event */
 
-#define dbcr_dac(task) ((task)-thread.dbcr1)
+#define dbcr_dac(task) ((task)-thread.debug.dbcr1)
 #define DBCR_DAC1R DBCR1_DAC1R
 #define DBCR_DAC1W DBCR1_DAC1W
 #define DBCR_DAC2R DBCR1_DAC2R
@@ -441,7 +441,7 @@
 #define DBCR0_CRET 0x0020  /* Critical Return Debug Event */
 #define DBCR0_FT   0x0001  /* Freeze Timers on debug event */
 
-#define dbcr_dac(task) ((task)-thread.dbcr0)
+#define dbcr_dac(task) ((task)-thread.debug.dbcr0)
 #define DBCR_DAC1R DBCR0_DAC1R
 #define DBCR_DAC1W DBCR0_DAC1W
 #define DBCR_DAC2R DBCR0_DAC2R
@@ -475,7 +475,7 @@
 #define DBCR1_IAC34MX  0x00C0  /* Instr Addr 3-4 range eXclusive */
 #define DBCR1_IAC34AT  0x0001  /* Instr Addr 3-4 range Toggle */
 
-#define dbcr_iac_range(task)   ((task)-thread.dbcr1)
+#define dbcr_iac_range(task)   ((task)-thread.debug.dbcr1)
 #define DBCR_IAC12IDBCR1_IAC12M/* Range Inclusive */
 #define DBCR_IAC12XDBCR1_IAC12MX   /* Range Exclusive */
 #define DBCR_IAC12MODE DBCR1_IAC12MX   /* IAC 1-2 Mode Bits */
diff --git a/arch/powerpc/kernel/asm-offsets.c 
b/arch/powerpc/kernel/asm-offsets.c
index fda7f40..95ba809 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -113,7 +113,7 @@ int main(void)
 #endif /* CONFIG_SPE */
 

[PULL 35/51] powerpc: export debug registers save function for KVM

2013-10-31 Thread Alexander Graf
From: Bharat Bhushan r65...@freescale.com

KVM need this function when switching from vcpu to user-space
thread. My subsequent patch will use this function.

Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
Acked-by: Michael Neuling mi...@neuling.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/switch_to.h | 1 +
 arch/powerpc/kernel/process.c| 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/switch_to.h 
b/arch/powerpc/include/asm/switch_to.h
index 2be5618..9ee1261 100644
--- a/arch/powerpc/include/asm/switch_to.h
+++ b/arch/powerpc/include/asm/switch_to.h
@@ -35,6 +35,7 @@ extern void giveup_vsx(struct task_struct *);
 extern void enable_kernel_spe(void);
 extern void giveup_spe(struct task_struct *);
 extern void load_up_spe(struct task_struct *);
+extern void switch_booke_debug_regs(struct thread_struct *new_thread);
 
 #ifndef CONFIG_SMP
 extern void discard_lazy_cpu_state(void);
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index a2b9231..c24a906 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -371,12 +371,13 @@ static void prime_debug_regs(struct thread_struct *thread)
  * debug registers, set the debug registers from the values
  * stored in the new thread.
  */
-static void switch_booke_debug_regs(struct thread_struct *new_thread)
+void switch_booke_debug_regs(struct thread_struct *new_thread)
 {
if ((current-thread.debug.dbcr0  DBCR0_IDM)
|| (new_thread-debug.dbcr0  DBCR0_IDM))
prime_debug_regs(new_thread);
 }
+EXPORT_SYMBOL_GPL(switch_booke_debug_regs);
 #else  /* !CONFIG_PPC_ADV_DEBUG_REGS */
 #ifndef CONFIG_HAVE_HW_BREAKPOINT
 static void set_debug_reg_defaults(struct thread_struct *thread)
-- 
1.8.1.4

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[PULL 31/51] kvm: powerpc: allow guest control G attribute in mas2

2013-10-31 Thread Alexander Graf
From: Bharat Bhushan r65...@freescale.com

G bit in MAS2 indicates whether the page is Guarded.
There is no reason to stop guest setting  G, so allow him.

Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/e500.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/kvm/e500.h b/arch/powerpc/kvm/e500.h
index 277cb18..4fd9650 100644
--- a/arch/powerpc/kvm/e500.h
+++ b/arch/powerpc/kvm/e500.h
@@ -117,7 +117,7 @@ static inline struct kvmppc_vcpu_e500 *to_e500(struct 
kvm_vcpu *vcpu)
 #define E500_TLB_USER_PERM_MASK (MAS3_UX|MAS3_UR|MAS3_UW)
 #define E500_TLB_SUPER_PERM_MASK (MAS3_SX|MAS3_SR|MAS3_SW)
 #define MAS2_ATTRIB_MASK \
- (MAS2_X0 | MAS2_X1 | MAS2_E)
+ (MAS2_X0 | MAS2_X1 | MAS2_E | MAS2_G)
 #define MAS3_ATTRIB_MASK \
  (MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3 \
   | E500_TLB_USER_PERM_MASK | E500_TLB_SUPER_PERM_MASK)
-- 
1.8.1.4

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[PULL 47/51] kvm: powerpc: booke: Move booke related tracepoints to separate header

2013-10-31 Thread Alexander Graf
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/booke.c |   4 +-
 arch/powerpc/kvm/e500_mmu.c  |   2 +-
 arch/powerpc/kvm/e500_mmu_host.c |   3 +-
 arch/powerpc/kvm/trace.h | 204 ---
 arch/powerpc/kvm/trace_booke.h   | 177 +
 5 files changed, 183 insertions(+), 207 deletions(-)
 create mode 100644 arch/powerpc/kvm/trace_booke.h

diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index e5f8ba7..1769354 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -40,7 +40,9 @@
 
 #include timing.h
 #include booke.h
-#include trace.h
+
+#define CREATE_TRACE_POINTS
+#include trace_booke.h
 
 unsigned long kvmppc_booke_handlers;
 
diff --git a/arch/powerpc/kvm/e500_mmu.c b/arch/powerpc/kvm/e500_mmu.c
index d25bb75..ebca6b8 100644
--- a/arch/powerpc/kvm/e500_mmu.c
+++ b/arch/powerpc/kvm/e500_mmu.c
@@ -32,7 +32,7 @@
 #include asm/kvm_ppc.h
 
 #include e500.h
-#include trace.h
+#include trace_booke.h
 #include timing.h
 #include e500_mmu_host.h
 
diff --git a/arch/powerpc/kvm/e500_mmu_host.c b/arch/powerpc/kvm/e500_mmu_host.c
index 8f0d532..e7dde4b 100644
--- a/arch/powerpc/kvm/e500_mmu_host.c
+++ b/arch/powerpc/kvm/e500_mmu_host.c
@@ -32,10 +32,11 @@
 #include asm/kvm_ppc.h
 
 #include e500.h
-#include trace.h
 #include timing.h
 #include e500_mmu_host.h
 
+#include trace_booke.h
+
 #define to_htlb1_esel(esel) (host_tlb_params[1].entries - (esel) - 1)
 
 static struct kvmppc_e500_tlb_params host_tlb_params[E500_TLB_NUM];
diff --git a/arch/powerpc/kvm/trace.h b/arch/powerpc/kvm/trace.h
index 80f252a..2e0e67e 100644
--- a/arch/powerpc/kvm/trace.h
+++ b/arch/powerpc/kvm/trace.h
@@ -31,116 +31,6 @@ TRACE_EVENT(kvm_ppc_instr,
  __entry-inst, __entry-pc, __entry-emulate)
 );
 
-#ifdef CONFIG_PPC_BOOK3S
-#define kvm_trace_symbol_exit \
-   {0x100, SYSTEM_RESET}, \
-   {0x200, MACHINE_CHECK}, \
-   {0x300, DATA_STORAGE}, \
-   {0x380, DATA_SEGMENT}, \
-   {0x400, INST_STORAGE}, \
-   {0x480, INST_SEGMENT}, \
-   {0x500, EXTERNAL}, \
-   {0x501, EXTERNAL_LEVEL}, \
-   {0x502, EXTERNAL_HV}, \
-   {0x600, ALIGNMENT}, \
-   {0x700, PROGRAM}, \
-   {0x800, FP_UNAVAIL}, \
-   {0x900, DECREMENTER}, \
-   {0x980, HV_DECREMENTER}, \
-   {0xc00, SYSCALL}, \
-   {0xd00, TRACE}, \
-   {0xe00, H_DATA_STORAGE}, \
-   {0xe20, H_INST_STORAGE}, \
-   {0xe40, H_EMUL_ASSIST}, \
-   {0xf00, PERFMON}, \
-   {0xf20, ALTIVEC}, \
-   {0xf40, VSX}
-#else
-#define kvm_trace_symbol_exit \
-   {0, CRITICAL}, \
-   {1, MACHINE_CHECK}, \
-   {2, DATA_STORAGE}, \
-   {3, INST_STORAGE}, \
-   {4, EXTERNAL}, \
-   {5, ALIGNMENT}, \
-   {6, PROGRAM}, \
-   {7, FP_UNAVAIL}, \
-   {8, SYSCALL}, \
-   {9, AP_UNAVAIL}, \
-   {10, DECREMENTER}, \
-   {11, FIT}, \
-   {12, WATCHDOG}, \
-   {13, DTLB_MISS}, \
-   {14, ITLB_MISS}, \
-   {15, DEBUG}, \
-   {32, SPE_UNAVAIL}, \
-   {33, SPE_FP_DATA}, \
-   {34, SPE_FP_ROUND}, \
-   {35, PERFORMANCE_MONITOR}, \
-   {36, DOORBELL}, \
-   {37, DOORBELL_CRITICAL}, \
-   {38, GUEST_DBELL}, \
-   {39, GUEST_DBELL_CRIT}, \
-   {40, HV_SYSCALL}, \
-   {41, HV_PRIV}
-#endif
-
-#ifndef CONFIG_KVM_BOOK3S_PR_POSSIBLE
-/*
- * For pr we define this in trace_pr.h since it pr can be built as
- * a module
- */
-
-TRACE_EVENT(kvm_exit,
-   TP_PROTO(unsigned int exit_nr, struct kvm_vcpu *vcpu),
-   TP_ARGS(exit_nr, vcpu),
-
-   TP_STRUCT__entry(
-   __field(unsigned int,   exit_nr )
-   __field(unsigned long,  pc  )
-   __field(unsigned long,  msr )
-   __field(unsigned long,  dar )
-   __field(unsigned long,  last_inst   )
-   ),
-
-   TP_fast_assign(
-   __entry-exit_nr= exit_nr;
-   __entry-pc = kvmppc_get_pc(vcpu);
-   __entry-dar= kvmppc_get_fault_dar(vcpu);
-   __entry-msr= vcpu-arch.shared-msr;
-   __entry-last_inst  = vcpu-arch.last_inst;
-   ),
-
-   TP_printk(exit=%s
-| pc=0x%lx
-| msr=0x%lx
-| dar=0x%lx
-| last_inst=0x%lx
-   ,
-   __print_symbolic(__entry-exit_nr, kvm_trace_symbol_exit),
-   __entry-pc,
-   __entry-msr,
-   __entry-dar,
-   __entry-last_inst
-   )
-);
-
-TRACE_EVENT(kvm_unmap_hva,
-   TP_PROTO(unsigned long hva),
-   TP_ARGS(hva),
-
-   TP_STRUCT__entry(
-   __field(unsigned long,  hva 

[PULL 50/51] kvm: powerpc: book3s: Allow the HV and PR selection per virtual machine

2013-10-31 Thread Alexander Graf
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

This moves the kvmppc_ops callbacks to be a per VM entity. This
enables us to select HV and PR mode when creating a VM. We also
allow both kvm-hv and kvm-pr kernel module to be loaded. To
achieve this we move /dev/kvm ownership to kvm.ko module. Depending on
which KVM mode we select during VM creation we take a reference
count on respective module

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
[agraf: fix coding style]
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_host.h |  1 +
 arch/powerpc/include/asm/kvm_ppc.h  |  7 +--
 arch/powerpc/kvm/44x.c  |  7 ++-
 arch/powerpc/kvm/book3s.c   | 89 +
 arch/powerpc/kvm/book3s.h   |  2 +
 arch/powerpc/kvm/book3s_hv.c| 18 
 arch/powerpc/kvm/book3s_pr.c| 25 +++
 arch/powerpc/kvm/book3s_xics.c  |  2 +-
 arch/powerpc/kvm/booke.c| 22 -
 arch/powerpc/kvm/e500.c |  8 +++-
 arch/powerpc/kvm/e500mc.c   |  6 ++-
 arch/powerpc/kvm/emulate.c  | 11 ++---
 arch/powerpc/kvm/powerpc.c  | 76 ++-
 include/uapi/linux/kvm.h|  4 ++
 14 files changed, 187 insertions(+), 91 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index 61ce4dc..237d1d2 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -270,6 +270,7 @@ struct kvm_arch {
 #ifdef CONFIG_KVM_XICS
struct kvmppc_xics *xics;
 #endif
+   struct kvmppc_ops *kvm_ops;
 };
 
 /*
diff --git a/arch/powerpc/include/asm/kvm_ppc.h 
b/arch/powerpc/include/asm/kvm_ppc.h
index 20f4616..3069cf4 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -182,6 +182,7 @@ union kvmppc_one_reg {
 };
 
 struct kvmppc_ops {
+   struct module *owner;
bool is_hv_enabled;
int (*get_sregs)(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
int (*set_sregs)(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
@@ -217,7 +218,6 @@ struct kvmppc_ops {
  unsigned long npages);
int (*init_vm)(struct kvm *kvm);
void (*destroy_vm)(struct kvm *kvm);
-   int (*check_processor_compat)(void);
int (*get_smmu_info)(struct kvm *kvm, struct kvm_ppc_smmu_info *info);
int (*emulate_op)(struct kvm_run *run, struct kvm_vcpu *vcpu,
  unsigned int inst, int *advance);
@@ -229,7 +229,8 @@ struct kvmppc_ops {
 
 };
 
-extern struct kvmppc_ops *kvmppc_ops;
+extern struct kvmppc_ops *kvmppc_hv_ops;
+extern struct kvmppc_ops *kvmppc_pr_ops;
 
 /*
  * Cuts out inst bits with ordering according to spec.
@@ -326,7 +327,7 @@ static inline void kvmppc_set_host_ipi(int cpu, u8 host_ipi)
 
 static inline void kvmppc_fast_vcpu_kick(struct kvm_vcpu *vcpu)
 {
-   kvmppc_ops-fast_vcpu_kick(vcpu);
+   vcpu-kvm-arch.kvm_ops-fast_vcpu_kick(vcpu);
 }
 
 #else
diff --git a/arch/powerpc/kvm/44x.c b/arch/powerpc/kvm/44x.c
index a765bcd..93221e8 100644
--- a/arch/powerpc/kvm/44x.c
+++ b/arch/powerpc/kvm/44x.c
@@ -213,16 +213,19 @@ static int __init kvmppc_44x_init(void)
if (r)
goto err_out;
 
-   r = kvm_init(kvm_ops_44x, sizeof(struct kvmppc_vcpu_44x),
-0, THIS_MODULE);
+   r = kvm_init(NULL, sizeof(struct kvmppc_vcpu_44x), 0, THIS_MODULE);
if (r)
goto err_out;
+   kvm_ops_44x.owner = THIS_MODULE;
+   kvmppc_pr_ops = kvm_ops_44x;
+
 err_out:
return r;
 }
 
 static void __exit kvmppc_44x_exit(void)
 {
+   kvmppc_pr_ops = NULL;
kvmppc_booke_exit();
 }
 
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index 130fe1d..ad8f6ed 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -34,6 +34,7 @@
 #include linux/vmalloc.h
 #include linux/highmem.h
 
+#include book3s.h
 #include trace.h
 
 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
@@ -71,7 +72,7 @@ void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)
 
 static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
 {
-   if (!kvmppc_ops-is_hv_enabled)
+   if (!vcpu-kvm-arch.kvm_ops-is_hv_enabled)
return to_book3s(vcpu)-hior;
return 0;
 }
@@ -79,7 +80,7 @@ static inline unsigned long kvmppc_interrupt_offset(struct 
kvm_vcpu *vcpu)
 static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
unsigned long pending_now, unsigned long old_pending)
 {
-   if (kvmppc_ops-is_hv_enabled)
+   if (vcpu-kvm-arch.kvm_ops-is_hv_enabled)
return;
if (pending_now)
vcpu-arch.shared-int_pending = 1;
@@ -93,7 +94,7 @@ static inline bool kvmppc_critical_section(struct kvm_vcpu 
*vcpu)
ulong crit_r1;
bool crit;
 
- 

[PULL 48/51] kvm: powerpc: book3s: Support building HV and PR KVM as module

2013-10-31 Thread Alexander Graf
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
[agraf: squash in compile fix]
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/kvm/Kconfig  |  6 +++---
 arch/powerpc/kvm/Makefile | 11 ---
 arch/powerpc/kvm/book3s.c | 12 +++-
 arch/powerpc/kvm/book3s_emulate.c |  2 +-
 arch/powerpc/kvm/book3s_hv.c  |  2 ++
 arch/powerpc/kvm/book3s_pr.c  |  5 -
 arch/powerpc/kvm/book3s_rtas.c|  1 +
 arch/powerpc/kvm/book3s_xics.c|  1 +
 arch/powerpc/kvm/emulate.c|  1 +
 arch/powerpc/kvm/powerpc.c| 10 ++
 virt/kvm/kvm_main.c   |  4 
 11 files changed, 46 insertions(+), 9 deletions(-)

diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig
index a96d7c3..8aeeda1 100644
--- a/arch/powerpc/kvm/Kconfig
+++ b/arch/powerpc/kvm/Kconfig
@@ -73,7 +73,7 @@ config KVM_BOOK3S_64
  If unsure, say N.
 
 config KVM_BOOK3S_64_HV
-   bool KVM support for POWER7 and PPC970 using hypervisor mode in host
+   tristate KVM support for POWER7 and PPC970 using hypervisor mode in 
host
depends on KVM_BOOK3S_64
select KVM_BOOK3S_HV_POSSIBLE
select MMU_NOTIFIER
@@ -94,8 +94,8 @@ config KVM_BOOK3S_64_HV
  If unsure, say N.
 
 config KVM_BOOK3S_64_PR
-   bool KVM support without using hypervisor mode in host
-   depends on KVM_BOOK3S_64  !KVM_BOOK3S_64_HV
+   tristate KVM support without using hypervisor mode in host
+   depends on KVM_BOOK3S_64
select KVM_BOOK3S_PR_POSSIBLE
---help---
  Support running guest kernels in virtual machines on processors
diff --git a/arch/powerpc/kvm/Makefile b/arch/powerpc/kvm/Makefile
index fa17b33..ce569b6 100644
--- a/arch/powerpc/kvm/Makefile
+++ b/arch/powerpc/kvm/Makefile
@@ -56,7 +56,7 @@ kvm-objs-$(CONFIG_KVM_E500MC) := $(kvm-e500mc-objs)
 kvm-book3s_64-builtin-objs-$(CONFIG_KVM_BOOK3S_64_HANDLER) := \
book3s_64_vio_hv.o
 
-kvm-book3s_64-objs-$(CONFIG_KVM_BOOK3S_64_PR) := \
+kvm-pr-y := \
fpu.o \
book3s_paired_singles.o \
book3s_pr.o \
@@ -76,7 +76,7 @@ kvm-book3s_64-builtin-objs-$(CONFIG_KVM_BOOK3S_64_HANDLER) += 
\
book3s_rmhandlers.o
 endif
 
-kvm-book3s_64-objs-$(CONFIG_KVM_BOOK3S_64_HV)  += \
+kvm-hv-y += \
book3s_hv.o \
book3s_hv_interrupts.o \
book3s_64_mmu_hv.o
@@ -84,13 +84,15 @@ kvm-book3s_64-objs-$(CONFIG_KVM_BOOK3S_64_HV)  += \
 kvm-book3s_64-builtin-xics-objs-$(CONFIG_KVM_XICS) := \
book3s_hv_rm_xics.o
 
-kvm-book3s_64-builtin-objs-$(CONFIG_KVM_BOOK3S_64_HV) += \
+ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
+kvm-book3s_64-builtin-objs-$(CONFIG_KVM_BOOK3S_64_HANDLER) += \
book3s_hv_rmhandlers.o \
book3s_hv_rm_mmu.o \
book3s_hv_ras.o \
book3s_hv_builtin.o \
book3s_hv_cma.o \
$(kvm-book3s_64-builtin-xics-objs-y)
+endif
 
 kvm-book3s_64-objs-$(CONFIG_KVM_XICS) += \
book3s_xics.o
@@ -131,4 +133,7 @@ obj-$(CONFIG_KVM_E500MC) += kvm.o
 obj-$(CONFIG_KVM_BOOK3S_64) += kvm.o
 obj-$(CONFIG_KVM_BOOK3S_32) += kvm.o
 
+obj-$(CONFIG_KVM_BOOK3S_64_PR) += kvm-pr.o
+obj-$(CONFIG_KVM_BOOK3S_64_HV) += kvm-hv.o
+
 obj-y += $(kvm-book3s_64-builtin-objs-y)
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index 493aff7..39d2994 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -170,28 +170,32 @@ void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, 
unsigned int vec)
printk(KERN_INFO Queueing interrupt %x\n, vec);
 #endif
 }
-
+EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
 
 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
 {
/* might as well deliver this straight away */
kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags);
 }
+EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
 
 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
 {
kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
 }
+EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
 
 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
 {
return test_bit(BOOK3S_IRQPRIO_DECREMENTER, 
vcpu-arch.pending_exceptions);
 }
+EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
 
 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
 {
kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
 }
+EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
 
 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
 struct kvm_interrupt *irq)
@@ -329,6 +333,7 @@ int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
 
return 0;
 }
+EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
 
 pfn_t kvmppc_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn, bool writing,
bool *writable)
@@ -354,6 +359,7 @@ pfn_t kvmppc_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn, 
bool writing,
 
return gfn_to_pfn_prot(vcpu-kvm, gfn, writing, 

[PULL 36/51] KVM: PPC: E500: exit to user space on ehpriv 1 instruction

2013-10-31 Thread Alexander Graf
From: Bharat Bhushan r65...@freescale.com

ehpriv 1 instruction is used for setting software breakpoints
by user space. This patch adds support to exit to user space
with run-debug have relevant information.

As this is the first point we are using run-debug, also defined
the run-debug structure.

Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/disassemble.h |  4 
 arch/powerpc/include/asm/kvm_booke.h   |  7 ++-
 arch/powerpc/include/uapi/asm/kvm.h| 21 +
 arch/powerpc/kvm/booke.c   |  2 +-
 arch/powerpc/kvm/e500_emulate.c| 26 ++
 5 files changed, 54 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/include/asm/disassemble.h 
b/arch/powerpc/include/asm/disassemble.h
index 9b198d1..856f8de 100644
--- a/arch/powerpc/include/asm/disassemble.h
+++ b/arch/powerpc/include/asm/disassemble.h
@@ -77,4 +77,8 @@ static inline unsigned int get_d(u32 inst)
return inst  0x;
 }
 
+static inline unsigned int get_oc(u32 inst)
+{
+   return (inst  11)  0x7fff;
+}
 #endif /* __ASM_PPC_DISASSEMBLE_H__ */
diff --git a/arch/powerpc/include/asm/kvm_booke.h 
b/arch/powerpc/include/asm/kvm_booke.h
index d3c1eb3..dd8f615 100644
--- a/arch/powerpc/include/asm/kvm_booke.h
+++ b/arch/powerpc/include/asm/kvm_booke.h
@@ -26,7 +26,12 @@
 /* LPIDs we support with this build -- runtime limit may be lower */
 #define KVMPPC_NR_LPIDS64
 
-#define KVMPPC_INST_EHPRIV 0x7c00021c
+#define KVMPPC_INST_EHPRIV 0x7c00021c
+#define EHPRIV_OC_SHIFT11
+/* ehpriv 1 : ehpriv with OC = 1 is used for debug emulation */
+#define EHPRIV_OC_DEBUG1
+#define KVMPPC_INST_EHPRIV_DEBUG   (KVMPPC_INST_EHPRIV | \
+(EHPRIV_OC_DEBUG  EHPRIV_OC_SHIFT))
 
 static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val)
 {
diff --git a/arch/powerpc/include/uapi/asm/kvm.h 
b/arch/powerpc/include/uapi/asm/kvm.h
index e420d46..482bba5 100644
--- a/arch/powerpc/include/uapi/asm/kvm.h
+++ b/arch/powerpc/include/uapi/asm/kvm.h
@@ -269,7 +269,24 @@ struct kvm_fpu {
__u64 fpr[32];
 };
 
+/*
+ * Defines for h/w breakpoint, watchpoint (read, write or both) and
+ * software breakpoint.
+ * These are used as type in KVM_SET_GUEST_DEBUG ioctl and status
+ * for KVM_DEBUG_EXIT.
+ */
+#define KVMPPC_DEBUG_NONE  0x0
+#define KVMPPC_DEBUG_BREAKPOINT(1UL  1)
+#define KVMPPC_DEBUG_WATCH_WRITE   (1UL  2)
+#define KVMPPC_DEBUG_WATCH_READ(1UL  3)
 struct kvm_debug_exit_arch {
+   __u64 address;
+   /*
+* exiting to userspace because of h/w breakpoint, watchpoint
+* (read, write or both) and software breakpoint.
+*/
+   __u32 status;
+   __u32 reserved;
 };
 
 /* for KVM_SET_GUEST_DEBUG */
@@ -281,10 +298,6 @@ struct kvm_guest_debug_arch {
 * Type denotes h/w breakpoint, read watchpoint, write
 * watchpoint or watchpoint (both read and write).
 */
-#define KVMPPC_DEBUG_NONE  0x0
-#define KVMPPC_DEBUG_BREAKPOINT(1UL  1)
-#define KVMPPC_DEBUG_WATCH_WRITE   (1UL  2)
-#define KVMPPC_DEBUG_WATCH_READ(1UL  3)
__u32 type;
__u32 reserved;
} bp[16];
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 65fa775..1d6edf0 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -1477,7 +1477,7 @@ int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, 
struct kvm_one_reg *reg)
val = get_reg_val(reg-id, vcpu-arch.tsr);
break;
case KVM_REG_PPC_DEBUG_INST:
-   val = get_reg_val(reg-id, KVMPPC_INST_EHPRIV);
+   val = get_reg_val(reg-id, KVMPPC_INST_EHPRIV_DEBUG);
break;
case KVM_REG_PPC_VRSAVE:
val = get_reg_val(reg-id, vcpu-arch.vrsave);
diff --git a/arch/powerpc/kvm/e500_emulate.c b/arch/powerpc/kvm/e500_emulate.c
index b10a012..6163a03 100644
--- a/arch/powerpc/kvm/e500_emulate.c
+++ b/arch/powerpc/kvm/e500_emulate.c
@@ -26,6 +26,7 @@
 #define XOP_TLBRE   946
 #define XOP_TLBWE   978
 #define XOP_TLBILX  18
+#define XOP_EHPRIV  270
 
 #ifdef CONFIG_KVM_E500MC
 static int dbell2prio(ulong param)
@@ -82,6 +83,26 @@ static int kvmppc_e500_emul_msgsnd(struct kvm_vcpu *vcpu, 
int rb)
 }
 #endif
 
+static int kvmppc_e500_emul_ehpriv(struct kvm_run *run, struct kvm_vcpu *vcpu,
+  unsigned int inst, int *advance)
+{
+   int emulated = EMULATE_DONE;
+
+   switch (get_oc(inst)) {
+   case EHPRIV_OC_DEBUG:
+   run-exit_reason = KVM_EXIT_DEBUG;
+   run-debug.arch.address = vcpu-arch.pc;
+   run-debug.arch.status = 0;
+   kvmppc_account_exit(vcpu, 

[PULL 28/51] KVM: PPC: Book3S HV: Better handling of exceptions that happen in real mode

2013-10-31 Thread Alexander Graf
From: Paul Mackerras pau...@samba.org

When an interrupt or exception happens in the guest that comes to the
host, the CPU goes to hypervisor real mode (MMU off) to handle the
exception but doesn't change the MMU context.  After saving a few
registers, we then clear the in guest flag.  If, for any reason,
we get an exception in the real-mode code, that then gets handled
by the normal kernel exception handlers, which turn the MMU on.  This
is disastrous if the MMU is still set to the guest context, since we
end up executing instructions from random places in the guest kernel
with hypervisor privilege.

In order to catch this situation, we define a new value for the in guest
flag, KVM_GUEST_MODE_HOST_HV, to indicate that we are in hypervisor real
mode with guest MMU context.  If the in guest flag is set to this value,
we branch off to an emergency handler.  For the moment, this just does
a branch to self to stop the CPU from doing anything further.

While we're here, we define another new flag value to indicate that we
are in a HV guest, as distinct from a PR guest.  This will be useful
when we have a kernel that can support both PR and HV guests concurrently.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_asm.h  |  2 ++
 arch/powerpc/kvm/book3s_hv_rmhandlers.S | 31 +--
 2 files changed, 27 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_asm.h 
b/arch/powerpc/include/asm/kvm_asm.h
index e2d4d46..1bd92fd 100644
--- a/arch/powerpc/include/asm/kvm_asm.h
+++ b/arch/powerpc/include/asm/kvm_asm.h
@@ -138,6 +138,8 @@
 #define KVM_GUEST_MODE_NONE0
 #define KVM_GUEST_MODE_GUEST   1
 #define KVM_GUEST_MODE_SKIP2
+#define KVM_GUEST_MODE_GUEST_HV3
+#define KVM_GUEST_MODE_HOST_HV 4
 
 #define KVM_INST_FETCH_FAILED  -1
 
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S 
b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 6e3370f..84105eb 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -387,6 +387,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
mtspr   SPRN_DAR, r5
mtspr   SPRN_DSISR, r6
 
+   li  r6, KVM_GUEST_MODE_HOST_HV
+   stb r6, HSTATE_IN_GUEST(r13)
+
 BEGIN_FTR_SECTION
/* Restore AMR and UAMOR, set AMOR to all 1s */
ld  r5,VCPU_AMR(r4)
@@ -690,7 +693,7 @@ fast_guest_return:
mtspr   SPRN_HSRR1,r11
 
/* Activate guest mode, so faults get handled by KVM */
-   li  r9, KVM_GUEST_MODE_GUEST
+   li  r9, KVM_GUEST_MODE_GUEST_HV
stb r9, HSTATE_IN_GUEST(r13)
 
/* Enter guest */
@@ -750,6 +753,14 @@ kvmppc_interrupt:
 */
/* abuse host_r2 as third scratch area; we get r2 from PACATOC(r13) */
std r9, HSTATE_HOST_R2(r13)
+
+   lbz r9, HSTATE_IN_GUEST(r13)
+   cmpwi   r9, KVM_GUEST_MODE_HOST_HV
+   beq kvmppc_bad_host_intr
+   /* We're now back in the host but in guest MMU context */
+   li  r9, KVM_GUEST_MODE_HOST_HV
+   stb r9, HSTATE_IN_GUEST(r13)
+
ld  r9, HSTATE_KVM_VCPU(r13)
 
/* Save registers */
@@ -801,10 +812,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
std r3, VCPU_GPR(R13)(r9)
std r4, VCPU_LR(r9)
 
-   /* Unset guest mode */
-   li  r0, KVM_GUEST_MODE_NONE
-   stb r0, HSTATE_IN_GUEST(r13)
-
stw r12,VCPU_TRAP(r9)
 
/* Save HEIR (HV emulation assist reg) in last_inst
@@ -1198,6 +1205,10 @@ BEGIN_FTR_SECTION
mtspr   SPRN_AMR,r6
 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
 
+   /* Unset guest mode */
+   li  r0, KVM_GUEST_MODE_NONE
+   stb r0, HSTATE_IN_GUEST(r13)
+
/* Switch DSCR back to host value */
 BEGIN_FTR_SECTION
mfspr   r8, SPRN_DSCR
@@ -1400,7 +1411,7 @@ fast_interrupt_c_return:
stw r8, VCPU_LAST_INST(r9)
 
/* Unset guest mode. */
-   li  r0, KVM_GUEST_MODE_NONE
+   li  r0, KVM_GUEST_MODE_HOST_HV
stb r0, HSTATE_IN_GUEST(r13)
b   guest_exit_cont
 
@@ -1949,3 +1960,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
lwz r7,VCPU_VRSAVE(r4)
mtspr   SPRN_VRSAVE,r7
blr
+
+/*
+ * We come here if we get any exception or interrupt while we are
+ * executing host real mode code while in guest MMU context.
+ * For now just spin, but we should do something better.
+ */
+kvmppc_bad_host_intr:
+   b   .
-- 
1.8.1.4

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[PULL 38/51] KVM: PPC: E500: Add userspace debug stub support

2013-10-31 Thread Alexander Graf
From: Bharat Bhushan r65...@freescale.com

This patch adds the debug stub support on booke/bookehv.
Now QEMU debug stub can use hw breakpoint, watchpoint and
software breakpoint to debug guest.

This is how we save/restore debug register context when switching
between guest, userspace and kernel user-process:

When QEMU is running
 - thread-debug_reg == QEMU debug register context.
 - Kernel will handle switching the debug register on context switch.
 - no vcpu_load() called

QEMU makes ioctls (except RUN)
 - This will call vcpu_load()
 - should not change context.
 - Some ioctls can change vcpu debug register, context saved in 
vcpu-debug_regs

QEMU Makes RUN ioctl
 - Save thread-debug_reg on STACK
 - Store thread-debug_reg == vcpu-debug_reg
 - load thread-debug_reg
 - RUN VCPU ( So thread points to vcpu context )

Context switch happens When VCPU running
 - makes vcpu_load() should not load any context
 - kernel loads the vcpu context as thread-debug_regs points to vcpu context.

On heavyweight_exit
 - Load the context saved on stack in thread-debug_reg

Currently we do not support debug resource emulation to guest,
On debug exception, always exit to user space irrespective of
user space is expecting the debug exception or not. If this is
unexpected exception (breakpoint/watchpoint event not set by
userspace) then let us leave the action on user space. This
is similar to what it was before, only thing is that now we
have proper exit state available to user space.

Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_host.h |   3 +
 arch/powerpc/include/uapi/asm/kvm.h |   1 +
 arch/powerpc/kvm/booke.c| 240 +---
 arch/powerpc/kvm/booke.h|   5 +
 4 files changed, 231 insertions(+), 18 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index 7e83c5f..4959ff1 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -538,7 +538,10 @@ struct kvm_vcpu_arch {
u32 eptcfg;
u32 epr;
u32 crit_save;
+   /* guest debug registers*/
struct debug_reg dbg_reg;
+   /* hardware visible debug registers when in guest state */
+   struct debug_reg shadow_dbg_reg;
 #endif
gpa_t paddr_accessed;
gva_t vaddr_accessed;
diff --git a/arch/powerpc/include/uapi/asm/kvm.h 
b/arch/powerpc/include/uapi/asm/kvm.h
index 482bba5..6836ec7 100644
--- a/arch/powerpc/include/uapi/asm/kvm.h
+++ b/arch/powerpc/include/uapi/asm/kvm.h
@@ -27,6 +27,7 @@
 #define __KVM_HAVE_PPC_SMT
 #define __KVM_HAVE_IRQCHIP
 #define __KVM_HAVE_IRQ_LINE
+#define __KVM_HAVE_GUEST_DEBUG
 
 struct kvm_regs {
__u64 pc;
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index a972fb6..8b6a790 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -133,6 +133,29 @@ static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu)
 #endif
 }
 
+static void kvmppc_vcpu_sync_debug(struct kvm_vcpu *vcpu)
+{
+   /* Synchronize guest's desire to get debug interrupts into shadow MSR */
+#ifndef CONFIG_KVM_BOOKE_HV
+   vcpu-arch.shadow_msr = ~MSR_DE;
+   vcpu-arch.shadow_msr |= vcpu-arch.shared-msr  MSR_DE;
+#endif
+
+   /* Force enable debug interrupts when user space wants to debug */
+   if (vcpu-guest_debug) {
+#ifdef CONFIG_KVM_BOOKE_HV
+   /*
+* Since there is no shadow MSR, sync MSR_DE into the guest
+* visible MSR.
+*/
+   vcpu-arch.shared-msr |= MSR_DE;
+#else
+   vcpu-arch.shadow_msr |= MSR_DE;
+   vcpu-arch.shared-msr = ~MSR_DE;
+#endif
+   }
+}
+
 /*
  * Helper function for full MSR writes.  No need to call this if only
  * EE/CE/ME/DE/RI are changing.
@@ -150,6 +173,7 @@ void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
kvmppc_mmu_msr_notify(vcpu, old_msr);
kvmppc_vcpu_sync_spe(vcpu);
kvmppc_vcpu_sync_fpu(vcpu);
+   kvmppc_vcpu_sync_debug(vcpu);
 }
 
 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
@@ -655,6 +679,7 @@ int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
 {
int ret, s;
+   struct thread_struct thread;
 #ifdef CONFIG_PPC_FPU
unsigned int fpscr;
int fpexc_mode;
@@ -696,6 +721,12 @@ int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct 
kvm_vcpu *vcpu)
kvmppc_load_guest_fp(vcpu);
 #endif
 
+   /* Switch to guest debug context */
+   thread.debug = vcpu-arch.shadow_dbg_reg;
+   switch_booke_debug_regs(thread);
+   thread.debug = current-thread.debug;
+   current-thread.debug = vcpu-arch.shadow_dbg_reg;
+
kvmppc_fix_ee_before_entry();
 
ret = __kvmppc_vcpu_run(kvm_run, vcpu);
@@ -703,6 +734,10 @@ int kvmppc_vcpu_run(struct kvm_run *kvm_run, 

[PULL 37/51] KVM: PPC: E500: Using struct debug_reg

2013-10-31 Thread Alexander Graf
From: Bharat Bhushan r65...@freescale.com

For KVM also use the struct debug_reg defined in asm/processor.h

Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_host.h | 13 +
 arch/powerpc/kvm/booke.c| 34 --
 2 files changed, 25 insertions(+), 22 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index b688191..7e83c5f 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -387,17 +387,6 @@ struct kvmppc_slb {
 #define KVMPPC_EPR_USER1 /* exit to userspace to fill EPR */
 #define KVMPPC_EPR_KERNEL  2 /* in-kernel irqchip */
 
-struct kvmppc_booke_debug_reg {
-   u32 dbcr0;
-   u32 dbcr1;
-   u32 dbcr2;
-#ifdef CONFIG_KVM_E500MC
-   u32 dbcr4;
-#endif
-   u64 iac[KVMPPC_BOOKE_MAX_IAC];
-   u64 dac[KVMPPC_BOOKE_MAX_DAC];
-};
-
 #define KVMPPC_IRQ_DEFAULT 0
 #define KVMPPC_IRQ_MPIC1
 #define KVMPPC_IRQ_XICS2
@@ -549,7 +538,7 @@ struct kvm_vcpu_arch {
u32 eptcfg;
u32 epr;
u32 crit_save;
-   struct kvmppc_booke_debug_reg dbg_reg;
+   struct debug_reg dbg_reg;
 #endif
gpa_t paddr_accessed;
gva_t vaddr_accessed;
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 1d6edf0..a972fb6 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -1441,7 +1441,6 @@ int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, 
struct kvm_one_reg *reg)
int r = 0;
union kvmppc_one_reg val;
int size;
-   long int i;
 
size = one_reg_size(reg-id);
if (size  sizeof(val))
@@ -1449,16 +1448,24 @@ int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, 
struct kvm_one_reg *reg)
 
switch (reg-id) {
case KVM_REG_PPC_IAC1:
+   val = get_reg_val(reg-id, vcpu-arch.dbg_reg.iac1);
+   break;
case KVM_REG_PPC_IAC2:
+   val = get_reg_val(reg-id, vcpu-arch.dbg_reg.iac2);
+   break;
+#if CONFIG_PPC_ADV_DEBUG_IACS  2
case KVM_REG_PPC_IAC3:
+   val = get_reg_val(reg-id, vcpu-arch.dbg_reg.iac3);
+   break;
case KVM_REG_PPC_IAC4:
-   i = reg-id - KVM_REG_PPC_IAC1;
-   val = get_reg_val(reg-id, vcpu-arch.dbg_reg.iac[i]);
+   val = get_reg_val(reg-id, vcpu-arch.dbg_reg.iac4);
break;
+#endif
case KVM_REG_PPC_DAC1:
+   val = get_reg_val(reg-id, vcpu-arch.dbg_reg.dac1);
+   break;
case KVM_REG_PPC_DAC2:
-   i = reg-id - KVM_REG_PPC_DAC1;
-   val = get_reg_val(reg-id, vcpu-arch.dbg_reg.dac[i]);
+   val = get_reg_val(reg-id, vcpu-arch.dbg_reg.dac2);
break;
case KVM_REG_PPC_EPR: {
u32 epr = get_guest_epr(vcpu);
@@ -1501,7 +1508,6 @@ int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, 
struct kvm_one_reg *reg)
int r = 0;
union kvmppc_one_reg val;
int size;
-   long int i;
 
size = one_reg_size(reg-id);
if (size  sizeof(val))
@@ -1512,16 +1518,24 @@ int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, 
struct kvm_one_reg *reg)
 
switch (reg-id) {
case KVM_REG_PPC_IAC1:
+   vcpu-arch.dbg_reg.iac1 = set_reg_val(reg-id, val);
+   break;
case KVM_REG_PPC_IAC2:
+   vcpu-arch.dbg_reg.iac2 = set_reg_val(reg-id, val);
+   break;
+#if CONFIG_PPC_ADV_DEBUG_IACS  2
case KVM_REG_PPC_IAC3:
+   vcpu-arch.dbg_reg.iac3 = set_reg_val(reg-id, val);
+   break;
case KVM_REG_PPC_IAC4:
-   i = reg-id - KVM_REG_PPC_IAC1;
-   vcpu-arch.dbg_reg.iac[i] = set_reg_val(reg-id, val);
+   vcpu-arch.dbg_reg.iac4 = set_reg_val(reg-id, val);
break;
+#endif
case KVM_REG_PPC_DAC1:
+   vcpu-arch.dbg_reg.dac1 = set_reg_val(reg-id, val);
+   break;
case KVM_REG_PPC_DAC2:
-   i = reg-id - KVM_REG_PPC_DAC1;
-   vcpu-arch.dbg_reg.dac[i] = set_reg_val(reg-id, val);
+   vcpu-arch.dbg_reg.dac2 = set_reg_val(reg-id, val);
break;
case KVM_REG_PPC_EPR: {
u32 new_epr = set_reg_val(reg-id, val);
-- 
1.8.1.4

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