date:20201228

Hi Konstantin,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on linus/master]
[also build test WARNING on v5.11-rc1 next-20201223]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Konstantin-Komarov/NTFS-read-write-driver-GPL-implementation-by-Paragon-Software/20201225-215909
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
71c5f03154ac1cb27423b984743ccc2f5d11d14d
config: mips-randconfig-r022-20201229 (attached as .config)
compiler: mips64el-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://github.com/0day-ci/linux/commit/fafee24e48a76d7a2f856437aa0480ecfe72bec6
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
Konstantin-Komarov/NTFS-read-write-driver-GPL-implementation-by-Paragon-Software/20201225-215909
git checkout fafee24e48a76d7a2f856437aa0480ecfe72bec6
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross 
ARCH=mips 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

   In file included from fs/ntfs3/attrib.c:18:
>> fs/ntfs3/ntfs.h:427:1: warning: 'inline' is not at beginning of declaration 
>> [-Wold-style-declaration]
 427 | static const inline __le16 *attr_name(const struct ATTRIB *attr)
 | ^~
   fs/ntfs3/ntfs.h:544:1: warning: 'inline' is not at beginning of declaration 
[-Wold-style-declaration]
 544 | static const inline __le16 *le_name(const struct ATTR_LIST_ENTRY *le)
 | ^~
   fs/ntfs3/attrib.c: In function 'attr_data_get_block':
>> fs/ntfs3/attrib.c:832:6: warning: variable 'new_size' set but not used 
>> [-Wunused-but-set-variable]
 832 |  u64 new_size, total_size;
 |  ^~~~
--
   In file included from fs/ntfs3/attrlist.c:14:
>> fs/ntfs3/ntfs.h:427:1: warning: 'inline' is not at beginning of declaration 
>> [-Wold-style-declaration]
 427 | static const inline __le16 *attr_name(const struct ATTRIB *attr)
 | ^~
   fs/ntfs3/ntfs.h:544:1: warning: 'inline' is not at beginning of declaration 
[-Wold-style-declaration]
 544 | static const inline __le16 *le_name(const struct ATTR_LIST_ENTRY *le)
 | ^~
--
   In file included from fs/ntfs3/file.c:17:
>> fs/ntfs3/ntfs.h:427:1: warning: 'inline' is not at beginning of declaration 
>> [-Wold-style-declaration]
 427 | static const inline __le16 *attr_name(const struct ATTRIB *attr)
 | ^~
   fs/ntfs3/ntfs.h:544:1: warning: 'inline' is not at beginning of declaration 
[-Wold-style-declaration]
 544 | static const inline __le16 *le_name(const struct ATTR_LIST_ENTRY *le)
 | ^~
   fs/ntfs3/file.c: In function 'ntfs_truncate':
>> fs/ntfs3/file.c:410:6: warning: variable 'vcn' set but not used 
>> [-Wunused-but-set-variable]
 410 |  u32 vcn;
 |  ^~~
--
   In file included from fs/ntfs3/index.c:14:
>> fs/ntfs3/ntfs.h:427:1: warning: 'inline' is not at beginning of declaration 
>> [-Wold-style-declaration]
 427 | static const inline __le16 *attr_name(const struct ATTRIB *attr)
 | ^~
   fs/ntfs3/ntfs.h:544:1: warning: 'inline' is not at beginning of declaration 
[-Wold-style-declaration]
 544 | static const inline __le16 *le_name(const struct ATTR_LIST_ENTRY *le)
 | ^~
>> fs/ntfs3/index.c:542:1: warning: 'inline' is not at beginning of declaration 
>> [-Wold-style-declaration]
 542 | static const inline struct NTFS_DE *hdr_find_split(const struct 
INDEX_HDR *hdr)
 | ^~
   fs/ntfs3/index.c:573:1: warning: 'inline' is not at beginning of declaration 
[-Wold-style-declaration]
 573 | static const inline struct NTFS_DE *
 | ^~


vim +/inline +427 fs/ntfs3/ntfs.h

4ba58550cb5849a Konstantin Komarov 2020-12-25  426  
4ba58550cb5849a Konstantin Komarov 2020-12-25 @427  static const inline __le16 
*attr_name(const struct ATTRIB *attr)
4ba58550cb5849a Konstantin Komarov 2020-12-25  428  {
4ba58550cb5849a Konstantin Komarov 2020-12-25  429  return Add2Ptr(attr, 
le16_to_cpu(attr->name_off));
4ba58550cb5849a Konstantin Komarov 2020-12-25  430  }
4ba58550cb5849a Konstantin Komarov 2020-12-25  431  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip

Re: [RFC PATCH v3 4/5] usb: xhci-mtk: add support runtime pm

2020-12-28 Thread Ikjoon Jang

On Tue, Dec 22, 2020 at 5:35 PM Chunfeng Yun  wrote:
>
> From: CK Hu 
>
> add support runtime pm feature
>
> Signed-off-by: Zhanyong Wang 
> Signed-off-by: Chunfeng Yun 
> ---
> v3:
>   1. fix some issues
>   2. remove attribute files
>
> v2: fix error caused by request irq suggested by CK
> ---
>  drivers/usb/host/xhci-mtk.c | 285 +++-
>  drivers/usb/host/xhci-mtk.h |  14 ++
>  2 files changed, 294 insertions(+), 5 deletions(-)
>  mode change 100755 => 100644 drivers/usb/host/xhci-mtk.c
>
> diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
> old mode 100755
> new mode 100644
> index 34bd3de090b1..c07d54acbcb7
> --- a/drivers/usb/host/xhci-mtk.c
> +++ b/drivers/usb/host/xhci-mtk.c
> @@ -14,6 +14,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -77,6 +78,72 @@ enum ssusb_uwk_vers {
> SSUSB_UWK_V3,
>  };
>
> +int xhci_mtk_runtime_ready;
> +
> +static int xhci_mtk_runtime_resume(struct device *dev);
> +
> +static void xhci_mtk_seal_work(struct work_struct *work)
> +{
> +   struct xhci_hcd_mtk *mtk =
> +   container_of(work, struct xhci_hcd_mtk, seal.work);
> +   struct usb_hcd *hcd = mtk->hcd;
> +   struct xhci_hcd *xhci = hcd_to_xhci(hcd);
> +
> +   xhci_dbg(xhci, "spm unseals xHCI controller %i\n", mtk->seal_status);
> +   if (mtk->seal_status == SEAL_SUSPENDED) {
> +   mtk->seal_status = SEAL_RESUMING;
> +   pm_runtime_mark_last_busy(mtk->dev);
> +   pm_runtime_put_sync_autosuspend(mtk->dev);

If I understand correctly, this function is for waking up the device
but this function calls put() only without get().

> +   } else {
> +   /*
> +* FIXME: Sometimes seal_status will keep it on SEAL_RESUMING 
> staus not to expect
> +* since pm_runtime_put_sync_autosuspend doesn't invoke 
> runtime_resume of callback.
> +* and to survey why not to invoke runtime_resume callback 
> named
> +* xhci_mtk_runtime_resume in time in short feature, Herely 
> provide one solution
> +* that make sure seal_status to match h/w state machine,and 
> MTK xHCI clocks
> +* on as soon as unseal event received.

I guess actual resuming should be happened only from the 1st interrupt
(when in SEAL_SUSPENDED)
and following spurious interrupts can be just ignored.

> +*/
> +   if (mtk->seal_status == SEAL_RESUMING)
> +   xhci_mtk_runtime_resume(mtk->dev);

xhci_mtk_runtime_resume() is defined as a runtime pm callback,
pm core will call that callback when pm usage counter reaches to zero.

> +   else
> +   xhci_warn(xhci,
> +   "Ignore seal wakeup source disordered in xHCI 
> controller\n");
> +   }
> +}
> +
> +static irqreturn_t xhci_mtk_seal_irq(int irq, void *data)
> +{
> +   struct xhci_hcd_mtk *mtk = data;
> +   struct usb_hcd *hcd = mtk->hcd;
> +   struct xhci_hcd *xhci = hcd_to_xhci(hcd);
> +
> +   xhci_dbg(xhci, "seal irq ISR invoked\n");
> +
> +   schedule_delayed_work(>seal, 0);
> +
> +   return IRQ_HANDLED;
> +}
> +
> +static void xhci_mtk_seal_wakeup_enable(struct xhci_hcd_mtk *mtk, bool 
> enable)
> +{
> +   struct irq_desc *desc;
> +   struct device *dev = mtk->dev;
> +
> +   if (mtk && mtk->seal_irq) {
> +   desc = irq_to_desc(mtk->seal_irq);
> +   if (enable) {
> +   desc->irq_data.chip->irq_ack(>irq_data);
> +   enable_irq(mtk->seal_irq);
> +   dev_dbg(dev, "%s: enable_irq %i\n",
> +__func__, mtk->seal_irq);
> +   } else {
> +   disable_irq(mtk->seal_irq);
> +   dev_dbg(dev, "%s: disable_irq %i\n",
> +__func__, mtk->seal_irq);
> +   }
> +   }
> +}
> +

I think this is unnecessary if this driver can check the current state
and ignore the spurious irqs if spm sometimes triggers the wake-up irqs.

>  static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk)
>  {
> struct mu3c_ippc_regs __iomem *ippc = mtk->ippc_regs;
> @@ -347,7 +414,6 @@ static int usb_wakeup_of_property_parse(struct 
> xhci_hcd_mtk *mtk,
> mtk->uwk_reg_base, mtk->uwk_vers);
>
> return PTR_ERR_OR_ZERO(mtk->uwk);
> -
>  }
>
>  static void usb_wakeup_set(struct xhci_hcd_mtk *mtk, bool enable)
> @@ -482,9 +548,11 @@ static int xhci_mtk_probe(struct platform_device *pdev)
> return ret;
> }
>
> +   pm_runtime_set_active(dev);
> +   pm_runtime_use_autosuspend(dev);
> +   pm_runtime_set_autosuspend_delay(dev,
> +   CONFIG_USB_AUTOSUSPEND_DELAY * 1000);
> pm_runtime_enable(dev);
> -

Re: [PATCH 07/21] vdpa: multiple address spaces support

2020-12-28 Thread Eli Cohen

On Wed, Dec 16, 2020 at 02:48:04PM +0800, Jason Wang wrote:
> This patches introduces the multiple address spaces support for vDPA
> device. This idea is to identify a specific address space via an
> dedicated identifier - ASID.
> 
> During vDPA device allocation, vDPA device driver needs to report the
> number of address spaces supported by the device then the DMA mapping
> ops of the vDPA device needs to be extended to support ASID.
> 
> This helps to isolate the environments for the virtqueue that will not
> be assigned directly. E.g in the case of virtio-net, the control
> virtqueue will not be assigned directly to guest.
> 
> As a start, simply claim 1 virtqueue groups and 1 address spaces for
> all vDPA devices. And vhost-vDPA will simply reject the device with
> more than 1 virtqueue groups or address spaces.
> 
> Signed-off-by: Jason Wang 
> ---
>  drivers/vdpa/ifcvf/ifcvf_main.c   |  2 +-
>  drivers/vdpa/mlx5/net/mlx5_vnet.c |  5 +++--
>  drivers/vdpa/vdpa.c   |  4 +++-
>  drivers/vdpa/vdpa_sim/vdpa_sim.c  | 10 ++
>  drivers/vhost/vdpa.c  | 14 +-
>  include/linux/vdpa.h  | 23 ---
>  6 files changed, 38 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/vdpa/ifcvf/ifcvf_main.c b/drivers/vdpa/ifcvf/ifcvf_main.c
> index c629f4fcc738..8a43f562b169 100644
> --- a/drivers/vdpa/ifcvf/ifcvf_main.c
> +++ b/drivers/vdpa/ifcvf/ifcvf_main.c
> @@ -445,7 +445,7 @@ static int ifcvf_probe(struct pci_dev *pdev, const struct 
> pci_device_id *id)
>  
>   adapter = vdpa_alloc_device(struct ifcvf_adapter, vdpa,
>   dev, _vdpa_ops,
> - IFCVF_MAX_QUEUE_PAIRS * 2, 1);
> + IFCVF_MAX_QUEUE_PAIRS * 2, 1, 1);
>  
>   if (adapter == NULL) {
>   IFCVF_ERR(pdev, "Failed to allocate vDPA structure");
> diff --git a/drivers/vdpa/mlx5/net/mlx5_vnet.c 
> b/drivers/vdpa/mlx5/net/mlx5_vnet.c
> index 719b52fcc547..7aaf0a4ee80d 100644
> --- a/drivers/vdpa/mlx5/net/mlx5_vnet.c
> +++ b/drivers/vdpa/mlx5/net/mlx5_vnet.c
> @@ -1804,7 +1804,8 @@ static u32 mlx5_vdpa_get_generation(struct vdpa_device 
> *vdev)
>   return mvdev->generation;
>  }
>  
> -static int mlx5_vdpa_set_map(struct vdpa_device *vdev, struct vhost_iotlb 
> *iotlb)
> +static int mlx5_vdpa_set_map(struct vdpa_device *vdev, unsigned int asid,
> +  struct vhost_iotlb *iotlb)
>  {
>   struct mlx5_vdpa_dev *mvdev = to_mvdev(vdev);
>   struct mlx5_vdpa_net *ndev = to_mlx5_vdpa_ndev(mvdev);
> @@ -1947,7 +1948,7 @@ void *mlx5_vdpa_add_dev(struct mlx5_core_dev *mdev)
>   max_vqs = min_t(u32, max_vqs, MLX5_MAX_SUPPORTED_VQS);
>  
>   ndev = vdpa_alloc_device(struct mlx5_vdpa_net, mvdev.vdev, 
> mdev->device, _vdpa_ops,
> -  2 * mlx5_vdpa_max_qps(max_vqs), 1);
> +  2 * mlx5_vdpa_max_qps(max_vqs), 1, 1);
>   if (IS_ERR(ndev))
>   return ndev;
>  
> diff --git a/drivers/vdpa/vdpa.c b/drivers/vdpa/vdpa.c
> index 46399746ec7c..05195fa7865d 100644
> --- a/drivers/vdpa/vdpa.c
> +++ b/drivers/vdpa/vdpa.c
> @@ -63,6 +63,7 @@ static void vdpa_release_dev(struct device *d)
>   * @config: the bus operations that is supported by this device
>   * @nvqs: number of virtqueues supported by this device
>   * @ngroups: number of groups supported by this device
> + * @nas: number of address spaces supported by this device
>   * @size: size of the parent structure that contains private data
>   *
>   * Driver should use vdpa_alloc_device() wrapper macro instead of
> @@ -74,7 +75,7 @@ static void vdpa_release_dev(struct device *d)
>  struct vdpa_device *__vdpa_alloc_device(struct device *parent,
>   const struct vdpa_config_ops *config,
>   int nvqs, unsigned int ngroups,
> - size_t size)
> + unsigned int nas, size_t size)
>  {
>   struct vdpa_device *vdev;
>   int err = -EINVAL;
> @@ -102,6 +103,7 @@ struct vdpa_device *__vdpa_alloc_device(struct device 
> *parent,
>   vdev->features_valid = false;
>   vdev->nvqs = nvqs;
>   vdev->ngroups = ngroups;
> + vdev->nas = nas;
>  
>   err = dev_set_name(>dev, "vdpa%u", vdev->index);
>   if (err)
> diff --git a/drivers/vdpa/vdpa_sim/vdpa_sim.c 
> b/drivers/vdpa/vdpa_sim/vdpa_sim.c
> index 5d554b3cd152..140de452 100644
> --- a/drivers/vdpa/vdpa_sim/vdpa_sim.c
> +++ b/drivers/vdpa/vdpa_sim/vdpa_sim.c
> @@ -359,7 +359,7 @@ static struct vdpasim *vdpasim_create(void)
>   ops = _net_config_ops;
>  
>   vdpasim = vdpa_alloc_device(struct vdpasim, vdpa, NULL, ops,
> - VDPASIM_VQ_NUM, 1);
> + VDPASIM_VQ_NUM, 1, 1);
>   if (!vdpasim)
>   goto err_alloc;
>  
> @@ -606,7 +606,7 @@ static

[PATCH] sizes.h: Add SZ_8G/SZ_16G/SZ_32G macros

2020-12-28 Thread Huang Shijie

Add these macros, since we can use them in drivers.

Signed-off-by: Huang Shijie 
---
 include/linux/sizes.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/linux/sizes.h b/include/linux/sizes.h
index 9874f6f67537..1ac79bcee2bb 100644
--- a/include/linux/sizes.h
+++ b/include/linux/sizes.h
@@ -44,6 +44,9 @@
 #define SZ_2G  0x8000
 
 #define SZ_4G  _AC(0x1, ULL)
+#define SZ_8G  _AC(0x2, ULL)
+#define SZ_16G _AC(0x4, ULL)
+#define SZ_32G _AC(0x8, ULL)
 #define SZ_64T _AC(0x4000, ULL)
 
 #endif /* __LINUX_SIZES_H__ */
-- 
2.17.1

Re: [PATCH v6 4/4] perf-stat: add documentation for -b option

On Tue, Dec 29, 2020 at 2:41 AM Song Liu  wrote:
>
> Add documentation to perf-stat -b option, which stats event for BPF
> programs.
>
> Signed-off-by: Song Liu 
> ---
>  tools/perf/Documentation/perf-stat.txt | 14 ++
>  1 file changed, 14 insertions(+)
>
> diff --git a/tools/perf/Documentation/perf-stat.txt 
> b/tools/perf/Documentation/perf-stat.txt
> index 5d4a673d7621a..15b9a646e853d 100644
> --- a/tools/perf/Documentation/perf-stat.txt
> +++ b/tools/perf/Documentation/perf-stat.txt
> @@ -75,6 +75,20 @@ report::
>  --tid=::
>  stat events on existing thread id (comma separated list)
>
> +-b::
> +--bpf-prog::
> +stat events on existing bpf program id (comma separated list),
> +requiring root righs. For example:

Typo: rights

It'd be nice if it can show how we can get the id.

Thanks,
Namhyung


> +
> +  # perf stat -e cycles,instructions --bpf-prog 17247 --timeout 1000
> +
> +   Performance counter stats for 'BPF program(s) 17247':
> +
> + 85,967  cycles
> + 28,982  instructions  #0.34  insn per cycle
> +
> +1.102235068 seconds time elapsed
> +
>  ifdef::HAVE_LIBPFM[]
>  --pfm-events events::
>  Select a PMU event using libpfm4 syntax (see http://perfmon2.sf.net)
> --
> 2.24.1
>

Re: [PATCH v6 3/4] perf-stat: enable counting events for BPF programs

On Tue, Dec 29, 2020 at 2:41 AM Song Liu  wrote:
>
> Introduce perf-stat -b option, which counts events for BPF programs, like:
>
> [root@localhost ~]# ~/perf stat -e ref-cycles,cycles -b 254 -I 1000
>  1.487903822115,200  ref-cycles
>  1.487903822 86,012  cycles
>  2.489147029 80,560  ref-cycles
>  2.489147029 73,784  cycles
>  3.490341825 60,720  ref-cycles
>  3.490341825 37,797  cycles
>  4.491540887 37,120  ref-cycles
>  4.491540887 31,963  cycles
>
> The example above counts cycles and ref-cycles of BPF program of id 254.
> This is similar to bpftool-prog-profile command, but more flexible.
>
> perf-stat -b creates per-cpu perf_event and loads fentry/fexit BPF
> programs (monitor-progs) to the target BPF program (target-prog). The
> monitor-progs read perf_event before and after the target-prog, and
> aggregate the difference in a BPF map. Then the user space reads data
> from these maps.
>
> A new struct bpf_counter is introduced to provide common interface that
> uses BPF programs/maps to count perf events.
>
> Signed-off-by: Song Liu 
> ---
>  tools/perf/Makefile.perf  |   2 +-
>  tools/perf/builtin-stat.c |  77 -
>  tools/perf/util/Build |   1 +
>  tools/perf/util/bpf_counter.c | 296 ++
>  tools/perf/util/bpf_counter.h |  72 +
>  .../util/bpf_skel/bpf_prog_profiler.bpf.c |  93 ++
>  tools/perf/util/evsel.c   |   9 +
>  tools/perf/util/evsel.h   |   6 +
>  tools/perf/util/stat-display.c|   4 +-
>  tools/perf/util/stat.c|   2 +-
>  tools/perf/util/target.c  |  34 +-
>  tools/perf/util/target.h  |  10 +
>  12 files changed, 588 insertions(+), 18 deletions(-)
>  create mode 100644 tools/perf/util/bpf_counter.c
>  create mode 100644 tools/perf/util/bpf_counter.h
>  create mode 100644 tools/perf/util/bpf_skel/bpf_prog_profiler.bpf.c
>
> diff --git a/tools/perf/Makefile.perf b/tools/perf/Makefile.perf
> index d182a2dbb9bbd..8c4e039c3b813 100644
> --- a/tools/perf/Makefile.perf
> +++ b/tools/perf/Makefile.perf
> @@ -1015,7 +1015,7 @@ python-clean:
>
>  SKEL_OUT := $(abspath $(OUTPUT)util/bpf_skel)
>  SKEL_TMP_OUT := $(abspath $(SKEL_OUT)/.tmp)
> -SKELETONS :=
> +SKELETONS := $(SKEL_OUT)/bpf_prog_profiler.skel.h
>
>  ifdef BUILD_BPF_SKEL
>  BPFTOOL := $(SKEL_TMP_OUT)/bootstrap/bpftool
> diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c
> index 8cc24967bc273..09bffb3fbcdd4 100644
> --- a/tools/perf/builtin-stat.c
> +++ b/tools/perf/builtin-stat.c
> @@ -67,6 +67,7 @@
>  #include "util/top.h"
>  #include "util/affinity.h"
>  #include "util/pfm.h"
> +#include "util/bpf_counter.h"
>  #include "asm/bug.h"
>
>  #include 
> @@ -409,12 +410,31 @@ static int read_affinity_counters(struct timespec *rs)
> return 0;
>  }
>
> +static int read_bpf_map_counters(void)
> +{
> +   struct evsel *counter;
> +   int err;
> +
> +   evlist__for_each_entry(evsel_list, counter) {
> +   err = bpf_counter__read(counter);
> +   if (err)
> +   return err;
> +   }
> +   return 0;
> +}
> +
>  static void read_counters(struct timespec *rs)
>  {
> struct evsel *counter;
> +   int err;
>
> -   if (!stat_config.stop_read_counter && (read_affinity_counters(rs) < 
> 0))
> -   return;
> +   if (!stat_config.stop_read_counter) {
> +   err = read_bpf_map_counters();
> +   if (err == -EAGAIN)
> +   err = read_affinity_counters(rs);

Instead of checking the error code, can we do something like

  if (target__has_bpf(target))
  read_bpf_map_counters();

?

> +   if (err < 0)
> +   return;
> +   }
>
> evlist__for_each_entry(evsel_list, counter) {
> if (counter->err)
> @@ -496,11 +516,20 @@ static bool handle_interval(unsigned int interval, int 
> *times)
> return false;
>  }
>
> -static void enable_counters(void)
> +static int enable_counters(void)
>  {
> +   struct evsel *evsel;
> +   int err;
> +
> +   evlist__for_each_entry(evsel_list, evsel) {
> +   err = bpf_counter__enable(evsel);
> +   if (err)
> +   return err;

Ditto.


> +   }
> +
> if (stat_config.initial_delay < 0) {
> pr_info(EVLIST_DISABLED_MSG);
> -   return;
> +   return 0;
> }
>
> if (stat_config.initial_delay > 0) {
> @@ -518,6 +547,7 @@ static void enable_counters(void)
> if (stat_config.initial_delay > 0)
> pr_info(EVLIST_ENABLED_MSG);
> }
> +   return 0;
>  }
>
>  static

[PATCH] dt-bindings: (hwmon/pm6764tr) Add PM6764TR hwmon driver bindings

2020-12-28 Thread Charles Hsu

Document device tree bindings for STMicroelectronics PM6764tr Voltage
Regulator.

Signed-off-by: Charles Hsu 
---
 .../bindings/hwmon/pmbus/st,pm6764tr.yaml | 47 +++
 .../devicetree/bindings/trivial-devices.yaml  |  2 +
 2 files changed, 49 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/hwmon/pmbus/st,pm6764tr.yaml

diff --git a/Documentation/devicetree/bindings/hwmon/pmbus/st,pm6764tr.yaml 
b/Documentation/devicetree/bindings/hwmon/pmbus/st,pm6764tr.yaml
new file mode 100644
index ..b4b0d5614d8d
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/pmbus/st,pm6764tr.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+
+$id: http://devicetree.org/schemas/hwmon/pmbus/st,pm6764tr.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: PM6764TR voltage regulator
+
+maintainers:
+  - Charles Hsu 
+
+description: |
+  The PM6764/66 is a high performance digital controller designed to power
+  Intel’s VR12.5 processors (PM6766) and memories (PM6764): all required
+  parameters are programmable through a PMBus™ interface.
+  The device utilizes digital technology to implement all control and
+  power management functions to provide maximum flexibility and performance.
+  The NVM is embedded to store custom configurations.
+
+  https://www.st.com/resource/en/data_brief/pm6764.pdf
+
+properties:
+  compatible:
+enum:
+  - st,pm6764tr
+
+  reg:
+maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+i2c {
+#address-cells = <1>;
+#size-cells = <0>;
+
+pm6764tr@68 {
+compatible = "st,pm6764tr";
+reg = <0x68>;
+};
+};
diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml 
b/Documentation/devicetree/bindings/trivial-devices.yaml
index bdc2dc318178..0a2dcd03220b 100644
--- a/Documentation/devicetree/bindings/trivial-devices.yaml
+++ b/Documentation/devicetree/bindings/trivial-devices.yaml
@@ -260,6 +260,8 @@ properties:
   - socionext,synquacer-tpm-mmio
 # i2c serial eeprom  (24cxx)
   - st,24c256
+# STMicroelectronics Voltage Regulator
+  - st,pm6764tr
 # Ambient Light Sensor with SMBUS/Two Wire Serial Interface
   - taos,tsl2550
 # Temperature Monitoring and Fan Control
-- 
2.25.1

mapping.c:undefined reference to `dma_to_phys'

Hi Christoph,

FYI, the error/warning still remains.

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   dea8dcf2a9fa8cc540136a6cd885c3beece16ec3
commit: 7bc5c428a660d4d1bc95ba54bf4cb6bccf8c3029 dma-direct: remove 
__dma_to_phys
date:   4 months ago
config: mips-randconfig-s031-20201220 (attached as .config)
compiler: mips64-linux-gcc (GCC) 9.3.0
reproduce:
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.3-184-g1b896707-dirty
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=7bc5c428a660d4d1bc95ba54bf4cb6bccf8c3029
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 7bc5c428a660d4d1bc95ba54bf4cb6bccf8c3029
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 
CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=mips 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

   mips64-linux-ld: kernel/dma/mapping.o: in function `dma_map_page_attrs':
   mapping.c:(.text+0x108): undefined reference to `__phys_to_dma'
   mips64-linux-ld: kernel/dma/mapping.o: in function `dma_unmap_page_attrs':
>> mapping.c:(.text+0x24c): undefined reference to `dma_to_phys'
>> mips64-linux-ld: mapping.c:(.text+0x28c): undefined reference to 
>> `dma_to_phys'
   mips64-linux-ld: kernel/dma/mapping.o: in function `dma_sync_single_for_cpu':
   mapping.c:(.text+0x490): undefined reference to `dma_to_phys'
   mips64-linux-ld: kernel/dma/mapping.o: in function 
`dma_sync_single_for_device':
   mapping.c:(.text+0x4f0): undefined reference to `dma_to_phys'
   mips64-linux-ld: kernel/dma/direct.o: in function 
`dma_direct_get_required_mask':
   direct.c:(.text+0xb4): undefined reference to `__phys_to_dma'
   mips64-linux-ld: kernel/dma/direct.o: in function `dma_direct_alloc':
>> direct.c:(.text+0x1dc): undefined reference to `dma_to_phys'
   mips64-linux-ld: direct.c:(.text+0x2bc): undefined reference to 
`__phys_to_dma'
   mips64-linux-ld: direct.c:(.text+0x398): undefined reference to 
`__phys_to_dma'
>> mips64-linux-ld: direct.c:(.text+0x428): undefined reference to `dma_to_phys'
   mips64-linux-ld: kernel/dma/direct.o: in function `dma_direct_free':
   direct.c:(.text+0x55c): undefined reference to `dma_to_phys'
   mips64-linux-ld: kernel/dma/direct.o: in function `dma_direct_map_sg':
   direct.c:(.text+0x69c): undefined reference to `__phys_to_dma'
   mips64-linux-ld: kernel/dma/direct.o: in function `dma_direct_get_sgtable':
   direct.c:(.text+0x8c8): undefined reference to `dma_to_phys'
   mips64-linux-ld: kernel/dma/direct.o: in function `dma_direct_mmap':
   direct.c:(.text+0x9cc): undefined reference to `dma_to_phys'
   mips64-linux-ld: kernel/dma/direct.o: in function `dma_direct_supported':
   direct.c:(.text+0xaa8): undefined reference to `__phys_to_dma'
   mips64-linux-ld: kernel/dma/direct.o: in function `dma_direct_need_sync':
   direct.c:(.text+0xad8): undefined reference to `dma_to_phys'

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip

[PATCH] KVM: x86/pmu: Fix UBSAN shift-out-of-bounds warning in intel_pmu_refresh()

2020-12-28 Thread Like Xu

Since we know vPMU will not work properly when the guest bit_width(s) of
the [gp|fixed] counters are greater than the host ones, so we can setup a
smaller left shift value and refresh the guest pmu cpuid entry, thus fixing
the following UBSAN shift-out-of-bounds warning:

shift exponent 197 is too large for 64-bit type 'long long unsigned int'

Call Trace:
 __dump_stack lib/dump_stack.c:79 [inline]
 dump_stack+0x107/0x163 lib/dump_stack.c:120
 ubsan_epilogue+0xb/0x5a lib/ubsan.c:148
 __ubsan_handle_shift_out_of_bounds.cold+0xb1/0x181 lib/ubsan.c:395
 intel_pmu_refresh.cold+0x75/0x99 arch/x86/kvm/vmx/pmu_intel.c:348
 kvm_vcpu_after_set_cpuid+0x65a/0xf80 arch/x86/kvm/cpuid.c:177
 kvm_vcpu_ioctl_set_cpuid2+0x160/0x440 arch/x86/kvm/cpuid.c:308
 kvm_arch_vcpu_ioctl+0x11b6/0x2d70 arch/x86/kvm/x86.c:4709
 kvm_vcpu_ioctl+0x7b9/0xdb0 arch/x86/kvm/../../../virt/kvm/kvm_main.c:3386
 vfs_ioctl fs/ioctl.c:48 [inline]
 __do_sys_ioctl fs/ioctl.c:753 [inline]
 __se_sys_ioctl fs/ioctl.c:739 [inline]
 __x64_sys_ioctl+0x193/0x200 fs/ioctl.c:739
 do_syscall_64+0x2d/0x70 arch/x86/entry/common.c:46
 entry_SYSCALL_64_after_hwframe+0x44/0xa9

Reported-by: syzbot+ae488dc136a4cc6ba...@syzkaller.appspotmail.com
Signed-off-by: Like Xu 
---
 arch/x86/kvm/vmx/pmu_intel.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index a886a47daebd..a86a1690e75c 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -345,6 +345,7 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
 
pmu->nr_arch_gp_counters = min_t(int, eax.split.num_counters,
 x86_pmu.num_counters_gp);
+   eax.split.bit_width = min_t(int, eax.split.bit_width, 
x86_pmu.bit_width_gp);
pmu->counter_bitmask[KVM_PMC_GP] = ((u64)1 << eax.split.bit_width) - 1;
pmu->available_event_types = ~entry->ebx &
((1ull << eax.split.mask_length) - 1);
@@ -355,6 +356,8 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
pmu->nr_arch_fixed_counters =
min_t(int, edx.split.num_counters_fixed,
  x86_pmu.num_counters_fixed);
+   edx.split.bit_width_fixed = min_t(int,
+   edx.split.bit_width_fixed, x86_pmu.bit_width_fixed);
pmu->counter_bitmask[KVM_PMC_FIXED] =
((u64)1 << edx.split.bit_width_fixed) - 1;
}
-- 
2.29.2

i2c-sprd.c:(.text.sprd_i2c_probe+0x180): undefined reference to `clk_set_parent'

Hi Krzysztof,

FYI, the error/warning still remains.

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   dea8dcf2a9fa8cc540136a6cd885c3beece16ec3
commit: 4a2d5f663dab6614772d8e28ca190b127ba46d9d i2c: Enable compile testing 
for more drivers
date:   11 months ago
config: mips-randconfig-r013-20201223 (attached as .config)
compiler: mips-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=4a2d5f663dab6614772d8e28ca190b127ba46d9d
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 4a2d5f663dab6614772d8e28ca190b127ba46d9d
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross 
ARCH=mips 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

   mips-linux-ld: drivers/i2c/busses/i2c-sprd.o: in function `sprd_i2c_probe':
>> i2c-sprd.c:(.text.sprd_i2c_probe+0x180): undefined reference to 
>> `clk_set_parent'
   mips-linux-ld: drivers/memory/samsung/exynos5422-dmc.o: in function 
`exynos5_dmc_probe':
   exynos5422-dmc.c:(.text.exynos5_dmc_probe+0x37c): undefined reference to 
`clk_set_parent'
   mips-linux-ld: drivers/memory/samsung/exynos5422-dmc.o: in function 
`exynos5_dmc_change_freq_and_volt':
   exynos5422-dmc.c:(.text.exynos5_dmc_change_freq_and_volt+0x114): undefined 
reference to `clk_set_parent'
   mips-linux-ld: 
exynos5422-dmc.c:(.text.exynos5_dmc_change_freq_and_volt+0x340): undefined 
reference to `clk_set_parent'
   mips-linux-ld: drivers/iio/adc/ingenic-adc.o: in function 
`jz4770_adc_init_clk_div':
   ingenic-adc.c:(.text.jz4770_adc_init_clk_div+0x10): undefined reference to 
`clk_get_parent'
   mips-linux-ld: drivers/iio/adc/ingenic-adc.o: in function 
`jz4725b_adc_init_clk_div':
   ingenic-adc.c:(.text.jz4725b_adc_init_clk_div+0x10): undefined reference to 
`clk_get_parent'

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip

[PATCH] irqchip/gic: add WARN_ON() to facilitate backtracking

2020-12-28 Thread Yejune Deng

There is two function gic_of_init() and gic_of_init_child() called
gic_of_setup(),so add WARN_ON() to facilitate backtracking.

Signed-off-by: Yejune Deng 
---
 drivers/irqchip/irq-gic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index b1d9c22..7c11705 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -1380,7 +1380,7 @@ static bool gic_check_eoimode(struct device_node *node, 
void __iomem **base)
 
 static int gic_of_setup(struct gic_chip_data *gic, struct device_node *node)
 {
-   if (!gic || !node)
+   if (WARN_ON(!gic || !node))
return -EINVAL;
 
gic->raw_dist_base = of_iomap(node, 0);
-- 
1.9.1

[PATCH] usb: usbip: vhci_hcd: protect shift size

Fix shift out-of-bounds in vhci_hcd.c:

  UBSAN: shift-out-of-bounds in ../drivers/usb/usbip/vhci_hcd.c:399:41
  shift exponent 768 is too large for 32-bit type 'int'

Fixes: 03cd00d538a6 ("usbip: vhci-hcd: Set the vhci structure up to work")
Signed-off-by: Randy Dunlap 
Reported-by: syzbot+297d20e437b79283b...@syzkaller.appspotmail.com
Cc: Yuyang Du 
Cc: Shuah Khan 
Cc: Greg Kroah-Hartman 
Cc: linux-...@vger.kernel.org
---
 drivers/usb/usbip/vhci_hcd.c |2 ++
 1 file changed, 2 insertions(+)

--- linux-5.10.orig/drivers/usb/usbip/vhci_hcd.c
+++ linux-5.10/drivers/usb/usbip/vhci_hcd.c
@@ -396,6 +396,8 @@ static int vhci_hub_control(struct usb_h
default:
usbip_dbg_vhci_rh(" ClearPortFeature: default %x\n",
  wValue);
+   if (wValue >= 32)
+   goto error;
vhci_hcd->port_status[rhport] &= ~(1 << wValue);
break;
}

[PATCH v2] mhi: use irq_flags if client driver configures it

2020-12-28 Thread Carl Huang

If client driver has specified the irq_flags, mhi uses this specified
irq_flags. Otherwise, mhi uses default irq_flags.

The purpose of this change is to support one MSI vector for QCA6390.
MHI will use one same MSI vector too in this scenario.

In case of one MSI vector, IRQ_NO_BALANCING is needed when irq handler
is requested. The reason is if irq migration happens, the msi_data may
change too. However, the msi_data is already programmed to QCA6390
hardware during initialization phase. This msi_data inconsistence will
result in crash in kernel.

Another issue is in case of one MSI vector, IRQF_NO_SUSPEND will trigger
WARNINGS because QCA6390 wants to disable the IRQ during the suspend.

To avoid above two issues, QCA6390 driver specifies the irq_flags in case
of one MSI vector when mhi_register_controller is called.

Signed-off-by: Carl Huang 
---
v2:
- document irq_flags added to mhi_controller

 drivers/bus/mhi/core/init.c | 9 +++--
 include/linux/mhi.h | 2 ++
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c
index 0ffdebd..5f74e1e 100644
--- a/drivers/bus/mhi/core/init.c
+++ b/drivers/bus/mhi/core/init.c
@@ -148,12 +148,17 @@ int mhi_init_irq_setup(struct mhi_controller *mhi_cntrl)
 {
struct mhi_event *mhi_event = mhi_cntrl->mhi_event;
struct device *dev = _cntrl->mhi_dev->dev;
+   unsigned long irq_flags = IRQF_SHARED | IRQF_NO_SUSPEND;
int i, ret;
 
+   /* if client driver has set irq_flags, use it */
+   if (mhi_cntrl->irq_flags)
+   irq_flags = mhi_cntrl->irq_flags;
+
/* Setup BHI_INTVEC IRQ */
ret = request_threaded_irq(mhi_cntrl->irq[0], mhi_intvec_handler,
   mhi_intvec_threaded_handler,
-  IRQF_SHARED | IRQF_NO_SUSPEND,
+  irq_flags,
   "bhi", mhi_cntrl);
if (ret)
return ret;
@@ -171,7 +176,7 @@ int mhi_init_irq_setup(struct mhi_controller *mhi_cntrl)
 
ret = request_irq(mhi_cntrl->irq[mhi_event->irq],
  mhi_irq_handler,
- IRQF_SHARED | IRQF_NO_SUSPEND,
+ irq_flags,
  "mhi", mhi_event);
if (ret) {
dev_err(dev, "Error requesting irq:%d for ev:%d\n",
diff --git a/include/linux/mhi.h b/include/linux/mhi.h
index d4841e5..918cf6a 100644
--- a/include/linux/mhi.h
+++ b/include/linux/mhi.h
@@ -353,6 +353,7 @@ struct mhi_controller_config {
  * @fbc_download: MHI host needs to do complete image transfer (optional)
  * @pre_init: MHI host needs to do pre-initialization before power up
  * @wake_set: Device wakeup set flag
+ * @irq_flags: irq flags passed to request_irq (optional)
  *
  * Fields marked as (required) need to be populated by the controller driver
  * before calling mhi_register_controller(). For the fields marked as 
(optional)
@@ -442,6 +443,7 @@ struct mhi_controller {
bool fbc_download;
bool pre_init;
bool wake_set;
+   unsigned long irq_flags;
 };
 
 /**
-- 
2.7.4

Re: [PATCH v6 2/4] perf: support build BPF skeletons with perf

Hello,

On Tue, Dec 29, 2020 at 2:41 AM Song Liu  wrote:
>
> BPF programs are useful in perf to profile BPF programs. BPF skeleton is

I'm having difficulties understanding the first sentence - looks like a
recursion. :)  So do you want to use two (or more) BPF programs?

Thanks,
Namhyung


> by far the easiest way to write BPF tools. Enable building BPF skeletons
> in util/bpf_skel. A dummy bpf skeleton is added. More bpf skeletons will
> be added for different use cases.
>
> Acked-by: Jiri Olsa 
> Signed-off-by: Song Liu 
> ---
>  tools/build/Makefile.feature|  4 ++-
>  tools/perf/Makefile.config  |  9 ++
>  tools/perf/Makefile.perf| 49 +++--
>  tools/perf/util/bpf_skel/.gitignore |  3 ++
>  tools/scripts/Makefile.include  |  1 +
>  5 files changed, 63 insertions(+), 3 deletions(-)
>  create mode 100644 tools/perf/util/bpf_skel/.gitignore
>
> diff --git a/tools/build/Makefile.feature b/tools/build/Makefile.feature
> index 97cbfb31b7625..74e255d58d8d0 100644
> --- a/tools/build/Makefile.feature
> +++ b/tools/build/Makefile.feature
> @@ -99,7 +99,9 @@ FEATURE_TESTS_EXTRA :=  \
>   clang  \
>   libbpf \
>   libpfm4\
> - libdebuginfod
> + libdebuginfod \
> + clang-bpf-co-re
> +
>
>  FEATURE_TESTS ?= $(FEATURE_TESTS_BASIC)
>
> diff --git a/tools/perf/Makefile.config b/tools/perf/Makefile.config
> index ce8516e4de34f..d8e59d31399a5 100644
> --- a/tools/perf/Makefile.config
> +++ b/tools/perf/Makefile.config
> @@ -621,6 +621,15 @@ ifndef NO_LIBBPF
>endif
>  endif
>
> +ifdef BUILD_BPF_SKEL
> +  $(call feature_check,clang-bpf-co-re)
> +  ifeq ($(feature-clang-bpf-co-re), 0)
> +dummy := $(error Error: clang too old. Please install recent clang)
> +  endif
> +  $(call detected,CONFIG_PERF_BPF_SKEL)
> +  CFLAGS += -DHAVE_BPF_SKEL
> +endif
> +
>  dwarf-post-unwind := 1
>  dwarf-post-unwind-text := BUG
>
> diff --git a/tools/perf/Makefile.perf b/tools/perf/Makefile.perf
> index 62f3deb1d3a8b..d182a2dbb9bbd 100644
> --- a/tools/perf/Makefile.perf
> +++ b/tools/perf/Makefile.perf
> @@ -126,6 +126,8 @@ include ../scripts/utilities.mak
>  #
>  # Define NO_LIBDEBUGINFOD if you do not want support debuginfod
>  #
> +# Define BUILD_BPF_SKEL to enable BPF skeletons
> +#
>
>  # As per kernel Makefile, avoid funny character set dependencies
>  unexport LC_ALL
> @@ -175,6 +177,12 @@ endef
>
>  LD += $(EXTRA_LDFLAGS)
>
> +HOSTCC  ?= gcc
> +HOSTLD  ?= ld
> +HOSTAR  ?= ar
> +CLANG   ?= clang
> +LLVM_STRIP ?= llvm-strip
> +
>  PKG_CONFIG = $(CROSS_COMPILE)pkg-config
>  LLVM_CONFIG ?= llvm-config
>
> @@ -731,7 +739,8 @@ prepare: $(OUTPUT)PERF-VERSION-FILE 
> $(OUTPUT)common-cmds.h archheaders $(drm_ioc
> $(x86_arch_prctl_code_array) \
> $(rename_flags_array) \
> $(arch_errno_name_array) \
> -   $(sync_file_range_arrays)
> +   $(sync_file_range_arrays) \
> +   bpf-skel
>
>  $(OUTPUT)%.o: %.c prepare FORCE
> $(Q)$(MAKE) -f $(srctree)/tools/build/Makefile.build dir=$(build-dir) 
> $@
> @@ -1004,7 +1013,43 @@ config-clean:
>  python-clean:
> $(python-clean)
>
> -clean:: $(LIBTRACEEVENT)-clean $(LIBAPI)-clean $(LIBBPF)-clean 
> $(LIBSUBCMD)-clean $(LIBPERF)-clean config-clean fixdep-clean python-clean
> +SKEL_OUT := $(abspath $(OUTPUT)util/bpf_skel)
> +SKEL_TMP_OUT := $(abspath $(SKEL_OUT)/.tmp)
> +SKELETONS :=
> +
> +ifdef BUILD_BPF_SKEL
> +BPFTOOL := $(SKEL_TMP_OUT)/bootstrap/bpftool
> +LIBBPF_SRC := $(abspath ../lib/bpf)
> +BPF_INCLUDE := -I$(SKEL_TMP_OUT)/.. -I$(BPF_PATH) -I$(LIBBPF_SRC)/..
> +
> +$(SKEL_TMP_OUT):
> +   $(Q)$(MKDIR) -p $@
> +
> +$(BPFTOOL): | $(SKEL_TMP_OUT)
> +   CFLAGS= $(MAKE) -C ../bpf/bpftool \
> +   OUTPUT=$(SKEL_TMP_OUT)/ bootstrap
> +
> +$(SKEL_TMP_OUT)/%.bpf.o: util/bpf_skel/%.bpf.c $(LIBBPF) | $(SKEL_TMP_OUT)
> +   $(QUIET_CLANG)$(CLANG) -g -O2 -target bpf $(BPF_INCLUDE) \
> + -c $(filter util/bpf_skel/%.bpf.c,$^) -o $@ && $(LLVM_STRIP) -g $@
> +
> +$(SKEL_OUT)/%.skel.h: $(SKEL_TMP_OUT)/%.bpf.o | $(BPFTOOL)
> +   $(QUIET_GENSKEL)$(BPFTOOL) gen skeleton $< > $@
> +
> +bpf-skel: $(SKELETONS)
> +
> +.PRECIOUS: $(SKEL_TMP_OUT)/%.bpf.o
> +
> +else # BUILD_BPF_SKEL
> +
> +bpf-skel:
> +
> +endif # BUILD_BPF_SKEL
> +
> +bpf-skel-clean:
> +   $(call QUIET_CLEAN, bpf-skel) $(RM) -r $(SKEL_TMP_OUT) $(SKELETONS)
> +
> +clean:: $(LIBTRACEEVENT)-clean $(LIBAPI)-clean $(LIBBPF)-clean 
> $(LIBSUBCMD)-clean $(LIBPERF)-clean config-clean fixdep-clean python-clean 
> bpf-skel-clean
> $(call QUIET_CLEAN, core-objs)  $(RM) $(LIBPERF_A) 
> $(OUTPUT)perf-archive $(OUTPUT)perf-with-kcore $(LANG_BINDINGS)
> $(Q)find $(if $(OUTPUT),$(OUTPUT),.) -name '*.o' -delete -o -name 
> '\.*.cmd' -delete -o -name '\.*.d' -delete
> $(Q)$(RM) $(OUTPUT).config-detected
> diff --git

Re: [PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting

2020-12-28 Thread Xin Ji

On Mon, Dec 28, 2020 at 05:08:56PM +0200, Laurent Pinchart wrote:
> Hi Xin Ji,
> 
> Thank you for the patch.
> 
> On Fri, Dec 25, 2020 at 07:01:09PM +0800, Xin Ji wrote:
> > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add
> > swing setting for adjusting DP tx PHY swing
> > 
> > Signed-off-by: Xin Ji 
> > ---
> >  .../bindings/display/bridge/analogix,anx7625.yaml | 19 
> > +++
> >  1 file changed, 19 insertions(+)
> > 
> > diff --git 
> > a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml 
> > b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
> > index 60585a4..34a7faf 100644
> > --- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
> > +++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
> > @@ -34,6 +34,14 @@ properties:
> >  description: used for reset chip control, RESET_N pin B7.
> >  maxItems: 1
> >  
> > +  anx,swing-setting:
> > +$ref: /schemas/types.yaml#/definitions/uint32-array
> > +description: an array of swing register setting for DP tx PHY
> 
> Register values in DT are frowned upon.
Hi Laurent Pinchart, as the different vendor has the different PCB layout,
it effects DP CTS test result, so they may need config DP tx Swing register
to adjust signal swing(the default swing setting is not satisfy for
every platform). If we move the config code to driver file, it must define
swing register setting for each vendor, so the DT is the best way. Do you
have any idea for it if you don't agree to add in DT.
> 
> > +  anx,mipi-dpi-in:
> > +$ref: /schemas/types.yaml#/definitions/uint32
> > +description: indicate the MIPI rx signal type is DPI or DSI
> 
> This sounds similar to the bus-type property defined in
> Documentation/devicetree/bindings/media/video-interfaces.txt (which is
> getting converted to YAML, Rob has posted a patch series, I expect it to
> land in v5.13). I think it would make sense to extend bus-type to
> support DSI, and use that property.
Sorry, I didn't found any define for DPI or DSI flag in Rob's patches.
Do you mean I just remove this flag define and call a special function
to read the port's type(DSI or DPI)?
> 
> > +
> >ports:
> >  type: object
> >  
> > @@ -72,6 +80,17 @@ examples:
> >  reg = <0x58>;
> >  enable-gpios = < 45 GPIO_ACTIVE_HIGH>;
> >  reset-gpios = < 73 GPIO_ACTIVE_HIGH>;
> > +anx,swing-setting = <0x00 0x14>, <0x01 0x54>,
> > +<0x02 0x64>, <0x03 0x74>, <0x04 0x29>,
> > +<0x05 0x7b>, <0x06 0x77>, <0x07 0x5b>,
> > +<0x08 0x7f>, <0x0c 0x20>, <0x0d 0x60>,
> > +<0x10 0x60>, <0x12 0x40>, <0x13 0x60>,
> > +<0x14 0x14>, <0x15 0x54>, <0x16 0x64>,
> > +<0x17 0x74>, <0x18 0x29>, <0x19 0x7b>,
> > +<0x1a 0x77>, <0x1b 0x5b>, <0x1c 0x7f>,
> > +<0x20 0x20>, <0x21 0x60>, <0x24 0x60>,
> > +<0x26 0x40>, <0x27 0x60>;
> > +anx,mipi-dpi-in = <0>;
> >  
> >  ports {
> >  #address-cells = <1>;
> 
> -- 
> Regards,
> 
> Laurent Pinchart

Re: [PATCH 1/1] ARM: LPAE: use phys_addr_t instead of unsigned long in outercache hooks

2020-12-28 Thread Leizhen (ThunderTown)




On 2020/12/28 15:00, Arnd Bergmann wrote:
> On Fri, Dec 25, 2020 at 12:48 PM Zhen Lei  wrote:
>>
>> The outercache of some Hisilicon SOCs support physical addresses wider
>> than 32-bits. The unsigned long datatype is not sufficient for mapping
>> physical addresses >= 4GB. The commit ad6b9c9d78b9 ("ARM: 6671/1: LPAE:
>> use phys_addr_t instead of unsigned long in outercache functions") has
>> already modified the outercache functions. But the parameters of the
>> outercache hooks are not changed. This patch use phys_addr_t instead of
>> unsigned long in outercache hooks: inv_range, clean_range, flush_range.
>>
>> To ensure the outercache that does not support LPAE works properly, do
>> cast phys_addr_t to unsigned long by adding a middle-tier function.
>> For example:
>> -static void l2c220_inv_range(unsigned long start, unsigned long end)
>> +static void __l2c220_inv_range(unsigned long start, unsigned long end)
>>  {
>> ...
>>  }
>> +static void l2c220_inv_range(phys_addr_t start, phys_addr_t end)
>> +{
>> +  __l2c220_inv_range(start, end);
>> +}
>>
>> Note that the outercache functions have been doing this cast before this
>> patch. So now, the cast is just moved to the middle-tier function.
>>
>> No functional change.
>>
>> Signed-off-by: Zhen Lei 
> 
> This looks reasonable in principle, but it would be helpful to
> understand better which SoCs are affected. In which way is
> this specific to Hisilicon implementations, and why would others
> not need this?

I answered at the end.

> 
> Wouldn't this also be needed by an Armada XP that supports
> more than 4GB of RAM but has an outer cache?

I don't know about the armada XP environment.

> 
> I suppose those SoCs using off-the-shelf Arm cores are either
> pre-LPAE and cannot address memory above 4GB, or they do
> not need the outer_cache interfaces.

I think so.

> 
>> diff --git a/arch/arm/mm/cache-feroceon-l2.c 
>> b/arch/arm/mm/cache-feroceon-l2.c
>> index 5c1b7a7b9af6300..ab1d8051bf832c9 100644
>> --- a/arch/arm/mm/cache-feroceon-l2.c
>> +++ b/arch/arm/mm/cache-feroceon-l2.c
>> @@ -168,7 +168,7 @@ static unsigned long calc_range_end(unsigned long start, 
>> unsigned long end)
>> return range_end;
>>  }
>>
>> -static void feroceon_l2_inv_range(unsigned long start, unsigned long end)
>> +static void __feroceon_l2_inv_range(unsigned long start, unsigned long end)
>>  {
>> /*
>>  * Clean and invalidate partial first cache line.
>> @@ -198,7 +198,12 @@ static void feroceon_l2_inv_range(unsigned long start, 
>> unsigned long end)
>> dsb();
>>  }
>>
>> -static void feroceon_l2_clean_range(unsigned long start, unsigned long end)
>> +static void feroceon_l2_inv_range(phys_addr_t start, phys_addr_t end)
>> +{
>> +   __feroceon_l2_inv_range(start, end);
>> +}
>> +
> 
> What is this indirection for? It looks like you do this for all 
> implementations,
> so the actual address gets truncated here.

Because these environments are all 32-bit physical addresses or only the lower
32-bit physical addresses need to be operated. But my environment operates 
64-bit
physical address and sizeof(long) is 32. So need to change the datatype of the
outchache hooks.

 struct outer_cache_fns {
-   void (*inv_range)(unsigned long, unsigned long);
-   void (*clean_range)(unsigned long, unsigned long);
-   void (*flush_range)(unsigned long, unsigned long);
+   void (*inv_range)(phys_addr_t, phys_addr_t);
+   void (*clean_range)(phys_addr_t, phys_addr_t);
+   void (*flush_range)(phys_addr_t, phys_addr_t);
void (*flush_all)(void);

I added middle-tier function for all implementations, just to ensure that the
above changes do not have side effects on them.

> 
>Arnd
> 
> .
>

[PATCH v4 4/5] pinctrl: aspeed-g5: Adapt to new LPC device tree layout

Add check against LPC device v2 compatible string to
ensure that the fixed device tree layout is adopted.
The LPC register offsets are also fixed accordingly.

Signed-off-by: Chia-Wei, Wang 
---
 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 17 +++--
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c 
b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
index 0cab4c2576e2..996ebcba4d38 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
@@ -60,7 +60,7 @@
 #define COND2  { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 0, 0 }
 
 /* LHCR0 is offset from the end of the H8S/2168-compatible registers */
-#define LHCR0  0x20
+#define LHCR0  0xa0
 #define GFX064 0x64
 
 #define B14 0
@@ -2648,14 +2648,19 @@ static struct regmap *aspeed_g5_acquire_regmap(struct 
aspeed_pinmux_data *ctx,
}
 
if (ip == ASPEED_IP_LPC) {
-   struct device_node *node;
+   struct device_node *np;
struct regmap *map;
 
-   node = of_parse_phandle(ctx->dev->of_node,
+   np = of_parse_phandle(ctx->dev->of_node,
"aspeed,external-nodes", 1);
-   if (node) {
-   map = syscon_node_to_regmap(node->parent);
-   of_node_put(node);
+   if (np) {
+   if (!of_device_is_compatible(np->parent, 
"aspeed,ast2400-lpc-v2") &&
+   !of_device_is_compatible(np->parent, 
"aspeed,ast2500-lpc-v2") &&
+   !of_device_is_compatible(np->parent, 
"aspeed,ast2600-lpc-v2"))
+   return ERR_PTR(-ENODEV);
+
+   map = syscon_node_to_regmap(np->parent);
+   of_node_put(np);
if (IS_ERR(map))
return map;
} else
-- 
2.17.1

[PATCH v4 1/5] dt-bindings: aspeed-lpc: Remove LPC partitioning

The LPC controller has no concept of the BMC and the Host partitions.
This patch fixes the documentation by removing the description on LPC
partitions. The register offsets illustrated in the DTS node examples
are also fixed to adapt to the LPC DTS change.

Signed-off-by: Chia-Wei, Wang 
---
 .../devicetree/bindings/mfd/aspeed-lpc.txt| 99 ---
 1 file changed, 21 insertions(+), 78 deletions(-)

diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt 
b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
index d0a38ba8b9ce..90eb0ecc95d1 100644
--- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
+++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
@@ -9,13 +9,7 @@ primary use case of the Aspeed LPC controller is as a slave on 
the bus
 conditions it can also take the role of bus master.
 
 The LPC controller is represented as a multi-function device to account for the
-mix of functionality it provides. The principle split is between the register
-layout at the start of the I/O space which is, to quote the Aspeed datasheet,
-"basically compatible with the [LPC registers from the] popular BMC controller
-H8S/2168[1]", and everything else, where everything else is an eclectic
-collection of functions with a esoteric register layout. "Everything else",
-here labeled the "host" portion of the controller, includes, but is not limited
-to:
+mix of functionality, which includes, but is not limited to:
 
 * An IPMI Block Transfer[2] Controller
 
@@ -44,80 +38,29 @@ Required properties
 ===
 
 - compatible:  One of:
-   "aspeed,ast2400-lpc", "simple-mfd"
-   "aspeed,ast2500-lpc", "simple-mfd"
-   "aspeed,ast2600-lpc", "simple-mfd"
+   "aspeed,ast2400-lpc-v2", "simple-mfd", "syscon"
+   "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon"
+   "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon"
 
 - reg: contains the physical address and length values of the Aspeed
 LPC memory region.
 
 - #address-cells: <1>
 - #size-cells: <1>
-- ranges:  Maps 0 to the physical address and length of the LPC memory
-region
-
-Required LPC Child nodes
-
-
-BMC Node
-
-
-- compatible:  One of:
-   "aspeed,ast2400-lpc-bmc"
-   "aspeed,ast2500-lpc-bmc"
-   "aspeed,ast2600-lpc-bmc"
-
-- reg: contains the physical address and length values of the
-H8S/2168-compatible LPC controller memory region
-
-Host Node
--
-
-- compatible:   One of:
-   "aspeed,ast2400-lpc-host", "simple-mfd", "syscon"
-   "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"
-   "aspeed,ast2600-lpc-host", "simple-mfd", "syscon"
-
-- reg: contains the address and length values of the host-related
-register space for the Aspeed LPC controller
-
-- #address-cells: <1>
-- #size-cells: <1>
-- ranges:  Maps 0 to the address and length of the host-related LPC memory
+- ranges:  Maps 0 to the physical address and length of the LPC memory
 region
 
 Example:
 
 lpc: lpc@1e789000 {
-   compatible = "aspeed,ast2500-lpc", "simple-mfd";
+   compatible = "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon";
reg = <0x1e789000 0x1000>;
 
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x1e789000 0x1000>;
-
-   lpc_bmc: lpc-bmc@0 {
-   compatible = "aspeed,ast2500-lpc-bmc";
-   reg = <0x0 0x80>;
-   };
-
-   lpc_host: lpc-host@80 {
-   compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
-   reg = <0x80 0x1e0>;
-   reg-io-width = <4>;
-
-   #address-cells = <1>;
-   #size-cells = <1>;
-   ranges = <0x0 0x80 0x1e0>;
-   };
 };
 
-BMC Node Children
-==
-
-
-Host Node Children
-==
 
 LPC Host Interface Controller
 ---
@@ -149,14 +92,12 @@ Optional properties:
 
 Example:
 
-lpc-host@80 {
-   lpc_ctrl: lpc-ctrl@0 {
-   compatible = "aspeed,ast2500-lpc-ctrl";
-   reg = <0x0 0x80>;
-   clocks = < ASPEED_CLK_GATE_LCLK>;
-   memory-region = <_memory>;
-   flash = <>;
-   };
+lpc_ctrl: lpc-ctrl@80 {
+   compatible = "aspeed,ast2500-lpc-ctrl";
+   reg = <0x80 0x80>;
+   clocks = < ASPEED_CLK_GATE_LCLK>;
+   memory-region = <_memory>;
+   flash = <>;
 };
 
 LPC Host Controller
@@ -179,9 +120,9 @@ Required properties:
 
 Example:
 
-lhc: lhc@20 {
+lhc: lhc@a0 {
compatible = "aspeed,ast2500-lhc";
-   reg = <0x20 0x24 0x48 0x8>;
+   reg = <0xa0 0x24 0xc8 0x8>;
 };
 
 LPC reset control
@@ -192,16 +133,18 @@ state of the LPC bus. Some systems may chose to modify 
this configuration.
 
 Required properties:
 
- - compatible:

[PATCH v4 5/5] soc: aspeed: Adapt to new LPC device tree layout

Add check against LPC device v2 compatible string to
ensure that the fixed device tree layout is adopted.
The LPC register offsets are also fixed accordingly.

Signed-off-by: Chia-Wei, Wang 
---
 drivers/soc/aspeed/aspeed-lpc-ctrl.c  | 20 ++--
 drivers/soc/aspeed/aspeed-lpc-snoop.c | 23 +++
 2 files changed, 29 insertions(+), 14 deletions(-)

diff --git a/drivers/soc/aspeed/aspeed-lpc-ctrl.c 
b/drivers/soc/aspeed/aspeed-lpc-ctrl.c
index 439bcd6b8c4a..c557ffd0992c 100644
--- a/drivers/soc/aspeed/aspeed-lpc-ctrl.c
+++ b/drivers/soc/aspeed/aspeed-lpc-ctrl.c
@@ -18,15 +18,15 @@
 
 #define DEVICE_NAME"aspeed-lpc-ctrl"
 
-#define HICR5 0x0
+#define HICR5 0x80
 #define HICR5_ENL2HBIT(8)
 #define HICR5_ENFWHBIT(10)
 
-#define HICR6 0x4
+#define HICR6 0x84
 #define SW_FWH2AHB BIT(17)
 
-#define HICR7 0x8
-#define HICR8 0xc
+#define HICR7 0x88
+#define HICR8 0x8c
 
 struct aspeed_lpc_ctrl {
struct miscdevice   miscdev;
@@ -215,6 +215,7 @@ static int aspeed_lpc_ctrl_probe(struct platform_device 
*pdev)
struct device_node *node;
struct resource resm;
struct device *dev;
+   struct device_node *np;
int rc;
 
dev = >dev;
@@ -270,8 +271,15 @@ static int aspeed_lpc_ctrl_probe(struct platform_device 
*pdev)
}
}
 
-   lpc_ctrl->regmap = syscon_node_to_regmap(
-   pdev->dev.parent->of_node);
+   np = pdev->dev.parent->of_node;
+   if (!of_device_is_compatible(np, "aspeed,ast2400-lpc-v2") &&
+   !of_device_is_compatible(np, "aspeed,ast2500-lpc-v2") &&
+   !of_device_is_compatible(np, "aspeed,ast2600-lpc-v2")) {
+   dev_err(dev, "unsupported LPC device binding\n");
+   return -ENODEV;
+   }
+
+   lpc_ctrl->regmap = syscon_node_to_regmap(np);
if (IS_ERR(lpc_ctrl->regmap)) {
dev_err(dev, "Couldn't get regmap\n");
return -ENODEV;
diff --git a/drivers/soc/aspeed/aspeed-lpc-snoop.c 
b/drivers/soc/aspeed/aspeed-lpc-snoop.c
index 682ba0eb4eba..ab0f0a54fea6 100644
--- a/drivers/soc/aspeed/aspeed-lpc-snoop.c
+++ b/drivers/soc/aspeed/aspeed-lpc-snoop.c
@@ -28,26 +28,25 @@
 #define NUM_SNOOP_CHANNELS 2
 #define SNOOP_FIFO_SIZE 2048
 
-#define HICR5  0x0
+#define HICR5  0x80
 #define HICR5_EN_SNP0W BIT(0)
 #define HICR5_ENINT_SNP0W  BIT(1)
 #define HICR5_EN_SNP1W BIT(2)
 #define HICR5_ENINT_SNP1W  BIT(3)
-
-#define HICR6  0x4
+#define HICR6  0x84
 #define HICR6_STR_SNP0WBIT(0)
 #define HICR6_STR_SNP1WBIT(1)
-#define SNPWADR0x10
+#define SNPWADR0x90
 #define SNPWADR_CH0_MASK   GENMASK(15, 0)
 #define SNPWADR_CH0_SHIFT  0
 #define SNPWADR_CH1_MASK   GENMASK(31, 16)
 #define SNPWADR_CH1_SHIFT  16
-#define SNPWDR 0x14
+#define SNPWDR 0x94
 #define SNPWDR_CH0_MASKGENMASK(7, 0)
 #define SNPWDR_CH0_SHIFT   0
 #define SNPWDR_CH1_MASKGENMASK(15, 8)
 #define SNPWDR_CH1_SHIFT   8
-#define HICRB  0x80
+#define HICRB  0x100
 #define HICRB_ENSNP0D  BIT(14)
 #define HICRB_ENSNP1D  BIT(15)
 
@@ -258,6 +257,7 @@ static int aspeed_lpc_snoop_probe(struct platform_device 
*pdev)
 {
struct aspeed_lpc_snoop *lpc_snoop;
struct device *dev;
+   struct device_node *np;
u32 port;
int rc;
 
@@ -267,8 +267,15 @@ static int aspeed_lpc_snoop_probe(struct platform_device 
*pdev)
if (!lpc_snoop)
return -ENOMEM;
 
-   lpc_snoop->regmap = syscon_node_to_regmap(
-   pdev->dev.parent->of_node);
+   np = pdev->dev.parent->of_node;
+   if (!of_device_is_compatible(np, "aspeed,ast2400-lpc-v2") &&
+   !of_device_is_compatible(np, "aspeed,ast2500-lpc-v2") &&
+   !of_device_is_compatible(np, "aspeed,ast2600-lpc-v2")) {
+   dev_err(dev, "unsupported LPC device binding\n");
+   return -ENODEV;
+   }
+
+   lpc_snoop->regmap = syscon_node_to_regmap(np);
if (IS_ERR(lpc_snoop->regmap)) {
dev_err(dev, "Couldn't get regmap\n");
return -ENODEV;
-- 
2.17.1

[PATCH v4 3/5] ipmi: kcs: aspeed: Adapt to new LPC DTS layout

Add check against LPC device v2 compatible string to
ensure that the fixed device tree layout is adopted.
The LPC register offsets are also fixed accordingly.

Signed-off-by: Chia-Wei, Wang 
---
 drivers/char/ipmi/kcs_bmc_aspeed.c | 27 ---
 1 file changed, 16 insertions(+), 11 deletions(-)

diff --git a/drivers/char/ipmi/kcs_bmc_aspeed.c 
b/drivers/char/ipmi/kcs_bmc_aspeed.c
index a140203c079b..eefe362f65f0 100644
--- a/drivers/char/ipmi/kcs_bmc_aspeed.c
+++ b/drivers/char/ipmi/kcs_bmc_aspeed.c
@@ -27,7 +27,6 @@
 
 #define KCS_CHANNEL_MAX 4
 
-/* mapped to lpc-bmc@0 IO space */
 #define LPC_HICR00x000
 #define LPC_HICR0_LPC3E  BIT(7)
 #define LPC_HICR0_LPC2E  BIT(6)
@@ -52,15 +51,13 @@
 #define LPC_STR1 0x03C
 #define LPC_STR2 0x040
 #define LPC_STR3 0x044
-
-/* mapped to lpc-host@80 IO space */
-#define LPC_HICRB0x080
+#define LPC_HICRB0x100
 #define LPC_HICRB_IBFIF4 BIT(1)
 #define LPC_HICRB_LPC4E  BIT(0)
-#define LPC_LADR40x090
-#define LPC_IDR4 0x094
-#define LPC_ODR4 0x098
-#define LPC_STR4 0x09C
+#define LPC_LADR40x110
+#define LPC_IDR4 0x114
+#define LPC_ODR4 0x118
+#define LPC_STR4 0x11C
 
 struct aspeed_kcs_bmc {
struct regmap *map;
@@ -348,12 +345,20 @@ static int aspeed_kcs_probe(struct platform_device *pdev)
struct device_node *np;
int rc;
 
-   np = pdev->dev.of_node;
+   np = dev->of_node->parent;
+   if (!of_device_is_compatible(np, "aspeed,ast2400-lpc-v2") &&
+   !of_device_is_compatible(np, "aspeed,ast2500-lpc-v2") &&
+   !of_device_is_compatible(np, "aspeed,ast2600-lpc-v2")) {
+   dev_err(dev, "unsupported LPC device binding\n");
+   return -ENODEV;
+   }
+
+   np = dev->of_node;
if (of_device_is_compatible(np, "aspeed,ast2400-kcs-bmc") ||
-   of_device_is_compatible(np, "aspeed,ast2500-kcs-bmc"))
+   of_device_is_compatible(np, "aspeed,ast2500-kcs-bmc"))
kcs_bmc = aspeed_kcs_probe_of_v1(pdev);
else if (of_device_is_compatible(np, "aspeed,ast2400-kcs-bmc-v2") ||
-   of_device_is_compatible(np, 
"aspeed,ast2500-kcs-bmc-v2"))
+of_device_is_compatible(np, "aspeed,ast2500-kcs-bmc-v2"))
kcs_bmc = aspeed_kcs_probe_of_v2(pdev);
else
return -EINVAL;
-- 
2.17.1

[PATCH v4 2/5] ARM: dts: Remove LPC BMC and Host partitions

The LPC controller has no concept of the BMC and the Host partitions.

A concrete instance is that the HICRB[5:4] are for the I/O port address
configurtaion of KCS channel 1/2. However, the KCS driver cannot access
HICRB for channel 1/2 initialization via syscon regmap interface due to
the parition boundary. (i.e. offset 80h)

In addition, for the HW design backward compatiblity, a newly added HW
control bit could be located at any reserved one over the LPC addressing
space. Thereby, this patch removes the lpc-bmc and lpc-host child node
and thus the LPC partitioning.

Note that this change requires the synchronization between device tree
change and the driver change. To prevent the misuse of old devicetrees
with new drivers, or vice versa, the v2 compatible strings are adopted
for the LPC device as listed:

"aspeed,ast2400-lpc-v2"
"aspeed,ast2500-lpc-v2"
"aspeed,ast2600-lpc-v2"

Signed-off-by: Chia-Wei, Wang 
---
 arch/arm/boot/dts/aspeed-g4.dtsi |  74 +++--
 arch/arm/boot/dts/aspeed-g5.dtsi | 135 ++-
 arch/arm/boot/dts/aspeed-g6.dtsi | 135 ++-
 3 files changed, 148 insertions(+), 196 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index b3dafbc8caca..ee22bc036440 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -343,58 +343,44 @@
};
 
lpc: lpc@1e789000 {
-   compatible = "aspeed,ast2400-lpc", "simple-mfd";
+   compatible = "aspeed,ast2400-lpc-v2", 
"simple-mfd", "syscon";
reg = <0x1e789000 0x1000>;
+   reg-io-width = <4>;
 
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x1e789000 0x1000>;
 
-   lpc_bmc: lpc-bmc@0 {
-   compatible = "aspeed,ast2400-lpc-bmc";
-   reg = <0x0 0x80>;
+   lpc_ctrl: lpc-ctrl@80 {
+   compatible = "aspeed,ast2400-lpc-ctrl";
+   reg = <0x80 0x10>;
+   clocks = < ASPEED_CLK_GATE_LCLK>;
+   status = "disabled";
};
 
-   lpc_host: lpc-host@80 {
-   compatible = "aspeed,ast2400-lpc-host", 
"simple-mfd", "syscon";
-   reg = <0x80 0x1e0>;
-   reg-io-width = <4>;
-
-   #address-cells = <1>;
-   #size-cells = <1>;
-   ranges = <0x0 0x80 0x1e0>;
-
-   lpc_ctrl: lpc-ctrl@0 {
-   compatible = 
"aspeed,ast2400-lpc-ctrl";
-   reg = <0x0 0x10>;
-   clocks = < 
ASPEED_CLK_GATE_LCLK>;
-   status = "disabled";
-   };
-
-   lpc_snoop: lpc-snoop@10 {
-   compatible = 
"aspeed,ast2400-lpc-snoop";
-   reg = <0x10 0x8>;
-   interrupts = <8>;
-   status = "disabled";
-   };
-
-   lhc: lhc@20 {
-   compatible = 
"aspeed,ast2400-lhc";
-   reg = <0x20 0x24 0x48 0x8>;
-   };
-
-   lpc_reset: reset-controller@18 {
-   compatible = 
"aspeed,ast2400-lpc-reset";
-   reg = <0x18 0x4>;
-   #reset-cells = <1>;
-   };
-
-   ibt: ibt@c0  {
-   compatible = 
"aspeed,ast2400-ibt-bmc";
-   reg = <0xc0 0x18>;
-   interrupts = <8>;
-   status = "disabled";
-   };
+   lpc_snoop: lpc-snoop@90 {
+   compatible = "aspeed,ast2400-lpc-snoop";
+   reg = <0x90 0x8>;

Re: [PATCH 1/1] ARM: LPAE: use phys_addr_t instead of unsigned long in outercache hooks

2020-12-28 Thread Leizhen (ThunderTown)




On 2020/12/26 20:15, Russell King - ARM Linux admin wrote:
> On Sat, Dec 26, 2020 at 10:18:08AM +0800, Leizhen (ThunderTown) wrote:
>> On 2020/12/25 19:44, Zhen Lei wrote:
>>> The outercache of some Hisilicon SOCs support physical addresses wider
>>> than 32-bits. The unsigned long datatype is not sufficient for mapping
>>> physical addresses >= 4GB. The commit ad6b9c9d78b9 ("ARM: 6671/1: LPAE:
>>> use phys_addr_t instead of unsigned long in outercache functions") has
>>> already modified the outercache functions. But the parameters of the
>>> outercache hooks are not changed. This patch use phys_addr_t instead of
>>> unsigned long in outercache hooks: inv_range, clean_range, flush_range.
>>>
>>> To ensure the outercache that does not support LPAE works properly, do
>>> cast phys_addr_t to unsigned long by adding a middle-tier function.
>>
>> This patch will impact the outercache drivers that have not been merged into
>> the kernel. They should also update the datatype of the outercache hooks.
> 
> This isn't much of a concern to mainline. If it's that big a problem
> for you, then please consider merging your code into mainline so that
> everyone can benefit from it.

All right, I got it.

>

[PATCH v4 0/5] Remove LPC register partitioning

The LPC controller has no concept of the BMC and the Host partitions.
The incorrect partitioning can impose unnecessary range restrictions
on register access through the syscon regmap interface.

For instance, HICRB contains the I/O port address configuration
of KCS channel 1/2. However, the KCS#1/#2 drivers cannot access
HICRB as it is located at the other LPC partition.

In addition, to be backward compatible, the newly added HW control
bits could be located at any reserved bits over the LPC addressing
space.

Thereby, this patch series aims to remove the LPC partitioning for
better driver development and maintenance. This requires the change
to both the device tree and the driver implementation. To ensure
both sides are synchronously updated, a v2 binding check is added.

Chagnes since v3:
- Revise binding check as suggested by Haiyue Wang

Changes since v2:
- Add v2 binding check to ensure the synchronization between the
  device tree change and the driver register offset fix.

Changes since v1:
- Add the fix to the aspeed-lpc binding documentation.

Chia-Wei, Wang (5):
  dt-bindings: aspeed-lpc: Remove LPC partitioning
  ARM: dts: Remove LPC BMC and Host partitions
  ipmi: kcs: aspeed: Adapt to new LPC DTS layout
  pinctrl: aspeed-g5: Adapt to new LPC device tree layout
  soc: aspeed: Adapt to new LPC device tree layout

 .../devicetree/bindings/mfd/aspeed-lpc.txt|  99 +++--
 arch/arm/boot/dts/aspeed-g4.dtsi  |  74 --
 arch/arm/boot/dts/aspeed-g5.dtsi  | 135 --
 arch/arm/boot/dts/aspeed-g6.dtsi  | 135 --
 drivers/char/ipmi/kcs_bmc_aspeed.c|  27 ++--
 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c|  17 ++-
 drivers/soc/aspeed/aspeed-lpc-ctrl.c  |  20 ++-
 drivers/soc/aspeed/aspeed-lpc-snoop.c |  23 +--
 8 files changed, 225 insertions(+), 305 deletions(-)

-- 
2.17.1

drivers/net/wan/fsl_ucc_hdlc.c:305:17: sparse: sparse: incorrect type in argument 1 (different address spaces)

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   dea8dcf2a9fa8cc540136a6cd885c3beece16ec3
commit: e5fc436f06eef54ef512ea55a9db8eb9f2e76959 sparse: use static inline for 
__chk_{user,io}_ptr()
date:   4 months ago
config: arm-randconfig-s031-20201221 (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce:
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.3-184-g1b896707-dirty
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e5fc436f06eef54ef512ea55a9db8eb9f2e76959
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout e5fc436f06eef54ef512ea55a9db8eb9f2e76959
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 
CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arm 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 


"sparse warnings: (new ones prefixed by >>)"
>> drivers/net/wan/fsl_ucc_hdlc.c:305:17: sparse: sparse: incorrect type in 
>> argument 1 (different address spaces) @@ expected void const volatile 
>> [noderef] __iomem *ptr @@ got restricted __be16 * @@
   drivers/net/wan/fsl_ucc_hdlc.c:305:17: sparse: expected void const 
volatile [noderef] __iomem *ptr
   drivers/net/wan/fsl_ucc_hdlc.c:305:17: sparse: got restricted __be16 *
   drivers/net/wan/fsl_ucc_hdlc.c:306:17: sparse: sparse: incorrect type in 
argument 2 (different address spaces) @@ expected void volatile [noderef] 
__iomem *addr @@ got restricted __be32 * @@
   drivers/net/wan/fsl_ucc_hdlc.c:306:17: sparse: expected void volatile 
[noderef] __iomem *addr
   drivers/net/wan/fsl_ucc_hdlc.c:306:17: sparse: got restricted __be32 *
   drivers/net/wan/fsl_ucc_hdlc.c:316:17: sparse: sparse: incorrect type in 
argument 1 (different address spaces) @@ expected void const volatile 
[noderef] __iomem *ptr @@ got restricted __be16 * @@
   drivers/net/wan/fsl_ucc_hdlc.c:316:17: sparse: expected void const 
volatile [noderef] __iomem *ptr
   drivers/net/wan/fsl_ucc_hdlc.c:316:17: sparse: got restricted __be16 *
   drivers/net/wan/fsl_ucc_hdlc.c:317:17: sparse: sparse: incorrect type in 
argument 2 (different address spaces) @@ expected void volatile [noderef] 
__iomem *addr @@ got restricted __be32 * @@
   drivers/net/wan/fsl_ucc_hdlc.c:317:17: sparse: expected void volatile 
[noderef] __iomem *addr
   drivers/net/wan/fsl_ucc_hdlc.c:317:17: sparse: got restricted __be32 *
   drivers/net/wan/fsl_ucc_hdlc.c:368:29: sparse: sparse: incorrect type in 
assignment (different base types) @@ expected unsigned short [usertype] @@  
   got restricted __be16 [usertype] @@
   drivers/net/wan/fsl_ucc_hdlc.c:368:29: sparse: expected unsigned short 
[usertype]
   drivers/net/wan/fsl_ucc_hdlc.c:368:29: sparse: got restricted __be16 
[usertype]
   drivers/net/wan/fsl_ucc_hdlc.c:375:36: sparse: sparse: restricted __be16 
degrades to integer
   drivers/net/wan/fsl_ucc_hdlc.c:398:12: sparse: sparse: incorrect type in 
assignment (different address spaces) @@ expected struct qe_bd [noderef] 
__iomem *bd @@ got struct qe_bd *curtx_bd @@
   drivers/net/wan/fsl_ucc_hdlc.c:398:12: sparse: expected struct qe_bd 
[noderef] __iomem *bd
   drivers/net/wan/fsl_ucc_hdlc.c:398:12: sparse: got struct qe_bd *curtx_bd
   drivers/net/wan/fsl_ucc_hdlc.c:408:35: sparse: sparse: dereference of 
noderef expression
   drivers/net/wan/fsl_ucc_hdlc.c:421:20: sparse: sparse: incorrect type in 
assignment (different address spaces) @@ expected struct qe_bd [noderef] 
__iomem *[assigned] bd @@ got struct qe_bd *tx_bd_base @@
   drivers/net/wan/fsl_ucc_hdlc.c:421:20: sparse: expected struct qe_bd 
[noderef] __iomem *[assigned] bd
   drivers/net/wan/fsl_ucc_hdlc.c:421:20: sparse: got struct qe_bd 
*tx_bd_base
   drivers/net/wan/fsl_ucc_hdlc.c:423:16: sparse: sparse: incompatible types in 
comparison expression (different address spaces):
   drivers/net/wan/fsl_ucc_hdlc.c:423:16: sparse:struct qe_bd [noderef] 
__iomem *
   drivers/net/wan/fsl_ucc_hdlc.c:423:16: sparse:struct qe_bd *
   drivers/net/wan/fsl_ucc_hdlc.c:458:21: sparse: sparse: incorrect type in 
argument 1 (different address spaces) @@ expected void const volatile 
[noderef] __iomem *ptr @@ got restricted __be16 * @@
   drivers/net/wan/fsl_ucc_hdlc.c:458:21: sparse: sparse: incorrect type in 
argument 1 (different address spaces) @@ expected void const volatile 
[noderef] __iomem *ptr @@ got restricted __be16 * @@
   drivers/net/wan/fsl_ucc_hdlc.c:458:21: sparse: sparse: incorrect type in 
argument 1 (different address spaces) @@

Re: [PATCH 1/1] ARM: LPAE: use phys_addr_t instead of unsigned long in outercache hooks

2020-12-28 Thread Leizhen (ThunderTown)




On 2020/12/26 20:13, Russell King - ARM Linux admin wrote:
> On Fri, Dec 25, 2020 at 07:44:58PM +0800, Zhen Lei wrote:
>> The outercache of some Hisilicon SOCs support physical addresses wider
>> than 32-bits. The unsigned long datatype is not sufficient for mapping
>> physical addresses >= 4GB. The commit ad6b9c9d78b9 ("ARM: 6671/1: LPAE:
>> use phys_addr_t instead of unsigned long in outercache functions") has
>> already modified the outercache functions. But the parameters of the
>> outercache hooks are not changed. This patch use phys_addr_t instead of
>> unsigned long in outercache hooks: inv_range, clean_range, flush_range.
>>
>> To ensure the outercache that does not support LPAE works properly, do
>> cast phys_addr_t to unsigned long by adding a middle-tier function.
> 
> Please don't do that. The cast can be done inside the L2 functions
> themselves without needing all these additional functions.

OK. At first, I wanted to fit in like this:

-static void l2c220_inv_range(unsigned long start, unsigned long end)
+static void l2c220_inv_range(phys_addr_t lpae_start, phys_addr_t lpae_end)
 {
+  unsigned long start = lpae_start;
+  unsigned long end = lpae_end;


> 
> We probably ought to also add some protection against addresses > 4GB,
> although these are hot paths, so we don't want to add tests in these
> functions. Maybe instead checking whether the system has memory above
> 4GB while the L2 cache is being initialised would be a good idea?
> 

I'm sorry, I didn't quite understand what you meant. Currently, the
biggest problem is the compilation problem. The sizeof(long) may be
32, and the 64-bit physical address cannot be transferred from outcache
functions to outcache hooks.

Re: [PATCH v4] usb: xhci-mtk: fix unreleased bandwidth data

2020-12-28 Thread Ikjoon Jang

On Mon, Dec 28, 2020 at 10:34 PM Greg Kroah-Hartman
 wrote:
>
> On Mon, Dec 14, 2020 at 04:39:53PM +0800, Ikjoon Jang wrote:
> > xhci-mtk has hooks on add_endpoint() and drop_endpoint() from xhci
> > to handle its own sw bandwidth managements and stores bandwidth data
> > into internal table every time add_endpoint() is called,
> > so when bandwidth allocation fails at one endpoint, all earlier
> > allocation from the same interface could still remain at the table.
> >
> > This patch adds two more hooks from check_bandwidth() and
> > reset_bandwidth(), and make mtk-xhci to releases all failed endpoints
> > from reset_bandwidth().
> >
> > Fixes: 4b0f7a77fb3c ("usb: xhci-mtk: supports bandwidth scheduling with 
> > multi-TT")
>
> This is not a git commit id that is in Linus's tree :(
>

Oops, I apologize, I sent a new v5 patch with
Fixes: 08e469de87a2 ("usb: xhci-mtk: supports bandwidth scheduling
with multi-TT")

arch/mips/loongson64/cop2-ex.c:97:29: error: 'struct thread_struct' has no member named 'fpu'

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   dea8dcf2a9fa8cc540136a6cd885c3beece16ec3
commit: f83e4f9896eff614d0f2547a561fa5f39f9cddde MIPS: Loongson-3: Add some 
unaligned instructions emulation
date:   8 months ago
config: mips-randconfig-r013-20201227 (attached as .config)
compiler: mips64el-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f83e4f9896eff614d0f2547a561fa5f39f9cddde
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout f83e4f9896eff614d0f2547a561fa5f39f9cddde
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross 
ARCH=mips 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

   arch/mips/loongson64/cop2-ex.c: In function 'loongson_cu2_call':
   arch/mips/loongson64/cop2-ex.c:44:15: error: implicit declaration of 
function '__is_fpu_owner'; did you mean 'is_fpu_owner'? 
[-Werror=implicit-function-declaration]
  44 |   fpu_owned = __is_fpu_owner();
 |   ^~
 |   is_fpu_owner
>> arch/mips/loongson64/cop2-ex.c:97:29: error: 'struct thread_struct' has no 
>> member named 'fpu'
  97 |set_fpr64(current->thread.fpu.fpr,
 | ^
   arch/mips/loongson64/cop2-ex.c:99:29: error: 'struct thread_struct' has no 
member named 'fpu'
  99 |set_fpr64(current->thread.fpu.fpr,
 | ^
   arch/mips/loongson64/cop2-ex.c:132:42: error: 'struct thread_struct' has no 
member named 'fpu'
 132 |value_next = get_fpr64(current->thread.fpu.fpr,
 |  ^
   arch/mips/loongson64/cop2-ex.c:139:37: error: 'struct thread_struct' has no 
member named 'fpu'
 139 |value = get_fpr64(current->thread.fpu.fpr,
 | ^
   arch/mips/loongson64/cop2-ex.c:206:29: error: 'struct thread_struct' has no 
member named 'fpu'
 206 |set_fpr64(current->thread.fpu.fpr,
 | ^
   arch/mips/loongson64/cop2-ex.c:223:29: error: 'struct thread_struct' has no 
member named 'fpu'
 223 |set_fpr64(current->thread.fpu.fpr,
 | ^
   arch/mips/loongson64/cop2-ex.c:288:37: error: 'struct thread_struct' has no 
member named 'fpu'
 288 |value = get_fpr64(current->thread.fpu.fpr,
 | ^
   arch/mips/loongson64/cop2-ex.c:307:37: error: 'struct thread_struct' has no 
member named 'fpu'
 307 |value = get_fpr64(current->thread.fpu.fpr,
 | ^
   cc1: some warnings being treated as errors


vim +97 arch/mips/loongson64/cop2-ex.c

26  
27  static int loongson_cu2_call(struct notifier_block *nfb, unsigned long 
action,
28  void *data)
29  {
30  unsigned int res, fpu_owned;
31  unsigned long ra, value, value_next;
32  union mips_instruction insn;
33  int fr = !test_thread_flag(TIF_32BIT_FPREGS);
34  struct pt_regs *regs = (struct pt_regs *)data;
35  void __user *addr = (void __user *)regs->cp0_badvaddr;
36  unsigned int __user *pc = (unsigned int __user 
*)exception_epc(regs);
37  
38  ra = regs->regs[31];
39  __get_user(insn.word, pc);
40  
41  switch (action) {
42  case CU2_EXCEPTION:
43  preempt_disable();
  > 44  fpu_owned = __is_fpu_owner();
45  if (!fr)
46  set_c0_status(ST0_CU1 | ST0_CU2);
47  else
48  set_c0_status(ST0_CU1 | ST0_CU2 | ST0_FR);
49  enable_fpu_hazard();
50  KSTK_STATUS(current) |= (ST0_CU1 | ST0_CU2);
51  if (fr)
52  KSTK_STATUS(current) |= ST0_FR;
53  else
54  KSTK_STATUS(current) &= ~ST0_FR;
55  /* If FPU is owned, we needn't init or restore fp */
56  if (!fpu_owned) {
57  set_thread_flag(TIF_USEDFPU);
58  init_fp_ctx(current);
59  _restore_fp(current);
60  }
61  preempt_enable();
62  
63  return NOTIFY_STOP; /* Don't call default notifier 
*/
64  
65  case

[PATCH v5] usb: xhci-mtk: fix unreleased bandwidth data

2020-12-28 Thread Ikjoon Jang

xhci-mtk has hooks on add_endpoint() and drop_endpoint() from xhci
to handle its own sw bandwidth managements and stores bandwidth data
into internal table every time add_endpoint() is called,
so when bandwidth allocation fails at one endpoint, all earlier
allocation from the same interface could still remain at the table.

This patch adds two more hooks from check_bandwidth() and
reset_bandwidth(), and make mtk-xhci to releases all failed endpoints
from reset_bandwidth().

Fixes: 08e469de87a2 ("usb: xhci-mtk: supports bandwidth scheduling with 
multi-TT")
Signed-off-by: Ikjoon Jang 

---

Changes in v5:
- Fix a wrong commit id in Fixes tag

Changes in v4:
- bugfix in v3, check_bandwidth() return uninitialized value
  when no new endpoints were added.
- change Fixes tag to keep dependency

Changes in v3:
- drop unrelated code cleanups
- change Fixes tag to keep dependency

Changes in v2:
- fix a 0-day warning from unused variable
- split one big patch into three patches
- fix wrong offset in mediatek hw flags

 drivers/usb/host/xhci-mtk-sch.c | 124 ++--
 drivers/usb/host/xhci-mtk.h |  13 
 drivers/usb/host/xhci.c |   9 +++
 3 files changed, 109 insertions(+), 37 deletions(-)

diff --git a/drivers/usb/host/xhci-mtk-sch.c b/drivers/usb/host/xhci-mtk-sch.c
index 45c54d56ecbd..95d20de9fd1f 100644
--- a/drivers/usb/host/xhci-mtk-sch.c
+++ b/drivers/usb/host/xhci-mtk-sch.c
@@ -200,6 +200,7 @@ static struct mu3h_sch_ep_info *create_sch_ep(struct 
usb_device *udev,
 
sch_ep->sch_tt = tt;
sch_ep->ep = ep;
+   INIT_LIST_HEAD(_ep->tt_endpoint);
 
return sch_ep;
 }
@@ -583,6 +584,8 @@ int xhci_mtk_sch_init(struct xhci_hcd_mtk *mtk)
 
mtk->sch_array = sch_array;
 
+   INIT_LIST_HEAD(>bw_ep_list_new);
+
return 0;
 }
 EXPORT_SYMBOL_GPL(xhci_mtk_sch_init);
@@ -601,19 +604,14 @@ int xhci_mtk_add_ep_quirk(struct usb_hcd *hcd, struct 
usb_device *udev,
struct xhci_ep_ctx *ep_ctx;
struct xhci_slot_ctx *slot_ctx;
struct xhci_virt_device *virt_dev;
-   struct mu3h_sch_bw_info *sch_bw;
struct mu3h_sch_ep_info *sch_ep;
-   struct mu3h_sch_bw_info *sch_array;
unsigned int ep_index;
-   int bw_index;
-   int ret = 0;
 
xhci = hcd_to_xhci(hcd);
virt_dev = xhci->devs[udev->slot_id];
ep_index = xhci_get_endpoint_index(>desc);
slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
-   sch_array = mtk->sch_array;
 
xhci_dbg(xhci, "%s() type:%d, speed:%d, mpkt:%d, dir:%d, ep:%p\n",
__func__, usb_endpoint_type(>desc), udev->speed,
@@ -632,39 +630,34 @@ int xhci_mtk_add_ep_quirk(struct usb_hcd *hcd, struct 
usb_device *udev,
return 0;
}
 
-   bw_index = get_bw_index(xhci, udev, ep);
-   sch_bw = _array[bw_index];
-
sch_ep = create_sch_ep(udev, ep, ep_ctx);
if (IS_ERR_OR_NULL(sch_ep))
return -ENOMEM;
 
setup_sch_info(udev, ep_ctx, sch_ep);
 
-   ret = check_sch_bw(udev, sch_bw, sch_ep);
-   if (ret) {
-   xhci_err(xhci, "Not enough bandwidth!\n");
-   if (is_fs_or_ls(udev->speed))
-   drop_tt(udev);
-
-   kfree(sch_ep);
-   return -ENOSPC;
-   }
+   list_add_tail(_ep->endpoint, >bw_ep_list_new);
 
-   list_add_tail(_ep->endpoint, _bw->bw_ep_list);
+   return 0;
+}
+EXPORT_SYMBOL_GPL(xhci_mtk_add_ep_quirk);
 
-   ep_ctx->reserved[0] |= cpu_to_le32(EP_BPKTS(sch_ep->pkts)
-   | EP_BCSCOUNT(sch_ep->cs_count) | EP_BBM(sch_ep->burst_mode));
-   ep_ctx->reserved[1] |= cpu_to_le32(EP_BOFFSET(sch_ep->offset)
-   | EP_BREPEAT(sch_ep->repeat));
+static void xhci_mtk_drop_ep(struct xhci_hcd_mtk *mtk, struct usb_device *udev,
+struct mu3h_sch_ep_info *sch_ep)
+{
+   struct xhci_hcd *xhci = hcd_to_xhci(mtk->hcd);
+   int bw_index = get_bw_index(xhci, udev, sch_ep->ep);
+   struct mu3h_sch_bw_info *sch_bw = >sch_array[bw_index];
 
-   xhci_dbg(xhci, " PKTS:%x, CSCOUNT:%x, BM:%x, OFFSET:%x, REPEAT:%x\n",
-   sch_ep->pkts, sch_ep->cs_count, sch_ep->burst_mode,
-   sch_ep->offset, sch_ep->repeat);
+   update_bus_bw(sch_bw, sch_ep, 0);
+   list_del(_ep->endpoint);
 
-   return 0;
+   if (sch_ep->sch_tt) {
+   list_del(_ep->tt_endpoint);
+   drop_tt(udev);
+   }
+   kfree(sch_ep);
 }
-EXPORT_SYMBOL_GPL(xhci_mtk_add_ep_quirk);
 
 void xhci_mtk_drop_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
struct usb_host_endpoint *ep)
@@ -675,7 +668,7 @@ void xhci_mtk_drop_ep_quirk(struct usb_hcd *hcd, struct 
usb_device *udev,
struct xhci_virt_device *virt_dev;
struct mu3h_sch_bw_info *sch_array;
struct mu3h_sch_bw_info *sch_bw;
-

[PATCH] lib/genalloc: fix the overflow when size is too big

2020-12-28 Thread Huang Shijie

Some graphic card has very big memory on chip, such as 32G bytes.

In the following case, it will cause overflow:
  
  pool = gen_pool_create(PAGE_SHIFT, NUMA_NO_NODE);
  ret = gen_pool_add(pool, 0x100, SZ_32G, NUMA_NO_NODE);

  va = gen_pool_alloc(pool, SZ_4G);
  

The overflow occurs in gen_pool_alloc_algo_owner():

  

size = nbits << order;

  

The @nbits is "int" type, so it will overflow.
Then the gen_pool_avail() will return the wrong value.

This patch converts some "int" to "unsigned long", and
changes the compare code in while.

Reported-by: Shi Jiasheng 
Signed-off-by: Huang Shijie 
---
 lib/genalloc.c | 25 +
 1 file changed, 13 insertions(+), 12 deletions(-)

diff --git a/lib/genalloc.c b/lib/genalloc.c
index 7f1244b5294a..dab97bb69df6 100644
--- a/lib/genalloc.c
+++ b/lib/genalloc.c
@@ -81,14 +81,14 @@ static int clear_bits_ll(unsigned long *addr, unsigned long 
mask_to_clear)
  * users set the same bit, one user will return remain bits, otherwise
  * return 0.
  */
-static int bitmap_set_ll(unsigned long *map, int start, int nr)
+static int bitmap_set_ll(unsigned long *map, unsigned long start, unsigned 
long nr)
 {
unsigned long *p = map + BIT_WORD(start);
-   const int size = start + nr;
+   const unsigned long size = start + nr;
int bits_to_set = BITS_PER_LONG - (start % BITS_PER_LONG);
unsigned long mask_to_set = BITMAP_FIRST_WORD_MASK(start);
 
-   while (nr - bits_to_set >= 0) {
+   while (nr >= bits_to_set) {
if (set_bits_ll(p, mask_to_set))
return nr;
nr -= bits_to_set;
@@ -116,14 +116,15 @@ static int bitmap_set_ll(unsigned long *map, int start, 
int nr)
  * users clear the same bit, one user will return remain bits,
  * otherwise return 0.
  */
-static int bitmap_clear_ll(unsigned long *map, int start, int nr)
+static unsigned long
+bitmap_clear_ll(unsigned long *map, unsigned long start, unsigned long nr)
 {
unsigned long *p = map + BIT_WORD(start);
-   const int size = start + nr;
+   const unsigned long size = start + nr;
int bits_to_clear = BITS_PER_LONG - (start % BITS_PER_LONG);
unsigned long mask_to_clear = BITMAP_FIRST_WORD_MASK(start);
 
-   while (nr - bits_to_clear >= 0) {
+   while (nr >= bits_to_clear) {
if (clear_bits_ll(p, mask_to_clear))
return nr;
nr -= bits_to_clear;
@@ -183,8 +184,8 @@ int gen_pool_add_owner(struct gen_pool *pool, unsigned long 
virt, phys_addr_t ph
 size_t size, int nid, void *owner)
 {
struct gen_pool_chunk *chunk;
-   int nbits = size >> pool->min_alloc_order;
-   int nbytes = sizeof(struct gen_pool_chunk) +
+   unsigned long nbits = size >> pool->min_alloc_order;
+   unsigned long nbytes = sizeof(struct gen_pool_chunk) +
BITS_TO_LONGS(nbits) * sizeof(long);
 
chunk = vzalloc_node(nbytes, nid);
@@ -242,7 +243,7 @@ void gen_pool_destroy(struct gen_pool *pool)
struct list_head *_chunk, *_next_chunk;
struct gen_pool_chunk *chunk;
int order = pool->min_alloc_order;
-   int bit, end_bit;
+   unsigned long bit, end_bit;
 
list_for_each_safe(_chunk, _next_chunk, >chunks) {
chunk = list_entry(_chunk, struct gen_pool_chunk, next_chunk);
@@ -278,7 +279,7 @@ unsigned long gen_pool_alloc_algo_owner(struct gen_pool 
*pool, size_t size,
struct gen_pool_chunk *chunk;
unsigned long addr = 0;
int order = pool->min_alloc_order;
-   int nbits, start_bit, end_bit, remain;
+   unsigned long nbits, start_bit, end_bit, remain;
 
 #ifndef CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG
BUG_ON(in_nmi());
@@ -487,7 +488,7 @@ void gen_pool_free_owner(struct gen_pool *pool, unsigned 
long addr, size_t size,
 {
struct gen_pool_chunk *chunk;
int order = pool->min_alloc_order;
-   int start_bit, nbits, remain;
+   unsigned long start_bit, nbits, remain;
 
 #ifndef CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG
BUG_ON(in_nmi());
@@ -755,7 +756,7 @@ unsigned long gen_pool_best_fit(unsigned long *map, 
unsigned long size,
index = bitmap_find_next_zero_area(map, size, start, nr, 0);
 
while (index < size) {
-   int next_bit = find_next_bit(map, size, index + nr);
+   unsigned long next_bit = find_next_bit(map, size, index + nr);
if ((next_bit - index) < len) {
len = next_bit - index;
start_bit = index;
-- 
2.17.1

Re: [PATCH 1/3] dt-bindings: input: cros-ec-keyb: Add a new property

2020-12-28 Thread Dmitry Torokhov

Hi Philip,

On Mon, Dec 21, 2020 at 05:47:57PM -0800, Philip Chen wrote:
> This patch adds a new property `google,custom-keyb-top-row` to the
> device tree for the custom keyboard top row design.

Why don't we use the property we have for the same purpose in atkbd.c?
I.e. function-row-physmap?

Also, instead of specifying keycodes in this array we should use
combination of row and column identifying keys, like this:

function-row-physmap = <
MATRIX_KEY(0x00, 0x02, KEY_F1),
MATRIX_KEY(0x03, 0x02, KEY_F2),
...
>;

Note that the last item in the triple is purely cosmetic in this case,
you can change it to 0. It is row and column that are important.

Then the mapping will work properly even if we change keymap, for
example from userspace.

Thanks.

-- 
Dmitry

[PATCH v10 1/2] cpufreq: mediatek-hw: Add support for CPUFREQ HW

2020-12-28 Thread Hector Yuan

From: "Hector.Yuan" 

Add cpufreq HW support.

Signed-off-by: Hector.Yuan 
---
 drivers/cpufreq/Kconfig.arm   |   12 ++
 drivers/cpufreq/Makefile  |1 +
 drivers/cpufreq/mediatek-cpufreq-hw.c |  370 +
 3 files changed, 383 insertions(+)
 create mode 100644 drivers/cpufreq/mediatek-cpufreq-hw.c

diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 015ec0c..3031471 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -123,6 +123,18 @@ config ARM_MEDIATEK_CPUFREQ
help
  This adds the CPUFreq driver support for MediaTek SoCs.
 
+config ARM_MEDIATEK_CPUFREQ_HW
+   tristate "MediaTek CPUFreq HW driver"
+   depends on ARCH_MEDIATEK || COMPILE_TEST
+   default m
+   help
+ Support for the CPUFreq HW driver.
+ Some MediaTek chipsets have a HW engine to offload the steps
+ necessary for changing the frequency of the CPUs. Firmware loaded
+ in this engine exposes a programming interface to the OS.
+ The driver implements the cpufreq interface for this HW engine.
+ Say Y if you want to support CPUFreq HW.
+
 config ARM_OMAP2PLUS_CPUFREQ
bool "TI OMAP2+"
depends on ARCH_OMAP2PLUS
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index f1b7e3d..ffc61cd 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -57,6 +57,7 @@ obj-$(CONFIG_ARM_IMX6Q_CPUFREQ)   += 
imx6q-cpufreq.o
 obj-$(CONFIG_ARM_IMX_CPUFREQ_DT)   += imx-cpufreq-dt.o
 obj-$(CONFIG_ARM_KIRKWOOD_CPUFREQ) += kirkwood-cpufreq.o
 obj-$(CONFIG_ARM_MEDIATEK_CPUFREQ) += mediatek-cpufreq.o
+obj-$(CONFIG_ARM_MEDIATEK_CPUFREQ_HW)  += mediatek-cpufreq-hw.o
 obj-$(CONFIG_MACH_MVEBU_V7)+= mvebu-cpufreq.o
 obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ)+= omap-cpufreq.o
 obj-$(CONFIG_ARM_PXA2xx_CPUFREQ)   += pxa2xx-cpufreq.o
diff --git a/drivers/cpufreq/mediatek-cpufreq-hw.c 
b/drivers/cpufreq/mediatek-cpufreq-hw.c
new file mode 100644
index 000..604af18
--- /dev/null
+++ b/drivers/cpufreq/mediatek-cpufreq-hw.c
@@ -0,0 +1,370 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 MediaTek Inc.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define LUT_MAX_ENTRIES32U
+#define LUT_FREQ   GENMASK(11, 0)
+#define LUT_ROW_SIZE   0x4
+#define CPUFREQ_HW_STATUS  BIT(0)
+#define SVS_HW_STATUS  BIT(1)
+#define POLL_USEC  1000
+#define TIMEOUT_USEC   30
+
+enum {
+   REG_FREQ_LUT_TABLE,
+   REG_FREQ_ENABLE,
+   REG_FREQ_PERF_STATE,
+   REG_FREQ_HW_STATE,
+   REG_EM_POWER_TBL,
+   REG_FREQ_LATENCY,
+
+   REG_ARRAY_SIZE,
+};
+
+struct cpufreq_mtk {
+   struct cpufreq_frequency_table *table;
+   void __iomem *reg_bases[REG_ARRAY_SIZE];
+   int nr_opp;
+   cpumask_t related_cpus;
+};
+
+static const u16 cpufreq_mtk_offsets[REG_ARRAY_SIZE] = {
+   [REG_FREQ_LUT_TABLE]= 0x0,
+   [REG_FREQ_ENABLE]   = 0x84,
+   [REG_FREQ_PERF_STATE]   = 0x88,
+   [REG_FREQ_HW_STATE] = 0x8c,
+   [REG_EM_POWER_TBL]  = 0x90,
+   [REG_FREQ_LATENCY]  = 0x110,
+};
+
+static struct cpufreq_mtk *mtk_freq_domain_map[NR_CPUS];
+
+static int __maybe_unused
+mtk_cpufreq_get_cpu_power(unsigned long *mW,
+ unsigned long *KHz, struct device *cpu_dev)
+{
+   struct cpufreq_mtk *c = mtk_freq_domain_map[cpu_dev->id];
+   int i;
+
+   for (i = 0; i < c->nr_opp; i++) {
+   if (c->table[i].frequency < *KHz)
+   break;
+   }
+   i--;
+
+   *KHz = c->table[i].frequency;
+   *mW = readl_relaxed(c->reg_bases[REG_EM_POWER_TBL] +
+   i * LUT_ROW_SIZE) / 1000;
+
+   return 0;
+}
+
+static int mtk_cpufreq_hw_target_index(struct cpufreq_policy *policy,
+  unsigned int index)
+{
+   struct cpufreq_mtk *c = policy->driver_data;
+
+   writel_relaxed(index, c->reg_bases[REG_FREQ_PERF_STATE]);
+
+   return 0;
+}
+
+static unsigned int mtk_cpufreq_hw_get(unsigned int cpu)
+{
+   struct cpufreq_mtk *c;
+   unsigned int index;
+
+   c = mtk_freq_domain_map[cpu];
+
+   index = readl_relaxed(c->reg_bases[REG_FREQ_PERF_STATE]);
+   index = min(index, LUT_MAX_ENTRIES - 1);
+
+   return c->table[index].frequency;
+}
+
+static unsigned int mtk_cpufreq_hw_fast_switch(struct cpufreq_policy *policy,
+  unsigned int target_freq)
+{
+   struct cpufreq_mtk *c = policy->driver_data;
+   unsigned int index;
+
+   index = cpufreq_table_find_index_dl(policy, target_freq);
+
+   writel_relaxed(index, c->reg_bases[REG_FREQ_PERF_STATE]);
+
+

[PATCH v10] cpufreq: mediatek-hw: Add support for Mediatek cpufreq HW driver

2020-12-28 Thread Hector Yuan

The CPUfreq HW present in some Mediatek chipsets offloads the steps necessary
for changing the frequency of CPUs.
The driver implements the cpufreq driver interface for this hardware engine.
This patch depends on MT6779 DTS patchset[1] submitted by Hanks Chen.

>From v8 to v9, there are three more modifications.
1. Based on patchset[2], align binding with scmi for performance domain.
2. Add the CPUFREQ fast switch function support and define DVFS latency.
3. Based on patchser[3], add energy model API parameter for mW.

>From v7 to v8, there are three more patches based on patchset v8[4].
This patchset is about to register power table to Energy model for EAS and
thermal usage.
1. EM CPU power table
- Register energy model table for EAS and thermal cooling device usage.
- Read the coresponding LUT for power table.
2. SVS initialization
- The SVS(Smart Voltage Scaling) engine is a hardware which is
used to calculate optimized voltage values for CPU power domain.
DVFS driver could apply those optimized voltage values to reduce power
consumption.
- Driver will polling if HW engine is done for SVS initialization.
After that, driver will read power table and register it to EAS.
- CPUs must be in power on state when doing SVS. Use pm_qos to block cpu-idle
state for SVS initializing.
3. Cooling device flag
- Add cooling device flag for thermal

[1] https://lkml.org/lkml/2020/8/4/1094
[2] https://lore.kernel.org/lkml/20201116181356.804590-1-sudeep.ho...@arm.com/
[3]
https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git/commit/?h=linux-next=c250d50fe2ce627ca9805d9c8ac11cbbf922a4a6
[4] https://lkml.org/lkml/2020/9/23/384

Hector.Yuan (2):
cpufreq: mediatek-hw: Add support for CPUFREQ HW
dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW

.../bindings/cpufreq/cpufreq-mediatek-hw.yaml | 116 ++
drivers/cpufreq/Kconfig.arm| 12 +
drivers/cpufreq/Makefile |1 +
drivers/cpufreq/mediatek-cpufreq-hw.c | 370
4 files changed, 499 insertions(+)
create mode 100644
Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
create mode 100644 drivers/cpufreq/mediatek-cpufreq-hw.c

[PATCH v10 2/2] dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW

2020-12-28 Thread Hector Yuan

From: "Hector.Yuan" 

Add devicetree bindings for MediaTek HW driver.

Signed-off-by: Hector.Yuan 
---
 .../bindings/cpufreq/cpufreq-mediatek-hw.yaml  |  116 
 1 file changed, 116 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml

diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml 
b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
new file mode 100644
index 000..53e0eb3
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
@@ -0,0 +1,116 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/cpufreq/cpufreq-mediatek-hw.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek's CPUFREQ Bindings
+
+maintainers:
+  - Hector Yuan 
+
+description:
+  CPUFREQ HW is a hardware engine used by MediaTek
+  SoCs to manage frequency in hardware. It is capable of controlling frequency
+  for multiple clusters.
+
+properties:
+  compatible:
+const: mediatek,cpufreq-hw
+
+  reg:
+minItems: 1
+maxItems: 2
+description: |
+  Addresses and sizes for the memory of the
+  HW bases in each frequency domain.
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: true
+
+examples:
+  - |
+cpus {
+#address-cells = <1>;
+#size-cells = <0>;
+
+cpu0: cpu@0 {
+device_type = "cpu";
+compatible = "arm,cortex-a55";
+enable-method = "psci";
+performance-domains = < 0>;
+reg = <0x000>;
+};
+
+cpu1: cpu@100 {
+device_type = "cpu";
+compatible = "arm,cortex-a55";
+enable-method = "psci";
+performance-domains = < 0>;
+reg = <0x100>;
+};
+
+cpu2: cpu@200 {
+device_type = "cpu";
+compatible = "arm,cortex-a55";
+enable-method = "psci";
+performance-domains = < 0>;
+reg = <0x200>;
+};
+
+cpu3: cpu@300 {
+device_type = "cpu";
+compatible = "arm,cortex-a55";
+enable-method = "psci";
+performance-domains = < 0>;
+reg = <0x300>;
+};
+
+cpu4: cpu@400 {
+device_type = "cpu";
+compatible = "arm,cortex-a55";
+enable-method = "psci";
+performance-domains = < 1>;
+reg = <0x400>;
+};
+
+cpu5: cpu@500 {
+device_type = "cpu";
+compatible = "arm,cortex-a55";
+enable-method = "psci";
+performance-domains = < 1>;
+reg = <0x500>;
+};
+
+cpu6: cpu@600 {
+device_type = "cpu";
+compatible = "arm,cortex-a75";
+enable-method = "psci";
+performance-domains = < 1>;
+reg = <0x600>;
+};
+
+cpu7: cpu@700 {
+device_type = "cpu";
+compatible = "arm,cortex-a75";
+enable-method = "psci";
+performance-domains = < 1>;
+reg = <0x700>;
+};
+};
+
+/* ... */
+
+soc {
+#address-cells = <2>;
+#size-cells = <2>;
+
+performance: performance-controller@11bc00 {
+compatible = "mediatek,cpufreq-hw";
+reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>;
+#performance-domain-cells = <1>;
+};
+};
-- 
1.7.9.5

Re: [PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting

2020-12-28 Thread Xin Ji

On Sun, Dec 27, 2020 at 09:56:21AM -0700, Rob Herring wrote:
> On Fri, 25 Dec 2020 19:01:09 +0800, Xin Ji wrote:
> > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add
> > swing setting for adjusting DP tx PHY swing
> > 
> > Signed-off-by: Xin Ji 
> > ---
> >  .../bindings/display/bridge/analogix,anx7625.yaml | 19 
> > +++
> >  1 file changed, 19 insertions(+)
> > 
> 
> My bot found errors running 'make dt_binding_check' on your patch:
Hi Rob Herring, I'll fix this issue in the next serial, thanks!
> 
> yamllint warnings/errors:
> 
> dtschema/dtc warnings/errors:
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml:
>  encoder@58: anx,swing-setting: 'anyOf' conditional failed, one must be fixed:
>   [[0, 20], [1, 84], [2, 100], [3, 116], [4, 41], [5, 123], [6, 119], [7, 
> 91], [8, 127], [12, 32], [13, 96], [16, 96], [18, 64], [19, 96], [20, 20], 
> [21, 84], [22, 100], [23, 116], [24, 41], [25, 123], [26, 119], [27, 91], 
> [28, 127], [32, 32], [33, 96], [36, 96], [38, 64], [39, 96]] is too long
>   [0, 20] is too long
>   [1, 84] is too long
>   [2, 100] is too long
>   [3, 116] is too long
>   [4, 41] is too long
>   [5, 123] is too long
>   [6, 119] is too long
>   [7, 91] is too long
>   [8, 127] is too long
>   [12, 32] is too long
>   [13, 96] is too long
>   [16, 96] is too long
>   [18, 64] is too long
>   [19, 96] is too long
>   [20, 20] is too long
>   [21, 84] is too long
>   [22, 100] is too long
>   [23, 116] is too long
>   [24, 41] is too long
>   [25, 123] is too long
>   [26, 119] is too long
>   [27, 91] is too long
>   [28, 127] is too long
>   [32, 32] is too long
>   [33, 96] is too long
>   [36, 96] is too long
>   [38, 64] is too long
>   [39, 96] is too long
>   From schema: 
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml:
>  encoder@58: 'anx,mipi-dpi-in', 'anx,swing-setting' do not match any of the 
> regexes: '^#.*', 
> '^(at25|bm|devbus|dmacap|dsa|exynos|fsi[ab]|gpio-fan|gpio-key|gpio|gpmc|hdmi|i2c-gpio),.*',
>  '^(keypad|m25p|max8952|max8997|max8998|mpmc),.*', 
> '^(pinctrl-single|#pinctrl-single|PowerPC),.*', 
> '^(pl022|pxa-mmc|rcar_sound|rotary-encoder|s5m8767|sdhci),.*', 
> '^(simple-audio-card|st-plgpio|st-spics|ts),.*', '^70mai,.*', '^GEFanuc,.*', 
> '^ORCL,.*', '^SUNW,.*', '^[a-zA-Z0-9#_][a-zA-Z0-9+\\-._@]{0,63}$', 
> '^[a-zA-Z0-9+\\-._]*@[0-9a-zA-Z,]*$', '^abb,.*', '^abilis,.*', '^abracon,.*', 
> '^abt,.*', '^acer,.*', '^acme,.*', '^actions,.*', '^active-semi,.*', 
> '^ad,.*', '^adafruit,.*', '^adapteva,.*', '^adaptrum,.*', '^adh,.*', 
> '^adi,.*', '^advantech,.*', '^aeroflexgaisler,.*', '^al,.*', '^allegro,.*', 
> '^allo,.*', '^allwinner,.*', '^alphascale,.*', '^alps,.*', '^alt,.*', 
> '^altr,.*', '^amarula,.*', '^amazon,.*', '^amcc,.*', '^amd,.*', 
> '^amediatech,.*', '^amlogic,.*', '^ampere,.*', '^ampire,.*', '^ams,.*', 
> '^amstaos,.*', '^analogix,.*', '^andestech,.*', '^anvo,.*', '^apm,.*', 
> '^aptina,.*', '^arasan,.*', '^archermind,.*', '^arctic,.*', '^arcx,.*', 
> '^aries,.*', '^arm,.*', '^armadeus,.*', '^arrow,.*', '^artesyn,.*', 
> '^asahi-kasei,.*', '^asc,.*', '^aspeed,.*', '^asus,.*', '^atlas,.*', 
> '^atmel,.*', '^auo,.*', '^auvidea,.*', '^avago,.*', '^avia,.*', '^avic,.*', 
> '^avnet,.*', '^awinic,.*', '^axentia,.*', '^axis,.*', '^azoteq,.*', 
> '^azw,.*', '^baikal,.*', '^bananapi,.*', '^beacon,.*', '^beagle,.*', 
> '^bhf,.*', '^bitmain,.*', '^boe,.*', '^bosch,.*', '^boundary,.*', '^brcm,.*', 
> '^broadmobi,.*', '^bticino,.*', '^buffalo,.*', '^bur,.*', '^calaosystems,.*', 
> '^calxeda,.*', '^caninos,.*', '^capella,.*', '^cascoda,.*', '^catalyst,.*', 
> '^cavium,.*', '^cdns,.*', '^cdtech,.*', '^cellwise,.*', '^ceva,.*', 
> '^checkpoint,.*', '^chefree,.*', '^chipidea,.*', '^chipone,.*', 
> '^chipspark,.*', '^chrontel,.*', '^chrp,.*', '^chunghwa,.*', '^chuwi,.*', 
> '^ciaa,.*', '^cirrus,.*', '^cloudengines,.*', '^cnm,.*', '^cnxt,.*', 
> '^colorfly,.*', '^compulab,.*', '^coreriver,.*', '^corpro,.*', '^cortina,.*', 
> '^cosmic,.*', '^crane,.*', '^creative,.*', '^crystalfontz,.*', '^csky,.*', 
> '^csq,.*', '^cubietech,.*', '^cypress,.*', '^cznic,.*', '^dallas,.*', 
> '^dataimage,.*', '^davicom,.*', '^dell,.*', '^delta,.*', '^denx,.*', 
> '^devantech,.*', '^dfi,.*', '^dh,.*', '^difrnce,.*', '^digi,.*', 
> '^digilent,.*', '^dioo,.*', '^dlc,.*', '^dlg,.*', '^dlink,.*', '^dmo,.*', 
> '^domintech,.*', '^dongwoon,.*', '^dptechnics,.*', '^dragino,.*', 
> '^dserve,.*', '^dynaimage,.*', '^ea,.*', '^ebs-systart,.*', '^ebv,.*', 
> '^eckelmann,.*', '^edt,.*', '^eeti,.*', '^einfochips,.*', '^elan,.*', 
> '^element14,.*', '^elgin,.*', '^elida,.*', '^elimo,.*', '^embest,.*', 
>

Re: [PATCH v6 3/4] perf-stat: enable counting events for BPF programs

2020-12-28 Thread Song Liu




> On Dec 28, 2020, at 3:43 PM, Song Liu  wrote:
> 
> 
> 
>> On Dec 28, 2020, at 12:11 PM, Arnaldo Carvalho de Melo  
>> wrote:
>> 
>> Em Mon, Dec 28, 2020 at 09:40:53AM -0800, Song Liu escreveu:
>>> Introduce perf-stat -b option, which counts events for BPF programs, like:
>>> 
>>> [root@localhost ~]# ~/perf stat -e ref-cycles,cycles -b 254 -I 1000
>>>1.487903822115,200  ref-cycles
>>>1.487903822 86,012  cycles
>>>2.489147029 80,560  ref-cycles
>>>2.489147029 73,784  cycles
>>>3.490341825 60,720  ref-cycles
>>>3.490341825 37,797  cycles
>>>4.491540887 37,120  ref-cycles
>>>4.491540887 31,963  cycles
>>> 
>>> The example above counts cycles and ref-cycles of BPF program of id 254.
>>> This is similar to bpftool-prog-profile command, but more flexible.
>>> 
>>> perf-stat -b creates per-cpu perf_event and loads fentry/fexit BPF
>>> programs (monitor-progs) to the target BPF program (target-prog). The
>>> monitor-progs read perf_event before and after the target-prog, and
>>> aggregate the difference in a BPF map. Then the user space reads data
>>> from these maps.
>>> 
>>> A new struct bpf_counter is introduced to provide common interface that
>>> uses BPF programs/maps to count perf events.
>> 
>> Segfaulting here:
>> 
>> [root@five ~]# bpftool prog  | grep tracepoint
>> 110: tracepoint  name syscall_unaugme  tag 57cd311f2e27366b  gpl
>> 111: tracepoint  name sys_enter_conne  tag 3555418ac9476139  gpl
>> 112: tracepoint  name sys_enter_sendt  tag bc7fcadbaf7b8145  gpl
>> 113: tracepoint  name sys_enter_open  tag 0e59c3ac2bea5280  gpl
>> 114: tracepoint  name sys_enter_opena  tag 0baf443610f59837  gpl
>> 115: tracepoint  name sys_enter_renam  tag 24664e4aca62d7fa  gpl
>> 116: tracepoint  name sys_enter_renam  tag 20093e51a8634ebb  gpl
>> 117: tracepoint  name sys_enter  tag 0bc3fc9d11754ba1  gpl
>> 118: tracepoint  name sys_exit  tag 29c7ae234d79bd5c  gpl
>> [root@five ~]#
>> [root@five ~]# gdb perf
>> GNU gdb (GDB) Fedora 10.1-2.fc33
>> Reading symbols from perf...
>> (gdb) run stat -e instructions,cycles -b 113 -I 1000
>> Starting program: /root/bin/perf stat -e instructions,cycles -b 113 -I 1000
>> [Thread debugging using libthread_db enabled]
>> Using host libthread_db library "/lib64/libthread_db.so.1".
>> libbpf: elf: skipping unrecognized data section(9) .eh_frame
>> libbpf: elf: skipping relo section(15) .rel.eh_frame for section(9) .eh_frame
>> libbpf: elf: skipping unrecognized data section(9) .eh_frame
>> libbpf: elf: skipping relo section(15) .rel.eh_frame for section(9) .eh_frame
>> 
>> Program received signal SIGSEGV, Segmentation fault.
>> 0x0058d55b in bpf_program_profiler__read (evsel=0xc612c0) at 
>> util/bpf_counter.c:217
>> 217  reading_map_fd = bpf_map__fd(skel->maps.accum_readings);
>> (gdb) bt
>> #0  0x0058d55b in bpf_program_profiler__read (evsel=0xc612c0) at 
>> util/bpf_counter.c:217
>> #1  0x in ?? ()
>> (gdb)
>> 
>> [acme@five perf]$ clang -v |& head -2
>> clang version 11.0.0 (Fedora 11.0.0-2.fc33)
>> Target: x86_64-unknown-linux-gnu
>> [acme@five perf]$
>> 
>> Do you need any extra info?
> 
> Hmm... I am not able to reproduce this. I am trying to setup an environment 
> similar
> to fc33 (clang 11, etc.). Does this segfault every time, and on all programs? 
> 

I tried it on CentOS Stream release 8, with 

  gcc version 8.4.1 20200928 (Red Hat 8.4.1-1) (GCC)
  clang version 11.0.0 (Red Hat 11.0.0-0.2.rc2.module_el8.4.0+533+50191577)

Unfortunately, I still cannot repro it. 

I didn't find the issue while looking through the code. AFAICS, the code
fail over when the skeleton is not ready, so bpf_program_profiler__read()
should find a valid skeleton. 

Could you please help run the test with the following patch? The patch is 
also available at 

https://git.kernel.org/pub/scm/linux/kernel/git/song/linux.git perf-dash-b

Thanks,
Song


diff --git i/tools/perf/util/bpf_counter.c w/tools/perf/util/bpf_counter.c
index f2cb86a40c882..e09c571365b56 100644
--- i/tools/perf/util/bpf_counter.c
+++ w/tools/perf/util/bpf_counter.c
@@ -46,8 +46,10 @@ static int bpf_program_profiler__destroy(struct evsel *evsel)
 {
struct bpf_counter *counter;

-   list_for_each_entry(counter, >bpf_counter_list, list)
+   list_for_each_entry(counter, >bpf_counter_list, list) {
+   pr_debug("%s counter = %lx\n", __func__, (unsigned 
long)counter);
bpf_prog_profiler_bpf__destroy(counter->skel);
+   }
INIT_LIST_HEAD(>bpf_counter_list);
return 0;
 }
@@ -141,8 +143,14 @@ static int bpf_program_profiler_load_one(struct evsel 
*evsel, u32 prog_id)
counter->skel = skel;
list_add(>list, >bpf_counter_list);
close(prog_fd);
+   pr_debug("%s counter = %lx\n", __func__, (unsigned long)counter);
+   pr_debug("%s skel =

Re: [PATCH] perf tools: Detect when pipe is passed as perf data

On Sat, Dec 26, 2020 at 7:21 AM Jiri Olsa  wrote:
>
> Currently we allow pipe input/output only through '-' string
> being passed to '-o' or '-i' options, like:
>
>   # mkfifo perf.pipe
>   # perf record --no-buffering -e 'sched:sched_switch' -o - > perf.pipe &
>   [1] 354406
>   # cat perf.pipe | ./perf --no-pager script -i - | head -3
> perf 354406 [000] 168190.164921: sched:sched_switch: perf:354406..
>  migration/012 [000] 168190.164928: sched:sched_switch: migration/0:..
> perf 354406 [001] 168190.164981: sched:sched_switch: perf:354406..
>   ...
>
> This patch detects if given path is pipe and set the perf data
> object accordingly, so it's possible now to do above with:
>
>   # mkfifo perf.pipe
>   # perf record --no-buffering -e 'sched:sched_switch' -o perf.pipe &
>   [1] 360188
>   # perf --no-pager script -i ./perf.pipe | head -3
> perf 354442 [000] 168275.464895: sched:sched_switch: perf:354442..
>  migration/012 [000] 168275.464902: sched:sched_switch: migration/0:..
> perf 354442 [001] 168275.464953: sched:sched_switch: perf:354442..
>
> It's of course possible to combine any of above ways.
>
> Signed-off-by: Jiri Olsa 
> ---
>  tools/perf/util/data.c | 27 +--
>  1 file changed, 21 insertions(+), 6 deletions(-)
>
> diff --git a/tools/perf/util/data.c b/tools/perf/util/data.c
> index f29af4fc3d09..767b6c903cf5 100644
> --- a/tools/perf/util/data.c
> +++ b/tools/perf/util/data.c
> @@ -159,7 +159,7 @@ int perf_data__update_dir(struct perf_data *data)
> return 0;
>  }
>
> -static bool check_pipe(struct perf_data *data)
> +static int check_pipe(struct perf_data *data)
>  {
> struct stat st;
> bool is_pipe = false;
> @@ -172,6 +172,15 @@ static bool check_pipe(struct perf_data *data)
> } else {
> if (!strcmp(data->path, "-"))
> is_pipe = true;
> +   else if (!stat(data->path, ) && S_ISFIFO(st.st_mode)) {
> +   int flags = perf_data__is_read(data) ?
> +   O_RDONLY : O_WRONLY|O_CREAT|O_TRUNC;

I don't think we need O_CREAT here (maybe O_TRUNC as well).

Thanks,
Namhyung


> +
> +   fd = open(data->path, flags);
> +   if (fd < 0)
> +   return -EINVAL;
> +   is_pipe = true;
> +   }
> }
>
> if (is_pipe) {
> @@ -190,7 +199,8 @@ static bool check_pipe(struct perf_data *data)
> }
> }
>
> -   return data->is_pipe = is_pipe;
> +   data->is_pipe = is_pipe;
> +   return 0;
>  }

[PATCH 1/1] mtd: spinand: add support for Foresee FS35ND01G

2020-12-28 Thread Daniel Palmer

Add support for the Foresee FS35ND01G manufactured by Longsys.

Signed-off-by: Daniel Palmer 
---
 drivers/mtd/nand/spi/Makefile  |  2 +-
 drivers/mtd/nand/spi/core.c|  1 +
 drivers/mtd/nand/spi/longsys.c | 45 ++
 include/linux/mtd/spinand.h|  1 +
 4 files changed, 48 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mtd/nand/spi/longsys.c

diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index 9662b9c1d5a9..1d6819022e43 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,3 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
-spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o 
winbond.o
+spinand-objs := core.o gigadevice.o longsys.o macronix.o micron.o paragon.o 
toshiba.o winbond.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 8ea545bb924d..bdc9cd45d232 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -856,6 +856,7 @@ static const struct nand_ops spinand_ops = {
 
 static const struct spinand_manufacturer *spinand_manufacturers[] = {
_spinand_manufacturer,
+   _spinand_manufacturer,
_spinand_manufacturer,
_spinand_manufacturer,
_spinand_manufacturer,
diff --git a/drivers/mtd/nand/spi/longsys.c b/drivers/mtd/nand/spi/longsys.c
new file mode 100644
index ..f18271f8e9d2
--- /dev/null
+++ b/drivers/mtd/nand/spi/longsys.c
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Daniel Palmer 
+ *
+ */
+
+#include 
+#include 
+#include 
+
+#define SPINAND_MFR_LONGSYS0xcd
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+   SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+   SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+   SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+   SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static const struct spinand_info longsys_spinand_table[] = {
+   SPINAND_INFO("FS35ND01G",
+SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xea, 0x11),
+NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+NAND_ECCREQ(4, 512),
+SPINAND_INFO_OP_VARIANTS(_cache_variants,
+ _cache_variants,
+ _cache_variants),
+SPINAND_HAS_QE_BIT,
+SPINAND_ECCINFO(NULL,
+NULL)),
+};
+
+static const struct spinand_manufacturer_ops longsys_spinand_manuf_ops = {
+};
+
+const struct spinand_manufacturer longsys_spinand_manufacturer = {
+   .id = SPINAND_MFR_LONGSYS,
+   .name = "Longsys",
+   .chips = longsys_spinand_table,
+   .nchips = ARRAY_SIZE(longsys_spinand_table),
+   .ops = _spinand_manuf_ops,
+};
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 6bb92f26833e..8651e63a2f8a 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -239,6 +239,7 @@ struct spinand_manufacturer {
 
 /* SPI NAND manufacturers */
 extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
+extern const struct spinand_manufacturer longsys_spinand_manufacturer;
 extern const struct spinand_manufacturer macronix_spinand_manufacturer;
 extern const struct spinand_manufacturer micron_spinand_manufacturer;
 extern const struct spinand_manufacturer paragon_spinand_manufacturer;
-- 
2.30.0.rc2

[PATCH 0/1] Add basic support for Foresee SPI NAND

2020-12-28 Thread Daniel Palmer

This is my very crude attempt at adding support for Longsys'
Foresee branded SPI NAND parts that are showing up on some
boards.

I fully admit I have no idea what I'm doing here and I basically
took one of the existing files, ripped out what I didn't
understand and tried to fill in the numbers from the datasheet
without really knowing what they mean.

This worked well enough for me to get something that looks like
a correct dump of the SPI NAND from a board I'm working with.
I need the vendor firmware on the board for reverse engineering
so I haven't actually tried to write anything yet.

The datasheet for this chip is linked. If someone that actually
knows what they're doing could take a look and point out my
mistakes that would be great.

Link: 
https://datasheet.lcsc.com/szlcsc/2008121142_FORESEE-FS35ND01G-S1Y2QWFI000_C719495.pdf

Daniel Palmer (1):
  mtd: spinand: add support for Foresee FS35ND01G

 drivers/mtd/nand/spi/Makefile  |  2 +-
 drivers/mtd/nand/spi/core.c|  1 +
 drivers/mtd/nand/spi/longsys.c | 45 ++
 include/linux/mtd/spinand.h|  1 +
 4 files changed, 48 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mtd/nand/spi/longsys.c

-- 
2.30.0.rc2

Re: [PATCH 2/3] perf tools: Skip MMAP record synthesis for kernel threads

On Mon, Dec 28, 2020 at 8:50 PM Jiri Olsa  wrote:
>
> On Mon, Dec 21, 2020 at 04:00:28PM +0900, Namhyung Kim wrote:
> > To synthesize information to resolve sample IPs, it needs to scan task
> > and mmap info from the /proc filesystem.  For each process, it
> > opens (and reads) status and maps file respectively.  But as kernel
> > threads don't have memory maps so we can skip the maps file.
> >
> > To find kernel threads, check "VmPeak:" line in /proc//status
> > file.  It's about the peak virtual memory usage so only user-level
> > tasks have that.  Also check "Threads:" line (which follows the VmPeak
> > line whether or not it exists) to be sure it's read enough data - just
> > in case of deeply nested pid namespaces or large number of
> > supplementary groups are involved.
>
> how much does this save? for kernel threads the maps file is empty
> and we just open the file and close
>
> also perhaps just stat(".maps") and check the size would be easier?

The numbers are in the cover letter and it's around 5% on an idle
machine which has mostly kernel threads.  I think most of the win
came from this change.

It's just to avoid those syscalls, so I wanted to use the available
info in the status file.

Thanks,
Namhyung

[PATCH 2/2] spi: fix the divide by 0 error when calculating xfer waiting time

2020-12-28 Thread Xu Yilun

The xfer waiting time is the result of xfer->len / xfer->speed_hz, but
when the following patch is merged,

commit 9326e4f1e5dd ("spi: Limit the spi device max speed to controller's max 
speed")

the xfer->speed_hz may always be clamped to 0 if the controller doesn't
provide its max_speed_hz. There may be no hardware indication of the
max_speed_hz so the controller driver leaves it, but exception happens
when it tries to do irq mode transfer.

This patch makes the assumption of 1khz xfer speed if the xfer->speed_hz
is not assigned. This avoids the divide by 0 issue and ensures a
reasonable tolerant waiting time.

Signed-off-by: Xu Yilun 
---
 drivers/spi/spi.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 51d7c00..2f3c2c9 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1109,6 +1109,7 @@ static int spi_transfer_wait(struct spi_controller *ctlr,
struct spi_statistics *statm = >statistics;
struct spi_statistics *stats = >spi->statistics;
unsigned long long ms;
+   u32 speed_hz;
 
if (spi_controller_is_slave(ctlr)) {
if (wait_for_completion_interruptible(>xfer_completion)) {
@@ -1116,8 +1117,9 @@ static int spi_transfer_wait(struct spi_controller *ctlr,
return -EINTR;
}
} else {
+   speed_hz = xfer->speed_hz ? : 1000;
ms = 8LL * 1000LL * xfer->len;
-   do_div(ms, xfer->speed_hz);
+   do_div(ms, speed_hz);
ms += ms + 200; /* some tolerance */
 
if (ms > UINT_MAX)
-- 
2.7.4

[tip:x86/build] BUILD SUCCESS ac5d08870d0b94cbfa8103c9e294de2b96f249bc

tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git  
x86/build
branch HEAD: ac5d08870d0b94cbfa8103c9e294de2b96f249bc  x86/build: Realign 
archhelp

elapsed time: 721m

configs tested: 130
configs skipped: 55

The following configs have been built successfully.
More configs may be tested in the coming days.

gcc tested configs:
arm defconfig
arm64allyesconfig
arm64   defconfig
arm  allyesconfig
arm  allmodconfig
m68k  hp300_defconfig
powerpcge_imp3a_defconfig
mips  maltasmvp_eva_defconfig
powerpcklondike_defconfig
powerpc taishan_defconfig
powerpc tqm8541_defconfig
sh   se7722_defconfig
sh kfr2r09-romimage_defconfig
sh ap325rxa_defconfig
arm   imx_v6_v7_defconfig
h8300   h8s-sim_defconfig
armqcom_defconfig
sh   j2_defconfig
cskydefconfig
sparc   sparc32_defconfig
powerpc  pmac32_defconfig
powerpcadder875_defconfig
arm   tegra_defconfig
mipsgpr_defconfig
arm   sunxi_defconfig
arm   h5000_defconfig
shdreamcast_defconfig
powerpc  makalu_defconfig
sh   se7751_defconfig
arm mxs_defconfig
powerpc pseries_defconfig
powerpc tqm8555_defconfig
armmulti_v7_defconfig
powerpc mpc836x_mds_defconfig
mipsmalta_kvm_guest_defconfig
arc haps_hs_smp_defconfig
powerpc powernv_defconfig
mips  fuloong2e_defconfig
arm  jornada720_defconfig
powerpc mpc5200_defconfig
h8300 edosk2674_defconfig
arm bcm2835_defconfig
mips  malta_kvm_defconfig
sh   se7780_defconfig
powerpc64   defconfig
armlart_defconfig
m68k  atari_defconfig
powerpc ep8248e_defconfig
powerpc  allmodconfig
ia64 allmodconfig
ia64defconfig
ia64 allyesconfig
m68k allmodconfig
m68kdefconfig
m68k allyesconfig
nds32   defconfig
nios2allyesconfig
alpha   defconfig
alphaallyesconfig
xtensa   allyesconfig
h8300allyesconfig
arc defconfig
sh   allmodconfig
parisc  defconfig
s390 allyesconfig
parisc   allyesconfig
s390defconfig
i386 allyesconfig
sparcallyesconfig
sparc   defconfig
i386   tinyconfig
i386defconfig
nios2   defconfig
arc  allyesconfig
nds32 allnoconfig
c6x  allyesconfig
mips allyesconfig
mips allmodconfig
powerpc  allyesconfig
powerpc   allnoconfig
i386 randconfig-a005-20201228
i386 randconfig-a002-20201228
i386 randconfig-a004-20201228
i386 randconfig-a006-20201228
i386 randconfig-a003-20201228
i386 randconfig-a001-20201228
x86_64   randconfig-a014-20201228
x86_64   randconfig-a015-20201228
x86_64   randconfig-a016-20201228
x86_64   randconfig-a012-20201228
x86_64   randconfig-a011-20201228
x86_64   randconfig-a013-20201228
i386 randconfig-a011-20201227
i386 randconfig-a016-20201227
i386 randconfig-a012-20201227
i386 randconfig-a014-20201227
i386 randconfig-a015-20201227
i386 randconfig-a013-20201227
i386 randconfig-a014-20201228
i386 randconfig-a012-20201228
i386 randconfig-a016-20201228

[PATCH 1/2] spi: altera: fix return value for altera_spi_txrx()

2020-12-28 Thread Xu Yilun

This patch fixes the return value for altera_spi_txrx. It should return
1 for interrupt transfer mode, and return 0 for polling transfer mode.

The altera_spi_txrx() implements the spi_controller.transfer_one
callback. According to the spi-summary.rst, the transfer_one should
return 0 when transfer is finished, return 1 when transfer is still in
progress.

Signed-off-by: Xu Yilun 
---
 drivers/spi/spi-altera.c | 26 ++
 1 file changed, 14 insertions(+), 12 deletions(-)

diff --git a/drivers/spi/spi-altera.c b/drivers/spi/spi-altera.c
index 809bfff..cbc4c28 100644
--- a/drivers/spi/spi-altera.c
+++ b/drivers/spi/spi-altera.c
@@ -189,24 +189,26 @@ static int altera_spi_txrx(struct spi_master *master,
 
/* send the first byte */
altera_spi_tx_word(hw);
-   } else {
-   while (hw->count < hw->len) {
-   altera_spi_tx_word(hw);
 
-   for (;;) {
-   altr_spi_readl(hw, ALTERA_SPI_STATUS, );
-   if (val & ALTERA_SPI_STATUS_RRDY_MSK)
-   break;
+   return 1;
+   }
+
+   while (hw->count < hw->len) {
+   altera_spi_tx_word(hw);
 
-   cpu_relax();
-   }
+   for (;;) {
+   altr_spi_readl(hw, ALTERA_SPI_STATUS, );
+   if (val & ALTERA_SPI_STATUS_RRDY_MSK)
+   break;
 
-   altera_spi_rx_word(hw);
+   cpu_relax();
}
-   spi_finalize_current_transfer(master);
+
+   altera_spi_rx_word(hw);
}
+   spi_finalize_current_transfer(master);
 
-   return t->len;
+   return 0;
 }
 
 static irqreturn_t altera_spi_irq(int irq, void *dev)
-- 
2.7.4

[PATCH 0/2] fix the issue when xfer by spi-altera

2020-12-28 Thread Xu Yilun

When doing spi xfer by spi-altera, divide by 0 exception happens in
spi_transfer_wait(), This is because the xfer->speed_hz is always
clamped to 0 by spi->controller->max_speed_hz, the feature is
introduced in:

commit 9326e4f1e5dd ("spi: Limit the spi device max speed to controller's max 
speed")

The spi-altera doesn't have hardware indication for controller's
max_speed_hz, so its value is uninitialized as 0.

Patch #1 fixes the issue of spi_altera driver. When doing polling
mode xfer, its transfer_one() callback should return 1, to indicate
the xfer is finished. It should return 0 for irq mode xfer. With
this patch the polling mode xfer is OK as it needs no
spi_transfer_wait() anymore.

But the irq mode xfer is still broken. So Patch #2 assumes 1khz xfer
speed if the xfer->speed_hz is not assigned. I try to avoid the
divide by 0 issue and ensures a reasonable tolerant waiting time in
a generic way.

Xu Yilun (2):
  spi: altera: fix return value for altera_spi_txrx()
  spi: fix the divide by 0 error when calculating xfer waiting time

 drivers/spi/spi-altera.c | 26 ++
 drivers/spi/spi.c|  4 +++-
 2 files changed, 17 insertions(+), 13 deletions(-)

-- 
2.7.4

Re: [PATCH 2/3] tools/lib/fs: Diet cgroupfs_find_mountpoint()

Hi Jiri,

On Mon, Dec 28, 2020 at 5:31 PM Jiri Olsa  wrote:
>
> On Wed, Dec 16, 2020 at 06:05:55PM +0900, Namhyung Kim wrote:
>
> SNIP
>
> > + *p++ = '\0';
> >
> > - while (token != NULL) {
> > - if (subsys && !strcmp(token, subsys)) {
> > - /* found */
> > - fclose(fp);
> > + /* check filesystem type */
> > + if (strncmp(p, "cgroup", 6))
> > + continue;
> >
> > - if (strlen(mountpoint) < maxlen) {
> > - strcpy(buf, mountpoint);
> > - return 0;
> > - }
> > - return -1;
> > - }
> > - token = strtok_r(NULL, ",", _ptr);
> > - }
> > + if (p[6] == '2') {
> > + /* save cgroup v2 path */
> > + strcpy(mountpoint, path);
> > + continue;
> >   }
> >
> > - if (!strcmp(type, "cgroup2"))
> > - strcpy(path_v2, mountpoint);
> > + /* now we have cgroup v1, check the options for subsystem */
> > + p += 7;
> > +
> > + p = strstr(p, subsys);
>
> not sure this is a real problem, but this would mixe up for
> cpu/cpuacct/cpuset no? we are using the function for perf_event
> subsys only, but it's globaly availble

Yeah, that's why I added the sanity check below. :)

>
> > + if (p == NULL)
> > + continue;
> > +
> > + /* sanity check: it should be separated by a space or a comma 
> > */
> > + if (!strchr(" ,", p[-1]) || !strchr(" ,", p[strlen(subsys)]))
> > + continue;

Here.

Thanks,
Namhyung


> > +
> > + strcpy(mountpoint, path);
> > + break;
> >   }
> > + free(line);
> >   fclose(fp);
> >
> > - if (path_v2[0] && strlen(path_v2) < maxlen) {
> > - strcpy(buf, path_v2);
> > + if (mountpoint[0] && strlen(mountpoint) < maxlen) {
> > + strcpy(buf, mountpoint);
> >   return 0;
> >   }
> >   return -1;
> > --
> > 2.29.2.684.gfbc64c5ab5-goog
> >
>

phy-tegra-usb.c:(.text.tegra_usb_phy_init+0x40): undefined reference to `clk_get_parent'

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   dea8dcf2a9fa8cc540136a6cd885c3beece16ec3
commit: 5dcdafdd30b1babde143ee7086d3de79396d023b usb: phy: tegra: Hook up 
init/shutdown callbacks
date:   12 months ago
config: mips-randconfig-r013-20201223 (attached as .config)
compiler: mips-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=5dcdafdd30b1babde143ee7086d3de79396d023b
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 5dcdafdd30b1babde143ee7086d3de79396d023b
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross 
ARCH=mips 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

   mips-linux-ld: drivers/mfd/omap-usb-host.o: in function `usbhs_omap_probe':
   omap-usb-host.c:(.text.usbhs_omap_probe+0x5a0): undefined reference to 
`clk_set_parent'
   mips-linux-ld: omap-usb-host.c:(.text.usbhs_omap_probe+0x5d4): undefined 
reference to `clk_set_parent'
   mips-linux-ld: omap-usb-host.c:(.text.usbhs_omap_probe+0x5ec): undefined 
reference to `clk_set_parent'
   mips-linux-ld: omap-usb-host.c:(.text.usbhs_omap_probe+0x610): undefined 
reference to `clk_set_parent'
   mips-linux-ld: drivers/usb/phy/phy-tegra-usb.o: in function 
`tegra_usb_phy_init':
>> phy-tegra-usb.c:(.text.tegra_usb_phy_init+0x40): undefined reference to 
>> `clk_get_parent'
   mips-linux-ld: drivers/memory/samsung/exynos5422-dmc.o: in function 
`exynos5_dmc_probe':
   exynos5422-dmc.c:(.text.exynos5_dmc_probe+0x37c): undefined reference to 
`clk_set_parent'
   mips-linux-ld: drivers/memory/samsung/exynos5422-dmc.o: in function 
`exynos5_dmc_change_freq_and_volt':
   exynos5422-dmc.c:(.text.exynos5_dmc_change_freq_and_volt+0x114): undefined 
reference to `clk_set_parent'
   mips-linux-ld: 
exynos5422-dmc.c:(.text.exynos5_dmc_change_freq_and_volt+0x340): undefined 
reference to `clk_set_parent'
   mips-linux-ld: drivers/iio/adc/ingenic-adc.o: in function 
`jz4770_adc_init_clk_div':
   ingenic-adc.c:(.text.jz4770_adc_init_clk_div+0x10): undefined reference to 
`clk_get_parent'
   mips-linux-ld: drivers/iio/adc/ingenic-adc.o: in function 
`jz4725b_adc_init_clk_div':
   ingenic-adc.c:(.text.jz4725b_adc_init_clk_div+0x10): undefined reference to 
`clk_get_parent'

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip

Re: [PATCH v3 0/9] Support Runtime PM and host mode by Tegra ChipIdea USB driver

2020-12-28 Thread Peter Chen

On 20-12-18 15:02:37, Dmitry Osipenko wrote:
> This series implements Runtime PM support for the Tegra ChipIdea USB driver.
> It also squashes the older ehci-tegra driver into the ChipIdea driver, hence
> the RPM is supported by both UDC and host controllers, secondly this opens
> opportunity for implementing OTG support in the future.
> 
> Patchset was tested on various Tegra20, Tegra30 and Tegra124 devices.
> Thanks to Peter Geis, Matt Merhar, Nicolas Chauvet and Ion Agorria for
> helping with the extensive and productive testing!
> 
> Changelog:
> 
> v3: - Replaced "goto" with if-statements as was suggested by Thierry Reding.
> 
> - Improved wording of the deprecated Kconfig entry as was suggested
>   by Alan Stern.
> 
> - Added ACKs from Thierry Reding and Alan Stern.
> 
> - Added a new minor patch "Specify TX FIFO threshold in UDC SoC info"
>   just for completeness, since we can now switch OTG to host mode in
>   the ChipIdea driver. Although, OTG support remains a work-in-progress
>   for now.
> 
> v2: - Improved comments in the code as it was suggested by Peter Chen and
>   Sergei Shtylyov for v1.
> 
> - Replaced mdelay() with fsleep() and made ci->hdc to reset to NULL in
>   a error code path, like it was suggested by Peter Chen.
> 
> - Redirected deprecated USB_EHCI_TEGRA Kconfig entry to USB_CHIPIDEA_TEGRA
>   as was suggested by Alan Stern.
> 
> - Improved commit message and added ACK from Thierry Reding to the patch
>   that removes MODULE_ALIAS.
> 
> - Fixed UDC PHY waking up on ASUS TF201 tablet device by utilizing
>   additional VBUS sensor. This was reported and tested by Ion Agorria.
> 
> - Added t-b from Ion Agorria.
> 
> Dmitry Osipenko (8):
>   usb: phy: tegra: Add delay after power up
>   usb: phy: tegra: Support waking up from a low power mode
>   usb: chipidea: tegra: Remove MODULE_ALIAS
>   usb: chipidea: tegra: Rename UDC to USB
>   usb: chipidea: tegra: Support runtime PM
>   usb: chipidea: tegra: Specify TX FIFO threshold in UDC SoC info
>   usb: host: ehci-tegra: Remove the driver
>   ARM: tegra_defconfig: Enable USB_CHIPIDEA_HOST and remove
> USB_EHCI_TEGRA
> 
> Peter Geis (1):
>   usb: chipidea: tegra: Support host mode

Chipidea related (patch 3-7) are applied, thanks.

Peter
> 
>  arch/arm/configs/tegra_defconfig |   3 +-
>  drivers/usb/chipidea/Kconfig |   3 +-
>  drivers/usb/chipidea/ci_hdrc_tegra.c | 344 ---
>  drivers/usb/chipidea/core.c  |  10 +-
>  drivers/usb/chipidea/host.c  | 104 -
>  drivers/usb/host/Kconfig |  10 +-
>  drivers/usb/host/Makefile|   1 -
>  drivers/usb/host/ehci-tegra.c| 604 ---
>  drivers/usb/phy/phy-tegra-usb.c  | 103 -
>  include/linux/usb/chipidea.h |   6 +
>  include/linux/usb/tegra_usb_phy.h|   2 +
>  11 files changed, 518 insertions(+), 672 deletions(-)
>  delete mode 100644 drivers/usb/host/ehci-tegra.c
> 
> -- 
> 2.29.2
> 

-- 

Thanks,
Peter Chen

Re: [PATCH v16 09/10] fs/ntfs3: Add NTFS3 in fs/Kconfig and fs/Makefile

Hi Konstantin,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on linus/master]
[also build test WARNING on v5.11-rc1 next-20201223]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Konstantin-Komarov/NTFS-read-write-driver-GPL-implementation-by-Paragon-Software/20201225-215909
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
71c5f03154ac1cb27423b984743ccc2f5d11d14d
config: powerpc64-randconfig-r021-20201229 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 
cee1e7d14f4628d6174b33640d502bff3b54ae45)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# install powerpc64 cross compiling tool for clang build
# apt-get install binutils-powerpc64-linux-gnu
# 
https://github.com/0day-ci/linux/commit/fafee24e48a76d7a2f856437aa0480ecfe72bec6
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
Konstantin-Komarov/NTFS-read-write-driver-GPL-implementation-by-Paragon-Software/20201225-215909
git checkout fafee24e48a76d7a2f856437aa0480ecfe72bec6
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross 
ARCH=powerpc64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

>> fs/ntfs3/attrib.c:1543:7: warning: variable 'hint' is used uninitialized 
>> whenever '&&' condition is false [-Wsometimes-uninitialized]
   if (vcn + clst_data &&
   ^~~
   fs/ntfs3/attrib.c:1550:11: note: uninitialized use occurs here
hint + 1, len - clst_data, 
NULL, 0,
^~~~
   fs/ntfs3/attrib.c:1543:7: note: remove the '&&' if its condition is always 
true
   if (vcn + clst_data &&
   ^~
   fs/ntfs3/attrib.c:1541:18: note: initialize the variable 'hint' to silence 
this warning
   CLST alen, hint;
  ^
   = 0
>> fs/ntfs3/attrib.c:1962:31: warning: variable 'attr' is uninitialized when 
>> used here [-Wuninitialized]
   u32 data_size = le32_to_cpu(attr->res.data_size);
   ^~~~
   include/linux/byteorder/generic.h:89:21: note: expanded from macro 
'le32_to_cpu'
   #define le32_to_cpu __le32_to_cpu
   ^
   include/uapi/linux/byteorder/big_endian.h:34:59: note: expanded from macro 
'__le32_to_cpu'
   #define __le32_to_cpu(x) __swab32((__force __u32)(__le32)(x))
 ^
   include/uapi/linux/swab.h:118:32: note: expanded from macro '__swab32'
   (__builtin_constant_p((__u32)(x)) ? \
 ^
   fs/ntfs3/attrib.c:1947:21: note: initialize the variable 'attr' to silence 
this warning
   struct ATTRIB *attr, *attr_b;
  ^
   = NULL
   fs/ntfs3/attrib.c:70:20: warning: unused function 'attr_must_be_resident' 
[-Wunused-function]
   static inline bool attr_must_be_resident(struct ntfs_sb_info *sbi,
  ^
   3 warnings generated.


vim +1543 fs/ntfs3/attrib.c

ebfca8733bf2f6f Konstantin Komarov 2020-12-25  1458  
ebfca8733bf2f6f Konstantin Komarov 2020-12-25  1459  /*
ebfca8733bf2f6f Konstantin Komarov 2020-12-25  1460   * attr_allocate_frame
ebfca8733bf2f6f Konstantin Komarov 2020-12-25  1461   *
ebfca8733bf2f6f Konstantin Komarov 2020-12-25  1462   * allocate/free clusters 
for 'frame'
ebfca8733bf2f6f Konstantin Komarov 2020-12-25  1463   * assumed: 
down_write(>file.run_lock);
ebfca8733bf2f6f Konstantin Komarov 2020-12-25  1464   */
ebfca8733bf2f6f Konstantin Komarov 2020-12-25  1465  int 
attr_allocate_frame(struct ntfs_inode *ni, CLST frame, size_t compr_size,
ebfca8733bf2f6f Konstantin Komarov 2020-12-25  1466 u64 
new_valid)
ebfca8733bf2f6f Konstantin Komarov 2020-12-25  1467  {
ebfca8733bf2f6f Konstantin Komarov 2020-12-25  1468 int err = 0;
ebfca8733bf2f6f Konstantin Komarov 2020-12-25  1469 struct runs_tree *run = 
>file.run;
ebfca8733bf2f6f Konstantin Komarov 2020-12-25  1470 struct ntfs_sb_info 
*sbi = ni->mi.sbi;
ebfca8733bf2f6f Konstantin Komarov 2020-12-25  1471 struct ATTRIB *attr, 
*attr_b;
ebfca8733bf2f6f Konstantin Komarov 2020-12-25  1472 struct ATTR_LIST_ENTRY 
*le, *le_b;
ebfca8733bf2f6f Konstantin Komarov 2020-12-25  1473

Re: [PATCH -next] media: dvb-frontends: use DIV_ROUND_UP to calculate timeout

Hi Zheng,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on next-20201222]

url:
https://github.com/0day-ci/linux/commits/Zheng-Yongjun/media-dvb-frontends-use-DIV_ROUND_UP-to-calculate-timeout/20201222-213524
base:6c3eb1b174c07bcaa927003e8bc91e81ab1d5a9e
config: i386-randconfig-c001-20201221 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 


"coccinelle warnings: (new ones prefixed by >>)"
>> drivers/media/dvb-frontends/cxd2841er.c:3341:52-53: Unneeded semicolon

Please review and possibly fold the followup patch.

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip

[PATCH] media: dvb-frontends: fix semicolon.cocci warnings

From: kernel test robot 

drivers/media/dvb-frontends/cxd2841er.c:3341:52-53: Unneeded semicolon


 Remove unneeded semicolon.

Generated by: scripts/coccinelle/misc/semicolon.cocci

CC: Zheng Yongjun 
Reported-by: kernel test robot 
Signed-off-by: kernel test robot 
---

url:
https://github.com/0day-ci/linux/commits/Zheng-Yongjun/media-dvb-frontends-use-DIV_ROUND_UP-to-calculate-timeout/20201222-213524
base:6c3eb1b174c07bcaa927003e8bc91e81ab1d5a9e

 cxd2841er.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/drivers/media/dvb-frontends/cxd2841er.c
+++ b/drivers/media/dvb-frontends/cxd2841er.c
@@ -3338,7 +3338,7 @@ static int cxd2841er_set_frontend_s(stru
cxd2841er_tuner_set(fe);
 
cxd2841er_tune_done(priv);
-   timeout = DIV_ROUND_UP(300, symbol_rate) + 150;;
+   timeout = DIV_ROUND_UP(300, symbol_rate) + 150;
 
i = 0;
do {

[PATCH v2] thermal: cpufreq_cooling: fix slab OOB issue

2020-12-28 Thread Michael Kao

From: brian-sy yang 

Slab OOB issue is scanned by KASAN in cpu_power_to_freq().
If power is limited below the power of OPP0 in EM table,
it will cause slab out-of-bound issue with negative array
index.

Return the lowest frequency if limited power cannot found
a suitable OPP in EM table to fix this issue.

Backtrace:
[] die+0x104/0x5ac
[] bug_handler+0x64/0xd0
[] brk_handler+0x160/0x258
[] do_debug_exception+0x248/0x3f0
[] el1_dbg+0x14/0xbc
[] __kasan_report+0x1dc/0x1e0
[] kasan_report+0x10/0x20
[] __asan_report_load8_noabort+0x18/0x28
[] cpufreq_power2state+0x180/0x43c
[] power_actor_set_power+0x114/0x1d4
[] allocate_power+0xaec/0xde0
[] power_allocator_throttle+0x3ec/0x5a4
[] handle_thermal_trip+0x160/0x294
[] thermal_zone_device_check+0xe4/0x154
[] process_one_work+0x5e4/0xe28
[] worker_thread+0xa4c/0xfac
[] kthread+0x33c/0x358
[] ret_from_fork+0xc/0x18

Fixes: 371a3bc79c11b ("thermal/drivers/cpufreq_cooling: Fix wrong frequency 
converted from power")
Signed-off-by: brian-sy yang 
Signed-off-by: Michael Kao 
Reviewed-by: Lukasz Luba 
---

Changes from v1:
- add fixes tag
- add reviewed-by

 drivers/thermal/cpufreq_cooling.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/thermal/cpufreq_cooling.c 
b/drivers/thermal/cpufreq_cooling.c
index cc2959f22f01..fb33b3480a8f 100644
--- a/drivers/thermal/cpufreq_cooling.c
+++ b/drivers/thermal/cpufreq_cooling.c
@@ -123,7 +123,7 @@ static u32 cpu_power_to_freq(struct cpufreq_cooling_device 
*cpufreq_cdev,
 {
int i;
 
-   for (i = cpufreq_cdev->max_level; i >= 0; i--) {
+   for (i = cpufreq_cdev->max_level; i > 0; i--) {
if (power >= cpufreq_cdev->em->table[i].power)
break;
}
-- 
2.18.0

Re: [PATCH] riscv: add BUILTIN_DTB support for MMU-enabled targets

2020-12-28 Thread Anup Patel

On Mon, Dec 28, 2020 at 10:08 PM Vitaly Wool  wrote:
>
> On Mon, Dec 28, 2020 at 3:10 PM Anup Patel  wrote:
> >
> > On Mon, Dec 28, 2020 at 7:05 PM Vitaly Wool  
> > wrote:
> > >
> > > On Mon, Dec 28, 2020 at 12:59 PM Anup Patel  wrote:
> > > >
> > > > On Sat, Dec 26, 2020 at 10:03 PM Vitaly Wool  
> > > > wrote:
> > > > >
> > > > > Sometimes, especially in a production system we may not want to
> > > > > use a "smart bootloader" like u-boot to load kernel, ramdisk and
> > > > > device tree from a filesystem on eMMC, but rather load the kernel
> > > > > from a NAND partition and just run it as soon as we can, and in
> > > > > this case it is convenient to have device tree compiled into the
> > > > > kernel binary. Since this case is not limited to MMU-less systems,
> > > > > let's support it for these which have MMU enabled too.
> > > > >
> > > > > Signed-off-by: Vitaly Wool 
> > > > > ---
> > > > >  arch/riscv/Kconfig   |  1 -
> > > > >  arch/riscv/mm/init.c | 12 ++--
> > > > >  2 files changed, 10 insertions(+), 3 deletions(-)
> > > > >
> > > > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > > > > index 2b41f6d8e458..9464b4e3a71a 100644
> > > > > --- a/arch/riscv/Kconfig
> > > > > +++ b/arch/riscv/Kconfig
> > > > > @@ -419,7 +419,6 @@ endmenu
> > > > >
> > > > >  config BUILTIN_DTB
> > > > > def_bool n
> > > > > -   depends on RISCV_M_MODE
> > > > > depends on OF
> > > > >
> > > > >  menu "Power management options"
> > > > > diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
> > > > > index 87c305c566ac..5d1c7a3ec01c 100644
> > > > > --- a/arch/riscv/mm/init.c
> > > > > +++ b/arch/riscv/mm/init.c
> > > > > @@ -194,12 +194,20 @@ void __init setup_bootmem(void)
> > > > > setup_initrd();
> > > > >  #endif /* CONFIG_BLK_DEV_INITRD */
> > > > >
> > > > > +   /*
> > > > > +* If DTB is built in, no need to reserve its memblock.
> > > > > +* OTOH, initial_boot_params has to be set to properly copy 
> > > > > DTB
> > > > > +* before unflattening later on.
> > > > > +*/
> > > > > +   if (IS_ENABLED(CONFIG_BUILTIN_DTB))
> > > > > +   initial_boot_params = __va(dtb_early_pa);
> > > >
> > > > Don't assign initial_boot_params directly here because the
> > > > early_init_dt_scan() will do it.
> > >
> > > early_init_dt_scan will set initial_boot_params to dtb_early_va from
> > > the early mapping which will be gone by the time
> > > unflatten_and_copy_device_tree() is called.
> >
> > That's why we are doing early_init_dt_verify() again for the MMU-enabled
> > case which already takes care of your concern.
>
> I might be out in the woods here but... Do you mean the call to
> early_init_dt_verify() in setup_arch() which is compiled out
> completely in the CONFIG_BUILTIN_DTB case?
> Or is there any other call that I'm overlooking?

Sorry for the confusion, what I meant was that we are calling
early_init_dt_verify() from setup_arch() for the MMU-enabled
with built-in DTB disabled case to update "initial_boot_params"
after the boot CPU has switched from early_pg_dir to swapper_pg_dir.

For MMU-enabled with built-in DTB case, if setup_vm() sets the
dtb_early_va and dtb_early_pa correctly then early_init_dt_scan()
called from setup_arch() will automatically set correct value for
"initial_boot_params".

It is strange that early_init_dt_verify() is being compiled-out for you
because the early_init_dt_scan() called from setup_arch() also uses
early_init_dt_verify(). I quickly compiled the NoMMU kernel for K210
which also uses built-in DTB and I see that early_init_dt_verify()
is not being compiled-out when built-in DTB is enabled.

Regards,
Anup

>
> Best regards,
>Vitaly
>
> > We use early_init_dt_verify() like most architectures to set the initial 
> > DTB.
> >
> > >
> > > > The setup_vm() is supposed to setup dtb_early_va and dtb_early_pa
> > > > for MMU-enabled case so please add a "#ifdef" over there for the
> > > > built-in DTB case.
> > > >
> > > > > +   else
> > > > > +   memblock_reserve(dtb_early_pa, 
> > > > > fdt_totalsize(dtb_early_va));
> > > > > +
> > > > > /*
> > > > >  * Avoid using early_init_fdt_reserve_self() since __pa() does
> > > > >  * not work for DTB pointers that are fixmap addresses
> > > > >  */
> > > >
> > > > This comment needs to be updated and moved along the memblock_reserve()
> > > > statement.
> > > >
> > > > > -   memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
> > > > > -
> > > > > early_init_fdt_scan_reserved_mem();
> > > > > dma_contiguous_reserve(dma32_phys_limit);
> > > > > memblock_allow_resize();
> > > > > --
> > > > > 2.29.2
> > > > >
> > > >
> > > > This patch should be based upon Damiens builtin DTB patch.
> > > > Refer, https://www.spinics.net/lists/linux-gpio/msg56616.html
> > >
> > > Thanks for the pointer, however I don't think our patches have
> > > intersections. Besides, Damien is

[PATCH v8 13/16] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA handshake

Add support for Intel KeemBay AxiDMA device handshake programming.
Device handshake number passed in to the AxiDMA shall be written to
the Intel KeemBay AxiDMA hardware handshake registers before DMA
operations are started.

Reviewed-by: Andy Shevchenko 
Signed-off-by: Sia Jee Heng 
---
 .../dma/dw-axi-dmac/dw-axi-dmac-platform.c| 52 +++
 1 file changed, 52 insertions(+)

diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c 
b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index 062d27c61983..5e77eb3d040f 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -445,6 +445,48 @@ static void dma_chan_free_chan_resources(struct dma_chan 
*dchan)
pm_runtime_put(chan->chip->dev);
 }
 
+static int dw_axi_dma_set_hw_channel(struct axi_dma_chip *chip,
+u32 handshake_num, bool set)
+{
+   unsigned long start = 0;
+   unsigned long reg_value;
+   unsigned long reg_mask;
+   unsigned long reg_set;
+   unsigned long mask;
+   unsigned long val;
+
+   if (!chip->apb_regs)
+   return -ENODEV;
+
+   /*
+* An unused DMA channel has a default value of 0x3F.
+* Lock the DMA channel by assign a handshake number to the channel.
+* Unlock the DMA channel by assign 0x3F to the channel.
+*/
+   if (set) {
+   reg_set = UNUSED_CHANNEL;
+   val = handshake_num;
+   } else {
+   reg_set = handshake_num;
+   val = UNUSED_CHANNEL;
+   }
+
+   reg_value = lo_hi_readq(chip->apb_regs + DMAC_APB_HW_HS_SEL_0);
+
+   for_each_set_clump8(start, reg_mask, _value, 64) {
+   if (reg_mask == reg_set) {
+   mask = GENMASK_ULL(start + 7, start);
+   reg_value &= ~mask;
+   reg_value |= rol64(val, start);
+   lo_hi_writeq(reg_value,
+chip->apb_regs + DMAC_APB_HW_HS_SEL_0);
+   break;
+   }
+   }
+
+   return 0;
+}
+
 /*
  * If DW_axi_dmac sees CHx_CTL.ShadowReg_Or_LLI_Last bit of the fetched LLI
  * as 1, it understands that the current block is the final block in the
@@ -626,6 +668,9 @@ dw_axi_dma_chan_prep_cyclic(struct dma_chan *dchan, 
dma_addr_t dma_addr,
llp = hw_desc->llp;
} while (num_periods);
 
+   if (dw_axi_dma_set_hw_channel(chan->chip, chan->hw_handshake_num, true))
+   goto err_desc_get;
+
return vchan_tx_prep(>vc, >vd, flags);
 
 err_desc_get:
@@ -684,6 +729,9 @@ dw_axi_dma_chan_prep_slave_sg(struct dma_chan *dchan, 
struct scatterlist *sgl,
llp = hw_desc->llp;
} while (sg_len);
 
+   if (dw_axi_dma_set_hw_channel(chan->chip, chan->hw_handshake_num, true))
+   goto err_desc_get;
+
return vchan_tx_prep(>vc, >vd, flags);
 
 err_desc_get:
@@ -959,6 +1007,10 @@ static int dma_chan_terminate_all(struct dma_chan *dchan)
dev_warn(dchan2dev(dchan),
 "%s failed to stop\n", axi_chan_name(chan));
 
+   if (chan->direction != DMA_MEM_TO_MEM)
+   dw_axi_dma_set_hw_channel(chan->chip,
+ chan->hw_handshake_num, false);
+
spin_lock_irqsave(>vc.lock, flags);
 
vchan_get_all_descriptors(>vc, );
-- 
2.18.0

[PATCH v8 15/16] dmaengine: dw-axi-dmac: Set constraint to the Max segment size

Add support for DMA Scatter-Gather (SG) constraint so that DMA clients can
handle the AxiDMA limitation.

Without supporting DMA constraint the default Max segment size reported by
dmaengine is 64KB, which is not supported by Intel KeemBay AxiDMA.

Reviewed-by: Andy Shevchenko 
Signed-off-by: Sia Jee Heng 
---
 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 8 
 drivers/dma/dw-axi-dmac/dw-axi-dmac.h  | 1 +
 2 files changed, 9 insertions(+)

diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c 
b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index ab145a84b0c0..58845b058d9d 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1350,6 +1351,13 @@ static int dw_probe(struct platform_device *pdev)
dw->dma.device_prep_slave_sg = dw_axi_dma_chan_prep_slave_sg;
dw->dma.device_prep_dma_cyclic = dw_axi_dma_chan_prep_cyclic;
 
+   /*
+* Synopsis DesignWare AxiDMA datasheet mentioned Maximum
+* supported blocks is 1024. Device register width is 4 bytes.
+* Therefore, set constraint to 1024 * 4.
+*/
+   dw->dma.dev->dma_parms = >dma_parms;
+   dma_set_max_seg_size(>dev, MAX_BLOCK_SIZE);
platform_set_drvdata(pdev, chip);
 
pm_runtime_enable(chip->dev);
diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h 
b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
index 3a357f7fda02..1e937ea2a96d 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
@@ -54,6 +54,7 @@ struct axi_dma_chan {
 struct dw_axi_dma {
struct dma_device   dma;
struct dw_axi_dma_hcfg  *hdata;
+   struct device_dma_parametersdma_parms;
 
/* channels */
struct axi_dma_chan *chan;
-- 
2.18.0

[PATCH v8 16/16] dmaengine: dw-axi-dmac: Virtually split the linked-list

AxiDMA driver exposed the dma_set_max_seg_size() to the DMAENGINE.
It shall helps the DMA clients to create size-optimized linked-list
for the controller.

However, there are certain situations where DMA client might not be
abled to benefit from the dma_get_max_seg_size() if the segment size
can't meet the nature of the DMA client's operation.

In the case of ALSA operation, ALSA application and driver expecting
to run in a period of larger than 10ms regardless of the bit depth.
With this large period, there is a strong request to split the linked-list
in the AxiDMA driver.

Signed-off-by: Sia Jee Heng 
---
 .../dma/dw-axi-dmac/dw-axi-dmac-platform.c| 111 ++
 drivers/dma/dw-axi-dmac/dw-axi-dmac.h |   1 +
 2 files changed, 92 insertions(+), 20 deletions(-)

diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c 
b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index 58845b058d9d..c17b96245f13 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -576,6 +576,11 @@ static int dw_axi_dma_set_hw_desc(struct axi_dma_chan 
*chan,
if (mem_width > DWAXIDMAC_TRANS_WIDTH_32)
mem_width = DWAXIDMAC_TRANS_WIDTH_32;
 
+   if (!IS_ALIGNED(mem_addr, 4)) {
+   dev_err(chan->chip->dev, "invalid buffer alignment\n");
+   return -EINVAL;
+   }
+
switch (chan->direction) {
case DMA_MEM_TO_DEV:
reg_width = __ffs(chan->config.dst_addr_width);
@@ -637,6 +642,35 @@ static int dw_axi_dma_set_hw_desc(struct axi_dma_chan 
*chan,
return 0;
 }
 
+static size_t calculate_block_len(struct axi_dma_chan *chan,
+ dma_addr_t dma_addr, size_t buf_len,
+ enum dma_transfer_direction direction)
+{
+   u32 data_width, reg_width, mem_width;
+   size_t axi_block_ts, block_len;
+
+   axi_block_ts = chan->chip->dw->hdata->block_size[chan->id];
+
+   switch (direction) {
+   case DMA_MEM_TO_DEV:
+   data_width = BIT(chan->chip->dw->hdata->m_data_width);
+   mem_width = __ffs(data_width | dma_addr | buf_len);
+   if (mem_width > DWAXIDMAC_TRANS_WIDTH_32)
+   mem_width = DWAXIDMAC_TRANS_WIDTH_32;
+
+   block_len = axi_block_ts << mem_width;
+   break;
+   case DMA_DEV_TO_MEM:
+   reg_width = __ffs(chan->config.src_addr_width);
+   block_len = axi_block_ts << reg_width;
+   break;
+   default:
+   block_len = 0;
+   }
+
+   return block_len;
+}
+
 static struct dma_async_tx_descriptor *
 dw_axi_dma_chan_prep_cyclic(struct dma_chan *dchan, dma_addr_t dma_addr,
size_t buf_len, size_t period_len,
@@ -647,13 +681,27 @@ dw_axi_dma_chan_prep_cyclic(struct dma_chan *dchan, 
dma_addr_t dma_addr,
struct axi_dma_hw_desc *hw_desc = NULL;
struct axi_dma_desc *desc = NULL;
dma_addr_t src_addr = dma_addr;
-   u32 num_periods = buf_len / period_len;
+   u32 num_periods, num_segments;
+   size_t axi_block_len;
+   u32 total_segments;
+   u32 segment_len;
unsigned int i;
int status;
u64 llp = 0;
u8 lms = 0; /* Select AXI0 master for LLI fetching */
 
-   desc = axi_desc_alloc(num_periods);
+   num_periods = buf_len / period_len;
+
+   axi_block_len = calculate_block_len(chan, dma_addr, buf_len, direction);
+   if (axi_block_len == 0)
+   return NULL;
+
+   num_segments = DIV_ROUND_UP(period_len, axi_block_len);
+   segment_len = DIV_ROUND_UP(period_len, num_segments);
+
+   total_segments = num_periods * num_segments;
+
+   desc = axi_desc_alloc(total_segments);
if (unlikely(!desc))
goto err_desc_get;
 
@@ -661,12 +709,13 @@ dw_axi_dma_chan_prep_cyclic(struct dma_chan *dchan, 
dma_addr_t dma_addr,
desc->chan = chan;
chan->cyclic = true;
desc->length = 0;
+   desc->period_len = period_len;
 
-   for (i = 0; i < num_periods; i++) {
+   for (i = 0; i < total_segments; i++) {
hw_desc = >hw_desc[i];
 
status = dw_axi_dma_set_hw_desc(chan, hw_desc, src_addr,
-   period_len);
+   segment_len);
if (status < 0)
goto err_desc_get;
 
@@ -676,17 +725,17 @@ dw_axi_dma_chan_prep_cyclic(struct dma_chan *dchan, 
dma_addr_t dma_addr,
 */
set_desc_last(hw_desc);
 
-   src_addr += period_len;
+   src_addr += segment_len;
}
 
llp = desc->hw_desc[0].llp;
 
/* Managed transfer list */
do {
-   hw_desc = >hw_desc[--num_periods];
+   hw_desc = >hw_desc[--total_segments];
write_desc_llp(hw_desc,

[PATCH v8 12/16] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA support

Add support for Intel KeemBay AxiDMA to the .compatible field.
The AxiDMA Apb region will be accessible if the compatible string
matches the "intel,kmb-axi-dma".

Reviewed-by: Andy Shevchenko 
Signed-off-by: Sia Jee Heng 
---
 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c 
b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index 830d3de76abd..062d27c61983 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -1160,6 +1160,7 @@ static int parse_device_properties(struct axi_dma_chip 
*chip)
 
 static int dw_probe(struct platform_device *pdev)
 {
+   struct device_node *node = pdev->dev.of_node;
struct axi_dma_chip *chip;
struct resource *mem;
struct dw_axi_dma *dw;
@@ -1192,6 +1193,12 @@ static int dw_probe(struct platform_device *pdev)
if (IS_ERR(chip->regs))
return PTR_ERR(chip->regs);
 
+   if (of_device_is_compatible(node, "intel,kmb-axi-dma")) {
+   chip->apb_regs = devm_platform_ioremap_resource(pdev, 1);
+   if (IS_ERR(chip->apb_regs))
+   return PTR_ERR(chip->apb_regs);
+   }
+
chip->core_clk = devm_clk_get(chip->dev, "core-clk");
if (IS_ERR(chip->core_clk))
return PTR_ERR(chip->core_clk);
@@ -1336,6 +1343,7 @@ static const struct dev_pm_ops dw_axi_dma_pm_ops = {
 
 static const struct of_device_id dw_dma_of_id_table[] = {
{ .compatible = "snps,axi-dma-1.01a" },
+   { .compatible = "intel,kmb-axi-dma" },
{}
 };
 MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
-- 
2.18.0

[PATCH v8 14/16] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA BYTE and HALFWORD registers

Add support for Intel KeemBay AxiDMA BYTE and HALFWORD registers
programming.

Intel KeemBay AxiDMA supports data transfer between device to memory
and memory to device operations.

This code is needed by I2C, I3C, I2S, SPI and UART which uses FIFO
size of 8bits and 16bits to perform memory to device data transfer
operation. 0-padding functionality is provided to avoid
pre-processing of data on CPU.

Reviewed-by: Andy Shevchenko 
Signed-off-by: Sia Jee Heng 
---
 .../dma/dw-axi-dmac/dw-axi-dmac-platform.c| 44 ---
 1 file changed, 39 insertions(+), 5 deletions(-)

diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c 
b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index 5e77eb3d040f..ab145a84b0c0 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -312,7 +312,7 @@ static void axi_chan_block_xfer_start(struct axi_dma_chan 
*chan,
  struct axi_dma_desc *first)
 {
u32 priority = chan->chip->dw->hdata->priority[chan->id];
-   u32 reg, irq_mask;
+   u32 reg, irq_mask, reg_width, offset, val;
u8 lms = 0; /* Select AXI0 master for LLI fetching */
 
if (unlikely(axi_chan_is_hw_enable(chan))) {
@@ -334,6 +334,25 @@ static void axi_chan_block_xfer_start(struct axi_dma_chan 
*chan,
   DWAXIDMAC_HS_SEL_HW << CH_CFG_H_HS_SEL_SRC_POS);
switch (chan->direction) {
case DMA_MEM_TO_DEV:
+   if (chan->chip->apb_regs) {
+   reg_width = __ffs(chan->config.dst_addr_width);
+   /*
+* Configure Byte and Halfword register
+* for MEM_TO_DEV only.
+*/
+   if (reg_width == DWAXIDMAC_TRANS_WIDTH_16) {
+   offset = DMAC_APB_HALFWORD_WR_CH_EN;
+   val = ioread32(chan->chip->apb_regs + offset);
+   val |= BIT(chan->id);
+   iowrite32(val, chan->chip->apb_regs + offset);
+   } else if (reg_width == DWAXIDMAC_TRANS_WIDTH_8) {
+   offset = DMAC_APB_BYTE_WR_CH_EN;
+   val = ioread32(chan->chip->apb_regs + offset);
+   val |= BIT(chan->id);
+   iowrite32(val, chan->chip->apb_regs + offset);
+   }
+   }
+
reg |= (chan->config.device_fc ?
DWAXIDMAC_TT_FC_MEM_TO_PER_DST :
DWAXIDMAC_TT_FC_MEM_TO_PER_DMAC)
@@ -994,8 +1013,9 @@ static int dma_chan_terminate_all(struct dma_chan *dchan)
 {
struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan);
u32 chan_active = BIT(chan->id) << DMAC_CHAN_EN_SHIFT;
+   u32 reg_width = __ffs(chan->config.dst_addr_width);
unsigned long flags;
-   u32 val;
+   u32 offset, val;
int ret;
LIST_HEAD(head);
 
@@ -1007,9 +1027,23 @@ static int dma_chan_terminate_all(struct dma_chan *dchan)
dev_warn(dchan2dev(dchan),
 "%s failed to stop\n", axi_chan_name(chan));
 
-   if (chan->direction != DMA_MEM_TO_MEM)
-   dw_axi_dma_set_hw_channel(chan->chip,
- chan->hw_handshake_num, false);
+   if (chan->direction != DMA_MEM_TO_MEM) {
+   ret = dw_axi_dma_set_hw_channel(chan->chip,
+   chan->hw_handshake_num, false);
+   if (ret == 0 && chan->direction == DMA_MEM_TO_DEV) {
+   if (reg_width == DWAXIDMAC_TRANS_WIDTH_8) {
+   offset = DMAC_APB_BYTE_WR_CH_EN;
+   val = ioread32(chan->chip->apb_regs + offset);
+   val &= ~BIT(chan->id);
+   iowrite32(val, chan->chip->apb_regs + offset);
+   } else if (reg_width == DWAXIDMAC_TRANS_WIDTH_16) {
+   offset = DMAC_APB_HALFWORD_WR_CH_EN;
+   val = ioread32(chan->chip->apb_regs + offset);
+   val &= ~BIT(chan->id);
+   iowrite32(val, chan->chip->apb_regs + offset);
+   }
+   }
+   }
 
spin_lock_irqsave(>vc.lock, flags);
 
-- 
2.18.0

[PATCH v8 11/16] dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields

Add support for Intel KeemBay DMA registers. These registers are required
to run data transfer between device to memory and memory to device on Intel
KeemBay SoC.

Reviewed-by: Andy Shevchenko 
Signed-off-by: Sia Jee Heng 
---
 drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h 
b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
index 46baf93de617..3a357f7fda02 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
@@ -63,6 +63,7 @@ struct axi_dma_chip {
struct device   *dev;
int irq;
void __iomem*regs;
+   void __iomem*apb_regs;
struct clk  *core_clk;
struct clk  *cfgr_clk;
struct dw_axi_dma   *dw;
@@ -169,6 +170,19 @@ static inline struct axi_dma_chan 
*dchan_to_axi_dma_chan(struct dma_chan *dchan)
 #define CH_INTSIGNAL_ENA   0x090 /* R/W Chan Interrupt Signal Enable */
 #define CH_INTCLEAR0x098 /* W Chan Interrupt Clear */
 
+/* These Apb registers are used by Intel KeemBay SoC */
+#define DMAC_APB_CFG   0x000 /* DMAC Apb Configuration Register */
+#define DMAC_APB_STAT  0x004 /* DMAC Apb Status Register */
+#define DMAC_APB_DEBUG_STAT_0  0x008 /* DMAC Apb Debug Status Register 0 */
+#define DMAC_APB_DEBUG_STAT_1  0x00C /* DMAC Apb Debug Status Register 1 */
+#define DMAC_APB_HW_HS_SEL_0   0x010 /* DMAC Apb HW HS register 0 */
+#define DMAC_APB_HW_HS_SEL_1   0x014 /* DMAC Apb HW HS register 1 */
+#define DMAC_APB_LPI   0x018 /* DMAC Apb Low Power Interface Reg */
+#define DMAC_APB_BYTE_WR_CH_EN 0x01C /* DMAC Apb Byte Write Enable */
+#define DMAC_APB_HALFWORD_WR_CH_EN 0x020 /* DMAC Halfword write enables */
+
+#define UNUSED_CHANNEL 0x3F /* Set unused DMA channel to 0x3F */
+#define MAX_BLOCK_SIZE 0x1000 /* 1024 blocks * 4 bytes data width */
 
 /* DMAC_CFG */
 #define DMAC_EN_POS0
-- 
2.18.0

[PATCH v8 10/16] dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA

Add support for Intel KeemBay AxiDMA to the dw-axi-dmac
Schemas DT binding.

Signed-off-by: Sia Jee Heng 
Reviewed-by: Rob Herring 
---
 Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml | 5 +
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml 
b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
index 3d2515463d56..79e241498e25 100644
--- a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
+++ b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
@@ -8,6 +8,7 @@ title: Synopsys DesignWare AXI DMA Controller
 
 maintainers:
   - Eugeniy Paltsev 
+  - Jee Heng Sia 
 
 description:
   Synopsys DesignWare AXI DMA Controller DT Binding
@@ -19,14 +20,18 @@ properties:
   compatible:
 enum:
   - snps,axi-dma-1.01a
+  - intel,kmb-axi-dma
 
   reg:
+minItems: 1
 items:
   - description: Address range of the DMAC registers
+  - description: Address range of the DMAC APB registers
 
   reg-names:
 items:
   - const: axidma_ctrl_regs
+  - const: axidma_apb_regs
 
   interrupts:
 maxItems: 1
-- 
2.18.0

[PATCH v8 08/16] dmaengine: dw-axi-dmac: Support of_dma_controller_register()

Add support for of_dma_controller_register() so that DMA clients
can pass in device handshake number to the AxiDMA driver.

DMA clients shall code the device handshake number in the Device tree.
When DMA activities are needed, DMA clients shall invoke OF helper
function to pass in the device handshake number to the AxiDMA.

Without register to the of_dma_controller_register(), data transfer
between memory to device and device to memory operations would failed.

Reviewed-by: Andy Shevchenko 
Signed-off-by: Sia Jee Heng 
---
 .../dma/dw-axi-dmac/dw-axi-dmac-platform.c| 26 +++
 drivers/dma/dw-axi-dmac/dw-axi-dmac.h |  1 +
 2 files changed, 27 insertions(+)

diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c 
b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index a76299360f69..a8b6c8c8ef58 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1044,6 +1045,22 @@ static int __maybe_unused axi_dma_runtime_resume(struct 
device *dev)
return axi_dma_resume(chip);
 }
 
+static struct dma_chan *dw_axi_dma_of_xlate(struct of_phandle_args *dma_spec,
+   struct of_dma *ofdma)
+{
+   struct dw_axi_dma *dw = ofdma->of_dma_data;
+   struct axi_dma_chan *chan;
+   struct dma_chan *dchan;
+
+   dchan = dma_get_any_slave_channel(>dma);
+   if (!dchan)
+   return NULL;
+
+   chan = dchan_to_axi_dma_chan(dchan);
+   chan->hw_handshake_num = dma_spec->args[0];
+   return dchan;
+}
+
 static int parse_device_properties(struct axi_dma_chip *chip)
 {
struct device *dev = chip->dev;
@@ -1233,6 +1250,13 @@ static int dw_probe(struct platform_device *pdev)
if (ret)
goto err_pm_disable;
 
+   /* Register with OF helpers for DMA lookups */
+   ret = of_dma_controller_register(pdev->dev.of_node,
+dw_axi_dma_of_xlate, dw);
+   if (ret < 0)
+   dev_warn(>dev,
+"Failed to register OF DMA controller, fallback to 
MEM_TO_MEM mode\n");
+
dev_info(chip->dev, "DesignWare AXI DMA Controller, %d channels\n",
 dw->hdata->nr_channels);
 
@@ -1266,6 +1290,8 @@ static int dw_remove(struct platform_device *pdev)
 
devm_free_irq(chip->dev, chip->irq, chip);
 
+   of_dma_controller_free(chip->dev->of_node);
+
list_for_each_entry_safe(chan, _chan, >dma.channels,
vc.chan.device_node) {
list_del(>vc.chan.device_node);
diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h 
b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
index a26b0a242a93..3498bef5453b 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
@@ -37,6 +37,7 @@ struct axi_dma_chan {
struct axi_dma_chip *chip;
void __iomem*chan_regs;
u8  id;
+   u8  hw_handshake_num;
atomic_tdescs_allocated;
 
struct dma_pool *desc_pool;
-- 
2.18.0

[PATCH v8 09/16] dmaengine: dw-axi-dmac: Support burst residue granularity

Add support for DMA_RESIDUE_GRANULARITY_BURST so that AxiDMA can report
DMA residue.

Existing AxiDMA driver only support data transfer between
memory to memory operation, therefore reporting DMA residue
to the DMA clients is not supported.

Reporting DMA residue to the DMA clients is important as DMA clients
shall invoke dmaengine_tx_status() to understand the number of bytes
been transferred so that the buffer pointer can be updated accordingly.

Reviewed-by: Andy Shevchenko 
Signed-off-by: Sia Jee Heng 
---
 .../dma/dw-axi-dmac/dw-axi-dmac-platform.c| 43 ---
 drivers/dma/dw-axi-dmac/dw-axi-dmac.h |  2 +
 2 files changed, 38 insertions(+), 7 deletions(-)

diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c 
b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index a8b6c8c8ef58..830d3de76abd 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -265,14 +265,36 @@ dma_chan_tx_status(struct dma_chan *dchan, dma_cookie_t 
cookie,
  struct dma_tx_state *txstate)
 {
struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan);
-   enum dma_status ret;
+   struct virt_dma_desc *vdesc;
+   enum dma_status status;
+   u32 completed_length;
+   unsigned long flags;
+   u32 completed_blocks;
+   size_t bytes = 0;
+   u32 length;
+   u32 len;
 
-   ret = dma_cookie_status(dchan, cookie, txstate);
+   status = dma_cookie_status(dchan, cookie, txstate);
+   if (status == DMA_COMPLETE || !txstate)
+   return status;
 
-   if (chan->is_paused && ret == DMA_IN_PROGRESS)
-   ret = DMA_PAUSED;
+   spin_lock_irqsave(>vc.lock, flags);
 
-   return ret;
+   vdesc = vchan_find_desc(>vc, cookie);
+   if (vdesc) {
+   length = vd_to_axi_desc(vdesc)->length;
+   completed_blocks = vd_to_axi_desc(vdesc)->completed_blocks;
+   len = vd_to_axi_desc(vdesc)->hw_desc[0].len;
+   completed_length = completed_blocks * len;
+   bytes = length - completed_length;
+   } else {
+   bytes = vd_to_axi_desc(vdesc)->length;
+   }
+
+   spin_unlock_irqrestore(>vc.lock, flags);
+   dma_set_residue(txstate, bytes);
+
+   return status;
 }
 
 static void write_desc_llp(struct axi_dma_hw_desc *desc, dma_addr_t adr)
@@ -549,6 +571,7 @@ static int dw_axi_dma_set_hw_desc(struct axi_dma_chan *chan,
 
set_desc_src_master(hw_desc);
 
+   hw_desc->len = len;
return 0;
 }
 
@@ -575,6 +598,7 @@ dw_axi_dma_chan_prep_cyclic(struct dma_chan *dchan, 
dma_addr_t dma_addr,
chan->direction = direction;
desc->chan = chan;
chan->cyclic = true;
+   desc->length = 0;
 
for (i = 0; i < num_periods; i++) {
hw_desc = >hw_desc[i];
@@ -584,6 +608,7 @@ dw_axi_dma_chan_prep_cyclic(struct dma_chan *dchan, 
dma_addr_t dma_addr,
if (status < 0)
goto err_desc_get;
 
+   desc->length += hw_desc->len;
/* Set end-of-link to the linked descriptor, so that cyclic
 * callback function can be triggered during interrupt.
 */
@@ -636,6 +661,7 @@ dw_axi_dma_chan_prep_slave_sg(struct dma_chan *dchan, 
struct scatterlist *sgl,
goto err_desc_get;
 
desc->chan = chan;
+   desc->length = 0;
 
for_each_sg(sgl, sg, sg_len, i) {
mem = sg_dma_address(sg);
@@ -645,6 +671,7 @@ dw_axi_dma_chan_prep_slave_sg(struct dma_chan *dchan, 
struct scatterlist *sgl,
status = dw_axi_dma_set_hw_desc(chan, hw_desc, mem, len);
if (status < 0)
goto err_desc_get;
+   desc->length += hw_desc->len;
}
 
/* Set end-of-link to the last link descriptor of list */
@@ -690,6 +717,7 @@ dma_chan_prep_dma_memcpy(struct dma_chan *dchan, dma_addr_t 
dst_adr,
 
desc->chan = chan;
num = 0;
+   desc->length = 0;
while (len) {
xfer_len = len;
 
@@ -742,7 +770,8 @@ dma_chan_prep_dma_memcpy(struct dma_chan *dchan, dma_addr_t 
dst_adr,
set_desc_src_master(hw_desc);
set_desc_dest_master(hw_desc, desc);
 
-
+   hw_desc->len = xfer_len;
+   desc->length += hw_desc->len;
/* update the length and addresses for the next loop cycle */
len -= xfer_len;
dst_adr += xfer_len;
@@ -1210,7 +1239,7 @@ static int dw_probe(struct platform_device *pdev)
dw->dma.dst_addr_widths = AXI_DMA_BUSWIDTHS;
dw->dma.directions = BIT(DMA_MEM_TO_MEM);
dw->dma.directions |= BIT(DMA_MEM_TO_DEV) | BIT(DMA_DEV_TO_MEM);
-   dw->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_DESCRIPTOR;
+   dw->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
 
dw->dma.dev = chip->dev;

[PATCH v8 07/16] dmaegine: dw-axi-dmac: Support device_prep_dma_cyclic()

Add support for device_prep_dma_cyclic() callback function to benefit
DMA cyclic client, for example ALSA.

Existing AxiDMA driver only support data transfer between memory to memory.
Data transfer between device to memory and memory to device in cyclic mode
would failed if this interface is not supported by the AxiDMA driver.

Reviewed-by: Andy Shevchenko 
Signed-off-by: Sia Jee Heng 
---
 .../dma/dw-axi-dmac/dw-axi-dmac-platform.c| 111 --
 drivers/dma/dw-axi-dmac/dw-axi-dmac.h |   2 +
 2 files changed, 106 insertions(+), 7 deletions(-)

diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c 
b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index 7ff30b0f44ed..a76299360f69 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -15,6 +15,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -549,6 +551,64 @@ static int dw_axi_dma_set_hw_desc(struct axi_dma_chan 
*chan,
return 0;
 }
 
+static struct dma_async_tx_descriptor *
+dw_axi_dma_chan_prep_cyclic(struct dma_chan *dchan, dma_addr_t dma_addr,
+   size_t buf_len, size_t period_len,
+   enum dma_transfer_direction direction,
+   unsigned long flags)
+{
+   struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan);
+   struct axi_dma_hw_desc *hw_desc = NULL;
+   struct axi_dma_desc *desc = NULL;
+   dma_addr_t src_addr = dma_addr;
+   u32 num_periods = buf_len / period_len;
+   unsigned int i;
+   int status;
+   u64 llp = 0;
+   u8 lms = 0; /* Select AXI0 master for LLI fetching */
+
+   desc = axi_desc_alloc(num_periods);
+   if (unlikely(!desc))
+   goto err_desc_get;
+
+   chan->direction = direction;
+   desc->chan = chan;
+   chan->cyclic = true;
+
+   for (i = 0; i < num_periods; i++) {
+   hw_desc = >hw_desc[i];
+
+   status = dw_axi_dma_set_hw_desc(chan, hw_desc, src_addr,
+   period_len);
+   if (status < 0)
+   goto err_desc_get;
+
+   /* Set end-of-link to the linked descriptor, so that cyclic
+* callback function can be triggered during interrupt.
+*/
+   set_desc_last(hw_desc);
+
+   src_addr += period_len;
+   }
+
+   llp = desc->hw_desc[0].llp;
+
+   /* Managed transfer list */
+   do {
+   hw_desc = >hw_desc[--num_periods];
+   write_desc_llp(hw_desc, llp | lms);
+   llp = hw_desc->llp;
+   } while (num_periods);
+
+   return vchan_tx_prep(>vc, >vd, flags);
+
+err_desc_get:
+   if (desc)
+   axi_desc_put(desc);
+
+   return NULL;
+}
+
 static struct dma_async_tx_descriptor *
 dw_axi_dma_chan_prep_slave_sg(struct dma_chan *dchan, struct scatterlist *sgl,
  unsigned int sg_len,
@@ -773,8 +833,13 @@ static noinline void axi_chan_handle_err(struct 
axi_dma_chan *chan, u32 status)
 
 static void axi_chan_block_xfer_complete(struct axi_dma_chan *chan)
 {
+   int count = atomic_read(>descs_allocated);
+   struct axi_dma_hw_desc *hw_desc;
+   struct axi_dma_desc *desc;
struct virt_dma_desc *vd;
unsigned long flags;
+   u64 llp;
+   int i;
 
spin_lock_irqsave(>vc.lock, flags);
if (unlikely(axi_chan_is_hw_enable(chan))) {
@@ -785,12 +850,32 @@ static void axi_chan_block_xfer_complete(struct 
axi_dma_chan *chan)
 
/* The completed descriptor currently is in the head of vc list */
vd = vchan_next_desc(>vc);
-   /* Remove the completed descriptor from issued list before completing */
-   list_del(>node);
-   vchan_cookie_complete(vd);
 
-   /* Submit queued descriptors after processing the completed ones */
-   axi_chan_start_first_queued(chan);
+   if (chan->cyclic) {
+   vchan_cyclic_callback(vd);
+   desc = vd_to_axi_desc(vd);
+   if (desc) {
+   llp = lo_hi_readq(chan->chan_regs + CH_LLP);
+   for (i = 0; i < count; i++) {
+   hw_desc = >hw_desc[i];
+   if (hw_desc->llp == llp) {
+   axi_chan_irq_clear(chan, 
hw_desc->lli->status_lo);
+   hw_desc->lli->ctl_hi |= 
CH_CTL_H_LLI_VALID;
+   desc->completed_blocks = i;
+   break;
+   }
+   }
+
+   axi_chan_enable(chan);
+   }
+   } else {
+   /* Remove the completed descriptor from issued list before 
completing */
+   list_del(>node);
+   vchan_cookie_complete(vd);
+
+

[PATCH v8 06/16] dmaengine: dw-axi-dmac: Support device_prep_slave_sg

Add device_prep_slave_sg() callback function so that DMA_MEM_TO_DEV
and DMA_DEV_TO_MEM operations in single mode can be supported.

Existing AxiDMA driver only support data transfer between
memory to memory. Data transfer between device to memory and
memory to device in single mode would failed if this interface
is not supported by the AxiDMA driver.

Reviewed-by: Andy Shevchenko 
Signed-off-by: Sia Jee Heng 
---
 .../dma/dw-axi-dmac/dw-axi-dmac-platform.c| 154 ++
 drivers/dma/dw-axi-dmac/dw-axi-dmac.h |   1 +
 2 files changed, 155 insertions(+)

diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c 
b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index eaa7c4c404ca..7ff30b0f44ed 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -307,6 +307,22 @@ static void axi_chan_block_xfer_start(struct axi_dma_chan 
*chan,
   priority << CH_CFG_H_PRIORITY_POS |
   DWAXIDMAC_HS_SEL_HW << CH_CFG_H_HS_SEL_DST_POS |
   DWAXIDMAC_HS_SEL_HW << CH_CFG_H_HS_SEL_SRC_POS);
+   switch (chan->direction) {
+   case DMA_MEM_TO_DEV:
+   reg |= (chan->config.device_fc ?
+   DWAXIDMAC_TT_FC_MEM_TO_PER_DST :
+   DWAXIDMAC_TT_FC_MEM_TO_PER_DMAC)
+   << CH_CFG_H_TT_FC_POS;
+   break;
+   case DMA_DEV_TO_MEM:
+   reg |= (chan->config.device_fc ?
+   DWAXIDMAC_TT_FC_PER_TO_MEM_SRC :
+   DWAXIDMAC_TT_FC_PER_TO_MEM_DMAC)
+   << CH_CFG_H_TT_FC_POS;
+   break;
+   default:
+   break;
+   }
axi_chan_iowrite32(chan, CH_CFG_H, reg);
 
write_chan_llp(chan, first->hw_desc[0].llp | lms);
@@ -454,6 +470,141 @@ static void set_desc_dest_master(struct axi_dma_hw_desc 
*hw_desc,
hw_desc->lli->ctl_lo = cpu_to_le32(val);
 }
 
+static int dw_axi_dma_set_hw_desc(struct axi_dma_chan *chan,
+ struct axi_dma_hw_desc *hw_desc,
+ dma_addr_t mem_addr, size_t len)
+{
+   unsigned int data_width = BIT(chan->chip->dw->hdata->m_data_width);
+   unsigned int reg_width;
+   unsigned int mem_width;
+   dma_addr_t device_addr;
+   size_t axi_block_ts;
+   size_t block_ts;
+   u32 ctllo, ctlhi;
+   u32 burst_len;
+
+   axi_block_ts = chan->chip->dw->hdata->block_size[chan->id];
+
+   mem_width = __ffs(data_width | mem_addr | len);
+   if (mem_width > DWAXIDMAC_TRANS_WIDTH_32)
+   mem_width = DWAXIDMAC_TRANS_WIDTH_32;
+
+   switch (chan->direction) {
+   case DMA_MEM_TO_DEV:
+   reg_width = __ffs(chan->config.dst_addr_width);
+   device_addr = chan->config.dst_addr;
+   ctllo = reg_width << CH_CTL_L_DST_WIDTH_POS |
+   mem_width << CH_CTL_L_SRC_WIDTH_POS |
+   DWAXIDMAC_CH_CTL_L_NOINC << CH_CTL_L_DST_INC_POS |
+   DWAXIDMAC_CH_CTL_L_INC << CH_CTL_L_SRC_INC_POS;
+   block_ts = len >> mem_width;
+   break;
+   case DMA_DEV_TO_MEM:
+   reg_width = __ffs(chan->config.src_addr_width);
+   device_addr = chan->config.src_addr;
+   ctllo = reg_width << CH_CTL_L_SRC_WIDTH_POS |
+   mem_width << CH_CTL_L_DST_WIDTH_POS |
+   DWAXIDMAC_CH_CTL_L_INC << CH_CTL_L_DST_INC_POS |
+   DWAXIDMAC_CH_CTL_L_NOINC << CH_CTL_L_SRC_INC_POS;
+   block_ts = len >> reg_width;
+   break;
+   default:
+   return -EINVAL;
+   }
+
+   if (block_ts > axi_block_ts)
+   return -EINVAL;
+
+   hw_desc->lli = axi_desc_get(chan, _desc->llp);
+   if (unlikely(!hw_desc->lli))
+   return -ENOMEM;
+
+   ctlhi = CH_CTL_H_LLI_VALID;
+
+   if (chan->chip->dw->hdata->restrict_axi_burst_len) {
+   burst_len = chan->chip->dw->hdata->axi_rw_burst_len;
+   ctlhi |= CH_CTL_H_ARLEN_EN | CH_CTL_H_AWLEN_EN |
+burst_len << CH_CTL_H_ARLEN_POS |
+burst_len << CH_CTL_H_AWLEN_POS;
+   }
+
+   hw_desc->lli->ctl_hi = cpu_to_le32(ctlhi);
+
+   if (chan->direction == DMA_MEM_TO_DEV) {
+   write_desc_sar(hw_desc, mem_addr);
+   write_desc_dar(hw_desc, device_addr);
+   } else {
+   write_desc_sar(hw_desc, device_addr);
+   write_desc_dar(hw_desc, mem_addr);
+   }
+
+   hw_desc->lli->block_ts_lo = cpu_to_le32(block_ts - 1);
+
+   ctllo |= DWAXIDMAC_BURST_TRANS_LEN_4 << CH_CTL_L_DST_MSIZE_POS |
+DWAXIDMAC_BURST_TRANS_LEN_4 << CH_CTL_L_SRC_MSIZE_POS;
+   hw_desc->lli->ctl_lo = cpu_to_le32(ctllo);
+
+   set_desc_src_master(hw_desc);
+
+   return 0;
+}
+
+static struct

[PATCH v8 05/16] dmaengine: dw-axi-dmac: Add device_config operation

Add device_config() callback function so that the device address
can be passed to the dma driver.

DMA clients use this interface to pass in the device address to the
AxiDMA. Without this interface, data transfer between device to memory
and memory to device would failed.

Reviewed-by: Andy Shevchenko 
Signed-off-by: Sia Jee Heng 
---
 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 11 +++
 drivers/dma/dw-axi-dmac/dw-axi-dmac.h  |  1 +
 2 files changed, 12 insertions(+)

diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c 
b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index 241ab7a24e2a..eaa7c4c404ca 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -559,6 +559,16 @@ dma_chan_prep_dma_memcpy(struct dma_chan *dchan, 
dma_addr_t dst_adr,
return NULL;
 }
 
+static int dw_axi_dma_chan_slave_config(struct dma_chan *dchan,
+   struct dma_slave_config *config)
+{
+   struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan);
+
+   memcpy(>config, config, sizeof(*config));
+
+   return 0;
+}
+
 static void axi_chan_dump_lli(struct axi_dma_chan *chan,
  struct axi_dma_hw_desc *desc)
 {
@@ -948,6 +958,7 @@ static int dw_probe(struct platform_device *pdev)
 
dw->dma.device_prep_dma_memcpy = dma_chan_prep_dma_memcpy;
dw->dma.device_synchronize = dw_axi_dma_synchronize;
+   dw->dma.device_config = dw_axi_dma_chan_slave_config;
 
platform_set_drvdata(pdev, chip);
 
diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h 
b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
index f886b2bb75de..a75b921d6b1a 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
@@ -43,6 +43,7 @@ struct axi_dma_chan {
struct virt_dma_chanvc;
 
struct axi_dma_desc *desc;
+   struct dma_slave_config config;
/* these other elements are all protected by vc.lock */
boolis_paused;
 };
-- 
2.18.0

[PATCH v8 03/16] dmaengine: dw-axi-dmac: move dma_pool_create() to alloc_chan_resources()

The DMA memory block is created at driver load time and exist for
device lifetime. Move the dma_pool_create() to the ->chan_resource()
callback function allowing the DMA memory blocks to be created as needed
and destroyed when the channel is freed.

Reviewed-by: Andy Shevchenko 
Signed-off-by: Sia Jee Heng 
---
 .../dma/dw-axi-dmac/dw-axi-dmac-platform.c| 24 ++-
 drivers/dma/dw-axi-dmac/dw-axi-dmac.h |  2 +-
 2 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c 
b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index 350968baaf88..3737e1c3c793 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -216,11 +216,10 @@ static struct axi_dma_desc *axi_desc_alloc(u32 num)
 static struct axi_dma_lli *axi_desc_get(struct axi_dma_chan *chan,
dma_addr_t *addr)
 {
-   struct dw_axi_dma *dw = chan->chip->dw;
struct axi_dma_lli *lli;
dma_addr_t phys;
 
-   lli = dma_pool_zalloc(dw->desc_pool, GFP_NOWAIT, );
+   lli = dma_pool_zalloc(chan->desc_pool, GFP_NOWAIT, );
if (unlikely(!lli)) {
dev_err(chan2dev(chan), "%s: not enough descriptors 
available\n",
axi_chan_name(chan));
@@ -236,14 +235,13 @@ static struct axi_dma_lli *axi_desc_get(struct 
axi_dma_chan *chan,
 static void axi_desc_put(struct axi_dma_desc *desc)
 {
struct axi_dma_chan *chan = desc->chan;
-   struct dw_axi_dma *dw = chan->chip->dw;
int count = atomic_read(>descs_allocated);
struct axi_dma_hw_desc *hw_desc;
int descs_put;
 
for (descs_put = 0; descs_put < count; descs_put++) {
hw_desc = >hw_desc[descs_put];
-   dma_pool_free(dw->desc_pool, hw_desc->lli, hw_desc->llp);
+   dma_pool_free(chan->desc_pool, hw_desc->lli, hw_desc->llp);
}
 
kfree(desc->hw_desc);
@@ -360,6 +358,15 @@ static int dma_chan_alloc_chan_resources(struct dma_chan 
*dchan)
return -EBUSY;
}
 
+   /* LLI address must be aligned to a 64-byte boundary */
+   chan->desc_pool = dma_pool_create(dev_name(chan2dev(chan)),
+ chan->chip->dev,
+ sizeof(struct axi_dma_lli),
+ 64, 0);
+   if (!chan->desc_pool) {
+   dev_err(chan2dev(chan), "No memory for descriptors\n");
+   return -ENOMEM;
+   }
dev_vdbg(dchan2dev(dchan), "%s: allocating\n", axi_chan_name(chan));
 
pm_runtime_get(chan->chip->dev);
@@ -381,6 +388,8 @@ static void dma_chan_free_chan_resources(struct dma_chan 
*dchan)
 
vchan_free_chan_resources(>vc);
 
+   dma_pool_destroy(chan->desc_pool);
+   chan->desc_pool = NULL;
dev_vdbg(dchan2dev(dchan),
 "%s: free resources, descriptor still allocated: %u\n",
 axi_chan_name(chan), atomic_read(>descs_allocated));
@@ -896,13 +905,6 @@ static int dw_probe(struct platform_device *pdev)
if (ret)
return ret;
 
-   /* Lli address must be aligned to a 64-byte boundary */
-   dw->desc_pool = dmam_pool_create(KBUILD_MODNAME, chip->dev,
-sizeof(struct axi_dma_lli), 64, 0);
-   if (!dw->desc_pool) {
-   dev_err(chip->dev, "No memory for descriptors dma pool\n");
-   return -ENOMEM;
-   }
 
INIT_LIST_HEAD(>dma.channels);
for (i = 0; i < hdata->nr_channels; i++) {
diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h 
b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
index 41e775e6e593..f886b2bb75de 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
@@ -39,6 +39,7 @@ struct axi_dma_chan {
u8  id;
atomic_tdescs_allocated;
 
+   struct dma_pool *desc_pool;
struct virt_dma_chanvc;
 
struct axi_dma_desc *desc;
@@ -49,7 +50,6 @@ struct axi_dma_chan {
 struct dw_axi_dma {
struct dma_device   dma;
struct dw_axi_dma_hcfg  *hdata;
-   struct dma_pool *desc_pool;
 
/* channels */
struct axi_dma_chan *chan;
-- 
2.18.0

[PATCH v8 01/16] dt-bindings: dma: Add YAML schemas for dw-axi-dmac

YAML schemas Device Tree (DT) binding is the new format for DT to replace
the old format. Introduce YAML schemas DT binding for dw-axi-dmac and
remove the old version.

Signed-off-by: Sia Jee Heng 
Reviewed-by: Rob Herring 
---
 .../bindings/dma/snps,dw-axi-dmac.txt |  39 --
 .../bindings/dma/snps,dw-axi-dmac.yaml| 121 ++
 2 files changed, 121 insertions(+), 39 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt
 create mode 100644 Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml

diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt 
b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt
deleted file mode 100644
index dbe160400adc..
--- a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt
+++ /dev/null
@@ -1,39 +0,0 @@
-Synopsys DesignWare AXI DMA Controller
-
-Required properties:
-- compatible: "snps,axi-dma-1.01a"
-- reg: Address range of the DMAC registers. This should include
-  all of the per-channel registers.
-- interrupt: Should contain the DMAC interrupt number.
-- dma-channels: Number of channels supported by hardware.
-- snps,dma-masters: Number of AXI masters supported by the hardware.
-- snps,data-width: Maximum AXI data width supported by hardware.
-  (0 - 8bits, 1 - 16bits, 2 - 32bits, ..., 6 - 512bits)
-- snps,priority: Priority of channel. Array size is equal to the number of
-  dma-channels. Priority value must be programmed within [0:dma-channels-1]
-  range. (0 - minimum priority)
-- snps,block-size: Maximum block size supported by the controller channel.
-  Array size is equal to the number of dma-channels.
-
-Optional properties:
-- snps,axi-max-burst-len: Restrict master AXI burst length by value specified
-  in this property. If this property is missing the maximum AXI burst length
-  supported by DMAC is used. [1:256]
-
-Example:
-
-dmac: dma-controller@8 {
-   compatible = "snps,axi-dma-1.01a";
-   reg = <0x8 0x400>;
-   clocks = <_clk>, <_clk>;
-   clock-names = "core-clk", "cfgr-clk";
-   interrupt-parent = <>;
-   interrupts = <27>;
-
-   dma-channels = <4>;
-   snps,dma-masters = <2>;
-   snps,data-width = <3>;
-   snps,block-size = <4096 4096 4096 4096>;
-   snps,priority = <0 1 2 3>;
-   snps,axi-max-burst-len = <16>;
-};
diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml 
b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
new file mode 100644
index ..3d2515463d56
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
@@ -0,0 +1,121 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/snps,dw-axi-dmac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Synopsys DesignWare AXI DMA Controller
+
+maintainers:
+  - Eugeniy Paltsev 
+
+description:
+  Synopsys DesignWare AXI DMA Controller DT Binding
+
+allOf:
+  - $ref: "dma-controller.yaml#"
+
+properties:
+  compatible:
+enum:
+  - snps,axi-dma-1.01a
+
+  reg:
+items:
+  - description: Address range of the DMAC registers
+
+  reg-names:
+items:
+  - const: axidma_ctrl_regs
+
+  interrupts:
+maxItems: 1
+
+  clocks:
+items:
+  - description: Bus Clock
+  - description: Module Clock
+
+  clock-names:
+items:
+  - const: core-clk
+  - const: cfgr-clk
+
+  '#dma-cells':
+const: 1
+
+  dma-channels:
+minimum: 1
+maximum: 8
+
+  snps,dma-masters:
+description: |
+  Number of AXI masters supported by the hardware.
+$ref: /schemas/types.yaml#/definitions/uint32
+enum: [1, 2]
+
+  snps,data-width:
+description: |
+  AXI data width supported by hardware.
+  (0 - 8bits, 1 - 16bits, 2 - 32bits, ..., 6 - 512bits)
+$ref: /schemas/types.yaml#/definitions/uint32
+enum: [0, 1, 2, 3, 4, 5, 6]
+
+  snps,priority:
+description: |
+  Channel priority specifier associated with the DMA channels.
+$ref: /schemas/types.yaml#/definitions/uint32-array
+minItems: 1
+maxItems: 8
+
+  snps,block-size:
+description: |
+  Channel block size specifier associated with the DMA channels.
+$ref: /schemas/types.yaml#/definitions/uint32-array
+minItems: 1
+maxItems: 8
+
+  snps,axi-max-burst-len:
+description: |
+  Restrict master AXI burst length by value specified in this property.
+  If this property is missing the maximum AXI burst length supported by
+  DMAC is used.
+$ref: /schemas/types.yaml#/definitions/uint32
+minimum: 1
+maximum: 256
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - interrupts
+  - '#dma-cells'
+  - dma-channels
+  - snps,dma-masters
+  - snps,data-width
+  - snps,priority
+  - snps,block-size
+
+additionalProperties: false
+
+examples:
+  - |
+ #include 
+ #include 
+ /* example with snps,dw-axi-dmac

[PATCH v8 04/16] dmaengine: dw-axi-dmac: Add device_synchronize() callback

Add support for device_synchronize() callback function to sync with
dmaengine_terminate_sync().

Reviewed-by: Andy Shevchenko 
Signed-off-by: Sia Jee Heng 
---
 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c 
b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index 3737e1c3c793..241ab7a24e2a 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -347,6 +347,13 @@ static void dma_chan_issue_pending(struct dma_chan *dchan)
spin_unlock_irqrestore(>vc.lock, flags);
 }
 
+static void dw_axi_dma_synchronize(struct dma_chan *dchan)
+{
+   struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan);
+
+   vchan_synchronize(>vc);
+}
+
 static int dma_chan_alloc_chan_resources(struct dma_chan *dchan)
 {
struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan);
@@ -940,6 +947,7 @@ static int dw_probe(struct platform_device *pdev)
dw->dma.device_free_chan_resources = dma_chan_free_chan_resources;
 
dw->dma.device_prep_dma_memcpy = dma_chan_prep_dma_memcpy;
+   dw->dma.device_synchronize = dw_axi_dma_synchronize;
 
platform_set_drvdata(pdev, chip);
 
-- 
2.18.0

[PATCH v8 02/16] dmaengine: dw-axi-dmac: simplify descriptor management

Simplify and refactor the descriptor management by removing the redundant
Linked List Item (LLI) queue control logic from the AxiDMA driver.
The descriptor is split into virtual descriptor and hardware LLI so that
only hardware LLI memories are allocated from the DMA memory pool.

Up to 64 descriptors can be allocated within a PAGE_SIZE compare to 16
descriptors in previous version. This solves the problem where an
ALSA driver expects more than 16 DMA descriptors to run.

Reviewed-by: Andy Shevchenko 
Signed-off-by: Sia Jee Heng 
---
 .../dma/dw-axi-dmac/dw-axi-dmac-platform.c| 164 ++
 drivers/dma/dw-axi-dmac/dw-axi-dmac.h |   9 +-
 2 files changed, 102 insertions(+), 71 deletions(-)

diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c 
b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index e164f3295f5d..350968baaf88 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include "dw-axi-dmac.h"
@@ -195,43 +196,58 @@ static inline const char *axi_chan_name(struct 
axi_dma_chan *chan)
return dma_chan_name(>vc.chan);
 }
 
-static struct axi_dma_desc *axi_desc_get(struct axi_dma_chan *chan)
+static struct axi_dma_desc *axi_desc_alloc(u32 num)
 {
-   struct dw_axi_dma *dw = chan->chip->dw;
struct axi_dma_desc *desc;
+
+   desc = kzalloc(sizeof(*desc), GFP_NOWAIT);
+   if (!desc)
+   return NULL;
+
+   desc->hw_desc = kcalloc(num, sizeof(*desc->hw_desc), GFP_NOWAIT);
+   if (!desc->hw_desc) {
+   kfree(desc);
+   return NULL;
+   }
+
+   return desc;
+}
+
+static struct axi_dma_lli *axi_desc_get(struct axi_dma_chan *chan,
+   dma_addr_t *addr)
+{
+   struct dw_axi_dma *dw = chan->chip->dw;
+   struct axi_dma_lli *lli;
dma_addr_t phys;
 
-   desc = dma_pool_zalloc(dw->desc_pool, GFP_NOWAIT, );
-   if (unlikely(!desc)) {
+   lli = dma_pool_zalloc(dw->desc_pool, GFP_NOWAIT, );
+   if (unlikely(!lli)) {
dev_err(chan2dev(chan), "%s: not enough descriptors 
available\n",
axi_chan_name(chan));
return NULL;
}
 
atomic_inc(>descs_allocated);
-   INIT_LIST_HEAD(>xfer_list);
-   desc->vd.tx.phys = phys;
-   desc->chan = chan;
+   *addr = phys;
 
-   return desc;
+   return lli;
 }
 
 static void axi_desc_put(struct axi_dma_desc *desc)
 {
struct axi_dma_chan *chan = desc->chan;
struct dw_axi_dma *dw = chan->chip->dw;
-   struct axi_dma_desc *child, *_next;
-   unsigned int descs_put = 0;
+   int count = atomic_read(>descs_allocated);
+   struct axi_dma_hw_desc *hw_desc;
+   int descs_put;
 
-   list_for_each_entry_safe(child, _next, >xfer_list, xfer_list) {
-   list_del(>xfer_list);
-   dma_pool_free(dw->desc_pool, child, child->vd.tx.phys);
-   descs_put++;
+   for (descs_put = 0; descs_put < count; descs_put++) {
+   hw_desc = >hw_desc[descs_put];
+   dma_pool_free(dw->desc_pool, hw_desc->lli, hw_desc->llp);
}
 
-   dma_pool_free(dw->desc_pool, desc, desc->vd.tx.phys);
-   descs_put++;
-
+   kfree(desc->hw_desc);
+   kfree(desc);
atomic_sub(descs_put, >descs_allocated);
dev_vdbg(chan2dev(chan), "%s: %d descs put, %d still allocated\n",
axi_chan_name(chan), descs_put,
@@ -258,9 +274,9 @@ dma_chan_tx_status(struct dma_chan *dchan, dma_cookie_t 
cookie,
return ret;
 }
 
-static void write_desc_llp(struct axi_dma_desc *desc, dma_addr_t adr)
+static void write_desc_llp(struct axi_dma_hw_desc *desc, dma_addr_t adr)
 {
-   desc->lli.llp = cpu_to_le64(adr);
+   desc->lli->llp = cpu_to_le64(adr);
 }
 
 static void write_chan_llp(struct axi_dma_chan *chan, dma_addr_t adr)
@@ -295,7 +311,7 @@ static void axi_chan_block_xfer_start(struct axi_dma_chan 
*chan,
   DWAXIDMAC_HS_SEL_HW << CH_CFG_H_HS_SEL_SRC_POS);
axi_chan_iowrite32(chan, CH_CFG_H, reg);
 
-   write_chan_llp(chan, first->vd.tx.phys | lms);
+   write_chan_llp(chan, first->hw_desc[0].llp | lms);
 
irq_mask = DWAXIDMAC_IRQ_DMA_TRF | DWAXIDMAC_IRQ_ALL_ERR;
axi_chan_irq_sig_set(chan, irq_mask);
@@ -378,67 +394,78 @@ static void dma_chan_free_chan_resources(struct dma_chan 
*dchan)
  * transfer and completes the DMA transfer operation at the end of current
  * block transfer.
  */
-static void set_desc_last(struct axi_dma_desc *desc)
+static void set_desc_last(struct axi_dma_hw_desc *desc)
 {
u32 val;
 
-   val = le32_to_cpu(desc->lli.ctl_hi);
+   val = le32_to_cpu(desc->lli->ctl_hi);
val |= CH_CTL_H_LLI_LAST;
-   desc->lli.ctl_hi = cpu_to_le32(val);
+   desc->lli->ctl_hi = cpu_to_le32(val);
 }
 
-static void

[PATCH v8 00/16] dmaengine: dw-axi-dmac: support Intel KeemBay AxiDMA

The below patch series are to support AxiDMA running on Intel KeemBay SoC.
The base driver is dw-axi-dmac. This driver only support DMA memory copy
transfers. Code refactoring is needed so that additional features can be
supported.
The features added in this patch series are:
- Replacing Linked List with virtual descriptor management.
- Remove unrelated hw desc stuff from dma memory pool.
- Manage dma memory pool alloc/destroy based on channel activity.
- Support dmaengine device_sync() callback.
- Support dmaengine device_config().
- Support dmaengine device_prep_slave_sg().
- Support dmaengine device_prep_dma_cyclic().
- Support of_dma_controller_register().
- Support burst residue granularity.
- Support Intel KeemBay AxiDMA registers.
- Support Intel KeemBay AxiDMA device handshake.
- Support Intel KeemBay AxiDMA BYTE and HALFWORD device operation.
- Add constraint to Max segment size.
- Virtually split the linked-list.

This patch series are tested on Intel KeemBay platform.

v8:
- Rebased to kernel v5.11-rc1.
- Added reviewed-by tag from Rob.

v7:
- Added 'allOf' and '$ref:dma-controller.yaml#' in DT binding.
- Removed the dma-channels common description in DT binding.
- Removed the default fields in DT binding.

v6:
- Removed 'allOf' cases in DT binding.
- Added '>' at the end of the email address.
- Removed additional '|' at the start of description.
- Fixed space indent.
- Added proper constraint in DT binding.
- Removed second example in DT binding.

v5:
- Added comment to the Apb registers used by Intel KeemBay Soc.
- Renamed "hs_num" to "handshake_num".
- Conditional check for the compatible property and return error
  instead of printing warning.
- Added patch 16th to virtually split the linked-list as per
  request from ALSA team.

v4:
- Fixed bot found errors running make_dt_binding_check.
- Added minItems: 1 to the YAML schemas DT binding.
- Updated "reg" field to the YAML schemas DT binding.

v3:
- Added additionalProperties: false to the YAML schemas DT binding.
- Reordered patch sequence for patch 10th, 11th and 12th so that
  DT binding come first, follow by adding Intel KeemBay SoC registers
  and update .compatible field.
- Checked txstate NULL condition.
- Created helper function dw_axi_dma_set_hw_desc() to handle common code.

v2:
- Rebased to v5.10-rc1 kernel.
- Added support for dmaengine device_config().
- Added support for dmaengine device_prep_slave_sg().
- Added support for dmaengine device_prep_dma_cyclic().
- Added support for of_dma_controller_register().
- Added support for burst residue granularity.
- Added support for Intel KeemBay AxiDMA registers.
- Added support for Intel KeemBay AxiDMA device handshake.
- Added support for Intel KeemBay AxiDMA BYTE and HALFWORD device operation.
- Added constraint to Max segment size.

v1:
- Initial version. Patch on top of dw-axi-dma driver. This version improve
  the descriptor management by replacing Linked List Item (LLI) with
  virtual descriptor management, only allocate hardware LLI memories from
  DMA memory pool, manage DMA memory pool alloc/destroy based on channel
  activity and to support device_sync callback.

Sia Jee Heng (16):
  dt-bindings: dma: Add YAML schemas for dw-axi-dmac
  dmaengine: dw-axi-dmac: simplify descriptor management
  dmaengine: dw-axi-dmac: move dma_pool_create() to
alloc_chan_resources()
  dmaengine: dw-axi-dmac: Add device_synchronize() callback
  dmaengine: dw-axi-dmac: Add device_config operation
  dmaengine: dw-axi-dmac: Support device_prep_slave_sg
  dmaegine: dw-axi-dmac: Support device_prep_dma_cyclic()
  dmaengine: dw-axi-dmac: Support of_dma_controller_register()
  dmaengine: dw-axi-dmac: Support burst residue granularity
  dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA
  dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields
  dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA support
  dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA handshake
  dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA BYTE and HALFWORD
registers
  dmaengine: dw-axi-dmac: Set constraint to the Max segment size
  dmaengine: dw-axi-dmac: Virtually split the linked-list

 .../bindings/dma/snps,dw-axi-dmac.txt |  39 -
 .../bindings/dma/snps,dw-axi-dmac.yaml| 126 
 .../dma/dw-axi-dmac/dw-axi-dmac-platform.c| 710 +++---
 drivers/dma/dw-axi-dmac/dw-axi-dmac.h |  34 +-
 4 files changed, 775 insertions(+), 134 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt
 create mode 100644 Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml


base-commit: dea8dcf2a9fa8cc540136a6cd885c3beece16ec3
-- 
2.18.0

drivers/media/pci/intel/ipu3/ipu3-cio2.h:22:28: warning: conversion from 'long unsigned int' to 'u16' {aka 'short unsigned int'} changes value from '131072' to '0'

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   dea8dcf2a9fa8cc540136a6cd885c3beece16ec3
commit: 7b285f41f7376dc37e7fad1e803995fd39f42848 media: ipu3-cio2: Introduce 
CIO2_LOP_ENTRIES constant
date:   4 months ago
config: ia64-randconfig-r014-20201221 (attached as .config)
compiler: ia64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=7b285f41f7376dc37e7fad1e803995fd39f42848
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 7b285f41f7376dc37e7fad1e803995fd39f42848
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross 
ARCH=ia64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

   In file included from drivers/media/pci/intel/ipu3/ipu3-cio2.c:29:
   drivers/media/pci/intel/ipu3/ipu3-cio2.c: In function 
'cio2_fbpt_entry_init_dummy':
>> drivers/media/pci/intel/ipu3/ipu3-cio2.h:22:28: warning: conversion from 
>> 'long unsigned int' to 'u16' {aka 'short unsigned int'} changes value from 
>> '131072' to '0' [-Woverflow]
  22 | #define CIO2_LOP_ENTRIES   (PAGE_SIZE / sizeof(u32))
 |^
   drivers/media/pci/intel/ipu3/ipu3-cio2.c:163:39: note: in expansion of macro 
'CIO2_LOP_ENTRIES'
 163 |  entry[1].second_entry.num_of_pages = CIO2_LOP_ENTRIES * 
CIO2_MAX_LOPS;
 |   ^~~~


vim +22 drivers/media/pci/intel/ipu3/ipu3-cio2.h

18  
19  /* 32MB = 8xFBPT_entry */
20  #define CIO2_MAX_LOPS   8
21  #define CIO2_MAX_BUFFERS(PAGE_SIZE / 16 / 
CIO2_MAX_LOPS)
  > 22  #define CIO2_LOP_ENTRIES(PAGE_SIZE / 
sizeof(u32))
23  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip

Re: [PATCH 1/2] mm: Allow architectures to request 'old' entries when prefaulting

2020-12-28 Thread Hugh Dickins

Got it at last, sorry it's taken so long.

On Tue, 29 Dec 2020, Kirill A. Shutemov wrote:
> On Tue, Dec 29, 2020 at 01:05:48AM +0300, Kirill A. Shutemov wrote:
> > On Mon, Dec 28, 2020 at 10:47:36AM -0800, Linus Torvalds wrote:
> > > On Mon, Dec 28, 2020 at 4:53 AM Kirill A. Shutemov  
> > > wrote:
> > > >
> > > > So far I only found one more pin leak and always-true check. I don't see
> > > > how can it lead to crash or corruption. Keep looking.

Those mods look good in themselves, but, as you expected,
made no difference to the corruption I was seeing.

> > > 
> > > Well, I noticed that the nommu.c version of filemap_map_pages() needs
> > > fixing, but that's obviously not the case Hugh sees.
> > > 
> > > No,m I think the problem is the
> > > 
> > > pte_unmap_unlock(vmf->pte, vmf->ptl);
> > > 
> > > at the end of filemap_map_pages().
> > > 
> > > Why?
> > > 
> > > Because we've been updating vmf->pte as we go along:
> > > 
> > > vmf->pte += xas.xa_index - last_pgoff;
> > > 
> > > and I think that by the time we get to that "pte_unmap_unlock()",
> > > vmf->pte potentially points to past the edge of the page directory.
> > 
> > Well, if it's true we have bigger problem: we set up an pte entry without
> > relevant PTL.
> > 
> > But I *think* we should be fine here: do_fault_around() limits start_pgoff
> > and end_pgoff to stay within the page table.

Yes, Linus's patch had made no difference,
the map_pages loop is safe in that respect.

> > 
> > It made mw looking at the code around pte_unmap_unlock() and I think that
> > the bug is that we have to reset vmf->address and NULLify vmf->pte once we
> > are done with faultaround:
> > 
> > diff --git a/mm/memory.c b/mm/memory.c
> 
> Ugh.. Wrong place. Need to sleep.
> 
> I'll look into your idea tomorrow.
> 
> diff --git a/mm/filemap.c b/mm/filemap.c
> index 87671284de62..e4daab80ed81 100644
> --- a/mm/filemap.c
> +++ b/mm/filemap.c
> @@ -2987,6 +2987,8 @@ vm_fault_t filemap_map_pages(struct vm_fault *vmf, 
> unsigned long address,
>   } while ((head = next_map_page(vmf, , end_pgoff)) != NULL);
>   pte_unmap_unlock(vmf->pte, vmf->ptl);
>   rcu_read_unlock();
> + vmf->address = address;
> + vmf->pte = NULL;
>   WRITE_ONCE(file->f_ra.mmap_miss, mmap_miss);
>  
>   return ret;
> -- 

And that made no (noticeable) difference either.  But at last
I realized, it's absolutely on the right track, but missing the
couple of early returns at the head of filemap_map_pages(): add

--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -3025,14 +3025,12 @@ vm_fault_t filemap_map_pages(struct vm_f

rcu_read_lock();
head = first_map_page(vmf, , end_pgoff);
-   if (!head) {
-   rcu_read_unlock();
-   return 0;
-   }
+   if (!head)
+   goto out;

if (filemap_map_pmd(vmf, head)) {
-   rcu_read_unlock();
-   return VM_FAULT_NOPAGE;
+   ret = VM_FAULT_NOPAGE;
+   goto out;
}

vmf->pte = pte_offset_map_lock(vma->vm_mm, vmf->pmd,
@@ -3066,9 +3064,9 @@ unlock:
put_page(head);
} while ((head = next_map_page(vmf, , end_pgoff)) != NULL);
pte_unmap_unlock(vmf->pte, vmf->ptl);
+out:
rcu_read_unlock();
vmf->address = address;
-   vmf->pte = NULL;
WRITE_ONCE(file->f_ra.mmap_miss, mmap_miss);

return ret;
--

and then the corruption is fixed.  It seems miraculous that the
machines even booted with that bad vmf->address going to __do_fault():
maybe that tells us what a good job map_pages does most of the time.

You'll see I've tried removing the "vmf->pte = NULL;" there. I did
criticize earlier that vmf->pte was being left set, but was either
thinking back to some earlier era of mm/memory.c, or else confusing
with vmf->prealloc_pte, which is NULLed when consumed: I could not
find anywhere in mm/memory.c which now needs vmf->pte to be cleared,
and I seem to run fine without it (even on i386 HIGHPTE).

So, the mystery is solved; but I don't think any of these patches
should be applied.  Without thinking through Linus's suggestions
re do_set_pte() in particular, I do think this map_pages interface
is too ugly, and given us lots of trouble: please take your time
to go over it all again, and come up with a cleaner patch.

I've grown rather jaded, and questioning the value of the rework:
I don't think I want to look at or test another for a week or so.

Hugh

drivers/interconnect/qcom/icc-rpmh.c:133:29: sparse: sparse: incorrect type in assignment (different base types)

Hi Odelu,

First bad commit (maybe != root cause):

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   dea8dcf2a9fa8cc540136a6cd885c3beece16ec3
commit: 2d1f95ab9feb4f5373f81c3805bfbc126670812d interconnect: qcom: Add SC7180 
interconnect provider driver
date:   10 months ago
config: arm64-randconfig-s031-20201225 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0
reproduce:
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.3-184-g1b896707-dirty
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2d1f95ab9feb4f5373f81c3805bfbc126670812d
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 2d1f95ab9feb4f5373f81c3805bfbc126670812d
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 
CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arm64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 


"sparse warnings: (new ones prefixed by >>)"
   drivers/interconnect/qcom/icc-rpmh.c:132:28: sparse: sparse: incorrect type 
in assignment (different base types) @@ expected restricted __le32 
[usertype] unit @@ got unsigned int [usertype] @@
   drivers/interconnect/qcom/icc-rpmh.c:132:28: sparse: expected restricted 
__le32 [usertype] unit
   drivers/interconnect/qcom/icc-rpmh.c:132:28: sparse: got unsigned int 
[usertype]
>> drivers/interconnect/qcom/icc-rpmh.c:133:29: sparse: sparse: incorrect type 
>> in assignment (different base types) @@ expected restricted __le16 
>> [usertype] width @@ got unsigned short [usertype] @@
   drivers/interconnect/qcom/icc-rpmh.c:133:29: sparse: expected restricted 
__le16 [usertype] width
   drivers/interconnect/qcom/icc-rpmh.c:133:29: sparse: got unsigned short 
[usertype]

vim +133 drivers/interconnect/qcom/icc-rpmh.c

976daac4a1c581e David Dai 2020-02-28   94  
976daac4a1c581e David Dai 2020-02-28   95  /**
976daac4a1c581e David Dai 2020-02-28   96   * qcom_icc_bcm_init - populates bcm 
aux data and connect qnodes
976daac4a1c581e David Dai 2020-02-28   97   * @bcm: bcm to be initialized
976daac4a1c581e David Dai 2020-02-28   98   * @dev: associated provider device
976daac4a1c581e David Dai 2020-02-28   99   *
976daac4a1c581e David Dai 2020-02-28  100   * Return: 0 on success, or an error 
code otherwise
976daac4a1c581e David Dai 2020-02-28  101   */
976daac4a1c581e David Dai 2020-02-28  102  int qcom_icc_bcm_init(struct 
qcom_icc_bcm *bcm, struct device *dev)
976daac4a1c581e David Dai 2020-02-28  103  {
976daac4a1c581e David Dai 2020-02-28  104   struct qcom_icc_node *qn;
976daac4a1c581e David Dai 2020-02-28  105   const struct bcm_db *data;
976daac4a1c581e David Dai 2020-02-28  106   size_t data_count;
976daac4a1c581e David Dai 2020-02-28  107   int i;
976daac4a1c581e David Dai 2020-02-28  108  
976daac4a1c581e David Dai 2020-02-28  109   /* BCM is already initialised*/
976daac4a1c581e David Dai 2020-02-28  110   if (bcm->addr)
976daac4a1c581e David Dai 2020-02-28  111   return 0;
976daac4a1c581e David Dai 2020-02-28  112  
976daac4a1c581e David Dai 2020-02-28  113   bcm->addr = 
cmd_db_read_addr(bcm->name);
976daac4a1c581e David Dai 2020-02-28  114   if (!bcm->addr) {
976daac4a1c581e David Dai 2020-02-28  115   dev_err(dev, "%s could 
not find RPMh address\n",
976daac4a1c581e David Dai 2020-02-28  116   bcm->name);
976daac4a1c581e David Dai 2020-02-28  117   return -EINVAL;
976daac4a1c581e David Dai 2020-02-28  118   }
976daac4a1c581e David Dai 2020-02-28  119  
976daac4a1c581e David Dai 2020-02-28  120   data = 
cmd_db_read_aux_data(bcm->name, _count);
976daac4a1c581e David Dai 2020-02-28  121   if (IS_ERR(data)) {
976daac4a1c581e David Dai 2020-02-28  122   dev_err(dev, "%s 
command db read error (%ld)\n",
976daac4a1c581e David Dai 2020-02-28  123   bcm->name, 
PTR_ERR(data));
976daac4a1c581e David Dai 2020-02-28  124   return PTR_ERR(data);
976daac4a1c581e David Dai 2020-02-28  125   }
976daac4a1c581e David Dai 2020-02-28  126   if (!data_count) {
976daac4a1c581e David Dai 2020-02-28  127   dev_err(dev, "%s 
command db missing or partial aux data\n",
976daac4a1c581e David Dai 2020-02-28  128   bcm->name);
976daac4a1c581e David Dai 2020-02-28  129   return -EINVAL;
976daac4a1c581e David Dai 2020-02-28  130   }
976daac4a1c581e David Dai 2020-02-28  131  
976daac4a1c581e David Dai 2020-02-28  132   bcm->aux_data.unit = 
le32_to_cpu(data->unit);
976daac4a1c581e David Dai 2020-02-28 @133

Re: [PATCH v2 13/16] rpmsg: virtio: probe the rpmsg_ctl device

Hi Arnaud,

I love your patch! Perhaps something to improve:

[auto build test WARNING on linus/master]
[also build test WARNING on v5.11-rc1 next-20201223]
[cannot apply to rpmsg/for-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Arnaud-Pouliquen/introduce-generic-IOCTL-interface-for-RPMsg-channels-management/20201222-190521
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
8653b778e454a7708847aeafe689bce07aeeb94e
config: x86_64-randconfig-a016-20201221 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 
cee1e7d14f4628d6174b33640d502bff3b54ae45)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# 
https://github.com/0day-ci/linux/commit/532ff49403675dd41b19bcc2b03ca22a08443f8d
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
Arnaud-Pouliquen/introduce-generic-IOCTL-interface-for-RPMsg-channels-management/20201222-190521
git checkout 532ff49403675dd41b19bcc2b03ca22a08443f8d
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

>> drivers/rpmsg/virtio_rpmsg_bus.c:947:7: warning: variable 'rpdev_ctrl' is 
>> used uninitialized whenever 'if' condition is true 
>> [-Wsometimes-uninitialized]
   if (err)
   ^~~
   drivers/rpmsg/virtio_rpmsg_bus.c:979:32: note: uninitialized use occurs here
   kfree(to_virtio_rpmsg_channel(rpdev_ctrl));
 ^~
   drivers/rpmsg/virtio_rpmsg_bus.c:111:15: note: expanded from macro 
'to_virtio_rpmsg_channel'
   container_of(_rpdev, struct virtio_rpmsg_channel, rpdev)
^~
   include/linux/kernel.h:693:26: note: expanded from macro 'container_of'
   void *__mptr = (void *)(ptr);   \
   ^~~
   drivers/rpmsg/virtio_rpmsg_bus.c:947:3: note: remove the 'if' if its 
condition is always false
   if (err)
   ^~~~
   drivers/rpmsg/virtio_rpmsg_bus.c:930:7: warning: variable 'rpdev_ctrl' is 
used uninitialized whenever 'if' condition is true [-Wsometimes-uninitialized]
   if (!vch) {
   ^~~~
   drivers/rpmsg/virtio_rpmsg_bus.c:979:32: note: uninitialized use occurs here
   kfree(to_virtio_rpmsg_channel(rpdev_ctrl));
 ^~
   drivers/rpmsg/virtio_rpmsg_bus.c:111:15: note: expanded from macro 
'to_virtio_rpmsg_channel'
   container_of(_rpdev, struct virtio_rpmsg_channel, rpdev)
^~
   include/linux/kernel.h:693:26: note: expanded from macro 'container_of'
   void *__mptr = (void *)(ptr);   \
   ^~~
   drivers/rpmsg/virtio_rpmsg_bus.c:930:3: note: remove the 'if' if its 
condition is always false
   if (!vch) {
   ^~~
   drivers/rpmsg/virtio_rpmsg_bus.c:853:44: note: initialize the variable 
'rpdev_ctrl' to silence this warning
   struct rpmsg_device *rpdev_ns, *rpdev_ctrl;
 ^
  = NULL
   2 warnings generated.


vim +947 drivers/rpmsg/virtio_rpmsg_bus.c

532ff49403675dd Arnaud Pouliquen 2020-12-22  845  
bcabbccabffe732 Ohad Ben-Cohen   2011-10-20  846  static int 
rpmsg_probe(struct virtio_device *vdev)
bcabbccabffe732 Ohad Ben-Cohen   2011-10-20  847  {
bcabbccabffe732 Ohad Ben-Cohen   2011-10-20  848vq_callback_t *vq_cbs[] 
= { rpmsg_recv_done, rpmsg_xmit_done };
f7ad26ff952b3ca Stefan Hajnoczi  2015-12-17  849static const char * 
const names[] = { "input", "output" };
bcabbccabffe732 Ohad Ben-Cohen   2011-10-20  850struct virtqueue 
*vqs[2];
bcabbccabffe732 Ohad Ben-Cohen   2011-10-20  851struct virtproc_info 
*vrp;
950a7388f02bf77 Arnaud Pouliquen 2020-11-20  852struct 
virtio_rpmsg_channel *vch;
532ff49403675dd Arnaud Pouliquen 2020-12-22  853struct rpmsg_device 
*rpdev_ns, *rpdev_ctrl;
bcabbccabffe732 Ohad Ben-Cohen   2011-10-20  854void *bufs_va;
bcabbccabffe732 Ohad Ben-Cohen   2011-10-20  855int err = 0, i;
b1b9891441fa33f Suman Anna   2014-09-16

Re: [PATCH] staging: comedi: remove warnings of comedi_lrange

Hi chensong,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on staging/staging-testing]

url:
https://github.com/0day-ci/linux/commits/chensong/staging-comedi-remove-warnings-of-comedi_lrange/20201223-104542
base:   https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git 
5e60366d56c630e32befce7ef05c569e04391ca3
config: x86_64-randconfig-r012-20201223 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 
cee1e7d14f4628d6174b33640d502bff3b54ae45)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# 
https://github.com/0day-ci/linux/commit/fec78f1f56c0e63e9240b5b30c3b98d29ecc9a49
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
chensong/staging-comedi-remove-warnings-of-comedi_lrange/20201223-104542
git checkout fec78f1f56c0e63e9240b5b30c3b98d29ecc9a49
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

>> drivers/staging/comedi/drivers/das16.c:971:18: error: cannot assign to 
>> variable 'lrange' with const-qualified type 'const struct comedi_lrange *'
   lrange->length = 1;
   ~~ ^
   drivers/staging/comedi/drivers/das16.c:961:31: note: variable 'lrange' 
declared const here
   const struct comedi_lrange *lrange;
   ^~
>> drivers/staging/comedi/drivers/das16.c:972:10: error: assigning to 'struct 
>> comedi_krange *' from 'struct comedi_krange const[]' discards qualifiers 
>> [-Werror,-Wincompatible-pointer-types-discards-qualifiers]
   krange = lrange->range;
  ^ ~
   drivers/staging/comedi/drivers/das16.c:1005:18: error: cannot assign to 
variable 'lrange' with const-qualified type 'const struct comedi_lrange *'
   lrange->length = 1;
   ~~ ^
   drivers/staging/comedi/drivers/das16.c:995:31: note: variable 'lrange' 
declared const here
   const struct comedi_lrange *lrange;
   ^~
   drivers/staging/comedi/drivers/das16.c:1006:10: error: assigning to 'struct 
comedi_krange *' from 'struct comedi_krange const[]' discards qualifiers 
[-Werror,-Wincompatible-pointer-types-discards-qualifiers]
   krange = lrange->range;
  ^ ~
   4 errors generated.
--
>> drivers/staging/comedi/drivers/jr3_pci.c:527:24: error: cannot assign to 
>> non-static data member 'l' with const-qualified type 'const struct 
>> comedi_lrange'
   r[0].l.range[0].min = -get_s16(>fx) * 1000;
   ~~~ ^
   drivers/staging/comedi/drivers/jr3_pci.c:94:29: note: non-static data member 
'l' declared const here
   const struct comedi_lrange l;
   ~~~^
   drivers/staging/comedi/drivers/jr3_pci.c:528:24: error: cannot assign to 
non-static data member 'l' with const-qualified type 'const struct 
comedi_lrange'
   r[0].l.range[0].max = get_s16(>fx) * 1000;
   ~~~ ^
   drivers/staging/comedi/drivers/jr3_pci.c:94:29: note: non-static data member 
'l' declared const here
   const struct comedi_lrange l;
   ~~~^
   drivers/staging/comedi/drivers/jr3_pci.c:529:24: error: cannot assign to 
non-static data member 'l' with const-qualified type 'const struct 
comedi_lrange'
   r[1].l.range[0].min = -get_s16(>fy) * 1000;
   ~~~ ^
   drivers/staging/comedi/drivers/jr3_pci.c:94:29: note: non-static data member 
'l' declared const here
   const struct comedi_lrange l;
   ~~~^
   drivers/staging/comedi/drivers/jr3_pci.c:530:24: error: cannot assign to 
non-static data member 'l' with const-qualified type 'const struct 
comedi_lrange'
   r[1].l.range[0].max = get_s16(>fy) * 1000;
   ~~~ ^
   drivers/staging/comedi/drivers/jr3_pci.c:94:29: note: non-static data member 
'l' declared const here
   const struct comedi_lrange l;
   ~~~^
   drivers/staging/comedi/drivers/jr3_pci.c:531:24: error: cannot assign to 
non-static data member 'l' with const-qualified type 'const struct 
comedi_lrange'
   r[2].l.range[0].min =

drivers/platform/surface/surface3-wmi.c:60:14: warning: variable 'status' set but not used

Hi Maximilian,

FYI, the error/warning still remains.

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   dea8dcf2a9fa8cc540136a6cd885c3beece16ec3
commit: f23027ca3d48b6f93c5994069fb25b73539fdf34 platform/surface: Move Surface 
3 WMI driver to platform/surface
date:   9 weeks ago
config: x86_64-randconfig-r001-20201221 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce (this is a W=1 build):
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f23027ca3d48b6f93c5994069fb25b73539fdf34
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout f23027ca3d48b6f93c5994069fb25b73539fdf34
# save the attached .config to linux build tree
make W=1 ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

   drivers/platform/surface/surface3-wmi.c: In function 's3_wmi_query_block':
>> drivers/platform/surface/surface3-wmi.c:60:14: warning: variable 'status' 
>> set but not used [-Wunused-but-set-variable]
  60 |  acpi_status status;
 |  ^~


vim +/status +60 drivers/platform/surface/surface3-wmi.c

3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  56  
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  57  static int s3_wmi_query_block(const char *guid, int instance, 
int *ret)
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  58  {
83da6b59919a71a drivers/platform/x86/surface3-wmi.c Andy Shevchenko
2016-12-15  59   struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL };
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25 @60   acpi_status status;
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  61   union acpi_object *obj;
83da6b59919a71a drivers/platform/x86/surface3-wmi.c Andy Shevchenko
2016-12-15  62   int error = 0;
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  63  
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  64   mutex_lock(_wmi_lock);
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  65   status = wmi_query_block(guid, instance, );
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  66  
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  67   obj = output.pointer;
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  68  
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  69   if (!obj || obj->type != ACPI_TYPE_INTEGER) {
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  70   if (obj) {
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  71   pr_err("query block returned object type: %d - 
buffer length:%d\n",
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  72  obj->type,
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  73  obj->type == ACPI_TYPE_BUFFER ?
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  74   obj->buffer.length : 
0);
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  75   }
83da6b59919a71a drivers/platform/x86/surface3-wmi.c Andy Shevchenko
2016-12-15  76   error = -EINVAL;
83da6b59919a71a drivers/platform/x86/surface3-wmi.c Andy Shevchenko
2016-12-15  77   goto out_free_unlock;
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  78   }
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  79   *ret = obj->integer.value;
83da6b59919a71a drivers/platform/x86/surface3-wmi.c Andy Shevchenko
2016-12-15  80   out_free_unlock:
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  81   kfree(obj);
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  82   mutex_unlock(_wmi_lock);
83da6b59919a71a drivers/platform/x86/surface3-wmi.c Andy Shevchenko
2016-12-15  83   return error;
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  84  }
3dda3b3798f96d2 drivers/platform/x86/surface3-wmi.c Benjamin Tissoires 
2016-11-25  85  

:: The code at line 60 was first introduced by commit
:: 3dda3b3798f96d2974b5f60811142d3e25547807 platform/x86: Add custom 
surface3 platform device for controlling LID

:: TO: Benjamin Tissoires 
:: CC: Andy Shevchenko 

---

Re: [PATCH] staging: comedi: remove warnings of comedi_lrange

Hi chensong,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on staging/staging-testing]

url:
https://github.com/0day-ci/linux/commits/chensong/staging-comedi-remove-warnings-of-comedi_lrange/20201223-104542
base:   https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git 
5e60366d56c630e32befce7ef05c569e04391ca3
config: x86_64-randconfig-a011-20201223 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 
cee1e7d14f4628d6174b33640d502bff3b54ae45)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# 
https://github.com/0day-ci/linux/commit/fec78f1f56c0e63e9240b5b30c3b98d29ecc9a49
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
chensong/staging-comedi-remove-warnings-of-comedi_lrange/20201223-104542
git checkout fec78f1f56c0e63e9240b5b30c3b98d29ecc9a49
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

>> drivers/staging/comedi/drivers/jr3_pci.c:527:24: error: cannot assign to 
>> non-static data member 'l' with const-qualified type 'const struct 
>> comedi_lrange'
   r[0].l.range[0].min = -get_s16(>fx) * 1000;
   ~~~ ^
   drivers/staging/comedi/drivers/jr3_pci.c:94:29: note: non-static data member 
'l' declared const here
   const struct comedi_lrange l;
   ~~~^
   drivers/staging/comedi/drivers/jr3_pci.c:528:24: error: cannot assign to 
non-static data member 'l' with const-qualified type 'const struct 
comedi_lrange'
   r[0].l.range[0].max = get_s16(>fx) * 1000;
   ~~~ ^
   drivers/staging/comedi/drivers/jr3_pci.c:94:29: note: non-static data member 
'l' declared const here
   const struct comedi_lrange l;
   ~~~^
   drivers/staging/comedi/drivers/jr3_pci.c:529:24: error: cannot assign to 
non-static data member 'l' with const-qualified type 'const struct 
comedi_lrange'
   r[1].l.range[0].min = -get_s16(>fy) * 1000;
   ~~~ ^
   drivers/staging/comedi/drivers/jr3_pci.c:94:29: note: non-static data member 
'l' declared const here
   const struct comedi_lrange l;
   ~~~^
   drivers/staging/comedi/drivers/jr3_pci.c:530:24: error: cannot assign to 
non-static data member 'l' with const-qualified type 'const struct 
comedi_lrange'
   r[1].l.range[0].max = get_s16(>fy) * 1000;
   ~~~ ^
   drivers/staging/comedi/drivers/jr3_pci.c:94:29: note: non-static data member 
'l' declared const here
   const struct comedi_lrange l;
   ~~~^
   drivers/staging/comedi/drivers/jr3_pci.c:531:24: error: cannot assign to 
non-static data member 'l' with const-qualified type 'const struct 
comedi_lrange'
   r[2].l.range[0].min = -get_s16(>fz) * 1000;
   ~~~ ^
   drivers/staging/comedi/drivers/jr3_pci.c:94:29: note: non-static data member 
'l' declared const here
   const struct comedi_lrange l;
   ~~~^
   drivers/staging/comedi/drivers/jr3_pci.c:532:24: error: cannot assign to 
non-static data member 'l' with const-qualified type 'const struct 
comedi_lrange'
   r[2].l.range[0].max = get_s16(>fz) * 1000;
   ~~~ ^
   drivers/staging/comedi/drivers/jr3_pci.c:94:29: note: non-static data member 
'l' declared const here
   const struct comedi_lrange l;
   ~~~^
   drivers/staging/comedi/drivers/jr3_pci.c:533:24: error: cannot assign to 
non-static data member 'l' with const-qualified type 'const struct 
comedi_lrange'
   r[3].l.range[0].min = -get_s16(>mx) * 100;
   ~~~ ^
   drivers/staging/comedi/drivers/jr3_pci.c:94:29: note: non-static data member 
'l' declared const here
   const struct comedi_lrange l;
   ~~~^
   drivers/staging/comedi/drivers/jr3_pci.c:534:24: error: cannot assign to 
non-static data member 'l' with const-qualified type 'const struct 
comedi_lrange'
   r[3].l.range[0].max = get_s16(>mx) * 100;
   ~~~ ^

[PATCH] hwmon: fix sbtsi_temp Documenation kernel-doc warning

Fix Documentation/hwmon/ kernel-doc warning in 5.11-rc1:

lnx-511-rc1/Documentation/hwmon/sbtsi_temp.rst:4: WARNING: Title underline too 
short.

Kernel driver sbtsi_temp
==

Fixes: 6ec3fcf556fe ("hwmon: (sbtsi) Add documentation")
Signed-off-by: Randy Dunlap 
Cc: Kun Yi 
Cc: Guenter Roeck 
Cc: Jean Delvare 
Cc: linux-hw...@vger.kernel.org
---
 Documentation/hwmon/sbtsi_temp.rst |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- lnx-511-rc1.orig/Documentation/hwmon/sbtsi_temp.rst
+++ lnx-511-rc1/Documentation/hwmon/sbtsi_temp.rst
@@ -1,7 +1,7 @@
 .. SPDX-License-Identifier: GPL-2.0-or-later
 
 Kernel driver sbtsi_temp
-==
+
 
 Supported hardware:

[PATCH] sound: pci: hda: add a new hda codec

2020-12-28 Thread bo . liu

From: bo liu 

The current kernel does not support the cx11970 codec chip.
Add a codec configuration item to kernel.

Signed-off-by: bo liu 

diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c
index be5000dd1585..e80fe8ba537c 100644
--- a/sound/pci/hda/patch_conexant.c
+++ b/sound/pci/hda/patch_conexant.c
@@ -1070,6 +1070,7 @@ static int patch_conexant_auto(struct hda_codec *codec)
 static const struct hda_device_id snd_hda_id_conexant[] = {
HDA_CODEC_ENTRY(0x14f11f86, "CX8070", patch_conexant_auto),
HDA_CODEC_ENTRY(0x14f12008, "CX8200", patch_conexant_auto),
+   HDA_CODEC_ENTRY(0x14f120D0, "CX11970", patch_conexant_auto),
HDA_CODEC_ENTRY(0x14f15045, "CX20549 (Venice)", patch_conexant_auto),
HDA_CODEC_ENTRY(0x14f15047, "CX20551 (Waikiki)", patch_conexant_auto),
HDA_CODEC_ENTRY(0x14f15051, "CX20561 (Hermosa)", patch_conexant_auto),
---
 sound/pci/hda/patch_conexant.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c
index be5000dd1585..e80fe8ba537c 100644
--- a/sound/pci/hda/patch_conexant.c
+++ b/sound/pci/hda/patch_conexant.c
@@ -1070,6 +1070,7 @@ static int patch_conexant_auto(struct hda_codec *codec)
 static const struct hda_device_id snd_hda_id_conexant[] = {
HDA_CODEC_ENTRY(0x14f11f86, "CX8070", patch_conexant_auto),
HDA_CODEC_ENTRY(0x14f12008, "CX8200", patch_conexant_auto),
+   HDA_CODEC_ENTRY(0x14f120D0, "CX11970", patch_conexant_auto),
HDA_CODEC_ENTRY(0x14f15045, "CX20549 (Venice)", patch_conexant_auto),
HDA_CODEC_ENTRY(0x14f15047, "CX20551 (Waikiki)", patch_conexant_auto),
HDA_CODEC_ENTRY(0x14f15051, "CX20561 (Hermosa)", patch_conexant_auto),
-- 
2.25.1

Re: [PATCH] staging: comedi: remove warnings of comedi_lrange

Hi chensong,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on staging/staging-testing]

url:
https://github.com/0day-ci/linux/commits/chensong/staging-comedi-remove-warnings-of-comedi_lrange/20201223-104542
base:   https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git 
5e60366d56c630e32befce7ef05c569e04391ca3
config: nios2-allyesconfig (attached as .config)
compiler: nios2-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://github.com/0day-ci/linux/commit/fec78f1f56c0e63e9240b5b30c3b98d29ecc9a49
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
chensong/staging-comedi-remove-warnings-of-comedi_lrange/20201223-104542
git checkout fec78f1f56c0e63e9240b5b30c3b98d29ecc9a49
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross 
ARCH=nios2 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

   drivers/staging/comedi/drivers/das16.c: In function 'das16_ai_range':
   drivers/staging/comedi/drivers/das16.c:971:18: error: assignment of member 
'length' in read-only object
 971 |   lrange->length = 1;
 |  ^
>> drivers/staging/comedi/drivers/das16.c:972:10: warning: assignment discards 
>> 'const' qualifier from pointer target type [-Wdiscarded-qualifiers]
 972 |   krange = lrange->range;
 |  ^
   drivers/staging/comedi/drivers/das16.c: In function 'das16_ao_range':
   drivers/staging/comedi/drivers/das16.c:1005:18: error: assignment of member 
'length' in read-only object
1005 |   lrange->length = 1;
 |  ^
   drivers/staging/comedi/drivers/das16.c:1006:10: warning: assignment discards 
'const' qualifier from pointer target type [-Wdiscarded-qualifiers]
1006 |   krange = lrange->range;
 |  ^


vim +/const +972 drivers/staging/comedi/drivers/das16.c

742c4a095973f69 H Hartley Sweeten 2015-01-12  949  
0ce8280e2876091 H Hartley Sweeten 2015-01-26  950  static const struct 
comedi_lrange *das16_ai_range(struct comedi_device *dev,
0ce8280e2876091 H Hartley Sweeten 2015-01-26  951   
  struct comedi_subdevice *s,
0ce8280e2876091 H Hartley Sweeten 2015-01-26  952   
  struct comedi_devconfig *it,
0ce8280e2876091 H Hartley Sweeten 2015-01-26  953   
  unsigned int pg_type,
0ce8280e2876091 H Hartley Sweeten 2015-01-26  954   
  unsigned int status)
0ce8280e2876091 H Hartley Sweeten 2015-01-26  955  {
0ce8280e2876091 H Hartley Sweeten 2015-01-26  956   unsigned int min = 
it->options[4];
0ce8280e2876091 H Hartley Sweeten 2015-01-26  957   unsigned int max = 
it->options[5];
0ce8280e2876091 H Hartley Sweeten 2015-01-26  958  
0ce8280e2876091 H Hartley Sweeten 2015-01-26  959   /* get any user-defined 
input range */
0ce8280e2876091 H Hartley Sweeten 2015-01-26  960   if (pg_type == 
das16_pg_none && (min || max)) {
fec78f1f56c0e63 chensong  2020-12-23  961   const struct 
comedi_lrange *lrange;
0ce8280e2876091 H Hartley Sweeten 2015-01-26  962   struct 
comedi_krange *krange;
0ce8280e2876091 H Hartley Sweeten 2015-01-26  963  
0ce8280e2876091 H Hartley Sweeten 2015-01-26  964   /* allocate 
single-range range table */
0ce8280e2876091 H Hartley Sweeten 2015-01-26  965   lrange = 
comedi_alloc_spriv(s,
0ce8280e2876091 H Hartley Sweeten 2015-01-26  966   
sizeof(*lrange) + sizeof(*krange));
0ce8280e2876091 H Hartley Sweeten 2015-01-26  967   if (!lrange)
0ce8280e2876091 H Hartley Sweeten 2015-01-26  968   return 
_unknown;
0ce8280e2876091 H Hartley Sweeten 2015-01-26  969  
0ce8280e2876091 H Hartley Sweeten 2015-01-26  970   /* initialize 
ai range */
0ce8280e2876091 H Hartley Sweeten 2015-01-26 @971   lrange->length 
= 1;
0ce8280e2876091 H Hartley Sweeten 2015-01-26 @972   krange = 
lrange->range;
0ce8280e2876091 H Hartley Sweeten 2015-01-26  973   krange->min = 
min;
0ce8280e2876091 H Hartley Sweeten 2015-01-26  974   krange->max = 
max;
0ce8280e2876091 H Hartley Sweeten 2015-01-26  975   krange->flags = 
UNIT_volt;
0ce8280e2876091 H Hartley Sweeten 2015-01-26  976  
0ce8280e2876091 H Hartley Sweeten 2015-01-26  977   return lrange;
0ce8280e2876091 H Hartley Sweeten 2015-01-26  978   }
0ce8280e2876091 H Hartley Sweeten 2015-01-26  979  
0ce8280e2876091 H Hartley Sweeten 2015-01-26  980   /*

[PATCH] fs: block_dev.c: fix kernel-doc warnings from struct block_device changes

Fix new kernel-doc warnings in fs/block_dev.c:

../fs/block_dev.c:1066: warning: Excess function parameter 'whole' description 
in 'bd_abort_claiming'
../fs/block_dev.c:1837: warning: Function parameter or member 'dev' not 
described in 'lookup_bdev'

Fixes: 4e7b5671c6a8 ("block: remove i_bdev")
Fixes: 37c3fc9abb25 ("block: simplify the block device claiming interface")
Signed-off-by: Randy Dunlap 
Cc: Jens Axboe 
Cc: Christoph Hellwig 
Cc: linux-fsde...@vger.kernel.org
Cc: Alexander Viro 
---
 fs/block_dev.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- lnx-511-rc1.orig/fs/block_dev.c
+++ lnx-511-rc1/fs/block_dev.c
@@ -1055,7 +1055,6 @@ static void bd_finish_claiming(struct bl
 /**
  * bd_abort_claiming - abort claiming of a block device
  * @bdev: block device of interest
- * @whole: whole block device
  * @holder: holder that has claimed @bdev
  *
  * Abort claiming of a block device when the exclusive open failed. This can be
@@ -1828,6 +1827,7 @@ const struct file_operations def_blk_fop
 /**
  * lookup_bdev  - lookup a struct block_device by name
  * @pathname:  special file representing the block device
+ * @dev:   return value of the block device's dev_t
  *
  * Get a reference to the blockdevice at @pathname in the current
  * namespace if possible and return it.  Return ERR_PTR(error)

[PATCH v2] PCI: dwc: Fix MSI not work after resume

2020-12-28 Thread Jisheng Zhang

After we move dw_pcie_msi_init() into core -- dw_pcie_host_init(), the
MSI stops working after resume. Because dw_pcie_host_init() is only
called once during probe. To fix this issue, we move dw_pcie_msi_init()
to dw_pcie_setup_rc().

Fixes: 59fbab1ae40e ("PCI: dwc: Move dw_pcie_msi_init() into core")
Signed-off-by: Jisheng Zhang 
---

Since v1:
 - rebased on 5.11-rc1
 - add Fixes tag

 drivers/pci/controller/dwc/pcie-designware-host.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c 
b/drivers/pci/controller/dwc/pcie-designware-host.c
index 8a84c005f32b..5240b5f0973d 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -423,7 +423,6 @@ int dw_pcie_host_init(struct pcie_port *pp)
}
 
dw_pcie_setup_rc(pp);
-   dw_pcie_msi_init(pp);
 
if (!dw_pcie_link_up(pci) && pci->ops->start_link) {
ret = pci->ops->start_link(pci);
@@ -574,6 +573,8 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
}
}
 
+   dw_pcie_msi_init(pp);
+
/* Setup RC BARs */
dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, 0x0004);
dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_1, 0x);
-- 
2.30.0.rc2

Re: [PATCH v2 16/17] driver core: Refactor fw_devlink feature

2020-12-28 Thread Michael Walle

> The current implementation of fw_devlink is very inefficient because it
> tries to get away without creating fwnode links in the name of saving
> memory usage. Past attempts to optimize runtime at the cost of memory
> usage were blocked with request for data showing that the optimization
> made significant improvement for real world scenarios.
> 
> We have those scenarios now. There have been several reports of boot
> time increase in the order of seconds in this thread [1]. Several OEMs
> and SoC manufacturers have also privately reported significant
> (350-400ms) increase in boot time due to all the parsing done by
> fw_devlink.
> 
> So this patch uses all the setup done by the previous patches in this
> series to refactor fw_devlink to be more efficient. Most of the code has
> been moved out of firmware specific (DT mostly) code into driver core.
> 
> This brings the following benefits:
> - Instead of parsing the device tree multiple times during bootup,
>   fw_devlink parses each fwnode node/property only once and creates
>   fwnode links. The rest of the fw_devlink code then just looks at these
>   fwnode links to do rest of the work.
> 
> - Makes it much easier to debug probe issue due to fw_devlink in the
>   future. fw_devlink=on blocks the probing of devices if they depend on
>   a device that hasn't been added yet. With this refactor, it'll be very
>   easy to tell what that device is because we now have a reference to
>   the fwnode of the device.
> 
> - Much easier to add fw_devlink support to ACPI and other firmware
>   types. A refactor to move the common bits from DT specific code to
>   driver core was in my TODO list as a prerequisite to adding ACPI
>   support to fw_devlink. This series gets that done.
> 
> [1] - 
> https://lore.kernel.org/linux-omap/ea02f57e-871d-cd16-4418-c1da4bbc4...@ti.com/
> Signed-off-by: Saravana Kannan 
> Tested-by: Laurent Pinchart 
> Tested-by: Grygorii Strashko 

git bisect show that this commit broke my board in 5.11-rc1:

[2.294375] sysfs: cannot create duplicate filename 
'/devices/virtual/devlink/:00:00.1--:00:00.1'
[2.303999] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 
5.11.0-rc1-00016-ga0fb284b267 #267
[2.312125] Hardware name: Kontron SMARC-sAL28 (4 Lane) (DT)
[2.317804] Call trace:
[2.320253]  dump_backtrace+0x0/0x1b8
[2.323936]  show_stack+0x20/0x70
[2.327263]  dump_stack+0xd8/0x134
[2.330677]  sysfs_warn_dup+0x6c/0x88
[2.334351]  sysfs_create_dir_ns+0xe8/0x100
[2.338547]  kobject_add_internal+0x9c/0x290
[2.342833]  kobject_add+0xa0/0x108
[2.346331]  device_add+0xfc/0x798
[2.349746]  device_link_add+0x454/0x5e0
[2.353682]  fw_devlink_create_devlink+0xb8/0xc8
[2.358316]  __fw_devlink_link_to_suppliers+0x84/0x180
[2.363474]  __fw_devlink_link_to_suppliers+0x134/0x180
[2.368718]  device_add+0x778/0x798
[2.372217]  device_register+0x28/0x38
[2.375979]  __mdiobus_register+0x94/0x340
[2.380089]  of_mdiobus_register+0xb4/0x380
[2.384285]  enetc_pf_probe+0x73c/0xb10
[2.388132]  local_pci_probe+0x48/0xb8
[2.391896]  pci_device_probe+0x120/0x1c0
[2.395920]  really_probe+0xec/0x3c0
[2.399505]  driver_probe_device+0x60/0xc0
[2.403614]  device_driver_attach+0x7c/0x88
[2.407810]  __driver_attach+0x60/0xe8
[2.411570]  bus_for_each_dev+0x7c/0xd0
[2.415419]  driver_attach+0x2c/0x38
[2.419004]  bus_add_driver+0x194/0x1f8
[2.422851]  driver_register+0x6c/0x128
[2.426698]  __pci_register_driver+0x4c/0x58
[2.430983]  enetc_pf_driver_init+0x2c/0x38
[2.435181]  do_one_initcall+0x54/0x2d8
[2.439029]  kernel_init_freeable+0x1fc/0x268
[2.443403]  kernel_init+0x1c/0x120
[2.446904]  ret_from_fork+0x10/0x30
[2.450502] kobject_add_internal failed for :00:00.1--:00:00.1 with 
-EEXIST, don't try to register things with the same name in the same directory.

Looks like it will generate that link twice? Let me know if I can help
testing.

See also: https://lavalab.kontron.com/scheduler/job/3894#L831

-michael

Re: [RFC please help] membarrier: Rewrite sync_core_before_usermode()

2020-12-28 Thread Nicholas Piggin

Excerpts from Andy Lutomirski's message of December 29, 2020 10:36 am:
> On Mon, Dec 28, 2020 at 4:11 PM Nicholas Piggin  wrote:
>>
>> Excerpts from Andy Lutomirski's message of December 28, 2020 4:28 am:
>> > The old sync_core_before_usermode() comments said that a non-icache-syncing
>> > return-to-usermode instruction is x86-specific and that all other
>> > architectures automatically notice cross-modified code on return to
>> > userspace.  Based on my general understanding of how CPUs work and based on
>> > my atttempt to read the ARM manual, this is not true at all.  In fact, x86
>> > seems to be a bit of an anomaly in the other direction: x86's IRET is
>> > unusually heavyweight for a return-to-usermode instruction.
>>
>> "sync_core_before_usermode" as I've said says nothing to arch, or to the
>> scheduler, or to membarrier.
> 
> Agreed.  My patch tries to fix this.  I agree that the name is bad and
> could be improved further.  We should define what
> membarrier(...SYNC_CORE) actually does and have arch hooks to make it
> happen.
> 
>> > So let's drop any pretense that we can have a generic way implementation
>> > behind membarrier's SYNC_CORE flush and require all architectures that opt
>> > in to supply their own.  This means x86, arm64, and powerpc for now.  Let's
>> > also rename the function from sync_core_before_usermode() to
>> > membarrier_sync_core_before_usermode() because the precise flushing details
>> > may very well be specific to membarrier, and even the concept of
>> > "sync_core" in the kernel is mostly an x86-ism.
>>
>> The concept of "sync_core" (x86: serializing instruction, powerpc: context
>> synchronizing instruction, etc) is not an x86-ism at all. x86 just wanted
>> to add a serializing instruction to generic code so it grew this nasty API,
>> but the concept applies broadly.
> 
> I mean that the mapping from the name "sync_core" to its semantics is
> x86 only.  The string "sync_core" appears in the kernel only in
> arch/x86, membarrier code, membarrier docs, and a single SGI driver
> that is x86-only.  Sure, the idea of serializing things is fairly
> generic, but exactly what operations serialize what, when things need
> serialization, etc is quite architecture specific.

Okay, well yes it's x86 only in name, I was more talking about the 
concept.

> Heck, on 486 you serialize the instruction stream with JMP.

x86-specific aside, I did think the semantics of a "serializing 
instruction" was reasonably well architected in x86. Sure it could do 
other things as well, but if you executed a serializing instruction,
then you had a decent set of guarantees (e.g., what you might want
for code modification).

> 
>> > +static inline void membarrier_sync_core_before_usermode(void)
>> > +{
>> > + /*
>> > +  * XXX: I know basically nothing about powerpc cache management.
>> > +  * Is this correct?
>> > +  */
>> > + isync();
>>
>> This is not about memory ordering or cache management, it's about
>> pipeline management. Powerpc's return to user mode serializes the
>> CPU (aka the hardware thread, _not_ the core; another wrongness of
>> the name, but AFAIKS the HW thread is what is required for
>> membarrier). So this is wrong, powerpc needs nothing here.
> 
> Fair enough.  I'm happy to defer to you on the powerpc details.  In
> any case, this just illustrates that we need feedback from a person
> who knows more about ARM64 than I do.
> 

Thanks,
Nick

Re: [PATCH 6/7] spi: cadence-quadspi: Wait at least 500 ms for direct reads

Hi Pratyush,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on spi/for-next]
[also build test WARNING on v5.11-rc1 next-20201223]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Pratyush-Yadav/spi-cadence-quadspi-Add-Octal-DTR-support/20201223-025328
base:   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
config: arm-randconfig-r006-20201221 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 
cee1e7d14f4628d6174b33640d502bff3b54ae45)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm cross compiling tool for clang build
# apt-get install binutils-arm-linux-gnueabi
# 
https://github.com/0day-ci/linux/commit/04a7bcbc449363e5d6f498376c69116567b49d7d
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
Pratyush-Yadav/spi-cadence-quadspi-Add-Octal-DTR-support/20201223-025328
git checkout 04a7bcbc449363e5d6f498376c69116567b49d7d
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

>> drivers/spi/spi-cadence-quadspi.c:966:24: warning: comparison of distinct 
>> pointer types ('typeof (len) *' (aka 'unsigned int *') and 'typeof (500UL) 
>> *' (aka 'unsigned long *')) [-Wcompare-distinct-pointer-types]
msecs_to_jiffies(max(len, 500UL 
{
 ^~~
   include/linux/minmax.h:58:19: note: expanded from macro 'max'
   #define max(x, y)   __careful_cmp(x, y, >)
   ^~
   include/linux/minmax.h:42:24: note: expanded from macro '__careful_cmp'
   __builtin_choose_expr(__safe_cmp(x, y), \
 ^~~~
   include/linux/minmax.h:32:4: note: expanded from macro '__safe_cmp'
   (__typecheck(x, y) && __no_side_effects(x, y))
^
   include/linux/minmax.h:18:28: note: expanded from macro '__typecheck'
   (!!(sizeof((typeof(x) *)1 == (typeof(y) *)1)))
  ~~ ^  ~~
   1 warning generated.


vim +966 drivers/spi/spi-cadence-quadspi.c

   919  
   920  static int cqspi_direct_read_execute(struct cqspi_flash_pdata *f_pdata,
   921   u_char *buf, loff_t from, size_t 
len)
   922  {
   923  struct cqspi_st *cqspi = f_pdata->cqspi;
   924  struct device *dev = >pdev->dev;
   925  enum dma_ctrl_flags flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
   926  dma_addr_t dma_src = (dma_addr_t)cqspi->mmap_phys_base + from;
   927  int ret = 0;
   928  struct dma_async_tx_descriptor *tx;
   929  dma_cookie_t cookie;
   930  dma_addr_t dma_dst;
   931  struct device *ddev;
   932  
   933  if (!cqspi->rx_chan || !virt_addr_valid(buf)) {
   934  memcpy_fromio(buf, cqspi->ahb_base + from, len);
   935  return 0;
   936  }
   937  
   938  ddev = cqspi->rx_chan->device->dev;
   939  dma_dst = dma_map_single(ddev, buf, len, DMA_FROM_DEVICE);
   940  if (dma_mapping_error(ddev, dma_dst)) {
   941  dev_err(dev, "dma mapping failed\n");
   942  return -ENOMEM;
   943  }
   944  tx = dmaengine_prep_dma_memcpy(cqspi->rx_chan, dma_dst, dma_src,
   945 len, flags);
   946  if (!tx) {
   947  dev_err(dev, "device_prep_dma_memcpy error\n");
   948  ret = -EIO;
   949  goto err_unmap;
   950  }
   951  
   952  tx->callback = cqspi_rx_dma_callback;
   953  tx->callback_param = cqspi;
   954  cookie = tx->tx_submit(tx);
   955  reinit_completion(>rx_dma_complete);
   956  
   957  ret = dma_submit_error(cookie);
   958  if (ret) {
   959  dev_err(dev, "dma_submit_error %d\n", cookie);
   960  ret = -EIO;
   961  goto err_unmap;
   962  }
   963  
   964  dma_async_issue_pending(cqspi->rx_chan);
   965  if (!wait_for_completion_timeout(>rx_dma_complete,
 > 966   msecs_to_jiffies(max(len, 
 > 500UL {
   967

[rcu:dev.2020.12.15b 130/134] include/linux/stddef.h:8:14: error: called object is not a function or function pointer

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git 
dev.2020.12.15b
head:   f895a17eec290b0038a6294d884a9cc92d7d6e80
commit: 7655dc620982c6505386efdaf975e6bde3c27afb [130/134] rcu-tasks: Use NULL 
pointer instead of empty show_rcu_tasks_*() functions
config: ia64-randconfig-r012-20201217 (attached as .config)
compiler: ia64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git/commit/?id=7655dc620982c6505386efdaf975e6bde3c27afb
git remote add rcu 
https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git
git fetch --no-tags rcu dev.2020.12.15b
git checkout 7655dc620982c6505386efdaf975e6bde3c27afb
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross 
ARCH=ia64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

   In file included from arch/ia64/include/asm/pgtable.h:154,
from include/linux/pgtable.h:6,
from arch/ia64/include/asm/uaccess.h:40,
from include/linux/uaccess.h:11,
from arch/ia64/include/asm/sections.h:11,
from include/linux/interrupt.h:20,
from kernel/rcu/update.c:25:
   arch/ia64/include/asm/mmu_context.h: In function 'reload_context':
   arch/ia64/include/asm/mmu_context.h:137:41: warning: variable 'old_rr4' set 
but not used [-Wunused-but-set-variable]
 137 |  unsigned long rr0, rr1, rr2, rr3, rr4, old_rr4;
 | ^~~
   In file included from include/uapi/linux/posix_types.h:5,
from include/uapi/linux/types.h:14,
from include/linux/types.h:6,
from kernel/rcu/update.c:20:
   kernel/rcu/tasks.h: In function 'show_rcu_tasks_gp_kthreads':
>> include/linux/stddef.h:8:14: error: called object is not a function or 
>> function pointer
   8 | #define NULL ((void *)0)
 |  ^
   kernel/rcu/rcu.h:554:40: note: in expansion of macro 'NULL'
 554 | #define show_rcu_tasks_rude_gp_kthread NULL
 |^~~~
   kernel/rcu/tasks.h:1222:2: note: in expansion of macro 
'show_rcu_tasks_rude_gp_kthread'
1222 |  show_rcu_tasks_rude_gp_kthread();
 |  ^~
>> include/linux/stddef.h:8:14: error: called object is not a function or 
>> function pointer
   8 | #define NULL ((void *)0)
 |  ^
   kernel/rcu/rcu.h:559:41: note: in expansion of macro 'NULL'
 559 | #define show_rcu_tasks_trace_gp_kthread NULL
 | ^~~~
   kernel/rcu/tasks.h:1223:2: note: in expansion of macro 
'show_rcu_tasks_trace_gp_kthread'
1223 |  show_rcu_tasks_trace_gp_kthread();
 |  ^~~


vim +8 include/linux/stddef.h

^1da177e4c3f415 Linus Torvalds   2005-04-16  6  
^1da177e4c3f415 Linus Torvalds   2005-04-16  7  #undef NULL
^1da177e4c3f415 Linus Torvalds   2005-04-16 @8  #define NULL ((void *)0)
6e2182874324727 Richard Knutsson 2006-09-30  9  

:: The code at line 8 was first introduced by commit
:: 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 Linux-2.6.12-rc2

:: TO: Linus Torvalds 
:: CC: Linus Torvalds 

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip

[PATCH v3 3/3] iommu/vt-d: Fix ineffective devTLB invalidation for subdevices

iommu_flush_dev_iotlb() is called to invalidate caches on device. It only
loops the devices which are full-attached to the domain. For sub-devices,
this is ineffective. This results in invalid caching entries left on the
device. Fix it by adding loop for subdevices as well. Also, the domain->
has_iotlb_device needs to be updated when attaching to subdevices.

Fixes: 67b8e02b5e761 ("iommu/vt-d: Aux-domain specific domain attach/detach")
Signed-off-by: Liu Yi L 
---
 drivers/iommu/intel/iommu.c | 53 ++---
 1 file changed, 37 insertions(+), 16 deletions(-)

diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index d7720a836268..d48a60b61ba6 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -719,6 +719,8 @@ static int domain_update_device_node(struct dmar_domain 
*domain)
return nid;
 }
 
+static void domain_update_iotlb(struct dmar_domain *domain);
+
 /* Some capabilities may be different across iommus */
 static void domain_update_iommu_cap(struct dmar_domain *domain)
 {
@@ -744,6 +746,8 @@ static void domain_update_iommu_cap(struct dmar_domain 
*domain)
domain->domain.geometry.aperture_end = 
__DOMAIN_MAX_ADDR(domain->gaw - 1);
else
domain->domain.geometry.aperture_end = 
__DOMAIN_MAX_ADDR(domain->gaw);
+
+   domain_update_iotlb(domain);
 }
 
 struct context_entry *iommu_context_addr(struct intel_iommu *iommu, u8 bus,
@@ -1464,17 +1468,22 @@ static void domain_update_iotlb(struct dmar_domain 
*domain)
 
assert_spin_locked(_domain_lock);
 
-   list_for_each_entry(info, >devices, link) {
-   struct pci_dev *pdev;
-
-   if (!info->dev || !dev_is_pci(info->dev))
-   continue;
-
-   pdev = to_pci_dev(info->dev);
-   if (pdev->ats_enabled) {
+   list_for_each_entry(info, >devices, link)
+   if (info && info->ats_enabled) {
has_iotlb_device = true;
break;
}
+
+   if (!has_iotlb_device) {
+   struct subdev_domain_info *sinfo;
+
+   list_for_each_entry(sinfo, >subdevices, link_domain) {
+   info = get_domain_info(sinfo->pdev);
+   if (info && info->ats_enabled) {
+   has_iotlb_device = true;
+   break;
+   }
+   }
}
 
domain->has_iotlb_device = has_iotlb_device;
@@ -1555,25 +1564,37 @@ static void iommu_disable_dev_iotlb(struct 
device_domain_info *info)
 #endif
 }
 
+static void __iommu_flush_dev_iotlb(struct device_domain_info *info,
+   u64 addr, unsigned int mask)
+{
+   u16 sid, qdep;
+
+   if (!info || !info->ats_enabled)
+   return;
+
+   sid = info->bus << 8 | info->devfn;
+   qdep = info->ats_qdep;
+   qi_flush_dev_iotlb(info->iommu, sid, info->pfsid,
+  qdep, addr, mask);
+}
+
 static void iommu_flush_dev_iotlb(struct dmar_domain *domain,
  u64 addr, unsigned mask)
 {
-   u16 sid, qdep;
unsigned long flags;
struct device_domain_info *info;
+   struct subdev_domain_info *sinfo;
 
if (!domain->has_iotlb_device)
return;
 
spin_lock_irqsave(_domain_lock, flags);
-   list_for_each_entry(info, >devices, link) {
-   if (!info->ats_enabled)
-   continue;
+   list_for_each_entry(info, >devices, link)
+   __iommu_flush_dev_iotlb(info, addr, mask);
 
-   sid = info->bus << 8 | info->devfn;
-   qdep = info->ats_qdep;
-   qi_flush_dev_iotlb(info->iommu, sid, info->pfsid,
-   qdep, addr, mask);
+   list_for_each_entry(sinfo, >subdevices, link_domain) {
+   __iommu_flush_dev_iotlb(get_domain_info(sinfo->pdev),
+   addr, mask);
}
spin_unlock_irqrestore(_domain_lock, flags);
 }
-- 
2.25.1

drivers/crypto/stm32/stm32-cryp.c:1232:47: sparse: sparse: incorrect type in argument 2 (different base types)

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   dea8dcf2a9fa8cc540136a6cd885c3beece16ec3
commit: bbb2832620ac4e136416aa97af7310636422dea9 crypto: stm32 - Fix sparse 
warnings
date:   4 months ago
config: arm-randconfig-s032-20201220 (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce:
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.3-184-g1b896707-dirty
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=bbb2832620ac4e136416aa97af7310636422dea9
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout bbb2832620ac4e136416aa97af7310636422dea9
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 
CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arm 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 


"sparse warnings: (new ones prefixed by >>)"
>> drivers/crypto/stm32/stm32-cryp.c:1232:47: sparse: sparse: incorrect type in 
>> argument 2 (different base types) @@ expected restricted __be32 
>> [usertype] *[assigned] iv @@ got unsigned int [usertype] * @@
   drivers/crypto/stm32/stm32-cryp.c:1232:47: sparse: expected restricted 
__be32 [usertype] *[assigned] iv
   drivers/crypto/stm32/stm32-cryp.c:1232:47: sparse: got unsigned int 
[usertype] *

vim +1232 drivers/crypto/stm32/stm32-cryp.c

9d3b5030bc1e44f Fabien DESSENNE 2018-02-07  1215  
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1216  static void 
stm32_cryp_check_ctr_counter(struct stm32_cryp *cryp)
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1217  {
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1218u32 cr;
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1219  
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1220if 
(unlikely(cryp->last_ctr[3] == 0x)) {
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1221
cryp->last_ctr[3] = 0;
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1222
cryp->last_ctr[2]++;
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1223if 
(!cryp->last_ctr[2]) {
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1224
cryp->last_ctr[1]++;
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1225if 
(!cryp->last_ctr[1])
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1226
cryp->last_ctr[0]++;
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1227}
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1228  
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1229cr = 
stm32_cryp_read(cryp, CRYP_CR);
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1230
stm32_cryp_write(cryp, CRYP_CR, cr & ~CR_CRYPEN);
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1231  
9e054ec21ef8344 Fabien DESSENNE 2017-10-19 @1232
stm32_cryp_hw_write_iv(cryp, (u32 *)cryp->last_ctr);
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1233  
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1234
stm32_cryp_write(cryp, CRYP_CR, cr);
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1235}
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1236  
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1237cryp->last_ctr[0] = 
stm32_cryp_read(cryp, CRYP_IV0LR);
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1238cryp->last_ctr[1] = 
stm32_cryp_read(cryp, CRYP_IV0RR);
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1239cryp->last_ctr[2] = 
stm32_cryp_read(cryp, CRYP_IV1LR);
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1240cryp->last_ctr[3] = 
stm32_cryp_read(cryp, CRYP_IV1RR);
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1241  }
9e054ec21ef8344 Fabien DESSENNE 2017-10-19  1242  

:: The code at line 1232 was first introduced by commit
:: 9e054ec21ef8344345b28603fb272fe999f735db crypto: stm32 - Support for 
STM32 CRYP crypto module

:: TO: Fabien DESSENNE 
:: CC: Herbert Xu 

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip

[PATCH v3 2/3] iommu/vt-d: Track device aux-attach with subdevice_domain_info

In the existing code, loop all devices attached to a domain does not
include sub-devices attached via iommu_aux_attach_device().

This was found by when I'm working on the belwo patch, There is no
device in the domain->devices list, thus unable to get the cap and
ecap of iommu unit. But this domain actually has subdevice which is
attached via aux-manner. But it is tracked by domain. This patch is
going to fix it.

https://lore.kernel.org/kvm/1599734733-6431-17-git-send-email-yi.l@intel.com/

And this fix goes beyond the patch above, such sub-device tracking is
necessary for other cases. For example, flushing device_iotlb for a
domain which has sub-devices attached by auxiliary manner.

Co-developed-by: Xin Zeng 
Signed-off-by: Xin Zeng 
Signed-off-by: Liu Yi L 
---
 drivers/iommu/intel/iommu.c | 95 +++--
 include/linux/intel-iommu.h | 16 +--
 2 files changed, 82 insertions(+), 29 deletions(-)

diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index 788119c5b021..d7720a836268 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -1877,6 +1877,7 @@ static struct dmar_domain *alloc_domain(int flags)
domain->flags |= DOMAIN_FLAG_USE_FIRST_LEVEL;
domain->has_iotlb_device = false;
INIT_LIST_HEAD(>devices);
+   INIT_LIST_HEAD(>subdevices);
 
return domain;
 }
@@ -2547,7 +2548,7 @@ static struct dmar_domain 
*dmar_insert_one_dev_info(struct intel_iommu *iommu,
info->iommu = iommu;
info->pasid_table = NULL;
info->auxd_enabled = 0;
-   INIT_LIST_HEAD(>auxiliary_domains);
+   INIT_LIST_HEAD(>subdevices);
 
if (dev && dev_is_pci(dev)) {
struct pci_dev *pdev = to_pci_dev(info->dev);
@@ -4475,33 +4476,61 @@ is_aux_domain(struct device *dev, struct iommu_domain 
*domain)
domain->type == IOMMU_DOMAIN_UNMANAGED;
 }
 
-static void auxiliary_link_device(struct dmar_domain *domain,
- struct device *dev)
+static inline struct subdev_domain_info *
+lookup_subdev_info(struct dmar_domain *domain, struct device *dev)
+{
+   struct subdev_domain_info *sinfo;
+
+   if (!list_empty(>subdevices)) {
+   list_for_each_entry(sinfo, >subdevices, link_domain) {
+   if (sinfo->pdev == dev)
+   return sinfo;
+   }
+   }
+
+   return NULL;
+}
+
+static int auxiliary_link_device(struct dmar_domain *domain,
+struct device *dev)
 {
struct device_domain_info *info = get_domain_info(dev);
+   struct subdev_domain_info *sinfo = lookup_subdev_info(domain, dev);
 
assert_spin_locked(_domain_lock);
if (WARN_ON(!info))
-   return;
+   return -EINVAL;
+
+   if (!sinfo) {
+   sinfo = kzalloc(sizeof(*sinfo), GFP_ATOMIC);
+   sinfo->domain = domain;
+   sinfo->pdev = dev;
+   list_add(>link_phys, >subdevices);
+   list_add(>link_domain, >subdevices);
+   }
 
-   domain->auxd_refcnt++;
-   list_add(>auxd, >auxiliary_domains);
+   return ++sinfo->users;
 }
 
-static void auxiliary_unlink_device(struct dmar_domain *domain,
-   struct device *dev)
+static int auxiliary_unlink_device(struct dmar_domain *domain,
+  struct device *dev)
 {
struct device_domain_info *info = get_domain_info(dev);
+   struct subdev_domain_info *sinfo = lookup_subdev_info(domain, dev);
+   int ret;
 
assert_spin_locked(_domain_lock);
-   if (WARN_ON(!info))
-   return;
+   if (WARN_ON(!info || !sinfo || sinfo->users <= 0))
+   return -EINVAL;
 
-   list_del(>auxd);
-   domain->auxd_refcnt--;
+   ret = --sinfo->users;
+   if (!ret) {
+   list_del(>link_phys);
+   list_del(>link_domain);
+   kfree(sinfo);
+   }
 
-   if (!domain->auxd_refcnt && domain->default_pasid > 0)
-   ioasid_put(domain->default_pasid);
+   return ret;
 }
 
 static int aux_domain_add_dev(struct dmar_domain *domain,
@@ -4530,6 +4559,19 @@ static int aux_domain_add_dev(struct dmar_domain *domain,
}
 
spin_lock_irqsave(_domain_lock, flags);
+   ret = auxiliary_link_device(domain, dev);
+   if (ret <= 0)
+   goto link_failed;
+
+   /*
+* Subdevices from the same physical device can be attached to the
+* same domain. For such cases, only the first subdevice attachment
+* needs to go through the full steps in this function. So if ret >
+* 1, just goto out.
+*/
+   if (ret > 1)
+   goto out;
+
/*
 * iommu->lock must be held to attach domain to iommu and setup the
 * pasid entry for second level translation.
@@ -4548,10 +4590,9

[PATCH] wireless/cfg80211: fix multiple kernel-doc build warnings

Fix 19 warnings like this:

../include/net/cfg80211.h:1759: warning: Cannot understand  * @struct 
cfg80211_sar_chan_ranges - sar frequency ranges

Fixes: 6bdb68cef7bf ("nl80211: add common API to configure SAR power 
limitations")
Signed-off-by: Randy Dunlap 
Cc: Johannes Berg 
Cc: linux-wirel...@vger.kernel.org
Cc: Kalle Valo 
Cc: Carl Huang 
---
 include/net/cfg80211.h |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- lnx-511-rc1.orig/include/net/cfg80211.h
+++ lnx-511-rc1/include/net/cfg80211.h
@@ -1756,7 +1756,7 @@ struct cfg80211_sar_specs {
 
 
 /**
- * @struct cfg80211_sar_chan_ranges - sar frequency ranges
+ * struct cfg80211_sar_chan_ranges - sar frequency ranges
  * @start_freq:  start range edge frequency
  * @end_freq:end range edge frequency
  */

[PATCH v3 0/3] iommu/vt-d: Misc fixes on scalable mode

Hi Baolu, Joerg, Will,

This patchset aims to fix a bug regards to native SVM usage, and
also several bugs around subdevice (attached to device via auxiliary
manner) tracking and ineffective device_tlb flush.

v2 -> v3:
- Address comments from Baolu Lu against v2
- Rebased to 5.11-rc1
v2: 
https://lore.kernel.org/linux-iommu/20201223062720.29364-1-yi.l@intel.com/

v1 -> v2:
- Use a more recent Fix tag in "iommu/vt-d: Move intel_iommu info from struct 
intel_svm to struct intel_svm_dev"
- Refined the "iommu/vt-d: Track device aux-attach with subdevice_domain_info"
- Rename "iommu/vt-d: A fix to iommu_flush_dev_iotlb() for aux-domain" to be
  "iommu/vt-d: Fix ineffective devTLB invalidation for subdevices"
- Refined the commit messages
v1: 
https://lore.kernel.org/linux-iommu/2020122352.183523-1-yi.l@intel.com/

Liu Yi L (3):
  iommu/vt-d: Move intel_iommu info from struct intel_svm to struct
intel_svm_dev
  iommu/vt-d: Track device aux-attach with subdevice_domain_info
  iommu/vt-d: Fix ineffective devTLB invalidation for subdevices

 drivers/iommu/intel/iommu.c | 148 ++--
 drivers/iommu/intel/svm.c   |   9 ++-
 include/linux/intel-iommu.h |  18 +++--
 3 files changed, 125 insertions(+), 50 deletions(-)

-- 
2.25.1

[PATCH v3 1/3] iommu/vt-d: Move intel_iommu info from struct intel_svm to struct intel_svm_dev

Current struct intel_svm has a field to record the struct intel_iommu
pointer for a PASID bind. And struct intel_svm will be shared by all
the devices bind to the same process. The devices may be behind different
DMAR units. As the iommu driver code uses the intel_iommu pointer stored
in intel_svm struct to do cache invalidations, it may only flush the cache
on a single DMAR unit, for others, the cache invalidation is missed.

As intel_svm struct already has a device list, this patch just moves the
intel_iommu pointer to be a field of intel_svm_dev struct.

Fixes: 1c4f88b7f1f92 ("iommu/vt-d: Shared virtual address in scalable mode")
Cc: Lu Baolu 
Cc: Jacob Pan 
Cc: Raj Ashok 
Cc: David Woodhouse 
Reported-by: Guo Kaijie 
Reported-by: Xin Zeng 
Signed-off-by: Guo Kaijie 
Signed-off-by: Xin Zeng 
Signed-off-by: Liu Yi L 
---
 drivers/iommu/intel/svm.c   | 9 +
 include/linux/intel-iommu.h | 2 +-
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c
index 4fa248b98031..69566695d032 100644
--- a/drivers/iommu/intel/svm.c
+++ b/drivers/iommu/intel/svm.c
@@ -142,7 +142,7 @@ static void intel_flush_svm_range_dev (struct intel_svm 
*svm, struct intel_svm_d
}
desc.qw2 = 0;
desc.qw3 = 0;
-   qi_submit_sync(svm->iommu, , 1, 0);
+   qi_submit_sync(sdev->iommu, , 1, 0);
 
if (sdev->dev_iotlb) {
desc.qw0 = QI_DEV_EIOTLB_PASID(svm->pasid) |
@@ -166,7 +166,7 @@ static void intel_flush_svm_range_dev (struct intel_svm 
*svm, struct intel_svm_d
}
desc.qw2 = 0;
desc.qw3 = 0;
-   qi_submit_sync(svm->iommu, , 1, 0);
+   qi_submit_sync(sdev->iommu, , 1, 0);
}
 }
 
@@ -211,7 +211,7 @@ static void intel_mm_release(struct mmu_notifier *mn, 
struct mm_struct *mm)
 */
rcu_read_lock();
list_for_each_entry_rcu(sdev, >devs, list)
-   intel_pasid_tear_down_entry(svm->iommu, sdev->dev,
+   intel_pasid_tear_down_entry(sdev->iommu, sdev->dev,
svm->pasid, true);
rcu_read_unlock();
 
@@ -363,6 +363,7 @@ int intel_svm_bind_gpasid(struct iommu_domain *domain, 
struct device *dev,
}
sdev->dev = dev;
sdev->sid = PCI_DEVID(info->bus, info->devfn);
+   sdev->iommu = iommu;
 
/* Only count users if device has aux domains */
if (iommu_dev_feature_enabled(dev, IOMMU_DEV_FEAT_AUX))
@@ -546,6 +547,7 @@ intel_svm_bind_mm(struct device *dev, unsigned int flags,
goto out;
}
sdev->dev = dev;
+   sdev->iommu = iommu;
 
ret = intel_iommu_enable_pasid(iommu, dev);
if (ret) {
@@ -575,7 +577,6 @@ intel_svm_bind_mm(struct device *dev, unsigned int flags,
kfree(sdev);
goto out;
}
-   svm->iommu = iommu;
 
if (pasid_max > intel_pasid_max_id)
pasid_max = intel_pasid_max_id;
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index d956987ed032..94522685a0d9 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -758,6 +758,7 @@ struct intel_svm_dev {
struct list_head list;
struct rcu_head rcu;
struct device *dev;
+   struct intel_iommu *iommu;
struct svm_dev_ops *ops;
struct iommu_sva sva;
u32 pasid;
@@ -771,7 +772,6 @@ struct intel_svm {
struct mmu_notifier notifier;
struct mm_struct *mm;
 
-   struct intel_iommu *iommu;
unsigned int flags;
u32 pasid;
int gpasid; /* In case that guest PASID is different from host PASID */
-- 
2.25.1

Re: [PATCH net-next v2 5/6] bcm63xx_enet: convert to build_skb




On 12/24/2020 6:24 AM, Sieng Piaw Liew wrote:
> We can increase the efficiency of rx path by using buffers to receive
> packets then build SKBs around them just before passing into the network
> stack. In contrast, preallocating SKBs too early reduces CPU cache
> efficiency.
> 
> Check if we're in NAPI context when refilling RX. Normally we're almost
> always running in NAPI context. Dispatch to napi_alloc_frag directly
> instead of relying on netdev_alloc_frag which does the same but
> with the overhead of local_bh_disable/enable.
> 
> Tested on BCM6328 320 MHz and iperf3 -M 512 to measure packet/sec
> performance. Included netif_receive_skb_list and NET_IP_ALIGN
> optimizations.
> 
> Before:
> [ ID] Interval   Transfer Bandwidth   Retr
> [  4]   0.00-10.00  sec  49.9 MBytes  41.9 Mbits/sec  197 sender
> [  4]   0.00-10.00  sec  49.3 MBytes  41.3 Mbits/secreceiver
> 
> After:
> [ ID] Interval   Transfer Bandwidth   Retr
> [  4]   0.00-30.00  sec   171 MBytes  47.8 Mbits/sec  272 sender
> [  4]   0.00-30.00  sec   170 MBytes  47.6 Mbits/secreceiver

This looks good, however there are a few nits and suggestions below:

[snip]

> @@ -862,6 +868,24 @@ static void bcm_enet_adjust_link(struct net_device *dev)
>   priv->pause_tx ? "tx" : "off");
>  }
>  
> +static void bcm_enet_free_rx_buf_ring(struct device *kdev, struct 
> bcm_enet_priv *priv)
> +{
> + int i;
> +
> + for (i = 0; i < priv->rx_ring_size; i++) {
> + struct bcm_enet_desc *desc;
> +
> + if (!priv->rx_buf[i])
> + continue;
> +
> + desc = >rx_desc_cpu[i];
> + dma_unmap_single(kdev, desc->address, priv->rx_buf_size,
> +  DMA_FROM_DEVICE);
> + skb_free_frag(priv->rx_buf[i]);
> + }
> + kfree(priv->rx_buf);
> +}

This is a good helper to introduced, however I would introduce it as a
preliminary patch that way it becomes clear when you are doing the
sk_buff to buf substitution in the next patch.

[snip]

> @@ -1640,9 +1641,12 @@ static int bcm_enet_change_mtu(struct net_device *dev, 
> int new_mtu)
>* align rx buffer size to dma burst len, account FCS since
>* it's appended
>*/
> - priv->rx_skb_size = ALIGN(actual_mtu + ETH_FCS_LEN,
> + priv->rx_buf_size = ALIGN(actual_mtu + ETH_FCS_LEN,
> priv->dma_maxburst * 4);
>  
> + priv->rx_frag_size = SKB_DATA_ALIGN(priv->rx_buf_offset + 
> priv->rx_buf_size)
> + + SKB_DATA_ALIGN(sizeof(struct 
> skb_shared_info));

The alignment of the second line is a bit off and you should aim for the
+ operator to be on the preceding line, and have SKB_DATA_ALIGN() start
on the opening parenthesis of the preceding line.
-- 
Florian

Re: [PATCH net-next v2 6/6] bcm63xx_enet: improve rx loop




On 12/24/2020 6:24 AM, Sieng Piaw Liew wrote:
> Use existing rx processed count to track against budget, thereby making
> budget decrement operation redundant.
> 
> rx_desc_count can be calculated outside the rx loop, making the loop a
> bit smaller.
> 
> Signed-off-by: Sieng Piaw Liew 

Acked-by: Florian Fainelli 
-- 
Florian

Re: [PATCH net-next v2 4/6] bcm63xx_enet: alloc rx skb with NET_IP_ALIGN




On 12/24/2020 6:24 AM, Sieng Piaw Liew wrote:
> Use netdev_alloc_skb_ip_align on newer SoCs with integrated switch
> (enetsw) when refilling RX. Increases packet processing performance
> by 30% (with netif_receive_skb_list).
> 
> Non-enetsw SoCs cannot function with the extra pad so continue to use
> the regular netdev_alloc_skb.
> 
> Tested on BCM6328 320 MHz and iperf3 -M 512 to measure packet/sec
> performance.
> 
> Before:
> [ ID] Interval Transfer Bandwidth Retr
> [ 4] 0.00-30.00 sec 120 MBytes 33.7 Mbits/sec 277 sender
> [ 4] 0.00-30.00 sec 120 MBytes 33.5 Mbits/sec receiver
> 
> After (+netif_receive_skb_list):
> [ 4] 0.00-30.00 sec 155 MBytes 43.3 Mbits/sec 354 sender
> [ 4] 0.00-30.00 sec 154 MBytes 43.1 Mbits/sec receiver
> 
> Signed-off-by: Sieng Piaw Liew 

Acked-by: Florian Fainelli 
-- 
Florian

Re: [PATCH net-next v2 3/6] bcm63xx_enet: add xmit_more support




On 12/24/2020 6:24 AM, Sieng Piaw Liew wrote:
> Support bulking hardware TX queue by using netdev_xmit_more().
> 
> Signed-off-by: Sieng Piaw Liew 

Acked-by: Florian Fainelli 
-- 
Florian

[PATCH] mm: rectify a page bad reason

2020-12-28 Thread Rongwei Wang

Hi

When I was doing some memory-related projects, it always reported error
"nonzero mapcount", but its judgment condition was that _mapcount was not equal
to -1, so I felt the original string was a bit inappropriate, so I tried to
update it.

Signed-off-by: Rongwei Wang 
---
 mm/page_alloc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index 7a2c89b..57d7f26 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -1114,7 +1114,7 @@ static const char *page_bad_reason(struct page *page, 
unsigned long flags)
const char *bad_reason = NULL;
 
if (unlikely(atomic_read(>_mapcount) != -1))
-   bad_reason = "nonzero mapcount";
+   bad_reason = "non-(-1) _mapcount";
if (unlikely(page->mapping != NULL))
bad_reason = "non-NULL mapping";
if (unlikely(page_ref_count(page) != 0))
-- 
1.8.3.1

Re: [PATCH net-next v2 2/6] bcm63xx_enet: add BQL support




On 12/24/2020 6:24 AM, Sieng Piaw Liew wrote:
> Add Byte Queue Limits support to reduce/remove bufferbloat in
> bcm63xx_enet.
> 
> Signed-off-by: Sieng Piaw Liew 

Acked-by: Florian Fainelli 
-- 
Florian

Re: [PATCH net-next v2 1/6] bcm63xx_enet: batch process rx path