Re: [PATCH 64/64] i2c: reword i2c_algorithm in drivers according to newest specification
On 22/03/2024 at 14:25, Wolfram Sang wrote: EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe Match the wording in i2c_algorithm in I2C drivers wrt. the newest I2C v7, SMBus 3.2, I3C specifications and replace "master/slave" with more appropriate terms. For some drivers, this means no more conversions are needed. For the others more work needs to be done but this will be performed incrementally along with API changes/improvements. All these changes here are simple search/replace results. Signed-off-by: Wolfram Sang --- [..] drivers/i2c/busses/i2c-at91-master.c | 2 +- drivers/i2c/busses/i2c-at91-slave.c| 8 [..] Acked-by: Nicolas Ferre # for at91 Probably file names themselves will need some care, in a second time. Thanks. Regards, Nicolas [..] -- 2.43.0
Re: [GIT PULL] ARM: at91: dt for 5.13
Arnd, On 08/04/2021 at 22:15, Arnd Bergmann wrote: On Thu, Apr 8, 2021 at 6:35 PM Nicolas Ferre wrote: On 08/04/2021 at 17:24, Arnd Bergmann wrote: Oh, got it: it's the upper case letter withing the etm hex address. I used this one to mach what was done in the reg property. I'm fixing both of them and sending the patch to the ml right now. Ok Tell me if I add it to a subsequent pull-request or if you prefer to take it the soonest in order to not generate additional warnings upstream. I'd like to have it before the merge window, but don't bother making it an additional pull request if you already plan for another pull request with 5.13 material. I don't plan to make another PR on DT for 5.13 so I would like you to take it as a patch. https://lore.kernel.org/linux-arm-kernel/20210408164443.38941-1-nicolas.fe...@microchip.com/ Thanks for your help. Best regards, Nicolas -- Nicolas Ferre
Re: [GIT PULL] ARM: at91: dt for 5.13
Hi Arnd, On 08/04/2021 at 17:24, Arnd Bergmann wrote: From: Arnd Bergmann On Wed, 7 Apr 2021 13:44:15 +0200, nicolas.fe...@microchip.com wrote: Arnd, Olof, Here is first batch of dt changes for 5.13. Please pull. Thanks, best regards, Nicolas The following changes since commit a38fd8748464831584a19438cbb3082b5a2dab15: [...] Merged into arm/dt, thanks! I saw two new warnings from 'make dtbs_check W=1': arch/arm/boot/dts/at91-sama5d2_ptc_ek.dt.yaml: /: 'etm@73C000' does not match any of the regexes: '@(0|[1-9a-f][0-9a-f]*)$', '^[^@]+$', 'pinctrl-[0-9]+' arch/arm/boot/dts/at91-kizbox3-hs.dt.yaml: /: 'etm@73C000' does not match any of the regexes: '@(0|[1-9a-f][0-9a-f]*)$', '^[^@]+$', 'pinctrl-[0-9]+' Oh, got it: it's the upper case letter withing the etm hex address. I used this one to mach what was done in the reg property. I'm fixing both of them and sending the patch to the ml right now. Tell me if I add it to a subsequent pull-request or if you prefer to take it the soonest in order to not generate additional warnings upstream. BTW, I now have a dtschema at the proper level of support for running "make dtbs_check W=1" and will do it before sending pull-requests in the future. Thanks for the heads-up. Best regards, Nicolas merge commit: e2b064fec8e49112f7dac779fcec12ded40728c2 Arnd -- Nicolas Ferre
Re: [PATCH 22/24] ARM: at91: sama7: introduce sama7 SoC family
Hi,
On 31/03/2021 at 12:59, Claudiu Beznea wrote:
From: Eugen Hristev
Introduce new family of SoCs, sama7, and first SoC, sama7g5.
Signed-off-by: Eugen Hristev
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/Makefile | 1 +
arch/arm/mach-at91/sama7.c | 48 +
2 files changed, 49 insertions(+)
create mode 100644 arch/arm/mach-at91/sama7.c
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index f565490f1b70..6cc6624cddac 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_SOC_AT91SAM9) += at91sam9.o
obj-$(CONFIG_SOC_SAM9X60) += sam9x60.o
obj-$(CONFIG_SOC_SAMA5) += sama5.o
obj-$(CONFIG_SOC_SAMV7) += samv7.o
+obj-$(CONFIG_SOC_SAMA7)+= sama7.o
Nit: alphabetic order tells that it should be before samv7
# Power Management
obj-$(CONFIG_ATMEL_PM)+= pm.o pm_suspend.o
diff --git a/arch/arm/mach-at91/sama7.c b/arch/arm/mach-at91/sama7.c
new file mode 100644
index ..e04cadb569ad
--- /dev/null
+++ b/arch/arm/mach-at91/sama7.c
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Setup code for SAMA7
+ *
+ * Copyright (C) 2021 Microchip Technology, Inc. and its subsidiaries
+ *
+ */
+
+#include
+#include
+
+#include
+#include
+
+#include "generic.h"
+
+static void __init sama7_common_init(void)
+{
+ of_platform_default_populate(NULL, NULL, NULL);
+}
+
+static void __init sama7_dt_device_init(void)
+{
+ sama7_common_init();
+}
+
+static const char *const sama7_dt_board_compat[] __initconst = {
+ "microchip,sama7",
+ NULL
+};
+
+DT_MACHINE_START(sama7_dt, "Microchip SAMA7")
+ /* Maintainer: Microchip */
+ .init_machine = sama7_dt_device_init,
+ .dt_compat = sama7_dt_board_compat,
+MACHINE_END
+
+static const char *const sama7g5_dt_board_compat[] __initconst = {
+ "microchip,sama7g5",
+ NULL
+};
+
+DT_MACHINE_START(sama7g5_dt, "Microchip SAMA7G5")
+ /* Maintainer: Microchip */
+ .init_machine = sama7_dt_device_init,
+ .dt_compat = sama7g5_dt_board_compat,
+MACHINE_END
I'm not sure we need two DT_MACHINE_START() entries and associated
functions right now. Probably the most generic one is sufficient.
We can add such distinction in the future if the need arises.
Regards,
Nicolas
--
Nicolas Ferre
Re: [PATCH 22/24] ARM: at91: sama7: introduce sama7 SoC family
On 01/04/2021 at 12:24, Claudiu Beznea - M18063 wrote:
On 01.04.2021 12:38, Claudiu Beznea - M18063 wrote:
On 31.03.2021 19:01, Alexandre Belloni wrote:
EXTERNAL EMAIL: Do not click links or open attachments unless you know the
content is safe
On 31/03/2021 13:59:06+0300, Claudiu Beznea wrote:
From: Eugen Hristev
Introduce new family of SoCs, sama7, and first SoC, sama7g5.
Signed-off-by: Eugen Hristev
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/Makefile | 1 +
arch/arm/mach-at91/sama7.c | 48 +
2 files changed, 49 insertions(+)
create mode 100644 arch/arm/mach-at91/sama7.c
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index f565490f1b70..6cc6624cddac 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_SOC_AT91SAM9)+= at91sam9.o
obj-$(CONFIG_SOC_SAM9X60)+= sam9x60.o
obj-$(CONFIG_SOC_SAMA5) += sama5.o
obj-$(CONFIG_SOC_SAMV7) += samv7.o
+obj-$(CONFIG_SOC_SAMA7) += sama7.o
# Power Management
obj-$(CONFIG_ATMEL_PM) += pm.o pm_suspend.o
diff --git a/arch/arm/mach-at91/sama7.c b/arch/arm/mach-at91/sama7.c
new file mode 100644
index ..e04cadb569ad
--- /dev/null
+++ b/arch/arm/mach-at91/sama7.c
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Setup code for SAMA7
+ *
+ * Copyright (C) 2021 Microchip Technology, Inc. and its subsidiaries
+ *
+ */
+
+#include
+#include
+
+#include
+#include
+
+#include "generic.h"
+
+static void __init sama7_common_init(void)
+{
+ of_platform_default_populate(NULL, NULL, NULL);
Is this necessary? This is left as a workaround for the old SoCs using
pinctrl-at91. I guess this will be using pio4 so this has to be removed.
OK, I'll have a look. BTW, SAMA5D2 which is also using PIO4 calls
of_platform_default_populate(NULL, NULL, NULL);
Without this call the PM code (arch/arm/mach-at/pm.c) is not able to locate
proper DT nodes:
[0.194615] at91_pm_backup_init: failed to find securam device!
[0.201393] at91_pm_sram_init: failed to find sram device!
[0.207449] AT91: PM not supported, due to no SRAM allocated
Okay, so we can't afford removing these calls to sama5d2 and upcoming
sama7g5 right now.
Is it a common pattern to have to reach DT content in the early stages
that explicit call to of_platform_default_populate() tries to solve?
Best regards,
Nicolas
+}
+
+static void __init sama7_dt_device_init(void)
+{
+ sama7_common_init();
+}
+
+static const char *const sama7_dt_board_compat[] __initconst = {
+ "microchip,sama7",
+ NULL
+};
+
+DT_MACHINE_START(sama7_dt, "Microchip SAMA7")
+ /* Maintainer: Microchip */
+ .init_machine = sama7_dt_device_init,
+ .dt_compat = sama7_dt_board_compat,
+MACHINE_END
+
+static const char *const sama7g5_dt_board_compat[] __initconst = {
+ "microchip,sama7g5",
+ NULL
+};
+
+DT_MACHINE_START(sama7g5_dt, "Microchip SAMA7G5")
+ /* Maintainer: Microchip */
+ .init_machine = sama7_dt_device_init,
+ .dt_compat = sama7g5_dt_board_compat,
+MACHINE_END
+
--
2.25.1
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
--
Nicolas Ferre
Re: [PATCH 1/1] net: macb: restore cmp registers on resume path
On 02/04/2021 at 14:42, Claudiu Beznea wrote:
Restore CMP screener registers on resume path.
Fixes: c1e85c6ce57ef ("net: macb: save/restore the remaining registers and
features")
Signed-off-by: Claudiu Beznea
Acked-by: Nicolas Ferre
Thanks for this fix Claudiu. Best regards,
Nicolas
---
drivers/net/ethernet/cadence/macb_main.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/ethernet/cadence/macb_main.c
index f56f3dbbc015..ffd56a23f8b0 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -3269,6 +3269,9 @@ static void gem_prog_cmp_regs(struct macb *bp, struct
ethtool_rx_flow_spec *fs)
bool cmp_b = false;
bool cmp_c = false;
+ if (!macb_is_gem(bp))
+ return;
+
tp4sp_v = &(fs->h_u.tcp_ip4_spec);
tp4sp_m = &(fs->m_u.tcp_ip4_spec);
@@ -3637,6 +3640,7 @@ static void macb_restore_features(struct macb *bp)
{
struct net_device *netdev = bp->dev;
netdev_features_t features = netdev->features;
+ struct ethtool_rx_fs_item *item;
/* TX checksum offload */
macb_set_txcsum_feature(bp, features);
@@ -3645,6 +3649,9 @@ static void macb_restore_features(struct macb *bp)
macb_set_rxcsum_feature(bp, features);
/* RX Flow Filters */
+ list_for_each_entry(item, >rx_fs_list.list, list)
+ gem_prog_cmp_regs(bp, >fs);
+
macb_set_rxflow_feature(bp, features);
}
--
Nicolas Ferre
Re: [PATCH] power: reset: at91-reset: free resources on exit path
On 01/04/2021 at 16:42, Claudiu Beznea - M18063 wrote:
+unmap:
+ iounmap(reset->rstc_base);
+ for (idx = 0; idx < ARRAY_SIZE(reset->ramc_base); idx++)
+ iounmap(reset->ramc_base[idx]);
But if we keep this loop, I have the feeling that some kind of
"of_node_put()" is needed as well.
No! In the loop:
for_each_matching_node_and_match(np, at91_ramc_of_match, ) {
reset->ramc_lpr = (u32)match->data;
reset->ramc_base[idx] = of_iomap(np, 0);
if (!reset->ramc_base[idx]) {
dev_err(>dev, "Could not map ram controller address\n");
of_node_put(np);
ret = -ENODEV;
goto unmap;
}
idx++;
}
the of_node_put() is needed only if the loop is interrupted as the macro:
for_each_matching_node_and_match() is defined as follows:
#define for_each_matching_node_and_match(dn, matches, match) \
for (dn = of_find_matching_node_and_match(NULL, matches, match); \
dn; dn = of_find_matching_node_and_match(dn, matches, match))
and of_find_matching_node_and_match() will return a np with refcount
incremented but at the next loop step the of_find_matching_node_and_match()
will be called with the same np pointer and the np refcount will be
decremented.
struct device_node *of_find_matching_node_and_match(
struct device_node *from,
const struct of_device_id *matches,
const struct of_device_id **match)
{
// ...
of_node_put(from);
// ...
}
Oh yes you're right Claudiu, I overlooked this one. Thanks for the
in-depth explanation.
Best regards,
Nicolas
--
Nicolas Ferre
Re: [RESEND PATCH 1/5] clk: at91: re-factor clocks suspend/resume
On 31/03/2021 at 10:47, Claudiu Beznea - M18063 wrote:
On 30.03.2021 20:14, Nicolas Ferre wrote:
On 24/03/2021 at 10:43, Claudiu Beznea wrote:
SAMA5D2 and SAMA7G5 have a special power saving mode (backup mode) where
most of the SoC's components are powered off (including PMC). Resuming
from this mode is done with the help of bootloader. Peripherals are not
aware of the power saving mode thus most of them are disabling clocks in
proper suspend API and re-enable them in resume API without taking into
account the previously setup rate. Moreover some of the peripherals are
acting as wakeup sources and are not disabling the clocks in this
scenario, when suspending. Since backup mode cuts the power for
peripherals, in resume part these clocks needs to be re-configured.
The initial PMC suspend/resume code was designed with SAMA5D2's PMC
in mind. SAMA7G's PMC is different (few new functionalities, different
registers offsets, different offsets in registers for each
functionalities). To address both SAMA5D2 and SAMA7G5 PMC add
.save_context()/.resume_context() support to each clocks driver and call
this from PMC driver.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/clk-generated.c | 45 +--
drivers/clk/at91/clk-main.c | 66 ++
drivers/clk/at91/clk-master.c | 183 ++--
drivers/clk/at91/clk-peripheral.c | 38 +-
drivers/clk/at91/clk-pll.c | 37 ++
drivers/clk/at91/clk-programmable.c | 29 -
drivers/clk/at91/clk-sam9x60-pll.c | 68 ++-
drivers/clk/at91/clk-system.c | 20 +++
drivers/clk/at91/clk-usb.c | 27
drivers/clk/at91/clk-utmi.c | 47 ++-
drivers/clk/at91/pmc.c | 149 ++
drivers/clk/at91/pmc.h | 24 ++--
12 files changed, 554 insertions(+), 179 deletions(-)
diff --git a/drivers/clk/at91/clk-generated.c
b/drivers/clk/at91/clk-generated.c
index b4fc8d71daf2..0e436f9e7508 100644
--- a/drivers/clk/at91/clk-generated.c
+++ b/drivers/clk/at91/clk-generated.c
@@ -27,6 +27,7 @@ struct clk_generated {
u32 id;
u32 gckdiv;
const struct clk_pcr_layout *layout;
+ struct at91_clk_pms pms;
u8 parent_id;
int chg_pid;
};
@@ -34,25 +35,34 @@ struct clk_generated {
#define to_clk_generated(hw) \
container_of(hw, struct clk_generated, hw)
-static int clk_generated_enable(struct clk_hw *hw)
+static int clk_generated_set(struct clk_generated *gck, int status)
{
- struct clk_generated *gck = to_clk_generated(hw);
unsigned long flags;
- pr_debug("GCLK: %s, gckdiv = %d, parent id = %d\n",
- __func__, gck->gckdiv, gck->parent_id);
-
spin_lock_irqsave(gck->lock, flags);
regmap_write(gck->regmap, gck->layout->offset,
(gck->id & gck->layout->pid_mask));
regmap_update_bits(gck->regmap, gck->layout->offset,
AT91_PMC_PCR_GCKDIV_MASK | gck->layout->gckcss_mask |
- gck->layout->cmd | AT91_PMC_PCR_GCKEN,
+ gck->layout->cmd | (status ? AT91_PMC_PCR_GCKEN : 0),
update_bits is already a compact version of read/modify/write, I think it
doesn't need another lever of density.
I wouldn't include this test operator here.
Having the check of status here allows to have a single function, namely
clk_generated_set() for enable, disable that could be used in in clock
enable/disable APIs but also on suspend/resume function. To avoid the
checking as, a first solution I see using another local variable that does
what the test operator is doing here:
unsigned int x = status ? AT91_PMC_PCR_GCKEN : 0;
and then:
regmap_update_bits(gck->regmap, gck->layout->offset,
AT91_PMC_PCR_GCKDIV_MASK | gck->layout->gckcss_mask |
- gck->layout->cmd | AT91_PMC_PCR_GCKEN,
+ gck->layout->cmd | x,
Would you prefer having another local variable and doing like this?
Yes, you can add as many local variables with explicit names as you
like. I think it's valuable for readability, which is always better for
maintenance.
You can even build these variables in several steps and use them
afteward in the regmap_update_bits() function.
I _feel_ that the compiler will anyway manage to optimize all this very
well and produce a very similar result.
field_prep(gck->layout->gckcss_mask, gck->parent_id) |
This previous line tells us that the parameters for this function were
aleardy crowded, this additional change is the trigger for telling...
"it's too much!" ;-)
gck->layout->cmd |
FIELD_PREP(AT91_PMC_PCR_GCKDIV_MASK, gck->gckdiv) |
- AT91_PMC_PCR_GCKEN);
+ (status ? AT91_PMC_PCR_GCKEN : 0));
Ditto
spin_unlock_irqrestore(gck
Re: [PATCH] power: reset: at91-reset: free resources on exit path
On 09/02/2021 at 12:01, Claudiu Beznea wrote:
Free resources on exit path (failure path of probe and remove).
I'm not sure we can use this driver as a module anyway.
Otherwise, it looks fine, but isn't it possible to use devm_of_iomap(),
even in loop, and avoid having to deal with exit path?
Reported-by: kernel test robot
Reported-by: Dan Carpenter
Signed-off-by: Claudiu Beznea
---
drivers/power/reset/at91-reset.c | 25 -
1 file changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/power/reset/at91-reset.c b/drivers/power/reset/at91-reset.c
index 3ff9d93a5226..2ff7833153b6 100644
--- a/drivers/power/reset/at91-reset.c
+++ b/drivers/power/reset/at91-reset.c
@@ -206,7 +206,8 @@ static int __init at91_reset_probe(struct platform_device
*pdev)
if (!reset->ramc_base[idx]) {
dev_err(>dev, "Could not map ram controller
address\n");
of_node_put(np);
- return -ENODEV;
+ ret = -ENODEV;
+ goto unmap;
}
idx++;
}
@@ -218,13 +219,15 @@ static int __init at91_reset_probe(struct platform_device
*pdev)
reset->args = (u32)match->data;
reset->sclk = devm_clk_get(>dev, NULL);
- if (IS_ERR(reset->sclk))
- return PTR_ERR(reset->sclk);
+ if (IS_ERR(reset->sclk)) {
+ ret = PTR_ERR(reset->sclk);
+ goto unmap;
+ }
ret = clk_prepare_enable(reset->sclk);
if (ret) {
dev_err(>dev, "Could not enable slow clock\n");
- return ret;
+ goto unmap;
}
platform_set_drvdata(pdev, reset);
@@ -239,21 +242,33 @@ static int __init at91_reset_probe(struct platform_device
*pdev)
ret = register_restart_handler(>nb);
if (ret) {
clk_disable_unprepare(reset->sclk);
- return ret;
+ goto unmap;
}
at91_reset_status(pdev, reset->rstc_base);
return 0;
+
+unmap:
+ iounmap(reset->rstc_base);
+ for (idx = 0; idx < ARRAY_SIZE(reset->ramc_base); idx++)
+ iounmap(reset->ramc_base[idx]);
But if we keep this loop, I have the feeling that some kind of
"of_node_put()" is needed as well.
+
+ return ret;
}
static int __exit at91_reset_remove(struct platform_device *pdev)
{
struct at91_reset *reset = platform_get_drvdata(pdev);
+ int idx;
unregister_restart_handler(>nb);
clk_disable_unprepare(reset->sclk);
+ iounmap(reset->rstc_base);
+ for (idx = 0; idx < ARRAY_SIZE(reset->ramc_base); idx++)
+ iounmap(reset->ramc_base[idx]);
Ditto
+
return 0;
}
--
Nicolas Ferre
Re: [PATCH] clk: at91: Trivial typo fixes in the file sama7g5.c
On 13/03/2021 at 06:32, Bhaskar Chowdhury wrote:
s/critial/critical/ ..two different places
s/parrent/parent/
Signed-off-by: Bhaskar Chowdhury
Acked-by: Nicolas Ferre
---
drivers/clk/at91/sama7g5.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index a6e20b35960e..9e1ec48c4474 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -166,7 +166,7 @@ static const struct {
.c = _characteristics,
.t = PLL_TYPE_FRAC,
/*
- * This feeds syspll_divpmcck which may feed critial parts
+ * This feeds syspll_divpmcck which may feed critical parts
* of the systems like timers. Therefore it should not be
* disabled.
*/
@@ -178,7 +178,7 @@ static const struct {
.c = _characteristics,
.t = PLL_TYPE_DIV,
/*
- * This may feed critial parts of the systems like timers.
+ * This may feed critical parts of the systems like timers.
* Therefore it should not be disabled.
*/
.f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
@@ -455,7 +455,7 @@ static const struct {
* @pp:PLL parents
* @pp_mux_table: PLL parents mux table
* @r: clock output range
- * @pp_chg_id: id in parrent array of changeable PLL parent
+ * @pp_chg_id: id in parent array of changeable PLL parent
* @pp_count: PLL parents count
* @id:clock id
*/
--
2.26.2
--
Nicolas Ferre
Re: [RESEND PATCH 3/5] clk: at91: sama7g5: add securam's peripheral clock
On 24/03/2021 at 10:43, Claudiu Beznea wrote:
Add SECURAM's peripheral clock.
Signed-off-by: Claudiu Beznea
Acked-by: Nicolas Ferre
---
drivers/clk/at91/sama7g5.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index a6e20b35960e..28e26fb90417 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -377,6 +377,7 @@ static const struct {
u8 id;
} sama7g5_periphck[] = {
{ .n = "pioA_clk",.p = "mck0", .id = 11, },
+ { .n = "securam_clk", .p = "mck0", .id = 18, },
{ .n = "sfr_clk", .p = "mck1", .id = 19, },
{ .n = "hsmc_clk",.p = "mck1", .id = 21, },
{ .n = "xdmac0_clk", .p = "mck1", .id = 22, },
Thanks,
Nicolas
--
Nicolas Ferre
Re: [RESEND PATCH 4/5] clk: at91: clk-master: add register definition for sama7g5's master clock
, flags); hw = >hw; diff --git a/include/linux/clk/at91_pmc.h b/include/linux/clk/at91_pmc.h index a4f82e836a7c..ccb3f034bfa9 100644 --- a/include/linux/clk/at91_pmc.h +++ b/include/linux/clk/at91_pmc.h @@ -137,6 +137,32 @@ #define AT91_PMC_PLLADIV2_ON(1 << 12) #define AT91_PMC_H32MXDIV BIT(24) +#define AT91_PMC_MCR_V2 0x30/* Master Clock Register [SAMA7G5 only] */ +#defineAT91_PMC_MCR_V2_ID_MSK (0xF) +#defineAT91_PMC_MCR_V2_ID(_id) ((_id) & AT91_PMC_MCR_V2_ID_MSK) +#defineAT91_PMC_MCR_V2_CMD (1 << 7) +#defineAT91_PMC_MCR_V2_DIV (7 << 8) +#defineAT91_PMC_MCR_V2_DIV1(0 << 8) +#defineAT91_PMC_MCR_V2_DIV2(1 << 8) +#defineAT91_PMC_MCR_V2_DIV4(2 << 8) +#defineAT91_PMC_MCR_V2_DIV8(3 << 8) +#defineAT91_PMC_MCR_V2_DIV16 (4 << 8) +#defineAT91_PMC_MCR_V2_DIV32 (5 << 8) +#defineAT91_PMC_MCR_V2_DIV64 (6 << 8) +#defineAT91_PMC_MCR_V2_DIV3(7 << 8) +#defineAT91_PMC_MCR_V2_CSS (0x1F << 16) +#defineAT91_PMC_MCR_V2_CSS_MD_SLCK (0 << 16) +#defineAT91_PMC_MCR_V2_CSS_TD_SLCK (1 << 16) +#defineAT91_PMC_MCR_V2_CSS_MAINCK (2 << 16) +#defineAT91_PMC_MCR_V2_CSS_MCK0(3 << 16) +#defineAT91_PMC_MCR_V2_CSS_SYSPLL (5 << 16) +#defineAT91_PMC_MCR_V2_CSS_DDRPLL (6 << 16) +#defineAT91_PMC_MCR_V2_CSS_IMGPLL (7 << 16) +#defineAT91_PMC_MCR_V2_CSS_BAUDPLL (8 << 16) +#defineAT91_PMC_MCR_V2_CSS_AUDIOPLL(9 << 16) +#define AT91_PMC_MCR_V2_CSS_ETHPLL (10 << 16) +#defineAT91_PMC_MCR_V2_EN (1 << 28) + #define AT91_PMC_XTALF0x34/* Main XTAL Frequency Register [SAMA7G5 only] */ #define AT91_PMC_USB 0x38 /* USB Clock Register [some SAM9 only] */ Autherwise, it's fine. Thanks. Best regards, Nicolas -- Nicolas Ferre
Re: [RESEND PATCH 1/5] clk: at91: re-factor clocks suspend/resume
regmap_write(pmcreg, AT91_PMC_PCKR(num), pmc_cache.pckr[num]);
- }
-
- if (pmc_cache.uckr & AT91_PMC_UPLLEN)
- mask |= AT91_PMC_LOCKU;
-
- while (!pmc_ready(mask))
- cpu_relax();
+ clk_restore_context();
}
I like how it simplify this part! Good.
static struct syscore_ops pmc_syscore_ops = {
- .suspend = pmc_suspend,
- .resume = pmc_resume,
+ .suspend = at91_pmc_suspend,
+ .resume = at91_pmc_resume,
};
static const struct of_device_id sama5d2_pmc_dt_ids[] = {
@@ -265,12 +136,8 @@ static int __init pmc_register_ops(void)
np = of_find_matching_node(NULL, sama5d2_pmc_dt_ids);
if (!np)
- return -ENODEV;
-
- pmcreg = device_node_to_regmap(np);
+ return 0;
of_node_put(np);
- if (IS_ERR(pmcreg))
- return PTR_ERR(pmcreg);
register_syscore_ops(_syscore_ops);
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index a49076c804a9..86580ebd9ad9 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -13,6 +13,8 @@
#include
#include
+#include
+
extern spinlock_t pmc_pcr_lock;
struct pmc_data {
@@ -98,6 +100,20 @@ struct clk_pcr_layout {
u32 pid_mask;
};
+/**
+ * struct at91_clk_pms - Power management state for AT91 clock
+ * @status: clock status (enabled or disabled)
+ * @parent: clock parent index
+ * @parent_rate: clock parent rate
+ * @rate: clock rate
+ */
+struct at91_clk_pms {
+ unsigned int status;
+ unsigned int parent;
+ unsigned long parent_rate;
+ unsigned long rate;
+};
+
#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1))
#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask))
@@ -248,12 +264,4 @@ struct clk_hw * __init
at91_clk_sama7g5_register_utmi(struct regmap *regmap, const char *name,
const char *parent_name);
-#ifdef CONFIG_PM
-void pmc_register_id(u8 id);
-void pmc_register_pck(u8 pck);
-#else
-static inline void pmc_register_id(u8 id) {}
-static inline void pmc_register_pck(u8 pck) {}
-#endif
-
#endif /* __PMC_H_ */
--
Nicolas Ferre
Re: [PATCH] ARM: boot: dts: Fix a typo
On 18/03/2021 at 10:52, Bhaskar Chowdhury wrote:
s/conlicts/conflicts/
Signed-off-by: Bhaskar Chowdhury
Acked-by: Nicolas Ferre
---
arch/arm/boot/dts/sama5d3.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 7c979652f330..d1841bffe3c5 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -709,7 +709,7 @@ pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
atmel,pins =
; /* PD8 periph A MCI0_DA7 with
pullup, conflicts with PWML3 */
};
};
--
2.26.2
--
Nicolas Ferre
Re: [PATCH] ARM: dts: at91-sama5d27_som1: fix phy address to 7
Alexander, Ahmad,
On 23/03/2021 at 11:55, Ahmad Fatoum wrote:
Hello Alexander,
On 23.03.21 11:45, Alexander Dahl wrote:
Hei hei,
I could not get ethernet to work on SAMA5D27-SOM1-EK1 with kernels v5.10 and
v5.11 built by a recent ptxdist based DistroKit BSP, while it used to work with
an older v4.19 kernel. Just applying this patch to the tree made ethernet
working again, thus:
Tested-by: Alexander Dahl
Not sure why it worked with that older kernel, though.
Thanks for investigating! Seems that somehow PHY broadcast worked on this
board with older kernels (and current barebox), but no longer does with
newer kernels.
A bisection could shed some light onto what broke this.
As the KSZ8081 driver disables broadcast in the phy config init, this change
looks appropriate regardless. The fixes tag doesn't refer to an upstream
commit though. This should probably read:
Fixes: af690fa37e39 ("ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1
support")
I didn't noticed that on my side.
With this addressed:
Reviewed-by: Ahmad Fatoum
Thanks a lot for your feedback.
You could send a proper patch and stick your S-o-b under it.
Actually this patch is already in arm-soc tree here:
https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git/commit/?h=arm/fixes=221c3a09ddf70a0a51715e6c2878d8305e95c558
So I cannot add tags anymore to it, sorry.
Best regards,
Nicolas
I added Ahmad to Cc, he added board support to DistroKit for that board, and
might want to know. And I added the devicetree list to Cc, I wondered why the
patch was not there and get_maintainers.pl proposed it.
Thanks for fixing this and greetings
Alex
nicolas.fe...@microchip.com hat am 17.02.2021 12:38 geschrieben:
From: Claudiu Beznea
Fix the phy address to 7 for Ethernet PHY on SAMA5D27 SOM1. No
connection established if phy address 0 is used.
The board uses the 24 pins version of the KSZ8081RNA part, KSZ8081RNA
pin 16 REFCLK as PHYAD bit [2] has weak internal pull-down. But at
reset, connected to PD09 of the MPU it's connected with an internal
pull-up forming PHYAD[2:0] = 7.
Signed-off-by: Claudiu Beznea
Fixes: 2f61929eb10a ("ARM: dts: at91: at91-sama5d27_som1: fix PHY ID")
Cc: Ludovic Desroches
Signed-off-by: Nicolas Ferre
Cc: # 4.14+
---
arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
index 1b1163858b1d..e3251f3e3eaa 100644
--- a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
+++ b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
@@ -84,8 +84,8 @@ macb0: ethernet@f8008000 {
pinctrl-0 = <_macb0_default>;
phy-mode = "rmii";
-ethernet-phy@0 {
-reg = <0x0>;
+ethernet-phy@7 {
+reg = <0x7>;
interrupt-parent = <>;
interrupts = ;
pinctrl-names = "default";
--
2.30.0
___
linux-arm-kernel mailing list
linux-arm-ker...@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
--
Nicolas Ferre
Re: [PATCH 1/2] dt-bindings: mchp-eic: add bindings
On 02/03/2021 at 11:28, Claudiu Beznea wrote: Add DT bindings for Microchip External Interrupt Controller. Signed-off-by: Claudiu Beznea --- .../interrupt-controller/mchp,eic.yaml| 74 +++ Nitpicking: use full vendor name in binding file name: microchip,eic.yaml 1 file changed, 74 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mchp,eic.yaml [..] Regards, -- Nicolas Ferre
Re: [PATCH] ARM: configs: at91: enable drivers for sam9x60
On 05/02/2021 at 11:12, Tudor Ambarus - M18064 wrote: On 2/5/21 11:54 AM, Claudiu Beznea wrote: Enable drivers for sam9x60/sam9x60-ek: - shutdown controller - CAN - AT24 EEPROM (present on SAM9X60-EK) - MCP23S08 (present on SAM9X60-EK) - AES, TDES, SHA Crypto IPs are present only sam9x60. Should we have them as modules? That's fine with me if we keep them as built-in. Acked-by: Nicolas Ferre Regards, Nicolas And use "make savedefconfig". Signed-off-by: Claudiu Beznea With or without the Crypto IPs as modules: Reviewed-by: Tudor Ambarus --- arch/arm/configs/at91_dt_defconfig | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig index 5f3415c743ec..e274f8c492d2 100644 --- a/arch/arm/configs/at91_dt_defconfig +++ b/arch/arm/configs/at91_dt_defconfig @@ -17,8 +17,6 @@ CONFIG_SOC_SAM9X60=y # CONFIG_ATMEL_CLOCKSOURCE_PIT is not set CONFIG_AEABI=y CONFIG_UACCESS_WITH_MEMCPY=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_ARM_APPENDED_DTB=y CONFIG_ARM_ATAG_DTB_COMPAT=y CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x2110,25165824 root=/dev/ram0 rw" @@ -38,6 +36,8 @@ CONFIG_IP_PNP_BOOTP=y CONFIG_IP_PNP_RARP=y # CONFIG_INET_DIAG is not set CONFIG_IPV6_SIT_6RD=y +CONFIG_CAN=y +CONFIG_CAN_AT91=y CONFIG_CFG80211=y CONFIG_MAC80211=y CONFIG_DEVTMPFS=y @@ -58,6 +58,7 @@ CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=4 CONFIG_BLK_DEV_RAM_SIZE=8192 CONFIG_ATMEL_SSC=y +CONFIG_EEPROM_AT24=m CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y # CONFIG_SCSI_LOWLEVEL is not set @@ -91,7 +92,6 @@ CONFIG_RT2800USB_UNKNOWN=y CONFIG_RTL8187=m CONFIG_RTL8192CU=m # CONFIG_RTLWIFI_DEBUG is not set -CONFIG_INPUT_POLLDEV=y CONFIG_INPUT_JOYDEV=y CONFIG_INPUT_EVDEV=y # CONFIG_KEYBOARD_ATKBD is not set @@ -111,8 +111,8 @@ CONFIG_I2C_GPIO=y CONFIG_SPI=y CONFIG_SPI_ATMEL=y CONFIG_SPI_ATMEL_QUADSPI=y +CONFIG_PINCTRL_MCP23S08=m CONFIG_POWER_RESET=y -# CONFIG_POWER_RESET_AT91_SAMA5D2_SHDWC is not set CONFIG_POWER_SUPPLY=y # CONFIG_HWMON is not set CONFIG_WATCHDOG=y @@ -208,7 +208,9 @@ CONFIG_NLS_UTF8=y CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_USER_API_HASH=m CONFIG_CRYPTO_USER_API_SKCIPHER=m -# CONFIG_CRYPTO_HW is not set +CONFIG_CRYPTO_DEV_ATMEL_AES=y +CONFIG_CRYPTO_DEV_ATMEL_TDES=y +CONFIG_CRYPTO_DEV_ATMEL_SHA=y CONFIG_CRC_CCITT=y CONFIG_FONTS=y CONFIG_FONT_8x8=y -- 2.7.4 ___ linux-arm-kernel mailing list linux-arm-ker...@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- Nicolas Ferre
Re: [PATCH] ARM: at91: use proper asm syntax in pm_suspend
On 04/02/2021 at 17:01, Arnd Bergmann wrote:
From: Arnd Bergmann
Compiling with the clang integrated assembler warns about
a recently added instruction:
:14:13: error: unknown token in expression
ldr tmp1, =#0x00020010UL
arch/arm/mach-at91/pm_suspend.S:542:2: note: while in macro instantiation
at91_plla_enable
Remove the extra '#' character that is not used for the 'ldr'
instruction when doing an indirect load of a constant.
Fixes: 4fd36e458392 ("ARM: at91: pm: add plla disable/enable support for
sam9x60")
Signed-off-by: Arnd Bergmann
Looks good to me:
Acked-by: Nicolas Ferre
Thanks!
Best regards,
Nicolas
---
arch/arm/mach-at91/pm_suspend.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index 909856c8a8c6..0d467cc40129 100644
--- a/arch/arm/mach-at91/pm_suspend.S
+++ b/arch/arm/mach-at91/pm_suspend.S
@@ -446,7 +446,7 @@ ENDPROC(at91_backup_mode)
str tmp1, [pmc, #AT91_PMC_PLL_UPDT]
/* step 2. */
- ldr tmp1, =#AT91_PMC_PLL_ACR_DEFAULT_PLLA
+ ldr tmp1, =AT91_PMC_PLL_ACR_DEFAULT_PLLA
str tmp1, [pmc, #AT91_PMC_PLL_ACR]
/* step 3. */
--
2.29.2
--
Nicolas Ferre
Re: [PATCH] drivers: soc: atmel: fix type for same7
On 04/02/2021 at 16:52, Alexandre Belloni wrote:
On 04/02/2021 16:49:25+0100, Arnd Bergmann wrote:
From: Arnd Bergmann
A missing comma caused a build failure:
drivers/soc/atmel/soc.c:196:24: error: too few arguments provided to
function-like macro invocation
Fixes: af3a10513cd6 ("drivers: soc: atmel: add per soc id and version match
masks")
Signed-off-by: Arnd Bergmann
Acked-by: Alexandre Belloni
Thanks Arnd, thanks Alexandre.
As you realized, we didn't compiled with MMU-less types of configuration
(CONFIG_SOC_SAMV7), sorry about that!
Best regards,
Nicolas
---
It is broken in the soc tree at the moment, I can pick up
the fix directly if I get an Ack
---
drivers/soc/atmel/soc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/atmel/soc.c b/drivers/soc/atmel/soc.c
index a2967846809f..a490ad7e090f 100644
--- a/drivers/soc/atmel/soc.c
+++ b/drivers/soc/atmel/soc.c
@@ -191,7 +191,7 @@ static const struct at91_soc socs[] __initconst = {
AT91_SOC(SAME70Q20_CIDR_MATCH, AT91_CIDR_MATCH_MASK,
AT91_CIDR_VERSION_MASK, SAME70Q20_EXID_MATCH,
"same70q20", "same7"),
- AT91_SOC(SAME70Q19_CIDR_MATCH, AT91_CIDR_MATCH_MASK
+ AT91_SOC(SAME70Q19_CIDR_MATCH, AT91_CIDR_MATCH_MASK,
AT91_CIDR_VERSION_MASK, SAME70Q19_EXID_MATCH,
"same70q19", "same7"),
AT91_SOC(SAMS70Q21_CIDR_MATCH, AT91_CIDR_MATCH_MASK,
--
2.29.2
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
--
Nicolas Ferre
Re: [PATCH] clk: at91: Fix the declaration of the clocks
On 03/02/2021 at 16:43, Tudor Ambarus wrote:
These are all "early clocks" that require initialization just at
of_clk_init() time. Use CLK_OF_DECLARE() to declare them.
This also fixes a problem that was spotted when fw_devlink was
set to 'on' by default: the boards failed to boot. The reason is
that CLK_OF_DECLARE_DRIVER() clears the OF_POPULATED and causes
the consumers of the clock to be postponed by fw_devlink until
the second initialization routine of the clock has been completed.
One of the consumers of the clock is the timer, which is used as a
clocksource, and needs the clock initialized early. Postponing the
timers caused the fail at boot.
Signed-off-by: Tudor Ambarus
Looks good to me:
Acked-by: Nicolas Ferre
Thanks for the fix Tudor! Best regards,
Nicolas
---
Tested on sama5d2_xplained.
drivers/clk/at91/at91rm9200.c | 3 +--
drivers/clk/at91/at91sam9260.c | 16
drivers/clk/at91/at91sam9g45.c | 3 +--
drivers/clk/at91/at91sam9n12.c | 3 +--
drivers/clk/at91/at91sam9rl.c | 3 ++-
drivers/clk/at91/at91sam9x5.c | 20 ++--
drivers/clk/at91/sama5d2.c | 3 ++-
drivers/clk/at91/sama5d3.c | 2 +-
drivers/clk/at91/sama5d4.c | 3 ++-
9 files changed, 28 insertions(+), 28 deletions(-)
diff --git a/drivers/clk/at91/at91rm9200.c b/drivers/clk/at91/at91rm9200.c
index 0fad1009f315..428a6f4b9ebc 100644
--- a/drivers/clk/at91/at91rm9200.c
+++ b/drivers/clk/at91/at91rm9200.c
@@ -215,5 +215,4 @@ static void __init at91rm9200_pmc_setup(struct device_node
*np)
* deferring properly. Once this is fixed, this can be switched to a platform
* driver.
*/
-CLK_OF_DECLARE_DRIVER(at91rm9200_pmc, "atmel,at91rm9200-pmc",
- at91rm9200_pmc_setup);
+CLK_OF_DECLARE(at91rm9200_pmc, "atmel,at91rm9200-pmc", at91rm9200_pmc_setup);
diff --git a/drivers/clk/at91/at91sam9260.c b/drivers/clk/at91/at91sam9260.c
index ceb5495f723a..b29843bea278 100644
--- a/drivers/clk/at91/at91sam9260.c
+++ b/drivers/clk/at91/at91sam9260.c
@@ -491,26 +491,26 @@ static void __init at91sam9260_pmc_setup(struct
device_node *np)
{
at91sam926x_pmc_setup(np, _data);
}
-CLK_OF_DECLARE_DRIVER(at91sam9260_pmc, "atmel,at91sam9260-pmc",
- at91sam9260_pmc_setup);
+
+CLK_OF_DECLARE(at91sam9260_pmc, "atmel,at91sam9260-pmc",
at91sam9260_pmc_setup);
static void __init at91sam9261_pmc_setup(struct device_node *np)
{
at91sam926x_pmc_setup(np, _data);
}
-CLK_OF_DECLARE_DRIVER(at91sam9261_pmc, "atmel,at91sam9261-pmc",
- at91sam9261_pmc_setup);
+
+CLK_OF_DECLARE(at91sam9261_pmc, "atmel,at91sam9261-pmc",
at91sam9261_pmc_setup);
static void __init at91sam9263_pmc_setup(struct device_node *np)
{
at91sam926x_pmc_setup(np, _data);
}
-CLK_OF_DECLARE_DRIVER(at91sam9263_pmc, "atmel,at91sam9263-pmc",
- at91sam9263_pmc_setup);
+
+CLK_OF_DECLARE(at91sam9263_pmc, "atmel,at91sam9263-pmc",
at91sam9263_pmc_setup);
static void __init at91sam9g20_pmc_setup(struct device_node *np)
{
at91sam926x_pmc_setup(np, _data);
}
-CLK_OF_DECLARE_DRIVER(at91sam9g20_pmc, "atmel,at91sam9g20-pmc",
- at91sam9g20_pmc_setup);
+
+CLK_OF_DECLARE(at91sam9g20_pmc, "atmel,at91sam9g20-pmc",
at91sam9g20_pmc_setup);
diff --git a/drivers/clk/at91/at91sam9g45.c b/drivers/clk/at91/at91sam9g45.c
index 0214333dedd3..15da0dfe3ef2 100644
--- a/drivers/clk/at91/at91sam9g45.c
+++ b/drivers/clk/at91/at91sam9g45.c
@@ -228,5 +228,4 @@ static void __init at91sam9g45_pmc_setup(struct device_node
*np)
* The TCB is used as the clocksource so its clock is needed early. This means
* this can't be a platform driver.
*/
-CLK_OF_DECLARE_DRIVER(at91sam9g45_pmc, "atmel,at91sam9g45-pmc",
- at91sam9g45_pmc_setup);
+CLK_OF_DECLARE(at91sam9g45_pmc, "atmel,at91sam9g45-pmc",
at91sam9g45_pmc_setup);
diff --git a/drivers/clk/at91/at91sam9n12.c b/drivers/clk/at91/at91sam9n12.c
index f9db5316a7f1..7fe435f4b46b 100644
--- a/drivers/clk/at91/at91sam9n12.c
+++ b/drivers/clk/at91/at91sam9n12.c
@@ -255,5 +255,4 @@ static void __init at91sam9n12_pmc_setup(struct device_node
*np)
* The TCB is used as the clocksource so its clock is needed early. This means
* this can't be a platform driver.
*/
-CLK_OF_DECLARE_DRIVER(at91sam9n12_pmc, "atmel,at91sam9n12-pmc",
- at91sam9n12_pmc_setup);
+CLK_OF_DECLARE(at91sam9n12_pmc, "atmel,at91sam9n12-pmc",
at91sam9n12_pmc_setup);
diff --git a/drivers/clk/at91/at91sam9rl.c b/drivers/clk/at91/at91sam9rl.c
index 66736e03cfef..ecbabf5162bd 100644
--- a/drivers/clk/at91/at91sam9rl.c
+++ b/drivers/clk/at91/at91sam9rl.c
@@ -186,4 +186,5 @@ static void __init at91sam9rl_pmc_setup(struct device_node
*np)
err_free:
kfree(at91sam9rl_pmc);
}
-CLK_OF_DECLARE
Re: [PATCH 0/7] drivers: soc: atmel: add support for sama7g5
On 22/01/2021 at 13:21, Claudiu Beznea wrote: Hi, This series adds support for SAMA7G5 identification. Along with this included also some fixes. Thank you, Claudiu Beznea Claudiu Beznea (7): drivers: soc: atmel: add spdx licence identifier I leave this one aside for now. drivers: soc: atmel: use GENMASK drivers: soc: atmel: fix "__initconst should be placed after socs[]" warning drivers: soc: atmel: add null entry at the end of This one was taken by Arnd in arm-soc/arm/fixes branch. at91_soc_allowed_list[] drivers: soc: atmel: add per soc id and version match masks dt-bindings: atmel-sysreg: add "microchip,sama7g5-chipid" drivers: soc: atmel: add support for sama7g5 For the rest: Acked-by: Nicolas Ferre I take the rest in at91-soc branch. It appears in at91-next right now. Once the license patch is done, I can integrate it easily. Best regards, Nicolas .../devicetree/bindings/arm/atmel-sysregs.txt | 2 +- drivers/soc/atmel/soc.c| 225 ++--- drivers/soc/atmel/soc.h| 14 +- 3 files changed, 171 insertions(+), 70 deletions(-) -- Nicolas Ferre
Re: [PATCH v2 1/7] drivers: soc: atmel: add spdx license identifier
On 26/01/2021 at 10:29, Claudiu Beznea wrote: Add SPDX-License-Identifier. Signed-off-by: Claudiu Beznea Acked-by: Nicolas Ferre I remove license boilerplate text now that it's useless and queue this one on top of at91-soc. Thanks, best regards, Nicolas --- drivers/soc/atmel/soc.c | 1 + drivers/soc/atmel/soc.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/soc/atmel/soc.c b/drivers/soc/atmel/soc.c index 2dc86728b132..755a82502ef4 100644 --- a/drivers/soc/atmel/soc.c +++ b/drivers/soc/atmel/soc.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2015 Atmel * diff --git a/drivers/soc/atmel/soc.h b/drivers/soc/atmel/soc.h index ee652e4841a5..77b27124362c 100644 --- a/drivers/soc/atmel/soc.h +++ b/drivers/soc/atmel/soc.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2015 Atmel * -- Nicolas Ferre
Re: [GIT PULL] ARM: at91: soc for 5.12
On 22/01/2021 at 17:35, Alexandre Belloni wrote: EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe On 22/01/2021 16:25:47+0100, Arnd Bergmann wrote: On Fri, Jan 22, 2021 at 3:35 PM wrote: From: Nicolas Ferre Arnd, Olof, I'm taking back the lead on sending the pull-requests for AT91 and hope that I didn't loose the knowledge in the meantime. Tell me if there's something I'm missing. Thanks a lot to Alexandre who kept our flow steady and very predictable during all those years! Here are the first SoC changes for 5.12 which contain a single patch for multi platform kernels. I plan to send another pull-request for the SoC changes related to new sama7g5 that Claudiu sent to the mainling-list recently. I'll let it mature in linux-next by the beginning of next week and will send another pull-request by mid-next-week. Tell me if you see a problem with this approach. This all looks good to me, but I think I'd rather take the 'soc' pull request into the v5.11 bugfixes, as this may already affect users on other machines. I would also suggest adding a 'Cc: sta...@vger.kernel.org' tag. If you like, I can just cherry-pick that patch into the fixes branch and add it there. I wouldn't backport it as a fix, this is just a warning, in a configuration that is very unlikely to be used (and honestly, I wouldn't enable this driver on any platform). If you take it as a fix, you'll have to also get https://lore.kernel.org/linux-arm-kernel/1611318097-8970-5-git-send-email-claudiu.bez...@microchip.com/ Arnd, Alexandre, Whatever you prefer is fine with me. As I'm not the first impacted I wouldn't push in one direction or another. Best regards, -- Nicolas Ferre
Re: [GIT PULL] ARM: at91: soc for 5.12
On 22/01/2021 at 16:25, Arnd Bergmann wrote: On Fri, Jan 22, 2021 at 3:35 PM wrote: From: Nicolas Ferre Arnd, Olof, I'm taking back the lead on sending the pull-requests for AT91 and hope that I didn't loose the knowledge in the meantime. Tell me if there's something I'm missing. Thanks a lot to Alexandre who kept our flow steady and very predictable during all those years! Here are the first SoC changes for 5.12 which contain a single patch for multi platform kernels. I plan to send another pull-request for the SoC changes related to new sama7g5 that Claudiu sent to the mainling-list recently. I'll let it mature in linux-next by the beginning of next week and will send another pull-request by mid-next-week. Tell me if you see a problem with this approach. This all looks good to me, but I think I'd rather take the 'soc' pull request into the v5.11 bugfixes, as this may already affect users on other machines. I would also suggest adding a 'Cc: sta...@vger.kernel.org' tag. If you like, I can just cherry-pick that patch into the fixes branch and add it there. Oh yes, that'd be good, indeed. You can add the following tag: Cc: sta...@vger.kernel.org #4.12+ Best regards, -- Nicolas Ferre
Re: [PATCH] ARM: dts: at91: sama5d2: remove atmel,wakeup-type references
On 05/01/2021 at 12:18, Claudiu Beznea wrote:
atmel,wakeup-type DT property is not referenced anywhere in the current
and previous version of the code thus remove it.
Signed-off-by: Claudiu Beznea
Acked-by: Nicolas Ferre
It's even not documented in any binding document. I take it now, even
without Rob's tag.
Best regards,
Nicolas
---
arch/arm/boot/dts/at91-kizbox3_common.dtsi| 1 -
arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 1 -
arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts | 1 -
arch/arm/boot/dts/at91-sama5d2_icp.dts| 1 -
arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 1 -
arch/arm/boot/dts/at91-sama5d2_xplained.dts | 1 -
6 files changed, 6 deletions(-)
diff --git a/arch/arm/boot/dts/at91-kizbox3_common.dtsi
b/arch/arm/boot/dts/at91-kizbox3_common.dtsi
index 9ce513dd514b..c4b3750495da 100644
--- a/arch/arm/boot/dts/at91-kizbox3_common.dtsi
+++ b/arch/arm/boot/dts/at91-kizbox3_common.dtsi
@@ -341,7 +341,6 @@
input@0 {
reg = <0>;
- atmel,wakeup-type = "low";
};
};
diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
index 0e159f879c15..84e1180f3e89 100644
--- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
+++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
@@ -142,7 +142,6 @@
input@0 {
reg = <0>;
- atmel,wakeup-type = "low";
};
};
diff --git a/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts
index 6b38fa3f5568..180a08765cb8 100644
--- a/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts
+++ b/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts
@@ -209,7 +209,6 @@
input@0 {
reg = <0>;
- atmel,wakeup-type = "low";
};
};
diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts
index 6783cf16ff81..46722a163184 100644
--- a/arch/arm/boot/dts/at91-sama5d2_icp.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts
@@ -697,7 +697,6 @@
input@0 {
reg = <0>;
- atmel,wakeup-type = "low";
};
};
diff --git a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts
index c894c7c788a9..8de57d164acd 100644
--- a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts
@@ -206,7 +206,6 @@
input@0 {
reg = <0>;
- atmel,wakeup-type = "low";
};
};
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
index 058fae1b4a76..4e7cf21f124c 100644
--- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
@@ -351,7 +351,6 @@
input@0 {
reg = <0>;
- atmel,wakeup-type = "low";
};
};
--
Nicolas Ferre
Re: [PATCH] ARM: dts: at91-sama5d27_wlsom1: add i2c recovery
On 17/01/2021 at 19:35, nicolas.fe...@microchip.com wrote:
From: Nicolas Ferre
Add the i2c gpio pinctrls to support the i2c bus recovery on this board.
Signed-off-by: Nicolas Ferre
Reviewed-by: Codrin Ciubotariu
added to at91-dt.
Regards,
Nicolas
---
arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi | 22 +++--
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi
b/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi
index a06700e53e4c..025a78310e3a 100644
--- a/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi
+++ b/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi
@@ -43,14 +43,20 @@ uart6: serial@200 {
{
pinctrl-0 = <_i2c0_default>;
- pinctrl-names = "default";
+ pinctrl-1 = <_i2c0_gpio>;
+ pinctrl-names = "default", "gpio";
+ sda-gpios = < PIN_PD21 GPIO_ACTIVE_HIGH>;
+ scl-gpios = < PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
};
{
dmas = <0>, <0>;
- pinctrl-names = "default";
+ pinctrl-names = "default", "gpio";
pinctrl-0 = <_i2c1_default>;
+ pinctrl-1 = <_i2c1_gpio>;
+ sda-gpios = < PIN_PD19 GPIO_ACTIVE_HIGH>;
+ scl-gpios = < PIN_PD20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
mcp16502@5b {
@@ -258,12 +264,24 @@ pinctrl_i2c0_default: i2c0_default {
bias-disable;
};
+ pinctrl_i2c0_gpio: i2c0_gpio {
+ pinmux = ,
+;
+ bias-disable;
+ };
+
pinctrl_i2c1_default: i2c1_default {
pinmux = ,
;
bias-disable;
};
+ pinctrl_i2c1_gpio: i2c1_gpio {
+ pinmux = ,
+;
+ bias-disable;
+ };
+
pinctrl_macb0_default: macb0_default {
pinmux = ,
,
--
Nicolas Ferre
Re: [PATCH 3/3] MAINTAINERS: add myself as maintainer for mcp16502
On 07/01/2021 at 15:15, Claudiu Beznea wrote: Andrei is no longer with Microchip. Add myself as maintainer for MCP16502. Along with this change the status from maintained to supported. Signed-off-by: Claudiu Beznea For the record: Acked-by: Nicolas Ferre Thanks Claudiu! Regards, Nicolas --- MAINTAINERS | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 6eff4f720c72..1cd9914b95eb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11690,9 +11690,9 @@ F: drivers/video/fbdev/atmel_lcdfb.c F:include/video/atmel_lcdc.h MICROCHIP MCP16502 PMIC DRIVER -M: Andrei Stefanescu +M: Claudiu Beznea L:linux-arm-ker...@lists.infradead.org (moderated for non-subscribers) -S: Maintained +S: Supported F:Documentation/devicetree/bindings/regulator/mcp16502-regulator.txt F:drivers/regulator/mcp16502.c -- Nicolas Ferre
Re: [PATCH] dt-bindings: rtc: at91rm9200: add sama7g5 compatible
On 07/01/2021 at 11:46, Claudiu Beznea wrote: Add compatible for SAMA7G5 RTC. At the moment the driver is falling back on SAM9X60's compatible but SAMA7G5 doesn't have the tamper mode register and tamper debounce period register thus the need for a new compatible to differentiate b/w these two in case tamper feature will be implemented in future. Signed-off-by: Claudiu Beznea Acked-by: Nicolas Ferre --- Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml b/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml index 02bbfe726c62..994de43d17fa 100644 --- a/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml @@ -20,6 +20,7 @@ properties: - atmel,sama5d4-rtc - atmel,sama5d2-rtc - microchip,sam9x60-rtc + - microchip,sama7g5-rtc reg: maxItems: 1 -- Nicolas Ferre
Re: [PATCH v3 0/8] net: macb: add support for sama7g5
On 09/12/2020 at 14:03, Claudiu Beznea wrote: Hi, This series adds support for SAMA7G5 Ethernet interfaces: one 10/100Mbps and one 1Gbps interfaces. Along with it I also included a fix to disable clocks for SiFive FU540-C000 on failure path of fu540_c000_clk_init(). Thank you, Claudiu Beznea Changed in v3: - use clk_bulk_disable_unprepare in patch 3/8 - corrected clang compilation warning in patch 3/8 - revert changes in macb_clk_init() in patch 3/8 Changes in v2: - introduced patch "net: macb: add function to disable all macb clocks" and update patch "net: macb: unprepare clocks in case of failure" accordingly - collected tags Claudiu Beznea (8): net: macb: add userio bits as platform configuration net: macb: add capability to not set the clock rate net: macb: add function to disable all macb clocks net: macb: unprepare clocks in case of failure dt-bindings: add documentation for sama7g5 ethernet interface dt-bindings: add documentation for sama7g5 gigabit ethernet interface net: macb: add support for sama7g5 gem interface net: macb: add support for sama7g5 emac interface For the whole series: Acked-by: Nicolas Ferre Thanks Claudiu, best regards, Nicolas Documentation/devicetree/bindings/net/macb.txt | 2 + drivers/net/ethernet/cadence/macb.h| 11 ++ drivers/net/ethernet/cadence/macb_main.c | 134 ++--- 3 files changed, 111 insertions(+), 36 deletions(-) -- Nicolas Ferre
Re: [PATCH] ethernet: select CONFIG_CRC32 as needed
On 04/12/2020 at 00:20, Arnd Bergmann wrote: EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe From: Arnd Bergmann A number of ethernet drivers require crc32 functionality to be avaialable in the kernel, causing a link error otherwise: arm-linux-gnueabi-ld: drivers/net/ethernet/agere/et131x.o: in function `et1310_setup_device_for_multicast': et131x.c:(.text+0x5918): undefined reference to `crc32_le' arm-linux-gnueabi-ld: drivers/net/ethernet/cadence/macb_main.o: in function `macb_start_xmit': macb_main.c:(.text+0x4b88): undefined reference to `crc32_le' arm-linux-gnueabi-ld: drivers/net/ethernet/faraday/ftgmac100.o: in function `ftgmac100_set_rx_mode': ftgmac100.c:(.text+0x2b38): undefined reference to `crc32_le' arm-linux-gnueabi-ld: drivers/net/ethernet/freescale/fec_main.o: in function `set_multicast_list': fec_main.c:(.text+0x6120): undefined reference to `crc32_le' arm-linux-gnueabi-ld: drivers/net/ethernet/freescale/fman/fman_dtsec.o: in function `dtsec_add_hash_mac_address': fman_dtsec.c:(.text+0x830): undefined reference to `crc32_le' arm-linux-gnueabi-ld: drivers/net/ethernet/freescale/fman/fman_dtsec.o:fman_dtsec.c:(.text+0xb68): more undefined references to `crc32_le' follow arm-linux-gnueabi-ld: drivers/net/ethernet/netronome/nfp/nfpcore/nfp_hwinfo.o: in function `nfp_hwinfo_read': nfp_hwinfo.c:(.text+0x250): undefined reference to `crc32_be' arm-linux-gnueabi-ld: nfp_hwinfo.c:(.text+0x288): undefined reference to `crc32_be' arm-linux-gnueabi-ld: drivers/net/ethernet/netronome/nfp/nfpcore/nfp_resource.o: in function `nfp_resource_acquire': nfp_resource.c:(.text+0x144): undefined reference to `crc32_be' arm-linux-gnueabi-ld: nfp_resource.c:(.text+0x158): undefined reference to `crc32_be' arm-linux-gnueabi-ld: drivers/net/ethernet/nxp/lpc_eth.o: in function `lpc_eth_set_multicast_list': lpc_eth.c:(.text+0x1934): undefined reference to `crc32_le' arm-linux-gnueabi-ld: drivers/net/ethernet/rocker/rocker_ofdpa.o: in function `ofdpa_flow_tbl_do': rocker_ofdpa.c:(.text+0x2e08): undefined reference to `crc32_le' arm-linux-gnueabi-ld: drivers/net/ethernet/rocker/rocker_ofdpa.o: in function `ofdpa_flow_tbl_del': rocker_ofdpa.c:(.text+0x3074): undefined reference to `crc32_le' arm-linux-gnueabi-ld: drivers/net/ethernet/rocker/rocker_ofdpa.o: in function `ofdpa_port_fdb': arm-linux-gnueabi-ld: drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.o: in function `mlx5dr_ste_calc_hash_index': dr_ste.c:(.text+0x354): undefined reference to `crc32_le' arm-linux-gnueabi-ld: drivers/net/ethernet/microchip/lan743x_main.o: in function `lan743x_netdev_set_multicast': lan743x_main.c:(.text+0x5dc4): undefined reference to `crc32_le' Add the missing 'select CRC32' entries in Kconfig for each of them. Signed-off-by: Arnd Bergmann --- drivers/net/ethernet/agere/Kconfig | 1 + drivers/net/ethernet/cadence/Kconfig| 1 + For Cadence macb driver: Acked-by: Nicolas Ferre drivers/net/ethernet/faraday/Kconfig| 1 + drivers/net/ethernet/freescale/Kconfig | 1 + drivers/net/ethernet/freescale/fman/Kconfig | 1 + drivers/net/ethernet/mellanox/mlx5/core/Kconfig | 1 + drivers/net/ethernet/microchip/Kconfig | 1 + drivers/net/ethernet/netronome/Kconfig | 1 + drivers/net/ethernet/nxp/Kconfig| 1 + drivers/net/ethernet/rocker/Kconfig | 1 + 10 files changed, 10 insertions(+) diff --git a/drivers/net/ethernet/agere/Kconfig b/drivers/net/ethernet/agere/Kconfig index d92516ae59cc..9cd750184947 100644 --- a/drivers/net/ethernet/agere/Kconfig +++ b/drivers/net/ethernet/agere/Kconfig @@ -21,6 +21,7 @@ config ET131X tristate "Agere ET-1310 Gigabit Ethernet support" depends on PCI select PHYLIB + select CRC32 help This driver supports Agere ET-1310 ethernet adapters. diff --git a/drivers/net/ethernet/cadence/Kconfig b/drivers/net/ethernet/cadence/Kconfig index 85858163bac5..e432a68ac520 100644 --- a/drivers/net/ethernet/cadence/Kconfig +++ b/drivers/net/ethernet/cadence/Kconfig @@ -23,6 +23,7 @@ config MACB tristate "Cadence MACB/GEM support" depends on HAS_DMA && COMMON_CLK select PHYLINK + select CRC32 help The Cadence MACB ethernet interface is found on many Atmel AT32 and AT91 parts. This driver also supports the Cadence GEM (Gigabit diff --git a/drivers/net/ethernet/faraday/Kconfig b/drivers/net/ethernet/faraday/Kconfig index c2677ec0564d..3d1e9a302148 100644 --- a/drivers/net/ethernet/faraday/Kconfig +++ b/drivers/net/ethernet/faraday/Kconfig @@ -33,6 +33,7 @@ config FTGMAC100 depends on !64BIT || BROKEN select PHYLIB select MDIO_ASPEED if MACH_ASPEED_G6 + select CRC32 help This driver supports the FTGMAC100 Gigabit Ethernet controller
Re: [PATCH 2/2] ARM: dts: at91: sama5d2: map securam as device
On 02/12/2020 at 10:57, Claudiu Beznea wrote:
Due to strobe signal not being propagated from CPU to securam
the securam needs to be mapped as device or strongly ordered memory
to work properly. Otherwise, updating to one offset may affect
the adjacent locations in securam.
Fixes: d4ce5f44d4409 ("ARM: dts: at91: sama5d2: Add securam node")
Signed-off-by: Claudiu Beznea
Acked-by: Nicolas Ferre
---
arch/arm/boot/dts/sama5d2.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 2ddc85dff8ce..6d399ac0385d 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -656,6 +656,7 @@
clocks = < PMC_TYPE_PERIPHERAL 51>;
#address-cells = <1>;
#size-cells = <1>;
+ no-memory-wc;
ranges = <0 0xf8044000 0x1420>;
};
--
Nicolas Ferre
Re: [PATCH 1/2] ARM: dts: at91: sam9x60ek: remove bypass property
On 02/12/2020 at 10:57, Claudiu Beznea wrote:
atmel,osc-bypass property sets the bit 1 at main oscillator register.
On SAM9X60 this bit is not valid according to datasheet (chapter
28.16.9 PMC Clock Generator Main Oscillator Register).
Fixes: 720329e86a463 ("ARM: dts: at91: sam9x60: add device tree for soc and
board")
Cc: Marco Cardellini
Signed-off-by: Claudiu Beznea
Acked-by: Nicolas Ferre
---
arch/arm/boot/dts/at91-sam9x60ek.dts | 4
1 file changed, 4 deletions(-)
diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts
b/arch/arm/boot/dts/at91-sam9x60ek.dts
index 0e3b6147069f..73b6b1f89de9 100644
--- a/arch/arm/boot/dts/at91-sam9x60ek.dts
+++ b/arch/arm/boot/dts/at91-sam9x60ek.dts
@@ -578,10 +578,6 @@
};
}; /* pinctrl */
- {
- atmel,osc-bypass;
-};
-
{
pinctrl-names = "default";
pinctrl-0 = <_pwm0_0 _pwm0_1 _pwm0_2
_pwm0_3>;
--
Nicolas Ferre
Re: [PATCH] rtc: at91rm9200: Add sam9x60 compatible
On 17/11/2020 at 14:39, Alexandre Belloni wrote:
Handle the sam9x60 RTC. While it can work with the at91sam9x5 fallback, it
has crystal correction support and doesn't need to shadow IMR.
Signed-off-by: Alexandre Belloni
Acked-by: Nicolas Ferre
---
drivers/rtc/rtc-at91rm9200.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c
index 1eea187d9850..da24e68adcca 100644
--- a/drivers/rtc/rtc-at91rm9200.c
+++ b/drivers/rtc/rtc-at91rm9200.c
@@ -437,6 +437,9 @@ static const struct of_device_id at91_rtc_dt_ids[] = {
}, {
.compatible = "atmel,sama5d2-rtc",
.data = _config,
+ }, {
+ .compatible = "microchip,sam9x60-rtc",
+ .data = _config,
}, {
/* sentinel */
}
--
2.28.0
--
Nicolas Ferre
Re: [PATCH] rtc: at91rm9200: add correction support
ic const struct of_device_id at91_rtc_dt_ids[] = {
{
.compatible = "atmel,at91rm9200-rtc",
@@ -352,10 +433,10 @@ static const struct of_device_id at91_rtc_dt_ids[] = {
.data = _config,
}, {
.compatible = "atmel,sama5d4-rtc",
- .data = _config,
+ .data = _config,
}, {
.compatible = "atmel,sama5d2-rtc",
- .data = _config,
+ .data = _config,
}, {
/* sentinel */
}
@@ -370,6 +451,16 @@ static const struct rtc_class_ops at91_rtc_ops = {
.alarm_irq_enable = at91_rtc_alarm_irq_enable,
};
+static const struct rtc_class_ops sama5d4_rtc_ops = {
+ .read_time = at91_rtc_readtime,
+ .set_time = at91_rtc_settime,
+ .read_alarm = at91_rtc_readalarm,
+ .set_alarm = at91_rtc_setalarm,
+ .alarm_irq_enable = at91_rtc_alarm_irq_enable,
+ .set_offset = at91_rtc_setoffset,
+ .read_offset= at91_rtc_readoffset,
+};
+
/*
* Initialize and install RTC driver
*/
@@ -416,7 +507,7 @@ static int __init at91_rtc_probe(struct platform_device
*pdev)
}
at91_rtc_write(AT91_RTC_CR, 0);
- at91_rtc_write(AT91_RTC_MR, 0); /* 24 hour mode */
+ at91_rtc_write(AT91_RTC_MR, at91_rtc_read(AT91_RTC_MR) &
~AT91_RTC_HRMOD);
/* Disable all interrupts */
at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM |
@@ -437,7 +528,11 @@ static int __init at91_rtc_probe(struct platform_device
*pdev)
if (!device_can_wakeup(>dev))
device_init_wakeup(>dev, 1);
- rtc->ops = _rtc_ops;
+ if (at91_rtc_config->has_correction)
+ rtc->ops = _rtc_ops;
+ else
+ rtc->ops = _rtc_ops;
+
rtc->range_min = RTC_TIMESTAMP_BEGIN_1900;
rtc->range_max = RTC_TIMESTAMP_END_2099;
ret = rtc_register_device(rtc);
--
2.28.0
Alexandre, you know much more than me about the habits of RTC drivers
writers. Even if I would like a little more documentation on values
used, I absolutely won't hold this feature adoption, so here is my:
Reviewed-by: Nicolas Ferre
Thanks, best regards,
Nicolas
--
Nicolas Ferre
Re: [PATCH] pinctrl: pinctrl-at91-pio4: Set irq handler and data in one go
On 09/11/2020 at 12:26, Andy Shevchenko wrote: On Sun, Nov 8, 2020 at 8:05 PM Martin Kaiser wrote: Replace the two separate calls for setting the irq handler and data with a single irq_set_chained_handler_and_data() call. Can it be rewritten to use the GPIO core facility of instantiating IRQ chip? I have the feeling it's out of scope for this (tiny) patch. Regards, -- Nicolas Ferre
Re: [RESEND PATCH] net: macb: fix NULL dereference due to no pcs_config method
On 05/11/2020 at 18:58, Parshuram Thombare wrote:
This patch fixes NULL pointer dereference due to NULL pcs_config
in pcs_ops.
Reported-by: Nicolas Ferre
Link:
https://lore.kernel.org/netdev/2db854c7-9ffb-328a-f346-f68982723...@microchip.com/
Signed-off-by: Parshuram Thombare
Acked-by: Nicolas Ferre
Thanks Parshuram, best regards,
Nicolas
---
drivers/net/ethernet/cadence/macb_main.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/ethernet/cadence/macb_main.c
index b7bc160..130a5af 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -633,6 +633,15 @@ static void macb_pcs_an_restart(struct phylink_pcs *pcs)
/* Not supported */
}
+static int macb_pcs_config(struct phylink_pcs *pcs,
+ unsigned int mode,
+ phy_interface_t interface,
+ const unsigned long *advertising,
+ bool permit_pause_to_mac)
+{
+ return 0;
+}
+
static const struct phylink_pcs_ops macb_phylink_usx_pcs_ops = {
.pcs_get_state = macb_usx_pcs_get_state,
.pcs_config = macb_usx_pcs_config,
@@ -642,6 +651,7 @@ static const struct phylink_pcs_ops
macb_phylink_usx_pcs_ops = {
static const struct phylink_pcs_ops macb_phylink_pcs_ops = {
.pcs_get_state = macb_pcs_get_state,
.pcs_an_restart = macb_pcs_an_restart,
+ .pcs_config = macb_pcs_config,
};
static void macb_mac_config(struct phylink_config *config, unsigned int mode,
@@ -776,10 +786,13 @@ static int macb_mac_prepare(struct phylink_config
*config, unsigned int mode,
if (interface == PHY_INTERFACE_MODE_10GBASER)
bp->phylink_pcs.ops = _phylink_usx_pcs_ops;
- else
+ else if (interface == PHY_INTERFACE_MODE_SGMII)
bp->phylink_pcs.ops = _phylink_pcs_ops;
+ else
+ bp->phylink_pcs.ops = NULL;
- phylink_set_pcs(bp->phylink, >phylink_pcs);
+ if (bp->phylink_pcs.ops)
+ phylink_set_pcs(bp->phylink, >phylink_pcs);
return 0;
}
--
2.7.4
--
Nicolas Ferre
Re: [PATCH] net: macb: fix NULL dereference due to no pcs_config method
On 05/11/2020 at 16:48, Russell King - ARM Linux admin wrote:
On Thu, Nov 05, 2020 at 04:22:18PM +0100, Nicolas Ferre wrote:
On 05/11/2020 at 15:37, Parshuram Thombare wrote:
This patch fixes NULL pointer dereference due to NULL pcs_config
in pcs_ops.
Fixes: e4e143e26ce8 ("net: macb: add support for high speed interface")
What is this tag? In linux-next? As patch is not yet in Linus' tree, you
cannot refer to it like this.
Reported-by: Nicolas Ferre
Link: https://lkml.org/lkml/2020/11/4/482
You might need to change this to a "lore" link:
https://lore.kernel.org/netdev/2db854c7-9ffb-328a-f346-f68982723...@microchip.com/
Signed-off-by: Parshuram Thombare
This fix looks a bit weird to me. What about proposing a patch to Russell
like the chunk that you already identified in function
phylink_major_config()?
No thanks. macb is currently the only case where a stub implementation
for pcs_config() is required, which only occurs because the only
appropriate protocol supported there is SGMII and not 1000base-X as
well.
Got it.
---
drivers/net/ethernet/cadence/macb_main.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/ethernet/cadence/macb_main.c
index b7bc160..130a5af 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -633,6 +633,15 @@ static void macb_pcs_an_restart(struct phylink_pcs *pcs)
/* Not supported */
}
+static int macb_pcs_config(struct phylink_pcs *pcs,
+ unsigned int mode,
+ phy_interface_t interface,
+ const unsigned long *advertising,
+ bool permit_pause_to_mac)
+{
+ return 0;
+}
Russell, is the requirement for this void function intended?
In response to v3 of the patch on 21st October, I said, and I quote:
I think all that needs to happen is a pcs_ops for the non-10GBASE-R
mode which moves macb_mac_pcs_get_state() and macb_mac_an_restart()
to it, and implements a stub pcs_config(). So it should be simple
to do.
Obviously, my advice was not followed, I didn't spot the lack of it
in v4 (sorry), and the result is the NULL pointer oops.
Fair enough. So Parshuram I'll add my ack tag when you re-send your
patch with little issues fixed.
Thanks for your help Russell.
Best regards,
Nicolas
--
Nicolas Ferre
Re: [PATCH] net: macb: fix NULL dereference due to no pcs_config method
On 05/11/2020 at 15:37, Parshuram Thombare wrote:
This patch fixes NULL pointer dereference due to NULL pcs_config
in pcs_ops.
Fixes: e4e143e26ce8 ("net: macb: add support for high speed interface")
What is this tag? In linux-next? As patch is not yet in Linus' tree, you
cannot refer to it like this.
Reported-by: Nicolas Ferre
Link: https://lkml.org/lkml/2020/11/4/482
You might need to change this to a "lore" link:
https://lore.kernel.org/netdev/2db854c7-9ffb-328a-f346-f68982723...@microchip.com/
Signed-off-by: Parshuram Thombare
This fix looks a bit weird to me. What about proposing a patch to
Russell like the chunk that you already identified in function
phylink_major_config()?
---
drivers/net/ethernet/cadence/macb_main.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/ethernet/cadence/macb_main.c
index b7bc160..130a5af 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -633,6 +633,15 @@ static void macb_pcs_an_restart(struct phylink_pcs *pcs)
/* Not supported */
}
+static int macb_pcs_config(struct phylink_pcs *pcs,
+ unsigned int mode,
+ phy_interface_t interface,
+ const unsigned long *advertising,
+ bool permit_pause_to_mac)
+{
+ return 0;
+}
Russell, is the requirement for this void function intended?
+
static const struct phylink_pcs_ops macb_phylink_usx_pcs_ops = {
.pcs_get_state = macb_usx_pcs_get_state,
.pcs_config = macb_usx_pcs_config,
@@ -642,6 +651,7 @@ static const struct phylink_pcs_ops
macb_phylink_usx_pcs_ops = {
static const struct phylink_pcs_ops macb_phylink_pcs_ops = {
.pcs_get_state = macb_pcs_get_state,
.pcs_an_restart = macb_pcs_an_restart,
+ .pcs_config = macb_pcs_config,
};
static void macb_mac_config(struct phylink_config *config, unsigned int mode,
@@ -776,10 +786,13 @@ static int macb_mac_prepare(struct phylink_config
*config, unsigned int mode,
if (interface == PHY_INTERFACE_MODE_10GBASER)
bp->phylink_pcs.ops = _phylink_usx_pcs_ops;
- else
+ else if (interface == PHY_INTERFACE_MODE_SGMII)
bp->phylink_pcs.ops = _phylink_pcs_ops;
Do you confirm that all SGMII type interfaces need phylink_pcs.ops?
+ else
+ bp->phylink_pcs.ops = NULL;
- phylink_set_pcs(bp->phylink, >phylink_pcs);
+ if (bp->phylink_pcs.ops)
+ phylink_set_pcs(bp->phylink, >phylink_pcs);
return 0;
}
Regards,
Nicolas
--
Nicolas Ferre
Re: [PATCH] ARM: dts: at91: add serial MFD sub-node for usart
status = "disabled";
+ serial {
+ compatible =
"atmel,at91rm9200-usart-serial";
+ };
};
sha@f8034000 {
@@ -497,6 +512,9 @@ dbgu: serial@ee00 {
clocks = < PMC_TYPE_PERIPHERAL 2>;
clock-names = "usart";
status = "disabled";
+ serial {
+ compatible =
"atmel,at91rm9200-usart-serial";
+ };
};
aic: interrupt-controller@f000 {
diff --git a/arch/arm/boot/dts/sama5d3_uart.dtsi
b/arch/arm/boot/dts/sama5d3_uart.dtsi
index a3eaba995cf4..b9f83b771a09 100644
--- a/arch/arm/boot/dts/sama5d3_uart.dtsi
+++ b/arch/arm/boot/dts/sama5d3_uart.dtsi
@@ -45,6 +45,9 @@ uart0: serial@f0024000 {
clocks = < PMC_TYPE_PERIPHERAL 16>;
clock-names = "usart";
status = "disabled";
+ serial {
+ compatible =
"atmel,at91rm9200-usart-serial";
+ };
};
uart1: serial@f8028000 {
@@ -56,6 +59,9 @@ uart1: serial@f8028000 {
clocks = < PMC_TYPE_PERIPHERAL 17>;
clock-names = "usart";
status = "disabled";
+ serial {
+ compatible =
"atmel,at91rm9200-usart-serial";
+ };
};
};
};
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 04f24cf752d3..0627fa8cdaf4 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -284,6 +284,9 @@ uart0: serial@f8004000 {
clocks = < PMC_TYPE_PERIPHERAL 27>;
clock-names = "usart";
status = "disabled";
+ serial {
+ compatible =
"atmel,at91rm9200-usart-serial";
+ };
};
ssc0: ssc@f8008000 {
@@ -443,6 +446,9 @@ usart0: serial@f802c000 {
clocks = < PMC_TYPE_PERIPHERAL 6>;
clock-names = "usart";
status = "disabled";
+ serial {
+ compatible =
"atmel,at91rm9200-usart-serial";
+ };
};
usart1: serial@f803 {
@@ -461,6 +467,9 @@ usart1: serial@f803 {
clocks = < PMC_TYPE_PERIPHERAL 7>;
clock-names = "usart";
status = "disabled";
+ serial {
+ compatible =
"atmel,at91rm9200-usart-serial";
+ };
};
mmc1: mmc@fc00 {
@@ -496,6 +505,9 @@ uart1: serial@fc004000 {
clocks = < PMC_TYPE_PERIPHERAL 28>;
clock-names = "usart";
status = "disabled";
+ serial {
+ compatible =
"atmel,at91rm9200-usart-serial";
+ };
};
usart2: serial@fc008000 {
@@ -514,6 +526,9 @@ usart2: serial@fc008000 {
clocks = < PMC_TYPE_PERIPHERAL 29>;
clock-names = "usart";
status = "disabled";
+ serial {
+ compatible =
"atmel,at91rm9200-usart-serial";
+ };
};
usart3: serial@fc00c000 {
@@ -532,6 +547,9 @@ usart3: serial@fc00c000 {
clocks = < PMC_TYPE_PERIPHERAL 30>;
clock-names = "usart";
status = "disabled";
+ serial {
+ compatible =
"atmel,at91rm9200-usart-serial";
+ };
};
usart4: serial@fc01 {
@@ -550,6 +568,9 @@ usart4: serial@fc01 {
clocks = < PMC_TYPE_PERIPHERAL 31>;
clock-names = "usart";
status = "disabled";
+ serial {
+ compatible =
"atmel,at91rm9200-usart-serial";
+ };
};
ssc1: ssc@fc014000 {
@@ -568,6 +589,9 @@ ssc1: ssc@fc014000 {
clocks = < PMC_TYPE_PERIPHERAL 49>;
clock-names = "pclk";
status = "disabled";
+ serial {
+ compatible =
"atmel,at91rm9200-usart-serial";
+ };
};
spi1: spi@fc018000 {
@@ -588,6 +612,9 @@ spi1: spi@fc018000 {
clocks = < PMC_TYPE_PERIPHERAL 38>;
clock-names = "spi_clk";
status = "disabled";
+ serial {
+ compatible =
"atmel,at91rm9200-usart-serial";
+ };
};
spi2: spi@fc01c000 {
@@ -794,6 +821,9 @@ dbgu: serial@fc069000 {
clocks = < PMC_TYPE_PERIPHERAL 45>;
clock-names = "usart";
status = "disabled";
+ serial {
+ compatible =
"atmel,at91rm9200-usart-serial";
+ };
};
--
Nicolas Ferre
Re: [PATCH] clk: at91: sam9x60: support only two programmable clocks
On 14/10/2020 at 16:34, Claudiu Beznea wrote:
According to datasheet (Chapter 29.16.13, PMC Programmable Clock Register)
there are only two programmable clocks on SAM9X60.
Fixes: 01e2113de9a5 ("clk: at91: add sam9x60 pmc driver")
Signed-off-by: Claudiu Beznea
This is a fix:
Acked-by: Nicolas Ferre
Cc: # v5.2+
---
drivers/clk/at91/sam9x60.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
index ab6318c0589e..3c4c95603595 100644
--- a/drivers/clk/at91/sam9x60.c
+++ b/drivers/clk/at91/sam9x60.c
@@ -279,7 +279,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
parent_names[3] = "masterck";
parent_names[4] = "pllack_divck";
parent_names[5] = "upllck_divck";
- for (i = 0; i < 8; i++) {
+ for (i = 0; i < 2; i++) {
char name[6];
snprintf(name, sizeof(name), "prog%d", i);
--
Nicolas Ferre
Re: [PATCH 2/2] pinctrl: at91-pio4: add support for sama7g5 SoC
On 17/09/2020 at 15:12, Eugen Hristev wrote:
Add support for sama7g5 pinctrl block, which has 5 PIO banks.
Signed-off-by: Eugen Hristev
Reviewed-by: Nicolas Ferre
---
drivers/pinctrl/pinctrl-at91-pio4.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c
b/drivers/pinctrl/pinctrl-at91-pio4.c
index 1c852293cb96..9f62152d0a62 100644
--- a/drivers/pinctrl/pinctrl-at91-pio4.c
+++ b/drivers/pinctrl/pinctrl-at91-pio4.c
@@ -999,10 +999,17 @@ static const struct atmel_pioctrl_data
atmel_sama5d2_pioctrl_data = {
.nbanks = 4,
};
+static const struct atmel_pioctrl_data microchip_sama7g5_pioctrl_data = {
+ .nbanks = 5,
+};
+
static const struct of_device_id atmel_pctrl_of_match[] = {
{
.compatible = "atmel,sama5d2-pinctrl",
.data = _sama5d2_pioctrl_data,
+ }, {
+ .compatible = "microchip,sama7g5-pinctrl",
+ .data = _sama7g5_pioctrl_data,
}, {
/* sentinel */
}
Thanks Eugen, regards,
--
Nicolas Ferre
Re: [PATCH net] net: macb: fix for pause frame receive enable bit
On 05/09/2020 at 10:21, Parshuram Thombare wrote:
PAE bit of NCFGR register, when set, pauses transmission
if a non-zero 802.3 classic pause frame is received.
Fixes: 7897b071ac3b ("net: macb: convert to phylink")
Signed-off-by: Parshuram Thombare
For the record:
Acked-by: Nicolas Ferre
Thanks Parshuram for having found this issue.
Best regards,
Nicolas
---
drivers/net/ethernet/cadence/macb_main.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/ethernet/cadence/macb_main.c
index 6761f40..9179f7b 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -647,8 +647,7 @@ static void macb_mac_link_up(struct phylink_config *config,
ctrl |= GEM_BIT(GBE);
}
- /* We do not support MLO_PAUSE_RX yet */
- if (tx_pause)
+ if (rx_pause)
ctrl |= MACB_BIT(PAE);
macb_set_tx_clk(bp->tx_clk, speed, ndev);
--
1.7.1
--
Nicolas Ferre
Re: [PATCH v2] Replace HTTP links with HTTPS ones: Documentation/arm
On 26/06/2020 at 21:44, Alexander A. Klimov wrote: EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov --- Changes in v2: Undone all handhelds.org changes and 0 of 0 wearablegroup.org changes. Documentation/arm/arm.rst | 8 ++--- Documentation/arm/keystone/overview.rst | 4 +-- Documentation/arm/microchip.rst | 30 +-- For Microchip changes, which is larger chunk: Acked-by: Nicolas Ferre Documentation/arm/sa1100/assabet.rst | 2 +- .../arm/samsung-s3c24xx/overview.rst | 4 +-- 5 files changed, 24 insertions(+), 24 deletions(-) diff --git a/Documentation/arm/arm.rst b/Documentation/arm/arm.rst index 2edc509df92a..4f8c4985191f 100644 --- a/Documentation/arm/arm.rst +++ b/Documentation/arm/arm.rst @@ -48,12 +48,12 @@ Bug reports etc --- Please send patches to the patch system. For more information, see - http://www.arm.linux.org.uk/developer/patches/info.php Always include some + https://www.arm.linux.org.uk/developer/patches/info.php Always include some explanation as to what the patch does and why it is needed. Bug reports should be sent to linux-arm-ker...@lists.arm.linux.org.uk, or submitted through the web form at - http://www.arm.linux.org.uk/developer/ + https://www.arm.linux.org.uk/developer/ When sending bug reports, please ensure that they contain all relevant information, eg. the kernel messages that were printed before/during @@ -169,7 +169,7 @@ ST506 hard drives Previous registrations may be found online. -<http://www.arm.linux.org.uk/developer/machines/> +<https://www.arm.linux.org.uk/developer/machines/> Kernel entry (head.S) - @@ -204,7 +204,7 @@ Kernel entry (head.S) compile-time code selection method. You can register a new machine via the web site at: -<http://www.arm.linux.org.uk/developer/machines/> +<https://www.arm.linux.org.uk/developer/machines/> Note: Please do not register a machine type for DT-only platforms. If your platform is DT-only, you do not need a registered machine type. diff --git a/Documentation/arm/keystone/overview.rst b/Documentation/arm/keystone/overview.rst index cd90298c493c..3e4b2f8f5e8b 100644 --- a/Documentation/arm/keystone/overview.rst +++ b/Documentation/arm/keystone/overview.rst @@ -16,7 +16,7 @@ K2HK SoC and EVM a.k.a Keystone 2 Hawking/Kepler SoC TCI6636K2H & TCI6636K2K: See documentation at - http://www.ti.com/product/tci6638k2k + https://www.ti.com/product/tci6638k2k http://www.ti.com/product/tci6638k2h EVM: @@ -31,7 +31,7 @@ K2E - 66AK2E05: See documentation at - http://www.ti.com/product/66AK2E05/technicaldocuments + https://www.ti.com/product/66AK2E05/technicaldocuments EVM: https://www.einfochips.com/index.php/partnerships/texas-instruments/k2e-evm.html diff --git a/Documentation/arm/microchip.rst b/Documentation/arm/microchip.rst index 9c013299fd3b..4786dd68d325 100644 --- a/Documentation/arm/microchip.rst +++ b/Documentation/arm/microchip.rst @@ -26,44 +26,44 @@ the Microchip website: http://www.microchip.com. * Datasheet - http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-1768-32-bit-ARM920T-Embedded-Microprocessor-AT91RM9200_Datasheet.pdf + https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-1768-32-bit-ARM920T-Embedded-Microprocessor-AT91RM9200_Datasheet.pdf * ARM 926 based SoCs - at91sam9260 * Datasheet - http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-6221-32-bit-ARM926EJ-S-Embedded-Microprocessor-SAM9260_Datasheet.pdf + https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-6221-32-bit-ARM926EJ-S-Embedded-Microprocessor-SAM9260_Datasheet.pdf - at91sam9xe * Datasheet - http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-6254-32-bit-ARM926EJ-S-Embedded-Microprocessor-SAM9XE_Datasheet.pdf + https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-6254-32-bit-ARM926EJ-S-Embedded-Microprocessor-SAM9XE_Datasheet.pdf - at91sam9261 * Datasheet - http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-6062-ARM926EJ-S-Microprocessor-SAM9261_Datasheet.pdf + https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-6062-ARM926EJ-S-Microprocessor-SAM9261_Datasheet.pdf - at91sam9
Re: [PATCH] Replace HTTP links with HTTPS ones: ATMEL MACB ETHERNET DRIVER
On 08/07/2020 at 12:35, Alexander A. Klimov wrote: EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov The links go to Cadence. If people from Cadence want to change something, don't hesitate to speak out. On my side: Acked-by: Nicolas Ferre --- Continuing my work started at 93431e0607e5. See also: git log --oneline '--author=Alexander A. Klimov ' v5.7..master (Actually letting a shell for loop submit all this stuff for me.) If there are any URLs to be removed completely or at least not HTTPSified: Just clearly say so and I'll *undo my change*. See also: https://lkml.org/lkml/2020/6/27/64 If there are any valid, but yet not changed URLs: See: https://lkml.org/lkml/2020/6/26/837 If you apply the patch, please let me know. drivers/net/ethernet/cadence/macb_pci.c | 2 +- drivers/net/ethernet/cadence/macb_ptp.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb_pci.c b/drivers/net/ethernet/cadence/macb_pci.c index 617b3b728dd0..cd7d0332cba3 100644 --- a/drivers/net/ethernet/cadence/macb_pci.c +++ b/drivers/net/ethernet/cadence/macb_pci.c @@ -2,7 +2,7 @@ /** * Cadence GEM PCI wrapper. * - * Copyright (C) 2016 Cadence Design Systems - http://www.cadence.com + * Copyright (C) 2016 Cadence Design Systems - https://www.cadence.com * * Authors: Rafal Ozieblo * Bartosz Folta diff --git a/drivers/net/ethernet/cadence/macb_ptp.c b/drivers/net/ethernet/cadence/macb_ptp.c index 43a3f0dbf857..31ebf3ee7ec0 100644 --- a/drivers/net/ethernet/cadence/macb_ptp.c +++ b/drivers/net/ethernet/cadence/macb_ptp.c @@ -2,7 +2,7 @@ /** * 1588 PTP support for Cadence GEM device. * - * Copyright (C) 2017 Cadence Design Systems - http://www.cadence.com + * Copyright (C) 2017 Cadence Design Systems - https://www.cadence.com * * Authors: Rafal Ozieblo * Bartosz Folta -- 2.27.0 -- Nicolas Ferre
Re: [PATCH net-next v2 0/4] net: macb: few code cleanups
On 02/07/2020 at 11:05, Claudiu Beznea wrote: Hi, Patches in this series cleanup a bit macb code. Thank you, Claudiu Beznea Changes in v2: - in patch 2/4 use hweight32() instead of hweight_long() Claudiu Beznea (4): net: macb: do not set again bit 0 of queue_mask net: macb: use hweight32() to count set bits in queue_mask net: macb: do not initialize queue variable net: macb: remove is_udp variable drivers/net/ethernet/cadence/macb_main.c | 19 +-- 1 file changed, 5 insertions(+), 14 deletions(-) You can add my: Acked-by: Nicolas Ferre For the whole series. Best regards, Nicolas -- Nicolas Ferre
Re: [PATCH v2] net: macb: undo operations in case of failure
On 18/06/2020 at 10:37, Claudiu Beznea wrote:
Undo previously done operation in case macb_phylink_connect()
fails. Since macb_reset_hw() is the 1st undo operation the
napi_exit label was renamed to reset_hw.
Fixes: 7897b071ac3b ("net: macb: convert to phylink")
Signed-off-by: Claudiu Beznea
Acked-by: Nicolas Ferre
Thanks Claudiu.
Regards,
Nicolas
---
Changes in v2:
- corrected fixes SHA1
drivers/net/ethernet/cadence/macb_main.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/ethernet/cadence/macb_main.c
index 67933079aeea..257c4920cb88 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -2558,7 +2558,7 @@ static int macb_open(struct net_device *dev)
err = macb_phylink_connect(bp);
if (err)
- goto napi_exit;
+ goto reset_hw;
netif_tx_start_all_queues(dev);
@@ -2567,9 +2567,11 @@ static int macb_open(struct net_device *dev)
return 0;
-napi_exit:
+reset_hw:
+ macb_reset_hw(bp);
for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue)
napi_disable(>napi);
+ macb_free_consistent(bp);
pm_exit:
pm_runtime_put_sync(>pdev->dev);
return err;
--
Nicolas Ferre
Re: [PATCH] net: macb: undo operations in case of failure
On 17/06/2020 at 18:29, Jakub Kicinski wrote:
EXTERNAL EMAIL: Do not click links or open attachments unless you know the
content is safe
On Wed, 17 Jun 2020 16:23:55 +0300 Claudiu Beznea wrote:
Undo previously done operation in case macb_phylink_connect()
fails. Since macb_reset_hw() is the 1st undo operation the
napi_exit label was renamed to reset_hw.
Fixes: b2b041417299 ("net: macb: convert to phylink")
Signed-off-by: Claudiu Beznea
Fixes tag: Fixes: b2b041417299 ("net: macb: convert to phylink")
Has these problem(s):
- Target SHA1 does not exist
It must be:
Fixes: 7897b071ac3b ("net: macb: convert to phylink")
--
Nicolas Ferre
Re: [PATCH v4 1/5] net: macb: fix wakeup test in runtime suspend/resume routines
On 07/05/2020 at 12:03, Nicolas Ferre wrote:
On 06/05/2020 at 22:18, Jakub Kicinski wrote:
EXTERNAL EMAIL: Do not click links or open attachments unless you know the
content is safe
On Wed, 6 May 2020 13:37:37 +0200 nicolas.fe...@microchip.com wrote:
From: Nicolas Ferre
Use the proper struct device pointer to check if the wakeup flag
and wakeup source are positioned.
Use the one passed by function call which is equivalent to
>dev->dev.parent.
It's preventing the trigger of a spurious interrupt in case the
Wake-on-Lan feature is used.
Fixes: bc1109d04c39 ("net: macb: Add pm runtime support")
Fixes tag: Fixes: bc1109d04c39 ("net: macb: Add pm runtime support")
Has these problem(s):
- Target SHA1 does not exist
Indeed, it's:
Fixes: d54f89af6cc4 ("net: macb: Add pm runtime support")
David: do I have to respin or you can modify it?
David, all, I'm about to resend this series (alternative to "ping"),
however:
1/ Now that it's late in the cycle, I'd like that you tell me if I
rebase on net-next because it isn't not sensible to queue such (non
urgeent) changes at rc7
2/ I didn't get answers from Russell and can't tell if there's a better
way of handling underlying phylink error of phylink_ethtool_set_wol() in
patch 3/5
Best regards,
Nicolas
Signed-off-by: Nicolas Ferre
Reviewed-by: Florian Fainelli
Cc: Claudiu Beznea
Cc: Harini Katakam
---
drivers/net/ethernet/cadence/macb_main.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/ethernet/cadence/macb_main.c
index 36290a8e2a84..d11fae37d46b 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -4616,7 +4616,7 @@ static int __maybe_unused macb_runtime_suspend(struct
device *dev)
struct net_device *netdev = dev_get_drvdata(dev);
struct macb *bp = netdev_priv(netdev);
- if (!(device_may_wakeup(>dev->dev))) {
+ if (!(device_may_wakeup(dev))) {
clk_disable_unprepare(bp->tx_clk);
clk_disable_unprepare(bp->hclk);
clk_disable_unprepare(bp->pclk);
@@ -4632,7 +4632,7 @@ static int __maybe_unused macb_runtime_resume(struct
device *dev)
struct net_device *netdev = dev_get_drvdata(dev);
struct macb *bp = netdev_priv(netdev);
- if (!(device_may_wakeup(>dev->dev))) {
+ if (!(device_may_wakeup(dev))) {
clk_prepare_enable(bp->pclk);
clk_prepare_enable(bp->hclk);
clk_prepare_enable(bp->tx_clk);
--
Nicolas Ferre
Re: [PATCH v4 3/5] net: macb: fix macb_get/set_wol() when moving to phylink
Russell,
Thanks for the feedback.
On 13/05/2020 at 15:05, Russell King - ARM Linux admin wrote:
On Wed, May 06, 2020 at 01:37:39PM +0200, nicolas.fe...@microchip.com wrote:
From: Nicolas Ferre
Keep previous function goals and integrate phylink actions to them.
phylink_ethtool_get_wol() is not enough to figure out if Ethernet driver
supports Wake-on-Lan.
Initialization of "supported" and "wolopts" members is done in phylink
function, no need to keep them in calling function.
phylink_ethtool_set_wol() return value is not enough to determine
if WoL is enabled for the calling Ethernet driver. Call it first
but don't rely on its return value as most of simple PHY drivers
don't implement a set_wol() function.
Fixes: 7897b071ac3b ("net: macb: convert to phylink")
Signed-off-by: Nicolas Ferre
Reviewed-by: Florian Fainelli
Cc: Claudiu Beznea
Cc: Harini Katakam
Cc: Antoine Tenart
---
drivers/net/ethernet/cadence/macb_main.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/ethernet/cadence/macb_main.c
index 53e81ab048ae..24c044dc7fa0 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -2817,21 +2817,23 @@ static void macb_get_wol(struct net_device *netdev,
struct ethtool_wolinfo *wol)
{
struct macb *bp = netdev_priv(netdev);
- wol->supported = 0;
- wol->wolopts = 0;
-
- if (bp->wol & MACB_WOL_HAS_MAGIC_PACKET)
+ if (bp->wol & MACB_WOL_HAS_MAGIC_PACKET) {
phylink_ethtool_get_wol(bp->phylink, wol);
+ wol->supported |= WAKE_MAGIC;
+
+ if (bp->wol & MACB_WOL_ENABLED)
+ wol->wolopts |= WAKE_MAGIC;
+ }
}
static int macb_set_wol(struct net_device *netdev, struct ethtool_wolinfo
*wol)
{
struct macb *bp = netdev_priv(netdev);
- int ret;
- ret = phylink_ethtool_set_wol(bp->phylink, wol);
- if (!ret)
- return 0;
+ /* Pass the order to phylink layer.
+ * Don't test return value as set_wol() is often not supported.
+ */
+ phylink_ethtool_set_wol(bp->phylink, wol);
If this returns an error, does that mean WOL works or does it not?
In my use case (simple phy: "Micrel KSZ8081"), if I have the error
"-EOPNOTSUPP", it simply means that this phy driver doesn't have the
set_wol() function. But on the MAC side, I can perfectly wake-up on WoL
event as the phy acts as a pass-through.
Note that if set_wol() is not supported, this will return -EOPNOTSUPP.
What about other errors?
True, I don't manage them. But for now this patch is a fix that only
reverts to previous behavior. In other terms, it only fixes the regression.
But can I make the difference, and how, between?
1/ the phy doesn't support WoL and could prevent the WoL to happen on
the MAC
2/ the phy doesn't implement (yet) the set_wol() function, if MAC can
manage, it's fine
If you want to just ignore the case where it's not supported, then
this looks like a sledge hammer to crack a nut.
Do you suggest that I just don't call phylink_ethtool_set_wol() at all?
But what if the underlying phy does support WoL?
Best regards,
--
Nicolas Ferre
Re: [PATCH v4 1/5] net: macb: fix wakeup test in runtime suspend/resume routines
On 06/05/2020 at 22:18, Jakub Kicinski wrote:
EXTERNAL EMAIL: Do not click links or open attachments unless you know the
content is safe
On Wed, 6 May 2020 13:37:37 +0200 nicolas.fe...@microchip.com wrote:
From: Nicolas Ferre
Use the proper struct device pointer to check if the wakeup flag
and wakeup source are positioned.
Use the one passed by function call which is equivalent to
>dev->dev.parent.
It's preventing the trigger of a spurious interrupt in case the
Wake-on-Lan feature is used.
Fixes: bc1109d04c39 ("net: macb: Add pm runtime support")
Fixes tag: Fixes: bc1109d04c39 ("net: macb: Add pm runtime support")
Has these problem(s):
- Target SHA1 does not exist
Indeed, it's:
Fixes: d54f89af6cc4 ("net: macb: Add pm runtime support")
David: do I have to respin or you can modify it?
Thanks. Regards,
Nicolas
Signed-off-by: Nicolas Ferre
Reviewed-by: Florian Fainelli
Cc: Claudiu Beznea
Cc: Harini Katakam
---
drivers/net/ethernet/cadence/macb_main.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/ethernet/cadence/macb_main.c
index 36290a8e2a84..d11fae37d46b 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -4616,7 +4616,7 @@ static int __maybe_unused macb_runtime_suspend(struct
device *dev)
struct net_device *netdev = dev_get_drvdata(dev);
struct macb *bp = netdev_priv(netdev);
- if (!(device_may_wakeup(>dev->dev))) {
+ if (!(device_may_wakeup(dev))) {
clk_disable_unprepare(bp->tx_clk);
clk_disable_unprepare(bp->hclk);
clk_disable_unprepare(bp->pclk);
@@ -4632,7 +4632,7 @@ static int __maybe_unused macb_runtime_resume(struct
device *dev)
struct net_device *netdev = dev_get_drvdata(dev);
struct macb *bp = netdev_priv(netdev);
- if (!(device_may_wakeup(>dev->dev))) {
+ if (!(device_may_wakeup(dev))) {
clk_prepare_enable(bp->pclk);
clk_prepare_enable(bp->hclk);
clk_prepare_enable(bp->tx_clk);
--
Nicolas Ferre
Re: [PATCH net v2] net: macb: fix an issue about leak related system resources
On 29/04/2020 at 15:56, Dejin Zheng wrote:
EXTERNAL EMAIL: Do not click links or open attachments unless you know the
content is safe
A call of the function macb_init() can fail in the function
fu540_c000_init. The related system resources were not released
then. use devm_platform_ioremap_resource() to replace ioremap()
to fix it.
Fixes: c218ad559020ff9 ("macb: Add support for SiFive FU540-C000")
Cc: Andy Shevchenko
Reviewed-by: Yash Shah
Signed-off-by: Dejin Zheng
---
v1 -> v2:
- Nicolas and Andy suggest use devm_platform_ioremap_resource()
to repalce devm_ioremap() to fix this issue. Thanks Nicolas
and Andy.
- Yash help me to review this patch, Thanks Yash!
drivers/net/ethernet/cadence/macb_main.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/ethernet/cadence/macb_main.c
index a0e8c5bbabc0..99354e327d1f 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -4172,13 +4172,7 @@ static int fu540_c000_clk_init(struct platform_device
*pdev, struct clk **pclk,
static int fu540_c000_init(struct platform_device *pdev)
{
- struct resource *res;
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- if (!res)
- return -ENODEV;
-
- mgmt->reg = ioremap(res->start, resource_size(res));
+ mgmt->reg = devm_platform_ioremap_resource(pdev, 1);
if (!mgmt->reg)
Is your test valid then?
Please use:
if (IS_ERR(base))
return PTR_ERR(base);
As advised by:
lib/devres.c:156
Regards,
Nicolas
return -ENOMEM;
--
2.25.0
--
Nicolas Ferre
Re: [PATCH net v1] net: macb: fix an issue about leak related system resources
On 28/04/2020 at 05:24, Dejin Zheng wrote:
On Mon, Apr 27, 2020 at 01:33:41PM +0300, Andy Shevchenko wrote:
On Sat, Apr 25, 2020 at 3:57 PM Dejin Zheng wrote:
A call of the function macb_init() can fail in the function
fu540_c000_init. The related system resources were not released
then. use devm_ioremap() to replace ioremap() for fix it.
Why not to go further and convert to use devm_platform_ioremap_resource()?
devm_platform_ioremap_resource() will call devm_request_mem_region(),
and here did not do it.
And what about devm_platform_get_and_ioremap_resource()? This would
streamline this whole fu540_c000_init() function.
Regards,
Nicolas
Fixes: c218ad559020ff9 ("macb: Add support for SiFive FU540-C000")
Cc: Andy Shevchenko
Signed-off-by: Dejin Zheng
---
drivers/net/ethernet/cadence/macb_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/ethernet/cadence/macb_main.c
index a0e8c5bbabc0..edba2eb56231 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -4178,7 +4178,7 @@ static int fu540_c000_init(struct platform_device *pdev)
if (!res)
return -ENODEV;
- mgmt->reg = ioremap(res->start, resource_size(res));
+ mgmt->reg = devm_ioremap(>dev, res->start, resource_size(res));
if (!mgmt->reg)
return -ENOMEM;
--
Nicolas Ferre
[PATCH 2/2] mmc: sdhci-of-at91: add DT property to enable calibration on full reset
Add a property to keep the analog calibration cell powered.
This feature is specific to the Microchip SDHCI IP and outside
of the standard SDHCI register map.
By always keeping it on, after a full reset sequence, we make sure
that this feature is activated and not disabled.
We expose a hardware property to the DT as this feature can be used
to adapt SDHCI behavior vs. how the SDCAL SoC pin is connected
on the board.
Note that managing properly this property would reduce
power consumption on some SAMA5D2 SiP revisions.
Signed-off-by: Nicolas Ferre
---
drivers/mmc/host/sdhci-of-at91.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/mmc/host/sdhci-of-at91.c b/drivers/mmc/host/sdhci-of-at91.c
index e7d1920729fb..9571c4a882a9 100644
--- a/drivers/mmc/host/sdhci-of-at91.c
+++ b/drivers/mmc/host/sdhci-of-at91.c
@@ -27,6 +27,9 @@
#define SDMMC_CACR 0x230
#defineSDMMC_CACR_CAPWREN BIT(0)
#defineSDMMC_CACR_KEY (0x46 << 8)
+#define SDMMC_CALCR0x240
+#defineSDMMC_CALCR_EN BIT(0)
+#defineSDMMC_CALCR_ALWYSON BIT(4)
#define SDHCI_AT91_PRESET_COMMON_CONF 0x400 /* drv type B, programmable clock
mode */
@@ -35,6 +38,7 @@ struct sdhci_at91_priv {
struct clk *gck;
struct clk *mainck;
bool restore_needed;
+ bool cal_always_on;
};
static void sdhci_at91_set_force_card_detect(struct sdhci_host *host)
@@ -116,10 +120,17 @@ static void sdhci_at91_set_uhs_signaling(struct
sdhci_host *host,
static void sdhci_at91_reset(struct sdhci_host *host, u8 mask)
{
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct sdhci_at91_priv *priv = sdhci_pltfm_priv(pltfm_host);
+
sdhci_reset(host, mask);
if (host->mmc->caps & MMC_CAP_NONREMOVABLE)
sdhci_at91_set_force_card_detect(host);
+
+ if (priv->cal_always_on && (mask & SDHCI_RESET_ALL))
+ sdhci_writel(host, SDMMC_CALCR_ALWYSON | SDMMC_CALCR_EN,
+SDMMC_CALCR);
}
static const struct sdhci_ops sdhci_at91_sama5d2_ops = {
@@ -345,6 +356,14 @@ static int sdhci_at91_probe(struct platform_device *pdev)
priv->restore_needed = false;
+ /*
+* if SDCAL pin is wrongly connected, we must enable
+* the analog calibration cell permanently.
+*/
+ priv->cal_always_on =
+ device_property_read_bool(>dev,
+ "microchip,sdcal-inverted");
+
ret = mmc_of_parse(host->mmc);
if (ret)
goto clocks_disable_unprepare;
--
2.17.1
[PATCH 1/2] dt-bindings: sdhci-of-at91: add the microchip,sdcal-inverted property
Add the specific microchip,sdcal-inverted property to at91 sdhci device binding. This optional property describes how the SoC SDCAL pin is connected. It could be handled at SiP, SoM or board level. This property read by at91 sdhci driver will allow to put in place a software workaround that would reduce power consumption. Signed-off-by: Nicolas Ferre --- Documentation/devicetree/bindings/mmc/sdhci-atmel.txt | 5 + 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/sdhci-atmel.txt b/Documentation/devicetree/bindings/mmc/sdhci-atmel.txt index 1b662d7171a0..503c6dbac1b2 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-atmel.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-atmel.txt @@ -9,6 +9,11 @@ Required properties: - clocks: Phandlers to the clocks. - clock-names: Must be "hclock", "multclk", "baseclk"; +Optional properties: +- microchip,sdcal-inverted: when present, polarity on the SDCAL SoC pin is + inverted. The default polarity for this signal is described in the datasheet. + For instance on SAMA5D2, the pin is usually tied to the GND with a resistor + and a capacitor (see "SDMMC I/O Calibration" chapter). Example: -- 2.17.1
[PATCH 2/3] USB: host: ohci-at91: suspend: delay needed before to stop clocks
In order to completely remove marginal power consumption in PM suspend, we need to let the controller settle down before being stopped. In ohci_hcd_at91_drv_suspend() function, one additional delay is needed before to stop the clocks. Reported-by: Boris Krasnovskiy Signed-off-by: Nicolas Ferre --- drivers/usb/host/ohci-at91.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index cb63bcd5049a..85d67fe42d59 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c @@ -628,6 +628,7 @@ ohci_hcd_at91_drv_suspend(struct device *dev) /* flush the writes */ (void) ohci_readl (ohci, >regs->control); + msleep(1); at91_stop_clock(ohci_at91); } -- 2.17.1
[PATCH 3/3] USB: host: ohci-at91: resume: balance the clock start call
From: Boris Krasnovskiy There is a clock enable counter run away problem in resume ohci_at91. Code enables clock that was never disabled in case of non wakeup interface. That would make clock unstoppable in future. Use proper alternative to start clocks only if they were stopped before. Signed-off-by: Boris Krasnovskiy Signed-off-by: Nicolas Ferre --- drivers/usb/host/ohci-at91.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index 85d67fe42d59..513e48397743 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c @@ -643,8 +643,8 @@ ohci_hcd_at91_drv_resume(struct device *dev) if (ohci_at91->wakeup) disable_irq_wake(hcd->irq); - - at91_start_clock(ohci_at91); + else + at91_start_clock(ohci_at91); ohci_resume(hcd, false); -- 2.17.1
[PATCH 1/3] USB: host: ohci-at91: completely shutdown the controller in at91_stop_hc()
From: Boris Krasnovskiy When removing the ohci-at91 module, the fact of not running complete shutdown of all the ports was keeping additional analog cells consuming power for no reason. Doing Reset (OHCI_HCR) to HcCommandStatus register is the way to go, but using the OHCI controller shutdown procedure is just perfect for this. Signed-off-by: Boris Krasnovskiy Signed-off-by: Nicolas Ferre --- drivers/usb/host/ohci-at91.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index fc35a7993b7b..cb63bcd5049a 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c @@ -123,7 +123,7 @@ static void at91_stop_hc(struct platform_device *pdev) /* * Put the USB host controller into reset. */ - writel(0, >control); + usb_hcd_platform_shutdown(pdev); /* * Stop the USB clocks. -- 2.17.1
[PATCH 0/3] USB: host: ohci-at91: tailor power consumption
Following a set of experiments we found areas of improvement for OHCI power consumption (and associated USB analog cells). This enhances the shutdown of residual power consumption in case of Linux suspend/resume and removal of the driver (when compiled as a module). Best regards, Nicolas Boris Krasnovskiy (2): USB: host: ohci-at91: completely shutdown the controller in at91_stop_hc() USB: host: ohci-at91: resume: balance the clock start call Nicolas Ferre (1): USB: host: ohci-at91: suspend: delay needed before to stop clocks drivers/usb/host/ohci-at91.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) -- 2.17.1
[PATCH 3/3] mailmap: map old company name to new one @microchip.com
Map my old email address @atmel.com to my new company name. It happened 3 years ago but I realized the existence of this file recently. Signed-off-by: Nicolas Ferre --- .mailmap | 1 + 1 file changed, 1 insertion(+) diff --git a/.mailmap b/.mailmap index 3e01b1e5d584..54fb6af3fa38 100644 --- a/.mailmap +++ b/.mailmap @@ -182,6 +182,7 @@ Morten Welinder Morten Welinder Mythri P K Nguyen Anh Quynh +Nicolas Ferre Nicolas Pitre Nicolas Pitre Paolo 'Blaisorblade' Giarrusso -- 2.17.1
[PATCH 2/3] MAINTAINERS: at91: remove the TC entry
"MICROCHIP TIMER COUNTER (TC) AND CLOCKSOURCE DRIVERS" is better removed because one file entry is outdated and basically, the maintainer's pool of Alexandre, Ludovic and myself is better suited. drivers/misc/atmel_tclib.c file is going away in a patch to come and drivers/clocksource/tcb_clksrc.c file is actually named timer-atmel-tcb.c. This new name is catches by AT91 entry regular expression. Signed-off-by: Nicolas Ferre --- MAINTAINERS | 7 --- 1 file changed, 7 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index da7630c727be..c28a28d4cac9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10691,13 +10691,6 @@ S: Supported F: drivers/misc/atmel-ssc.c F: include/linux/atmel-ssc.h -MICROCHIP TIMER COUNTER (TC) AND CLOCKSOURCE DRIVERS -M: Nicolas Ferre -L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers) -S: Supported -F: drivers/misc/atmel_tclib.c -F: drivers/clocksource/tcb_clksrc.c - MICROCHIP USBA UDC DRIVER M: Cristian Birsan L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers) -- 2.17.1
[PATCH 1/3] MAINTAINERS: at91: Collect all pinctrl/gpio drivers in same entry
Andrei's address is not valid anymore, collect all pinctrl/gpio entries in the common "PIN CONTROLLER - MICROCHIP AT91" one and remove the PIOBU specific one. Signed-off-by: Nicolas Ferre --- MAINTAINERS | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index d214d3ebfb54..da7630c727be 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10679,12 +10679,6 @@ M: Nicolas Ferre S: Supported F: drivers/power/reset/at91-sama5d2_shdwc.c -MICROCHIP SAMA5D2-COMPATIBLE PIOBU GPIO -M: Andrei Stefanescu -L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers) -L: linux-g...@vger.kernel.org -F: drivers/gpio/gpio-sama5d2-piobu.c - MICROCHIP SPI DRIVER M: Nicolas Ferre S: Supported @@ -12768,6 +12762,7 @@ L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers) L: linux-g...@vger.kernel.org S: Supported F: drivers/pinctrl/pinctrl-at91* +F: drivers/gpio/gpio-sama5d2-piobu.c PIN CONTROLLER - FREESCALE M: Dong Aisheng -- 2.17.1
[PATCH] ARM: at91: Documentation: update the sama5d3 and armv7m datasheets
Update SAMA5D3 and SAM E70/S70/V70/V71 Family SoC Datasheets. URL are updated in Microchip documentation. Signed-off-by: Nicolas Ferre --- Documentation/arm/microchip.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/arm/microchip.rst b/Documentation/arm/microchip.rst index c9a44c98e868..1adf53dfc494 100644 --- a/Documentation/arm/microchip.rst +++ b/Documentation/arm/microchip.rst @@ -103,7 +103,7 @@ the Microchip website: http://www.microchip.com. * Datasheet - http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-11121-32-bit-Cortex-A5-Microcontroller-SAMA5D3_Datasheet.pdf + http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-11121-32-bit-Cortex-A5-Microcontroller-SAMA5D3_Datasheet_B.pdf * ARM Cortex-A5 + NEON based SoCs - sama5d4 family @@ -167,7 +167,7 @@ the Microchip website: http://www.microchip.com. * Datasheet - http://ww1.microchip.com/downloads/en/DeviceDoc/60001527A.pdf + http://ww1.microchip.com/downloads/en/DeviceDoc/SAM-E70-S70-V70-V71-Family-Data-Sheet-DS60001527D.pdf Linux kernel information -- 2.17.1
[PATCH] net: macb: remove redundant struct phy_device declaration
While moving the chunk of code during 739de9a1563a
("net: macb: Reorganize macb_mii bringup"), the declaration of
struct phy_device declaration was kept. It's not useful in this
function as we alrady have a phydev pointer.
Signed-off-by: Nicolas Ferre
---
drivers/net/ethernet/cadence/macb_main.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/ethernet/cadence/macb_main.c
index 009ed4c1baf3..59531adcbb42 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -530,8 +530,6 @@ static int macb_mii_probe(struct net_device *dev)
*/
if (!bp->phy_node && !phy_find_first(bp->mii_bus)) {
for (i = 0; i < PHY_MAX_ADDR; i++) {
- struct phy_device *phydev;
-
phydev = mdiobus_scan(bp->mii_bus, i);
if (IS_ERR(phydev) &&
PTR_ERR(phydev) != -ENODEV) {
--
2.17.1
[PATCH v3 2/3] dmaengine: at_xdmac: enhance channel errors handling in tasklet
Complement the identification of errors with stopping the channel and
dumping the descriptor that led to the error case.
Signed-off-by: Nicolas Ferre
Acked-by: Ludovic Desroches
---
v3: Typo in commit message, alignment in multi-line dev_dbg()
v2: added Ludovic's tag
address Vinod's comments (typo, comment, empty line before logical blocks)
drivers/dma/at_xdmac.c | 48 --
1 file changed, 42 insertions(+), 6 deletions(-)
diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index 37a269420435..1dd7edaefbdc 100644
--- a/drivers/dma/at_xdmac.c
+++ b/drivers/dma/at_xdmac.c
@@ -1575,6 +1575,46 @@ static void at_xdmac_handle_cyclic(struct at_xdmac_chan
*atchan)
dmaengine_desc_get_callback_invoke(txd, NULL);
}
+static void at_xdmac_handle_error(struct at_xdmac_chan *atchan)
+{
+ struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
+ struct at_xdmac_desc*bad_desc;
+
+ /*
+* The descriptor currently at the head of the active list is
+* broken. Since we don't have any way to report errors, we'll
+* just have to scream loudly and try to continue with other
+* descriptors queued (if any).
+*/
+ if (atchan->irq_status & AT_XDMAC_CIS_RBEIS)
+ dev_err(chan2dev(>chan), "read bus error!!!");
+ if (atchan->irq_status & AT_XDMAC_CIS_WBEIS)
+ dev_err(chan2dev(>chan), "write bus error!!!");
+ if (atchan->irq_status & AT_XDMAC_CIS_ROIS)
+ dev_err(chan2dev(>chan), "request overflow error!!!");
+
+ spin_lock_bh(>lock);
+
+ /* Channel must be disabled first as it's not done automatically */
+ at_xdmac_write(atxdmac, AT_XDMAC_GD, atchan->mask);
+ while (at_xdmac_read(atxdmac, AT_XDMAC_GS) & atchan->mask)
+ cpu_relax();
+
+ bad_desc = list_first_entry(>xfers_list,
+ struct at_xdmac_desc,
+ xfer_node);
+
+ spin_unlock_bh(>lock);
+
+ /* Print bad descriptor's details if needed */
+ dev_dbg(chan2dev(>chan),
+ "%s: lld: mbr_sa=%pad, mbr_da=%pad, mbr_ubc=0x%08x\n",
+ __func__, _desc->lld.mbr_sa, _desc->lld.mbr_da,
+ bad_desc->lld.mbr_ubc);
+
+ /* Then continue with usual descriptor management */
+}
+
static void at_xdmac_tasklet(unsigned long data)
{
struct at_xdmac_chan*atchan = (struct at_xdmac_chan *)data;
@@ -1594,12 +1634,8 @@ static void at_xdmac_tasklet(unsigned long data)
|| (atchan->irq_status & error_mask)) {
struct dma_async_tx_descriptor *txd;
- if (atchan->irq_status & AT_XDMAC_CIS_RBEIS)
- dev_err(chan2dev(>chan), "read bus error!!!");
- if (atchan->irq_status & AT_XDMAC_CIS_WBEIS)
- dev_err(chan2dev(>chan), "write bus error!!!");
- if (atchan->irq_status & AT_XDMAC_CIS_ROIS)
- dev_err(chan2dev(>chan), "request overflow
error!!!");
+ if (atchan->irq_status & error_mask)
+ at_xdmac_handle_error(atchan);
spin_lock(>lock);
desc = list_first_entry(>xfers_list,
--
2.17.1
[PATCH v3 3/3] dmaengine: at_xdmac: only monitor overflow errors for peripheral xfer
The overflow error flag (ROI: Request Overflow Error) is only relevant
for the case when the channel handles a peripheral synchronized transfer.
Not in the case of memory to memory transfer where there is no hardware
request signal.
Remove the use of this interrupt source in such a case. It's based on
the first descriptor which holds the configuration for the whole
linked list transfer.
Signed-off-by: Nicolas Ferre
Acked-by: Ludovic Desroches
---
v3: no change
v2: added Ludovic's tag
drivers/dma/at_xdmac.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index 1dd7edaefbdc..06cbe54e4c30 100644
--- a/drivers/dma/at_xdmac.c
+++ b/drivers/dma/at_xdmac.c
@@ -308,6 +308,11 @@ static inline int at_xdmac_csize(u32 maxburst)
return csize;
};
+static inline bool at_xdmac_chan_is_peripheral_xfer(u32 cfg)
+{
+ return cfg & AT_XDMAC_CC_TYPE_PER_TRAN;
+}
+
static inline u8 at_xdmac_get_dwidth(u32 cfg)
{
return (cfg & AT_XDMAC_CC_DWIDTH_MASK) >> AT_XDMAC_CC_DWIDTH_OFFSET;
@@ -389,7 +394,13 @@ static void at_xdmac_start_xfer(struct at_xdmac_chan
*atchan,
at_xdmac_chan_read(atchan, AT_XDMAC_CUBC));
at_xdmac_chan_write(atchan, AT_XDMAC_CID, 0x);
- reg = AT_XDMAC_CIE_RBEIE | AT_XDMAC_CIE_WBEIE | AT_XDMAC_CIE_ROIE;
+ reg = AT_XDMAC_CIE_RBEIE | AT_XDMAC_CIE_WBEIE;
+ /*
+* Request Overflow Error is only for peripheral synchronized transfers
+*/
+ if (at_xdmac_chan_is_peripheral_xfer(first->lld.mbr_cfg))
+ reg |= AT_XDMAC_CIE_ROIE;
+
/*
* There is no end of list when doing cyclic dma, we need to get
* an interrupt after each periods.
--
2.17.1
[PATCH v3 1/3] dmaengine: at_xdmac: remove BUG_ON macro in tasklet
Even if this case shouldn't happen when controller is properly programmed,
it's still better to avoid dumping a kernel Oops for this.
As the sequence may happen only for debugging purposes, log the error and
just finish the tasklet call.
Signed-off-by: Nicolas Ferre
Acked-by: Ludovic Desroches
---
v3: no change
v2: added Ludovic's tag
drivers/dma/at_xdmac.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index fe69dccfa0c0..37a269420435 100644
--- a/drivers/dma/at_xdmac.c
+++ b/drivers/dma/at_xdmac.c
@@ -1606,7 +1606,11 @@ static void at_xdmac_tasklet(unsigned long data)
struct at_xdmac_desc,
xfer_node);
dev_vdbg(chan2dev(>chan), "%s: desc 0x%p\n", __func__,
desc);
- BUG_ON(!desc->active_xfer);
+ if (!desc->active_xfer) {
+ dev_err(chan2dev(>chan), "Xfer not active:
exiting");
+ spin_unlock_bh(>lock);
+ return;
+ }
txd = >tx_dma_desc;
--
2.17.1
[PATCH v2 2/3] dmaengine: at_xdmac: enhance channel errors handling in tasklet
Complement the identification of errors with stoping the channel and
dumping the descriptor that led to the error case.
Signed-off-by: Nicolas Ferre
Acked-by: Ludovic Desroches
---
v2: added Ludovic's tag
address Vinod's comments (typo, comment, empty line before logical blocks)
drivers/dma/at_xdmac.c | 48 --
1 file changed, 42 insertions(+), 6 deletions(-)
diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index 37a269420435..b7117474a10d 100644
--- a/drivers/dma/at_xdmac.c
+++ b/drivers/dma/at_xdmac.c
@@ -1575,6 +1575,46 @@ static void at_xdmac_handle_cyclic(struct at_xdmac_chan
*atchan)
dmaengine_desc_get_callback_invoke(txd, NULL);
}
+static void at_xdmac_handle_error(struct at_xdmac_chan *atchan)
+{
+ struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
+ struct at_xdmac_desc*bad_desc;
+
+ /*
+* The descriptor currently at the head of the active list is
+* broken. Since we don't have any way to report errors, we'll
+* just have to scream loudly and try to continue with other
+* descriptors queued (if any).
+*/
+ if (atchan->irq_status & AT_XDMAC_CIS_RBEIS)
+ dev_err(chan2dev(>chan), "read bus error!!!");
+ if (atchan->irq_status & AT_XDMAC_CIS_WBEIS)
+ dev_err(chan2dev(>chan), "write bus error!!!");
+ if (atchan->irq_status & AT_XDMAC_CIS_ROIS)
+ dev_err(chan2dev(>chan), "request overflow error!!!");
+
+ spin_lock_bh(>lock);
+
+ /* Channel must be disabled first as it's not done automatically */
+ at_xdmac_write(atxdmac, AT_XDMAC_GD, atchan->mask);
+ while (at_xdmac_read(atxdmac, AT_XDMAC_GS) & atchan->mask)
+ cpu_relax();
+
+ bad_desc = list_first_entry(>xfers_list,
+ struct at_xdmac_desc,
+ xfer_node);
+
+ spin_unlock_bh(>lock);
+
+ /* Print bad descriptor's details if needed */
+ dev_dbg(chan2dev(>chan),
+"%s: lld: mbr_sa=%pad, mbr_da=%pad, mbr_ubc=0x%08x\n",
+__func__, _desc->lld.mbr_sa, _desc->lld.mbr_da,
+bad_desc->lld.mbr_ubc);
+
+ /* Then continue with usual descriptor management */
+}
+
static void at_xdmac_tasklet(unsigned long data)
{
struct at_xdmac_chan*atchan = (struct at_xdmac_chan *)data;
@@ -1594,12 +1634,8 @@ static void at_xdmac_tasklet(unsigned long data)
|| (atchan->irq_status & error_mask)) {
struct dma_async_tx_descriptor *txd;
- if (atchan->irq_status & AT_XDMAC_CIS_RBEIS)
- dev_err(chan2dev(>chan), "read bus error!!!");
- if (atchan->irq_status & AT_XDMAC_CIS_WBEIS)
- dev_err(chan2dev(>chan), "write bus error!!!");
- if (atchan->irq_status & AT_XDMAC_CIS_ROIS)
- dev_err(chan2dev(>chan), "request overflow
error!!!");
+ if (atchan->irq_status & error_mask)
+ at_xdmac_handle_error(atchan);
spin_lock(>lock);
desc = list_first_entry(>xfers_list,
--
2.17.1
[PATCH v2 3/3] dmaengine: at_xdmac: only monitor overflow errors for peripheral xfer
The overflow error flag (ROI: Request Overflow Error) is only relevant
for the case when the channel handles a peripheral synchronized transfer.
Not in the case of memory to memory transfer where there is no hardware
request signal.
Remove the use of this interrupt source in such a case. It's based on
the first descriptor which holds the configuration for the whole
linked list transfer.
Signed-off-by: Nicolas Ferre
Acked-by: Ludovic Desroches
---
v2: added Ludovic's tag
drivers/dma/at_xdmac.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index b7117474a10d..cbe545ae4dfc 100644
--- a/drivers/dma/at_xdmac.c
+++ b/drivers/dma/at_xdmac.c
@@ -308,6 +308,11 @@ static inline int at_xdmac_csize(u32 maxburst)
return csize;
};
+static inline bool at_xdmac_chan_is_peripheral_xfer(u32 cfg)
+{
+ return cfg & AT_XDMAC_CC_TYPE_PER_TRAN;
+}
+
static inline u8 at_xdmac_get_dwidth(u32 cfg)
{
return (cfg & AT_XDMAC_CC_DWIDTH_MASK) >> AT_XDMAC_CC_DWIDTH_OFFSET;
@@ -389,7 +394,13 @@ static void at_xdmac_start_xfer(struct at_xdmac_chan
*atchan,
at_xdmac_chan_read(atchan, AT_XDMAC_CUBC));
at_xdmac_chan_write(atchan, AT_XDMAC_CID, 0x);
- reg = AT_XDMAC_CIE_RBEIE | AT_XDMAC_CIE_WBEIE | AT_XDMAC_CIE_ROIE;
+ reg = AT_XDMAC_CIE_RBEIE | AT_XDMAC_CIE_WBEIE;
+ /*
+* Request Overflow Error is only for peripheral synchronized transfers
+*/
+ if (at_xdmac_chan_is_peripheral_xfer(first->lld.mbr_cfg))
+ reg |= AT_XDMAC_CIE_ROIE;
+
/*
* There is no end of list when doing cyclic dma, we need to get
* an interrupt after each periods.
--
2.17.1
[PATCH v2 1/3] dmaengine: at_xdmac: remove BUG_ON macro in tasklet
Even if this case shouldn't happen when controller is properly programmed,
it's still better to avoid dumping a kernel Oops for this.
As the sequence may happen only for debugging purposes, log the error and
just finish the tasklet call.
Signed-off-by: Nicolas Ferre
Acked-by: Ludovic Desroches
---
v2: added Ludovic's tag
drivers/dma/at_xdmac.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index fe69dccfa0c0..37a269420435 100644
--- a/drivers/dma/at_xdmac.c
+++ b/drivers/dma/at_xdmac.c
@@ -1606,7 +1606,11 @@ static void at_xdmac_tasklet(unsigned long data)
struct at_xdmac_desc,
xfer_node);
dev_vdbg(chan2dev(>chan), "%s: desc 0x%p\n", __func__,
desc);
- BUG_ON(!desc->active_xfer);
+ if (!desc->active_xfer) {
+ dev_err(chan2dev(>chan), "Xfer not active:
exiting");
+ spin_unlock_bh(>lock);
+ return;
+ }
txd = >tx_dma_desc;
--
2.17.1
[PATCH] ARM: at91: remove HAVE_FB_ATMEL for sama5 SoC as they use DRM
SAMA5 devices use the newer DRM driver for LCD. They don't need the older FB driver: remove the Kconfig option for them. Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/Kconfig | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 903f23c309df..01b1bdb4fb6e 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -21,7 +21,6 @@ config SOC_SAMA5D2 depends on ARCH_MULTI_V7 select SOC_SAMA5 select CACHE_L2X0 - select HAVE_FB_ATMEL select HAVE_AT91_UTMI select HAVE_AT91_USB_CLK select HAVE_AT91_H32MX @@ -36,7 +35,6 @@ config SOC_SAMA5D3 bool "SAMA5D3 family" depends on ARCH_MULTI_V7 select SOC_SAMA5 - select HAVE_FB_ATMEL select HAVE_AT91_UTMI select HAVE_AT91_SMD select HAVE_AT91_USB_CLK @@ -50,7 +48,6 @@ config SOC_SAMA5D4 depends on ARCH_MULTI_V7 select SOC_SAMA5 select CACHE_L2X0 - select HAVE_FB_ATMEL select HAVE_AT91_UTMI select HAVE_AT91_SMD select HAVE_AT91_USB_CLK -- 2.17.1
[PATCH v2] clk: at91: fix programmable clock for sama5d2
From: Matthias Wieloch
The prescaler formula of the programmable clock has changed for sama5d2. Update
the driver accordingly.
Fixes: a2038077de9a ("clk: at91: add sama5d2 PMC driver")
Cc: # v4.20+
Signed-off-by: Nicolas Ferre
[nicolas.fe...@microchip.com: adapt the prescaler range,
fix clk_programmable_recalc_rate, split patch]
Signed-off-by: Matthias Wieloch
Signed-off-by: Alexandre Belloni
---
v2: adapt to v5.1-rc1
remove unneeded sentence about DT in commit message
Stephen,
I think it would be good to see this fix going upstream during v5.1-rc phase.
Best regards,
Nicolas
drivers/clk/at91/clk-programmable.c | 57 ++---
drivers/clk/at91/pmc.h | 2 +
drivers/clk/at91/sama5d2.c | 10 -
3 files changed, 54 insertions(+), 15 deletions(-)
diff --git a/drivers/clk/at91/clk-programmable.c
b/drivers/clk/at91/clk-programmable.c
index 89d6f3736dbf..f8edbb65eda3 100644
--- a/drivers/clk/at91/clk-programmable.c
+++ b/drivers/clk/at91/clk-programmable.c
@@ -20,8 +20,7 @@
#define PROG_ID_MAX7
#define PROG_STATUS_MASK(id) (1 << ((id) + 8))
-#define PROG_PRES_MASK 0x7
-#define PROG_PRES(layout, pckr)((pckr >> layout->pres_shift) &
PROG_PRES_MASK)
+#define PROG_PRES(layout, pckr)((pckr >> layout->pres_shift) &
layout->pres_mask)
#define PROG_MAX_RM9200_CSS3
struct clk_programmable {
@@ -37,20 +36,29 @@ static unsigned long clk_programmable_recalc_rate(struct
clk_hw *hw,
unsigned long parent_rate)
{
struct clk_programmable *prog = to_clk_programmable(hw);
+ const struct clk_programmable_layout *layout = prog->layout;
unsigned int pckr;
+ unsigned long rate;
regmap_read(prog->regmap, AT91_PMC_PCKR(prog->id), );
- return parent_rate >> PROG_PRES(prog->layout, pckr);
+ if (layout->is_pres_direct)
+ rate = parent_rate / (PROG_PRES(layout, pckr) + 1);
+ else
+ rate = parent_rate >> PROG_PRES(layout, pckr);
+
+ return rate;
}
static int clk_programmable_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
+ struct clk_programmable *prog = to_clk_programmable(hw);
+ const struct clk_programmable_layout *layout = prog->layout;
struct clk_hw *parent;
long best_rate = -EINVAL;
unsigned long parent_rate;
- unsigned long tmp_rate;
+ unsigned long tmp_rate = 0;
int shift;
int i;
@@ -60,10 +68,18 @@ static int clk_programmable_determine_rate(struct clk_hw
*hw,
continue;
parent_rate = clk_hw_get_rate(parent);
- for (shift = 0; shift < PROG_PRES_MASK; shift++) {
- tmp_rate = parent_rate >> shift;
- if (tmp_rate <= req->rate)
- break;
+ if (layout->is_pres_direct) {
+ for (shift = 0; shift <= layout->pres_mask; shift++) {
+ tmp_rate = parent_rate / (shift + 1);
+ if (tmp_rate <= req->rate)
+ break;
+ }
+ } else {
+ for (shift = 0; shift < layout->pres_mask; shift++) {
+ tmp_rate = parent_rate >> shift;
+ if (tmp_rate <= req->rate)
+ break;
+ }
}
if (tmp_rate > req->rate)
@@ -137,16 +153,23 @@ static int clk_programmable_set_rate(struct clk_hw *hw,
unsigned long rate,
if (!div)
return -EINVAL;
- shift = fls(div) - 1;
+ if (layout->is_pres_direct) {
+ shift = div - 1;
- if (div != (1 << shift))
- return -EINVAL;
+ if (shift > layout->pres_mask)
+ return -EINVAL;
+ } else {
+ shift = fls(div) - 1;
- if (shift >= PROG_PRES_MASK)
- return -EINVAL;
+ if (div != (1 << shift))
+ return -EINVAL;
+
+ if (shift >= layout->pres_mask)
+ return -EINVAL;
+ }
regmap_update_bits(prog->regmap, AT91_PMC_PCKR(prog->id),
- PROG_PRES_MASK << layout->pres_shift,
+ layout->pres_mask << layout->pres_shift,
shift << layout->pres_shift);
return 0;
@@ -202,19 +225,25 @@ at91_clk_register_programmable(struct regmap *regmap,
}
const struct clk_programmable
[PATCH] ARM: dts: at91: sama5d2: add labels to soc dtsi for derivative boards
This adds labels to commonly used device-tree nodes so that derivative
boards can avoid ahb/apb hierarchy.
Signed-off-by: Nicolas Ferre
---
arch/arm/boot/dts/sama5d2.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index d159ee42ef29..9519b9d5abca 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -688,13 +688,13 @@
ranges = <0 0xf8044000 0x1420>;
};
- rstc@f8048000 {
+ reset_controller: rstc@f8048000 {
compatible = "atmel,sama5d3-rstc";
reg = <0xf8048000 0x10>;
clocks = <>;
};
- shdwc@f8048010 {
+ shutdown_controller: shdwc@f8048010 {
compatible = "atmel,sama5d2-shdwc";
reg = <0xf8048010 0x10>;
clocks = <>;
@@ -710,7 +710,7 @@
clocks = < PMC_TYPE_CORE PMC_MCK2>;
};
- watchdog@f8048040 {
+ watchdog: watchdog@f8048040 {
compatible = "atmel,sama5d4-wdt";
reg = <0xf8048040 0x10>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
--
2.17.1
[PATCH v2 1/3] dt-bindings: arm: atmel: add missing samx7 to reset controller
Add this missing compatibility string to the Reset Controller compatible string chip list. Signed-off-by: Nicolas Ferre Reviewed-by: Rob Herring --- v2: split series and collect tag Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt index df444073d376..dd7864f2bb2b 100644 --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt @@ -21,7 +21,7 @@ Its subnodes can be: RSTC Reset Controller required properties: - compatible: Should be "atmel,-rstc". - can be "at91sam9260" or "at91sam9g45" or "sama5d3" + can be "at91sam9260", "at91sam9g45", "sama5d3" or "samx7" - reg: Should contain registers location and length - clocks: phandle to input clock. -- 2.17.1
[PATCH v2 3/3] power: reset: at91-reset: add support for sam9x60 SoC
Add support for additional reset causes and the proper compatibility
string for sam9x60 SoC. The restart function is the same as the samx7.
Signed-off-by: Nicolas Ferre
Acked-by: Sebastian Reichel
---
v2: split series and collect tag
Sebastian,
I add your Acked-by tag here but as I would like that you take the 3 patches on
your tree now, I let you modify it on your side. I'm expecting Alexandre or
Ludovic to have a look as well.
Best regards,
Nicolas
drivers/power/reset/at91-reset.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/power/reset/at91-reset.c b/drivers/power/reset/at91-reset.c
index f44a9ffcc2ab..44ca983a49a1 100644
--- a/drivers/power/reset/at91-reset.c
+++ b/drivers/power/reset/at91-reset.c
@@ -44,6 +44,9 @@ enum reset_type {
RESET_TYPE_WATCHDOG = 2,
RESET_TYPE_SOFTWARE = 3,
RESET_TYPE_USER = 4,
+ RESET_TYPE_CPU_FAIL = 6,
+ RESET_TYPE_XTAL_FAIL= 7,
+ RESET_TYPE_ULP2 = 8,
};
static void __iomem *at91_ramc_base[2], *at91_rstc_base;
@@ -164,6 +167,15 @@ static void __init at91_reset_status(struct
platform_device *pdev)
case RESET_TYPE_USER:
reason = "user reset";
break;
+ case RESET_TYPE_CPU_FAIL:
+ reason = "CPU clock failure detection";
+ break;
+ case RESET_TYPE_XTAL_FAIL:
+ reason = "32.768 kHz crystal failure detection";
+ break;
+ case RESET_TYPE_ULP2:
+ reason = "ULP2 reset";
+ break;
default:
reason = "unknown reset";
break;
@@ -183,6 +195,7 @@ static const struct of_device_id at91_reset_of_match[] = {
{ .compatible = "atmel,at91sam9g45-rstc", .data = at91sam9g45_restart },
{ .compatible = "atmel,sama5d3-rstc", .data = sama5d3_restart },
{ .compatible = "atmel,samx7-rstc", .data = samx7_restart },
+ { .compatible = "microchip,sam9x60-rstc", .data = samx7_restart },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, at91_reset_of_match);
--
2.17.1
[PATCH v2 2/3] dt-bindings: arm: atmel: add new sam9x60 reset controller binding
Update the Reset Controller's binding to add new SoC compatibility string. Signed-off-by: Nicolas Ferre Reviewed-by: Rob Herring --- v2: split series and collect tag Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt index dd7864f2bb2b..dfc91bc02b97 100644 --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt @@ -22,6 +22,7 @@ Its subnodes can be: RSTC Reset Controller required properties: - compatible: Should be "atmel,-rstc". can be "at91sam9260", "at91sam9g45", "sama5d3" or "samx7" + it also can be "microchip,sam9x60-rstc" - reg: Should contain registers location and length - clocks: phandle to input clock. -- 2.17.1
[RESEND PATCH] dt-bindings: arm: atmel: add new sam9x60 SFR binding
Add this SFR compatible definition for the sam9x60 SoC. Will be needed
in OHCI driver: ohci-at91.c.
Signed-off-by: Nicolas Ferre
---
Hi Rob,
It seems that this patch was lost in my series "[PATCH 0/8] ARM: at91/dt:
update to existing drivers for the sam9x60 SoC". I split it and resend it only
for USB tree.
Hi Greg,
This DT bindind goes with the patch already queued in your usb-next tree "USB:
host: ohci-at91: add sam9x60-sfr definition for ohci".
Once Rob added his tag, can you please queue it in your tree as I reviewed my
first idea of adding it to the arm-soc tree?
Best regards,
Nicolas
Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
index badce6ef3ab3..dfc91bc02b97 100644
--- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
@@ -148,6 +148,7 @@ required properties:
- compatible: Should be "atmel,-sfr", "syscon" or
"atmel,-sfrbu", "syscon"
can be "sama5d3", "sama5d4" or "sama5d2".
+ It also can be "microchip,sam9x60-sfr", "syscon".
- reg: Should contain registers location and length
sfr@f0038000 {
--
2.17.1
[PATCH v2 1/3] net/macb: bindings doc/trivial: fix documentation for sama5d3 10/100 interface
This removes a line left while adding the correct compatibility string for
sama5d3 10/100 interface. Now use the "atmel,sama5d3-macb" string.
Signed-off-by: Nicolas Ferre
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/net/macb.txt | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/macb.txt
b/Documentation/devicetree/bindings/net/macb.txt
index 3e17ac1d5d58..f5c414b10e27 100644
--- a/Documentation/devicetree/bindings/net/macb.txt
+++ b/Documentation/devicetree/bindings/net/macb.txt
@@ -3,8 +3,7 @@
Required properties:
- compatible: Should be "cdns,[-]{macb|gem}"
Use "cdns,at91rm9200-emac" Atmel at91rm9200 SoC.
- Use "cdns,at91sam9260-macb" for Atmel at91sam9 SoCs or the 10/100Mbit IP
- available on sama5d3 SoCs.
+ Use "cdns,at91sam9260-macb" for Atmel at91sam9 SoCs.
Use "cdns,np4-macb" for NP4 SoC devices.
Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form:
"cdns,macb".
Use "cdns,pc302-gem" for Picochip picoXcell pc302 and later devices based on
--
2.17.1
[PATCH v2 3/3] net: macb: add sam9x60-macb compatibility string
Add a new compatibility string for this product. It's using
at91sam9260-macb layout but has a newer hardware revision: it's safer
to use its own string.
Signed-off-by: Nicolas Ferre
---
v2: applies on top of next-20190206
drivers/net/ethernet/cadence/macb_main.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/ethernet/cadence/macb_main.c
index 2b2882615e8b..eaabe8c278ec 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -3943,6 +3943,7 @@ static const struct of_device_id macb_dt_ids[] = {
{ .compatible = "cdns,np4-macb", .data = _config },
{ .compatible = "cdns,pc302-gem", .data = _config },
{ .compatible = "cdns,gem", .data = _config },
+ { .compatible = "cdns,sam9x60-macb", .data = _config },
{ .compatible = "atmel,sama5d2-gem", .data = _config },
{ .compatible = "atmel,sama5d3-gem", .data = _config },
{ .compatible = "atmel,sama5d3-macb", .data = _config },
--
2.17.1
[PATCH v2 2/3] net/macb: bindings doc: add sam9x60 binding
Add the compatibility sting documentation for sam9x60 10/100 interface.
Signed-off-by: Nicolas Ferre
---
Hi Rob,
Your tag is missing for this patch.
Documentation/devicetree/bindings/net/macb.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/net/macb.txt
b/Documentation/devicetree/bindings/net/macb.txt
index f5c414b10e27..174f292d8a3e 100644
--- a/Documentation/devicetree/bindings/net/macb.txt
+++ b/Documentation/devicetree/bindings/net/macb.txt
@@ -4,6 +4,7 @@ Required properties:
- compatible: Should be "cdns,[-]{macb|gem}"
Use "cdns,at91rm9200-emac" Atmel at91rm9200 SoC.
Use "cdns,at91sam9260-macb" for Atmel at91sam9 SoCs.
+ Use "cdns,sam9x60-macb" for Microchip sam9x60 SoC.
Use "cdns,np4-macb" for NP4 SoC devices.
Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form:
"cdns,macb".
Use "cdns,pc302-gem" for Picochip picoXcell pc302 and later devices based on
--
2.17.1
[PATCH 2/3] dmaengine: at_xdmac: enhance channel errors handling in tasklet
Complement the identification of errors with stoping the channel and
dumping the descriptor that led to the error case.
Signed-off-by: Nicolas Ferre
---
drivers/dma/at_xdmac.c | 43 --
1 file changed, 37 insertions(+), 6 deletions(-)
diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index 37a269420435..ec7a29d8e448 100644
--- a/drivers/dma/at_xdmac.c
+++ b/drivers/dma/at_xdmac.c
@@ -1575,6 +1575,41 @@ static void at_xdmac_handle_cyclic(struct at_xdmac_chan
*atchan)
dmaengine_desc_get_callback_invoke(txd, NULL);
}
+static void at_xdmac_handle_error(struct at_xdmac_chan *atchan)
+{
+ struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
+ struct at_xdmac_desc*bad_desc;
+
+ /*
+* The descriptor currently at the head of the active list is
+* broked. Since we don't have any way to report errors, we'll
+* just have to scream loudly and try to carry on.
+*/
+ if (atchan->irq_status & AT_XDMAC_CIS_RBEIS)
+ dev_err(chan2dev(>chan), "read bus error!!!");
+ if (atchan->irq_status & AT_XDMAC_CIS_WBEIS)
+ dev_err(chan2dev(>chan), "write bus error!!!");
+ if (atchan->irq_status & AT_XDMAC_CIS_ROIS)
+ dev_err(chan2dev(>chan), "request overflow error!!!");
+
+ spin_lock_bh(>lock);
+ /* Channel must be disabled first as it's not done automatically */
+ at_xdmac_write(atxdmac, AT_XDMAC_GD, atchan->mask);
+ while (at_xdmac_read(atxdmac, AT_XDMAC_GS) & atchan->mask)
+ cpu_relax();
+ bad_desc = list_first_entry(>xfers_list,
+ struct at_xdmac_desc,
+ xfer_node);
+ spin_unlock_bh(>lock);
+ /* Print bad descriptor's details if needed */
+ dev_dbg(chan2dev(>chan),
+"%s: lld: mbr_sa=%pad, mbr_da=%pad, mbr_ubc=0x%08x\n",
+__func__, _desc->lld.mbr_sa, _desc->lld.mbr_da,
+bad_desc->lld.mbr_ubc);
+
+ /* Then continue with usual descriptor management */
+}
+
static void at_xdmac_tasklet(unsigned long data)
{
struct at_xdmac_chan*atchan = (struct at_xdmac_chan *)data;
@@ -1594,12 +1629,8 @@ static void at_xdmac_tasklet(unsigned long data)
|| (atchan->irq_status & error_mask)) {
struct dma_async_tx_descriptor *txd;
- if (atchan->irq_status & AT_XDMAC_CIS_RBEIS)
- dev_err(chan2dev(>chan), "read bus error!!!");
- if (atchan->irq_status & AT_XDMAC_CIS_WBEIS)
- dev_err(chan2dev(>chan), "write bus error!!!");
- if (atchan->irq_status & AT_XDMAC_CIS_ROIS)
- dev_err(chan2dev(>chan), "request overflow
error!!!");
+ if (atchan->irq_status & error_mask)
+ at_xdmac_handle_error(atchan);
spin_lock(>lock);
desc = list_first_entry(>xfers_list,
--
2.17.1
[PATCH 1/3] dmaengine: at_xdmac: remove BUG_ON macro in tasklet
Even if this case shouldn't happen when controller is properly programmed,
it's still better to avoid dumping a kernel Oops for this.
As the sequence may happen only for debugging purposes, log the error and
just finish the tasklet call.
Signed-off-by: Nicolas Ferre
---
drivers/dma/at_xdmac.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index fe69dccfa0c0..37a269420435 100644
--- a/drivers/dma/at_xdmac.c
+++ b/drivers/dma/at_xdmac.c
@@ -1606,7 +1606,11 @@ static void at_xdmac_tasklet(unsigned long data)
struct at_xdmac_desc,
xfer_node);
dev_vdbg(chan2dev(>chan), "%s: desc 0x%p\n", __func__,
desc);
- BUG_ON(!desc->active_xfer);
+ if (!desc->active_xfer) {
+ dev_err(chan2dev(>chan), "Xfer not active:
exiting");
+ spin_unlock_bh(>lock);
+ return;
+ }
txd = >tx_dma_desc;
--
2.17.1
[PATCH 3/3] dmaengine: at_xdmac: only monitor overflow errors for peripheral xfer
The overflow error flag (ROI: Request Overflow Error) is only relevant
for the case when the channel handles a peripheral synchronized transfer.
Not in the case of memory to memory transfer where there is no hardware
request signal.
Remove the use of this interrupt source in such a case. It's based on
the first descriptor which holds the configuration for the whole
linked list transfer.
Signed-off-by: Nicolas Ferre
---
drivers/dma/at_xdmac.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index ec7a29d8e448..b558a23ffbc2 100644
--- a/drivers/dma/at_xdmac.c
+++ b/drivers/dma/at_xdmac.c
@@ -308,6 +308,11 @@ static inline int at_xdmac_csize(u32 maxburst)
return csize;
};
+static inline bool at_xdmac_chan_is_peripheral_xfer(u32 cfg)
+{
+ return cfg & AT_XDMAC_CC_TYPE_PER_TRAN;
+}
+
static inline u8 at_xdmac_get_dwidth(u32 cfg)
{
return (cfg & AT_XDMAC_CC_DWIDTH_MASK) >> AT_XDMAC_CC_DWIDTH_OFFSET;
@@ -389,7 +394,13 @@ static void at_xdmac_start_xfer(struct at_xdmac_chan
*atchan,
at_xdmac_chan_read(atchan, AT_XDMAC_CUBC));
at_xdmac_chan_write(atchan, AT_XDMAC_CID, 0x);
- reg = AT_XDMAC_CIE_RBEIE | AT_XDMAC_CIE_WBEIE | AT_XDMAC_CIE_ROIE;
+ reg = AT_XDMAC_CIE_RBEIE | AT_XDMAC_CIE_WBEIE;
+ /*
+* Request Overflow Error is only for peripheral synchronized transfers
+*/
+ if (at_xdmac_chan_is_peripheral_xfer(first->lld.mbr_cfg))
+ reg |= AT_XDMAC_CIE_ROIE;
+
/*
* There is no end of list when doing cyclic dma, we need to get
* an interrupt after each periods.
--
2.17.1
[PATCH] mmc: atmel-mci: enable 8 bits buswidth support
This patch adds support for 8-bit buswidth.
Relevant SDCR value modified.
Signed-off-by: Nicolas Ferre
---
drivers/mmc/host/atmel-mci.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
index 47189f9ed4e2..735aa5871358 100644
--- a/drivers/mmc/host/atmel-mci.c
+++ b/drivers/mmc/host/atmel-mci.c
@@ -1410,6 +1410,9 @@ static void atmci_set_ios(struct mmc_host *mmc, struct
mmc_ios *ios)
case MMC_BUS_WIDTH_4:
slot->sdc_reg |= ATMCI_SDCBUS_4BIT;
break;
+ case MMC_BUS_WIDTH_8:
+ slot->sdc_reg |= ATMCI_SDCBUS_8BIT;
+ break;
}
if (ios->clock) {
@@ -2275,8 +2278,11 @@ static int atmci_init_slot(struct atmel_mci *host,
* use only one bit for data to prevent fifo underruns and overruns
* which will corrupt data.
*/
- if ((slot_data->bus_width >= 4) && host->caps.has_rwproof)
+ if ((slot_data->bus_width >= 4) && host->caps.has_rwproof) {
mmc->caps |= MMC_CAP_4_BIT_DATA;
+ if (slot_data->bus_width >= 8)
+ mmc->caps |= MMC_CAP_8_BIT_DATA;
+ }
if (atmci_get_version(host) < 0x200) {
mmc->max_segs = 256;
--
2.17.1
[PATCH 1/8] dt-bindings: arm: atmel: add missing samx7 to reset controller
Add this missing compatibility string to the Reset Controller compatible string chip list. Signed-off-by: Nicolas Ferre --- Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt index 14f319f694b7..36952cc39993 100644 --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt @@ -21,7 +21,7 @@ Its subnodes can be: RSTC Reset Controller required properties: - compatible: Should be "atmel,-rstc". - can be "at91sam9260" or "at91sam9g45" or "sama5d3" + can be "at91sam9260", "at91sam9g45", "sama5d3" or "samx7" - reg: Should contain registers location and length - clocks: phandle to input clock. -- 2.17.1
[PATCH 6/8] power: reset: at91-reset: add support for sam9x60 SoC
Add support for additional reset causes and the proper compatibility
string for sam9x60 SoC. The restart function is the same as the samx7.
Signed-off-by: Nicolas Ferre
---
drivers/power/reset/at91-reset.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/power/reset/at91-reset.c b/drivers/power/reset/at91-reset.c
index f44a9ffcc2ab..44ca983a49a1 100644
--- a/drivers/power/reset/at91-reset.c
+++ b/drivers/power/reset/at91-reset.c
@@ -44,6 +44,9 @@ enum reset_type {
RESET_TYPE_WATCHDOG = 2,
RESET_TYPE_SOFTWARE = 3,
RESET_TYPE_USER = 4,
+ RESET_TYPE_CPU_FAIL = 6,
+ RESET_TYPE_XTAL_FAIL= 7,
+ RESET_TYPE_ULP2 = 8,
};
static void __iomem *at91_ramc_base[2], *at91_rstc_base;
@@ -164,6 +167,15 @@ static void __init at91_reset_status(struct
platform_device *pdev)
case RESET_TYPE_USER:
reason = "user reset";
break;
+ case RESET_TYPE_CPU_FAIL:
+ reason = "CPU clock failure detection";
+ break;
+ case RESET_TYPE_XTAL_FAIL:
+ reason = "32.768 kHz crystal failure detection";
+ break;
+ case RESET_TYPE_ULP2:
+ reason = "ULP2 reset";
+ break;
default:
reason = "unknown reset";
break;
@@ -183,6 +195,7 @@ static const struct of_device_id at91_reset_of_match[] = {
{ .compatible = "atmel,at91sam9g45-rstc", .data = at91sam9g45_restart },
{ .compatible = "atmel,sama5d3-rstc", .data = sama5d3_restart },
{ .compatible = "atmel,samx7-rstc", .data = samx7_restart },
+ { .compatible = "microchip,sam9x60-rstc", .data = samx7_restart },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, at91_reset_of_match);
--
2.17.1
[PATCH 3/8] dt-bindings: arm: atmel: add new sam9x60 SFR binding
Add this SFR compatible definition for the sam9x60 SoC. Will be needed
in OHCI driver: ohci-at91.c.
Signed-off-by: Nicolas Ferre
---
Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
index badce6ef3ab3..dfc91bc02b97 100644
--- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
@@ -148,6 +148,7 @@ required properties:
- compatible: Should be "atmel,-sfr", "syscon" or
"atmel,-sfrbu", "syscon"
can be "sama5d3", "sama5d4" or "sama5d2".
+ it also can be "microchip,sam9x60-sfr", "syscon".
- reg: Should contain registers location and length
sfr@f0038000 {
--
2.17.1
[PATCH 2/8] dt-bindings: arm: atmel: add new sam9x60 reset controller binding
Update the Reset Controller's binding to add new SoC compatibility string. Signed-off-by: Nicolas Ferre --- Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt index 36952cc39993..badce6ef3ab3 100644 --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt @@ -22,6 +22,7 @@ Its subnodes can be: RSTC Reset Controller required properties: - compatible: Should be "atmel,-rstc". can be "at91sam9260", "at91sam9g45", "sama5d3" or "samx7" + it also can be "microchip,sam9x60-rstc" - reg: Should contain registers location and length - clocks: phandle to input clock. -- 2.17.1
[PATCH 7/8] USB: host: ohci-at91: add sam9x60-sfr definition for ohci
Add this SFR compatible definition for the sam9x60 SoC and manage
its use in ohci-at91.c driver.
Signed-off-by: Nicolas Ferre
---
drivers/usb/host/ohci-at91.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index ec6739ef3129..fc35a7993b7b 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -141,8 +141,11 @@ static struct regmap *at91_dt_syscon_sfr(void)
struct regmap *regmap;
regmap = syscon_regmap_lookup_by_compatible("atmel,sama5d2-sfr");
- if (IS_ERR(regmap))
- regmap = NULL;
+ if (IS_ERR(regmap)) {
+ regmap =
syscon_regmap_lookup_by_compatible("microchip,sam9x60-sfr");
+ if (IS_ERR(regmap))
+ regmap = NULL;
+ }
return regmap;
}
--
2.17.1
[PATCH 8/8] net: macb: add sam9x60-macb compatibility string
Add a new compatibility string for this product. It's using
at91sam9260-macb layout but has a newer hardware revision: it's safer
to use its own string.
Signed-off-by: Nicolas Ferre
---
drivers/net/ethernet/cadence/macb_main.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/ethernet/cadence/macb_main.c
index 66cc7927061a..a0889ef107a1 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -3941,6 +3941,7 @@ static const struct of_device_id macb_dt_ids[] = {
{ .compatible = "cdns,np4-macb", .data = _config },
{ .compatible = "cdns,pc302-gem", .data = _config },
{ .compatible = "cdns,gem", .data = _config },
+ { .compatible = "cdns,sam9x60-macb", .data = _config },
{ .compatible = "atmel,sama5d2-gem", .data = _config },
{ .compatible = "atmel,sama5d3-gem", .data = _config },
{ .compatible = "atmel,sama5d3-macb", .data = _config },
--
2.17.1
[PATCH 4/8] net/macb: bindings doc/trivial: fix documentation for sama5d3 10/100 interface
This removes a line left while adding the correct compatibility string for
sama5d3 10/100 interface. Now use the "atmel,sama5d3-macb" string.
Signed-off-by: Nicolas Ferre
---
Documentation/devicetree/bindings/net/macb.txt | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/macb.txt
b/Documentation/devicetree/bindings/net/macb.txt
index 3e17ac1d5d58..f5c414b10e27 100644
--- a/Documentation/devicetree/bindings/net/macb.txt
+++ b/Documentation/devicetree/bindings/net/macb.txt
@@ -3,8 +3,7 @@
Required properties:
- compatible: Should be "cdns,[-]{macb|gem}"
Use "cdns,at91rm9200-emac" Atmel at91rm9200 SoC.
- Use "cdns,at91sam9260-macb" for Atmel at91sam9 SoCs or the 10/100Mbit IP
- available on sama5d3 SoCs.
+ Use "cdns,at91sam9260-macb" for Atmel at91sam9 SoCs.
Use "cdns,np4-macb" for NP4 SoC devices.
Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form:
"cdns,macb".
Use "cdns,pc302-gem" for Picochip picoXcell pc302 and later devices based on
--
2.17.1
[PATCH 0/8] ARM: at91/dt: update to existing drivers for the sam9x60 SoC
Hi, This serries collects some little modifications to DT bindings and associated drivers changes for supporting the upcoming SAM9X60 SoC. I took the advantage of this series for fixing some of the leftovers in DT bindings for reset controller and Ethernet macb. These changes touch several sub-systems but I would like that these (mostly trivial) patches stay together for facilitating reviews, prevent breaking dependencies and facilitating the tracking of acceptance status. However, tell me if you think otherwise. My intentions are that the series would enter Mainline through arm-soc tree: sounds okay to everyone? If okay, I'm ready to collect Ack tags... For the first batch, I send the whole series to everyone. I'll try my best to reduce subsequent message deliveries if one part of the serries needs rework. Best regards, Nicolas Nicolas Ferre (8): dt-bindings: arm: atmel: add missing samx7 to reset controller dt-bindings: arm: atmel: add new sam9x60 reset controller binding dt-bindings: arm: atmel: add new sam9x60 SFR binding net/macb: bindings doc/trivial: fix documentation for sama5d3 10/100 interface net/macb: bindings doc: add sam9x60 binding power: reset: at91-reset: add support for sam9x60 SoC USB: host: ohci-at91: add sam9x60-sfr definition for ohci net: macb: add sam9x60-macb compatibility string .../devicetree/bindings/arm/atmel-sysregs.txt | 4 +++- Documentation/devicetree/bindings/net/macb.txt | 4 ++-- drivers/net/ethernet/cadence/macb_main.c| 1 + drivers/power/reset/at91-reset.c| 13 + drivers/usb/host/ohci-at91.c| 7 +-- 5 files changed, 24 insertions(+), 5 deletions(-) -- 2.17.1
[PATCH 5/8] net/macb: bindings doc: add sam9x60 binding
Add the compatibility sting documentation for sam9x60 10/100 interface.
Signed-off-by: Nicolas Ferre
---
Documentation/devicetree/bindings/net/macb.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/net/macb.txt
b/Documentation/devicetree/bindings/net/macb.txt
index f5c414b10e27..174f292d8a3e 100644
--- a/Documentation/devicetree/bindings/net/macb.txt
+++ b/Documentation/devicetree/bindings/net/macb.txt
@@ -4,6 +4,7 @@ Required properties:
- compatible: Should be "cdns,[-]{macb|gem}"
Use "cdns,at91rm9200-emac" Atmel at91rm9200 SoC.
Use "cdns,at91sam9260-macb" for Atmel at91sam9 SoCs.
+ Use "cdns,sam9x60-macb" for Microchip sam9x60 SoC.
Use "cdns,np4-macb" for NP4 SoC devices.
Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form:
"cdns,macb".
Use "cdns,pc302-gem" for Picochip picoXcell pc302 and later devices based on
--
2.17.1
[PATCH] ARM: at91: add support in soc driver for new SAM9X60
From: Sandeep Sheriker Mallikarjun
Add detection of new SAM9X60 by this soc.c driver.
Signed-off-by: Nicolas Ferre
[nicolas.fe...@microchip.com: split patch]
Signed-off-by: Sandeep Sheriker Mallikarjun
---
drivers/soc/atmel/soc.c | 2 ++
drivers/soc/atmel/soc.h | 3 +++
2 files changed, 5 insertions(+)
diff --git a/drivers/soc/atmel/soc.c b/drivers/soc/atmel/soc.c
index 2cc272ddf906..096a83cf0caf 100644
--- a/drivers/soc/atmel/soc.c
+++ b/drivers/soc/atmel/soc.c
@@ -66,6 +66,8 @@ static const struct at91_soc __initconst socs[] = {
AT91_SOC(AT91SAM9XE128_CIDR_MATCH, 0, "at91sam9xe128", "at91sam9xe128"),
AT91_SOC(AT91SAM9XE256_CIDR_MATCH, 0, "at91sam9xe256", "at91sam9xe256"),
AT91_SOC(AT91SAM9XE512_CIDR_MATCH, 0, "at91sam9xe512", "at91sam9xe512"),
+ AT91_SOC(SAM9X60_CIDR_MATCH, SAM9X60_EXID_MATCH,
+"sam9x60", "sam9x60"),
#endif
#ifdef CONFIG_SOC_SAMA5
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D21CU_EXID_MATCH,
diff --git a/drivers/soc/atmel/soc.h b/drivers/soc/atmel/soc.h
index ed89b24ecee1..ee652e4841a5 100644
--- a/drivers/soc/atmel/soc.h
+++ b/drivers/soc/atmel/soc.h
@@ -42,6 +42,7 @@ at91_soc_init(const struct at91_soc *socs);
#define AT91SAM9G45_CIDR_MATCH 0x019b05a0
#define AT91SAM9X5_CIDR_MATCH 0x019a05a0
#define AT91SAM9N12_CIDR_MATCH 0x019a07a0
+#define SAM9X60_CIDR_MATCH 0x019b35a0
#define AT91SAM9M11_EXID_MATCH 0x0001
#define AT91SAM9M10_EXID_MATCH 0x0002
@@ -58,6 +59,8 @@ at91_soc_init(const struct at91_soc *socs);
#define AT91SAM9N12_EXID_MATCH 0x0006
#define AT91SAM9CN11_EXID_MATCH0x0009
+#define SAM9X60_EXID_MATCH 0x
+
#define AT91SAM9XE128_CIDR_MATCH 0x329973a0
#define AT91SAM9XE256_CIDR_MATCH 0x329a93a0
#define AT91SAM9XE512_CIDR_MATCH 0x329aa3a0
--
2.17.1
[PATCH] ARM: at91: add support in soc driver for LPDDR2 SiP
Add some more SiP components to be detected by this soc.c driver.
Signed-off-by: Nicolas Ferre
---
drivers/soc/atmel/soc.c | 8
drivers/soc/atmel/soc.h | 4
2 files changed, 12 insertions(+)
diff --git a/drivers/soc/atmel/soc.c b/drivers/soc/atmel/soc.c
index 4dd03b099c89..2cc272ddf906 100644
--- a/drivers/soc/atmel/soc.c
+++ b/drivers/soc/atmel/soc.c
@@ -90,12 +90,20 @@ static const struct at91_soc __initconst socs[] = {
"sama5d27c 128MiB SiP", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27C_D5M_EXID_MATCH,
"sama5d27c 64MiB SiP", "sama5d2"),
+ AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27C_LD1G_EXID_MATCH,
+"sama5d27c 128MiB LPDDR2 SiP", "sama5d2"),
+ AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27C_LD2G_EXID_MATCH,
+"sama5d27c 256MiB LPDDR2 SiP", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CU_EXID_MATCH,
"sama5d28", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CN_EXID_MATCH,
"sama5d28", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28C_D1G_EXID_MATCH,
"sama5d28c 128MiB SiP", "sama5d2"),
+ AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28C_LD1G_EXID_MATCH,
+"sama5d28c 128MiB LPDDR2 SiP", "sama5d2"),
+ AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28C_LD2G_EXID_MATCH,
+"sama5d28c 256MiB LPDDR2 SiP", "sama5d2"),
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D31_EXID_MATCH,
"sama5d31", "sama5d3"),
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D33_EXID_MATCH,
diff --git a/drivers/soc/atmel/soc.h b/drivers/soc/atmel/soc.h
index 94cd5d1ab502..ed89b24ecee1 100644
--- a/drivers/soc/atmel/soc.h
+++ b/drivers/soc/atmel/soc.h
@@ -73,9 +73,13 @@ at91_soc_init(const struct at91_soc *socs);
#define SAMA5D26CU_EXID_MATCH 0x0012
#define SAMA5D27C_D1G_EXID_MATCH 0x0033
#define SAMA5D27C_D5M_EXID_MATCH 0x0032
+#define SAMA5D27C_LD1G_EXID_MATCH 0x0061
+#define SAMA5D27C_LD2G_EXID_MATCH 0x0062
#define SAMA5D27CU_EXID_MATCH 0x0011
#define SAMA5D27CN_EXID_MATCH 0x0021
#define SAMA5D28C_D1G_EXID_MATCH 0x0013
+#define SAMA5D28C_LD1G_EXID_MATCH 0x0071
+#define SAMA5D28C_LD2G_EXID_MATCH 0x0072
#define SAMA5D28CU_EXID_MATCH 0x0010
#define SAMA5D28CN_EXID_MATCH 0x0020
--
2.15.1
[PATCH] ARM: at91: add support in soc driver for LPDDR2 SiP
Add some more SiP components to be detected by this soc.c driver.
Signed-off-by: Nicolas Ferre
---
drivers/soc/atmel/soc.c | 8
drivers/soc/atmel/soc.h | 4
2 files changed, 12 insertions(+)
diff --git a/drivers/soc/atmel/soc.c b/drivers/soc/atmel/soc.c
index 4dd03b099c89..2cc272ddf906 100644
--- a/drivers/soc/atmel/soc.c
+++ b/drivers/soc/atmel/soc.c
@@ -90,12 +90,20 @@ static const struct at91_soc __initconst socs[] = {
"sama5d27c 128MiB SiP", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27C_D5M_EXID_MATCH,
"sama5d27c 64MiB SiP", "sama5d2"),
+ AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27C_LD1G_EXID_MATCH,
+"sama5d27c 128MiB LPDDR2 SiP", "sama5d2"),
+ AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27C_LD2G_EXID_MATCH,
+"sama5d27c 256MiB LPDDR2 SiP", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CU_EXID_MATCH,
"sama5d28", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CN_EXID_MATCH,
"sama5d28", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28C_D1G_EXID_MATCH,
"sama5d28c 128MiB SiP", "sama5d2"),
+ AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28C_LD1G_EXID_MATCH,
+"sama5d28c 128MiB LPDDR2 SiP", "sama5d2"),
+ AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28C_LD2G_EXID_MATCH,
+"sama5d28c 256MiB LPDDR2 SiP", "sama5d2"),
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D31_EXID_MATCH,
"sama5d31", "sama5d3"),
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D33_EXID_MATCH,
diff --git a/drivers/soc/atmel/soc.h b/drivers/soc/atmel/soc.h
index 94cd5d1ab502..ed89b24ecee1 100644
--- a/drivers/soc/atmel/soc.h
+++ b/drivers/soc/atmel/soc.h
@@ -73,9 +73,13 @@ at91_soc_init(const struct at91_soc *socs);
#define SAMA5D26CU_EXID_MATCH 0x0012
#define SAMA5D27C_D1G_EXID_MATCH 0x0033
#define SAMA5D27C_D5M_EXID_MATCH 0x0032
+#define SAMA5D27C_LD1G_EXID_MATCH 0x0061
+#define SAMA5D27C_LD2G_EXID_MATCH 0x0062
#define SAMA5D27CU_EXID_MATCH 0x0011
#define SAMA5D27CN_EXID_MATCH 0x0021
#define SAMA5D28C_D1G_EXID_MATCH 0x0013
+#define SAMA5D28C_LD1G_EXID_MATCH 0x0071
+#define SAMA5D28C_LD2G_EXID_MATCH 0x0072
#define SAMA5D28CU_EXID_MATCH 0x0010
#define SAMA5D28CN_EXID_MATCH 0x0020
--
2.15.1
Re: [PATCH] clocksource/drivers/timer-atmel-pit: properly handle error cases
Daniel, On 01/05/2018 at 10:36, Daniel Lezcano wrote: On Wed, Apr 25, 2018 at 12:14:39PM +0200, Alexandre Belloni wrote: smatch now reports a possible leak: smatch warnings: drivers/clocksource/timer-atmel-pit.c:183 at91sam926x_pit_dt_init() warn: possible memory leak of 'data' Ensure data is freed before exiting with an error. Reported-by: Dan Carpenter Signed-off-by: Alexandre Belloni --- Applied for 4.17-rc We don't see it in Mainline as of 4.19-rc neither in linux-next. Has it been forgotten? Thanks for your help. Best regards, -- Nicolas Ferre
Re: [PATCH] clocksource/drivers/timer-atmel-pit: properly handle error cases
Daniel, On 01/05/2018 at 10:36, Daniel Lezcano wrote: On Wed, Apr 25, 2018 at 12:14:39PM +0200, Alexandre Belloni wrote: smatch now reports a possible leak: smatch warnings: drivers/clocksource/timer-atmel-pit.c:183 at91sam926x_pit_dt_init() warn: possible memory leak of 'data' Ensure data is freed before exiting with an error. Reported-by: Dan Carpenter Signed-off-by: Alexandre Belloni --- Applied for 4.17-rc We don't see it in Mainline as of 4.19-rc neither in linux-next. Has it been forgotten? Thanks for your help. Best regards, -- Nicolas Ferre
Re: [PATCH v2] net: macb: Clean 64b dma addresses if they are not detected
On 25/09/2018 at 08:32, Michal Simek wrote: Clear ADDR64 dma bit in DMACFG register in case that HW_DMA_CAP_64B is not detected on 64bit system. The issue was observed when bootloader(u-boot) does not check macb feature at DCFG6 register (DAW64_OFFSET) and enabling 64bit dma support by default. Then macb driver is reading DMACFG register back and only adding 64bit dma configuration but not cleaning it out. Signed-off-by: Michal Simek Acked-by: Nicolas Ferre Thanks Michal. Best regards, Nicolas --- Changes in v2: - Clean reg at the first place - Edgar - Update commit message drivers/net/ethernet/cadence/macb_main.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 16e4ef7d7185..ed8a5c53467e 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -2160,6 +2160,7 @@ static void macb_configure_dma(struct macb *bp) else dmacfg &= ~GEM_BIT(TXCOEN); + dmacfg &= ~GEM_BIT(ADDR64); #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT if (bp->hw_dma_cap & HW_DMA_CAP_64B) dmacfg |= GEM_BIT(ADDR64); -- Nicolas Ferre
Re: [PATCH v2] net: macb: Clean 64b dma addresses if they are not detected
On 25/09/2018 at 08:32, Michal Simek wrote: Clear ADDR64 dma bit in DMACFG register in case that HW_DMA_CAP_64B is not detected on 64bit system. The issue was observed when bootloader(u-boot) does not check macb feature at DCFG6 register (DAW64_OFFSET) and enabling 64bit dma support by default. Then macb driver is reading DMACFG register back and only adding 64bit dma configuration but not cleaning it out. Signed-off-by: Michal Simek Acked-by: Nicolas Ferre Thanks Michal. Best regards, Nicolas --- Changes in v2: - Clean reg at the first place - Edgar - Update commit message drivers/net/ethernet/cadence/macb_main.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 16e4ef7d7185..ed8a5c53467e 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -2160,6 +2160,7 @@ static void macb_configure_dma(struct macb *bp) else dmacfg &= ~GEM_BIT(TXCOEN); + dmacfg &= ~GEM_BIT(ADDR64); #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT if (bp->hw_dma_cap & HW_DMA_CAP_64B) dmacfg |= GEM_BIT(ADDR64); -- Nicolas Ferre
Re: linux-next: manual merge of the staging tree with the at91 tree
On 18/09/2018 at 05:12, Stephen Rothwell wrote:
Hi all,
Today's linux-next merge of the staging tree got a conflict in:
MAINTAINERS
between commit:
5ae2f1f30197 ("MAINTAINERS: move former ATMEL entries to proper MICROCHIP
locatioat91n")
from the at91 tree and commit:
010de20412fc ("MAINTAINERS: Add entry for mcp3911 ADC driver")
from the staging tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
Resolution looks good to me.
Thanks. Best regards,
--
Nicolas Ferre
