Re: [PATCH 06/15] ARM: dts: ipq4019: Add ipq4019-ap.dk04.dtsi

2018-02-05 Thread Sricharan R 
Hi Abhishek,

On 2/3/2018 4:47 PM, Abhishek Sahu wrote:
> On 2018-01-29 10:41, Sricharan R wrote:
>> Add the common parts for the dk04 boards.
>>
>> Signed-off-by: Sricharan R 
>> ---
>>  arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 147
> 
>  
>> +
>> +    nand_pins: nand_pins {
>> +    pullups {
>> +    pins = "gpio52", "gpio53",
>> "gpio58",
>> +    "gpio59";
>> +    function = "qpic";
>> +    bias-pull-up;
>> +    };
>> +
>> +    pulldowns {
>> +    pins = "gpio54", "gpio55",
>> "gpio56",
>> +    "gpio57", "gpio60",
>> "gpio61",
>> +    "gpio62", "gpio63",
>> "gpio64",
>> +    "gpio65", "gpio66",
>> "gpio67",
>> +    "gpio68", "gpio69";
>> +    function = "qpic";
>> +    bias-pull-down;
>> +    };
>> +    };
> 
>  Can you please check once why do we need pull-up and
>  pull-down for NAND pins. The NAND chip will be mounted
>  over board itself so board design should take care of
>  required pull up and pull downs.
> 

  Mostly because, these are always **weak** pull up/down as defaults
  and should be overridden by the ones in the board (if there).


>  Also, some of the above pins like gpio52 will be only used
>  for LCD so we can remove those pins. Later on, when LCD
>  support will be added, we can add those pins.
 ok

Regards,
 Sricharan

-- 
"QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of 
Code Aurora Forum, hosted by The Linux Foundation

Re: [PATCH 06/15] ARM: dts: ipq4019: Add ipq4019-ap.dk04.dtsi

2018-02-05 Thread Sricharan R 
Hi Abhishek,

On 2/3/2018 4:47 PM, Abhishek Sahu wrote:
> On 2018-01-29 10:41, Sricharan R wrote:
>> Add the common parts for the dk04 boards.
>>
>> Signed-off-by: Sricharan R 
>> ---
>>  arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 147
> 
>  
>> +
>> +    nand_pins: nand_pins {
>> +    pullups {
>> +    pins = "gpio52", "gpio53",
>> "gpio58",
>> +    "gpio59";
>> +    function = "qpic";
>> +    bias-pull-up;
>> +    };
>> +
>> +    pulldowns {
>> +    pins = "gpio54", "gpio55",
>> "gpio56",
>> +    "gpio57", "gpio60",
>> "gpio61",
>> +    "gpio62", "gpio63",
>> "gpio64",
>> +    "gpio65", "gpio66",
>> "gpio67",
>> +    "gpio68", "gpio69";
>> +    function = "qpic";
>> +    bias-pull-down;
>> +    };
>> +    };
> 
>  Can you please check once why do we need pull-up and
>  pull-down for NAND pins. The NAND chip will be mounted
>  over board itself so board design should take care of
>  required pull up and pull downs.
> 

  Mostly because, these are always **weak** pull up/down as defaults
  and should be overridden by the ones in the board (if there).


>  Also, some of the above pins like gpio52 will be only used
>  for LCD so we can remove those pins. Later on, when LCD
>  support will be added, we can add those pins.
 ok

Regards,
 Sricharan

-- 
"QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of 
Code Aurora Forum, hosted by The Linux Foundation

Re: [PATCH 06/15] ARM: dts: ipq4019: Add ipq4019-ap.dk04.dtsi

2018-02-03 Thread Abhishek Sahu 

On 2018-01-29 10:41, Sricharan R wrote:

Add the common parts for the dk04 boards.

Signed-off-by: Sricharan R 
---
 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 147


 

+
+   nand_pins: nand_pins {
+   pullups {
+   pins = "gpio52", "gpio53",
"gpio58",
+   "gpio59";
+   function = "qpic";
+   bias-pull-up;
+   };
+
+   pulldowns {
+   pins = "gpio54", "gpio55",
"gpio56",
+   "gpio57", "gpio60",
"gpio61",
+   "gpio62", "gpio63",
"gpio64",
+   "gpio65", "gpio66",
"gpio67",
+   "gpio68", "gpio69";
+   function = "qpic";
+   bias-pull-down;
+   };
+   };


 Can you please check once why do we need pull-up and
 pull-down for NAND pins. The NAND chip will be mounted
 over board itself so board design should take care of
 required pull up and pull downs.

 Also, some of the above pins like gpio52 will be only used
 for LCD so we can remove those pins. Later on, when LCD
 support will be added, we can add those pins.

 Thanks,
 Abhishek

Re: [PATCH 06/15] ARM: dts: ipq4019: Add ipq4019-ap.dk04.dtsi

2018-02-03 Thread Abhishek Sahu 

On 2018-01-29 10:41, Sricharan R wrote:

Add the common parts for the dk04 boards.

Signed-off-by: Sricharan R 
---
 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 147


 

+
+   nand_pins: nand_pins {
+   pullups {
+   pins = "gpio52", "gpio53",
"gpio58",
+   "gpio59";
+   function = "qpic";
+   bias-pull-up;
+   };
+
+   pulldowns {
+   pins = "gpio54", "gpio55",
"gpio56",
+   "gpio57", "gpio60",
"gpio61",
+   "gpio62", "gpio63",
"gpio64",
+   "gpio65", "gpio66",
"gpio67",
+   "gpio68", "gpio69";
+   function = "qpic";
+   bias-pull-down;
+   };
+   };


 Can you please check once why do we need pull-up and
 pull-down for NAND pins. The NAND chip will be mounted
 over board itself so board design should take care of
 required pull up and pull downs.

 Also, some of the above pins like gpio52 will be only used
 for LCD so we can remove those pins. Later on, when LCD
 support will be added, we can add those pins.

 Thanks,
 Abhishek

[PATCH 06/15] ARM: dts: ipq4019: Add ipq4019-ap.dk04.dtsi

2018-01-28 Thread Sricharan R 
Add the common parts for the dk04 boards.

Signed-off-by: Sricharan R 
---
 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 147 ++
 1 file changed, 147 insertions(+)
 create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi

diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi 
b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
new file mode 100644
index 000..c25f3e3
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
@@ -0,0 +1,147 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2017, The Linux Foundation. All rights reserved.
+
+#include "qcom-ipq4019.dtsi"
+#include 
+#include 
+
+/ {
+   model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
+   compatible = "qcom,ipq4019";
+
+   memory {
+   device_type = "memory";
+   reg = <0x8000 0x1000>; /* 256MB */
+   };
+
+   reserved-memory {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   rsvd1@8700 {
+   /* Reserved for other subsystem */
+   reg = <0x8700 0x50>;
+   no-map;
+   };
+
+   wifi_dump@8750 {
+   reg = <0x8750 0x60>;
+   no-map;
+   };
+
+   rsvd2@87B0 {
+   /* Reserved for other subsystem */
+   reg = <0x87B0 0x50>;
+   no-map;
+   };
+   };
+
+   soc {
+   pinctrl@100 {
+   serial_0_pins: serial0_pinmux {
+   mux {
+   pins = "gpio16", "gpio17";
+   function = "blsp_uart0";
+   bias-disable;
+   };
+   };
+
+   serial_1_pins: serial1_pinmux {
+   mux {
+   pins = "gpio8", "gpio9",
+   "gpio10", "gpio11";
+   function = "blsp_uart1";
+   bias-disable;
+   };
+   };
+
+   spi_0_pins: spi_0_pinmux {
+   pinmux {
+   function = "blsp_spi0";
+   pins = "gpio13", "gpio14", "gpio15";
+   bias-disable;
+   };
+   pinmux_cs {
+   function = "gpio";
+   pins = "gpio12";
+   bias-disable;
+   output-high;
+   };
+   };
+
+   i2c_0_pins: i2c_0_pinmux {
+   mux {
+   pins = "gpio20", "gpio21";
+   function = "blsp_i2c0";
+   bias-disable;
+   };
+   };
+
+   nand_pins: nand_pins {
+   pullups {
+   pins = "gpio52", "gpio53", "gpio58",
+   "gpio59";
+   function = "qpic";
+   bias-pull-up;
+   };
+
+   pulldowns {
+   pins = "gpio54", "gpio55", "gpio56",
+   "gpio57", "gpio60", "gpio61",
+   "gpio62", "gpio63", "gpio64",
+   "gpio65", "gpio66", "gpio67",
+   "gpio68", "gpio69";
+   function = "qpic";
+   bias-pull-down;
+   };
+   };
+   };
+
+   serial@78af000 {
+   pinctrl-0 = <_0_pins>;
+   pinctrl-names = "default";
+   status = "ok";
+   };
+
+   serial@78b {
+   pinctrl-0 = <_1_pins>;
+   pinctrl-names = "default";
+   status = "ok";
+   };
+
+   blsp_dma: dma@7884000 {
+   status = "ok";
+   };
+
+   spi_0: spi@78b5000 { /* BLSP1 QUP1 */
+   pinctrl-0 = <_0_pins>;
+

[PATCH 06/15] ARM: dts: ipq4019: Add ipq4019-ap.dk04.dtsi

2018-01-28 Thread Sricharan R 
Add the common parts for the dk04 boards.

Signed-off-by: Sricharan R 
---
 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 147 ++
 1 file changed, 147 insertions(+)
 create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi

diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi 
b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
new file mode 100644
index 000..c25f3e3
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
@@ -0,0 +1,147 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2017, The Linux Foundation. All rights reserved.
+
+#include "qcom-ipq4019.dtsi"
+#include 
+#include 
+
+/ {
+   model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
+   compatible = "qcom,ipq4019";
+
+   memory {
+   device_type = "memory";
+   reg = <0x8000 0x1000>; /* 256MB */
+   };
+
+   reserved-memory {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   rsvd1@8700 {
+   /* Reserved for other subsystem */
+   reg = <0x8700 0x50>;
+   no-map;
+   };
+
+   wifi_dump@8750 {
+   reg = <0x8750 0x60>;
+   no-map;
+   };
+
+   rsvd2@87B0 {
+   /* Reserved for other subsystem */
+   reg = <0x87B0 0x50>;
+   no-map;
+   };
+   };
+
+   soc {
+   pinctrl@100 {
+   serial_0_pins: serial0_pinmux {
+   mux {
+   pins = "gpio16", "gpio17";
+   function = "blsp_uart0";
+   bias-disable;
+   };
+   };
+
+   serial_1_pins: serial1_pinmux {
+   mux {
+   pins = "gpio8", "gpio9",
+   "gpio10", "gpio11";
+   function = "blsp_uart1";
+   bias-disable;
+   };
+   };
+
+   spi_0_pins: spi_0_pinmux {
+   pinmux {
+   function = "blsp_spi0";
+   pins = "gpio13", "gpio14", "gpio15";
+   bias-disable;
+   };
+   pinmux_cs {
+   function = "gpio";
+   pins = "gpio12";
+   bias-disable;
+   output-high;
+   };
+   };
+
+   i2c_0_pins: i2c_0_pinmux {
+   mux {
+   pins = "gpio20", "gpio21";
+   function = "blsp_i2c0";
+   bias-disable;
+   };
+   };
+
+   nand_pins: nand_pins {
+   pullups {
+   pins = "gpio52", "gpio53", "gpio58",
+   "gpio59";
+   function = "qpic";
+   bias-pull-up;
+   };
+
+   pulldowns {
+   pins = "gpio54", "gpio55", "gpio56",
+   "gpio57", "gpio60", "gpio61",
+   "gpio62", "gpio63", "gpio64",
+   "gpio65", "gpio66", "gpio67",
+   "gpio68", "gpio69";
+   function = "qpic";
+   bias-pull-down;
+   };
+   };
+   };
+
+   serial@78af000 {
+   pinctrl-0 = <_0_pins>;
+   pinctrl-names = "default";
+   status = "ok";
+   };
+
+   serial@78b {
+   pinctrl-0 = <_1_pins>;
+   pinctrl-names = "default";
+   status = "ok";
+   };
+
+   blsp_dma: dma@7884000 {
+   status = "ok";
+   };
+
+   spi_0: spi@78b5000 { /* BLSP1 QUP1 */
+   pinctrl-0 = <_0_pins>;
+   pinctrl-names = "default";
+