Re: [PATCH 08+09/24] ARM: ixp4xx: use __iomem pointers for MMIO

2012-09-18 Thread Arnd Bergmann 
On Tuesday 18 September 2012, Krzysztof Halasa wrote:
> > @@ -51,7 +52,7 @@ static inline u32 ixp4xx_read_feature_bits(void)
> >  
> >  static inline void ixp4xx_write_feature_bits(u32 value)
> >  {
> > - *IXP4XX_EXP_CFG2 = ~value;
> > + __raw_writel(~cpu_to_le32(value), IXP4XX_EXP_CFG2);
> >  }
> 
> The EXP_CFG2 register is already in host order, no need for
> cpu_to_le32() as the replaced code clearly shows.
> 
> Can you merge both IXP4xx parts (in the two patches) and fix the above,
> please? Thanks.

Thanks for pointing this out, that was a mistake on my end, because I first
tried to convert to writel, with byteswap and then made up my mind and used
__raw_writel instead because it seemed silly to do two byteswaps.

Arnd
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Re: [PATCH 08+09/24] ARM: ixp4xx: use __iomem pointers for MMIO

2012-09-18 Thread Krzysztof Halasa 
Actually, there are some minor problems here (both patches merged,
ixp4xx only):

Arnd Bergmann  writes:

> --- a/arch/arm/mach-ixp4xx/include/mach/cpu.h
> +++ b/arch/arm/mach-ixp4xx/include/mach/cpu.h
> @@ -37,7 +38,7 @@
>  
>  static inline u32 ixp4xx_read_feature_bits(void)
>  {
> - u32 val = ~*IXP4XX_EXP_CFG2;
> + u32 val = ~__raw_readl(IXP4XX_EXP_CFG2);
>  

This is all fine, but

> @@ -51,7 +52,7 @@ static inline u32 ixp4xx_read_feature_bits(void)
>  
>  static inline void ixp4xx_write_feature_bits(u32 value)
>  {
> - *IXP4XX_EXP_CFG2 = ~value;
> + __raw_writel(~cpu_to_le32(value), IXP4XX_EXP_CFG2);
>  }

The EXP_CFG2 register is already in host order, no need for
cpu_to_le32() as the replaced code clearly shows.

Can you merge both IXP4xx parts (in the two patches) and fix the above,
please? Thanks.
-- 
Krzysztof Halasa
--
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Re: [PATCH 08+09/24] ARM: ixp4xx: use __iomem pointers for MMIO

2012-09-18 Thread Krzysztof Halasa 
Actually, there are some minor problems here (both patches merged,
ixp4xx only):

Arnd Bergmann a...@arndb.de writes:

 --- a/arch/arm/mach-ixp4xx/include/mach/cpu.h
 +++ b/arch/arm/mach-ixp4xx/include/mach/cpu.h
 @@ -37,7 +38,7 @@
  
  static inline u32 ixp4xx_read_feature_bits(void)
  {
 - u32 val = ~*IXP4XX_EXP_CFG2;
 + u32 val = ~__raw_readl(IXP4XX_EXP_CFG2);
  

This is all fine, but

 @@ -51,7 +52,7 @@ static inline u32 ixp4xx_read_feature_bits(void)
  
  static inline void ixp4xx_write_feature_bits(u32 value)
  {
 - *IXP4XX_EXP_CFG2 = ~value;
 + __raw_writel(~cpu_to_le32(value), IXP4XX_EXP_CFG2);
  }

The EXP_CFG2 register is already in host order, no need for
cpu_to_le32() as the replaced code clearly shows.

Can you merge both IXP4xx parts (in the two patches) and fix the above,
please? Thanks.
-- 
Krzysztof Halasa
--
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Re: [PATCH 08+09/24] ARM: ixp4xx: use __iomem pointers for MMIO

2012-09-18 Thread Arnd Bergmann 
On Tuesday 18 September 2012, Krzysztof Halasa wrote:
  @@ -51,7 +52,7 @@ static inline u32 ixp4xx_read_feature_bits(void)
   
   static inline void ixp4xx_write_feature_bits(u32 value)
   {
  - *IXP4XX_EXP_CFG2 = ~value;
  + __raw_writel(~cpu_to_le32(value), IXP4XX_EXP_CFG2);
   }
 
 The EXP_CFG2 register is already in host order, no need for
 cpu_to_le32() as the replaced code clearly shows.
 
 Can you merge both IXP4xx parts (in the two patches) and fix the above,
 please? Thanks.

Thanks for pointing this out, that was a mistake on my end, because I first
tried to convert to writel, with byteswap and then made up my mind and used
__raw_writel instead because it seemed silly to do two byteswaps.

Arnd
--
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the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/