Re: [PATCH 1/1] phy: fix build breakage: add PHY_MODE_SATA

2019-01-14 Thread Kishon Vijay Abraham I



On 13/01/19 7:35 AM, Jens Axboe wrote:
> On 1/12/19 6:29 PM, john.hubb...@gmail.com wrote:
>> From: John Hubbard 
>>
>> Commit 49e54187ae0b ("ata: libahci_platform: comply to PHY framework") uses
>> the PHY_MODE_SATA, but that enum had not yet been added. This caused a
>> build failure for me, with today's linux.git.
>>
>> Also, there is a potentially conflicting (mis-named) PHY_MODE_SATA, hiding
>> in the Marvell Berlin SATA PHY driver.
>>
>> Fix the build by:
>>
>> 1) Renaming Marvell's defined value to a more scoped name,
>>in order to avoid any potential conflicts: PHY_BERLIN_MODE_SATA.
>>
>> 2) Adding the missing enum, which was going to be added anyway as part
>>of [1].
>>
>> [1] https://lkml.kernel.org/r/20190108163124.6409-3-miquel.ray...@bootlin.com
>>
>> Fixes: 49e54187ae0b ("ata: libahci_platform: comply to PHY framework")
> 
> Linus, this is probably a better option in terms of what should go in to
> fix that commit.
> 
>>
>> Cc: Grzegorz Jaszczyk 
>> Cc: Miquel Raynal 
>> Cc: Hans de Goede 
>> Cc: Jens Axboe 
>> Signed-off-by: John Hubbard 

Acked-by: Kishon Vijay Abraham I 
>> ---
>>  drivers/phy/marvell/phy-berlin-sata.c | 5 +++--
>>  include/linux/phy/phy.h   | 1 +
>>  2 files changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/phy/marvell/phy-berlin-sata.c 
>> b/drivers/phy/marvell/phy-berlin-sata.c
>> index a91fc67fc4e0..d70ba9bc42d9 100644
>> --- a/drivers/phy/marvell/phy-berlin-sata.c
>> +++ b/drivers/phy/marvell/phy-berlin-sata.c
>> @@ -32,7 +32,7 @@
>>  
>>  /* register 0x01 */
>>  #define REF_FREF_SEL_25 BIT(0)
>> -#define PHY_MODE_SATA   (0x0 << 5)
>> +#define PHY_BERLIN_MODE_SATA(0x0 << 5)
>>  
>>  /* register 0x02 */
>>  #define USE_MAX_PLL_RATEBIT(12)
>> @@ -102,7 +102,8 @@ static int phy_berlin_sata_power_on(struct phy *phy)
>>  
>>  /* set PHY mode and ref freq to 25 MHz */
>>  phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x01,
>> -0x00ff, REF_FREF_SEL_25 | PHY_MODE_SATA);
>> +0x00ff,
>> +REF_FREF_SEL_25 | PHY_BERLIN_MODE_SATA);
>>  
>>  /* set PHY up to 6 Gbps */
>>  phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x25,
>> diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
>> index e8e118d70fd7..3f350e2749fe 100644
>> --- a/include/linux/phy/phy.h
>> +++ b/include/linux/phy/phy.h
>> @@ -42,6 +42,7 @@ enum phy_mode {
>>  PHY_MODE_PCIE,
>>  PHY_MODE_ETHERNET,
>>  PHY_MODE_MIPI_DPHY,
>> +PHY_MODE_SATA
>>  };
>>  
>>  /**
>>
> 
> 


Re: [PATCH 1/1] phy: fix build breakage: add PHY_MODE_SATA

2019-01-14 Thread Kishon Vijay Abraham I



On 14/01/19 2:27 PM, Miquel Raynal wrote:
> Hi Olof,
> 
> Olof Johansson  wrote on Sat, 12 Jan 2019 19:57:12
> -0800:
> 
>> On Sat, Jan 12, 2019 at 6:05 PM Jens Axboe  wrote:
>>>
>>> On 1/12/19 6:29 PM, john.hubb...@gmail.com wrote:  
 From: John Hubbard 

 Commit 49e54187ae0b ("ata: libahci_platform: comply to PHY framework") uses
 the PHY_MODE_SATA, but that enum had not yet been added. This caused a
 build failure for me, with today's linux.git.

 Also, there is a potentially conflicting (mis-named) PHY_MODE_SATA, hiding
 in the Marvell Berlin SATA PHY driver.

 Fix the build by:

 1) Renaming Marvell's defined value to a more scoped name,
in order to avoid any potential conflicts: PHY_BERLIN_MODE_SATA.

 2) Adding the missing enum, which was going to be added anyway as part
of [1].

 [1] 
 https://lkml.kernel.org/r/20190108163124.6409-3-miquel.ray...@bootlin.com

 Fixes: 49e54187ae0b ("ata: libahci_platform: comply to PHY framework")  
>>>
>>> Linus, this is probably a better option in terms of what should go in to
>>> fix that commit.  
>>
>> I'm OK with this, but it does beg the question how the patch was
>> tested before submitting, if it didn't build.
>>
>> Is there functional breakage behind it? I currently lack online
>> hardware to test myself, unfortunately.
> 
> This is my mistake, I forgot to tell Jens about this dependency,
> I am very sorry about that. As reported by John, this patch depends on
> the addition of PHY_MODE_SATA in the PHY type enumeration. This series
> ([1]) has been delayed and I should have warned Jens about it. I'm fine
> with the above fix though.
> 
> Kishon, will you be able to base phy-next on top of this fix? It will
> be needed for the addition of the COMPHY driver.

Sure, I'll include this in my tree.

Thanks
Kishon


Re: [PATCH 1/1] phy: fix build breakage: add PHY_MODE_SATA

2019-01-14 Thread Miquel Raynal
Hi Olof,

Olof Johansson  wrote on Sat, 12 Jan 2019 19:57:12
-0800:

> On Sat, Jan 12, 2019 at 6:05 PM Jens Axboe  wrote:
> >
> > On 1/12/19 6:29 PM, john.hubb...@gmail.com wrote:  
> > > From: John Hubbard 
> > >
> > > Commit 49e54187ae0b ("ata: libahci_platform: comply to PHY framework") 
> > > uses
> > > the PHY_MODE_SATA, but that enum had not yet been added. This caused a
> > > build failure for me, with today's linux.git.
> > >
> > > Also, there is a potentially conflicting (mis-named) PHY_MODE_SATA, hiding
> > > in the Marvell Berlin SATA PHY driver.
> > >
> > > Fix the build by:
> > >
> > > 1) Renaming Marvell's defined value to a more scoped name,
> > >in order to avoid any potential conflicts: PHY_BERLIN_MODE_SATA.
> > >
> > > 2) Adding the missing enum, which was going to be added anyway as part
> > >of [1].
> > >
> > > [1] 
> > > https://lkml.kernel.org/r/20190108163124.6409-3-miquel.ray...@bootlin.com
> > >
> > > Fixes: 49e54187ae0b ("ata: libahci_platform: comply to PHY framework")  
> >
> > Linus, this is probably a better option in terms of what should go in to
> > fix that commit.  
> 
> I'm OK with this, but it does beg the question how the patch was
> tested before submitting, if it didn't build.
> 
> Is there functional breakage behind it? I currently lack online
> hardware to test myself, unfortunately.

This is my mistake, I forgot to tell Jens about this dependency,
I am very sorry about that. As reported by John, this patch depends on
the addition of PHY_MODE_SATA in the PHY type enumeration. This series
([1]) has been delayed and I should have warned Jens about it. I'm fine
with the above fix though.

Kishon, will you be able to base phy-next on top of this fix? It will
be needed for the addition of the COMPHY driver.


Thanks and again, sorry for the troubles.
Miquèl


Re: [PATCH 1/1] phy: fix build breakage: add PHY_MODE_SATA

2019-01-12 Thread Olof Johansson
On Sat, Jan 12, 2019 at 6:05 PM Jens Axboe  wrote:
>
> On 1/12/19 6:29 PM, john.hubb...@gmail.com wrote:
> > From: John Hubbard 
> >
> > Commit 49e54187ae0b ("ata: libahci_platform: comply to PHY framework") uses
> > the PHY_MODE_SATA, but that enum had not yet been added. This caused a
> > build failure for me, with today's linux.git.
> >
> > Also, there is a potentially conflicting (mis-named) PHY_MODE_SATA, hiding
> > in the Marvell Berlin SATA PHY driver.
> >
> > Fix the build by:
> >
> > 1) Renaming Marvell's defined value to a more scoped name,
> >in order to avoid any potential conflicts: PHY_BERLIN_MODE_SATA.
> >
> > 2) Adding the missing enum, which was going to be added anyway as part
> >of [1].
> >
> > [1] 
> > https://lkml.kernel.org/r/20190108163124.6409-3-miquel.ray...@bootlin.com
> >
> > Fixes: 49e54187ae0b ("ata: libahci_platform: comply to PHY framework")
>
> Linus, this is probably a better option in terms of what should go in to
> fix that commit.

I'm OK with this, but it does beg the question how the patch was
tested before submitting, if it didn't build.

Is there functional breakage behind it? I currently lack online
hardware to test myself, unfortunately.


-Olof


Re: [PATCH 1/1] phy: fix build breakage: add PHY_MODE_SATA

2019-01-12 Thread Jens Axboe
On 1/12/19 6:29 PM, john.hubb...@gmail.com wrote:
> From: John Hubbard 
> 
> Commit 49e54187ae0b ("ata: libahci_platform: comply to PHY framework") uses
> the PHY_MODE_SATA, but that enum had not yet been added. This caused a
> build failure for me, with today's linux.git.
> 
> Also, there is a potentially conflicting (mis-named) PHY_MODE_SATA, hiding
> in the Marvell Berlin SATA PHY driver.
> 
> Fix the build by:
> 
> 1) Renaming Marvell's defined value to a more scoped name,
>in order to avoid any potential conflicts: PHY_BERLIN_MODE_SATA.
> 
> 2) Adding the missing enum, which was going to be added anyway as part
>of [1].
> 
> [1] https://lkml.kernel.org/r/20190108163124.6409-3-miquel.ray...@bootlin.com
> 
> Fixes: 49e54187ae0b ("ata: libahci_platform: comply to PHY framework")

Linus, this is probably a better option in terms of what should go in to
fix that commit.

> 
> Cc: Grzegorz Jaszczyk 
> Cc: Miquel Raynal 
> Cc: Hans de Goede 
> Cc: Jens Axboe 
> Signed-off-by: John Hubbard 
> ---
>  drivers/phy/marvell/phy-berlin-sata.c | 5 +++--
>  include/linux/phy/phy.h   | 1 +
>  2 files changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/phy/marvell/phy-berlin-sata.c 
> b/drivers/phy/marvell/phy-berlin-sata.c
> index a91fc67fc4e0..d70ba9bc42d9 100644
> --- a/drivers/phy/marvell/phy-berlin-sata.c
> +++ b/drivers/phy/marvell/phy-berlin-sata.c
> @@ -32,7 +32,7 @@
>  
>  /* register 0x01 */
>  #define REF_FREF_SEL_25  BIT(0)
> -#define PHY_MODE_SATA(0x0 << 5)
> +#define PHY_BERLIN_MODE_SATA (0x0 << 5)
>  
>  /* register 0x02 */
>  #define USE_MAX_PLL_RATE BIT(12)
> @@ -102,7 +102,8 @@ static int phy_berlin_sata_power_on(struct phy *phy)
>  
>   /* set PHY mode and ref freq to 25 MHz */
>   phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x01,
> - 0x00ff, REF_FREF_SEL_25 | PHY_MODE_SATA);
> + 0x00ff,
> + REF_FREF_SEL_25 | PHY_BERLIN_MODE_SATA);
>  
>   /* set PHY up to 6 Gbps */
>   phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x25,
> diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
> index e8e118d70fd7..3f350e2749fe 100644
> --- a/include/linux/phy/phy.h
> +++ b/include/linux/phy/phy.h
> @@ -42,6 +42,7 @@ enum phy_mode {
>   PHY_MODE_PCIE,
>   PHY_MODE_ETHERNET,
>   PHY_MODE_MIPI_DPHY,
> + PHY_MODE_SATA
>  };
>  
>  /**
> 


-- 
Jens Axboe



[PATCH 1/1] phy: fix build breakage: add PHY_MODE_SATA

2019-01-12 Thread john . hubbard
From: John Hubbard 

Commit 49e54187ae0b ("ata: libahci_platform: comply to PHY framework") uses
the PHY_MODE_SATA, but that enum had not yet been added. This caused a
build failure for me, with today's linux.git.

Also, there is a potentially conflicting (mis-named) PHY_MODE_SATA, hiding
in the Marvell Berlin SATA PHY driver.

Fix the build by:

1) Renaming Marvell's defined value to a more scoped name,
   in order to avoid any potential conflicts: PHY_BERLIN_MODE_SATA.

2) Adding the missing enum, which was going to be added anyway as part
   of [1].

[1] https://lkml.kernel.org/r/20190108163124.6409-3-miquel.ray...@bootlin.com

Fixes: 49e54187ae0b ("ata: libahci_platform: comply to PHY framework")

Cc: Grzegorz Jaszczyk 
Cc: Miquel Raynal 
Cc: Hans de Goede 
Cc: Jens Axboe 
Signed-off-by: John Hubbard 
---
 drivers/phy/marvell/phy-berlin-sata.c | 5 +++--
 include/linux/phy/phy.h   | 1 +
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/phy/marvell/phy-berlin-sata.c 
b/drivers/phy/marvell/phy-berlin-sata.c
index a91fc67fc4e0..d70ba9bc42d9 100644
--- a/drivers/phy/marvell/phy-berlin-sata.c
+++ b/drivers/phy/marvell/phy-berlin-sata.c
@@ -32,7 +32,7 @@
 
 /* register 0x01 */
 #define REF_FREF_SEL_25BIT(0)
-#define PHY_MODE_SATA  (0x0 << 5)
+#define PHY_BERLIN_MODE_SATA   (0x0 << 5)
 
 /* register 0x02 */
 #define USE_MAX_PLL_RATE   BIT(12)
@@ -102,7 +102,8 @@ static int phy_berlin_sata_power_on(struct phy *phy)
 
/* set PHY mode and ref freq to 25 MHz */
phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x01,
-   0x00ff, REF_FREF_SEL_25 | PHY_MODE_SATA);
+   0x00ff,
+   REF_FREF_SEL_25 | PHY_BERLIN_MODE_SATA);
 
/* set PHY up to 6 Gbps */
phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x25,
diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index e8e118d70fd7..3f350e2749fe 100644
--- a/include/linux/phy/phy.h
+++ b/include/linux/phy/phy.h
@@ -42,6 +42,7 @@ enum phy_mode {
PHY_MODE_PCIE,
PHY_MODE_ETHERNET,
PHY_MODE_MIPI_DPHY,
+   PHY_MODE_SATA
 };
 
 /**
-- 
2.20.1