Re: [PATCH v2 06/16] arm64: dts: mt7622: add cpufreq related device nodes

[Sean Wang]

On Wed, 2018-02-07 at 11:48 +0530, Viresh Kumar wrote:
> On 07-02-18, 14:16, Sean Wang wrote:
> > On Wed, 2018-02-07 at 09:03 +0530, Viresh Kumar wrote:
> > > On 06-02-18, 17:52, sean.w...@mediatek.com wrote:
> > > > cpus {
> > > > #address-cells = <2>;
> > > > #size-cells = <0>;
> > > > @@ -26,6 +70,10 @@
> > > > device_type = "cpu";
> > > > compatible = "arm,cortex-a53", "arm,armv8";
> > > > reg = <0x0 0x0>;
> > > > +   clocks = < CLK_INFRA_MUX1_SEL>,
> > > > +< CLK_APMIXED_MAIN_CORE_EN>;
> > > > +   clock-names = "cpu", "intermediate";
> > > > +   operating-points-v2 = <_opp_table>;
> > > > enable-method = "psci";
> > > > clock-frequency = <13>;
> > > > };
> > > > @@ -34,6 +82,7 @@
> > > > device_type = "cpu";
> > > > compatible = "arm,cortex-a53", "arm,armv8";
> > > > reg = <0x0 0x1>;
> > > > +   operating-points-v2 = <_opp_table>;
> > > > enable-method = "psci";
> > > > clock-frequency = <13>;
> > > > };
> > > 
> > > Sorry for not picking this earlier, but you should probably add the same 
> > > clock
> > > related properties for both cpu nodes here. Things will break if CPU1 is 
> > > used by
> > > the cpufreq core to bring the cpufreq policy online.
> > > 
> > > This can happen if cpufreq driver is a module, CPU0 is hotplugged out and 
> > > then
> > > the cpufreq driver is inserted.
> > > 
> > 
> > mt7622 cpu0 does not support hotplug. do I still need to add same clock
> > related properties for both cpu nodes here?
> 
> Normally we should always add these properties to all the CPUs, as that's the
> real scenario hardware configuration wise.
> 

Agree on, I will add these missing clock properties also into the cpu1
node to reflect the hardware actually should have. 

That also is devicetree wants us to do to describe the device more
closely.

> But I am not sure if something else will break if you don't provide clocks in
> CPU1.
> 
> @Rob @Mark: What do you suggest ?
> 

Re: [PATCH v2 06/16] arm64: dts: mt7622: add cpufreq related device nodes

[Sean Wang]

On Wed, 2018-02-07 at 11:48 +0530, Viresh Kumar wrote:
> On 07-02-18, 14:16, Sean Wang wrote:
> > On Wed, 2018-02-07 at 09:03 +0530, Viresh Kumar wrote:
> > > On 06-02-18, 17:52, sean.w...@mediatek.com wrote:
> > > > cpus {
> > > > #address-cells = <2>;
> > > > #size-cells = <0>;
> > > > @@ -26,6 +70,10 @@
> > > > device_type = "cpu";
> > > > compatible = "arm,cortex-a53", "arm,armv8";
> > > > reg = <0x0 0x0>;
> > > > +   clocks = < CLK_INFRA_MUX1_SEL>,
> > > > +< CLK_APMIXED_MAIN_CORE_EN>;
> > > > +   clock-names = "cpu", "intermediate";
> > > > +   operating-points-v2 = <_opp_table>;
> > > > enable-method = "psci";
> > > > clock-frequency = <13>;
> > > > };
> > > > @@ -34,6 +82,7 @@
> > > > device_type = "cpu";
> > > > compatible = "arm,cortex-a53", "arm,armv8";
> > > > reg = <0x0 0x1>;
> > > > +   operating-points-v2 = <_opp_table>;
> > > > enable-method = "psci";
> > > > clock-frequency = <13>;
> > > > };
> > > 
> > > Sorry for not picking this earlier, but you should probably add the same 
> > > clock
> > > related properties for both cpu nodes here. Things will break if CPU1 is 
> > > used by
> > > the cpufreq core to bring the cpufreq policy online.
> > > 
> > > This can happen if cpufreq driver is a module, CPU0 is hotplugged out and 
> > > then
> > > the cpufreq driver is inserted.
> > > 
> > 
> > mt7622 cpu0 does not support hotplug. do I still need to add same clock
> > related properties for both cpu nodes here?
> 
> Normally we should always add these properties to all the CPUs, as that's the
> real scenario hardware configuration wise.
> 

Agree on, I will add these missing clock properties also into the cpu1
node to reflect the hardware actually should have. 

That also is devicetree wants us to do to describe the device more
closely.

> But I am not sure if something else will break if you don't provide clocks in
> CPU1.
> 
> @Rob @Mark: What do you suggest ?
> 

Re: [PATCH v2 06/16] arm64: dts: mt7622: add cpufreq related device nodes

[Viresh Kumar]

On 07-02-18, 14:16, Sean Wang wrote:
> On Wed, 2018-02-07 at 09:03 +0530, Viresh Kumar wrote:
> > On 06-02-18, 17:52, sean.w...@mediatek.com wrote:
> > >   cpus {
> > >   #address-cells = <2>;
> > >   #size-cells = <0>;
> > > @@ -26,6 +70,10 @@
> > >   device_type = "cpu";
> > >   compatible = "arm,cortex-a53", "arm,armv8";
> > >   reg = <0x0 0x0>;
> > > + clocks = < CLK_INFRA_MUX1_SEL>,
> > > +  < CLK_APMIXED_MAIN_CORE_EN>;
> > > + clock-names = "cpu", "intermediate";
> > > + operating-points-v2 = <_opp_table>;
> > >   enable-method = "psci";
> > >   clock-frequency = <13>;
> > >   };
> > > @@ -34,6 +82,7 @@
> > >   device_type = "cpu";
> > >   compatible = "arm,cortex-a53", "arm,armv8";
> > >   reg = <0x0 0x1>;
> > > + operating-points-v2 = <_opp_table>;
> > >   enable-method = "psci";
> > >   clock-frequency = <13>;
> > >   };
> > 
> > Sorry for not picking this earlier, but you should probably add the same 
> > clock
> > related properties for both cpu nodes here. Things will break if CPU1 is 
> > used by
> > the cpufreq core to bring the cpufreq policy online.
> > 
> > This can happen if cpufreq driver is a module, CPU0 is hotplugged out and 
> > then
> > the cpufreq driver is inserted.
> > 
> 
> mt7622 cpu0 does not support hotplug. do I still need to add same clock
> related properties for both cpu nodes here?

Normally we should always add these properties to all the CPUs, as that's the
real scenario hardware configuration wise.

But I am not sure if something else will break if you don't provide clocks in
CPU1.

@Rob @Mark: What do you suggest ?

-- 
viresh

Re: [PATCH v2 06/16] arm64: dts: mt7622: add cpufreq related device nodes

[Viresh Kumar]

On 07-02-18, 14:16, Sean Wang wrote:
> On Wed, 2018-02-07 at 09:03 +0530, Viresh Kumar wrote:
> > On 06-02-18, 17:52, sean.w...@mediatek.com wrote:
> > >   cpus {
> > >   #address-cells = <2>;
> > >   #size-cells = <0>;
> > > @@ -26,6 +70,10 @@
> > >   device_type = "cpu";
> > >   compatible = "arm,cortex-a53", "arm,armv8";
> > >   reg = <0x0 0x0>;
> > > + clocks = < CLK_INFRA_MUX1_SEL>,
> > > +  < CLK_APMIXED_MAIN_CORE_EN>;
> > > + clock-names = "cpu", "intermediate";
> > > + operating-points-v2 = <_opp_table>;
> > >   enable-method = "psci";
> > >   clock-frequency = <13>;
> > >   };
> > > @@ -34,6 +82,7 @@
> > >   device_type = "cpu";
> > >   compatible = "arm,cortex-a53", "arm,armv8";
> > >   reg = <0x0 0x1>;
> > > + operating-points-v2 = <_opp_table>;
> > >   enable-method = "psci";
> > >   clock-frequency = <13>;
> > >   };
> > 
> > Sorry for not picking this earlier, but you should probably add the same 
> > clock
> > related properties for both cpu nodes here. Things will break if CPU1 is 
> > used by
> > the cpufreq core to bring the cpufreq policy online.
> > 
> > This can happen if cpufreq driver is a module, CPU0 is hotplugged out and 
> > then
> > the cpufreq driver is inserted.
> > 
> 
> mt7622 cpu0 does not support hotplug. do I still need to add same clock
> related properties for both cpu nodes here?

Normally we should always add these properties to all the CPUs, as that's the
real scenario hardware configuration wise.

But I am not sure if something else will break if you don't provide clocks in
CPU1.

@Rob @Mark: What do you suggest ?

-- 
viresh

Re: [PATCH v2 06/16] arm64: dts: mt7622: add cpufreq related device nodes

[Sean Wang]

On Wed, 2018-02-07 at 09:03 +0530, Viresh Kumar wrote:
> On 06-02-18, 17:52, sean.w...@mediatek.com wrote:
> > cpus {
> > #address-cells = <2>;
> > #size-cells = <0>;
> > @@ -26,6 +70,10 @@
> > device_type = "cpu";
> > compatible = "arm,cortex-a53", "arm,armv8";
> > reg = <0x0 0x0>;
> > +   clocks = < CLK_INFRA_MUX1_SEL>,
> > +< CLK_APMIXED_MAIN_CORE_EN>;
> > +   clock-names = "cpu", "intermediate";
> > +   operating-points-v2 = <_opp_table>;
> > enable-method = "psci";
> > clock-frequency = <13>;
> > };
> > @@ -34,6 +82,7 @@
> > device_type = "cpu";
> > compatible = "arm,cortex-a53", "arm,armv8";
> > reg = <0x0 0x1>;
> > +   operating-points-v2 = <_opp_table>;
> > enable-method = "psci";
> > clock-frequency = <13>;
> > };
> 
> Sorry for not picking this earlier, but you should probably add the same clock
> related properties for both cpu nodes here. Things will break if CPU1 is used 
> by
> the cpufreq core to bring the cpufreq policy online.
> 
> This can happen if cpufreq driver is a module, CPU0 is hotplugged out and then
> the cpufreq driver is inserted.
> 

mt7622 cpu0 does not support hotplug. do I still need to add same clock
related properties for both cpu nodes here?

Re: [PATCH v2 06/16] arm64: dts: mt7622: add cpufreq related device nodes

[Sean Wang]

On Wed, 2018-02-07 at 09:03 +0530, Viresh Kumar wrote:
> On 06-02-18, 17:52, sean.w...@mediatek.com wrote:
> > cpus {
> > #address-cells = <2>;
> > #size-cells = <0>;
> > @@ -26,6 +70,10 @@
> > device_type = "cpu";
> > compatible = "arm,cortex-a53", "arm,armv8";
> > reg = <0x0 0x0>;
> > +   clocks = < CLK_INFRA_MUX1_SEL>,
> > +< CLK_APMIXED_MAIN_CORE_EN>;
> > +   clock-names = "cpu", "intermediate";
> > +   operating-points-v2 = <_opp_table>;
> > enable-method = "psci";
> > clock-frequency = <13>;
> > };
> > @@ -34,6 +82,7 @@
> > device_type = "cpu";
> > compatible = "arm,cortex-a53", "arm,armv8";
> > reg = <0x0 0x1>;
> > +   operating-points-v2 = <_opp_table>;
> > enable-method = "psci";
> > clock-frequency = <13>;
> > };
> 
> Sorry for not picking this earlier, but you should probably add the same clock
> related properties for both cpu nodes here. Things will break if CPU1 is used 
> by
> the cpufreq core to bring the cpufreq policy online.
> 
> This can happen if cpufreq driver is a module, CPU0 is hotplugged out and then
> the cpufreq driver is inserted.
> 

mt7622 cpu0 does not support hotplug. do I still need to add same clock
related properties for both cpu nodes here?

Re: [PATCH v2 06/16] arm64: dts: mt7622: add cpufreq related device nodes

[Viresh Kumar]

On 06-02-18, 17:52, sean.w...@mediatek.com wrote:
>   cpus {
>   #address-cells = <2>;
>   #size-cells = <0>;
> @@ -26,6 +70,10 @@
>   device_type = "cpu";
>   compatible = "arm,cortex-a53", "arm,armv8";
>   reg = <0x0 0x0>;
> + clocks = < CLK_INFRA_MUX1_SEL>,
> +  < CLK_APMIXED_MAIN_CORE_EN>;
> + clock-names = "cpu", "intermediate";
> + operating-points-v2 = <_opp_table>;
>   enable-method = "psci";
>   clock-frequency = <13>;
>   };
> @@ -34,6 +82,7 @@
>   device_type = "cpu";
>   compatible = "arm,cortex-a53", "arm,armv8";
>   reg = <0x0 0x1>;
> + operating-points-v2 = <_opp_table>;
>   enable-method = "psci";
>   clock-frequency = <13>;
>   };

Sorry for not picking this earlier, but you should probably add the same clock
related properties for both cpu nodes here. Things will break if CPU1 is used by
the cpufreq core to bring the cpufreq policy online.

This can happen if cpufreq driver is a module, CPU0 is hotplugged out and then
the cpufreq driver is inserted.

-- 
viresh

Re: [PATCH v2 06/16] arm64: dts: mt7622: add cpufreq related device nodes

[Viresh Kumar]

On 06-02-18, 17:52, sean.w...@mediatek.com wrote:
>   cpus {
>   #address-cells = <2>;
>   #size-cells = <0>;
> @@ -26,6 +70,10 @@
>   device_type = "cpu";
>   compatible = "arm,cortex-a53", "arm,armv8";
>   reg = <0x0 0x0>;
> + clocks = < CLK_INFRA_MUX1_SEL>,
> +  < CLK_APMIXED_MAIN_CORE_EN>;
> + clock-names = "cpu", "intermediate";
> + operating-points-v2 = <_opp_table>;
>   enable-method = "psci";
>   clock-frequency = <13>;
>   };
> @@ -34,6 +82,7 @@
>   device_type = "cpu";
>   compatible = "arm,cortex-a53", "arm,armv8";
>   reg = <0x0 0x1>;
> + operating-points-v2 = <_opp_table>;
>   enable-method = "psci";
>   clock-frequency = <13>;
>   };

Sorry for not picking this earlier, but you should probably add the same clock
related properties for both cpu nodes here. Things will break if CPU1 is used by
the cpufreq core to bring the cpufreq policy online.

This can happen if cpufreq driver is a module, CPU0 is hotplugged out and then
the cpufreq driver is inserted.

-- 
viresh

[PATCH v2 06/16] arm64: dts: mt7622: add cpufreq related device nodes

[sean.wang]

From: Sean Wang 

Add clocks, regulators and opp information into cpu nodes.
In addition, the power supply for cpu nodes is deployed on
mt7622-rfb1 board.

Signed-off-by: Sean Wang 
Cc: Viresh Kumar 
---
 arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 12 +++
 arch/arm64/boot/dts/mediatek/mt7622.dtsi | 49 
 2 files changed, 61 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts 
b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
index 4615af6..bbf4d03 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
@@ -20,6 +20,18 @@
bootargs = "console=ttyS0,115200n1";
};
 
+   cpus {
+   cpu@0 {
+   proc-supply = <_vcpu_reg>;
+   sram-supply = <_vm_reg>;
+   };
+
+   cpu@1 {
+   proc-supply = <_vcpu_reg>;
+   sram-supply = <_vm_reg>;
+   };
+   };
+
gpio-keys {
compatible = "gpio-keys-polled";
poll-interval = <100>;
diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi 
b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
index c387c4c..65eb417 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -18,6 +18,50 @@
#address-cells = <2>;
#size-cells = <2>;
 
+   cpu_opp_table: opp-table {
+   compatible = "operating-points-v2";
+   opp-shared;
+   opp-3 {
+   opp-hz = /bits/ 64 <3000>;
+   opp-microvolt = <95>;
+   };
+
+   opp-43750 {
+   opp-hz = /bits/ 64 <43750>;
+   opp-microvolt = <100>;
+   };
+
+   opp-6 {
+   opp-hz = /bits/ 64 <6>;
+   opp-microvolt = <105>;
+   };
+
+   opp-81250 {
+   opp-hz = /bits/ 64 <81250>;
+   opp-microvolt = <110>;
+   };
+
+   opp-102500 {
+   opp-hz = /bits/ 64 <102500>;
+   opp-microvolt = <115>;
+   };
+
+   opp-113750 {
+   opp-hz = /bits/ 64 <113750>;
+   opp-microvolt = <120>;
+   };
+
+   opp-126250 {
+   opp-hz = /bits/ 64 <126250>;
+   opp-microvolt = <125>;
+   };
+
+   opp-135000 {
+   opp-hz = /bits/ 64 <135000>;
+   opp-microvolt = <131>;
+   };
+   };
+
cpus {
#address-cells = <2>;
#size-cells = <0>;
@@ -26,6 +70,10 @@
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x0>;
+   clocks = < CLK_INFRA_MUX1_SEL>,
+< CLK_APMIXED_MAIN_CORE_EN>;
+   clock-names = "cpu", "intermediate";
+   operating-points-v2 = <_opp_table>;
enable-method = "psci";
clock-frequency = <13>;
};
@@ -34,6 +82,7 @@
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x1>;
+   operating-points-v2 = <_opp_table>;
enable-method = "psci";
clock-frequency = <13>;
};
-- 
2.7.4

[PATCH v2 06/16] arm64: dts: mt7622: add cpufreq related device nodes

[sean.wang]

From: Sean Wang 

Add clocks, regulators and opp information into cpu nodes.
In addition, the power supply for cpu nodes is deployed on
mt7622-rfb1 board.

Signed-off-by: Sean Wang 
Cc: Viresh Kumar 
---
 arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 12 +++
 arch/arm64/boot/dts/mediatek/mt7622.dtsi | 49 
 2 files changed, 61 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts 
b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
index 4615af6..bbf4d03 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
@@ -20,6 +20,18 @@
bootargs = "console=ttyS0,115200n1";
};
 
+   cpus {
+   cpu@0 {
+   proc-supply = <_vcpu_reg>;
+   sram-supply = <_vm_reg>;
+   };
+
+   cpu@1 {
+   proc-supply = <_vcpu_reg>;
+   sram-supply = <_vm_reg>;
+   };
+   };
+
gpio-keys {
compatible = "gpio-keys-polled";
poll-interval = <100>;
diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi 
b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
index c387c4c..65eb417 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -18,6 +18,50 @@
#address-cells = <2>;
#size-cells = <2>;
 
+   cpu_opp_table: opp-table {
+   compatible = "operating-points-v2";
+   opp-shared;
+   opp-3 {
+   opp-hz = /bits/ 64 <3000>;
+   opp-microvolt = <95>;
+   };
+
+   opp-43750 {
+   opp-hz = /bits/ 64 <43750>;
+   opp-microvolt = <100>;
+   };
+
+   opp-6 {
+   opp-hz = /bits/ 64 <6>;
+   opp-microvolt = <105>;
+   };
+
+   opp-81250 {
+   opp-hz = /bits/ 64 <81250>;
+   opp-microvolt = <110>;
+   };
+
+   opp-102500 {
+   opp-hz = /bits/ 64 <102500>;
+   opp-microvolt = <115>;
+   };
+
+   opp-113750 {
+   opp-hz = /bits/ 64 <113750>;
+   opp-microvolt = <120>;
+   };
+
+   opp-126250 {
+   opp-hz = /bits/ 64 <126250>;
+   opp-microvolt = <125>;
+   };
+
+   opp-135000 {
+   opp-hz = /bits/ 64 <135000>;
+   opp-microvolt = <131>;
+   };
+   };
+
cpus {
#address-cells = <2>;
#size-cells = <0>;
@@ -26,6 +70,10 @@
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x0>;
+   clocks = < CLK_INFRA_MUX1_SEL>,
+< CLK_APMIXED_MAIN_CORE_EN>;
+   clock-names = "cpu", "intermediate";
+   operating-points-v2 = <_opp_table>;
enable-method = "psci";
clock-frequency = <13>;
};
@@ -34,6 +82,7 @@
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x1>;
+   operating-points-v2 = <_opp_table>;
enable-method = "psci";
clock-frequency = <13>;
};
-- 
2.7.4