RE: [PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to Sideband bridge support driver for Intel SOC's
> -Original Message- > From: Andy Shevchenko [mailto:andriy.shevche...@linux.intel.com] > Sent: Friday, November 18, 2016 7:22 PM > To: Tan, Jui Nee <jui.nee@intel.com>; mika.westerb...@linux.intel.com; > heikki.kroge...@linux.intel.com; t...@linutronix.de; dvh...@infradead.org; > mi...@redhat.com; h...@zytor.com; x...@kernel.org; pty...@xes-inc.com; > lee.jo...@linaro.org; linus.wall...@linaro.org > Cc: linux-g...@vger.kernel.org; platform-driver-...@vger.kernel.org; > linux-kernel@vger.kernel.org; Yong, Jonathan <jonathan.y...@intel.com>; > Yu, Ong Hock <ong.hock...@intel.com>; Luck, Tony <tony.l...@intel.com>; > Wan Mohamad, Wan Ahmad Zainie <wan.ahmad.zainie.wan.moha...@intel.com>; > Sun, Yunying <yunying....@intel.com> > Subject: Re: [PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to > Sideband bridge support driver for Intel SOC's > > On Fri, 2016-11-18 at 13:22 +0800, Tan Jui Nee wrote: > > From: Andy Shevchenko <andriy.shevche...@linux.intel.com> > > > > There is already one and at least one more user coming which require > > an access to Primary to Sideband bridge (P2SB) in order to get IO or > > MMIO bar hidden by BIOS. > > Create a driver to access P2SB for x86 devices. > > > > Signed-off-by: Yong, Jonathan <jonathan.y...@intel.com> > > Signed-off-by: Andy Shevchenko <andriy.shevche...@linux.intel.com> > > --- > > Changes in V11: > > - No change > > Any particular reason you ignored my comments to v10 of this patch? > Hi Andy, I am sorry for missing your comments as the email filtered into other folder and I was not aware of that. I will applied your comments into next patch version. > -- > Andy Shevchenko <andriy.shevche...@linux.intel.com> > Intel Finland Oy
RE: [PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to Sideband bridge support driver for Intel SOC's
> -Original Message- > From: Andy Shevchenko [mailto:andriy.shevche...@linux.intel.com] > Sent: Friday, November 18, 2016 7:22 PM > To: Tan, Jui Nee ; mika.westerb...@linux.intel.com; > heikki.kroge...@linux.intel.com; t...@linutronix.de; dvh...@infradead.org; > mi...@redhat.com; h...@zytor.com; x...@kernel.org; pty...@xes-inc.com; > lee.jo...@linaro.org; linus.wall...@linaro.org > Cc: linux-g...@vger.kernel.org; platform-driver-...@vger.kernel.org; > linux-kernel@vger.kernel.org; Yong, Jonathan ; > Yu, Ong Hock ; Luck, Tony ; > Wan Mohamad, Wan Ahmad Zainie ; > Sun, Yunying > Subject: Re: [PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to > Sideband bridge support driver for Intel SOC's > > On Fri, 2016-11-18 at 13:22 +0800, Tan Jui Nee wrote: > > From: Andy Shevchenko > > > > There is already one and at least one more user coming which require > > an access to Primary to Sideband bridge (P2SB) in order to get IO or > > MMIO bar hidden by BIOS. > > Create a driver to access P2SB for x86 devices. > > > > Signed-off-by: Yong, Jonathan > > Signed-off-by: Andy Shevchenko > > --- > > Changes in V11: > > - No change > > Any particular reason you ignored my comments to v10 of this patch? > Hi Andy, I am sorry for missing your comments as the email filtered into other folder and I was not aware of that. I will applied your comments into next patch version. > -- > Andy Shevchenko > Intel Finland Oy
Re: [PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to Sideband bridge support driver for Intel SOC's
On Fri, 2016-11-18 at 13:22 +0800, Tan Jui Nee wrote: > From: Andy Shevchenko> > There is already one and at least one more user coming which > require an access to Primary to Sideband bridge (P2SB) in order > to get IO or MMIO bar hidden by BIOS. > Create a driver to access P2SB for x86 devices. > > Signed-off-by: Yong, Jonathan > Signed-off-by: Andy Shevchenko > --- > Changes in V11: > - No change Any particular reason you ignored my comments to v10 of this patch? -- Andy Shevchenko Intel Finland Oy
Re: [PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to Sideband bridge support driver for Intel SOC's
On Fri, 2016-11-18 at 13:22 +0800, Tan Jui Nee wrote: > From: Andy Shevchenko > > There is already one and at least one more user coming which > require an access to Primary to Sideband bridge (P2SB) in order > to get IO or MMIO bar hidden by BIOS. > Create a driver to access P2SB for x86 devices. > > Signed-off-by: Yong, Jonathan > Signed-off-by: Andy Shevchenko > --- > Changes in V11: > - No change Any particular reason you ignored my comments to v10 of this patch? -- Andy Shevchenko Intel Finland Oy
Re: [PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to Sideband bridge support driver for Intel SOC's
On Fri, Nov 18, 2016 at 01:22:25PM +0800, Tan Jui Nee wrote: > From: Andy Shevchenko> > There is already one and at least one more user coming which > require an access to Primary to Sideband bridge (P2SB) in order > to get IO or MMIO bar hidden by BIOS. > Create a driver to access P2SB for x86 devices. > > Signed-off-by: Yong, Jonathan > Signed-off-by: Andy Shevchenko Reviewed-by: Mika Westerberg
Re: [PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to Sideband bridge support driver for Intel SOC's
On Fri, Nov 18, 2016 at 01:22:25PM +0800, Tan Jui Nee wrote: > From: Andy Shevchenko > > There is already one and at least one more user coming which > require an access to Primary to Sideband bridge (P2SB) in order > to get IO or MMIO bar hidden by BIOS. > Create a driver to access P2SB for x86 devices. > > Signed-off-by: Yong, Jonathan > Signed-off-by: Andy Shevchenko Reviewed-by: Mika Westerberg