[PATCH 1/4 v2] ARM: OMAP4: sDMA: Update the request lines
From: Santosh Shilimkar This patch updates the platform dma.h with new dma request lines for OMAP4 peripherals. Also additional hardware register of OMAP4 sDMA module are included. Signed-off-by: Santosh Shilimkar Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/mach/dma.h | 88 + 1 files changed, 88 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-omap/include/mach/dma.h b/arch/arm/plat-omap/include/mach/dma.h index 8c1eae8..01ea54a 100644 --- a/arch/arm/plat-omap/include/mach/dma.h +++ b/arch/arm/plat-omap/include/mach/dma.h @@ -122,6 +122,11 @@ #define OMAP_DMA4_CCFN(n) (0x60 * (n) + 0xc0) #define OMAP_DMA4_COLOR(n) (0x60 * (n) + 0xc4) +/* Additional registers available on OMAP4 */ +#define OMAP_DMA4_CDP(n) (0x60 * (n) + 0xd0) +#define OMAP_DMA4_CNDP(n) (0x60 * (n) + 0xd4) +#define OMAP_DMA4_CCDN(n) (0x60 * (n) + 0xd8) + /* Dummy defines to keep multi-omap compiles happy */ #define OMAP1_DMA_REVISION 0 #define OMAP1_DMA_IRQSTATUS_L0 0 @@ -311,6 +316,89 @@ #define OMAP34XX_DMA_USIM_TX 79 /* S_DMA_78 */ #define OMAP34XX_DMA_USIM_RX 80 /* S_DMA_79 */ +/* DMA request lines for 44xx */ +#define OMAP44XX_DMA_DSS_DISPC_REQ 6 /* S_DMA_5 */ +#define OMAP44XX_DMA_SYS_REQ2 7 /* S_DMA_6 */ +#define OMAP44XX_DMA_ISS_REQ1 9 /* S_DMA_8 */ +#define OMAP44XX_DMA_ISS_REQ2 10 /* S_DMA_9 */ +#define OMAP44XX_DMA_ISS_REQ3 12 /* S_DMA_11 */ +#define OMAP44XX_DMA_ISS_REQ4 13 /* S_DMA_12 */ +#define OMAP44XX_DMA_DSS_RFBI_REQ 14 /* S_DMA_13 */ +#define OMAP44XX_DMA_SPI3_TX0 15 /* S_DMA_14 */ +#define OMAP44XX_DMA_SPI3_RX0 16 /* S_DMA_15 */ +#define OMAP44XX_DMA_MCBSP2_TX 17 /* S_DMA_16 */ +#define OMAP44XX_DMA_MCBSP2_RX 18 /* S_DMA_17 */ +#define OMAP44XX_DMA_MCBSP3_TX 19 /* S_DMA_18 */ +#define OMAP44XX_DMA_MCBSP3_RX 20 /* S_DMA_19 */ +#define OMAP44XX_DMA_SPI3_TX1 23 /* S_DMA_22 */ +#define OMAP44XX_DMA_SPI3_RX1 24 /* S_DMA_23 */ +#define OMAP44XX_DMA_I2C3_TX 25 /* S_DMA_24 */ +#define OMAP44XX_DMA_I2C3_RX 26 /* S_DMA_25 */ +#define OMAP44XX_DMA_I2C1_TX 27 /* S_DMA_26 */ +#define OMAP44XX_DMA_I2C1_RX 28 /* S_DMA_27 */ +#define OMAP44XX_DMA_I2C2_TX 29 /* S_DMA_28 */ +#define OMAP44XX_DMA_I2C2_RX 30 /* S_DMA_29 */ +#define OMAP44XX_DMA_MCBSP4_TX 31 /* S_DMA_30 */ +#define OMAP44XX_DMA_MCBSP4_RX 32 /* S_DMA_31 */ +#define OMAP44XX_DMA_MCBSP1_TX 33 /* S_DMA_32 */ +#define OMAP44XX_DMA_MCBSP1_RX 34 /* S_DMA_33 */ +#define OMAP44XX_DMA_SPI1_TX0 35 /* S_DMA_34 */ +#define OMAP44XX_DMA_SPI1_RX0 36 /* S_DMA_35 */ +#define OMAP44XX_DMA_SPI1_TX1 37 /* S_DMA_36 */ +#define OMAP44XX_DMA_SPI1_RX1 38 /* S_DMA_37 */ +#define OMAP44XX_DMA_SPI1_TX2 39 /* S_DMA_38 */ +#define OMAP44XX_DMA_SPI1_RX2 40 /* S_DMA_39 */ +#define OMAP44XX_DMA_SPI1_TX3 41 /* S_DMA_40 */ +#define OMAP44XX_DMA_SPI1_RX3 42 /* S_DMA_41 */ +#define OMAP44XX_DMA_SPI2_TX0 43 /* S_DMA_42 */ +#define OMAP44XX_DMA_SPI2_RX0 44 /* S_DMA_43 */ +#define OMAP44XX_DMA_SPI2_TX1 45 /* S_DMA_44 */ +#define OMAP44XX_DMA_SPI2_RX1 46 /* S_DMA_45 */ +#define OMAP44XX_DMA_MMC2_TX 47 /* S_DMA_46 */ +#define OMAP44XX_DMA_MMC2_RX 48 /* S_DMA_47 */ +#define OMAP44XX_DMA_UART1_TX 49 /* S_DMA_48 */ +#define OMAP44XX_DMA_UART1_RX 50 /* S_DMA_49 */ +#define OMAP44XX_DMA_UART2_TX 51 /* S_DMA_50 */ +#define OMAP44XX_DMA_UART2_RX 52 /* S_DMA_51 */ +#define OMAP44XX_DMA_UART3_TX 53 /* S_DMA_52 */ +#define OMAP44XX_DMA_UART3_RX 54 /* S_DMA_53 */ +#define OMAP44XX_DMA_UART4_TX 55 /* S_DMA_54 */ +#define OMAP44XX_DMA_UART4_RX 56 /* S_DMA_55 */ +#define OMAP44XX_DMA_MMC4_TX 57 /* S_DMA_56 */ +#define OMAP44XX_DMA_MMC4_RX 58 /* S_DMA_57 */ +#define OMAP44XX_DMA_MMC5_TX 59 /* S_DMA_58 */ +#define OMAP44XX_DMA_MMC5_RX 60 /* S_DMA_59 */ +#define OMAP44XX_DMA_MMC1_TX 61 /* S_DMA_60 */ +#define OMAP44XX_DMA_MMC1_RX 62 /* S_DMA_61 */ +#define OMAP44XX_DMA_SYS_REQ3 64 /* S_DMA_63 */ +#define OMAP44XX_DMA_MCPDM_UP 65 /* S_DMA_64 */ +#define OMAP44XX_DMA_MCPDM_DL 66 /* S_DMA_65 */ +#define OMAP44XX_DMA_SPI4_TX0 70 /* S_DMA_69 */ +#define OMAP44XX_DMA_SPI4_RX0 71 /* S_DMA_70 */ +#define OMAP44XX_DMA_DSS_DSI1_REQ0 72 /* S_DMA_71 *
RE: [PATCH 1/4] ARM: OMAP4: sDMA: Update the request lines
> > > diff --git a/arch/arm/plat-omap/include/mach/dma.h > > b/arch/arm/plat-omap/include/mach/dma.h > > > index 8c1eae8..01ea54a 100644 > > > --- a/arch/arm/plat-omap/include/mach/dma.h > > > +++ b/arch/arm/plat-omap/include/mach/dma.h > > > @@ -122,6 +122,11 @@ > > > #define OMAP_DMA4_CCFN(n)(0x60 * (n) + 0xc0) > > > #define OMAP_DMA4_COLOR(n) (0x60 * (n) + 0xc4) > > > > > > +/* Additional registers available on OMAP4 */ > > > +#define OMAP_DMA4_CDP(n) (0x60 * (n) + 0xd0) > > > +#define OMAP_DMA4_CNDP(n)(0x60 * (n) + 0xd4) > > > +#define OMAP_DMA4_CCDN(n)(0x60 * (n) + 0xd8) > > > + > > > /* Dummy defines to keep multi-omap compiles happy */ > > > #define OMAP1_DMA_REVISION 0 > > > #define OMAP1_DMA_IRQSTATUS_L0 0 > > > @@ -311,6 +316,89 @@ > > > #define OMAP34XX_DMA_USIM_TX 79 /* S_DMA_78 */ > > > #define OMAP34XX_DMA_USIM_RX 80 /* S_DMA_79 */ > > > > > > +/* DMA request lines for 44xx */ > > > +#define OMAP44XX_DMA_DSS_DISPC_REQ 6 /* S_DMA_5 */ > > > +#define OMAP44XX_DMA_SYS_REQ27 /* S_DMA_6 */ > > > +#define OMAP44XX_DMA_ISS_REQ19 /* S_DMA_8 */ > > > +#define OMAP44XX_DMA_ISS_REQ210 /* S_DMA_9 */ > > > +#define OMAP44XX_DMA_ISS_EQ3 12 /* S_DMA_11 */ > > > > ^^ > > > > ... this one. > > > > Suggest you resend a version that uses that data. > > I am sorry but what's mistake you noticed in the patch ? Ya It should have been "REQ". We will cross verify and resubmit the patch-- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 1/4] ARM: OMAP4: sDMA: Update the request lines
Paul, > -Original Message- > From: linux-omap-ow...@vger.kernel.org > [mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Paul Walmsley > Sent: Wednesday, July 08, 2009 12:53 AM > To: Syed, Rafiuddin > Cc: linux-arm-ker...@lists.arm.linux.org.uk; > linux-omap@vger.kernel.org; Cousson, Benoit; Shilimkar, > Santosh; Tony Lindgren > Subject: Re: [PATCH 1/4] ARM: OMAP4: sDMA: Update the request lines > > Hello Syed, > > This should use the auto-generated data from Benoit. This will avoid > mistakes like: > > On Tue, 7 Jul 2009, rafiuddin.s...@ti.com wrote: > > > From: Santosh Shilimkar > > > > This patch updates the platform dma.h with new dma request lines > > for OMAP4 peripherals. Also additional hardware register of OMAP4 > > sDMA module are included. > > > > Signed-off-by: Santosh Shilimkar > > Signed-off-by: Tony Lindgren > > --- > > arch/arm/plat-omap/include/mach/dma.h | 88 > + > > 1 files changed, 88 insertions(+), 0 deletions(-) > > > > diff --git a/arch/arm/plat-omap/include/mach/dma.h > b/arch/arm/plat-omap/include/mach/dma.h > > index 8c1eae8..01ea54a 100644 > > --- a/arch/arm/plat-omap/include/mach/dma.h > > +++ b/arch/arm/plat-omap/include/mach/dma.h > > @@ -122,6 +122,11 @@ > > #define OMAP_DMA4_CCFN(n) (0x60 * (n) + 0xc0) > > #define OMAP_DMA4_COLOR(n) (0x60 * (n) + 0xc4) > > > > +/* Additional registers available on OMAP4 */ > > +#define OMAP_DMA4_CDP(n) (0x60 * (n) + 0xd0) > > +#define OMAP_DMA4_CNDP(n) (0x60 * (n) + 0xd4) > > +#define OMAP_DMA4_CCDN(n) (0x60 * (n) + 0xd8) > > + > > /* Dummy defines to keep multi-omap compiles happy */ > > #define OMAP1_DMA_REVISION 0 > > #define OMAP1_DMA_IRQSTATUS_L0 0 > > @@ -311,6 +316,89 @@ > > #define OMAP34XX_DMA_USIM_TX 79 /* S_DMA_78 */ > > #define OMAP34XX_DMA_USIM_RX 80 /* S_DMA_79 */ > > > > +/* DMA request lines for 44xx */ > > +#define OMAP44XX_DMA_DSS_DISPC_REQ 6 /* S_DMA_5 */ > > +#define OMAP44XX_DMA_SYS_REQ2 7 /* S_DMA_6 */ > > +#define OMAP44XX_DMA_ISS_REQ1 9 /* S_DMA_8 */ > > +#define OMAP44XX_DMA_ISS_REQ2 10 /* S_DMA_9 */ > > +#define OMAP44XX_DMA_ISS_EQ3 12 /* S_DMA_11 */ > > ^^ > > ... this one. > > Suggest you resend a version that uses that data. I am sorry but what's mistake you noticed in the patch ? Regards, Santosh -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] [RFC] Potential bug in defining 'irq field' of 'ifmap structure'
From: "Pandita, Vikram" Date: Wed, 8 Jul 2009 02:27:51 +0530 > On Zoom2 TI OMAP3 based board, the IRQ we are requesting is > value=381 and hence the problem reported. The IRQ reported by this user call is only reliable for ISA devices. Or, ARM platforms could opt to use a virtual IRQ scheme like PowerPC and Sparc use, which keeps all device IRQs under 256. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/2] OMAP2/3/4: omap_hwmod: fix reset bug
The _reset() hook should early when _soft_reset() fails, not it if succeeds. Currently, it aborts when _soft_reset() succeeds, resulting in not waiting for RESETDONE. Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/omap_hwmod.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index b103797..76b6845 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -746,7 +746,7 @@ static int _reset(struct omap_hwmod *oh) v = oh->_sysc_cache; r = _set_softreset(oh, &v); - if (!r) + if (r) return r; _write_sysconfig(v, oh); -- 1.6.3.3 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] OMAP2/3: HS-MMC: correct hwmod offsets for SYSCONFIG/SYSSTATUS
Signed-off-by: Kevin Hilman
---
arch/arm/mach-omap2/omap_hwmod_2430.h |4 ++--
arch/arm/mach-omap2/omap_hwmod_34xx.h |4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430.h
b/arch/arm/mach-omap2/omap_hwmod_2430.h
index 0ae23f3..48077c7 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430.h
+++ b/arch/arm/mach-omap2/omap_hwmod_2430.h
@@ -170,8 +170,8 @@ static struct omap_hwmod omap2430_mpu_hwmod = {
/* MMC/SD/SDIO common */
static struct omap_hwmod_sysconfig mmc_if_ctrl = {
- .rev_offs = 0x10,
- .sysc_offs = 0x14,
+ .sysc_offs = 0x10,
+ .syss_offs = 0x14,
.sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
SYSC_HAS_AUTOIDLE | SYSS_MISSING),
diff --git a/arch/arm/mach-omap2/omap_hwmod_34xx.h
b/arch/arm/mach-omap2/omap_hwmod_34xx.h
index afc3cd4..34319c3 100644
--- a/arch/arm/mach-omap2/omap_hwmod_34xx.h
+++ b/arch/arm/mach-omap2/omap_hwmod_34xx.h
@@ -236,8 +236,8 @@ static struct omap_hwmod omap34xx_mpu_hwmod = {
/* MMC/SD/SDIO common */
static struct omap_hwmod_sysconfig mmc_if_ctrl = {
- .rev_offs = 0x10,
- .sysc_offs = 0x14,
+ .sysc_offs = 0x10,
+ .syss_offs = 0x14,
.sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
SYSC_HAS_AUTOIDLE),
--
1.6.3.3
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[PATCH 0/2] hwmod fixes for MMC module reset on init
I've started to integrate the new hwmod/omapdev into the PM branch for the next release. With the new MMC hwmod added, hwmod should do a full reset and idle of the MMC modules on init, so I decided to remove the patch from the PM branch which does the same. To my surprise, the MMC blocks were preventing retention without the original patch. In debugging hwmod, I found a couple problems. One with the MMC sys[cs]_off values themselves, and another in that the reset code was not waiting for RESETDONE. Kevin Hilman (2): OMAP2/3: HS-MMC: correct hwmod offsets for SYSCONFIG/SYSSTATUS OMAP2/3/4: omap_hwmod: fix reset bug arch/arm/mach-omap2/omap_hwmod.c |2 +- arch/arm/mach-omap2/omap_hwmod_2430.h |4 ++-- arch/arm/mach-omap2/omap_hwmod_34xx.h |4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] OMAP3: SPI: Restore also CHxCONF register when restoring context
Tero Kristo writes:
> From: Tero Kristo
>
> Previous restore was lazy and only restored CHxCONF when it was needed by a
> specific chip select. This could cause occasional errors on an SPI bus where
> multiple chip selects are in use.
>
> Applies on top of PM branch.
>
> Signed-off-by: Tero Kristo
Thanks, pulling into PM branch.
Kevin
> ---
> drivers/spi/omap2_mcspi.c | 16
> 1 files changed, 16 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c
> index a75c546..7853fb7 100644
> --- a/drivers/spi/omap2_mcspi.c
> +++ b/drivers/spi/omap2_mcspi.c
> @@ -134,6 +134,7 @@ struct omap2_mcspi_cs {
> void __iomem*base;
> unsigned long phys;
> int word_len;
> + struct list_headnode;
> /* Context save and restore shadow register */
> u32 chconf0;
> };
> @@ -145,6 +146,7 @@ struct omap2_mcspi_regs {
> u32 sysconfig;
> u32 modulctrl;
> u32 wakeupenable;
> + struct list_head cs;
> };
>
> static struct omap2_mcspi_regs omap2_mcspi_ctx[OMAP2_MCSPI_MAX_CTRL];
> @@ -255,6 +257,7 @@ static void omap2_mcspi_set_master_mode(struct spi_master
> *master)
> static void omap2_mcspi_restore_ctx(struct omap2_mcspi *mcspi)
> {
> struct spi_master *spi_cntrl;
> + struct omap2_mcspi_cs *cs;
> spi_cntrl = mcspi->master;
>
> /* McSPI: context restore */
> @@ -266,6 +269,10 @@ static void omap2_mcspi_restore_ctx(struct omap2_mcspi
> *mcspi)
>
> mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_WAKEUPENABLE,
> omap2_mcspi_ctx[spi_cntrl->bus_num - 1].wakeupenable);
> +
> + list_for_each_entry(cs, &omap2_mcspi_ctx[spi_cntrl->bus_num - 1].cs,
> + node)
> + __raw_writel(cs->chconf0, cs->base + OMAP2_MCSPI_CHCONF0);
> }
> static void omap2_mcspi_disable_clocks(struct omap2_mcspi *mcspi)
> {
> @@ -706,6 +713,9 @@ static int omap2_mcspi_setup(struct spi_device *spi)
> cs->phys = mcspi->phys + spi->chip_select * 0x14;
> cs->chconf0 = 0;
> spi->controller_state = cs;
> + /* Link this to context save list */
> + list_add_tail(&cs->node,
> + &omap2_mcspi_ctx[mcspi->master->bus_num - 1].cs);
> }
>
> if (mcspi_dma->dma_rx_channel == -1
> @@ -728,10 +738,15 @@ static void omap2_mcspi_cleanup(struct spi_device *spi)
> {
> struct omap2_mcspi *mcspi;
> struct omap2_mcspi_dma *mcspi_dma;
> + struct omap2_mcspi_cs *cs;
>
> mcspi = spi_master_get_devdata(spi->master);
> mcspi_dma = &mcspi->dma_channels[spi->chip_select];
>
> + /* Unlink controller state from context save list */
> + cs = spi->controller_state;
> + list_del(&cs->node);
> +
> kfree(spi->controller_state);
>
> if (mcspi_dma->dma_rx_channel != -1) {
> @@ -1093,6 +1108,7 @@ static int __init omap2_mcspi_probe(struct
> platform_device *pdev)
>
> spin_lock_init(&mcspi->lock);
> INIT_LIST_HEAD(&mcspi->msg_queue);
> + INIT_LIST_HEAD(&omap2_mcspi_ctx[master->bus_num - 1].cs);
>
> mcspi->ick = clk_get(&pdev->dev, "ick");
> if (IS_ERR(mcspi->ick)) {
> --
> 1.5.4.3
>
> --
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[PATCH] Clear the SDRC_POWER.PWRENA bit before putting the SDRAM into self-refresh before suspend
Hi, Paul I saw you clear clear the SDRC PWRENA bit during SDRC frequency change but not during suspend. Please review if it is necessary to clear PWRENA bit during suspend. Thanks Janboe Ye rom 287db2e188391be0ac95128131724e0e035e945a Mon Sep 17 00:00:00 2001 From: janboe Date: Tue, 7 Jul 2009 16:30:26 -0500 Subject: [PATCH] Clear the SDRC_POWER.PWRENA bit before putting the SDRAM into self-refresh and then suspend Signed-off-by: janboe --- arch/arm/mach-omap2/sleep34xx.S |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index e5e2553..2bc0c3b 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S @@ -70,6 +70,7 @@ loop: ldr r4, sdrc_power @ read the SDRC_POWER register ldr r5, [r4]@ read the contents of SDRC_POWER orr r5, r5, #0x40 @ enable self refresh on idle req + bic r5, r5, #0x4@ clear PWDENA str r5, [r4]@ write back to SDRC_POWER register cmp r1, #0x0 -- 1.6.3.1 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] [RFC] Potential bug in defining 'irq field' of 'ifmap structure'
David >-Original Message- >From: David Miller [mailto:da...@davemloft.net] >> dev_ifsioc_locked() >> case SIOCGIFMAP: >> ifr->ifr_map.irq = dev->irq; // ?? type mismatch >> >> Here >> ifr->ifr_map.irq) is of type unsigned char >> dev-irq is of type unsigned int >> >> So ifconfig reports a wrong irq number when the dev->irq number is > 255. > >This is a known and unavoidable limitation of this interface. >It's only real use is to control ISA style IRQs which are < 255. On Zoom2 TI OMAP3 based board, the IRQ we are requesting is value=381 and hence the problem reported. We do understand that this would break all user level code. > >> I am confused to see the same typedefs in file: net/if.h >> Not sure how to make changes for the user side net/if.h file? Any idea why net/if.h user level file does not have same definitions as linux/if.h? In other words, what is the origin of net/if.h file? >> >> Signed-off-by: Moiz Sonasath >> Signed-off-by: Vikram Pandita > >You can't make these kinds of changes, every userland binary out there >using this structure would break. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/4] ARM: OMAP4: sDMA: Update the request lines
Hello Syed, This should use the auto-generated data from Benoit. This will avoid mistakes like: On Tue, 7 Jul 2009, rafiuddin.s...@ti.com wrote: > From: Santosh Shilimkar > > This patch updates the platform dma.h with new dma request lines > for OMAP4 peripherals. Also additional hardware register of OMAP4 > sDMA module are included. > > Signed-off-by: Santosh Shilimkar > Signed-off-by: Tony Lindgren > --- > arch/arm/plat-omap/include/mach/dma.h | 88 > + > 1 files changed, 88 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/plat-omap/include/mach/dma.h > b/arch/arm/plat-omap/include/mach/dma.h > index 8c1eae8..01ea54a 100644 > --- a/arch/arm/plat-omap/include/mach/dma.h > +++ b/arch/arm/plat-omap/include/mach/dma.h > @@ -122,6 +122,11 @@ > #define OMAP_DMA4_CCFN(n)(0x60 * (n) + 0xc0) > #define OMAP_DMA4_COLOR(n) (0x60 * (n) + 0xc4) > > +/* Additional registers available on OMAP4 */ > +#define OMAP_DMA4_CDP(n) (0x60 * (n) + 0xd0) > +#define OMAP_DMA4_CNDP(n)(0x60 * (n) + 0xd4) > +#define OMAP_DMA4_CCDN(n)(0x60 * (n) + 0xd8) > + > /* Dummy defines to keep multi-omap compiles happy */ > #define OMAP1_DMA_REVISION 0 > #define OMAP1_DMA_IRQSTATUS_L0 0 > @@ -311,6 +316,89 @@ > #define OMAP34XX_DMA_USIM_TX 79 /* S_DMA_78 */ > #define OMAP34XX_DMA_USIM_RX 80 /* S_DMA_79 */ > > +/* DMA request lines for 44xx */ > +#define OMAP44XX_DMA_DSS_DISPC_REQ 6 /* S_DMA_5 */ > +#define OMAP44XX_DMA_SYS_REQ27 /* S_DMA_6 */ > +#define OMAP44XX_DMA_ISS_REQ19 /* S_DMA_8 */ > +#define OMAP44XX_DMA_ISS_REQ210 /* S_DMA_9 */ > +#define OMAP44XX_DMA_ISS_EQ3 12 /* S_DMA_11 */ ^^ ... this one. Suggest you resend a version that uses that data. > +#define OMAP44XX_DMA_ISS_REQ413 /* S_DMA_12 */ > +#define OMAP44XX_DMA_DSS_RFBI_REQ14 /* S_DMA_13 */ > +#define OMAP44XX_DMA_SPI3_TX015 /* S_DMA_14 */ > +#define OMAP44XX_DMA_SPI3_RX016 /* S_DMA_15 */ > +#define OMAP44XX_DMA_MCBSP2_TX 17 /* S_DMA_16 */ > +#define OMAP44XX_DMA_MCBSP2_RX 18 /* S_DMA_17 */ > +#define OMAP44XX_DMA_MCBSP3_TX 19 /* S_DMA_18 */ > +#define OMAP44XX_DMA_MCBSP3_RX 20 /* S_DMA_19 */ > +#define OMAP44XX_DMA_SPI3_TX123 /* S_DMA_22 */ > +#define OMAP44XX_DMA_SPI3_RX124 /* S_DMA_23 */ > +#define OMAP44XX_DMA_I2C3_TX 25 /* S_DMA_24 */ > +#define OMAP44XX_DMA_I2C3_RX 26 /* S_DMA_25 */ > +#define OMAP44XX_DMA_I2C1_TX 27 /* S_DMA_26 */ > +#define OMAP44XX_DMA_I2C1_RX 28 /* S_DMA_27 */ > +#define OMAP44XX_DMA_I2C2_TX 29 /* S_DMA_28 */ > +#define OMAP44XX_DMA_I2C2_RX 30 /* S_DMA_29 */ > +#define OMAP44XX_DMA_MCBSP4_TX 31 /* S_DMA_30 */ > +#define OMAP44XX_DMA_MCBSP4_RX 32 /* S_DMA_31 */ > +#define OMAP44XX_DMA_MCBSP1_TX 33 /* S_DMA_32 */ > +#define OMAP44XX_DMA_MCBSP1_RX 34 /* S_DMA_33 */ > +#define OMAP44XX_DMA_SPI1_TX035 /* S_DMA_34 */ > +#define OMAP44XX_DMA_SPI1_RX036 /* S_DMA_35 */ > +#define OMAP44XX_DMA_SPI1_TX137 /* S_DMA_36 */ > +#define OMAP44XX_DMA_SPI1_RX138 /* S_DMA_37 */ > +#define OMAP44XX_DMA_SPI1_TX239 /* S_DMA_38 */ > +#define OMAP44XX_DMA_SPI1_RX240 /* S_DMA_39 */ > +#define OMAP44XX_DMA_SPI1_TX341 /* S_DMA_40 */ > +#define OMAP44XX_DMA_SPI1_RX342 /* S_DMA_41 */ > +#define OMAP44XX_DMA_SPI2_TX043 /* S_DMA_42 */ > +#define OMAP44XX_DMA_SPI2_RX044 /* S_DMA_43 */ > +#define OMAP44XX_DMA_SPI2_TX145 /* S_DMA_44 */ > +#define OMAP44XX_DMA_SPI2_RX146 /* S_DMA_45 */ > +#define OMAP44XX_DMA_MMC2_TX 47 /* S_DMA_46 */ > +#define OMAP44XX_DMA_MMC2_RX 48 /* S_DMA_47 */ > +#define OMAP44XX_DMA_UART1_TX49 /* S_DMA_48 */ > +#define OMAP44XX_DMA_UART1_RX50 /* S_DMA_49 */ > +#define OMAP44XX_DMA_UART2_TX51 /* S_DMA_50 */ > +#define OMAP44XX_DMA_UART2_RX52 /* S_DMA_51 */ > +#define OMAP44XX_DMA_UART3_TX53 /* S_DMA_52 */ > +#define OMAP44XX_DMA_UART3_RX54 /* S_DMA_53 */ > +#define OMAP44XX_DMA_UART4_TX55 /* S_DMA_54 */ > +#define OMAP44XX_DMA_UART4_RX56 /* S_DMA_55 */ > +#define OMAP44XX_DMA_MMC4_TX 57 /* S_DMA_56 */ > +#define OMAP44XX_DMA_MMC4_RX 58 /* S_DMA_57 */ > +#define OMAP44XX_DMA_MMC5_TX 59 /
[PATCH 4/4] DSPBRIDGE: Remove unnecessary conditions from some for loops
The status cannot be a failure value at the start of the loops,
and the only changes to a failure state are accompanied by a
break or goto, so these conditions are always true.
Signed-off-by: Phil Carmody
---
drivers/dsp/bridge/pmgr/wcd.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dsp/bridge/pmgr/wcd.c b/drivers/dsp/bridge/pmgr/wcd.c
index 811b2fc..6b2136a 100644
--- a/drivers/dsp/bridge/pmgr/wcd.c
+++ b/drivers/dsp/bridge/pmgr/wcd.c
@@ -904,7 +904,7 @@ u32 PROCWRAP_Load(union Trapped_Args *args)
goto func_cont;
}
- for (i = 0; DSP_SUCCEEDED(status) && (i < count); i++) {
+ for (i = 0; i < count; i++) {
if (argv[i]) {
/* User space pointer to argument */
temp = (char *) argv[i];
@@ -945,7 +945,7 @@ u32 PROCWRAP_Load(union Trapped_Args *args)
envp = NULL;
goto func_cont;
}
- for (i = 0; DSP_SUCCEEDED(status) && envp[i]; i++) {
+ for (i = 0; envp[i]; i++) {
/* User space pointer to argument */
temp = (char *)envp[i];
/* len is increased by 1 to accommodate NULL */
--
1.6.2.4
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[PATCHv2 3/4] DSPBRIDGE: PROCWRAP_Load function cleanup in a complete mess
If you followed some failure paths, it was entirely possible that
you'd attempt to MEM_Free a user-space pointer, because it wouldn't
have been replaced with a kernel-space copy yet.
Signed-off-by: Phil Carmody
Signed-off-by: Ameya Palande
---
drivers/dsp/bridge/pmgr/wcd.c | 110 +++-
1 files changed, 63 insertions(+), 47 deletions(-)
diff --git a/drivers/dsp/bridge/pmgr/wcd.c b/drivers/dsp/bridge/pmgr/wcd.c
index 563a1d8..811b2fc 100644
--- a/drivers/dsp/bridge/pmgr/wcd.c
+++ b/drivers/dsp/bridge/pmgr/wcd.c
@@ -884,99 +884,115 @@ u32 PROCWRAP_Load(union Trapped_Args *args)
{
s32 i, len;
DSP_STATUS status = DSP_SOK;
- char *temp;
- s32 argc = args->ARGS_PROC_LOAD.iArgc;
+ char *temp;
+ s32 count = args->ARGS_PROC_LOAD.iArgc;
u8 **argv, **envp = NULL;
-
DBC_Require(argc > 0);
DBC_Require(argc <= MAX_LOADARGS);
- argv = MEM_Alloc(argc * sizeof(u8 *), MEM_NONPAGED);
- if (argv == NULL)
+ argv = MEM_Alloc(count * sizeof(u8 *), MEM_NONPAGED);
+ if (!argv) {
status = DSP_EMEMORY;
+ goto func_cont;
+ }
- cp_fm_usr(argv, args->ARGS_PROC_LOAD.aArgv, status, argc);
- if (DSP_FAILED(status))
+ cp_fm_usr(argv, args->ARGS_PROC_LOAD.aArgv, status, count);
+ if (DSP_FAILED(status)) {
+ MEM_Free(argv);
+ argv = NULL;
goto func_cont;
+ }
- for (i = 0; DSP_SUCCEEDED(status) && (i < argc); i++) {
- if (argv[i] != NULL) {
-/* User space pointer to argument */
- temp = (char *) argv[i];
+ for (i = 0; DSP_SUCCEEDED(status) && (i < count); i++) {
+ if (argv[i]) {
+ /* User space pointer to argument */
+ temp = (char *) argv[i];
/* len is increased by 1 to accommodate NULL */
len = strlen_user((char *)temp) + 1;
/* Kernel space pointer to argument */
argv[i] = MEM_Alloc(len, MEM_NONPAGED);
- if (argv[i] == NULL) {
+ if (argv[i]) {
+ cp_fm_usr(argv[i], temp, status, len);
+ if (DSP_FAILED(status)) {
+ MEM_Free(argv[i]);
+ argv[i] = NULL;
+ goto func_cont;
+ }
+ } else {
status = DSP_EMEMORY;
- break;
- }
- cp_fm_usr(argv[i], temp, status, len);
- if (DSP_FAILED(status))
goto func_cont;
+ }
}
}
/* TODO: validate this */
- if (args->ARGS_PROC_LOAD.aEnvp != NULL) {
+ if (args->ARGS_PROC_LOAD.aEnvp) {
/* number of elements in the envp array including NULL */
- len = 0;
+ count = 0;
do {
- len++;
- get_user(temp, args->ARGS_PROC_LOAD.aEnvp);
- } while (temp);
- envp = MEM_Alloc(len * sizeof(u8 *), MEM_NONPAGED);
- if (envp == NULL) {
+ get_user(temp, args->ARGS_PROC_LOAD.aEnvp + count);
+ count++;
+ } while (temp);
+ envp = MEM_Alloc(count * sizeof(u8 *), MEM_NONPAGED);
+ if (!envp) {
status = DSP_EMEMORY;
goto func_cont;
}
- cp_fm_usr(envp, args->ARGS_PROC_LOAD.aEnvp, status, len);
- if (DSP_FAILED(status))
+ cp_fm_usr(envp, args->ARGS_PROC_LOAD.aEnvp, status, count);
+ if (DSP_FAILED(status)) {
+ MEM_Free(envp);
+ envp = NULL;
goto func_cont;
- for (i = 0; DSP_SUCCEEDED(status) && (envp[i] != NULL); i++) {
-/* User space pointer to argument */
- temp = (char *)envp[i];
+ }
+ for (i = 0; DSP_SUCCEEDED(status) && envp[i]; i++) {
+ /* User space pointer to argument */
+ temp = (char *)envp[i];
/* len is increased by 1 to accommodate NULL */
len = strlen_user((char *)temp) + 1;
/* Kernel space pointer to argument */
envp[i] = MEM_Alloc(len, MEM_NONPAGED);
- if (envp[i] == NULL) {
+ if (envp[i]) {
+ cp_fm_usr(envp[i], temp, status, len);
+ if (DSP
[PATCHv2 2/4] DSPBRIDGE: Heuristic fixes of strlen/malloc out by one
From: Phil Carmody
I say 'heuristic', as I can't prove they're wrong, they just look
wrong, and for that reason should be given extra close scrutiny.
These are basically just the old malloc-one-more-than-strlen.
Signed-off-by: Phil Carmody
---
drivers/dsp/bridge/pmgr/wcd.c | 11 ++-
1 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/dsp/bridge/pmgr/wcd.c b/drivers/dsp/bridge/pmgr/wcd.c
index aaf3019..563a1d8 100644
--- a/drivers/dsp/bridge/pmgr/wcd.c
+++ b/drivers/dsp/bridge/pmgr/wcd.c
@@ -532,8 +532,9 @@ u32 MGRWRAP_RegisterObject(union Trapped_Args *args)
cp_fm_usr(&pUuid, args->ARGS_MGR_REGISTEROBJECT.pUuid, status, 1);
if (DSP_FAILED(status))
goto func_end;
+ /* pathSize is increased by 1 to accommodate NULL */
pathSize = strlen_user((char *)
- args->ARGS_MGR_REGISTEROBJECT.pszPathName);
+ args->ARGS_MGR_REGISTEROBJECT.pszPathName) + 1;
pszPathName = MEM_Alloc(pathSize, MEM_NONPAGED);
if (!pszPathName)
goto func_end;
@@ -544,7 +545,6 @@ u32 MGRWRAP_RegisterObject(union Trapped_Args *args)
status = DSP_EPOINTER;
goto func_end;
}
- pszPathName[pathSize] = '\0';
GT_1trace(WCD_debugMask, GT_ENTER,
"MGRWRAP_RegisterObject: entered pg2hMsg "
@@ -904,7 +904,8 @@ u32 PROCWRAP_Load(union Trapped_Args *args)
if (argv[i] != NULL) {
/* User space pointer to argument */
temp = (char *) argv[i];
- len = strlen_user((char *)temp);
+ /* len is increased by 1 to accommodate NULL */
+ len = strlen_user((char *)temp) + 1;
/* Kernel space pointer to argument */
argv[i] = MEM_Alloc(len, MEM_NONPAGED);
if (argv[i] == NULL) {
@@ -914,7 +915,6 @@ u32 PROCWRAP_Load(union Trapped_Args *args)
cp_fm_usr(argv[i], temp, status, len);
if (DSP_FAILED(status))
goto func_cont;
-
}
}
/* TODO: validate this */
@@ -937,7 +937,8 @@ u32 PROCWRAP_Load(union Trapped_Args *args)
for (i = 0; DSP_SUCCEEDED(status) && (envp[i] != NULL); i++) {
/* User space pointer to argument */
temp = (char *)envp[i];
- len = strlen_user((char *)temp);
+ /* len is increased by 1 to accommodate NULL */
+ len = strlen_user((char *)temp) + 1;
/* Kernel space pointer to argument */
envp[i] = MEM_Alloc(len, MEM_NONPAGED);
if (envp[i] == NULL) {
--
1.6.2.4
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[PATCH 1/4] DSPBRIDGE: Fix macros that break when inside an if/else
From: Phil Carmody
cp_{to,fm}_usr break if between an if and an else (with no {}).
http://www.faqs.org/faqs/C-faq/abridged/
10.4: What's the best way to write a multi-statement macro?
A:#define Func() do {stmt1; stmt2; ... } while(0) /* (no trailing ;) */
Signed-off-by: Phil Carmody
---
drivers/dsp/bridge/pmgr/wcd.c | 42 ++--
1 files changed, 23 insertions(+), 19 deletions(-)
diff --git a/drivers/dsp/bridge/pmgr/wcd.c b/drivers/dsp/bridge/pmgr/wcd.c
index 86812c6..aaf3019 100644
--- a/drivers/dsp/bridge/pmgr/wcd.c
+++ b/drivers/dsp/bridge/pmgr/wcd.c
@@ -147,25 +147,29 @@
/* Following two macros should ideally have do{}while(0) */
-#define cp_fm_usr(dest, src, status, elements)\
-if (DSP_SUCCEEDED(status)) {\
- if (unlikely(src == NULL) ||\
- unlikely(copy_from_user(dest, src, elements *
sizeof(*(dest) { \
- GT_1trace(WCD_debugMask, GT_7CLASS, \
- "copy_from_user failed, src=0x%x\n", src); \
- status = DSP_EPOINTER ; \
- } \
-}
-
-#define cp_to_usr(dest, src, status, elements)\
-if (DSP_SUCCEEDED(status)) {\
- if (unlikely(dest == NULL) || \
- unlikely(copy_to_user(dest, src, elements * sizeof(*(src) {
\
- GT_1trace(WCD_debugMask, GT_7CLASS, \
- "copy_to_user failed, dest=0x%x\n", dest); \
- status = DSP_EPOINTER ;\
- } \
-}
+#define cp_fm_usr(dest, src, status, elements) \
+do { \
+ if (DSP_SUCCEEDED(status)) {\
+ if (unlikely((src) == NULL) || \
+ unlikely(copy_from_user(dest, src, (elements) *
sizeof(*(dest) { \
+ GT_1trace(WCD_debugMask, GT_7CLASS, \
+ "copy_from_user failed, src=0x%x\n", src);\
+ (status) = DSP_EPOINTER ; \
+ } \
+ } \
+} while (0)
+
+#define cp_to_usr(dest, src, status, elements) \
+do { \
+ if (DSP_SUCCEEDED(status)) {\
+ if (unlikely((dest) == NULL) || \
+ unlikely(copy_to_user(dest, src, (elements) * sizeof(*(src)
{ \
+ GT_1trace(WCD_debugMask, GT_7CLASS, \
+ "copy_to_user failed, dest=0x%x\n", dest);\
+ (status) = DSP_EPOINTER ; \
+ } \
+ } \
+} while (0)
/* Device IOCtl function pointer */
struct WCD_Cmd {
--
1.6.2.4
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RE: DSS2 Video Overlay Scaling Patch
Ugh, messed up morning, forgot the patch as well :( -Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Fischer Steven-P27614 Sent: Tuesday, July 07, 2009 8:05 AM To: linux-omap@vger.kernel.org Subject: RE: DSS2 Video Overlay Scaling Patch Sorry, missed the subject line. -Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Fischer Steven-P27614 Sent: Tuesday, July 07, 2009 7:54 AM To: linux-omap@vger.kernel.org Subject: All, The DSS2 code base seems to inadvertently prevent downscaling of video overlay frames. Attached is my attempt at a patch to resolve this issue. As I gather from the code, there is an attempt to limit the overlay output frame size (x, y, outw, outh) to the managers updated window (mc->x, mc->y, mc->w, mc->h). The problem is that the input frame size (w & h) is being used to instead of the output frame size (outw, outh). Due to this, when the input frame size is large than the output frame size, the input frame is being cropped, thus no downscaling occurs. My patch corrects this issue and also attempts to properly scale the input frame size if indeed the output frame is cropped. In my particular case, the output frame size is never cropped, so I have not explicitly tested these equations, but I believe they are mathematically correct. With this patch overlay downscaling is functional. Steve. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html 0001-Proper-Scaling-Fix.patch Description: 0001-Proper-Scaling-Fix.patch
RE: DSS2 Video Overlay Scaling Patch
Sorry, missed the subject line. -Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Fischer Steven-P27614 Sent: Tuesday, July 07, 2009 7:54 AM To: linux-omap@vger.kernel.org Subject: All, The DSS2 code base seems to inadvertently prevent downscaling of video overlay frames. Attached is my attempt at a patch to resolve this issue. As I gather from the code, there is an attempt to limit the overlay output frame size (x, y, outw, outh) to the managers updated window (mc->x, mc->y, mc->w, mc->h). The problem is that the input frame size (w & h) is being used to instead of the output frame size (outw, outh). Due to this, when the input frame size is large than the output frame size, the input frame is being cropped, thus no downscaling occurs. My patch corrects this issue and also attempts to properly scale the input frame size if indeed the output frame is cropped. In my particular case, the output frame size is never cropped, so I have not explicitly tested these equations, but I believe they are mathematically correct. With this patch overlay downscaling is functional. Steve. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[no subject]
All, The DSS2 code base seems to inadvertently prevent downscaling of video overlay frames. Attached is my attempt at a patch to resolve this issue. As I gather from the code, there is an attempt to limit the overlay output frame size (x, y, outw, outh) to the managers updated window (mc->x, mc->y, mc->w, mc->h). The problem is that the input frame size (w & h) is being used to instead of the output frame size (outw, outh). Due to this, when the input frame size is large than the output frame size, the input frame is being cropped, thus no downscaling occurs. My patch corrects this issue and also attempts to properly scale the input frame size if indeed the output frame is cropped. In my particular case, the output frame size is never cropped, so I have not explicitly tested these equations, but I believe they are mathematically correct. With this patch overlay downscaling is functional. Steve. 0001-Proper-Scaling-Fix.patch Description: 0001-Proper-Scaling-Fix.patch
Re: [PATCH v2] OMAP3: RX51: Define TWL4030 USB transceiver in board file
On Tue, Jul 07, 2009 at 01:15:22PM +0200, Quadros Roger (EXT-Teleca/Helsinki)
wrote:
> Add OTG transceiver to RX51 platform data to prevent kernel NULL pointer
> dereference during MUSB initialisation.
>
> Signed-off-by: Roger Quadros
Signed-off-by: Felipe Balbi
> ---
> arch/arm/mach-omap2/board-rx51-peripherals.c |5 +
> 1 files changed, 5 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c
> b/arch/arm/mach-omap2/board-rx51-peripherals.c
> index 9a0bf67..56d931a 100644
> --- a/arch/arm/mach-omap2/board-rx51-peripherals.c
> +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
> @@ -278,6 +278,10 @@ static struct twl4030_gpio_platform_data rx51_gpio_data
> = {
> .setup = rx51_twlgpio_setup,
> };
>
> +static struct twl4030_usb_data rx51_usb_data = {
> + .usb_mode = T2_USB_MODE_ULPI,
> +};
> +
> static struct twl4030_platform_data rx51_twldata = {
> .irq_base = TWL4030_IRQ_BASE,
> .irq_end= TWL4030_IRQ_END,
> @@ -286,6 +290,7 @@ static struct twl4030_platform_data rx51_twldata = {
> .gpio = &rx51_gpio_data,
> .keypad = &rx51_kp_data,
> .madc = &rx51_madc_data,
> + .usb= &rx51_usb_data,
>
> .vaux1 = &rx51_vaux1,
> .vaux2 = &rx51_vaux2,
> --
> 1.6.0.4
--
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[PATCH v2] OMAP3: RX51: Define TWL4030 USB transceiver in board file
Add OTG transceiver to RX51 platform data to prevent kernel NULL pointer
dereference during MUSB initialisation.
Signed-off-by: Roger Quadros
---
arch/arm/mach-omap2/board-rx51-peripherals.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c
b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 9a0bf67..56d931a 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -278,6 +278,10 @@ static struct twl4030_gpio_platform_data rx51_gpio_data = {
.setup = rx51_twlgpio_setup,
};
+static struct twl4030_usb_data rx51_usb_data = {
+ .usb_mode = T2_USB_MODE_ULPI,
+};
+
static struct twl4030_platform_data rx51_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end= TWL4030_IRQ_END,
@@ -286,6 +290,7 @@ static struct twl4030_platform_data rx51_twldata = {
.gpio = &rx51_gpio_data,
.keypad = &rx51_kp_data,
.madc = &rx51_madc_data,
+ .usb= &rx51_usb_data,
.vaux1 = &rx51_vaux1,
.vaux2 = &rx51_vaux2,
--
1.6.0.4
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MMC host controller driver query
Hi, I am trying to make my SDIO wifi card work on beagleboard. When the driver tries to read or write SDIO function register , it is generally 1 or 4 byte read/write. And buffer used is mostly on stack. So, the kernel crashes while doing dma_map_sg on that buffer. Using kmalloc ed buffer in SDIO read/write avoids this problem. I am using 2.6.28-omap1. Will upgrading to recent kernel allow the buffer on stack to be used in SDIO read/write functions.? sdio_readl/sdio_writel uses its own DMA ble buffer. But for some reasons I want to avoid it. I noticed some commits related to scatter-gather emulation. Is it related to the problem? thanks in advance. Regards, Kalpesh -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 4/4] ARM: OMAP4: GPIO Support on OMAP4
From: Syed Rafiuddin
This patch adds GPIO support on OMAP4430 platform and adds
OMAP4 register defnitions.
Signed-off-by: Syed Rafiuddin
---
arch/arm/plat-omap/gpio.c | 228 -
1 files changed, 183 insertions(+), 45 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 7fd89ba..3dc2fd3 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -138,6 +138,32 @@
#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090
#define OMAP24XX_GPIO_SETDATAOUT 0x0094
+#define OMAP4_GPIO_REVISION0x
+#define OMAP4_GPIO_SYSCONFIG 0x0010
+#define OMAP4_GPIO_EOI 0x0020
+#define OMAP4_GPIO_IRQSTATUSRAW0 0x0024
+#define OMAP4_GPIO_IRQSTATUSRAW1 0x0028
+#define OMAP4_GPIO_IRQSTATUS0 0x002c
+#define OMAP4_GPIO_IRQSTATUS1 0x0030
+#define OMAP4_GPIO_IRQSTATUSSET0 0x0034
+#define OMAP4_GPIO_IRQSTATUSSET1 0x0038
+#define OMAP4_GPIO_IRQSTATUSCLR0 0x003c
+#define OMAP4_GPIO_IRQSTATUSCLR1 0x0040
+#define OMAP4_GPIO_IRQWAKEN0 0x0044
+#define OMAP4_GPIO_IRQWAKEN1 0x0048
+#define OMAP4_GPIO_SYSSTATUS 0x0104
+#define OMAP4_GPIO_CTRL0x0130
+#define OMAP4_GPIO_OE 0x0134
+#define OMAP4_GPIO_DATAIN 0x0138
+#define OMAP4_GPIO_DATAOUT 0x013c
+#define OMAP4_GPIO_LEVELDETECT00x0140
+#define OMAP4_GPIO_LEVELDETECT10x0144
+#define OMAP4_GPIO_RISINGDETECT0x0148
+#define OMAP4_GPIO_FALLINGDETECT 0x014c
+#define OMAP4_GPIO_DEBOUNCENABLE 0x0150
+#define OMAP4_GPIO_DEBOUNCINGTIME 0x0154
+#define OMAP4_GPIO_CLEARDATAOUT0x0190
+#define OMAP4_GPIO_SETDATAOUT 0x0194
/*
* omap34xx specific GPIO registers
*/
@@ -386,12 +412,16 @@ static void _set_gpio_direction(struct gpio_bank *bank,
int gpio, int is_input)
reg += OMAP850_GPIO_DIR_CONTROL;
break;
#endif
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
- defined(CONFIG_ARCH_OMAP4)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_OE;
break;
#endif
+#if defined(CONFIG_ARCH_OMAP4)
+ case METHOD_GPIO_24XX:
+ reg += OMAP4_GPIO_OE;
+ break;
+#endif
default:
WARN_ON(1);
return;
@@ -459,8 +489,7 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int
gpio, int enable)
l &= ~(1 << gpio);
break;
#endif
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
- defined(CONFIG_ARCH_OMAP4)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
case METHOD_GPIO_24XX:
if (enable)
reg += OMAP24XX_GPIO_SETDATAOUT;
@@ -469,6 +498,15 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int
gpio, int enable)
l = 1 << gpio;
break;
#endif
+#ifdef CONFIG_ARCH_OMAP4
+ case METHOD_GPIO_24XX:
+ if (enable)
+ reg += OMAP4_GPIO_SETDATAOUT;
+ else
+ reg += OMAP4_GPIO_CLEARDATAOUT;
+ l = 1 << gpio;
+ break;
+#endif
default:
WARN_ON(1);
return;
@@ -511,12 +549,16 @@ static int __omap_get_gpio_datain(int gpio)
reg += OMAP850_GPIO_DATA_INPUT;
break;
#endif
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
- defined(CONFIG_ARCH_OMAP4)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_DATAIN;
break;
#endif
+#ifdef CONFIG_ARCH_OMAP4
+ case METHOD_GPIO_24XX:
+ reg += OMAP4_GPIO_DATAIN;
+ break;
+#endif
default:
return -EINVAL;
}
@@ -593,23 +635,46 @@ static inline void set_24xx_gpio_triggering(struct
gpio_bank *bank, int gpio,
{
void __iomem *base = bank->base;
u32 gpio_bit = 1 << gpio;
+ u32 val;
- MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
- trigger & IRQ_TYPE_LEVEL_LOW);
- MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
- trigger & IRQ_TYPE_LEVEL_HIGH);
- MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
- trigger & IRQ_TYPE_EDGE_RISING);
- MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
- trigger & IRQ_TYPE_EDGE_FALLING);
-
+ if (cpu_is_omap44xx()) {
+ MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit,
+ trigger & IRQ_TYPE_LEVEL_LOW);
+ MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT1, gpio_
[PATCH 3/4] ARM: OMAP4: UART4 Support on OMAP4
From: Syed Rafiuddin
This patch adds UART4 support on OMAP4430 development platform.
Signed-off-by: Syed Rafiuddin
---
arch/arm/mach-omap2/board-4430sdp.c |2 +-
arch/arm/mach-omap2/serial.c| 10 ++
2 files changed, 11 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index 57e477b..7e1e721 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -39,7 +39,7 @@ static struct platform_device *sdp4430_devices[] __initdata =
{
};
static struct omap_uart_config sdp4430_uart_config __initdata = {
- .enabled_uarts = (1 << 0) | (1 << 1) | (1 << 2),
+ .enabled_uarts = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3),
};
static struct omap_lcd_config sdp4430_lcd_config __initdata = {
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index b094c15..c0bea75 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -97,6 +97,16 @@ static struct plat_serial8250_port serial_platform_data[] = {
.regshift = 2,
.uartclk= OMAP24XX_BASE_BAUD * 16,
}, {
+#ifdef CONFIG_ARCH_OMAP4
+ .membase= IO_ADDRESS(OMAP_UART4_BASE),
+ .mapbase= OMAP_UART4_BASE,
+ .irq= 70,
+ .flags = UPF_BOOT_AUTOCONF,
+ .iotype = UPIO_MEM,
+ .regshift = 2,
+ .uartclk= OMAP24XX_BASE_BAUD * 16,
+ }, {
+#endif
.flags = 0
}
};
--
1.5.4.7
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[PATCH 2/4] ARM: OMAP4: McBSP Support om OMAP4430
From: Syed Rafiuddin
This patch adds McBSP support on OMAP4430 development platform. This patch
includes corresponding base address changes for OMAP4.
Signed-off-by: Syed Rafiuddin
---
arch/arm/mach-omap2/mcbsp.c | 41 +++
arch/arm/plat-omap/include/mach/mcbsp.h |8 +-
2 files changed, 48 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index a5c0f04..d49dfb5 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -169,6 +169,42 @@ static struct omap_mcbsp_platform_data
omap34xx_mcbsp_pdata[] = {
#define OMAP34XX_MCBSP_PDATA_SZ0
#endif
+static struct omap_mcbsp_platform_data omap44xx_mcbsp_pdata[] = {
+ {
+ .phys_base = OMAP44XX_MCBSP1_BASE,
+ .dma_rx_sync= OMAP44XX_DMA_MCBSP1_RX,
+ .dma_tx_sync= OMAP44XX_DMA_MCBSP1_TX,
+ .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
+ .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
+ .ops= &omap2_mcbsp_ops,
+ },
+ {
+ .phys_base = OMAP44XX_MCBSP2_BASE,
+ .dma_rx_sync= OMAP44XX_DMA_MCBSP2_RX,
+ .dma_tx_sync= OMAP44XX_DMA_MCBSP2_TX,
+ .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
+ .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
+ .ops= &omap2_mcbsp_ops,
+ },
+ {
+ .phys_base = OMAP44XX_MCBSP3_BASE,
+ .dma_rx_sync= OMAP44XX_DMA_MCBSP3_RX,
+ .dma_tx_sync= OMAP44XX_DMA_MCBSP3_TX,
+ .rx_irq = INT_24XX_MCBSP3_IRQ_RX,
+ .tx_irq = INT_24XX_MCBSP3_IRQ_TX,
+ .ops= &omap2_mcbsp_ops,
+ },
+ {
+ .phys_base = OMAP44XX_MCBSP4_BASE,
+ .dma_rx_sync= OMAP44XX_DMA_MCBSP4_RX,
+ .dma_tx_sync= OMAP44XX_DMA_MCBSP4_TX,
+ .rx_irq = INT_24XX_MCBSP4_IRQ_RX,
+ .tx_irq = INT_24XX_MCBSP4_IRQ_TX,
+ .ops= &omap2_mcbsp_ops,
+ },
+};
+#define OMAP44XX_MCBSP_PDATA_SZARRAY_SIZE(omap44xx_mcbsp_pdata)
+
static int __init omap2_mcbsp_init(void)
{
if (cpu_is_omap2420())
@@ -177,6 +213,8 @@ static int __init omap2_mcbsp_init(void)
omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ;
if (cpu_is_omap34xx())
omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ;
+ if (cpu_is_omap44xx())
+ omap_mcbsp_count = OMAP44XX_MCBSP_PDATA_SZ;
mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
GFP_KERNEL);
@@ -192,6 +230,9 @@ static int __init omap2_mcbsp_init(void)
if (cpu_is_omap34xx())
omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata,
OMAP34XX_MCBSP_PDATA_SZ);
+ if (cpu_is_omap44xx())
+ omap_mcbsp_register_board_cfg(omap44xx_mcbsp_pdata,
+ OMAP44XX_MCBSP_PDATA_SZ);
return omap_mcbsp_init();
}
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h
b/arch/arm/plat-omap/include/mach/mcbsp.h
index bb154ea..313c31c 100644
--- a/arch/arm/plat-omap/include/mach/mcbsp.h
+++ b/arch/arm/plat-omap/include/mach/mcbsp.h
@@ -53,6 +53,11 @@
#define OMAP34XX_MCBSP4_BASE 0x49026000
#define OMAP34XX_MCBSP5_BASE 0x48096000
+#define OMAP44XX_MCBSP1_BASE 0x49022000
+#define OMAP44XX_MCBSP2_BASE 0x49024000
+#define OMAP44XX_MCBSP3_BASE 0x49026000
+#define OMAP44XX_MCBSP4_BASE 0x48096000
+
#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) ||
defined(CONFIG_ARCH_OMAP730)
#define OMAP_MCBSP_REG_DRR20x00
@@ -98,7 +103,8 @@
#define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX
#define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX
-#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP4)
#define OMAP_MCBSP_REG_DRR20x00
#define OMAP_MCBSP_REG_DRR10x04
--
1.5.4.7
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[PATCH 1/4] ARM: OMAP4: sDMA: Update the request lines
From: Santosh Shilimkar This patch updates the platform dma.h with new dma request lines for OMAP4 peripherals. Also additional hardware register of OMAP4 sDMA module are included. Signed-off-by: Santosh Shilimkar Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/mach/dma.h | 88 + 1 files changed, 88 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-omap/include/mach/dma.h b/arch/arm/plat-omap/include/mach/dma.h index 8c1eae8..01ea54a 100644 --- a/arch/arm/plat-omap/include/mach/dma.h +++ b/arch/arm/plat-omap/include/mach/dma.h @@ -122,6 +122,11 @@ #define OMAP_DMA4_CCFN(n) (0x60 * (n) + 0xc0) #define OMAP_DMA4_COLOR(n) (0x60 * (n) + 0xc4) +/* Additional registers available on OMAP4 */ +#define OMAP_DMA4_CDP(n) (0x60 * (n) + 0xd0) +#define OMAP_DMA4_CNDP(n) (0x60 * (n) + 0xd4) +#define OMAP_DMA4_CCDN(n) (0x60 * (n) + 0xd8) + /* Dummy defines to keep multi-omap compiles happy */ #define OMAP1_DMA_REVISION 0 #define OMAP1_DMA_IRQSTATUS_L0 0 @@ -311,6 +316,89 @@ #define OMAP34XX_DMA_USIM_TX 79 /* S_DMA_78 */ #define OMAP34XX_DMA_USIM_RX 80 /* S_DMA_79 */ +/* DMA request lines for 44xx */ +#define OMAP44XX_DMA_DSS_DISPC_REQ 6 /* S_DMA_5 */ +#define OMAP44XX_DMA_SYS_REQ2 7 /* S_DMA_6 */ +#define OMAP44XX_DMA_ISS_REQ1 9 /* S_DMA_8 */ +#define OMAP44XX_DMA_ISS_REQ2 10 /* S_DMA_9 */ +#define OMAP44XX_DMA_ISS_EQ3 12 /* S_DMA_11 */ +#define OMAP44XX_DMA_ISS_REQ4 13 /* S_DMA_12 */ +#define OMAP44XX_DMA_DSS_RFBI_REQ 14 /* S_DMA_13 */ +#define OMAP44XX_DMA_SPI3_TX0 15 /* S_DMA_14 */ +#define OMAP44XX_DMA_SPI3_RX0 16 /* S_DMA_15 */ +#define OMAP44XX_DMA_MCBSP2_TX 17 /* S_DMA_16 */ +#define OMAP44XX_DMA_MCBSP2_RX 18 /* S_DMA_17 */ +#define OMAP44XX_DMA_MCBSP3_TX 19 /* S_DMA_18 */ +#define OMAP44XX_DMA_MCBSP3_RX 20 /* S_DMA_19 */ +#define OMAP44XX_DMA_SPI3_TX1 23 /* S_DMA_22 */ +#define OMAP44XX_DMA_SPI3_RX1 24 /* S_DMA_23 */ +#define OMAP44XX_DMA_I2C3_TX 25 /* S_DMA_24 */ +#define OMAP44XX_DMA_I2C3_RX 26 /* S_DMA_25 */ +#define OMAP44XX_DMA_I2C1_TX 27 /* S_DMA_26 */ +#define OMAP44XX_DMA_I2C1_RX 28 /* S_DMA_27 */ +#define OMAP44XX_DMA_I2C2_TX 29 /* S_DMA_28 */ +#define OMAP44XX_DMA_I2C2_RX 30 /* S_DMA_29 */ +#define OMAP44XX_DMA_MCBSP4_TX 31 /* S_DMA_30 */ +#define OMAP44XX_DMA_MCBSP4_RX 32 /* S_DMA_31 */ +#define OMAP44XX_DMA_MCBSP1_TX 33 /* S_DMA_32 */ +#define OMAP44XX_DMA_MCBSP1_RX 34 /* S_DMA_33 */ +#define OMAP44XX_DMA_SPI1_TX0 35 /* S_DMA_34 */ +#define OMAP44XX_DMA_SPI1_RX0 36 /* S_DMA_35 */ +#define OMAP44XX_DMA_SPI1_TX1 37 /* S_DMA_36 */ +#define OMAP44XX_DMA_SPI1_RX1 38 /* S_DMA_37 */ +#define OMAP44XX_DMA_SPI1_TX2 39 /* S_DMA_38 */ +#define OMAP44XX_DMA_SPI1_RX2 40 /* S_DMA_39 */ +#define OMAP44XX_DMA_SPI1_TX3 41 /* S_DMA_40 */ +#define OMAP44XX_DMA_SPI1_RX3 42 /* S_DMA_41 */ +#define OMAP44XX_DMA_SPI2_TX0 43 /* S_DMA_42 */ +#define OMAP44XX_DMA_SPI2_RX0 44 /* S_DMA_43 */ +#define OMAP44XX_DMA_SPI2_TX1 45 /* S_DMA_44 */ +#define OMAP44XX_DMA_SPI2_RX1 46 /* S_DMA_45 */ +#define OMAP44XX_DMA_MMC2_TX 47 /* S_DMA_46 */ +#define OMAP44XX_DMA_MMC2_RX 48 /* S_DMA_47 */ +#define OMAP44XX_DMA_UART1_TX 49 /* S_DMA_48 */ +#define OMAP44XX_DMA_UART1_RX 50 /* S_DMA_49 */ +#define OMAP44XX_DMA_UART2_TX 51 /* S_DMA_50 */ +#define OMAP44XX_DMA_UART2_RX 52 /* S_DMA_51 */ +#define OMAP44XX_DMA_UART3_TX 53 /* S_DMA_52 */ +#define OMAP44XX_DMA_UART3_RX 54 /* S_DMA_53 */ +#define OMAP44XX_DMA_UART4_TX 55 /* S_DMA_54 */ +#define OMAP44XX_DMA_UART4_RX 56 /* S_DMA_55 */ +#define OMAP44XX_DMA_MMC4_TX 57 /* S_DMA_56 */ +#define OMAP44XX_DMA_MMC4_RX 58 /* S_DMA_57 */ +#define OMAP44XX_DMA_MMC5_TX 59 /* S_DMA_58 */ +#define OMAP44XX_DMA_MMC5_RX 60 /* S_DMA_59 */ +#define OMAP44XX_DMA_MMC1_TX 61 /* S_DMA_60 */ +#define OMAP44XX_DMA_MMC1_RX 62 /* S_DMA_61 */ +#define OMAP44XX_DMA_SYS_REQ3 64 /* S_DMA_63 */ +#define OMAP44XX_DMA_MCPDM_UP 65 /* S_DMA_64 */ +#define OMAP44XX_DMA_MCPDM_DL 66 /* S_DMA_65 */ +#define OMAP44XX_DMA_SPI4_TX0 70 /* S_DMA_69 */ +#define OMAP44XX_DMA_SPI4_RX0 71 /* S_DMA_70 */ +#define OMAP44XX_DMA_DSS_DSI1_REQ0 72 /* S_DMA_71 *
