Re: [PATCH 1/4] MFD: twl4030: add twl4030_codec MFD as a new child to the core
On Thursday 22 October 2009 02:13:11 ext Samuel Ortiz wrote:
As Mark noticed already, you dont really want users to explicitely select
this obscure mfd driver to get their audio and vibre driver selectable. It
should be the other way around, and I think you already agreed with that.
Yes, I have already made the modification.
+static struct device *
+twl4030_codec_new_child(const char *name, void *pdata, unsigned
pdata_len) +{
...
This could really use the mfd-core API, and avoid duplicating code.
You just would have to define a couple cells, and call mfd_add_devices on
them.
Good point. When I wrote this driver I have been looking at the twl4030-core
driver, which is not using the mfd-core API. I'll make the change.
+static int __devexit twl4030_codec_remove(struct platform_device *pdev)
+{
+ struct twl4030_codec *codec = platform_get_drvdata(pdev);
+
+ platform_set_drvdata(pdev, NULL);
+ kfree(codec);
+ twl4030_codec_dev = NULL;
+
+ return 0;
+}
I think you're missing a platform_device_unregister() here (or an
mfd_remove_devices() if you're going to switch to the mfd-core API)
You are right, although I have used the bool in the Kconfig for the twl4030-
codec in a same way as the twl4030-core (and the core did not unregister the
devices either), but yes, this is not correct so I'll fix it.
I have now question about the practicalities on how this series would be taken,
and via which tree.
The final patch for the soc codec driver depends on the change in MFD and in
the
OMAP board files.
The change in the OMAP board files depends on the MFD changes, obviously.
So in order to have the soc codec changes the MFD and OMAP part has to be
applied before, otherwise the audio will be broken.
the mfd-2.6:for-next branch has some patches against the twl4030-core in
addition to the ones in l-o and in sound-2.6:topic/asoc.
I'll check, if the MFD patch applies to mfd-2.6:for-next also, but to have the
soc codec changes the MFD patch should go to the sound-2.6 tree as well to make
sure it is not braking things.
All-in-all, how these things can be handled?
Thanks,
Péter
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RE: [PATCH V2] OMAP3:PM:Fix for Silicon bug on Context restore on OMAP3430
-Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Kevin Hilman Sent: Wednesday, October 21, 2009 7:21 PM To: Gulati, Shweta Cc: linux-omap@vger.kernel.org Subject: Re: [PATCH V2] OMAP3:PM:Fix for Silicon bug on Context restore on OMAP3430 Gulati, Shweta shweta.gul...@ti.com writes: Any comments would be taken in. Sorry, I did not see this v2 on the list nor do I find it in the archives. -Original Message- From: Gulati, Shweta Sent: Tuesday, October 13, 2009 3:56 PM To: linux-omap@vger.kernel.org Cc: Gulati, Shweta; Gopinath, Thara Subject: [PATCH V2] OMAP3:PM:Fix for Silicon bug on Context restore on OMAP3430 From: Shweta Gulati shweta.gul...@ti.com (Resending the patch with the subject line and some minor fixes) According to Silicon Bug on context restore it is found that the pad configuration register for GPIO_28/GPIO_29(ETKD14/15) is corrupted after returning from Core OFF mode. This happens if the MPU reads the PADCONF_SAVEDONE bit very close to the end of context save sequence for the pad conf registers, resulting in last context not being saved to the scratchpad memory. This is a h/w bug. The workaround is to delay the MPU access of SAVEDONE bit until the last context has been saved. This patch adds a configuration option to allow 300 us delay in save path as recommended by TI. The other option is to let the bug occur but store the value of pad configuration register explicitly and write it back in resume path. But this option should be chosen only if the ETKD14/15 pads are not in use as this workaround can lead to glitch in the pin. Signed-off-by: Shweta Gulati shweta.gul...@ti.com Signed-off-by: Thara Gopinathth...@ti.com Is this patch still needed with this fix recently postd by Nokia: http://marc.info/?l=linux-omapm=125569123004013w=2 This patch is still needed. The problem is with accessing SAVEDONE bit while the save is happening. Also, this description is still missing the Errata reference. After reading the errata, I don't think a Kconfig option is the right answer. Rather, the delay should be inserted iff the pin is enabled, set as output, and set to high. Why should this affect only if the pin is output and set to high? The problem is the padconf values for this pin will not be saved and any junk can be restored back irrespective of what state the pin was configured to be in. There is no errata released for this yet. 300 us was found by the Silicon team to be a safe value and was recommended to be used. This will probably be formally relased as an errata in a while. Also 300 us might get optimized. But this is the available fix today as per h/w recommendations. We can probably put a comment as per errata xyz where xyz can be populated later. Also, the errata makes no mention of the 300usec delay. Please describe how that number was decided on. Re: Subject, would be better as OMAP3: PM: PADCONF restore fix for Errata x.xxx --- arch/arm/mach-omap2/pm34xx.c | 25 + arch/arm/plat-omap/Kconfig | 17 + 2 files changed, 42 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index cea3bca..4f9671a 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -26,6 +26,7 @@ #include linux/err.h #include linux/gpio.h #include linux/clk.h +#include linux/delay.h #include mach/sram.h #include mach/prcm.h @@ -54,10 +55,19 @@ static int regset_save_on_suspend; +/* A extra variable to store value of pad_config register if + * delay is not to be inserted and value is explicitly restored + * in resume path. + */ +#ifndef CONFIG_DELAY_IN_PADCONF_SAVE +static u32 store_pad_config; +#endif + /* Scratchpad offsets */ #define OMAP343X_TABLE_ADDRESS_OFFSET 0x31 #define OMAP343X_TABLE_VALUE_OFFSET 0x30 #define OMAP343X_CONTROL_REG_VALUE_OFFSET 0x32 +#define CONTROL_PADCONF_ETK_D140x480025F8 u32 enable_off_mode; u32 sleep_while_idle; @@ -202,6 +212,17 @@ static void omap3_core_save_context(void) omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_OFF); control_padconf_off |= START_PADCONF_SAVE; omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF); +#ifndef CONFIG_DELAY_IN_PADCONF_SAVE + store_pad_config = omap_readl(CONTROL_PADCONF_ETK_D14); omap_read* deprecated. Use omap_ctrl_readl(offset) as is done in the rest of the code. +#else + /* Due to Silicon Bug on context restore it is found +* that the CONTROL_PAD_CONF_ETK14 register is not saved into +* scratch pad memory sometimes. To rectify it delay acess by Mpu +* for 300us for scm to finish saving task +*/ + udelay(300); +#endif + /* wait for the save to complete */ while (!omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS)
Re: [PATCH V2] OMAP3:PM:Fix for Silicon bug on Context restore on OMAP3430
Gopinath, Thara had written, on 10/22/2009 01:49 AM, the following:
-Original Message-
From: linux-omap-ow...@vger.kernel.org
[mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Kevin
Hilman
Sent: Wednesday, October 21, 2009 7:21 PM
Is this patch still needed with this fix recently postd by Nokia:
[...]
http://marc.info/?l=linux-omapm=125569123004013w=2
This patch is still needed. The problem is with accessing SAVEDONE bit while
the save is happening.
Also, this description is still missing the Errata reference. After
reading the errata, I don't think a Kconfig option is the right
answer. Rather, the delay should be inserted iff the pin is enabled,
set as output, and set to high.
Why should this affect only if the pin is output and set to high? The problem
is the padconf values for this pin will not be saved and any junk can be
restored back irrespective of what state the pin was configured to be in.
Why do we care to enable this if the pin is unused and not connected in
any way? Is there an added consumption even if the pin is NCed?
There is no errata released for this yet. 300 us was found by the Silicon team
to be a safe value and was recommended to be used. This will probably be
formally relased as an errata in a while. Also 300 us might get optimized. But
this is the available fix today as per h/w recommendations. We can probably put
a comment as per errata xyz where xyz can be populated later.
Yes, a comment to that effect will be informative.
[...]
Re: Subject, would be better as
Ack.
OMAP3: PM: PADCONF restore fix for Errata x.xxx
--- arch/arm/mach-omap2/pm34xx.c | 25 +
arch/arm/plat-omap/Kconfig | 17 + 2 files changed,
42 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index cea3bca..4f9671a 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -26,6 +26,7 @@
#include linux/err.h
#include linux/gpio.h
#include linux/clk.h
+#include linux/delay.h
#include mach/sram.h
#include mach/prcm.h
@@ -54,10 +55,19 @@
static int regset_save_on_suspend;
+/* A extra variable to store value of pad_config register if
+ * delay is not to be inserted and value is explicitly restored
+ * in resume path.
+ */
+#ifndef CONFIG_DELAY_IN_PADCONF_SAVE
+static u32 store_pad_config;
+#endif
+
could we use the FEATURE() infrastructure for this? I mean if we
introduce an API set_feature() - I just wanted to probe a possible
alternative here. and use the has_feature()?? I guess it might be a
misuse of the initial intention of FEATURE.. just wanted to think a
little wild here..
/* Scratchpad offsets */
#define OMAP343X_TABLE_ADDRESS_OFFSET 0x31
#define OMAP343X_TABLE_VALUE_OFFSET 0x30
#define OMAP343X_CONTROL_REG_VALUE_OFFSET 0x32
+#define CONTROL_PADCONF_ETK_D140x480025F8
Aieee... hardcoded value please avoid and use
arch/arm/plat-omap/include/plat/control.h
u32 enable_off_mode;
u32 sleep_while_idle;
@@ -202,6 +212,17 @@ static void omap3_core_save_context(void)
omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_OFF);
control_padconf_off |= START_PADCONF_SAVE;
omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF);
+#ifndef CONFIG_DELAY_IN_PADCONF_SAVE
+ store_pad_config = omap_readl(CONTROL_PADCONF_ETK_D14);
^^
omap_ctrl_readl??
omap_read* deprecated. Use omap_ctrl_readl(offset) as is done in
the rest of the code.
unreadable patch :( git send-email might help?
+#else
+ /* Due to Silicon Bug on context restore it is found
+* that the CONTROL_PAD_CONF_ETK14 register is not saved into
+* scratch pad memory sometimes. To rectify it delay acess by Mpu
^^^
I am perhaps a lil nitpicky - access MPU
+* for 300us for scm to finish saving task
^^^
SCM
+*/
+ udelay(300);
+#endif
+
/* wait for the save to complete */
while (!omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS)
PADCONF_SAVE_DONE)
@@ -217,6 +238,10 @@ static void omap3_core_save_context(void)
static void omap3_core_restore_context(void)
{
+ /* Restore the last padconf value if needed */
+#ifndef CONFIG_DELAY_IN_PADCONF_SAVE
+ omap_writel(store_pad_config, CONTROL_PADCONF_ETK_D14);
^^^
omap_ctrl_writel?
--
Regards,
Nishanth Menon
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Re: [PATCH V2] OMAP3:PM:Fix for Silicon bug on Context restore on OMAP3430
Gopinath, Thara had written, on 10/22/2009 01:49 AM, the following: +config DELAY_IN_PADCONF_SAVE + bool Insert 300 us delay after the start of padconf saving + depends on ARCH_OMAP3 PM + help Apologies, one last tiny little comment :).. does this impact ALL OMAP3 variants such as 35xx,36xx as well as 34xx?? -- Regards, Nishanth Menon -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
omap eac.c file
Hi, I'm trying to figure out where are omap2420 eac codec code. In 2.6.25 there was for N800 written in sound/arm/eac.c but in latest tree there is no such file. I'm trying to get some clue because I would like to write similar for omap850. Thanks, Marek -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/4] MFD: twl4030: add twl4030_codec MFD as a new child to the core
On Thu, Oct 22, 2009 at 09:04:32AM +0300, Peter Ujfalusi wrote: I'll check, if the MFD patch applies to mfd-2.6:for-next also, but to have the soc codec changes the MFD patch should go to the sound-2.6 tree as well to make sure it is not braking things. All-in-all, how these things can be handled? The OMAP patch has been acked by Tony. Then we I'm fine with the mfd one and Mark is also ok with the remaining asoc one, all 3 patches have to go through one single tree. It seems to me that this patchset is mostly an asoc one, even though all of those patches depend on the MFD one. So I'd perfectly fine if they'd all go through Mark's tree, and then I'd have to make sure I'm sending my 2.6.33 merge window pull request _after_ Mark's code is in Linus tree. Once it's there, I can work on merging conflicts with the few twl4030-core pending patches from my tree. Mark, what do you think ? Cheers, Samuel. Thanks, Péter -- Intel Open Source Technology Centre http://oss.intel.com/ -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: DSS2 clocking
Hi, On Wed, 2009-10-21 at 14:42 +0200, ext Gary Thomas wrote: I'm using DSS2, currently just with a frame buffer to a [VGA/RGB] monitor. I'm trying to understand how to set the timing parameters for my device. The simple 'omapfb.mode=1024x768...@75' doesn't quite cut it for some of the devices I need to use. Questions: * How can I get different pixel clocks? I seem to always end up with 61714285: The pixel clock is calculated based on the given resolution and refresh rate. You can adjust it via sysfs. But you don't have very fine graded control when using the normal pixel clock source. When using DSI PLL to generate the DISPC functional clock, you can get much more exact pixel clock. But DSI PLL support is quite experimental. # cat /tmp/dbg/omapdss/clk - dss - internal clk count 2 dss_ick 83001 dss1_alwon_fck 123428570 1 dss2_alwon_fck 13000 dss_tv_fck 54000 dss_96m_fck 96000 - dispc - dispc fclk source = dss1_alwon_fclk pixel clk = 123428570 / 1 / 2 = 61714285 * How can I control the waveform? In particular, the size and shape of the porches? My display seems to need these settings: 61714,1024/26/162/136,768/3/29/6 I'd like to get this behaviour, either from the boot line or ideally by default. Currently you cannot set these via kernel arguments, only via sysfs or in the panel driver. * The display also seems to want the sync pulses to be asserted low (inverted?). Currently, I have this hard-wired into my display device, but I'd also like this to be adjustable. These cannot currently be changed at all, they can only be defined in the panel driver. Tomi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] OMAP3: DVFS: No sdrc AC timing changes during core dvfs
Hi Richard, From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap- ow...@vger.kernel.org] On Behalf Of Woodruff, Richard From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap- ow...@vger.kernel.org] On Behalf Of Paul Walmsley Sent: Tuesday, October 20, 2009 8:21 PM This patch removes the SDRC AC timings changes done during core dvfs. Updating AC timing CTRL values for SDRC during DVFS is seen to be a risk, while the RFR CTRL value is safe to be updated. Signed-off-by: Rajendra Nayak rna...@ti.com just wanted to let you know, I haven't forgotten about this one. Am trying to get an answer from others as to whether AC timing register changes are completely unsafe, in which case your patch is probably the best way to move forward; or whether we can make the changes when no initiators are touching SDRAM. It is not guaranteed safe to write actim registers on the fly to an active part. It is safe to do RFR as it is buffered and sent out at a safe time. I think that what Paul is suggesting is to change the ACTIM after ensuring that the DDR is in self-refresh. In that case it is perfectly valid; it is just tricky to ensure that all initiators are in mute before doing that. Regards, Benoit A few years back before omap3 as part of omap2 lessons learned this issue was highlighted but design was not able to change. Recently implementation review at rtl provided the above points. I'm not aware of anyone seeing a crash but recommendation for safety is to not. Regards, Richard W. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Texas Instruments France SA, 821 Avenue Jack Kilby, 06270 Villeneuve Loubet. 036 420 040 R.C.S Antibes. Capital de EUR 753.920 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
htc elf (omap850 based device)
Hi everyone! I've run wing-linux on my phone few days ago and found that it's core quite old. Few devices are not supported or working wrong. I'd like to help to improve support for this phone but I don't know current state of affairs. Is there anyone working with it now? -- Alexander Kaidalov -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 01/17] PM: fix suspend control for IVA2
Hi Tero, Ameya, Girish, On Fri, 16 Oct 2009, Tero Kristo wrote: From: Tero Kristo tero.kri...@nokia.com IVA2 controls its target power state individually, thus suspend should not touch IVA2. Without this patch DSP suspend always fails. We don't allow other device drivers to touch PRCM bits, so we should probably should remove all PRCM register accesses from the DSPBridge code, so all power control should go through the ARM. Is there a reason why the ARM code can't handle the DSP powerdomain? - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/4 v2] MFD/OMAP/ASoC: MFD device for twl4030 codec submodule
Hello, Changes from the first series: - twl4030-codec MFD driver is using the mfd-core API (and selects MFD_CORE) - Added Acked-by: Tony Lindgren t...@atomide.com to the patch for the OMAP board files - User selectable Kconfig is removed for the TWL4030_CODEC - soc codec driver patch separated: - Change the header file, and use the include/linux/mfd/twl4030-codec.h for register definitions - The actual change in the soc codec driver - Module alias corrected in soc codec driver - The bias is brought up when the driver comes up, rather than in soc probe. - The soc codec driver is selecting the TWL4030_CODEC driver The series applies on top of sound-2.6:topic/asoc branch Commit message from the first series: The following series adds new MFD device on top of the twl4030 MFD device for the codec part of the chip, and also converts the soc audio driver to use the correct probing (device model). Reason for the twl4030_codec MFD: the vibra control is actually in the codec part of the twl4030. If both the vibra and the audio functionality is needed from the twl4030 at the same time, than they need to control the codec power and APLL at the same time without breaking the other driver. Also these two has to be able to work without the need for the other driver. The proposed solution: Register twl4030_codec as a child for the twl4030 mfd. twl4030_codec is also and mfd and at the moment it has two child: twl4030_codec_audio: for audio codec twl4030_codec_vibra: for vibra driver The twl4030_codec mfd registers the devices for audio and vibra (if the platform data is not NULL for them), and has - at the moment - functions to enable/disable resources, each of these resources has ref-counts, so the twl4030_codec knows, when the resource is need to be turned on or off. The interface is quite simple: int twl4030_codec_enable_resource(enum twl4030_codec_res id); int twl4030_codec_disable_resource(enum twl4030_codec_res id); These functions are returning the content of the given register after the modification (or negative value, if error - the error handling need to be revisited in a near future), so that the caller can update it's local cache if it need to do (the audio driver needs it). There are two resource defined: TWL4030_CODEC_RES_POWER: Controlling the power of the codec TWL4030_CODEC_RES_APLL: For APLL The vibra driver is not part of this series. I have also included a patch, which changes the board files for those, which in my knowledge uses the twl4030 codec as audio device. I might missed some boards... To-Do list: - add the actual vibra driver ;) - coexistence related fixes for the audio and vibra driver - move all audio related configuration from soc machine drivers to the board files (if any) --- Peter Ujfalusi (4): MFD: twl4030: add twl4030_codec MFD as a new child to the core OMAP: Platform support for twl4030_codec MFD ASoC: TWL4030: use the twl4030-codec.h for register descriptions ASoC: TWL4030: Driver registration via twl4030_codec MFD arch/arm/mach-omap2/board-3430sdp.c |9 + arch/arm/mach-omap2/board-omap3beagle.c |9 + arch/arm/mach-omap2/board-omap3evm.c |9 + arch/arm/mach-omap2/board-omap3pandora.c |9 + arch/arm/mach-omap2/board-overo.c|9 + arch/arm/mach-omap2/board-zoom2.c|9 + drivers/mfd/Kconfig |6 + drivers/mfd/Makefile |1 + drivers/mfd/twl4030-codec.c | 241 ++ drivers/mfd/twl4030-core.c | 14 ++ include/linux/i2c/twl4030.h | 18 ++ include/linux/mfd/twl4030-codec.h| 271 ++ sound/soc/codecs/Kconfig |1 + sound/soc/codecs/twl4030.c | 203 ++- sound/soc/codecs/twl4030.h | 242 +-- 15 files changed, 738 insertions(+), 313 deletions(-) create mode 100644 drivers/mfd/twl4030-codec.c create mode 100644 include/linux/mfd/twl4030-codec.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/4 v2] MFD: twl4030: add twl4030_codec MFD as a new child to the core
New MFD child to twl4030 MFD device.
Reason for the twl4030_codec MFD: the vibra control is actually in the codec
part of the twl4030. If both the vibra and the audio functionality is needed
from the twl4030 at the same time, than they need to control the codec power
and APLL at the same time without breaking the other driver.
Also these two has to be able to work without the need for the other driver.
This MFD device will be used by the drivers, which needs resources
from the twl4030 codec like audio and vibra.
The platform specific configuration data is passed along to the
child drivers (audio, vibra).
Signed-off-by: Peter Ujfalusi peter.ujfal...@nokia.com
---
drivers/mfd/Kconfig |6 +
drivers/mfd/Makefile |1 +
drivers/mfd/twl4030-codec.c | 241 +
drivers/mfd/twl4030-core.c| 14 ++
include/linux/i2c/twl4030.h | 18 +++
include/linux/mfd/twl4030-codec.h | 271 +
6 files changed, 551 insertions(+), 0 deletions(-)
create mode 100644 drivers/mfd/twl4030-codec.c
create mode 100644 include/linux/mfd/twl4030-codec.h
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 570be13..08f2d07 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -121,6 +121,12 @@ config TWL4030_POWER
and load scripts controling which resources are switched off/on
or reset when a sleep, wakeup or warm reset event occurs.
+config TWL4030_CODEC
+ bool
+ depends on TWL4030_CORE
+ select MFD_CORE
+ default n
+
config MFD_TMIO
bool
default n
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index f3b277b..af0fc90 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_MENELAUS)+= menelaus.o
obj-$(CONFIG_TWL4030_CORE) += twl4030-core.o twl4030-irq.o
obj-$(CONFIG_TWL4030_POWER)+= twl4030-power.o
+obj-$(CONFIG_TWL4030_CODEC)+= twl4030-codec.o
obj-$(CONFIG_MFD_MC13783) += mc13783-core.o
diff --git a/drivers/mfd/twl4030-codec.c b/drivers/mfd/twl4030-codec.c
new file mode 100644
index 000..9710307
--- /dev/null
+++ b/drivers/mfd/twl4030-codec.c
@@ -0,0 +1,241 @@
+/*
+ * MFD driver for twl4030 codec submodule
+ *
+ * Author: Peter Ujfalusi peter.ujfal...@nokia.com
+ *
+ * Copyright: (C) 2009 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include linux/module.h
+#include linux/types.h
+#include linux/kernel.h
+#include linux/fs.h
+#include linux/platform_device.h
+#include linux/i2c/twl4030.h
+#include linux/mfd/core.h
+#include linux/mfd/twl4030-codec.h
+
+#define TWL4030_CODEC_CELLS2
+
+static struct platform_device *twl4030_codec_dev;
+
+struct twl4030_codec_resource {
+ int request_count;
+ u8 reg;
+ u8 mask;
+};
+
+struct twl4030_codec {
+ struct mutex mutex;
+ struct twl4030_codec_resource resource[TWL4030_CODEC_RES_MAX];
+ struct mfd_cell cells[TWL4030_CODEC_CELLS];
+};
+
+/*
+ * Modify the resource, the function returns the content of the register
+ * after the modification.
+ */
+static int twl4030_codec_set_resource(enum twl4030_codec_res id, int enable)
+{
+ struct twl4030_codec *codec = platform_get_drvdata(twl4030_codec_dev);
+ u8 val;
+
+ twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, val,
+ codec-resource[id].reg);
+
+ if (enable)
+ val |= codec-resource[id].mask;
+ else
+ val = ~codec-resource[id].mask;
+
+ twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
+ val, codec-resource[id].reg);
+
+ return val;
+}
+
+static inline int twl4030_codec_get_resource(enum twl4030_codec_res id)
+{
+ struct twl4030_codec *codec = platform_get_drvdata(twl4030_codec_dev);
+ u8 val;
+
+ twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, val,
+ codec-resource[id].reg);
+
+ return val;
+}
+
+/*
+ * Enable the resource.
+ * The function returns with error or the content of the register
+ */
+int twl4030_codec_enable_resource(enum twl4030_codec_res id)
+{
+ struct twl4030_codec *codec = platform_get_drvdata(twl4030_codec_dev);
+ int val;
+
+ if (id = TWL4030_CODEC_RES_MAX) {
+
[PATCH 4/4 v2] ASoC: TWL4030: Driver registration via twl4030_codec MFD
Change the way how the twl4030 soc codec driver is
loaded/probed.
Use the device probing via tlw4030_codec MFD device.
Signed-off-by: Peter Ujfalusi peter.ujfal...@nokia.com
---
sound/soc/codecs/Kconfig |1 +
sound/soc/codecs/twl4030.c | 203 +++-
2 files changed, 127 insertions(+), 77 deletions(-)
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index d30fce7..3df3497 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -147,6 +147,7 @@ config SND_SOC_TLV320DAC33
tristate
config SND_SOC_TWL4030
+ select TWL4030_CODEC
tristate
config SND_SOC_UDA134X
diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c
index 559e9b2..5c5a4c0 100644
--- a/sound/soc/codecs/twl4030.c
+++ b/sound/soc/codecs/twl4030.c
@@ -120,6 +120,8 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
/* codec private data */
struct twl4030_priv {
+ struct snd_soc_codec codec;
+
unsigned int bypass_state;
unsigned int codec_powered;
unsigned int codec_muted;
@@ -183,19 +185,20 @@ static int twl4030_write(struct snd_soc_codec *codec,
static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
{
struct twl4030_priv *twl4030 = codec-private_data;
- u8 mode;
+ int mode;
if (enable == twl4030-codec_powered)
return;
- mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
if (enable)
- mode |= TWL4030_CODECPDZ;
+ mode = twl4030_codec_enable_resource(TWL4030_CODEC_RES_POWER);
else
- mode = ~TWL4030_CODECPDZ;
+ mode = twl4030_codec_disable_resource(TWL4030_CODEC_RES_POWER);
- twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
- twl4030-codec_powered = enable;
+ if (mode = 0) {
+ twl4030_write_reg_cache(codec, TWL4030_REG_CODEC_MODE, mode);
+ twl4030-codec_powered = enable;
+ }
/* REVISIT: this delay is present in TI sample drivers */
/* but there seems to be no TRM requirement for it */
@@ -219,22 +222,20 @@ static void twl4030_init_chip(struct snd_soc_codec *codec)
static void twl4030_codec_mute(struct snd_soc_codec *codec, int mute)
{
struct twl4030_priv *twl4030 = codec-private_data;
- u8 reg_val;
+ int status;
if (mute == twl4030-codec_muted)
return;
- if (mute) {
+ if (mute)
/* Disable PLL */
- reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL);
- reg_val = ~TWL4030_APLL_EN;
- twl4030_write(codec, TWL4030_REG_APLL_CTL, reg_val);
- } else {
+ status = twl4030_codec_disable_resource(TWL4030_CODEC_RES_APLL);
+ else
/* Enable PLL */
- reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL);
- reg_val |= TWL4030_APLL_EN;
- twl4030_write(codec, TWL4030_REG_APLL_CTL, reg_val);
- }
+ status = twl4030_codec_enable_resource(TWL4030_CODEC_RES_APLL);
+
+ if (status = 0)
+ twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, status);
twl4030-codec_muted = mute;
}
@@ -2123,7 +2124,7 @@ struct snd_soc_dai twl4030_dai[] = {
};
EXPORT_SYMBOL_GPL(twl4030_dai);
-static int twl4030_suspend(struct platform_device *pdev, pm_message_t state)
+static int twl4030_soc_suspend(struct platform_device *pdev, pm_message_t
state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
struct snd_soc_codec *codec = socdev-card-codec;
@@ -2133,7 +2134,7 @@ static int twl4030_suspend(struct platform_device *pdev,
pm_message_t state)
return 0;
}
-static int twl4030_resume(struct platform_device *pdev)
+static int twl4030_soc_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
struct snd_soc_codec *codec = socdev-card-codec;
@@ -2143,32 +2144,21 @@ static int twl4030_resume(struct platform_device *pdev)
return 0;
}
-/*
- * initialize the driver
- * register the mixer and dsp interfaces with the kernel
- */
+static struct snd_soc_codec *twl4030_codec;
-static int twl4030_init(struct snd_soc_device *socdev)
+static int twl4030_soc_probe(struct platform_device *pdev)
{
- struct snd_soc_codec *codec = socdev-card-codec;
+ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
struct twl4030_setup_data *setup = socdev-codec_data;
- struct twl4030_priv *twl4030 = codec-private_data;
- int ret = 0;
+ struct snd_soc_codec *codec;
+ struct twl4030_priv *twl4030;
+ int ret;
- printk(KERN_INFO TWL4030 Audio Codec init \n);
+ BUG_ON(!twl4030_codec);
- codec-name = twl4030;
- codec-owner = THIS_MODULE;
- codec-read = twl4030_read_reg_cache;
-
[PATCH 2/4 v2] OMAP: Platform support for twl4030_codec MFD
Add needed platform data for the twl4030_codec MFD on boards,
where the audio part of the twl4030 codec is used.
Signed-off-by: Peter Ujfalusi peter.ujfal...@nokia.com
Acked-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/board-3430sdp.c |9 +
arch/arm/mach-omap2/board-omap3beagle.c |9 +
arch/arm/mach-omap2/board-omap3evm.c |9 +
arch/arm/mach-omap2/board-omap3pandora.c |9 +
arch/arm/mach-omap2/board-overo.c|9 +
arch/arm/mach-omap2/board-zoom2.c|9 +
6 files changed, 54 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c
b/arch/arm/mach-omap2/board-3430sdp.c
index efaf053..4f91f7a 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -410,6 +410,14 @@ static struct regulator_init_data sdp3430_vpll2 = {
.consumer_supplies = sdp3430_vdvi_supply,
};
+static struct twl4030_codec_audio_data sdp3430_audio = {
+ .audio_mclk = 2600,
+};
+
+static struct twl4030_codec_data sdp3430_codec = {
+ .audio = sdp3430_audio,
+};
+
static struct twl4030_platform_data sdp3430_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end= TWL4030_IRQ_END,
@@ -420,6 +428,7 @@ static struct twl4030_platform_data sdp3430_twldata = {
.madc = sdp3430_madc_data,
.keypad = sdp3430_kp_data,
.usb= sdp3430_usb_data,
+ .codec = sdp3430_codec,
.vaux1 = sdp3430_vaux1,
.vaux2 = sdp3430_vaux2,
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index 70df6b4..2161d85 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -254,6 +254,14 @@ static struct twl4030_usb_data beagle_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
+static struct twl4030_codec_audio_data beagle_audio_data = {
+ .audio_mclk = 2600,
+};
+
+static struct twl4030_codec_data beagle_codec_data = {
+ .audio = beagle_audio_data,
+};
+
static struct twl4030_platform_data beagle_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end= TWL4030_IRQ_END,
@@ -261,6 +269,7 @@ static struct twl4030_platform_data beagle_twldata = {
/* platform_data for children goes here */
.usb= beagle_usb_data,
.gpio = beagle_gpio_data,
+ .codec = beagle_codec_data,
.vmmc1 = beagle_vmmc1,
.vsim = beagle_vsim,
.vdac = beagle_vdac,
diff --git a/arch/arm/mach-omap2/board-omap3evm.c
b/arch/arm/mach-omap2/board-omap3evm.c
index e4ec0c5..d9a6103 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -194,6 +194,14 @@ static struct twl4030_madc_platform_data
omap3evm_madc_data = {
.irq_line = 1,
};
+static struct twl4030_codec_audio_data omap3evm_audio_data = {
+ .audio_mclk = 2600,
+};
+
+static struct twl4030_codec_data omap3evm_codec_data = {
+ .audio = omap3evm_audio_data,
+};
+
static struct twl4030_platform_data omap3evm_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end= TWL4030_IRQ_END,
@@ -203,6 +211,7 @@ static struct twl4030_platform_data omap3evm_twldata = {
.madc = omap3evm_madc_data,
.usb= omap3evm_usb_data,
.gpio = omap3evm_gpio_data,
+ .codec = omap3evm_codec_data,
};
static struct i2c_board_info __initdata omap3evm_i2c_boardinfo[] = {
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c
b/arch/arm/mach-omap2/board-omap3pandora.c
index 7f6bf87..5036b56 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -281,11 +281,20 @@ static struct twl4030_usb_data omap3pandora_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
+static struct twl4030_codec_audio_data omap3pandora_audio_data = {
+ .audio_mclk = 2600,
+};
+
+static struct twl4030_codec_data omap3pandora_codec_data = {
+ .audio = omap3pandora_audio_data,
+};
+
static struct twl4030_platform_data omap3pandora_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end= TWL4030_IRQ_END,
.gpio = omap3pandora_gpio_data,
.usb= omap3pandora_usb_data,
+ .codec = omap3pandora_codec_data,
.vmmc1 = pandora_vmmc1,
.vmmc2 = pandora_vmmc2,
.keypad = pandora_kp_data,
diff --git a/arch/arm/mach-omap2/board-overo.c
b/arch/arm/mach-omap2/board-overo.c
index 9917d2f..dc55008 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -329,6 +329,14 @@ static struct regulator_init_data overo_vmmc1 = {
.consumer_supplies = overo_vmmc1_supply,
};
[PATCH 3/4 v2] ASoC: TWL4030: use the twl4030-codec.h for register descriptions
Remove the register descriptions from the twl4030.h file and use the linux/mfd/twl4030-codec.h instead, which has the codec related register descriptions also. Signed-off-by: Peter Ujfalusi peter.ujfal...@nokia.com --- sound/soc/codecs/twl4030.h | 242 +-- 1 files changed, 6 insertions(+), 236 deletions(-) diff --git a/sound/soc/codecs/twl4030.h b/sound/soc/codecs/twl4030.h index 2b4bfa2..dd6396e 100644 --- a/sound/soc/codecs/twl4030.h +++ b/sound/soc/codecs/twl4030.h @@ -22,245 +22,13 @@ #ifndef __TWL4030_AUDIO_H__ #define __TWL4030_AUDIO_H__ -#define TWL4030_REG_CODEC_MODE 0x1 -#define TWL4030_REG_OPTION 0x2 -#define TWL4030_REG_UNKNOWN0x3 -#define TWL4030_REG_MICBIAS_CTL0x4 -#define TWL4030_REG_ANAMICL0x5 -#define TWL4030_REG_ANAMICR0x6 -#define TWL4030_REG_AVADC_CTL 0x7 -#define TWL4030_REG_ADCMICSEL 0x8 -#define TWL4030_REG_DIGMIXING 0x9 -#define TWL4030_REG_ATXL1PGA 0xA -#define TWL4030_REG_ATXR1PGA 0xB -#define TWL4030_REG_AVTXL2PGA 0xC -#define TWL4030_REG_AVTXR2PGA 0xD -#define TWL4030_REG_AUDIO_IF 0xE -#define TWL4030_REG_VOICE_IF 0xF -#define TWL4030_REG_ARXR1PGA 0x10 -#define TWL4030_REG_ARXL1PGA 0x11 -#define TWL4030_REG_ARXR2PGA 0x12 -#define TWL4030_REG_ARXL2PGA 0x13 -#define TWL4030_REG_VRXPGA 0x14 -#define TWL4030_REG_VSTPGA 0x15 -#define TWL4030_REG_VRX2ARXPGA 0x16 -#define TWL4030_REG_AVDAC_CTL 0x17 -#define TWL4030_REG_ARX2VTXPGA 0x18 -#define TWL4030_REG_ARXL1_APGA_CTL 0x19 -#define TWL4030_REG_ARXR1_APGA_CTL 0x1A -#define TWL4030_REG_ARXL2_APGA_CTL 0x1B -#define TWL4030_REG_ARXR2_APGA_CTL 0x1C -#define TWL4030_REG_ATX2ARXPGA 0x1D -#define TWL4030_REG_BT_IF 0x1E -#define TWL4030_REG_BTPGA 0x1F -#define TWL4030_REG_BTSTPGA0x20 -#define TWL4030_REG_EAR_CTL0x21 -#define TWL4030_REG_HS_SEL 0x22 -#define TWL4030_REG_HS_GAIN_SET0x23 -#define TWL4030_REG_HS_POPN_SET0x24 -#define TWL4030_REG_PREDL_CTL 0x25 -#define TWL4030_REG_PREDR_CTL 0x26 -#define TWL4030_REG_PRECKL_CTL 0x27 -#define TWL4030_REG_PRECKR_CTL 0x28 -#define TWL4030_REG_HFL_CTL0x29 -#define TWL4030_REG_HFR_CTL0x2A -#define TWL4030_REG_ALC_CTL0x2B -#define TWL4030_REG_ALC_SET1 0x2C -#define TWL4030_REG_ALC_SET2 0x2D -#define TWL4030_REG_BOOST_CTL 0x2E -#define TWL4030_REG_SOFTVOL_CTL0x2F -#define TWL4030_REG_DTMF_FREQSEL 0x30 -#define TWL4030_REG_DTMF_TONEXT1H 0x31 -#define TWL4030_REG_DTMF_TONEXT1L 0x32 -#define TWL4030_REG_DTMF_TONEXT2H 0x33 -#define TWL4030_REG_DTMF_TONEXT2L 0x34 -#define TWL4030_REG_DTMF_TONOFF0x35 -#define TWL4030_REG_DTMF_WANONOFF 0x36 -#define TWL4030_REG_I2S_RX_SCRAMBLE_H 0x37 -#define TWL4030_REG_I2S_RX_SCRAMBLE_M 0x38 -#define TWL4030_REG_I2S_RX_SCRAMBLE_L 0x39 -#define TWL4030_REG_APLL_CTL 0x3A -#define TWL4030_REG_DTMF_CTL 0x3B -#define TWL4030_REG_DTMF_PGA_CTL2 0x3C -#define TWL4030_REG_DTMF_PGA_CTL1 0x3D -#define TWL4030_REG_MISC_SET_1 0x3E -#define TWL4030_REG_PCMBTMUX 0x3F -#define TWL4030_REG_RX_PATH_SEL0x43 -#define TWL4030_REG_VDL_APGA_CTL 0x44 -#define TWL4030_REG_VIBRA_CTL 0x45 -#define TWL4030_REG_VIBRA_SET 0x46 -#define TWL4030_REG_VIBRA_PWM_SET 0x47 -#define TWL4030_REG_ANAMIC_GAIN0x48 -#define TWL4030_REG_MISC_SET_2 0x49 -#define TWL4030_REG_SW_SHADOW 0x4A +/* Register descriptions are here */ +#include linux/mfd/twl4030-codec.h +/* Sgadow register used by the audio driver */ +#define TWL4030_REG_SW_SHADOW 0x4A #define TWL4030_CACHEREGNUM(TWL4030_REG_SW_SHADOW + 1) -/* Bitfield Definitions */ - -/* TWL4030_CODEC_MODE (0x01) Fields */ - -#define TWL4030_APLL_RATE 0xF0 -#define TWL4030_APLL_RATE_8000 0x00 -#define TWL4030_APLL_RATE_110250x10 -#define TWL4030_APLL_RATE_120000x20 -#define TWL4030_APLL_RATE_160000x40 -#define TWL4030_APLL_RATE_220500x50 -#define TWL4030_APLL_RATE_240000x60 -#define TWL4030_APLL_RATE_320000x80 -#define TWL4030_APLL_RATE_441000x90 -#define TWL4030_APLL_RATE_480000xA0 -#define TWL4030_APLL_RATE_960000xE0 -#define TWL4030_SEL_16K0x08 -#define TWL4030_CODECPDZ 0x02 -#define TWL4030_OPT_MODE 0x01 -#define TWL4030_OPTION_1 (1 0) -#define TWL4030_OPTION_2 (0 0) - -/* TWL4030_OPTION (0x02) Fields */ - -#define
Re: [PATCH 1/4] MFD: twl4030: add twl4030_codec MFD as a new child to the core
On Thu, Oct 22, 2009 at 09:57:49AM +0200, Samuel Ortiz wrote: It seems to me that this patchset is mostly an asoc one, even though all of those patches depend on the MFD one. So I'd perfectly fine if they'd all go through Mark's tree, and then I'd have to make sure I'm sending my 2.6.33 merge window pull request _after_ Mark's code is in Linus tree. Once it's there, I can work on merging conflicts with the few twl4030-core pending patches from my tree. Mark, what do you think ? Seems reasonable. I'll apply them on a separate branch and merge them into my 2.6.33 branch so that you can merge them into your tree too and avoid any cross-tree issues without needing to think about how things get merged with Linus (though since Takashi generally merges early it'll probably happen naturally anyway). Note that if you do pull this branch you won't be able to rebase your tree, you'd have to merge up Linus' tree instead (but that'd be handy anyway :) ). -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/4] MFD: twl4030: add twl4030_codec MFD as a new child to the core
On Thursday 22 October 2009 13:55:17 ext Mark Brown wrote: On Thu, Oct 22, 2009 at 09:57:49AM +0200, Samuel Ortiz wrote: It seems to me that this patchset is mostly an asoc one, even though all of those patches depend on the MFD one. So I'd perfectly fine if they'd all go through Mark's tree, and then I'd have to make sure I'm sending my 2.6.33 merge window pull request _after_ Mark's code is in Linus tree. Once it's there, I can work on merging conflicts with the few twl4030-core pending patches from my tree. Mark, what do you think ? Seems reasonable. I'll apply them on a separate branch and merge them into my 2.6.33 branch so that you can merge them into your tree too and avoid any cross-tree issues without needing to think about how things get merged with Linus (though since Takashi generally merges early it'll probably happen naturally anyway). Note that if you do pull this branch you won't be able to rebase your tree, you'd have to merge up Linus' tree instead (but that'd be handy anyway :) ). I just sent the second series, I'll hope the I have not missed anything. I was scratching my head on which tree it should be going, but it is really nice to see that it can be done like this. Thank you Samuel, Mark and Tony! -- Péter -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [Resend PATCH 2/2] twl4030: Enable low-power mode to 32kHz oscillator
Hi Samuel,
On Thu, 22 Oct 2009, ext Samuel Ortiz wrote:
On Tue, Oct 20, 2009 at 04:22:53PM +0300, Ilkka Koskinen wrote:
+struct twl4030_clock_init_data {
+ int ck32k_lowpwr_enable;
I guess you could use a bool here ?
Good point. I'll change it.
Cheers, Ilkka
+};
+
struct twl4030_bci_platform_data {
int *battery_tmp_tbl;
unsigned int tblsize;
@@ -403,6 +407,7 @@ extern void twl4030_power_init(struct twl4030_power_data
*triton2_scripts);
struct twl4030_platform_data {
unsignedirq_base, irq_end;
+ struct twl4030_clock_init_data *clock;
struct twl4030_bci_platform_data*bci;
struct twl4030_gpio_platform_data *gpio;
struct twl4030_madc_platform_data *madc;
--
1.6.0.4
--
Intel Open Source Technology Centre
http://oss.intel.com/
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[PATCH v2] twl4030: Enable low-power mode to 32kHz oscillator
Allows TWL's 32kHz oscillator to go in low-power mode when
main battery voltage is running low.
Signed-off-by: Ilkka Koskinen ilkka.koski...@nokia.com
---
drivers/mfd/twl4030-core.c |9 +++--
include/linux/i2c/twl4030.h |5 +
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/mfd/twl4030-core.c b/drivers/mfd/twl4030-core.c
index eee5af8..004a8be 100644
--- a/drivers/mfd/twl4030-core.c
+++ b/drivers/mfd/twl4030-core.c
@@ -177,6 +177,7 @@
#define HFCLK_FREQ_26_MHZ (2 0)
#define HFCLK_FREQ_38p4_MHZ(3 0)
#define HIGH_PERF_SQ (1 3)
+#define CK32K_LOWPWR_EN(1 7)
/* chip-specific feature flags, for i2c_device_id.driver_data */
@@ -681,7 +682,8 @@ static inline int __init unprotect_pm_master(void)
return e;
}
-static void clocks_init(struct device *dev)
+static void clocks_init(struct device *dev,
+ struct twl4030_clock_init_data *clock)
{
int e = 0;
struct clk *osc;
@@ -728,6 +730,9 @@ static void clocks_init(struct device *dev)
}
ctrl |= HIGH_PERF_SQ;
+ if (clock clock-ck32k_lowpwr_enable)
+ ctrl |= CK32K_LOWPWR_EN;
+
e |= unprotect_pm_master();
/* effect-MADC+USB ck en */
e |= twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, ctrl, R_CFG_BOOT);
@@ -806,7 +811,7 @@ twl4030_probe(struct i2c_client *client, const struct
i2c_device_id *id)
inuse = true;
/* setup clock framework */
- clocks_init(client-dev);
+ clocks_init(client-dev, pdata-clock);
/* load power event scripts */
if (twl_has_power() pdata-power)
diff --git a/include/linux/i2c/twl4030.h b/include/linux/i2c/twl4030.h
index 4a2fb27..10e68cb 100644
--- a/include/linux/i2c/twl4030.h
+++ b/include/linux/i2c/twl4030.h
@@ -313,6 +313,10 @@ int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg,
unsigned num_bytes);
/*--*/
+struct twl4030_clock_init_data {
+ bool ck32k_lowpwr_enable;
+};
+
struct twl4030_bci_platform_data {
int *battery_tmp_tbl;
unsigned int tblsize;
@@ -407,6 +411,7 @@ extern void twl4030_power_init(struct twl4030_power_data
*triton2_scripts);
struct twl4030_platform_data {
unsignedirq_base, irq_end;
+ struct twl4030_clock_init_data *clock;
struct twl4030_bci_platform_data*bci;
struct twl4030_gpio_platform_data *gpio;
struct twl4030_madc_platform_data *madc;
--
1.6.0.4
--
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RE: [PATCH] OMAP3: DVFS: No sdrc AC timing changes during core dvfs
Hi Beonit, From: Cousson, Benoit Sent: Thursday, October 22, 2009 3:59 AM To: Woodruff, Richard; Paul Walmsley; Nayak, Rajendra It is not guaranteed safe to write actim registers on the fly to an active part. It is safe to do RFR as it is buffered and sent out at a safe time. I think that what Paul is suggesting is to change the ACTIM after ensuring that the DDR is in self-refresh. In that case it is perfectly valid; it is just tricky to ensure that all initiators are in mute before doing that. Yes that is true, however, ... That is not the way the code is setup and it’s a long way from that. Run time pause of drivers is a minefield. With out a broad notifier they best you would hope for is some opportunistic change time (against full system). You wouldn't have a guaranteed way to speed them up again where you need them most at high opp. Some minimal kernel not using dma and the like could do it but that is probably more misleading to put in the tree than something useful for most. Regards, Richard W. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH resend] OMAP1: AMS_DELTA: Fix DSP public peripherals support
DSP public peripherals used to work on OMAP1510 based (or all OMAP1 class?)
machines as long as old dspgateway code were present in the l-o tree. For
several months it is no longer included, breaking support for McBSP1 based
audio on Amstrad Delta, for example.
This patch, derived from the old dspgateway code, corrects the problem for the
board by simply taking the DSP out of reset state, I guess. That way, things
should not break when a new dsp code is added to the tree, and the change can
be reverted then.
If there are any reports on McBSP1 or other DSP public peripherals not working
for other OMAP1 machines (I've not heard of any for now), I can prepare a more
general patch providing an extra include file with a helper function defined.
Created and tested against linux-2.6.32-rc5
Signed-off-by: Janusz Krzysztofik jkrzy...@tis.icnet.pl
---
Thursday 22 October 2009 02:22:53 Janusz Krzysztofik wrote:
--- linux-2.6.32-rc5/arch/arm/mach-omap1/board-ams-delta.c.orig
2009-10-22
00:55:49.0 +0200
+++ linux-2.6.32-rc5/arch/arm/mach-omap1/board-ams-delta.c2009-10-22
01:46:39.0 +0200
Tony,
The above lines has been mangled by my mailer, that's why I resend for your
convenience.
--- linux-2.6.32-rc5/arch/arm/mach-omap1/board-ams-delta.c.orig 2009-10-22
00:55:49.0 +0200
+++ linux-2.6.32-rc5/arch/arm/mach-omap1/board-ams-delta.c 2009-10-22
01:46:39.0 +0200
@@ -235,6 +235,8 @@ static void __init ams_delta_init(void)
omap_usb_init(ams_delta_usb_config);
platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices));
+
+ omap_writew(omap_readw(ARM_RSTCT1) | 0x0004, ARM_RSTCT1);
}
static struct plat_serial8250_port ams_delta_modem_ports[] = {
--
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Re: htc elf (omap850 based device)
On Thu, Oct 22, 2009 at 2:05 AM, Alexander Kaidalov alexanderkaida...@spbstu.ru wrote: Hi everyone! I've run wing-linux on my phone few days ago and found that it's core quite old. Few devices are not supported or working wrong. I'd like to help to improve support for this phone but I don't know current state of affairs. Is there anyone working with it now? -- Alexander Kaidalov I've been working on getting HTC Herald support (also from wing-linux) into the kernel, though it's dependent on patches by Alistair Buxton of linwizard getting in. I submitted them to this list a while ago and haven't heard anything about them. - Cory -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 2/2] OMAP3: add AMBA devices for ETM and ETB
This enables on-chip tracing components found in omap3xxx.
Signed-off-by: Alexander Shishkin virtu...@slind.org
---
arch/arm/mach-omap2/Kconfig |8 +
arch/arm/mach-omap2/Makefile|3 ++
arch/arm/mach-omap2/clock34xx.c |8 ++--
arch/arm/mach-omap2/emu.c | 66 +++
4 files changed, 81 insertions(+), 4 deletions(-)
create mode 100644 arch/arm/mach-omap2/emu.c
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 15cb529..f50d5bc 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -96,3 +96,11 @@ config MACH_OMAP_ZOOM2
config MACH_OMAP_4430SDP
bool OMAP 4430 SDP board
depends on ARCH_OMAP4
+
+config OMAP3_EMU
+ bool OMAP3 tracing peripherals
+ depends on ARCH_OMAP3
+ select OC_ETM
+ help
+ Say Y here to enable tracing hardware of omap3
+
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 954693c..c0ceb8c 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -46,6 +46,9 @@ obj-$(CONFIG_ARCH_OMAP2) += clock24xx.o
obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o
obj-$(CONFIG_OMAP_PM_SRF) += resource34xx.o
+# EMU peripherals
+obj-$(CONFIG_OMAP3_EMU)+= emu.o
+
iommu-y+= iommu2.o
iommu-$(CONFIG_ARCH_OMAP3) += omap3-iommu.o
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index da5bc1f..59d4320 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -123,7 +123,7 @@ static struct omap_clk omap34xx_clks[] = {
CLK(NULL, dpll3_m2x2_ck, dpll3_m2x2_ck, CK_343X),
CLK(NULL, dpll3_m3_ck, dpll3_m3_ck, CK_343X),
CLK(NULL, dpll3_m3x2_ck, dpll3_m3x2_ck, CK_343X),
- CLK(NULL, emu_core_alwon_ck, emu_core_alwon_ck, CK_343X),
+ CLK(etb, emu_core_alwon_ck, emu_core_alwon_ck, CK_343X),
CLK(NULL, dpll4_ck, dpll4_ck, CK_343X),
CLK(NULL, dpll4_x2_ck, dpll4_x2_ck, CK_343X),
CLK(NULL, omap_96m_alwon_fck, omap_96m_alwon_fck, CK_343X),
@@ -142,7 +142,7 @@ static struct omap_clk omap34xx_clks[] = {
CLK(NULL, dpll4_m5x2_ck, dpll4_m5x2_ck, CK_343X),
CLK(NULL, dpll4_m6_ck, dpll4_m6_ck, CK_343X),
CLK(NULL, dpll4_m6x2_ck, dpll4_m6x2_ck, CK_343X),
- CLK(NULL, emu_per_alwon_ck, emu_per_alwon_ck, CK_343X),
+ CLK(etb, emu_per_alwon_ck, emu_per_alwon_ck, CK_343X),
CLK(NULL, dpll5_ck, dpll5_ck, CK_3430ES2),
CLK(NULL, dpll5_m2_ck, dpll5_m2_ck, CK_3430ES2),
CLK(NULL, clkout2_src_ck, clkout2_src_ck, CK_343X),
@@ -151,7 +151,7 @@ static struct omap_clk omap34xx_clks[] = {
CLK(NULL, dpll1_fck,dpll1_fck, CK_343X),
CLK(NULL, mpu_ck, mpu_ck,CK_343X),
CLK(NULL, arm_fck, arm_fck, CK_343X),
- CLK(NULL, emu_mpu_alwon_ck, emu_mpu_alwon_ck, CK_343X),
+ CLK(etb, emu_mpu_alwon_ck, emu_mpu_alwon_ck, CK_343X),
CLK(NULL, dpll2_fck,dpll2_fck, CK_343X),
CLK(NULL, iva2_ck, iva2_ck, CK_343X),
CLK(NULL, l3_ick, l3_ick,CK_343X),
@@ -306,7 +306,7 @@ static struct omap_clk omap34xx_clks[] = {
CLK(omap-mcbsp.2, fck, mcbsp2_fck,CK_343X),
CLK(omap-mcbsp.3, fck, mcbsp3_fck,CK_343X),
CLK(omap-mcbsp.4, fck, mcbsp4_fck,CK_343X),
- CLK(NULL, emu_src_ck, emu_src_ck,CK_343X),
+ CLK(etb, emu_src_ck, emu_src_ck,CK_343X),
CLK(NULL, pclk_fck, pclk_fck, CK_343X),
CLK(NULL, pclkx2_fck, pclkx2_fck,CK_343X),
CLK(NULL, atclk_fck,atclk_fck, CK_343X),
diff --git a/arch/arm/mach-omap2/emu.c b/arch/arm/mach-omap2/emu.c
new file mode 100644
index 000..ec0d984
--- /dev/null
+++ b/arch/arm/mach-omap2/emu.c
@@ -0,0 +1,66 @@
+/*
+ * emu.c
+ *
+ * ETM and ETB CoreSight components' resources as found in OMAP3xxx.
+ *
+ * Copyright (C) 2009 Nokia Corporation.
+ * Alexander Shishkin
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/kernel.h
+#include linux/init.h
+#include linux/types.h
+#include linux/module.h
+#include linux/device.h
+#include linux/amba/bus.h
+#include linux/io.h
+#include linux/clk.h
+#include linux/err.h
+
+MODULE_LICENSE(GPL);
+MODULE_AUTHOR(Alexander Shishkin);
+
+/* Cortex CoreSight components within omap3xxx EMU */
+#define ETM_BASE (L4_EMU_34XX_PHYS + 0x1)
+#define DBG_BASE (L4_EMU_34XX_PHYS + 0x11000)
+#define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000)
[PATCH v3 1/2] arm: a driver for on-chip ETM and ETB
This driver implements support for on-chip Embedded Tracing Macrocell and
Embedded Trace Buffer. It allows to trigger tracing of kernel execution flow
and exporting trace output to userspace via character device and a sysrq
combo.
Trace output can then be decoded by a fairly simple open source tool [1]
which is already sufficient to get the idea of what the kernel is doing.
[1]: http://github.com/virtuoso/etm2human
Signed-off-by: Alexander Shishkin virtu...@slind.org
---
Changes:
v3 -- major update:
* switched from platform device to AMBA device
* started using clk API in a more proper way
* changed omap3 Kconfig part to select the driver instead of depending
on it
v2 -- major update:
* fixes according to comments from Linus Walleij and Anand Gadiyar
* omap3 clock-related stuff moved to platform device
v1 -- fixed comments from Juha Leppanen
v0 -- initial implementation, has been sent to linux-omap only
arch/arm/Kconfig.debug|8 +
arch/arm/include/asm/hardware/coresight.h | 165
arch/arm/kernel/Makefile |2 +
arch/arm/kernel/etm.c | 641 +
4 files changed, 816 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/hardware/coresight.h
create mode 100644 arch/arm/kernel/etm.c
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 1a6f70e..ff54c23 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -83,6 +83,14 @@ config DEBUG_ICEDCC
It does include a timeout to ensure that the system does not
totally freeze when there is nothing connected to read.
+config OC_ETM
+ bool On-chip ETM and ETB
+ select ARM_AMBA
+ help
+ Enables the on-chip embedded trace macrocell and embedded trace
+ buffer driver that will allow you to collect traces of the
+ kernel code.
+
config DEBUG_DC21285_PORT
bool Kernel low-level debugging messages via footbridge serial port
depends on DEBUG_LL FOOTBRIDGE
diff --git a/arch/arm/include/asm/hardware/coresight.h
b/arch/arm/include/asm/hardware/coresight.h
new file mode 100644
index 000..f82b25d
--- /dev/null
+++ b/arch/arm/include/asm/hardware/coresight.h
@@ -0,0 +1,165 @@
+/*
+ * linux/arch/arm/include/asm/hardware/coresight.h
+ *
+ * CoreSight components' registers
+ *
+ * Copyright (C) 2009 Nokia Corporation.
+ * Alexander Shishkin
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_HARDWARE_CORESIGHT_H
+#define __ASM_HARDWARE_CORESIGHT_H
+
+#define TRACER_ACCESSED_BIT0
+#define TRACER_RUNNING_BIT 1
+#define TRACER_CYCLE_ACC_BIT 2
+#define TRACER_ACCESSEDBIT(TRACER_ACCESSED_BIT)
+#define TRACER_RUNNING BIT(TRACER_RUNNING_BIT)
+#define TRACER_CYCLE_ACC BIT(TRACER_CYCLE_ACC_BIT)
+
+struct tracectx {
+ unsigned intetb_bufsz;
+ void __iomem*etb_regs;
+ void __iomem*etm_regs;
+ unsigned long flags;
+ int ncmppairs;
+ int etm_portsz;
+ struct device *dev;
+ struct clk *emu_clk;
+ struct mutexmutex;
+};
+
+#define TRACER_TIMEOUT 1
+
+#define etm_writel(t, v, x) \
+ (__raw_writel((v), (t)-etm_regs + (x)))
+#define etm_readl(t, x) (__raw_readl((t)-etm_regs + (x)))
+
+/* CoreSight Management Registers */
+#define CSMR_LOCKACCESS 0xfb0
+#define CSMR_LOCKSTATUS 0xfb4
+#define CSMR_AUTHSTATUS 0xfb8
+#define CSMR_DEVID 0xfc8
+#define CSMR_DEVTYPE 0xfcc
+/* CoreSight Component Registers */
+#define CSCR_CLASS 0xff4
+
+#define CSCR_PRSR 0x314
+
+#define UNLOCK_MAGIC 0xc5acce55
+
+/* ETM control register, ETM Architecture, 3.3.1 */
+#define ETMR_CTRL 0
+#define ETMCTRL_POWERDOWN 1
+#define ETMCTRL_PROGRAM(1 10)
+#define ETMCTRL_PORTSEL(1 11)
+#define ETMCTRL_DO_CONTEXTID (3 14)
+#define ETMCTRL_PORTMASK1 (7 4)
+#define ETMCTRL_PORTMASK2 (1 21)
+#define ETMCTRL_PORTMASK (ETMCTRL_PORTMASK1 | ETMCTRL_PORTMASK2)
+#define ETMCTRL_PORTSIZE(x) x) 7) 4) | (!!((x) 8)) 21)
+#define ETMCTRL_DO_CPRT(1 1)
+#define ETMCTRL_DATAMASK (3 2)
+#define ETMCTRL_DATA_DO_DATA (1 2)
+#define ETMCTRL_DATA_DO_ADDR (1 3)
+#define ETMCTRL_DATA_DO_BOTH (ETMCTRL_DATA_DO_DATA | ETMCTRL_DATA_DO_ADDR)
+#define ETMCTRL_BRANCH_OUTPUT (1 8)
+#define ETMCTRL_CYCLEACCURATE (1 12)
+
+/* ETM configuration code register */
+#define ETMR_CONFCODE (0x04)
+
+/* ETM trace start/stop resource control register */
+#define ETMR_TRACESSCTRL (0x18)
+
+/* ETM trigger event register */
+#define ETMR_TRIGEVT (0x08)
+
+/* address access type register bits, ETM architecture,
+ * table 3-27 */
+/* - access type */
Re: [PATCH 4/4 v2] ASoC: TWL4030: Driver registration via twl4030_codec MFD
On Thu, Oct 22, 2009 at 01:26:48PM +0300, Peter Ujfalusi wrote: Change the way how the twl4030 soc codec driver is loaded/probed. Use the device probing via tlw4030_codec MFD device. I'm OK with the series but: @@ -147,6 +147,7 @@ config SND_SOC_TLV320DAC33 tristate config SND_SOC_TWL4030 + select TWL4030_CODEC tristate due to Kconfig ignoring dependencies all the individual machine drivers are going to need to select this, and SND_SOC_ALL_CODECS will need to select it if the MFD core is enabled. I should be able to fix this up myself so no need to repost for that alone. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 2/2] OMAP3: add AMBA devices for ETM and ETB
* Alexander Shishkin virtu...@slind.org [091022 09:52]:
This enables on-chip tracing components found in omap3xxx.
Signed-off-by: Alexander Shishkin virtu...@slind.org
This should not cause any merge issues with the pending
omap header changes, so let's merge this via Russell's
queue along with the other ETM patches.
Acked-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/Kconfig |8 +
arch/arm/mach-omap2/Makefile|3 ++
arch/arm/mach-omap2/clock34xx.c |8 ++--
arch/arm/mach-omap2/emu.c | 66
+++
4 files changed, 81 insertions(+), 4 deletions(-)
create mode 100644 arch/arm/mach-omap2/emu.c
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 15cb529..f50d5bc 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -96,3 +96,11 @@ config MACH_OMAP_ZOOM2
config MACH_OMAP_4430SDP
bool OMAP 4430 SDP board
depends on ARCH_OMAP4
+
+config OMAP3_EMU
+ bool OMAP3 tracing peripherals
+ depends on ARCH_OMAP3
+ select OC_ETM
+ help
+ Say Y here to enable tracing hardware of omap3
+
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 954693c..c0ceb8c 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -46,6 +46,9 @@ obj-$(CONFIG_ARCH_OMAP2)+= clock24xx.o
obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o
obj-$(CONFIG_OMAP_PM_SRF)+= resource34xx.o
+# EMU peripherals
+obj-$(CONFIG_OMAP3_EMU) += emu.o
+
iommu-y += iommu2.o
iommu-$(CONFIG_ARCH_OMAP3) += omap3-iommu.o
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index da5bc1f..59d4320 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -123,7 +123,7 @@ static struct omap_clk omap34xx_clks[] = {
CLK(NULL, dpll3_m2x2_ck, dpll3_m2x2_ck, CK_343X),
CLK(NULL, dpll3_m3_ck, dpll3_m3_ck, CK_343X),
CLK(NULL, dpll3_m3x2_ck, dpll3_m3x2_ck, CK_343X),
- CLK(NULL, emu_core_alwon_ck, emu_core_alwon_ck, CK_343X),
+ CLK(etb, emu_core_alwon_ck, emu_core_alwon_ck, CK_343X),
CLK(NULL, dpll4_ck, dpll4_ck, CK_343X),
CLK(NULL, dpll4_x2_ck, dpll4_x2_ck, CK_343X),
CLK(NULL, omap_96m_alwon_fck, omap_96m_alwon_fck, CK_343X),
@@ -142,7 +142,7 @@ static struct omap_clk omap34xx_clks[] = {
CLK(NULL, dpll4_m5x2_ck, dpll4_m5x2_ck, CK_343X),
CLK(NULL, dpll4_m6_ck, dpll4_m6_ck, CK_343X),
CLK(NULL, dpll4_m6x2_ck, dpll4_m6x2_ck, CK_343X),
- CLK(NULL, emu_per_alwon_ck, emu_per_alwon_ck, CK_343X),
+ CLK(etb, emu_per_alwon_ck, emu_per_alwon_ck, CK_343X),
CLK(NULL, dpll5_ck, dpll5_ck, CK_3430ES2),
CLK(NULL, dpll5_m2_ck, dpll5_m2_ck, CK_3430ES2),
CLK(NULL, clkout2_src_ck, clkout2_src_ck, CK_343X),
@@ -151,7 +151,7 @@ static struct omap_clk omap34xx_clks[] = {
CLK(NULL, dpll1_fck,dpll1_fck, CK_343X),
CLK(NULL, mpu_ck, mpu_ck,CK_343X),
CLK(NULL, arm_fck, arm_fck, CK_343X),
- CLK(NULL, emu_mpu_alwon_ck, emu_mpu_alwon_ck, CK_343X),
+ CLK(etb, emu_mpu_alwon_ck, emu_mpu_alwon_ck, CK_343X),
CLK(NULL, dpll2_fck,dpll2_fck, CK_343X),
CLK(NULL, iva2_ck, iva2_ck, CK_343X),
CLK(NULL, l3_ick, l3_ick,CK_343X),
@@ -306,7 +306,7 @@ static struct omap_clk omap34xx_clks[] = {
CLK(omap-mcbsp.2, fck, mcbsp2_fck,CK_343X),
CLK(omap-mcbsp.3, fck, mcbsp3_fck,CK_343X),
CLK(omap-mcbsp.4, fck, mcbsp4_fck,CK_343X),
- CLK(NULL, emu_src_ck, emu_src_ck,CK_343X),
+ CLK(etb, emu_src_ck, emu_src_ck,CK_343X),
CLK(NULL, pclk_fck, pclk_fck, CK_343X),
CLK(NULL, pclkx2_fck, pclkx2_fck,CK_343X),
CLK(NULL, atclk_fck,atclk_fck, CK_343X),
diff --git a/arch/arm/mach-omap2/emu.c b/arch/arm/mach-omap2/emu.c
new file mode 100644
index 000..ec0d984
--- /dev/null
+++ b/arch/arm/mach-omap2/emu.c
@@ -0,0 +1,66 @@
+/*
+ * emu.c
+ *
+ * ETM and ETB CoreSight components' resources as found in OMAP3xxx.
+ *
+ * Copyright (C) 2009 Nokia Corporation.
+ * Alexander Shishkin
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/kernel.h
+#include linux/init.h
+#include linux/types.h
+#include linux/module.h
+#include linux/device.h
+#include linux/amba/bus.h
+#include linux/io.h
+#include linux/clk.h
+#include linux/err.h
+
[PATCH 0/2 v2] OMAP3:PM: refactor Smart Reflex
Hi, Smart Reflex sequencing recommendation has improved in recent times and presents an opportunity to refactor the code to add in understanding that we have of the system. The patch set replaces smartreflex.c with a new revision. Revision 3 of the patch rebased to PM Nishanth Menon (2): OMAP3:PM:SR: prepare: remove old SR code OMAP3:PM:SR: SmartReflex Refactor Rev3.0 arch/arm/mach-omap2/pm-debug.c |3 + arch/arm/mach-omap2/resource34xx.c |8 +- arch/arm/mach-omap2/smartreflex.c | 1988 ++-- arch/arm/mach-omap2/smartreflex.h | 280 +++--- arch/arm/plat-omap/Kconfig | 15 +- 5 files changed, 1363 insertions(+), 931 deletions(-) Regards, Nishanth Menon -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2 v2] OMAP3:PM:SR: prepare: remove old SR code
Preparation: remove original smart reflex code base.
This prevents the refactor appearing as a confusing diff
and hindering patch review process.
Signed-off-by: Nishanth Menon n...@ti.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Roger Quadros ext-roger.quad...@nokia.com
Cc: Kalle Jokiniemi ext-kalle.jokini...@nokia.com
Cc: Teerth Reddy tee...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Högander Jouni jouni.hogan...@nokia.com
Cc: Imberton Guilhem guilhem.imber...@motorola.com
Cc: Mike Chan mikec...@google.com
---
arch/arm/mach-omap2/smartreflex.c | 1024 -
arch/arm/mach-omap2/smartreflex.h | 256 -
2 files changed, 0 insertions(+), 1280 deletions(-)
delete mode 100644 arch/arm/mach-omap2/smartreflex.c
delete mode 100644 arch/arm/mach-omap2/smartreflex.h
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
deleted file mode 100644
index 8946e7c..000
--- a/arch/arm/mach-omap2/smartreflex.c
+++ /dev/null
@@ -1,1024 +0,0 @@
-/*
- * linux/arch/arm/mach-omap3/smartreflex.c
- *
- * OMAP34XX SmartReflex Voltage Control
- *
- * Copyright (C) 2008 Nokia Corporation
- * Kalle Jokiniemi
- *
- * Copyright (C) 2007 Texas Instruments, Inc.
- * Lesly A M x0080...@ti.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-
-#include linux/kernel.h
-#include linux/init.h
-#include linux/interrupt.h
-#include linux/module.h
-#include linux/delay.h
-#include linux/err.h
-#include linux/clk.h
-#include linux/sysfs.h
-#include linux/kobject.h
-#include linux/i2c/twl4030.h
-#include linux/io.h
-
-#include mach/omap34xx.h
-#include mach/control.h
-#include mach/clock.h
-#include mach/omap-pm.h
-
-#include prm.h
-#include smartreflex.h
-#include prm-regbits-34xx.h
-
-#define MAX_TRIES 100
-
-struct omap_sr {
- int srid;
- int is_sr_reset;
- int is_autocomp_active;
- struct clk *clk;
- struct clk *vdd_opp_clk;
- u32 clk_length;
- u32 req_opp_no;
- u32 opp1_nvalue, opp2_nvalue, opp3_nvalue, opp4_nvalue;
- u32 opp5_nvalue;
- u32 senp_mod, senn_mod;
- void __iomem*srbase_addr;
- void __iomem*vpbase_addr;
-};
-
-#define SR_REGADDR(offs) (sr-srbase_addr + offset)
-
-static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
-{
- __raw_writel(value, SR_REGADDR(offset));
-}
-
-static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
- u32 value)
-{
- u32 reg_val;
-
- reg_val = __raw_readl(SR_REGADDR(offset));
- reg_val = ~mask;
- reg_val |= value;
-
- __raw_writel(reg_val, SR_REGADDR(offset));
-}
-
-static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
-{
- return __raw_readl(SR_REGADDR(offset));
-}
-
-static int sr_clk_enable(struct omap_sr *sr)
-{
- if (clk_enable(sr-clk) != 0) {
- pr_err(Could not enable %s\n, sr-clk-name);
- return -1;
- }
-
- /* set fclk- active , iclk- idle */
- sr_modify_reg(sr, ERRCONFIG, SR_CLKACTIVITY_MASK,
- SR_CLKACTIVITY_IOFF_FON);
-
- return 0;
-}
-
-static void sr_clk_disable(struct omap_sr *sr)
-{
- /* set fclk, iclk- idle */
- sr_modify_reg(sr, ERRCONFIG, SR_CLKACTIVITY_MASK,
- SR_CLKACTIVITY_IOFF_FOFF);
-
- clk_disable(sr-clk);
- sr-is_sr_reset = 1;
-}
-
-static struct omap_sr sr1 = {
- .srid = SR1,
- .is_sr_reset= 1,
- .is_autocomp_active = 0,
- .clk_length = 0,
- .srbase_addr= OMAP2_L4_IO_ADDRESS(OMAP34XX_SR1_BASE),
-};
-
-static struct omap_sr sr2 = {
- .srid = SR2,
- .is_sr_reset= 1,
- .is_autocomp_active = 0,
- .clk_length = 0,
- .srbase_addr= OMAP2_L4_IO_ADDRESS(OMAP34XX_SR2_BASE),
-};
-
-static void cal_reciprocal(u32 sensor, u32 *sengain, u32 *rnsen)
-{
- u32 gn, rn, mul;
-
- for (gn = 0; gn GAIN_MAXLIMIT; gn++) {
- mul = 1 (gn + 8);
- rn = mul / sensor;
- if (rn R_MAXLIMIT) {
- *sengain = gn;
- *rnsen = rn;
- }
- }
-}
-
-static u32 cal_test_nvalue(u32 sennval, u32 senpval)
-{
- u32 senpgain, senngain;
- u32 rnsenp, rnsenn;
-
- /* Calculating the gain and reciprocal of the SenN and SenP values */
- cal_reciprocal(senpval, senpgain, rnsenp);
- cal_reciprocal(sennval, senngain, rnsenn);
-
- return (senpgain NVALUERECIPROCAL_SENPGAIN_SHIFT) |
-
[PATCH 2/2 v2] OMAP3:PM:SR: SmartReflex Refactor Rev3.0
**-- SNIP ME
V3 - Bunch of changes:
* Introduce debugfs entries for SR - since these
are variable updates, you can essentially do what we do
with test values, change things but without a rebuild!
* Removed the test values altogether
* srid is standardised to u8 and it is not a bit field
* Guilhem's changes for non-twl5030 PMIC incorporated
* uses ioremap
V2 - made possible to work with non twl5030 PMICs
V1 - original rewrite
**-- END OF SNIP ME
Refactor the smart reflex implementation.
Original implementation summary:
Eduardo Valentin (1):
OMAP3: PM: SmartReflex: Fix scheduled while atomic problem
Kalle Jokiniemi (1):
OMAP3: PM: SmartReflex driver integration
Kevin Hilman (1):
temp: SR: IO_ADDRESS conversion
Phil Carmody (2):
OMAP3: PM: Don't do unnecessary searches in omap_sr_vdd*_autocomp_store
OMAP3: PM: Early exit on invalid parameters
Rajendra Nayak (10):
OMAP3: SR: Fix init voltage on OPP change
OMAP3: SR: Update VDD1/2 voltages at boot
OMAP3: SR: Use sysclk for SR CLKLENGTH calc
OMAP3: SR: Reset voltage level on SR disable
OMAP3: SR: Replace printk's with pr_* calls
OMAP3: SR: Remove redundant defines
OMAP3: SR: Replace (0x1 n) with BIT(n)
OMAP3: SR: Fix SR driver to check for omap-pm return values
OMAP3: PM: Put optimal SMPS stabilization delay
OMAP3: SR: Wait for VP idle before a VP disable
Roger Quadros (4):
OMAP3: PM: Fix Smartreflex when used with PM_NOOP layer
OMAP3: PM: Make Smartreflex driver independent of SRF
OMAP3: PM: Do not Enable SmartReflex if OPP tables not defined
OMAP3: PM: Smartreflex: Fix VDD2 OPP determining logic
Teerth Reddy (1):
OMAP3: SR: Replace SR_PASS/FAIL,SR_TRUE/FALSE
This patch introduces the following changes in addition to refactoring
the implementation:
a) changes the DVFS transition sequences from:
freq, voltage(SR+vp) and viceversa
TO:
disable_vp,SR; freq, voltage(SR+vp) and viceversa; enable_vp,SR
[NOTE: sequence change for disable path - was sr_dis,vp_dis]
This change prevents spikes and unexpected voltage changes
as a result of SR being left enabled at wrong times
b) Major rewrite of smartreflex.c to do the following:
1) Support VCbypass style of voltage configuration as optional
introduce and support forceupdate default as recommended by
OMAP3430 TRM.
2) Centralize operations to allow for simpler and predictable code
flows
3) Modification to SR configured values to be inline with
silicon characterization results
4) cleanup of header
5) Introduce a few omap_pmic weak functions which can be overridden
by platforms implementing PMICs which are different from TWL4030
derivatives
6) srid is standardised to u8 and it is not a bit field
c) Fix ERRCONFIG access to prevent unplanned cleanup of interrupt
status registers - this is done using a interrupt status mask
d) Test nvalues removed instead use debugfs entries to set any values
you like - no more Kconfig option either..
e) Setup h/w timeout based on cpu sysclk and not hardcoded values
g) finegrained with raw register values available over
debugfs in debugfs mount point/pm_debug mount point/
smartreflex/{srid}/
nvalue_opp[1-5] - nvalues for all 5 opps
following register tweakability:
VP register values:
vplimito_value
vpstepmax_value
vpstepmin_value
vpconfig_value
SR Register values:
sr_errconfig_value
sr_config_value
Advice: disable SR before hitting them, no checks at this point.
test value equivalent userspace bash script would be:
mount -t debugfs none /dbg
mount -t sysfs none /sys
#vdd1:
#0x00AAB48A - OPP3
echo -n 11187338 /dbg/pm_debug/smartreflex/1/nvalue_opp3
#0x00ABA2E6 - OPP4
echo -n 11248358 /dbg/pm_debug/smartreflex/1/nvalue_opp4
# 0x00AB90D3 - OPP5
echo -n 11243731 /dbg/pm_debug/smartreflex/1/nvalue_opp5
#setup senn and senp value (essentially +120)
x=`cat /dbg/pm_debug/smartreflex/1/sr_config_value`
y=$((x + 120))
echo -n $y/dbg/pm_debug/smartreflex/1/sr_config_value
#and enable it..
echo -n 1 /sys/power/sr_vdd1_autocomp
#vdd2
#0x00AAC695 -OPP3
echo -n 11191957 /dbg/pm_debug/smartreflex/2/nvalue_opp3
#setup senn and senp value (essentially +120)
x=`cat /dbg/pm_debug/smartreflex/2/sr_config_value`
y=$((x + 120))
echo -n $y/dbg/pm_debug/smartreflex/2/sr_config_value
#and enable it..
echo -n 1 /sys/power/sr_vdd2_autocomp
Tested on:
SDP3430 with test N values as above and with ES3.1 silicon
TODO:
a) Handle scenarios for multiple OMAP variants with differing
SR capabilities (e.g. varying OPP levels - e.g. 3630, 4430 etc..)
[PATCH]Omap3630: Add hsmmc related checks
From 661b13474a7af62c54f7df7a33a818c5e782cc59 Mon Sep 17 00:00:00 2001
From: Madhu madhu...@ti.com
Date: Wed, 21 Oct 2009 16:16:31 -0400
Subject: [PATCH] Omap3630: Add HSMMC related checks.
Add omap3630 conditional checks to devices.c to allow HSMMC3 addition and
mux configuration for HSMMC1/2.
Signed-off-by: Madhusudhan Chikkature madhu...@ti.com
---
arch/arm/mach-omap2/devices.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 7d4513b..1fdfc7f 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -575,7 +575,7 @@ static inline void omap2_mmc_mux(struct
omap_mmc_platform_data *mmc_controller,
}
}
- if (cpu_is_omap3430()) {
+ if (cpu_is_omap3430() || cpu_is_omap3630()) {
if (controller_nr == 0) {
omap_cfg_reg(N28_3430_MMC1_CLK);
omap_cfg_reg(M27_3430_MMC1_CMD);
@@ -642,7 +642,8 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data
**mmc_data,
irq = INT_24XX_MMC2_IRQ;
break;
case 2:
- if (!cpu_is_omap44xx() !cpu_is_omap34xx())
+ if (!cpu_is_omap44xx() !cpu_is_omap34xx()
+!cpu_is_omap3630())
return;
base = OMAP3_MMC3_BASE;
irq = INT_34XX_MMC3_IRQ;
--
1.6.0.4
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[PATCH]Omap3630:Configure HSMMC1 to 4-bit
From 69189aa64954eded29921f3c248a9c1c0f5214e5 Mon Sep 17 00:00:00 2001
From: Madhu madhu...@ti.com
Date: Wed, 21 Oct 2009 16:32:49 -0400
Subject: [PATCH] Omap3630: Configure HSMMC1 to 4-bit.
The HSMMC1 controller on omap3630 supprts only 4-bit mode. If cpu
is 3630 configure HSMMC1 wires to 4-bit.
Signed-off-by: Madhusudhan Chikkature madhu...@ti.com
---
arch/arm/mach-omap2/mmc-twl4030.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/mmc-twl4030.c
b/arch/arm/mach-omap2/mmc-twl4030.c
index 3403914..7bef170 100644
--- a/arch/arm/mach-omap2/mmc-twl4030.c
+++ b/arch/arm/mach-omap2/mmc-twl4030.c
@@ -489,6 +489,12 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info
*controllers)
/* on-chip level shifting via PBIAS0/PBIAS1 */
mmc-slots[0].set_power = twl_mmc1_set_power;
mmc-slots[0].set_sleep = twl_mmc1_set_sleep;
+
+ /* Omap3630 HSMMC1 supports only 4-bit */
+ if (cpu_is_omap3630() c-wires 4) {
+ c-wires = 4;
+ mmc-slots[0].wires = c-wires;
+ }
break;
case 2:
if (c-ext_clock)
--
1.6.0.4
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[PATCH]Omap HSMMC2 8-bit mux configuration
From c6eb46e918044739ba21ec31a9bd09ebcfa9fb53 Mon Sep 17 00:00:00 2001
From: Madhu madhu...@ti.com
Date: Wed, 21 Oct 2009 16:49:24 -0400
Subject: [PATCH] Omap HSMMC2 8-bit mux configuration.
Add support for omap hsmmc2 8-bit mux configuration.
Signed-off-by: Madhusudhan Chikkature madhu...@ti.com
---
arch/arm/mach-omap2/devices.c |6 ++
arch/arm/mach-omap2/mux.c |8
arch/arm/plat-omap/include/plat/mux.h |4
3 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 1fdfc7f..2ca415a 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -609,6 +609,12 @@ static inline void omap2_mmc_mux(struct
omap_mmc_platform_data *mmc_controller,
omap_cfg_reg(AG4_3430_MMC2_DAT2);
omap_cfg_reg(AF4_3430_MMC2_DAT3);
}
+ if (mmc_controller-slots[0].wires == 8) {
+ omap_cfg_reg(AE4_3430_MMC2_DAT4);
+ omap_cfg_reg(AH3_3430_MMC2_DAT5);
+ omap_cfg_reg(AF3_3430_MMC2_DAT6);
+ omap_cfg_reg(AE3_3430_MMC2_DAT7);
+ }
}
/*
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 32c953e..83256d3 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -532,6 +532,14 @@ MUX_CFG_34XX(AG4_3430_MMC2_DAT2, 0x160,
OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
MUX_CFG_34XX(AF4_3430_MMC2_DAT3, 0x162,
OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(AE4_3430_MMC2_DAT4, 0x164,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(AH3_3430_MMC2_DAT5, 0x166,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(AF3_3430_MMC2_DAT6, 0x168,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(AE3_3430_MMC2_DAT7, 0x16A,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
/* MMC3 */
MUX_CFG_34XX(AF10_3430_MMC3_CLK, 0x5d8,
diff --git a/arch/arm/plat-omap/include/plat/mux.h
b/arch/arm/plat-omap/include/plat/mux.h
index f3c1d8a..df38e16 100644
--- a/arch/arm/plat-omap/include/plat/mux.h
+++ b/arch/arm/plat-omap/include/plat/mux.h
@@ -829,6 +829,10 @@ enum omap34xx_index {
AH4_3430_MMC2_DAT1,
AG4_3430_MMC2_DAT2,
AF4_3430_MMC2_DAT3,
+ AE4_3430_MMC2_DAT4,
+ AH3_3430_MMC2_DAT5,
+ AF3_3430_MMC2_DAT6,
+ AE3_3430_MMC2_DAT7,
/* MMC3 */
AF10_3430_MMC3_CLK,
--
1.6.0.4
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Re: [PATCH]Omap3630: Add hsmmc related checks
* Madhusudhan Chikkature madhu...@ti.com [091022 10:38]:
From 661b13474a7af62c54f7df7a33a818c5e782cc59 Mon Sep 17 00:00:00 2001
From: Madhu madhu...@ti.com
Date: Wed, 21 Oct 2009 16:16:31 -0400
Subject: [PATCH] Omap3630: Add HSMMC related checks.
Add omap3630 conditional checks to devices.c to allow HSMMC3 addition and
mux configuration for HSMMC1/2.
Signed-off-by: Madhusudhan Chikkature madhu...@ti.com
---
arch/arm/mach-omap2/devices.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 7d4513b..1fdfc7f 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -575,7 +575,7 @@ static inline void omap2_mmc_mux(struct
omap_mmc_platform_data *mmc_controller,
}
}
- if (cpu_is_omap3430()) {
+ if (cpu_is_omap3430() || cpu_is_omap3630()) {
if (controller_nr == 0) {
omap_cfg_reg(N28_3430_MMC1_CLK);
omap_cfg_reg(M27_3430_MMC1_CMD);
How about using cpu_is_omap34xx() here instead? It's more future proof.
Regards,
Tony
@@ -642,7 +642,8 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data
**mmc_data,
irq = INT_24XX_MMC2_IRQ;
break;
case 2:
- if (!cpu_is_omap44xx() !cpu_is_omap34xx())
+ if (!cpu_is_omap44xx() !cpu_is_omap34xx()
+ !cpu_is_omap3630())
return;
base = OMAP3_MMC3_BASE;
irq = INT_34XX_MMC3_IRQ;
--
1.6.0.4
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[PATCH]Zoom2: Setup HSMMC2 8-bit capability
From 2369a08e238186bf66b677ead62b23786e5b9ac7 Mon Sep 17 00:00:00 2001
From: Madhu madhu...@ti.com
Date: Wed, 21 Oct 2009 16:55:27 -0400
Subject: [PATCH] Zoom2: Setup HSMMC2 8-bit capability.
Zoom2 can support 8-bit operations on HSMMC2.Setup the board file
capability accordingly.
Signed-off-by: Madhusudhan Chikkature madhu...@ti.com
---
arch/arm/mach-omap2/board-zoom2.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/board-zoom2.c
b/arch/arm/mach-omap2/board-zoom2.c
index 56f9d84..ad022ac 100644
--- a/arch/arm/mach-omap2/board-zoom2.c
+++ b/arch/arm/mach-omap2/board-zoom2.c
@@ -163,7 +163,7 @@ static struct twl4030_hsmmc_info mmc[] __initdata = {
},
{
.mmc= 2,
- .wires = 4,
+ .wires = 8,
.gpio_wp= -EINVAL,
},
{} /* Terminator */
--
1.6.0.4
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Re: [PATCH resend] OMAP1: AMS_DELTA: Fix DSP public peripherals support
* Janusz Krzysztofik jkrzy...@tis.icnet.pl [091022 05:22]:
DSP public peripherals used to work on OMAP1510 based (or all OMAP1 class?)
machines as long as old dspgateway code were present in the l-o tree. For
several months it is no longer included, breaking support for McBSP1 based
audio on Amstrad Delta, for example.
This patch, derived from the old dspgateway code, corrects the problem for the
board by simply taking the DSP out of reset state, I guess. That way, things
should not break when a new dsp code is added to the tree, and the change can
be reverted then.
If there are any reports on McBSP1 or other DSP public peripherals not working
for other OMAP1 machines (I've not heard of any for now), I can prepare a more
general patch providing an extra include file with a helper function defined.
Seems like a good fix. Of course it would be nice to also idle the DSP for
some power savings, but maybe we can add something for that this coming merge
window.
Regards,
Tony
Created and tested against linux-2.6.32-rc5
Signed-off-by: Janusz Krzysztofik jkrzy...@tis.icnet.pl
---
Thursday 22 October 2009 02:22:53 Janusz Krzysztofik wrote:
--- linux-2.6.32-rc5/arch/arm/mach-omap1/board-ams-delta.c.orig
2009-10-22
00:55:49.0 +0200
+++ linux-2.6.32-rc5/arch/arm/mach-omap1/board-ams-delta.c 2009-10-22
01:46:39.0 +0200
Tony,
The above lines has been mangled by my mailer, that's why I resend for your
convenience.
--- linux-2.6.32-rc5/arch/arm/mach-omap1/board-ams-delta.c.orig
2009-10-22 00:55:49.0 +0200
+++ linux-2.6.32-rc5/arch/arm/mach-omap1/board-ams-delta.c2009-10-22
01:46:39.0 +0200
@@ -235,6 +235,8 @@ static void __init ams_delta_init(void)
omap_usb_init(ams_delta_usb_config);
platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices));
+
+ omap_writew(omap_readw(ARM_RSTCT1) | 0x0004, ARM_RSTCT1);
}
static struct plat_serial8250_port ams_delta_modem_ports[] = {
--
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Re: [PATCH] omapfb: Wrong test on unsigned?
* Aguirre Rodriguez, Sergio Alberto saagui...@ti.com [091021 08:41]:
-Original Message-
From: linux-omap-ow...@vger.kernel.org
[mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Roel Kluin
Sent: Wednesday, October 21, 2009 10:44 AM
To: Aguirre Rodriguez, Sergio Alberto
Cc: Imre Deak; linux-fbdev-de...@lists.sourceforge.net;
linux-omap@vger.kernel.org; Andrew Morton
Subject: Re: [PATCH] omapfb: Wrong test on unsigned?
regno is unsigned so the test didn't work. If regno
can't be used return an error.
Signed-off-by: Roel Kluin roel.kl...@gmail.com
---
Is this correct? please review.
diff --git a/drivers/video/omap/omapfb_main.c
b/drivers/video/omap/omapfb_main.c
index 0d0c8c8..cc7dd93 100644
--- a/drivers/video/omap/omapfb_main.c
+++ b/drivers/video/omap/omapfb_main.c
@@ -286,7 +286,7 @@ static int _setcolreg(struct fb_info
*info, u_int regno, u_int red, u_int green,
if (r != 0)
break;
-if (regno 0) {
+if ((int)regno 0) {
Hmm...
Isn't regno unsigned integer from the start?
yes
2 things here:
- regno will never be negative.
- Casting won't make a difference in the meaning., it'll
make a negative only when:
regno ((2^32) / 2)
Which doesn't make any sense IMHO.
I think it is strange that _setcolreg() accepts a regno that
is invalid,
ignores it and just returns as if all was OK. If you agree
then you may
like the patch below.
Yep. Looks nicer to me ;)
Acked-by: Sergio Aguirre saagui...@ti.com
Looks good to me too.
Acked-by: Tony Lindgren t...@atomide.com
Regards,
Sergio
Regards,
Sergio
Thanks,
Roel
diff --git a/drivers/video/omap/omapfb_main.c
b/drivers/video/omap/omapfb_main.c
index 0d0c8c8..4da94d0 100644
--- a/drivers/video/omap/omapfb_main.c
+++ b/drivers/video/omap/omapfb_main.c
@@ -285,12 +285,6 @@ static int _setcolreg(struct fb_info
*info, u_int regno, u_int red, u_int green,
case OMAPFB_COLOR_RGB444:
if (r != 0)
break;
-
- if (regno 0) {
- r = -EINVAL;
- break;
- }
-
if (regno 16) {
u16 pal;
pal = ((red (16 - var-red.length))
@@ -299,6 +293,8 @@ static int _setcolreg(struct fb_info
*info, u_int regno, u_int red, u_int green,
var-green.offset) |
(blue (16 - var-blue.length));
((u32 *)(info-pseudo_palette))[regno] = pal;
+ } else {
+ r = -EINVAL;
}
break;
default:
--
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Re: [PATCH] OMAP1: fix redundant UARTs pin muxing that can break other hardware support
* Janusz Krzysztofik jkrzy...@tis.icnet.pl [091021 10:11]:
Wednesday 21 October 2009 02:51:35 Tony Lindgren napisał(a):
Let's just remove the omap_cfg_reg() calls from mach-omap1/serial.c, and
add them to the board-*.c files like you suggest above. We should be able
to find which ports to mux by looking at the enabled_uarts mask in the
commit mentioned above.
Here you are (board-*.c changes limited to those OMAP1510 based).
Created against linux-2.6.32-rc5.
Tested on Amsdtrad Delta only.
Thanks, I'll add it to the omap-fixes series for this -rc cycle with
a description on how things broke.
BTW, you might want to also take a look at adding support for powering
down the uarts with an idle timer for mach-omap1/serial.c the same
way as mach-omap2/serial.c does.
Otherwise the enabled serial ports keep the system from hitting
retention during idle.
Regards,
Tony
Signed-off-by: Janusz Krzysztofik jkrzy...@tis.icnet.pl
---
diff -upr linux-2.6.32-rc5.orig/arch/arm/mach-omap1/board-ams-delta.c
linux-2.6.32-rc5.fixed/arch/arm/mach-omap1/board-ams-delta.c
--- linux-2.6.32-rc5.orig/arch/arm/mach-omap1/board-ams-delta.c
2009-10-16 02:41:50.0 +0200
+++ linux-2.6.32-rc5.fixed/arch/arm/mach-omap1/board-ams-delta.c
2009-10-21 17:41:29.0 +0200
@@ -219,6 +219,10 @@ static struct platform_device *ams_delta
static void __init ams_delta_init(void)
{
+ /* setup mux pins for uarts, removed from serial.c */
+ omap_cfg_reg(UART1_TX);
+ omap_cfg_reg(UART1_RTS);
+
iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
omap_board_config = ams_delta_config;
diff -upr linux-2.6.32-rc5.orig/arch/arm/mach-omap1/board-generic.c
linux-2.6.32-rc5.fixed/arch/arm/mach-omap1/board-generic.c
--- linux-2.6.32-rc5.orig/arch/arm/mach-omap1/board-generic.c 2009-10-16
02:41:50.0 +0200
+++ linux-2.6.32-rc5.fixed/arch/arm/mach-omap1/board-generic.c
2009-10-21 18:15:37.0 +0200
@@ -64,6 +64,14 @@ static void __init omap_generic_init(voi
{
#ifdef CONFIG_ARCH_OMAP15XX
if (cpu_is_omap15xx()) {
+ /* setup mux pins for uarts, removed from serial.c */
+ omap_cfg_reg(UART1_TX);
+ omap_cfg_reg(UART1_RTS);
+ omap_cfg_reg(UART2_TX);
+ omap_cfg_reg(UART2_RTS);
+ omap_cfg_reg(UART3_TX);
+ omap_cfg_reg(UART3_RX);
+
omap_usb_init(generic1510_usb_config);
}
#endif
diff -upr linux-2.6.32-rc5.orig/arch/arm/mach-omap1/board-innovator.c
linux-2.6.32-rc5.fixed/arch/arm/mach-omap1/board-innovator.c
--- linux-2.6.32-rc5.orig/arch/arm/mach-omap1/board-innovator.c
2009-10-16 02:41:50.0 +0200
+++ linux-2.6.32-rc5.fixed/arch/arm/mach-omap1/board-innovator.c
2009-10-21 18:16:59.0 +0200
@@ -376,6 +376,24 @@ static void __init innovator_init(void)
{
#ifdef CONFIG_ARCH_OMAP15XX
if (cpu_is_omap1510()) {
+ /* setup mux pins for uarts, removed from serial.c */
+ omap_cfg_reg(UART1_TX);
+ omap_cfg_reg(UART1_RTS);
+ omap_cfg_reg(UART2_TX);
+ omap_cfg_reg(UART2_RTS);
+ omap_cfg_reg(UART3_TX);
+ omap_cfg_reg(UART3_RX);
+
+ reg = fpga_read(OMAP1510_FPGA_POWER);
+ reg |= OMAP1510_FPGA_PCR_COM1_EN;
+ fpga_write(reg, OMAP1510_FPGA_POWER);
+ udelay(10);
+
+ reg = fpga_read(OMAP1510_FPGA_POWER);
+ reg |= OMAP1510_FPGA_PCR_COM2_EN;
+ fpga_write(reg, OMAP1510_FPGA_POWER);
+ udelay(10);
+
platform_add_devices(innovator1510_devices,
ARRAY_SIZE(innovator1510_devices));
spi_register_board_info(innovator1510_boardinfo,
ARRAY_SIZE(innovator1510_boardinfo));
diff -upr linux-2.6.32-rc5.orig/arch/arm/mach-omap1/board-palmte.c
linux-2.6.32-rc5.fixed/arch/arm/mach-omap1/board-palmte.c
--- linux-2.6.32-rc5.orig/arch/arm/mach-omap1/board-palmte.c 2009-10-16
02:41:50.0 +0200
+++ linux-2.6.32-rc5.fixed/arch/arm/mach-omap1/board-palmte.c 2009-10-21
17:38:59.0 +0200
@@ -342,6 +342,14 @@ static void __init palmte_misc_gpio_setu
static void __init omap_palmte_init(void)
{
+ /* setup mux pins for uarts, removed from serial.c */
+ omap_cfg_reg(UART1_TX);
+ omap_cfg_reg(UART1_RTS);
+ omap_cfg_reg(UART2_TX);
+ omap_cfg_reg(UART2_RTS);
+ omap_cfg_reg(UART3_TX);
+ omap_cfg_reg(UART3_RX);
+
omap_board_config = palmte_config;
omap_board_config_size = ARRAY_SIZE(palmte_config);
diff -upr linux-2.6.32-rc5.orig/arch/arm/mach-omap1/board-palmtt.c
linux-2.6.32-rc5.fixed/arch/arm/mach-omap1/board-palmtt.c
--- linux-2.6.32-rc5.orig/arch/arm/mach-omap1/board-palmtt.c 2009-10-16
02:41:50.0 +0200
+++ linux-2.6.32-rc5.fixed/arch/arm/mach-omap1/board-palmtt.c
[APPLIED] [PATCH resend] OMAP1: AMS_DELTA: Fix DSP public peripherals support
This patch has been applied to the linux-omap by youw fwiendly patch wobot. Branch in linux-omap: omap-fixes Initial commit ID (Likely to change): e672f57540ddd030f52aa14a03aa5745e97da406 PatchWorks http://patchwork.kernel.org/patch/55312/ Git (Likely to change, and takes a while to get mirrored) http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commit;h=e672f57540ddd030f52aa14a03aa5745e97da406 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] OMAP: Fix omap-keypad by restoring old keypad.h without breaking omap2 boards that use matrix_keypad
* Janusz Krzysztofik jkrzy...@tis.icnet.pl [091021 11:10]: Wednesday 21 October 2009 17:59:40 Tony Lindgren napisał(a): * Janusz Krzysztofik jkrzy...@tis.icnet.pl [091021 07:21]: Hi, Commit 4f5433324d1e29cf234d5b1b14782c0fc2948298 had made machines that use new matrix_keypad based drivers happy while breaking those that still use old omap-keypad driver. The patch fixes omap-keypad device for my Amstrad Delta (tested) and probably 11 more OMAP1 based machines. It leaves a potential similiar problem on OMAP2 H4 machine not addressed. I would say that those new, matrix_keypad based drivers should be corrected to simply not include arch/arm/plat-omap/include/mach/keypad.h, which should keep serving omap-keypad based machines until they are all upgraded to use matrix_keypad. Hmm, yeah let's try to do that instead. ... Maybe we should add: #warning: Please update the board to use matrix_keypad.h instead Here you are. Created against linux-2.6.32-rc5. Compile tested with omap_3430sdp_defconfig and rx51_defconfig. Thanks, adding this to omap-fixes. Tony Signed-off-by: Janusz Krzysztofik jkrzy...@tis.icnet.pl --- diff -upr linux-2.6.32-rc5.orig/arch/arm/mach-omap2/board-3430sdp.c linux-2.6.32-rc5.fixed/arch/arm/mach-omap2/board-3430sdp.c --- linux-2.6.32-rc5.orig/arch/arm/mach-omap2/board-3430sdp.c 2009-10-16 02:41:50.0 +0200 +++ linux-2.6.32-rc5.fixed/arch/arm/mach-omap2/board-3430sdp.c 2009-10-21 19:28:48.0 +0200 @@ -17,6 +17,7 @@ #include linux/platform_device.h #include linux/delay.h #include linux/input.h +#include linux/input/matrix_keypad.h #include linux/spi/spi.h #include linux/spi/ads7846.h #include linux/i2c/twl4030.h @@ -38,7 +39,6 @@ #include mach/gpmc.h #include mach/control.h -#include mach/keypad.h #include mach/gpmc-smc91x.h #include sdram-qimonda-hyb18m512160af-6.h diff -upr linux-2.6.32-rc5.orig/arch/arm/mach-omap2/board-ldp.c linux-2.6.32-rc5.fixed/arch/arm/mach-omap2/board-ldp.c --- linux-2.6.32-rc5.orig/arch/arm/mach-omap2/board-ldp.c 2009-10-16 02:41:50.0 +0200 +++ linux-2.6.32-rc5.fixed/arch/arm/mach-omap2/board-ldp.c2009-10-21 19:30:03.0 +0200 @@ -16,6 +16,7 @@ #include linux/platform_device.h #include linux/delay.h #include linux/input.h +#include linux/input/matrix_keypad.h #include linux/gpio_keys.h #include linux/workqueue.h #include linux/err.h @@ -41,7 +42,6 @@ #include asm/delay.h #include mach/control.h #include mach/usb.h -#include mach/keypad.h #include mmc-twl4030.h diff -upr linux-2.6.32-rc5.orig/arch/arm/mach-omap2/board-omap3evm.c linux-2.6.32-rc5.fixed/arch/arm/mach-omap2/board-omap3evm.c --- linux-2.6.32-rc5.orig/arch/arm/mach-omap2/board-omap3evm.c 2009-10-16 02:41:50.0 +0200 +++ linux-2.6.32-rc5.fixed/arch/arm/mach-omap2/board-omap3evm.c 2009-10-21 19:30:16.0 +0200 @@ -20,6 +20,7 @@ #include linux/clk.h #include linux/gpio.h #include linux/input.h +#include linux/input/matrix_keypad.h #include linux/leds.h #include linux/spi/spi.h @@ -37,7 +38,6 @@ #include mach/usb.h #include mach/common.h #include mach/mcspi.h -#include mach/keypad.h #include sdram-micron-mt46h32m32lf-6.h #include mmc-twl4030.h diff -upr linux-2.6.32-rc5.orig/arch/arm/mach-omap2/board-omap3pandora.c linux-2.6.32-rc5.fixed/arch/arm/mach-omap2/board-omap3pandora.c --- linux-2.6.32-rc5.orig/arch/arm/mach-omap2/board-omap3pandora.c 2009-10-16 02:41:50.0 +0200 +++ linux-2.6.32-rc5.fixed/arch/arm/mach-omap2/board-omap3pandora.c 2009-10-21 19:28:03.0 +0200 @@ -27,6 +27,7 @@ #include linux/i2c/twl4030.h #include linux/leds.h #include linux/input.h +#include linux/input/matrix_keypad.h #include linux/gpio_keys.h #include asm/mach-types.h @@ -39,7 +40,6 @@ #include mach/hardware.h #include mach/mcspi.h #include mach/usb.h -#include mach/keypad.h #include mach/mux.h #include sdram-micron-mt46h32m32lf-6.h diff -upr linux-2.6.32-rc5.orig/arch/arm/mach-omap2/board-rx51-peripherals.c linux-2.6.32-rc5.fixed/arch/arm/mach-omap2/board-rx51-peripherals.c --- linux-2.6.32-rc5.orig/arch/arm/mach-omap2/board-rx51-peripherals.c 2009-10-16 02:41:50.0 +0200 +++ linux-2.6.32-rc5.fixed/arch/arm/mach-omap2/board-rx51-peripherals.c 2009-10-21 19:29:31.0 +0200 @@ -12,6 +12,7 @@ #include linux/init.h #include linux/platform_device.h #include linux/input.h +#include linux/input/matrix_keypad.h #include linux/spi/spi.h #include linux/i2c.h #include linux/i2c/twl4030.h @@ -27,7 +28,6 @@ #include mach/common.h #include mach/dma.h #include mach/gpmc.h -#include mach/keypad.h #include mach/onenand.h #include mach/gpmc-smc91x.h diff -upr linux-2.6.32-rc5.orig/arch/arm/mach-omap2/board-rx51.c linux-2.6.32-rc5.fixed/arch/arm/mach-omap2/board-rx51.c ---
[APPLIED] [PATCH] ARM: OMAP3: evm: initialize vmmc and vmmc_aux regulators
This patch has been applied to the linux-omap by youw fwiendly patch wobot. Branch in linux-omap: for-next Initial commit ID (Likely to change): d237a6c9aa080334bb83e545bb6b7b74aa565334 PatchWorks http://patchwork.kernel.org/patch/46068/ Git (Likely to change, and takes a while to get mirrored) http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commit;h=d237a6c9aa080334bb83e545bb6b7b74aa565334 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[APPLIED] [PATCH 1/2] ARM: OMAP3: add CompuLab CM-T35 module
This patch has been applied to the linux-omap by youw fwiendly patch wobot. Branch in linux-omap: for-next Initial commit ID (Likely to change): 5aa0983aac0ad56ee62e0ed850e36aac3c2bfda8 PatchWorks http://patchwork.kernel.org/patch/55052/ Git (Likely to change, and takes a while to get mirrored) http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commit;h=5aa0983aac0ad56ee62e0ed850e36aac3c2bfda8 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[APPLIED] [PATCH 2/2] ARM: OMAP3: cm-t35: add defconfig
This patch has been applied to the linux-omap by youw fwiendly patch wobot. Branch in linux-omap: for-next Initial commit ID (Likely to change): cd75dbbd04962542111ce16277c74771196a4cad PatchWorks http://patchwork.kernel.org/patch/55053/ Git (Likely to change, and takes a while to get mirrored) http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commit;h=cd75dbbd04962542111ce16277c74771196a4cad -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[APPLIED] [PATCH] ARM: OMAP3: cm-t35: add EHCI support
This patch has been applied to the linux-omap by youw fwiendly patch wobot. Branch in linux-omap: ehci Initial commit ID (Likely to change): 6a0dc193cf2e6055ffd9b1c34fa9f99e5836aabf PatchWorks http://patchwork.kernel.org/patch/53620/ Git (Likely to change, and takes a while to get mirrored) http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commit;h=6a0dc193cf2e6055ffd9b1c34fa9f99e5836aabf -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH]Omap3630: Add hsmmc related checks
-Original Message-
From: Tony Lindgren [mailto:t...@atomide.com]
Sent: Thursday, October 22, 2009 12:44 PM
To: Madhusudhan Chikkature
Cc: linux-omap@vger.kernel.org
Subject: Re: [PATCH]Omap3630: Add hsmmc related checks
* Madhusudhan Chikkature madhu...@ti.com [091022 10:38]:
From 661b13474a7af62c54f7df7a33a818c5e782cc59 Mon Sep 17 00:00:00 2001
From: Madhu madhu...@ti.com
Date: Wed, 21 Oct 2009 16:16:31 -0400
Subject: [PATCH] Omap3630: Add HSMMC related checks.
Add omap3630 conditional checks to devices.c to allow HSMMC3 addition
and
mux configuration for HSMMC1/2.
Signed-off-by: Madhusudhan Chikkature madhu...@ti.com
---
arch/arm/mach-omap2/devices.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-
omap2/devices.c
index 7d4513b..1fdfc7f 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -575,7 +575,7 @@ static inline void omap2_mmc_mux(struct
omap_mmc_platform_data *mmc_controller,
}
}
- if (cpu_is_omap3430()) {
+ if (cpu_is_omap3430() || cpu_is_omap3630()) {
if (controller_nr == 0) {
omap_cfg_reg(N28_3430_MMC1_CLK);
omap_cfg_reg(M27_3430_MMC1_CMD);
How about using cpu_is_omap34xx() here instead? It's more future proof.
Regards,
Tony
Yes. That makes sense. I will submit V2.
Regards,
Madhu
@@ -642,7 +642,8 @@ void __init omap2_init_mmc(struct
omap_mmc_platform_data
**mmc_data,
irq = INT_24XX_MMC2_IRQ;
break;
case 2:
- if (!cpu_is_omap44xx() !cpu_is_omap34xx())
+ if (!cpu_is_omap44xx() !cpu_is_omap34xx()
+!cpu_is_omap3630())
return;
base = OMAP3_MMC3_BASE;
irq = INT_34XX_MMC3_IRQ;
--
1.6.0.4
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Re: [PATCH resend] OMAP1: AMS_DELTA: Fix DSP public peripherals support
Thursday 22 October 2009 20:06:59 Tony Lindgren napisał(a): * Janusz Krzysztofik jkrzy...@tis.icnet.pl [091022 05:22]: DSP public peripherals used to work on OMAP1510 based (or all OMAP1 class?) machines as long as old dspgateway code were present in the l-o tree. For several months it is no longer included, breaking support for McBSP1 based audio on Amstrad Delta, for example. This patch, derived from the old dspgateway code, corrects the problem for the board by simply taking the DSP out of reset state, I guess. That way, things should not break when a new dsp code is added to the tree, and the change can be reverted then. Seems like a good fix. Tony, Does it mean that you can push it as a fix for 2.6.32? That would be great if my successfull efforts on getting audio support for Amstrad Delta included in the mainline tree would result in a fully functional solution! I start preparing a new ams_delta_defconfig then. Thanks, Janusz -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH resend] OMAP1: AMS_DELTA: Fix DSP public peripherals support
* Janusz Krzysztofik jkrzy...@tis.icnet.pl [091022 12:15]: Thursday 22 October 2009 20:06:59 Tony Lindgren napisał(a): * Janusz Krzysztofik jkrzy...@tis.icnet.pl [091022 05:22]: DSP public peripherals used to work on OMAP1510 based (or all OMAP1 class?) machines as long as old dspgateway code were present in the l-o tree. For several months it is no longer included, breaking support for McBSP1 based audio on Amstrad Delta, for example. This patch, derived from the old dspgateway code, corrects the problem for the board by simply taking the DSP out of reset state, I guess. That way, things should not break when a new dsp code is added to the tree, and the change can be reverted then. Seems like a good fix. Tony, Does it mean that you can push it as a fix for 2.6.32? That would be great if my successfull efforts on getting audio support for Amstrad Delta included in the mainline tree would result in a fully functional solution! Yeah we should be able to merge those as fixes. I start preparing a new ams_delta_defconfig then. Cool :) Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH]Omap3630: Add hsmmc related checks
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of Chikkature Rajashekar, Madhusudhan
Sent: Thursday, October 22, 2009 2:13 PM
From: Tony Lindgren [mailto:t...@atomide.com]
Sent: Thursday, October 22, 2009 12:44 PM
* Madhusudhan Chikkature madhu...@ti.com [091022 10:38]:
From 661b13474a7af62c54f7df7a33a818c5e782cc59 Mon Sep 17 00:00:00 2001
From: Madhu madhu...@ti.com
Date: Wed, 21 Oct 2009 16:16:31 -0400
Subject: [PATCH] Omap3630: Add HSMMC related checks.
Add omap3630 conditional checks to devices.c to allow HSMMC3 addition
and
mux configuration for HSMMC1/2.
Signed-off-by: Madhusudhan Chikkature madhu...@ti.com
---
arch/arm/mach-omap2/devices.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-
omap2/devices.c
index 7d4513b..1fdfc7f 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -575,7 +575,7 @@ static inline void omap2_mmc_mux(struct
omap_mmc_platform_data *mmc_controller,
}
}
- if (cpu_is_omap3430()) {
+ if (cpu_is_omap3430() || cpu_is_omap3630()) {
if (controller_nr == 0) {
omap_cfg_reg(N28_3430_MMC1_CLK);
omap_cfg_reg(M27_3430_MMC1_CMD);
How about using cpu_is_omap34xx() here instead? It's more future proof.
Regards,
Tony
Yes. That makes sense. I will submit V2.
Regards,
Madhu
@@ -642,7 +642,8 @@ void __init omap2_init_mmc(struct
omap_mmc_platform_data
**mmc_data,
irq = INT_24XX_MMC2_IRQ;
break;
case 2:
- if (!cpu_is_omap44xx() !cpu_is_omap34xx())
+ if (!cpu_is_omap44xx() !cpu_is_omap34xx()
+ !cpu_is_omap3630())
!cpu_is_omap3630() is redundant here.. please consider for your v2.
return;
base = OMAP3_MMC3_BASE;
irq = INT_34XX_MMC3_IRQ;
--
Regards,
Nishanth Menon
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RE: [PATCH]Omap3630: Add hsmmc related checks
-Original Message-
From: Menon, Nishanth [mailto:n...@ti.com]
Sent: Thursday, October 22, 2009 2:37 PM
To: Chikkature Rajashekar, Madhusudhan; 'Tony Lindgren'
Cc: linux-omap@vger.kernel.org
Subject: RE: [PATCH]Omap3630: Add hsmmc related checks
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of Chikkature Rajashekar, Madhusudhan
Sent: Thursday, October 22, 2009 2:13 PM
From: Tony Lindgren [mailto:t...@atomide.com]
Sent: Thursday, October 22, 2009 12:44 PM
* Madhusudhan Chikkature madhu...@ti.com [091022 10:38]:
From 661b13474a7af62c54f7df7a33a818c5e782cc59 Mon Sep 17 00:00:00
2001
From: Madhu madhu...@ti.com
Date: Wed, 21 Oct 2009 16:16:31 -0400
Subject: [PATCH] Omap3630: Add HSMMC related checks.
Add omap3630 conditional checks to devices.c to allow HSMMC3
addition
and
mux configuration for HSMMC1/2.
Signed-off-by: Madhusudhan Chikkature madhu...@ti.com
---
arch/arm/mach-omap2/devices.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-
omap2/devices.c
index 7d4513b..1fdfc7f 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -575,7 +575,7 @@ static inline void omap2_mmc_mux(struct
omap_mmc_platform_data *mmc_controller,
}
}
- if (cpu_is_omap3430()) {
+ if (cpu_is_omap3430() || cpu_is_omap3630()) {
if (controller_nr == 0) {
omap_cfg_reg(N28_3430_MMC1_CLK);
omap_cfg_reg(M27_3430_MMC1_CMD);
How about using cpu_is_omap34xx() here instead? It's more future
proof.
Regards,
Tony
Yes. That makes sense. I will submit V2.
Regards,
Madhu
@@ -642,7 +642,8 @@ void __init omap2_init_mmc(struct
omap_mmc_platform_data
**mmc_data,
irq = INT_24XX_MMC2_IRQ;
break;
case 2:
- if (!cpu_is_omap44xx()
!cpu_is_omap34xx())
+ if (!cpu_is_omap44xx() !cpu_is_omap34xx()
+!cpu_is_omap3630())
!cpu_is_omap3630() is redundant here.. please consider for your v2.
Yes. I have taken care of that in V2.
Regards,
Madhu
return;
base = OMAP3_MMC3_BASE;
irq = INT_34XX_MMC3_IRQ;
--
Regards,
Nishanth Menon
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[PATCH V2]Omap3630: Add hsmmc related checks
From 102c97677b6a30b7741e1612c8fc03d60921f4e8 Mon Sep 17 00:00:00 2001
From: Madhu madhu...@ti.com
Date: Wed, 21 Oct 2009 16:16:31 -0400
Subject: [PATCH] Omap3630: Add HSMMC related checks.
Change the cpu_is_omap3430() check to cpu_is_omap34xx() to allow HSMMC1/2
mux configuration for omap3630.
Signed-off-by: Madhusudhan Chikkature madhu...@ti.com
---
arch/arm/mach-omap2/devices.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 7d4513b..8d23e1f 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -575,7 +575,7 @@ static inline void omap2_mmc_mux(struct
omap_mmc_platform_data *mmc_controller,
}
}
- if (cpu_is_omap3430()) {
+ if (cpu_is_omap34xx()) {
if (controller_nr == 0) {
omap_cfg_reg(N28_3430_MMC1_CLK);
omap_cfg_reg(M27_3430_MMC1_CMD);
--
1.6.0.4
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Re: [PATCH] updated mach-types file
* Vikram Pandita vikram.pand...@ti.com [091021 18:07]: this patch updates the auto-generated mach-types file to enable addition of 3630 boards: 1) zoom3 2) sdp3630 Signed-off-by: Vikram Pandita vikram.pand...@ti.com --- Tony: Could you Temporarily host this patch on linux-omap tree till rmk pulls in mach-types. This would allow us to add 3630 board files How about only add the lines needed? I can put it into omap-testing branch then. Tony arch/arm/tools/mach-types | 54 - 1 files changed, 53 insertions(+), 1 deletions(-) diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index 94be7bb..0160378 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types @@ -12,7 +12,7 @@ # # http://www.arm.linux.org.uk/developer/machines/?action=new # -# Last update: Fri Sep 18 21:42:00 2009 +# Last update: Wed Oct 21 15:33:08 2009 # # machine_is_xxx CONFIG_ MACH_TYPE_xxx number # @@ -2421,3 +2421,55 @@ libertyMACH_LIBERTY LIBERTY 2434 mh355MACH_MH355 MH355 2435 pc7802 MACH_PC7802 PC7802 2436 gnet_sgc MACH_GNET_SGC GNET_SGC2437 +einstein15 MACH_EINSTEIN15 EINSTEIN15 2438 +cmpd MACH_CMPD CMPD2439 +davinci_hase1MACH_DAVINCI_HASE1 DAVINCI_HASE1 2440 +lgeincitephone MACH_LGEINCITEPHONE LGEINCITEPHONE 2441 +ea313x MACH_EA313X EA313X 2442 +fwbd_39064 MACH_FWBD_39064 FWBD_39064 2443 +fwbd_390128 MACH_FWBD_390128FWBD_390128 2444 +pelco_moeMACH_PELCO_MOE PELCO_MOE 2445 +minimix27MACH_MINIMIX27 MINIMIX27 2446 +omap3_thunderMACH_OMAP3_THUNDER OMAP3_THUNDER 2447 +passionc MACH_PASSIONC PASSIONC2448 +mx27amataMACH_MX27AMATA MX27AMATA 2449 +bgat1MACH_BGAT1 BGAT1 2450 +buzz MACH_BUZZ BUZZ2451 +mb9g20 MACH_MB9G20 MB9G20 2452 +yushan MACH_YUSHAN YUSHAN 2453 +lizard MACH_LIZARD LIZARD 2454 +omap3polycom MACH_OMAP3POLYCOM OMAP3POLYCOM2455 +smdkv210 MACH_SMDKV210 SMDKV2102456 +bravoMACH_BRAVO BRAVO 2457 +siogentoo1 MACH_SIOGENTOO1 SIOGENTOO1 2458 +siogentoo2 MACH_SIOGENTOO2 SIOGENTOO2 2459 +sm3k MACH_SM3K SM3K2460 +acer_tempo_f900 MACH_ACER_TEMPO_F900ACER_TEMPO_F900 2461 +sst61vc010_dev MACH_SST61VC010_DEV SST61VC010_DEV 2462 +glittertind MACH_GLITTERTINDGLITTERTIND 2463 +omap_zoom3 MACH_OMAP_ZOOM3 OMAP_ZOOM3 2464 +omap_3630sdp MACH_OMAP_3630SDP OMAP_3630SDP2465 +cybook2440 MACH_CYBOOK2440 CYBOOK2440 2466 +torino_s MACH_TORINO_S TORINO_S2467 +havana MACH_HAVANA HAVANA 2468 +beaumont_11 MACH_BEAUMONT_11BEAUMONT_11 2469 +vanguard MACH_VANGUARD VANGUARD2470 +s5pc110_dracoMACH_S5PC110_DRACO S5PC110_DRACO 2471 +cartesio_two MACH_CARTESIO_TWO CARTESIO_TWO2472 +asterMACH_ASTER ASTER 2473 +voguesv210 MACH_VOGUESV210 VOGUESV210 2474 +acm500x MACH_ACM500XACM500X 2475 +km9260 MACH_KM9260 KM9260 2476 +nideflexg1 MACH_NIDEFLEXG1 NIDEFLEXG1 2477 +ctera_plug_ioMACH_CTERA_PLUG_IO CTERA_PLUG_IO 2478 +smartq7 MACH_SMARTQ7SMARTQ7 2479 +at91sam9g10ek2 MACH_AT91SAM9G10EK2 AT91SAM9G10EK2 2480 +asusp527 MACH_ASUSP527 ASUSP5272481 +at91sam9g20mpm2 MACH_AT91SAM9G20MPM2AT91SAM9G20MPM2
Re: htc elf (omap850 based device)
* Cory Maccarrone darkstar6...@gmail.com [091022 08:13]: On Thu, Oct 22, 2009 at 2:05 AM, Alexander Kaidalov alexanderkaida...@spbstu.ru wrote: Hi everyone! I've run wing-linux on my phone few days ago and found that it's core quite old. Few devices are not supported or working wrong. I'd like to help to improve support for this phone but I don't know current state of affairs. Is there anyone working with it now? -- Alexander Kaidalov I've been working on getting HTC Herald support (also from wing-linux) into the kernel, though it's dependent on patches by Alistair Buxton of linwizard getting in. I submitted them to this list a while ago and haven't heard anything about them. Let's plan on getting those into for-next within few days. Sorry, there's been quite a few things changing, so I've only started looking into the board files again recently. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: omap eac.c file
* Belisko Marek marek.beli...@gmail.com [091022 00:40]: Hi, I'm trying to figure out where are omap2420 eac codec code. In 2.6.25 there was for N800 written in sound/arm/eac.c but in latest tree there is no such file. I'm trying to get some clue because I would like to write similar for omap850. We've dropped all the old legacy code from the linux-omap tree, and only queue things that are going to mainline now. For the old code, you should be able to find it in one of the earlier branches, like omap-2.6.30 maybe. Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] updated mach-types file
-Original Message- From: Tony Lindgren [mailto:t...@atomide.com] Sent: Thursday, October 22, 2009 3:54 PM To: Pandita, Vikram Cc: linux-omap@vger.kernel.org Subject: Re: [PATCH] updated mach-types file * Vikram Pandita vikram.pand...@ti.com [091021 18:07]: this patch updates the auto-generated mach-types file to enable addition of 3630 boards: 1) zoom3 2) sdp3630 Signed-off-by: Vikram Pandita vikram.pand...@ti.com --- Tony: Could you Temporarily host this patch on linux-omap tree till rmk pulls in mach-types. This would allow us to add 3630 board files How about only add the lines needed? I can put it into omap-testing branch then. Yes that is fine too. Sending that patch now. I will add two lines for sdp3630 and zoom3 only. Tony arch/arm/tools/mach-types | 54 - 1 files changed, 53 insertions(+), 1 deletions(-) diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index 94be7bb..0160378 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types @@ -12,7 +12,7 @@ # # http://www.arm.linux.org.uk/developer/machines/?action=new # -# Last update: Fri Sep 18 21:42:00 2009 +# Last update: Wed Oct 21 15:33:08 2009 # # machine_is_xxxCONFIG_ MACH_TYPE_xxx number # @@ -2421,3 +2421,55 @@ liberty MACH_LIBERTY LIBERTY 2434 mh355 MACH_MH355 MH355 2435 pc7802 MACH_PC7802 PC7802 2436 gnet_sgcMACH_GNET_SGC GNET_SGC2437 +einstein15 MACH_EINSTEIN15 EINSTEIN15 2438 +cmpdMACH_CMPD CMPD 2439 +davinci_hase1 MACH_DAVINCI_HASE1 DAVINCI_HASE1 2440 +lgeincitephone MACH_LGEINCITEPHONE LGEINCITEPHONE 2441 +ea313x MACH_EA313X EA313X 2442 +fwbd_39064 MACH_FWBD_39064 FWBD_39064 2443 +fwbd_390128 MACH_FWBD_390128FWBD_390128 2444 +pelco_moe MACH_PELCO_MOE PELCO_MOE 2445 +minimix27 MACH_MINIMIX27 MINIMIX27 2446 +omap3_thunder MACH_OMAP3_THUNDER OMAP3_THUNDER 2447 +passioncMACH_PASSIONC PASSIONC2448 +mx27amata MACH_MX27AMATA MX27AMATA 2449 +bgat1 MACH_BGAT1 BGAT1 2450 +buzzMACH_BUZZ BUZZ 2451 +mb9g20 MACH_MB9G20 MB9G20 2452 +yushan MACH_YUSHAN YUSHAN 2453 +lizard MACH_LIZARD LIZARD 2454 +omap3polycomMACH_OMAP3POLYCOM OMAP3POLYCOM 2455 +smdkv210MACH_SMDKV210 SMDKV2102456 +bravo MACH_BRAVO BRAVO 2457 +siogentoo1 MACH_SIOGENTOO1 SIOGENTOO1 2458 +siogentoo2 MACH_SIOGENTOO2 SIOGENTOO2 2459 +sm3kMACH_SM3K SM3K 2460 +acer_tempo_f900 MACH_ACER_TEMPO_F900ACER_TEMPO_F900 2461 +sst61vc010_dev MACH_SST61VC010_DEV SST61VC010_DEV 2462 +glittertind MACH_GLITTERTINDGLITTERTIND 2463 +omap_zoom3 MACH_OMAP_ZOOM3 OMAP_ZOOM3 2464 +omap_3630sdpMACH_OMAP_3630SDP OMAP_3630SDP 2465 +cybook2440 MACH_CYBOOK2440 CYBOOK2440 2466 +torino_sMACH_TORINO_S TORINO_S2467 +havana MACH_HAVANA HAVANA 2468 +beaumont_11 MACH_BEAUMONT_11BEAUMONT_11 2469 +vanguardMACH_VANGUARD VANGUARD2470 +s5pc110_draco MACH_S5PC110_DRACO S5PC110_DRACO 2471 +cartesio_twoMACH_CARTESIO_TWO CARTESIO_TWO 2472 +aster MACH_ASTER ASTER 2473 +voguesv210 MACH_VOGUESV210 VOGUESV210 2474 +acm500x MACH_ACM500XACM500X 2475 +km9260 MACH_KM9260 KM9260 2476 +nideflexg1 MACH_NIDEFLEXG1 NIDEFLEXG1 2477 +ctera_plug_io MACH_CTERA_PLUG_IO CTERA_PLUG_IO 2478 +smartq7
RE: [PATCH 01/17] PM: fix suspend control for IVA2
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap- ow...@vger.kernel.org] On Behalf Of Paul Walmsley Sent: Thursday, October 22, 2009 5:24 AM IVA2 controls its target power state individually, thus suspend should not touch IVA2. Without this patch DSP suspend always fails. We don't allow other device drivers to touch PRCM bits, so we should probably should remove all PRCM register accesses from the DSPBridge code, so all power control should go through the ARM. Is there a reason why the ARM code can't handle the DSP powerdomain? Sharing with DSP is something which probably could use some improvement. Today DSP self-manages its domain. Its (bios) micro-kernel makes decisions to optimize its domain. The ARM can't really micro-manage the DSP as he doesn't even want to know at the detail level what the DSP is up to at every instant. - During idle time cpuidle should just be checking dsp status to see if its current state gets in the way of a low c-state. - bridge does register with suspend frame work so he should do the right thing when in the system. * problem is when bridge isn't there what to do. This is especially after an unload of the bridge. What has been proposed in the past is like what Kevin inputted in related thread about having maintenance hand off. But for some reason it never quite to the top of the list. - bridge does request thought clock frame work clocks especially of those which are public peripherals. - bridge could request everything but it was not projected as power efficient waking up the big arm core for something the dsp could do itself and has all control over. This is especially true if you have dsp doing the rendering for something like mp3. it gets the wake ups and streaming and only every great while wakes the arm to give it a pile more data. Waking the arm every time it runs its equivalent of cpuidle was discourged. - main other sharing conflict was with irq routing between arm and bridge. Right now its kind of init mode setup. I guess this is ok for todays usage. .. so after context current code is not requesting through pm code purposefully. The hardware has been evolving from omap1,2,3,4 to make for more of a distributed model. After all the details/constraints are understood with silicon there is some time to re-evaluate if its paying back or not. Regards, Richard W. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] mmci-omap: free irq resource
* ladislav.mi...@seznam.cz ladislav.mi...@seznam.cz [091021 03:43]: Free IRQ on remove. Looks like the MAINTAINERS file is a bit out of date for drivers/mmc/host/omap.c.. Can you please resend this fix to Andrew Morton, and Cc Jarkko Lavinen jarkko.lavi...@nokia.com, linux-...@vger.kernel.org and linux-o...@vger.kernel.org? We should be able to get this in as a fix during the -rc cycle. Acked-by: Tony Lindgren t...@atomide.com Signed-off-by: Ladislav Michl la...@linux-mips.org diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c index 5d773b8..5f970e2 100644 --- a/drivers/mmc/host/omap.c +++ b/drivers/mmc/host/omap.c @@ -1529,6 +1529,7 @@ static int mmc_omap_remove(struct platform_device *pdev) host-pdata-cleanup(pdev-dev); mmc_omap_fclk_enable(host, 0); + free_irq(host-irq, host); clk_put(host-fclk); clk_disable(host-iclk); clk_put(host-iclk); -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] mmci-omap: remove bogus check for host-iclk
* ladislav.mi...@seznam.cz ladislav.mi...@seznam.cz [091021 03:52]:
Remove check for host-iclk being NULL from error path since we already know
it is non-null and use return value from clk_get.
Signed-off-by: Ladislav Michl la...@linux-mips.org
This too to the mmc list. Might not go in as a fix though.
Acked-by: Tony Lindgren t...@atomide.com
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c
index 5d773b8..c6d7e8e 100644
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -1459,8 +1459,10 @@ static int __init mmc_omap_probe(struct
platform_device *pdev)
goto err_ioremap;
host-iclk = clk_get(pdev-dev, ick);
- if (IS_ERR(host-iclk))
+ if (IS_ERR(host-iclk)) {
+ ret = PTR_ERR(host-iclk);
goto err_free_mmc_host;
+ }
clk_enable(host-iclk);
host-fclk = clk_get(pdev-dev, fck);
@@ -1500,10 +1502,8 @@ err_free_irq:
err_free_fclk:
clk_put(host-fclk);
err_free_iclk:
- if (host-iclk != NULL) {
- clk_disable(host-iclk);
- clk_put(host-iclk);
- }
+ clk_disable(host-iclk);
+ clk_put(host-iclk);
err_free_mmc_host:
iounmap(host-virt_base);
err_ioremap:
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Re: mmci-omap regressions
* ladislav.mi...@seznam.cz ladislav.mi...@seznam.cz [091021 12:15]:
Hmm, it seems noone is going to fix it for me, so let's move on...
On Mon, Jan 12, 2009 at 12:42:43PM +0200, Tony Lindgren wrote:
Hi,
* Ladislav Michl la...@linux-mips.org [090112 11:19]:
Last time I used MMC card with linux-2.6.15-omap2 and it worked pretty
well on
my custom 5910 based board. Current git nor linux-2.6.22-omap1 (currently
used
for production) doesn't work at all. Inspecting diff between 2.6.15-omap2
and
2.6.22-omap1 showed that
--- a/drivers/mmc/host/omap.c 2009-01-12 09:32:23.0 +0100
+++ b/drivers/mmc/host/omap.c 2009-01-12 09:46:26.0 +0100
@@ -974,7 +974,7 @@
* Writing to the CON register twice seems to do the trick. */
for (i = 0; i 2; i++)
OMAP_MMC_WRITE(host, CON, dsor);
- if (ios-power_mode == MMC_POWER_ON) {
+ if (ios-power_mode == MMC_POWER_UP) {
/* Send clock cycles, poll completion */
OMAP_MMC_WRITE(host, IE, 0);
OMAP_MMC_WRITE(host, STAT, 0x);
did the trick.
With above patch applied to 2.6.22-omap1 I got
# modprobe omap
mmci-omap mmci-omap.1: command timeout, CMD 8
mmcblk0: mmc0:0001127104KiB
mmcblk0: p1
while there is no command timeout with 2.6.15-omap2, but at least it
works.
OK, well at least that's a good start on figuring out what has broken
it. It does not seem like the right fix though as the MMC_POWER_UP
should just power up the slot, and clocks should not get turned on
until in MMC_POWER_ON.
Doing the same modification in current git doesn't help. Moreover removing
omap.ko and inserting again behaves differently than inserting for first
time:
# modprobe omap
mmci-omap mmci-omap.0: command timeout (CMD8)
mmci-omap mmci-omap.0: command timeout (CMD5)
mmci-omap mmci-omap.0: command timeout (CMD5)
mmci-omap mmci-omap.0: command timeout (CMD5)
mmci-omap mmci-omap.0: command timeout (CMD5)
mmci-omap mmci-omap.0: command timeout (CMD55)
mmci-omap mmci-omap.0: command timeout (CMD55)
mmci-omap mmci-omap.0: command timeout (CMD55)
mmci-omap mmci-omap.0: command timeout (CMD55)
mmc0: error -22 whilst initialising MMC card
# rmmod omap
# modprobe omap
mmci-omap: probe of mmci-omap.0 failed with error -16
Looks like the current git head does goto exit after MMC_POWER_UP before
you even get to that code.
I'll happily send any requested debug informations and test any patches
Can you maybe try to debug by applying your patch and commenting out
the goto exit?
Here is somehow working version. It seems sending init stream multiple times
is not good idea. Please note I have no clue how is MMC supposed to work
(except very basic knowledge).
So with the patch (complete patch, see mmc driver fixes I posted earlier
today)
below, output looks like:
# modprobe omap
MMC_POWER_OFF
MMC dsor: 0
MMC_POWER_UP
MMC_POWER_ON
MMC dsor: 878
time elapsed: 254us
MMC_POWER_ON
MMC dsor: 878
MMC_POWER_ON
MMC dsor: 878
mmci-omap mmci-omap.0: command timeout (CMD8)
mmci-omap mmci-omap.0: command timeout (CMD5)
mmci-omap mmci-omap.0: command timeout (CMD5)
mmci-omap mmci-omap.0: command timeout (CMD5)
mmci-omap mmci-omap.0: command timeout (CMD5)
mmci-omap mmci-omap.0: command timeout (CMD55)
mmci-omap mmci-omap.0: command timeout (CMD55)
mmci-omap mmci-omap.0: command timeout (CMD55)
mmci-omap mmci-omap.0: command timeout (CMD55)
MMC_POWER_ON
MMC dsor: 878
MMC_POWER_ON
MMC dsor: 878
MMC_POWER_ON
MMC dsor: 878
MMC_POWER_ON
MMC dsor: 878
MMC_POWER_ON
MMC dsor: 803
mmc0: new MMC card at address 0001
mmcblk0: mmc0:0001 D0601 122 MiB
mmcblk0:
p1
Note, that command timeout is still there, but at least it detect card and
also note that worst case at 400kHz, 80 cycles makes 200 microsecs took
actually more than 200us.
Good to hear. Can you please resend this too to the mmc list?
Regards,
Tony
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c
index 5d773b8..0bcd6b0 100644
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -123,15 +123,16 @@ struct mmc_omap_host {
struct mmc_data * data;
struct mmc_host * mmc;
struct device * dev;
- unsigned char id; /* 16xx chips have 2 MMC blocks */
struct clk *iclk;
struct clk *fclk;
struct resource *mem_res;
void __iomem*virt_base;
unsigned intphys_base;
int irq;
+ unsigned char id; /* 16xx chips have 2 MMC blocks */
unsigned char bus_mode;
unsigned char hw_bus_mode;
+ unsigned char power_mode;
struct work_struct cmd_abort_work;
unsignedabort:1;
@@ -1233,7 +1234,7 @@ static void
[PATCH 00/10] omap fixes for v2.6.32-rc5
Hi all, Here are some omap fixes for review. Regards, Tony --- Hiroshi DOYU (1): omap: iommu: fix wrong condition check for SUPERSECTION Janusz Krzysztofik (3): omap1: Fix DSP public peripherals support for ams-delta omap1: Fix redundant UARTs pin muxing that can break other hardware support omap: Fix omap-keypad by restoring old keypad.h without breaking omap2 boards that use matrix_keypad Kevin Hilman (1): omap3: PM: enable UART3 module wakeups Santosh Shilimkar (3): omap4: Fix UART4 platform data on omap4 omap4: Allow omap_serial_early_init() for OMAP4430 board omap: SDMA: Fix omap_stop_dma() API for channel linking Tony Lindgren (2): omap2: Fix console serial port number for n8x0 omap: Fix detection of n8x0 arch/arm/configs/n8x0_defconfig |2 +- arch/arm/mach-omap1/board-ams-delta.c|6 ++ arch/arm/mach-omap1/board-generic.c |8 arch/arm/mach-omap1/board-innovator.c| 20 arch/arm/mach-omap1/board-palmte.c |8 arch/arm/mach-omap1/board-palmtt.c |8 arch/arm/mach-omap1/board-palmz71.c |8 arch/arm/mach-omap1/board-sx1.c |8 arch/arm/mach-omap1/board-voiceblue.c|8 arch/arm/mach-omap1/serial.c | 26 -- arch/arm/mach-omap2/Kconfig | 12 arch/arm/mach-omap2/board-3430sdp.c |2 +- arch/arm/mach-omap2/board-4430sdp.c |4 ++-- arch/arm/mach-omap2/board-ldp.c |2 +- arch/arm/mach-omap2/board-omap3evm.c |2 +- arch/arm/mach-omap2/board-omap3pandora.c |2 +- arch/arm/mach-omap2/board-rx51-peripherals.c |2 +- arch/arm/mach-omap2/board-rx51.c |1 - arch/arm/mach-omap2/board-zoom2.c|2 +- arch/arm/mach-omap2/io.c |2 ++ arch/arm/mach-omap2/pm34xx.c |7 --- arch/arm/mach-omap2/serial.c | 10 -- arch/arm/plat-omap/dma.c | 18 -- arch/arm/plat-omap/include/mach/keypad.h |5 - arch/arm/plat-omap/iommu.c |2 +- 25 files changed, 114 insertions(+), 61 deletions(-) -- Signature -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 01/10] omap: Fix omap-keypad by restoring old keypad.h without breaking omap2 boards that use matrix_keypad
From: Janusz Krzysztofik jkrzy...@tis.icnet.pl Only mach-omap2 boards are currently using matrix_keypad. Allow mach-omap1 boards to use the old style keypad.h without breaking. Created against linux-2.6.32-rc5. Compile tested with omap_3430sdp_defconfig and rx51_defconfig. Signed-off-by: Janusz Krzysztofik jkrzy...@tis.icnet.pl Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/mach-omap2/board-3430sdp.c |2 +- arch/arm/mach-omap2/board-ldp.c |2 +- arch/arm/mach-omap2/board-omap3evm.c |2 +- arch/arm/mach-omap2/board-omap3pandora.c |2 +- arch/arm/mach-omap2/board-rx51-peripherals.c |2 +- arch/arm/mach-omap2/board-rx51.c |1 - arch/arm/mach-omap2/board-zoom2.c|2 +- arch/arm/plat-omap/include/mach/keypad.h |5 - 8 files changed, 10 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index efaf053..0acb556 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -17,6 +17,7 @@ #include linux/platform_device.h #include linux/delay.h #include linux/input.h +#include linux/input/matrix_keypad.h #include linux/spi/spi.h #include linux/spi/ads7846.h #include linux/i2c/twl4030.h @@ -38,7 +39,6 @@ #include mach/gpmc.h #include mach/control.h -#include mach/keypad.h #include mach/gpmc-smc91x.h #include sdram-qimonda-hyb18m512160af-6.h diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index d110a7f..d57ec2f 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -16,6 +16,7 @@ #include linux/platform_device.h #include linux/delay.h #include linux/input.h +#include linux/input/matrix_keypad.h #include linux/gpio_keys.h #include linux/workqueue.h #include linux/err.h @@ -41,7 +42,6 @@ #include asm/delay.h #include mach/control.h #include mach/usb.h -#include mach/keypad.h #include mmc-twl4030.h diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index e4ec0c5..4c4d7f8 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -20,6 +20,7 @@ #include linux/clk.h #include linux/gpio.h #include linux/input.h +#include linux/input/matrix_keypad.h #include linux/leds.h #include linux/spi/spi.h @@ -37,7 +38,6 @@ #include mach/usb.h #include mach/common.h #include mach/mcspi.h -#include mach/keypad.h #include sdram-micron-mt46h32m32lf-6.h #include mmc-twl4030.h diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 7f6bf87..5326e0d 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -27,6 +27,7 @@ #include linux/i2c/twl4030.h #include linux/leds.h #include linux/input.h +#include linux/input/matrix_keypad.h #include linux/gpio_keys.h #include asm/mach-types.h @@ -39,7 +40,6 @@ #include mach/hardware.h #include mach/mcspi.h #include mach/usb.h -#include mach/keypad.h #include mach/mux.h #include sdram-micron-mt46h32m32lf-6.h diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 2b0eb1b..e34d96a 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -12,6 +12,7 @@ #include linux/init.h #include linux/platform_device.h #include linux/input.h +#include linux/input/matrix_keypad.h #include linux/spi/spi.h #include linux/i2c.h #include linux/i2c/twl4030.h @@ -27,7 +28,6 @@ #include mach/common.h #include mach/dma.h #include mach/gpmc.h -#include mach/keypad.h #include mach/onenand.h #include mach/gpmc-smc91x.h diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index f9196c3..78869a9 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c @@ -26,7 +26,6 @@ #include mach/mux.h #include mach/board.h #include mach/common.h -#include mach/keypad.h #include mach/dma.h #include mach/gpmc.h #include mach/usb.h diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c index fd3369d..ea00486 100644 --- a/arch/arm/mach-omap2/board-zoom2.c +++ b/arch/arm/mach-omap2/board-zoom2.c @@ -13,6 +13,7 @@ #include linux/init.h #include linux/platform_device.h #include linux/input.h +#include linux/input/matrix_keypad.h #include linux/gpio.h #include linux/i2c/twl4030.h #include linux/regulator/machine.h @@ -22,7 +23,6 @@ #include mach/common.h #include mach/usb.h -#include mach/keypad.h #include mmc-twl4030.h #include sdram-micron-mt46h32m32lf-6.h diff --git a/arch/arm/plat-omap/include/mach/keypad.h b/arch/arm/plat-omap/include/mach/keypad.h index d91b9be..3ae52cc 100644 --- a/arch/arm/plat-omap/include/mach/keypad.h +++ b/arch/arm/plat-omap/include/mach/keypad.h @@ -10,7 +10,7 @@ #ifndef ASMARM_ARCH_KEYPAD_H #define
[PATCH 02/10] omap: SDMA: Fix omap_stop_dma() API for channel linking
From: Santosh Shilimkar santosh.shilim...@ti.com
OMAP sDMA driver API omap_stop_dma() doesn't really stop the dma when used
in linking scenario.
The DMA channel needs to be disabled before resetting the chain.
Also fix clearing of the OMAP_DMA_ACTIVE status in the linked case.
Cc: Hari n hari.z...@gmail.com
Cc: Jarkko Nikula jhnik...@gmail.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Venkatraman S svenk...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/plat-omap/dma.c | 18 --
1 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 0eb676d..b53125f 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -978,6 +978,14 @@ void omap_stop_dma(int lch)
{
u32 l;
+ /* Disable all interrupts on the channel */
+ if (cpu_class_is_omap1())
+ dma_write(0, CICR(lch));
+
+ l = dma_read(CCR(lch));
+ l = ~OMAP_DMA_CCR_EN;
+ dma_write(l, CCR(lch));
+
if (!omap_dma_in_1510_mode() dma_chan[lch].next_lch != -1) {
int next_lch, cur_lch = lch;
char dma_chan_link_map[OMAP_DMA4_LOGICAL_DMA_CH_COUNT];
@@ -995,18 +1003,8 @@ void omap_stop_dma(int lch)
next_lch = dma_chan[cur_lch].next_lch;
cur_lch = next_lch;
} while (next_lch != -1);
-
- return;
}
- /* Disable all interrupts on the channel */
- if (cpu_class_is_omap1())
- dma_write(0, CICR(lch));
-
- l = dma_read(CCR(lch));
- l = ~OMAP_DMA_CCR_EN;
- dma_write(l, CCR(lch));
-
dma_chan[lch].flags = ~OMAP_DMA_ACTIVE;
}
EXPORT_SYMBOL(omap_stop_dma);
--
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[PATCH 03/10] omap: iommu: fix wrong condition check for SUPERSECTION
From: Hiroshi DOYU hiroshi.d...@nokia.com
A bit (2 0) is set both on SECTION and SUPERSECTION. To identify
SUPERSECTION correctly, other bits should be compared too.
Reported-by: Srinivas Pulukuru srinivas.puluk...@ti.com
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/plat-omap/iommu.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index 4b60127..94584f1 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -664,7 +664,7 @@ static size_t iopgtable_clear_entry_core(struct iommu *obj,
u32 da)
nent = 1; /* for the next L1 entry */
} else {
bytes = IOPGD_SIZE;
- if (*iopgd IOPGD_SUPER) {
+ if ((*iopgd IOPGD_SUPER) == IOPGD_SUPER) {
nent *= 16;
/* rewind to the 1st entry */
iopgd = (u32 *)((u32)iopgd IOSUPER_MASK);
--
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[PATCH 04/10] omap1: Fix redundant UARTs pin muxing that can break other hardware support
From: Janusz Krzysztofik jkrzy...@tis.icnet.pl
Commit 15ac408ee5a509053a765b816e9179515329369f removed enabled_uart
and OMAP_TAG_UART. This works for mach-omap2, but causes issues on
mach-omap1 for some boards as the mach-omap1 serial.c was muxing
pins based on the enabled_uart flag for 15xx.
Fix this by muxing pins in board-*.c files for the 15xx boards for
the uart ports that had enabled_uart flag set before the commit
above.
Tested on Amsdtrad Delta only.
Note that in the future we should add support for powering down
the uarts with a timer like mach-omap2/serial.c does. Otherwise
the enabled uarts will be blocking retention-while-idle.
Signed-off-by: Janusz Krzysztofik jkrzy...@tis.icnet.pl
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap1/board-ams-delta.c |4
arch/arm/mach-omap1/board-generic.c |8
arch/arm/mach-omap1/board-innovator.c | 20
arch/arm/mach-omap1/board-palmte.c|8
arch/arm/mach-omap1/board-palmtt.c|8
arch/arm/mach-omap1/board-palmz71.c |8
arch/arm/mach-omap1/board-sx1.c |8
arch/arm/mach-omap1/board-voiceblue.c |8
arch/arm/mach-omap1/serial.c | 26 --
9 files changed, 72 insertions(+), 26 deletions(-)
diff --git a/arch/arm/mach-omap1/board-ams-delta.c
b/arch/arm/mach-omap1/board-ams-delta.c
index 42920f9..972499e 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -219,6 +219,10 @@ static struct platform_device *ams_delta_devices[]
__initdata = {
static void __init ams_delta_init(void)
{
+ /* mux pins for uarts */
+ omap_cfg_reg(UART1_TX);
+ omap_cfg_reg(UART1_RTS);
+
iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
omap_board_config = ams_delta_config;
diff --git a/arch/arm/mach-omap1/board-generic.c
b/arch/arm/mach-omap1/board-generic.c
index fb47239..6c8a41f 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -64,6 +64,14 @@ static void __init omap_generic_init(void)
{
#ifdef CONFIG_ARCH_OMAP15XX
if (cpu_is_omap15xx()) {
+ /* mux pins for uarts */
+ omap_cfg_reg(UART1_TX);
+ omap_cfg_reg(UART1_RTS);
+ omap_cfg_reg(UART2_TX);
+ omap_cfg_reg(UART2_RTS);
+ omap_cfg_reg(UART3_TX);
+ omap_cfg_reg(UART3_RX);
+
omap_usb_init(generic1510_usb_config);
}
#endif
diff --git a/arch/arm/mach-omap1/board-innovator.c
b/arch/arm/mach-omap1/board-innovator.c
index cc2abbb..cd6c395 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -376,6 +376,26 @@ static void __init innovator_init(void)
{
#ifdef CONFIG_ARCH_OMAP15XX
if (cpu_is_omap1510()) {
+ unsigned char reg;
+
+ /* mux pins for uarts */
+ omap_cfg_reg(UART1_TX);
+ omap_cfg_reg(UART1_RTS);
+ omap_cfg_reg(UART2_TX);
+ omap_cfg_reg(UART2_RTS);
+ omap_cfg_reg(UART3_TX);
+ omap_cfg_reg(UART3_RX);
+
+ reg = fpga_read(OMAP1510_FPGA_POWER);
+ reg |= OMAP1510_FPGA_PCR_COM1_EN;
+ fpga_write(reg, OMAP1510_FPGA_POWER);
+ udelay(10);
+
+ reg = fpga_read(OMAP1510_FPGA_POWER);
+ reg |= OMAP1510_FPGA_PCR_COM2_EN;
+ fpga_write(reg, OMAP1510_FPGA_POWER);
+ udelay(10);
+
platform_add_devices(innovator1510_devices,
ARRAY_SIZE(innovator1510_devices));
spi_register_board_info(innovator1510_boardinfo,
ARRAY_SIZE(innovator1510_boardinfo));
diff --git a/arch/arm/mach-omap1/board-palmte.c
b/arch/arm/mach-omap1/board-palmte.c
index 90dd043..4de2584 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -342,6 +342,14 @@ static void __init palmte_misc_gpio_setup(void)
static void __init omap_palmte_init(void)
{
+ /* mux pins for uarts */
+ omap_cfg_reg(UART1_TX);
+ omap_cfg_reg(UART1_RTS);
+ omap_cfg_reg(UART2_TX);
+ omap_cfg_reg(UART2_RTS);
+ omap_cfg_reg(UART3_TX);
+ omap_cfg_reg(UART3_RX);
+
omap_board_config = palmte_config;
omap_board_config_size = ARRAY_SIZE(palmte_config);
diff --git a/arch/arm/mach-omap1/board-palmtt.c
b/arch/arm/mach-omap1/board-palmtt.c
index 8256139..d972cf9 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -289,6 +289,14 @@ static void __init omap_mpu_wdt_mode(int mode) {
static void __init omap_palmtt_init(void)
{
+ /* mux pins for uarts */
+ omap_cfg_reg(UART1_TX);
+ omap_cfg_reg(UART1_RTS);
+ omap_cfg_reg(UART2_TX);
+ omap_cfg_reg(UART2_RTS);
+
[PATCH 05/10] omap1: Fix DSP public peripherals support for ams-delta
From: Janusz Krzysztofik jkrzy...@tis.icnet.pl
DSP public peripherals used to work on OMAP1510 based (or all OMAP1 class?)
machines as long as old dspgateway code were present in the l-o tree. For
several months it is no longer included, breaking support for McBSP1 based
audio on Amstrad Delta, for example.
This patch, derived from the old dspgateway code, corrects the problem for the
board by simply taking the DSP out of reset state, I guess. That way, things
should not break when a new dsp code is added to the tree, and the change can
be reverted then.
If there are any reports on McBSP1 or other DSP public peripherals not working
for other OMAP1 machines (I've not heard of any for now), I can prepare a more
general patch providing an extra include file with a helper function defined.
Created and tested against linux-2.6.32-rc5
Signed-off-by: Janusz Krzysztofik jkrzy...@tis.icnet.pl
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap1/board-ams-delta.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap1/board-ams-delta.c
b/arch/arm/mach-omap1/board-ams-delta.c
index 972499e..8ad5cc3 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -235,6 +235,8 @@ static void __init ams_delta_init(void)
omap_usb_init(ams_delta_usb_config);
platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices));
+
+ omap_writew(omap_readw(ARM_RSTCT1) | 0x0004, ARM_RSTCT1);
}
static struct plat_serial8250_port ams_delta_modem_ports[] = {
--
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[PATCH 06/10] omap: Fix detection of n8x0
Otherwise the machine_is_nokia_n8*() does not work. Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/mach-omap2/Kconfig | 12 1 files changed, 12 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 75b1c7e..aad194f 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -73,9 +73,21 @@ config MACH_OMAP_3430SDP bool OMAP 3430 SDP board depends on ARCH_OMAP3 ARCH_OMAP34XX +config MACH_NOKIA_N800 + bool + +config MACH_NOKIA_N810 + bool + +config MACH_NOKIA_N810_WIMAX + bool + config MACH_NOKIA_N8X0 bool Nokia N800/N810 depends on ARCH_OMAP2420 + select MACH_NOKIA_N800 + select MACH_NOKIA_N810 + select MACH_NOKIA_N810_WIMAX config MACH_NOKIA_RX51 bool Nokia RX-51 board -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 07/10] omap2: Fix console serial port number for n8x0
With the recent changes omap serial ports match the physical numbering like they should. Fix the kernel CMDLINE accordingly so console works. Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/configs/n8x0_defconfig |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/configs/n8x0_defconfig b/arch/arm/configs/n8x0_defconfig index 8da75de..264f52b 100644 --- a/arch/arm/configs/n8x0_defconfig +++ b/arch/arm/configs/n8x0_defconfig @@ -304,7 +304,7 @@ CONFIG_ALIGNMENT_TRAP=y CONFIG_ZBOOT_ROM_TEXT=0x10C08000 CONFIG_ZBOOT_ROM_BSS=0x1020 # CONFIG_ZBOOT_ROM is not set -CONFIG_CMDLINE=root=1f03 rootfstype=jffs2 console=ttyS0,115200n8 +CONFIG_CMDLINE=root=1f03 rootfstype=jffs2 console=ttyS2,115200n8 # CONFIG_XIP_KERNEL is not set # CONFIG_KEXEC is not set -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 08/10] omap3: PM: enable UART3 module wakeups
From: Kevin Hilman khil...@deeprootsystems.com UART3 is in the PER powerdomain. If PER goes idle/inactive independently of CORE, for UART3 to wakeup it must have its wakeup enable bits setup in PM_WKEN_PER. This patch enables these bits. The reason it works when PER and CORE work together is because when CORE goes inactive/retention, the IOPAD wakeups are enabled and trigger UART3 wakeup. Without this patch, when the UART inactivity timer fires for UART3, its clocks are disabled and it's unable to wakeup so will be unusable until PER is awoken by another source. Another way of testing is by keeping CORE on during suspend but allowing PER to hit retention # echo 3 /debug/pm_debug/core_pwrdm/suspend then enter suspend # echo mem /sys/power/state Without this patch, UART3 will be unable to wakeup the system. Signed-off-by: Kevin Hilman khil...@deeprootsystems.com Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/mach-omap2/pm34xx.c |7 --- 1 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 378c2f6..8946319 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -639,14 +639,15 @@ static void __init prcm_setup_regs(void) prm_write_mod_reg(OMAP3430_IO_EN | OMAP3430_WKUP_EN, OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); - /* Enable GPIO wakeups in PER */ + /* Enable wakeups in PER */ prm_write_mod_reg(OMAP3430_EN_GPIO2 | OMAP3430_EN_GPIO3 | OMAP3430_EN_GPIO4 | OMAP3430_EN_GPIO5 | - OMAP3430_EN_GPIO6, OMAP3430_PER_MOD, PM_WKEN); + OMAP3430_EN_GPIO6 | OMAP3430_EN_UART3, + OMAP3430_PER_MOD, PM_WKEN); /* and allow them to wake up MPU */ prm_write_mod_reg(OMAP3430_GRPSEL_GPIO2 | OMAP3430_EN_GPIO3 | OMAP3430_GRPSEL_GPIO4 | OMAP3430_EN_GPIO5 | - OMAP3430_GRPSEL_GPIO6, + OMAP3430_GRPSEL_GPIO6 | OMAP3430_EN_UART3, OMAP3430_PER_MOD, OMAP3430_PM_MPUGRPSEL); /* Don't attach IVA interrupts */ -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 09/10] omap4: Allow omap_serial_early_init() for OMAP4430 board
From: Santosh Shilimkar santosh.shilim...@ti.com
This patch enables omap_serial_early_init() function for OMAP4430
SDP. Without this the bootup would throw oops in omap_serial_init().
Note that the ifndef CONFIG_ARCH_OMAP4 is split into two sections
to enable omap_serial_early_init(). This ifndef cannot be removed
until omap4 clock framework is implemented.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Reviewed-By: Tony Lindgren t...@atomide.com
Reviewed-By: Kevin Hilman khil...@deeprootsystems.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/board-4430sdp.c |4 ++--
arch/arm/mach-omap2/io.c|2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index eb37c40..609a5a4 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -58,6 +58,8 @@ static void __init gic_init_irq(void)
static void __init omap_4430sdp_init_irq(void)
{
+ omap_board_config = sdp4430_config;
+ omap_board_config_size = ARRAY_SIZE(sdp4430_config);
omap2_init_common_hw(NULL, NULL);
#ifdef CONFIG_OMAP_32K_TIMER
omap2_gp_clockevent_set_gptimer(1);
@@ -70,8 +72,6 @@ static void __init omap_4430sdp_init_irq(void)
static void __init omap_4430sdp_init(void)
{
platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
- omap_board_config = sdp4430_config;
- omap_board_config_size = ARRAY_SIZE(sdp4430_config);
omap_serial_init();
}
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index e3a3bad..56be87d 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -302,7 +302,9 @@ void __init omap2_init_common_hw(struct omap_sdrc_params
*sdrc_cs0,
pwrdm_init(powerdomains_omap);
clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
omap2_clk_init();
+#endif
omap_serial_early_init();
+#ifndef CONFIG_ARCH_OMAP4
omap_hwmod_late_init();
omap_pm_if_init();
omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
--
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[PATCH 10/10] omap4: Fix UART4 platform data on omap4
From: Santosh Shilimkar santosh.shilim...@ti.com
This patch removes the unnecessary UART4 platform which is under
data is wrong because of this
There is a separate platform structure for UART4
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Reviewed-By: Kevin Hilman khil...@deeprootsystems.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/serial.c | 10 --
1 files changed, 0 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index ae21868..54dfeb5 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -109,16 +109,6 @@ static struct plat_serial8250_port serial_platform_data2[]
= {
.regshift = 2,
.uartclk= OMAP24XX_BASE_BAUD * 16,
}, {
-#ifdef CONFIG_ARCH_OMAP4
- .membase= OMAP2_IO_ADDRESS(OMAP_UART4_BASE),
- .mapbase= OMAP_UART4_BASE,
- .irq= 70,
- .flags = UPF_BOOT_AUTOCONF,
- .iotype = UPIO_MEM,
- .regshift = 2,
- .uartclk= OMAP24XX_BASE_BAUD * 16,
- }, {
-#endif
.flags = 0
}
};
--
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[PATCH v2 00/32] OMAP3: PM: base off-mode support
This series adds the base off-mode support to the OMAP3 PM core. The code originates from the OMAP PM branch[1] and has been tested broadly on a variety of OMAP3 platforms. It is currently based on Tony's for-next branch since it depends on the IO address space rework series and the omap-headers rework This series is also available in the branch 'pm-upstream/pm-off' in my linux-omap-pm git repo at git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.git Differences from v1 - Added descriptive changelogs to all patches - Incorporated a handful of smaller off-mode fixups from PM branch Kevin Aaro Koskinen (2): OMAP: PM: Clear DMA channel state after a wakeup OMAP3: PM: Fix INTC context save/restore Jouni Hogander (1): OMAP3: PM: Save and restore also CM_CLKSEL1_PLL_IVA2 Juha Yrjola (1): OMAP: Store reboot mode in scratchpad on OMAP34xx Kalle Jokiniemi (5): OMAP3: PM: Fix secure SRAM context save/restore ARM: OMAP: SMS: save/restore of SMS_SYSCONFIG for off-mode OMAP3: PM: Fix PLL_MOD CLKEN offset in scratchpad PM: Disable usb host HW save and restore OMAP3: PM: Enable IO-CHAIN wakeup Kevin Hilman (3): OMAP3: PM debug: allow runtime toggle of PM features PM debug: allow configurable wakeup from suspend on OMAP GPtimer OMAP3: PM: decouple PER and CORE context save and restore Peter 'p2' De Schrijver (1): OMAP3: PM: Wait for SDRC ready iso a blind delay Rajendra Nayak (12): OMAP3: PM: GPMC context save/restore OMAP3: PM: GPIO context save/restore OMAP3: PM: INTC context save/restore OMAP3: PM: PRCM context save/restore OMAP3: PM: Populate scratchpad contents OMAP3: PM: SCM context save/restore OMAP3: PM: restore SRAM functions after off-mode. OMAP3: PM: handle PER/NEON/CORE in idle OMAP3: PM: Restore MMU table entry OMAP3: PM: MPU off-mode support OMAP3: PM: CORE domain off-mode support OMAP3: PM: Program SDRC to send self refresh on timeout of AUTO_CNT Tero Kristo (7): OMAP: PM: DMA context save/restore for off-mode support OMAP3 PM: off-mode support for HS/EMU devices OMAP3: PM: save secure RAM only during init OMAP3: PM: Enable SDRAM auto-refresh during sleep OMAP3: PM: SDRC auto-refresh workaround for off-mode OMAP3: PM: Prevent PER from going OFF when CORE is going INA OMAP3: PM: MPU and CORE should stay awake if there is CAM domain ACTIVE arch/arm/mach-omap2/control.c | 381 +++ arch/arm/mach-omap2/gpmc.c| 98 +++- arch/arm/mach-omap2/irq.c | 66 + arch/arm/mach-omap2/pm-debug.c| 29 ++ arch/arm/mach-omap2/pm.h | 10 + arch/arm/mach-omap2/pm34xx.c | 362 +- arch/arm/mach-omap2/powerdomains34xx.h|8 +- arch/arm/mach-omap2/prcm.c| 407 - arch/arm/mach-omap2/prm-regbits-34xx.h|2 + arch/arm/mach-omap2/sdrc.c| 27 ++ arch/arm/mach-omap2/serial.c |2 - arch/arm/mach-omap2/sleep34xx.S | 218 ++-- arch/arm/mach-omap2/timer-gp.c|2 + arch/arm/plat-omap/dma.c | 62 +- arch/arm/plat-omap/gpio.c | 92 +++ arch/arm/plat-omap/include/plat/control.h | 61 +- arch/arm/plat-omap/include/plat/dma.h |5 + arch/arm/plat-omap/include/plat/gpio.h|3 +- arch/arm/plat-omap/include/plat/gpmc.h|3 + arch/arm/plat-omap/include/plat/irqs.h|5 + arch/arm/plat-omap/include/plat/prcm.h|6 +- arch/arm/plat-omap/include/plat/sdrc.h|8 + arch/arm/plat-omap/include/plat/sram.h|7 + arch/arm/plat-omap/sram.c |8 +- 24 files changed, 1822 insertions(+), 50 deletions(-) mode change 100644 = 100755 arch/arm/plat-omap/include/plat/dma.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 01/32] OMAP3: PM: GPMC context save/restore
From: Rajendra Nayak rna...@ti.com
This patch adds the context save and restore functions for GPMC to
enable off-mode.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/gpmc.c | 98 +++-
arch/arm/plat-omap/include/plat/gpmc.h |3 +
2 files changed, 98 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 004da69..7d68784 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -62,6 +62,33 @@
#define ENABLE_PREFETCH(0x1 7)
#define DMA_MPU_MODE 2
+/* Structure to save gpmc cs context */
+struct gpmc_cs_config {
+ u32 config1;
+ u32 config2;
+ u32 config3;
+ u32 config4;
+ u32 config5;
+ u32 config6;
+ u32 config7;
+ int is_valid;
+};
+
+/*
+ * Structure to save/restore gpmc context
+ * to support core off on OMAP3
+ */
+struct omap3_gpmc_regs {
+ u32 sysconfig;
+ u32 irqenable;
+ u32 timeout_ctrl;
+ u32 config;
+ u32 prefetch_config1;
+ u32 prefetch_config2;
+ u32 prefetch_control;
+ struct gpmc_cs_config cs_context[GPMC_CS_NUM];
+};
+
static struct resource gpmc_mem_root;
static struct resource gpmc_cs_mem[GPMC_CS_NUM];
static DEFINE_SPINLOCK(gpmc_mem_lock);
@@ -261,7 +288,7 @@ static void gpmc_cs_enable_mem(int cs, u32 base, u32 size)
l = (base GPMC_CHUNK_SHIFT) 0x3f;
l = ~(0x0f 8);
l |= ((mask GPMC_CHUNK_SHIFT) 0x0f) 8;
- l |= 1 6;/* CSVALID */
+ l |= GPMC_CONFIG7_CSVALID;
gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l);
}
@@ -270,7 +297,7 @@ static void gpmc_cs_disable_mem(int cs)
u32 l;
l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
- l = ~(1 6); /* CSVALID */
+ l = ~GPMC_CONFIG7_CSVALID;
gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l);
}
@@ -290,7 +317,7 @@ static int gpmc_cs_mem_enabled(int cs)
u32 l;
l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
- return l (1 6);
+ return l GPMC_CONFIG7_CSVALID;
}
int gpmc_cs_set_reserved(int cs, int reserved)
@@ -516,3 +543,68 @@ void __init gpmc_init(void)
gpmc_write_reg(GPMC_SYSCONFIG, l);
gpmc_mem_init();
}
+
+#ifdef CONFIG_ARCH_OMAP3
+static struct omap3_gpmc_regs gpmc_context;
+
+void omap3_gpmc_save_context()
+{
+ int i;
+ gpmc_context.sysconfig = gpmc_read_reg(GPMC_SYSCONFIG);
+ gpmc_context.irqenable = gpmc_read_reg(GPMC_IRQENABLE);
+ gpmc_context.timeout_ctrl = gpmc_read_reg(GPMC_TIMEOUT_CONTROL);
+ gpmc_context.config = gpmc_read_reg(GPMC_CONFIG);
+ gpmc_context.prefetch_config1 = gpmc_read_reg(GPMC_PREFETCH_CONFIG1);
+ gpmc_context.prefetch_config2 = gpmc_read_reg(GPMC_PREFETCH_CONFIG2);
+ gpmc_context.prefetch_control = gpmc_read_reg(GPMC_PREFETCH_CONTROL);
+ for (i = 0; i GPMC_CS_NUM; i++) {
+ gpmc_context.cs_context[i].is_valid = gpmc_cs_mem_enabled(i);
+ if (gpmc_context.cs_context[i].is_valid) {
+ gpmc_context.cs_context[i].config1 =
+ gpmc_cs_read_reg(i, GPMC_CS_CONFIG1);
+ gpmc_context.cs_context[i].config2 =
+ gpmc_cs_read_reg(i, GPMC_CS_CONFIG2);
+ gpmc_context.cs_context[i].config3 =
+ gpmc_cs_read_reg(i, GPMC_CS_CONFIG3);
+ gpmc_context.cs_context[i].config4 =
+ gpmc_cs_read_reg(i, GPMC_CS_CONFIG4);
+ gpmc_context.cs_context[i].config5 =
+ gpmc_cs_read_reg(i, GPMC_CS_CONFIG5);
+ gpmc_context.cs_context[i].config6 =
+ gpmc_cs_read_reg(i, GPMC_CS_CONFIG6);
+ gpmc_context.cs_context[i].config7 =
+ gpmc_cs_read_reg(i, GPMC_CS_CONFIG7);
+ }
+ }
+}
+
+void omap3_gpmc_restore_context()
+{
+ int i;
+ gpmc_write_reg(GPMC_SYSCONFIG, gpmc_context.sysconfig);
+ gpmc_write_reg(GPMC_IRQENABLE, gpmc_context.irqenable);
+ gpmc_write_reg(GPMC_TIMEOUT_CONTROL, gpmc_context.timeout_ctrl);
+ gpmc_write_reg(GPMC_CONFIG, gpmc_context.config);
+ gpmc_write_reg(GPMC_PREFETCH_CONFIG1, gpmc_context.prefetch_config1);
+ gpmc_write_reg(GPMC_PREFETCH_CONFIG2, gpmc_context.prefetch_config2);
+ gpmc_write_reg(GPMC_PREFETCH_CONTROL, gpmc_context.prefetch_control);
+ for (i = 0; i GPMC_CS_NUM; i++) {
+ if (gpmc_context.cs_context[i].is_valid) {
+ gpmc_cs_write_reg(i, GPMC_CS_CONFIG1,
+ gpmc_context.cs_context[i].config1);
+ gpmc_cs_write_reg(i, GPMC_CS_CONFIG2,
+
[PATCH v2 02/32] OMAP3: PM: GPIO context save/restore
From: Rajendra Nayak rna...@ti.com
Add context save and restore to enable off-mode.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/plat-omap/gpio.c | 92
arch/arm/plat-omap/include/plat/gpio.h |3 +-
2 files changed, 94 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 487bea7..4f81ea3 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -290,6 +290,23 @@ static struct gpio_bank gpio_bank_34xx[6] = {
METHOD_GPIO_24XX },
};
+struct omap3_gpio_regs {
+ u32 sysconfig;
+ u32 irqenable1;
+ u32 irqenable2;
+ u32 wake_en;
+ u32 ctrl;
+ u32 oe;
+ u32 leveldetect0;
+ u32 leveldetect1;
+ u32 risingdetect;
+ u32 fallingdetect;
+ u32 dataout;
+ u32 setwkuena;
+ u32 setdataout;
+};
+
+static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];
#endif
#ifdef CONFIG_ARCH_OMAP4
@@ -2036,6 +2053,81 @@ void omap2_gpio_resume_after_retention(void)
#endif
+#ifdef CONFIG_ARCH_OMAP34XX
+/* save the registers of bank 2-6 */
+void omap_gpio_save_context(void)
+{
+ int i;
+
+ /* saving banks from 2-6 only since GPIO1 is in WKUP */
+ for (i = 1; i gpio_bank_count; i++) {
+ struct gpio_bank *bank = gpio_bank[i];
+ gpio_context[i].sysconfig =
+ __raw_readl(bank-base + OMAP24XX_GPIO_SYSCONFIG);
+ gpio_context[i].irqenable1 =
+ __raw_readl(bank-base + OMAP24XX_GPIO_IRQENABLE1);
+ gpio_context[i].irqenable2 =
+ __raw_readl(bank-base + OMAP24XX_GPIO_IRQENABLE2);
+ gpio_context[i].wake_en =
+ __raw_readl(bank-base + OMAP24XX_GPIO_WAKE_EN);
+ gpio_context[i].ctrl =
+ __raw_readl(bank-base + OMAP24XX_GPIO_CTRL);
+ gpio_context[i].oe =
+ __raw_readl(bank-base + OMAP24XX_GPIO_OE);
+ gpio_context[i].leveldetect0 =
+ __raw_readl(bank-base + OMAP24XX_GPIO_LEVELDETECT0);
+ gpio_context[i].leveldetect1 =
+ __raw_readl(bank-base + OMAP24XX_GPIO_LEVELDETECT1);
+ gpio_context[i].risingdetect =
+ __raw_readl(bank-base + OMAP24XX_GPIO_RISINGDETECT);
+ gpio_context[i].fallingdetect =
+ __raw_readl(bank-base + OMAP24XX_GPIO_FALLINGDETECT);
+ gpio_context[i].dataout =
+ __raw_readl(bank-base + OMAP24XX_GPIO_DATAOUT);
+ gpio_context[i].setwkuena =
+ __raw_readl(bank-base + OMAP24XX_GPIO_SETWKUENA);
+ gpio_context[i].setdataout =
+ __raw_readl(bank-base + OMAP24XX_GPIO_SETDATAOUT);
+ }
+}
+
+/* restore the required registers of bank 2-6 */
+void omap_gpio_restore_context(void)
+{
+ int i;
+
+ for (i = 1; i gpio_bank_count; i++) {
+ struct gpio_bank *bank = gpio_bank[i];
+ __raw_writel(gpio_context[i].sysconfig,
+ bank-base + OMAP24XX_GPIO_SYSCONFIG);
+ __raw_writel(gpio_context[i].irqenable1,
+ bank-base + OMAP24XX_GPIO_IRQENABLE1);
+ __raw_writel(gpio_context[i].irqenable2,
+ bank-base + OMAP24XX_GPIO_IRQENABLE2);
+ __raw_writel(gpio_context[i].wake_en,
+ bank-base + OMAP24XX_GPIO_WAKE_EN);
+ __raw_writel(gpio_context[i].ctrl,
+ bank-base + OMAP24XX_GPIO_CTRL);
+ __raw_writel(gpio_context[i].oe,
+ bank-base + OMAP24XX_GPIO_OE);
+ __raw_writel(gpio_context[i].leveldetect0,
+ bank-base + OMAP24XX_GPIO_LEVELDETECT0);
+ __raw_writel(gpio_context[i].leveldetect1,
+ bank-base + OMAP24XX_GPIO_LEVELDETECT1);
+ __raw_writel(gpio_context[i].risingdetect,
+ bank-base + OMAP24XX_GPIO_RISINGDETECT);
+ __raw_writel(gpio_context[i].fallingdetect,
+ bank-base + OMAP24XX_GPIO_FALLINGDETECT);
+ __raw_writel(gpio_context[i].dataout,
+ bank-base + OMAP24XX_GPIO_DATAOUT);
+ __raw_writel(gpio_context[i].setwkuena,
+ bank-base + OMAP24XX_GPIO_SETWKUENA);
+ __raw_writel(gpio_context[i].setdataout,
+ bank-base + OMAP24XX_GPIO_SETDATAOUT);
+ }
+}
+#endif
+
/*
* This may get called early from board specific init
* for boards that have interrupts routed via FPGA.
diff --git
[PATCH v2 03/32] OMAP3: PM: INTC context save/restore
From: Rajendra Nayak rna...@ti.com
Add context save and restore for the INTC module to support off-mode.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/irq.c | 66
arch/arm/plat-omap/include/plat/irqs.h |5 ++
2 files changed, 71 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 1db121f..ebd3538 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -25,6 +25,10 @@
#define INTC_SYSSTATUS 0x0014
#define INTC_SIR 0x0040
#define INTC_CONTROL 0x0048
+#define INTC_PROTECTION0x004C
+#define INTC_IDLE 0x0050
+#define INTC_THRESHOLD 0x0068
+#define INTC_MIR0 0x0084
#define INTC_MIR_CLEAR00x0088
#define INTC_MIR_SET0 0x008c
#define INTC_PENDING_IRQ0 0x0098
@@ -48,6 +52,18 @@ static struct omap_irq_bank {
},
};
+/* Structure to save interrupt controller context */
+struct omap3_intc_regs {
+ u32 sysconfig;
+ u32 protection;
+ u32 idle;
+ u32 threshold;
+ u32 ilr[INTCPS_NR_IRQS];
+ u32 mir[INTCPS_NR_MIR_REGS];
+};
+
+static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
+
/* INTC bank register get/set */
static void intc_bank_write_reg(u32 val, struct omap_irq_bank *bank, u16 reg)
@@ -209,3 +225,53 @@ void __init omap_init_irq(void)
}
}
+#ifdef CONFIG_ARCH_OMAP3
+void omap_intc_save_context(void)
+{
+ int ind = 0, i = 0;
+ for (ind = 0; ind ARRAY_SIZE(irq_banks); ind++) {
+ struct omap_irq_bank *bank = irq_banks + ind;
+ intc_context[ind].sysconfig =
+ intc_bank_read_reg(bank, INTC_SYSCONFIG);
+ intc_context[ind].protection =
+ intc_bank_read_reg(bank, INTC_PROTECTION);
+ intc_context[ind].idle =
+ intc_bank_read_reg(bank, INTC_IDLE);
+ intc_context[ind].threshold =
+ intc_bank_read_reg(bank, INTC_THRESHOLD);
+ for (i = 0; i INTCPS_NR_IRQS; i++)
+ intc_context[ind].ilr[i] =
+ intc_bank_read_reg(bank, (0x100 + 0x4*ind));
+ for (i = 0; i INTCPS_NR_MIR_REGS; i++)
+ intc_context[ind].mir[i] =
+ intc_bank_read_reg(irq_banks[0], INTC_MIR0 +
+ (0x20 * i));
+ }
+}
+
+void omap_intc_restore_context(void)
+{
+ int ind = 0, i = 0;
+
+ for (ind = 0; ind ARRAY_SIZE(irq_banks); ind++) {
+ struct omap_irq_bank *bank = irq_banks + ind;
+ intc_bank_write_reg(intc_context[ind].sysconfig,
+ bank, INTC_SYSCONFIG);
+ intc_bank_write_reg(intc_context[ind].sysconfig,
+ bank, INTC_SYSCONFIG);
+ intc_bank_write_reg(intc_context[ind].protection,
+ bank, INTC_PROTECTION);
+ intc_bank_write_reg(intc_context[ind].idle,
+ bank, INTC_IDLE);
+ intc_bank_write_reg(intc_context[ind].threshold,
+ bank, INTC_THRESHOLD);
+ for (i = 0; i INTCPS_NR_IRQS; i++)
+ intc_bank_write_reg(intc_context[ind].ilr[i],
+ bank, (0x100 + 0x4*ind));
+ for (i = 0; i INTCPS_NR_MIR_REGS; i++)
+ intc_bank_write_reg(intc_context[ind].mir[i],
+irq_banks[0], INTC_MIR0 + (0x20 * i));
+ }
+ /* MIRs are saved and restore with other PRCM registers */
+}
+#endif /* CONFIG_ARCH_OMAP3 */
diff --git a/arch/arm/plat-omap/include/plat/irqs.h
b/arch/arm/plat-omap/include/plat/irqs.h
index 6a6d028..ce5dd2d 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -477,9 +477,14 @@
#define OMAP_IRQ_BIT(irq) (1 ((irq) % 32))
+#define INTCPS_NR_MIR_REGS 3
+#define INTCPS_NR_IRQS 96
+
#ifndef __ASSEMBLY__
extern void omap_init_irq(void);
extern int omap_irq_pending(void);
+void omap_intc_save_context(void);
+void omap_intc_restore_context(void);
#endif
#include mach/hardware.h
--
1.6.4.3
--
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[PATCH v2 04/32] OMAP3: PM: PRCM context save/restore
From: Rajendra Nayak rna...@ti.com
Add context save and restore for PRCM module to support off-mode.
Additional registers (CM_CLKSEL4, CM_CLKEN, CM_CLKEN2) added by Tero
Kristo.
Missing CM_CLKEN_PLL_IVA2 register added by Kalle Jokiniemi.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Tero Kristo tero.kri...@nokia.com
Signed-off-by: Kalle Jokiniemi kalle.jokini...@digia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/prcm.c| 389 +
arch/arm/plat-omap/include/plat/control.h |2 +
arch/arm/plat-omap/include/plat/prcm.h|6 +-
3 files changed, 396 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index b0d3ad0..56f77df 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -7,6 +7,9 @@
*
* Written by Tony Lindgren tony.lindg...@nokia.com
*
+ * Copyright (C) 2007 Texas Instruments, Inc.
+ * Rajendra Nayak rna...@ti.com
+ *
* Some pieces of code Copyright (C) 2005 Texas Instruments, Inc.
*
* This program is free software; you can redistribute it and/or modify
@@ -21,8 +24,11 @@
#include plat/common.h
#include plat/prcm.h
+#include plat/irqs.h
+#include plat/control.h
#include clock.h
+#include cm.h
#include prm.h
#include prm-regbits-24xx.h
@@ -31,6 +37,88 @@ static void __iomem *cm_base;
#define MAX_MODULE_ENABLE_WAIT 10
+struct omap3_prcm_regs {
+ u32 control_padconf_sys_nirq;
+ u32 iva2_cm_clksel2;
+ u32 cm_sysconfig;
+ u32 sgx_cm_clksel;
+ u32 wkup_cm_clksel;
+ u32 dss_cm_clksel;
+ u32 cam_cm_clksel;
+ u32 per_cm_clksel;
+ u32 emu_cm_clksel;
+ u32 emu_cm_clkstctrl;
+ u32 pll_cm_autoidle2;
+ u32 pll_cm_clksel4;
+ u32 pll_cm_clksel5;
+ u32 pll_cm_clken;
+ u32 pll_cm_clken2;
+ u32 cm_polctrl;
+ u32 iva2_cm_fclken;
+ u32 iva2_cm_clken_pll;
+ u32 core_cm_fclken1;
+ u32 core_cm_fclken3;
+ u32 sgx_cm_fclken;
+ u32 wkup_cm_fclken;
+ u32 dss_cm_fclken;
+ u32 cam_cm_fclken;
+ u32 per_cm_fclken;
+ u32 usbhost_cm_fclken;
+ u32 core_cm_iclken1;
+ u32 core_cm_iclken2;
+ u32 core_cm_iclken3;
+ u32 sgx_cm_iclken;
+ u32 wkup_cm_iclken;
+ u32 dss_cm_iclken;
+ u32 cam_cm_iclken;
+ u32 per_cm_iclken;
+ u32 usbhost_cm_iclken;
+ u32 iva2_cm_autiidle2;
+ u32 mpu_cm_autoidle2;
+ u32 pll_cm_autoidle;
+ u32 iva2_cm_clkstctrl;
+ u32 mpu_cm_clkstctrl;
+ u32 core_cm_clkstctrl;
+ u32 sgx_cm_clkstctrl;
+ u32 dss_cm_clkstctrl;
+ u32 cam_cm_clkstctrl;
+ u32 per_cm_clkstctrl;
+ u32 neon_cm_clkstctrl;
+ u32 usbhost_cm_clkstctrl;
+ u32 core_cm_autoidle1;
+ u32 core_cm_autoidle2;
+ u32 core_cm_autoidle3;
+ u32 wkup_cm_autoidle;
+ u32 dss_cm_autoidle;
+ u32 cam_cm_autoidle;
+ u32 per_cm_autoidle;
+ u32 usbhost_cm_autoidle;
+ u32 sgx_cm_sleepdep;
+ u32 dss_cm_sleepdep;
+ u32 cam_cm_sleepdep;
+ u32 per_cm_sleepdep;
+ u32 usbhost_cm_sleepdep;
+ u32 cm_clkout_ctrl;
+ u32 prm_clkout_ctrl;
+ u32 sgx_pm_wkdep;
+ u32 dss_pm_wkdep;
+ u32 cam_pm_wkdep;
+ u32 per_pm_wkdep;
+ u32 neon_pm_wkdep;
+ u32 usbhost_pm_wkdep;
+ u32 core_pm_mpugrpsel1;
+ u32 iva2_pm_ivagrpsel1;
+ u32 core_pm_mpugrpsel3;
+ u32 core_pm_ivagrpsel3;
+ u32 wkup_pm_mpugrpsel;
+ u32 wkup_pm_ivagrpsel;
+ u32 per_pm_mpugrpsel;
+ u32 per_pm_ivagrpsel;
+ u32 wkup_pm_wken;
+};
+
+struct omap3_prcm_regs prcm_context;
+
u32 omap_prcm_get_reset_sources(void)
{
/* XXX This presumably needs modification for 34XX */
@@ -168,3 +256,304 @@ void __init omap2_set_globals_prcm(struct omap_globals
*omap2_globals)
prm_base = omap2_globals-prm;
cm_base = omap2_globals-cm;
}
+
+#ifdef CONFIG_ARCH_OMAP3
+void omap3_prcm_save_context(void)
+{
+ prcm_context.control_padconf_sys_nirq =
+omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_SYSNIRQ);
+ prcm_context.iva2_cm_clksel2 =
+cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL2);
+ prcm_context.cm_sysconfig = __raw_readl(OMAP3430_CM_SYSCONFIG);
+ prcm_context.sgx_cm_clksel =
+cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL);
+ prcm_context.wkup_cm_clksel = cm_read_mod_reg(WKUP_MOD, CM_CLKSEL);
+ prcm_context.dss_cm_clksel =
+cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSEL);
+ prcm_context.cam_cm_clksel =
+cm_read_mod_reg(OMAP3430_CAM_MOD, CM_CLKSEL);
+ prcm_context.per_cm_clksel =
+cm_read_mod_reg(OMAP3430_PER_MOD, CM_CLKSEL);
+ prcm_context.emu_cm_clksel =
+
[PATCH v2 05/32] OMAP3: PM: Populate scratchpad contents
From: Rajendra Nayak rna...@ti.com
This patch populates the scratchpad contents as expected by the
bootROM code.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/control.c | 203 +
arch/arm/plat-omap/include/plat/control.h |9 ++
2 files changed, 212 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 6adb360..03e1bce 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -17,9 +17,81 @@
#include plat/common.h
#include plat/control.h
+#include plat/sdrc.h
+#include cm-regbits-34xx.h
+#include prm-regbits-34xx.h
+#include cm.h
+#include prm.h
+#include sdrc.h
static void __iomem *omap2_ctrl_base;
+struct omap3_scratchpad {
+ u32 boot_config_ptr;
+ u32 public_restore_ptr;
+ u32 secure_ram_restore_ptr;
+ u32 sdrc_module_semaphore;
+ u32 prcm_block_offset;
+ u32 sdrc_block_offset;
+};
+
+struct omap3_scratchpad_prcm_block {
+ u32 prm_clksrc_ctrl;
+ u32 prm_clksel;
+ u32 cm_clksel_core;
+ u32 cm_clksel_wkup;
+ u32 cm_clken_pll;
+ u32 cm_autoidle_pll;
+ u32 cm_clksel1_pll;
+ u32 cm_clksel2_pll;
+ u32 cm_clksel3_pll;
+ u32 cm_clken_pll_mpu;
+ u32 cm_autoidle_pll_mpu;
+ u32 cm_clksel1_pll_mpu;
+ u32 cm_clksel2_pll_mpu;
+ u32 prcm_block_size;
+};
+
+struct omap3_scratchpad_sdrc_block {
+ u16 sysconfig;
+ u16 cs_cfg;
+ u16 sharing;
+ u16 err_type;
+ u32 dll_a_ctrl;
+ u32 dll_b_ctrl;
+ u32 power;
+ u32 cs_0;
+ u32 mcfg_0;
+ u16 mr_0;
+ u16 emr_1_0;
+ u16 emr_2_0;
+ u16 emr_3_0;
+ u32 actim_ctrla_0;
+ u32 actim_ctrlb_0;
+ u32 rfr_ctrl_0;
+ u32 cs_1;
+ u32 mcfg_1;
+ u16 mr_1;
+ u16 emr_1_1;
+ u16 emr_2_1;
+ u16 emr_3_1;
+ u32 actim_ctrla_1;
+ u32 actim_ctrlb_1;
+ u32 rfr_ctrl_1;
+ u16 dcdl_1_ctrl;
+ u16 dcdl_2_ctrl;
+ u32 flags;
+ u32 block_size;
+};
+
+/*
+ * This is used to store ARM registers in SDRAM before attempting
+ * an MPU OFF. The save and restore happens from the SRAM sleep code.
+ * The address is stored in scratchpad, so that it can be used
+ * during the restore path.
+ */
+u32 omap3_arm_context[128];
+
#define OMAP_CTRL_REGADDR(reg) (omap2_ctrl_base + (reg))
void __init omap2_set_globals_control(struct omap_globals *omap2_globals)
@@ -62,3 +134,134 @@ void omap_ctrl_writel(u32 val, u16 offset)
__raw_writel(val, OMAP_CTRL_REGADDR(offset));
}
+#ifdef CONFIG_ARCH_OMAP3
+/*
+ * Clears the scratchpad contents in case of cold boot-
+ * called during bootup
+ */
+void omap3_clear_scratchpad_contents(void)
+{
+ u32 max_offset = OMAP343X_SCRATCHPAD_ROM_OFFSET;
+ u32 *v_addr;
+ u32 offset = 0;
+ v_addr = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD_ROM);
+ if (prm_read_mod_reg(OMAP3430_GR_MOD, OMAP3_PRM_RSTST_OFFSET)
+ OMAP3430_GLOBAL_COLD_RST) {
+ for ( ; offset = max_offset; offset += 0x4)
+ __raw_writel(0x0, (v_addr + offset));
+ prm_set_mod_reg_bits(OMAP3430_GLOBAL_COLD_RST, OMAP3430_GR_MOD,
+ OMAP3_PRM_RSTST_OFFSET);
+ }
+}
+
+/* Populate the scratchpad structure with restore structure */
+void omap3_save_scratchpad_contents(void)
+{
+ void * __iomem scratchpad_address;
+ u32 arm_context_addr;
+ struct omap3_scratchpad scratchpad_contents;
+ struct omap3_scratchpad_prcm_block prcm_block_contents;
+ struct omap3_scratchpad_sdrc_block sdrc_block_contents;
+
+ /* Populate the Scratchpad contents */
+ scratchpad_contents.boot_config_ptr = 0x0;
+ scratchpad_contents.public_restore_ptr =
+virt_to_phys(get_restore_pointer());
+ scratchpad_contents.secure_ram_restore_ptr = 0x0;
+ scratchpad_contents.sdrc_module_semaphore = 0x0;
+ scratchpad_contents.prcm_block_offset = 0x2C;
+ scratchpad_contents.sdrc_block_offset = 0x64;
+
+ /* Populate the PRCM block contents */
+ prcm_block_contents.prm_clksrc_ctrl = prm_read_mod_reg(OMAP3430_GR_MOD,
+ OMAP3_PRM_CLKSRC_CTRL_OFFSET);
+ prcm_block_contents.prm_clksel = prm_read_mod_reg(OMAP3430_CCR_MOD,
+ OMAP3_PRM_CLKSEL_OFFSET);
+ prcm_block_contents.cm_clksel_core =
+ cm_read_mod_reg(CORE_MOD, CM_CLKSEL);
+ prcm_block_contents.cm_clksel_wkup =
+ cm_read_mod_reg(WKUP_MOD, CM_CLKSEL);
+ prcm_block_contents.cm_clken_pll =
+ cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKEN_PLL);
+ prcm_block_contents.cm_autoidle_pll =
+ cm_read_mod_reg(PLL_MOD, OMAP3430_CM_AUTOIDLE_PLL);
+
[PATCH v2 06/32] OMAP3: PM: SCM context save/restore
From: Rajendra Nayak rna...@ti.com
Add context save and restore for the System Control Module to suport
off-mode.
ETK and debobs definitions added by Peter De Schrijver.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/control.c | 157 -
arch/arm/plat-omap/include/plat/control.h | 49 +-
2 files changed, 202 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 03e1bce..3ea417d 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -26,6 +26,7 @@
static void __iomem *omap2_ctrl_base;
+#if defined(CONFIG_ARCH_OMAP3) defined(CONFIG_PM)
struct omap3_scratchpad {
u32 boot_config_ptr;
u32 public_restore_ptr;
@@ -92,6 +93,47 @@ struct omap3_scratchpad_sdrc_block {
*/
u32 omap3_arm_context[128];
+struct omap3_control_regs {
+ u32 sysconfig;
+ u32 devconf0;
+ u32 mem_dftrw0;
+ u32 mem_dftrw1;
+ u32 msuspendmux_0;
+ u32 msuspendmux_1;
+ u32 msuspendmux_2;
+ u32 msuspendmux_3;
+ u32 msuspendmux_4;
+ u32 msuspendmux_5;
+ u32 sec_ctrl;
+ u32 devconf1;
+ u32 csirxfe;
+ u32 iva2_bootaddr;
+ u32 iva2_bootmod;
+ u32 debobs_0;
+ u32 debobs_1;
+ u32 debobs_2;
+ u32 debobs_3;
+ u32 debobs_4;
+ u32 debobs_5;
+ u32 debobs_6;
+ u32 debobs_7;
+ u32 debobs_8;
+ u32 prog_io0;
+ u32 prog_io1;
+ u32 dss_dpll_spreading;
+ u32 core_dpll_spreading;
+ u32 per_dpll_spreading;
+ u32 usbhost_dpll_spreading;
+ u32 pbias_lite;
+ u32 temp_sensor;
+ u32 sramldo4;
+ u32 sramldo5;
+ u32 csi;
+};
+
+static struct omap3_control_regs control_context;
+#endif /* CONFIG_ARCH_OMAP3 CONFIG_PM */
+
#define OMAP_CTRL_REGADDR(reg) (omap2_ctrl_base + (reg))
void __init omap2_set_globals_control(struct omap_globals *omap2_globals)
@@ -134,7 +176,7 @@ void omap_ctrl_writel(u32 val, u16 offset)
__raw_writel(val, OMAP_CTRL_REGADDR(offset));
}
-#ifdef CONFIG_ARCH_OMAP3
+#if defined(CONFIG_ARCH_OMAP3) defined(CONFIG_PM)
/*
* Clears the scratchpad contents in case of cold boot-
* called during bootup
@@ -264,4 +306,115 @@ void omap3_save_scratchpad_contents(void)
sizeof(sdrc_block_contents), arm_context_addr, 4);
}
-#endif /* CONFIG_ARCH_OMAP3 */
+void omap3_control_save_context(void)
+{
+ control_context.sysconfig = omap_ctrl_readl(OMAP2_CONTROL_SYSCONFIG);
+ control_context.devconf0 = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
+ control_context.mem_dftrw0 =
+ omap_ctrl_readl(OMAP343X_CONTROL_MEM_DFTRW0);
+ control_context.mem_dftrw1 =
+ omap_ctrl_readl(OMAP343X_CONTROL_MEM_DFTRW1);
+ control_context.msuspendmux_0 =
+ omap_ctrl_readl(OMAP2_CONTROL_MSUSPENDMUX_0);
+ control_context.msuspendmux_1 =
+ omap_ctrl_readl(OMAP2_CONTROL_MSUSPENDMUX_1);
+ control_context.msuspendmux_2 =
+ omap_ctrl_readl(OMAP2_CONTROL_MSUSPENDMUX_2);
+ control_context.msuspendmux_3 =
+ omap_ctrl_readl(OMAP2_CONTROL_MSUSPENDMUX_3);
+ control_context.msuspendmux_4 =
+ omap_ctrl_readl(OMAP2_CONTROL_MSUSPENDMUX_4);
+ control_context.msuspendmux_5 =
+ omap_ctrl_readl(OMAP2_CONTROL_MSUSPENDMUX_5);
+ control_context.sec_ctrl = omap_ctrl_readl(OMAP2_CONTROL_SEC_CTRL);
+ control_context.devconf1 = omap_ctrl_readl(OMAP343X_CONTROL_DEVCONF1);
+ control_context.csirxfe = omap_ctrl_readl(OMAP343X_CONTROL_CSIRXFE);
+ control_context.iva2_bootaddr =
+ omap_ctrl_readl(OMAP343X_CONTROL_IVA2_BOOTADDR);
+ control_context.iva2_bootmod =
+ omap_ctrl_readl(OMAP343X_CONTROL_IVA2_BOOTMOD);
+ control_context.debobs_0 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(0));
+ control_context.debobs_1 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(1));
+ control_context.debobs_2 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(2));
+ control_context.debobs_3 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(3));
+ control_context.debobs_4 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(4));
+ control_context.debobs_5 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(5));
+ control_context.debobs_6 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(6));
+ control_context.debobs_7 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(7));
+ control_context.debobs_8 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(8));
+ control_context.prog_io0 = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO0);
+ control_context.prog_io1 = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1);
[PATCH v2 07/32] OMAP3: PM: restore SRAM functions after off-mode.
From: Rajendra Nayak rna...@ti.com
Generalize the copy of SRAM functions into omap_push_sram_idle()
so it can be used on init but also after off-mode transitions.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm34xx.c | 10 +++---
arch/arm/plat-omap/include/plat/sram.h |6 ++
arch/arm/plat-omap/sram.c |8 +---
3 files changed, 18 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 3910549..b88da1b 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -749,6 +749,12 @@ static int __init clkdms_setup(struct clockdomain *clkdm,
void *unused)
return 0;
}
+void omap_push_sram_idle(void)
+{
+ _omap_sram_idle = omap_sram_push(omap34xx_cpu_suspend,
+ omap34xx_cpu_suspend_sz);
+}
+
static int __init omap3_pm_init(void)
{
struct power_state *pwrst, *tmp;
@@ -786,9 +792,7 @@ static int __init omap3_pm_init(void)
goto err2;
}
- _omap_sram_idle = omap_sram_push(omap34xx_cpu_suspend,
-omap34xx_cpu_suspend_sz);
-
+ omap_push_sram_idle();
#ifdef CONFIG_SUSPEND
suspend_set_ops(omap_pm_ops);
#endif /* CONFIG_SUSPEND */
diff --git a/arch/arm/plat-omap/include/plat/sram.h
b/arch/arm/plat-omap/include/plat/sram.h
index 8974e3f..77799d5 100644
--- a/arch/arm/plat-omap/include/plat/sram.h
+++ b/arch/arm/plat-omap/include/plat/sram.h
@@ -68,4 +68,10 @@ extern u32 omap3_sram_configure_core_dpll(
u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
extern unsigned long omap3_sram_configure_core_dpll_sz;
+#ifdef CONFIG_PM
+extern void omap_push_sram_idle(void);
+#else
+static inline void omap_push_sram_idle(void) {}
+#endif /* CONFIG_PM */
+
#endif
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index a53aa85..3e92366 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -396,22 +396,24 @@ u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32
f, u32 inc,
sdrc_actim_ctrl_b_1, sdrc_mr_1);
}
-/* REVISIT: Should this be same as omap34xx_sram_init() after off-idle? */
-void restore_sram_functions(void)
+#ifdef CONFIG_PM
+void omap3_sram_restore_context(void)
{
omap_sram_ceil = omap_sram_base + omap_sram_size;
_omap3_sram_configure_core_dpll =
omap_sram_push(omap3_sram_configure_core_dpll,
omap3_sram_configure_core_dpll_sz);
+ omap_push_sram_idle();
}
+#endif /* CONFIG_PM */
int __init omap34xx_sram_init(void)
{
_omap3_sram_configure_core_dpll =
omap_sram_push(omap3_sram_configure_core_dpll,
omap3_sram_configure_core_dpll_sz);
-
+ omap_push_sram_idle();
return 0;
}
#else
--
1.6.4.3
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[PATCH v2 08/32] OMAP3: PM: handle PER/NEON/CORE in idle
From: Rajendra Nayak rna...@ti.com
Expand the powerdomains handled in the idle path to include PER, NEON
and CORE. This includes properly clearing the previous powerstates,
linking NEON state to MPU state and calling the UART prepare functions
for only the appropraite powerdomain transitions (CORE for UART1,2,
PER for UART3.)
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm34xx.c | 64 +++--
1 files changed, 54 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index b88da1b..05ee05f 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -49,7 +49,10 @@ static LIST_HEAD(pwrst_list);
static void (*_omap_sram_idle)(u32 *addr, int save_state);
-static struct powerdomain *mpu_pwrdm;
+static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
+static struct powerdomain *core_pwrdm, *per_pwrdm;
+
+static int set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
/*
* PRCM Interrupt Handler Helper Function
@@ -169,13 +172,22 @@ static void omap_sram_idle(void)
/* save_state = 1 = Only L1 and logic lost */
/* save_state = 2 = Only L2 lost */
/* save_state = 3 = L1, L2 and logic lost */
- int save_state = 0, mpu_next_state;
+ int save_state = 0;
+ int mpu_next_state = PWRDM_POWER_ON;
+ int per_next_state = PWRDM_POWER_ON;
+ int core_next_state = PWRDM_POWER_ON;
if (!_omap_sram_idle)
return;
+ pwrdm_clear_all_prev_pwrst(mpu_pwrdm);
+ pwrdm_clear_all_prev_pwrst(neon_pwrdm);
+ pwrdm_clear_all_prev_pwrst(core_pwrdm);
+ pwrdm_clear_all_prev_pwrst(per_pwrdm);
+
mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);
switch (mpu_next_state) {
+ case PWRDM_POWER_ON:
case PWRDM_POWER_RET:
/* No need to save context */
save_state = 0;
@@ -187,18 +199,37 @@ static void omap_sram_idle(void)
}
pwrdm_pre_transition();
- omap2_gpio_prepare_for_retention();
- omap_uart_prepare_idle(0);
- omap_uart_prepare_idle(1);
- omap_uart_prepare_idle(2);
+ /* NEON control */
+ if (pwrdm_read_pwrst(neon_pwrdm) == PWRDM_POWER_ON)
+ set_pwrdm_state(neon_pwrdm, mpu_next_state);
+
+ /* CORE PER */
+ core_next_state = pwrdm_read_next_pwrst(core_pwrdm);
+ if (core_next_state PWRDM_POWER_ON) {
+ omap2_gpio_prepare_for_retention();
+ omap_uart_prepare_idle(0);
+ omap_uart_prepare_idle(1);
+ /* PER changes only with core */
+ per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
+ if (per_next_state PWRDM_POWER_ON)
+ omap_uart_prepare_idle(2);
+ /* Enable IO-PAD wakeup */
+ prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
+ }
_omap_sram_idle(NULL, save_state);
cpu_init();
- omap_uart_resume_idle(2);
- omap_uart_resume_idle(1);
- omap_uart_resume_idle(0);
- omap2_gpio_resume_after_retention();
+ if (core_next_state PWRDM_POWER_ON) {
+ if (per_next_state PWRDM_POWER_ON)
+ omap_uart_resume_idle(2);
+ omap_uart_resume_idle(1);
+ omap_uart_resume_idle(0);
+
+ /* Disable IO-PAD wakeup */
+ prm_clear_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
+ omap2_gpio_resume_after_retention();
+ }
pwrdm_post_transition();
@@ -792,6 +823,10 @@ static int __init omap3_pm_init(void)
goto err2;
}
+ neon_pwrdm = pwrdm_lookup(neon_pwrdm);
+ per_pwrdm = pwrdm_lookup(per_pwrdm);
+ core_pwrdm = pwrdm_lookup(core_pwrdm);
+
omap_push_sram_idle();
#ifdef CONFIG_SUSPEND
suspend_set_ops(omap_pm_ops);
@@ -799,6 +834,15 @@ static int __init omap3_pm_init(void)
pm_idle = omap3_pm_idle;
+ pwrdm_add_wkdep(neon_pwrdm, mpu_pwrdm);
+ /*
+* REVISIT: This wkdep is only necessary when GPIO2-6 are enabled for
+* IO-pad wakeup. Otherwise it will unnecessarily waste power
+* waking up PER with every CORE wakeup - see
+* http://marc.info/?l=linux-omapm=121852150710062w=2
+ */
+ pwrdm_add_wkdep(per_pwrdm, core_pwrdm);
+
err1:
return ret;
err2:
--
1.6.4.3
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[PATCH v2 09/32] OMAP3: PM: Restore MMU table entry
From: Rajendra Nayak rna...@ti.com
During the MMU restoration on the restore path from MPU OFF, the page
table entry for the page consisting of the code being executed is
modified to make MMU return VA=PA.
The MMU is then enabled and the original entry is being stored in
scratchpad. This patch reads the original values stored in
scratchpad, and restores them back.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm34xx.c | 35 +++
1 files changed, 35 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 05ee05f..8b5bf91 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -29,6 +29,8 @@
#include plat/control.h
#include plat/serial.h
+#include asm/tlbflush.h
+
#include cm.h
#include cm-regbits-34xx.h
#include prm-regbits-34xx.h
@@ -164,6 +166,35 @@ static irqreturn_t prcm_interrupt_handler (int irq, void
*dev_id)
return IRQ_HANDLED;
}
+static void restore_control_register(u32 val)
+{
+ __asm__ __volatile__ (mcr p15, 0, %0, c1, c0, 0 : : r (val));
+}
+
+/* Function to restore the table entry that was modified for enabling MMU */
+static void restore_table_entry(void)
+{
+ u32 *scratchpad_address;
+ u32 previous_value, control_reg_value;
+ u32 *address;
+
+ scratchpad_address = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD);
+
+ /* Get address of entry that was modified */
+ address = (u32 *)__raw_readl(scratchpad_address +
+OMAP343X_TABLE_ADDRESS_OFFSET);
+ /* Get the previous value which needs to be restored */
+ previous_value = __raw_readl(scratchpad_address +
+OMAP343X_TABLE_VALUE_OFFSET);
+ address = __va(address);
+ *address = previous_value;
+ flush_tlb_all();
+ control_reg_value = __raw_readl(scratchpad_address
+ + OMAP343X_CONTROL_REG_VALUE_OFFSET);
+ /* This will enable caches and prediction */
+ restore_control_register(control_reg_value);
+}
+
static void omap_sram_idle(void)
{
/* Variable to tell what needs to be saved and restored
@@ -220,6 +251,10 @@ static void omap_sram_idle(void)
_omap_sram_idle(NULL, save_state);
cpu_init();
+ /* Restore table entry modified during MMU restoration */
+ if (pwrdm_read_prev_pwrst(mpu_pwrdm) == PWRDM_POWER_OFF)
+ restore_table_entry();
+
if (core_next_state PWRDM_POWER_ON) {
if (per_next_state PWRDM_POWER_ON)
omap_uart_resume_idle(2);
--
1.6.4.3
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[PATCH v2 10/32] OMAP3: PM: MPU off-mode support
From: Rajendra Nayak rna...@ti.com
Adds a 'save_state' option when calling into SRAM idle function
and adds some minor cleanups of SRAM asm code.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm34xx.c| 11 ++-
arch/arm/mach-omap2/sleep34xx.S | 11 ---
2 files changed, 14 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 8b5bf91..9fb0876 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -28,6 +28,7 @@
#include plat/powerdomain.h
#include plat/control.h
#include plat/serial.h
+#include plat/sdrc.h
#include asm/tlbflush.h
@@ -223,6 +224,9 @@ static void omap_sram_idle(void)
/* No need to save context */
save_state = 0;
break;
+ case PWRDM_POWER_OFF:
+ save_state = 3;
+ break;
default:
/* Invalid state */
printk(KERN_ERR Invalid mpu state in sram_idle\n);
@@ -248,7 +252,12 @@ static void omap_sram_idle(void)
prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
}
- _omap_sram_idle(NULL, save_state);
+ /*
+* omap3_arm_context is the location where ARM registers
+* get saved. The restore path then reads from this
+* location and restores them back.
+*/
+ _omap_sram_idle(omap3_arm_context, save_state);
cpu_init();
/* Restore table entry modified during MMU restoration */
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 6a749f2..f8d3834 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -36,12 +36,11 @@
OMAP3430_PM_PREPWSTST)
#define PM_PREPWSTST_MPU_V OMAP34XX_PRM_REGADDR(MPU_MOD, \
OMAP3430_PM_PREPWSTST)
-#define PM_PWSTCTRL_MPU_P OMAP34XX_PRM_REGADDR(MPU_MOD, PM_PWSTCTRL)
+#define PM_PWSTCTRL_MPU_P OMAP3430_PRM_BASE + MPU_MOD + PM_PWSTCTRL
#define SCRATCHPAD_MEM_OFFS0x310 /* Move this as correct place is
* available */
-#define SCRATCHPAD_BASE_P OMAP343X_CTRL_REGADDR(\
- OMAP343X_CONTROL_MEM_WKUP +\
- SCRATCHPAD_MEM_OFFS)
+#define SCRATCHPAD_BASE_P (OMAP343X_CTRL_BASE + OMAP343X_CONTROL_MEM_WKUP\
+ + SCRATCHPAD_MEM_OFFS)
#define SDRC_POWER_V OMAP34XX_SDRC_REGADDR(SDRC_POWER)
.text
@@ -96,7 +95,7 @@ loop:
ldmfd sp!, {r0-r12, pc} @ restore regs and return
restore:
- /* b restore*/ @ Enable to debug restore code
+ /* b restore*/ @ Enable to debug restore code
/* Check what was the reason for mpu reset and store the reason in r9*/
/* 1 - Only L1 and logic lost */
/* 2 - Only L2 lost - In this case, we wont be here */
@@ -416,8 +415,6 @@ scratchpad_base:
.word SCRATCHPAD_BASE_P
sdrc_power:
.word SDRC_POWER_V
-context_mem:
- .word 0x803E3E14
clk_stabilize_delay:
.word 0x01FF
assoc_mask:
--
1.6.4.3
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[PATCH v2 11/32] OMAP3: PM: CORE domain off-mode support
From: Rajendra Nayak rna...@ti.com
Add context save and restore for CORE powerdomain resources in order
to support off-mode.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm34xx.c | 73 +++-
arch/arm/plat-omap/include/plat/sram.h |1 +
2 files changed, 73 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 9fb0876..bab9b48 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -5,6 +5,9 @@
* Tony Lindgren t...@atomide.com
* Jouni Hogander
*
+ * Copyright (C) 2007 Texas Instruments, Inc.
+ * Rajendra Nayak rna...@ti.com
+ *
* Copyright (C) 2005 Texas Instruments, Inc.
* Richard Woodruff r-woodru...@ti.com
*
@@ -29,6 +32,8 @@
#include plat/control.h
#include plat/serial.h
#include plat/sdrc.h
+#include plat/prcm.h
+#include plat/gpmc.h
#include asm/tlbflush.h
@@ -39,6 +44,11 @@
#include prm.h
#include pm.h
+/* Scratchpad offsets */
+#define OMAP343X_TABLE_ADDRESS_OFFSET 0x31
+#define OMAP343X_TABLE_VALUE_OFFSET 0x30
+#define OMAP343X_CONTROL_REG_VALUE_OFFSET 0x32
+
struct power_state {
struct powerdomain *pwrdm;
u32 next_state;
@@ -57,6 +67,46 @@ static struct powerdomain *core_pwrdm, *per_pwrdm;
static int set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
+static inline void omap3_per_save_context(void)
+{
+ omap_gpio_save_context();
+}
+
+static inline void omap3_per_restore_context(void)
+{
+ omap_gpio_restore_context();
+}
+
+static void omap3_core_save_context(void)
+{
+ u32 control_padconf_off;
+
+ /* Save the padconf registers */
+ control_padconf_off = omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_OFF);
+ control_padconf_off |= START_PADCONF_SAVE;
+ omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF);
+ /* wait for the save to complete */
+ while (!omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS)
+PADCONF_SAVE_DONE)
+ ;
+ /* Save the Interrupt controller context */
+ omap_intc_save_context();
+ /* Save the GPMC context */
+ omap3_gpmc_save_context();
+ /* Save the system control module context, padconf already save above*/
+ omap3_control_save_context();
+}
+
+static void omap3_core_restore_context(void)
+{
+ /* Restore the control module context, padconf restored by h/w */
+ omap3_control_restore_context();
+ /* Restore the GPMC context */
+ omap3_gpmc_restore_context();
+ /* Restore the interrupt controller context */
+ omap_intc_restore_context();
+}
+
/*
* PRCM Interrupt Handler Helper Function
*
@@ -208,6 +258,7 @@ static void omap_sram_idle(void)
int mpu_next_state = PWRDM_POWER_ON;
int per_next_state = PWRDM_POWER_ON;
int core_next_state = PWRDM_POWER_ON;
+ int core_prev_state, per_prev_state;
if (!_omap_sram_idle)
return;
@@ -246,8 +297,15 @@ static void omap_sram_idle(void)
omap_uart_prepare_idle(1);
/* PER changes only with core */
per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
- if (per_next_state PWRDM_POWER_ON)
+ if (per_next_state PWRDM_POWER_ON) {
omap_uart_prepare_idle(2);
+ if (per_next_state == PWRDM_POWER_OFF)
+ omap3_per_save_context();
+ }
+ if (core_next_state == PWRDM_POWER_OFF) {
+ omap3_core_save_context();
+ omap3_prcm_save_context();
+ }
/* Enable IO-PAD wakeup */
prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
}
@@ -272,6 +330,18 @@ static void omap_sram_idle(void)
/* Disable IO-PAD wakeup */
prm_clear_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
+ core_prev_state = pwrdm_read_prev_pwrst(core_pwrdm);
+ if (core_prev_state == PWRDM_POWER_OFF) {
+ omap3_core_restore_context();
+ omap3_prcm_restore_context();
+ omap3_sram_restore_context();
+ }
+ if (per_next_state PWRDM_POWER_ON) {
+ per_prev_state =
+ pwrdm_read_prev_pwrst(per_pwrdm);
+ if (per_prev_state == PWRDM_POWER_OFF)
+ omap3_per_restore_context();
+ }
omap2_gpio_resume_after_retention();
}
@@ -843,6 +913,7 @@ static int __init omap3_pm_init(void)
/* XXX prcm_setup_regs needs to be before enabling hw
* supervised mode for powerdomains */
prcm_setup_regs();
+ omap3_save_scratchpad_contents();
[PATCH v2 12/32] OMAP: PM: DMA context save/restore for off-mode support
From: Tero Kristo tero.kri...@nokia.com
For HS/EMU devices, these additional features are also used:
- DMA interrupt disable routine added
- Added DMA controller reset to DMA context restore
Signed-off-by: Tero Kristo tero.kri...@nokia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm34xx.c |3 ++
arch/arm/plat-omap/dma.c | 41 +
arch/arm/plat-omap/include/plat/dma.h |5
3 files changed, 49 insertions(+), 0 deletions(-)
mode change 100644 = 100755 arch/arm/plat-omap/include/plat/dma.h
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index bab9b48..54fea79 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -34,6 +34,7 @@
#include plat/sdrc.h
#include plat/prcm.h
#include plat/gpmc.h
+#include plat/dma.h
#include asm/tlbflush.h
@@ -95,6 +96,7 @@ static void omap3_core_save_context(void)
omap3_gpmc_save_context();
/* Save the system control module context, padconf already save above*/
omap3_control_save_context();
+ omap_dma_global_context_save();
}
static void omap3_core_restore_context(void)
@@ -105,6 +107,7 @@ static void omap3_core_restore_context(void)
omap3_gpmc_restore_context();
/* Restore the interrupt controller context */
omap_intc_restore_context();
+ omap_dma_global_context_restore();
}
/*
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 3edffde..c0a6060 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -54,6 +54,12 @@ enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOTSTARTED };
static int enable_1510_mode;
+static struct omap_dma_global_context_registers {
+ u32 dma_irqenable_l0;
+ u32 dma_ocp_sysconfig;
+ u32 dma_gcr;
+} omap_dma_global_context;
+
struct omap_dma_lch {
int next_lch;
int dev_id;
@@ -2341,6 +2347,41 @@ void omap_stop_lcd_dma(void)
}
EXPORT_SYMBOL(omap_stop_lcd_dma);
+void omap_dma_global_context_save(void)
+{
+ omap_dma_global_context.dma_irqenable_l0 =
+ dma_read(IRQENABLE_L0);
+ omap_dma_global_context.dma_ocp_sysconfig =
+ dma_read(OCP_SYSCONFIG);
+ omap_dma_global_context.dma_gcr = dma_read(GCR);
+}
+EXPORT_SYMBOL(omap_dma_global_context_save);
+
+void omap_dma_global_context_restore(void)
+{
+ dma_write(0x2, OCP_SYSCONFIG);
+ while (!__raw_readl(omap_dma_base + OMAP_DMA4_SYSSTATUS))
+ ;
+ dma_write(omap_dma_global_context.dma_gcr, GCR);
+ dma_write(omap_dma_global_context.dma_ocp_sysconfig,
+ OCP_SYSCONFIG);
+ dma_write(omap_dma_global_context.dma_irqenable_l0,
+ IRQENABLE_L0);
+}
+EXPORT_SYMBOL(omap_dma_global_context_restore);
+
+void omap_dma_disable_irq(int lch)
+{
+ u32 val;
+
+ if (cpu_class_is_omap2()) {
+ /* Disable interrupts */
+ val = dma_read(IRQENABLE_L0);
+ val = ~(1 lch);
+ dma_write(val, IRQENABLE_L0);
+ }
+}
+
/**/
static int __init omap_init_dma(void)
diff --git a/arch/arm/plat-omap/include/plat/dma.h
b/arch/arm/plat-omap/include/plat/dma.h
old mode 100644
new mode 100755
index 72f680b..1c017b2
--- a/arch/arm/plat-omap/include/plat/dma.h
+++ b/arch/arm/plat-omap/include/plat/dma.h
@@ -633,6 +633,11 @@ extern void omap_set_dma_dst_endian_type(int lch, enum
end_type etype);
extern void omap_set_dma_src_endian_type(int lch, enum end_type etype);
extern int omap_get_dma_index(int lch, int *ei, int *fi);
+void omap_dma_global_context_save(void);
+void omap_dma_global_context_restore(void);
+
+extern void omap_dma_disable_irq(int lch);
+
/* Chaining APIs */
#ifndef CONFIG_ARCH_OMAP1
extern int omap_request_dma_chain(int dev_id, const char *dev_name,
--
1.6.4.3
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[PATCH v2 13/32] OMAP3 PM: off-mode support for HS/EMU devices
From: Tero Kristo tero.kri...@nokia.com
For HS/EMU devices, some additional resources need to be
saved/restored for off-mode support. Namely, saving the secure RAM
and a pointer to it in the scratchpad.
Signed-off-by: Tero Kristo tero.kri...@nokia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/control.c |8 -
arch/arm/mach-omap2/pm.h|3 ++
arch/arm/mach-omap2/pm34xx.c| 43 ++-
arch/arm/mach-omap2/sleep34xx.S | 75 ++-
4 files changed, 126 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 3ea417d..b84cff7 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -85,6 +85,8 @@ struct omap3_scratchpad_sdrc_block {
u32 block_size;
};
+void *omap3_secure_ram_storage;
+
/*
* This is used to store ARM registers in SDRAM before attempting
* an MPU OFF. The save and restore happens from the SRAM sleep code.
@@ -209,7 +211,11 @@ void omap3_save_scratchpad_contents(void)
scratchpad_contents.boot_config_ptr = 0x0;
scratchpad_contents.public_restore_ptr =
virt_to_phys(get_restore_pointer());
- scratchpad_contents.secure_ram_restore_ptr = 0x0;
+ if (omap_type() == OMAP2_DEVICE_TYPE_GP)
+ scratchpad_contents.secure_ram_restore_ptr = 0x0;
+ else
+ scratchpad_contents.secure_ram_restore_ptr =
+ (u32) __pa(omap3_secure_ram_storage);
scratchpad_contents.sdrc_module_semaphore = 0x0;
scratchpad_contents.prcm_block_offset = 0x2C;
scratchpad_contents.sdrc_block_offset = 0x64;
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 85b6fac..45cafac 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -13,6 +13,8 @@
#include plat/powerdomain.h
+extern void *omap3_secure_ram_storage;
+
extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
@@ -36,6 +38,7 @@ extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem
*sdrc_dlla_ctrl,
void __iomem *sdrc_power);
extern void omap34xx_cpu_suspend(u32 *addr, int save_state);
extern void save_secure_ram_context(u32 *addr);
+extern void omap3_save_scratchpad_contents(void);
extern unsigned int omap24xx_idle_loop_suspend_sz;
extern unsigned int omap34xx_suspend_sz;
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 54fea79..ebb88f3 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -63,6 +63,8 @@ static LIST_HEAD(pwrst_list);
static void (*_omap_sram_idle)(u32 *addr, int save_state);
+static int (*_omap_save_secure_sram)(u32 *addr);
+
static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
static struct powerdomain *core_pwrdm, *per_pwrdm;
@@ -110,6 +112,33 @@ static void omap3_core_restore_context(void)
omap_dma_global_context_restore();
}
+static void omap3_save_secure_ram_context(u32 target_mpu_state)
+{
+ u32 ret;
+
+ if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
+ /* Disable dma irq before calling secure rom code API */
+ omap_dma_disable_irq(0);
+ omap_dma_disable_irq(1);
+ /*
+* MPU next state must be set to POWER_ON temporarily,
+* otherwise the WFI executed inside the ROM code
+* will hang the system.
+*/
+ pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
+ ret = _omap_save_secure_sram((u32 *)
+ __pa(omap3_secure_ram_storage));
+ pwrdm_set_next_pwrst(mpu_pwrdm, target_mpu_state);
+ /* Following is for error tracking, it should not happen */
+ if (ret) {
+ printk(KERN_ERR save_secure_sram() returns %08x\n,
+ ret);
+ while (1)
+ ;
+ }
+ }
+}
+
/*
* PRCM Interrupt Handler Helper Function
*
@@ -308,6 +337,7 @@ static void omap_sram_idle(void)
if (core_next_state == PWRDM_POWER_OFF) {
omap3_core_save_context();
omap3_prcm_save_context();
+ omap3_save_secure_ram_context(mpu_next_state);
}
/* Enable IO-PAD wakeup */
prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
@@ -901,6 +931,9 @@ void omap_push_sram_idle(void)
{
_omap_sram_idle = omap_sram_push(omap34xx_cpu_suspend,
omap34xx_cpu_suspend_sz);
+ if (omap_type() != OMAP2_DEVICE_TYPE_GP)
+ _omap_save_secure_sram = omap_sram_push(save_secure_ram_context,
+
[PATCH v2 14/32] OMAP3: PM: save secure RAM only during init
From: Tero Kristo tero.kri...@nokia.com
The function omap3_save_secure_ram() is now called only once during
the initialization of the device and consequent sleep cycles will
re-use the same saved contents for secure RAM. Users who need secure
services should do secure RAM saving before entering off-mode, if a
secure service has been accessed after last save.
There are both latency and reliability issues with saving secure RAM
context in the idle path. The context save uses a hardware resource
which takes an order of hundreds of milliseconds to initialize after a
wake up from off-mode, and also there is no way of checking whether it
is ready from kernel side or not. It just crashes if you use it too
quickly
Additional fix to ensure scratchpad save is done after secure
RAM by Roger Quadros.
Signed-off-by: Tero Kristo tero.kri...@nokia.com
Signed-off-by: Roger Quadros ext-roger.quad...@nokia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm34xx.c | 19 +--
1 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index ebb88f3..310c189 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -112,6 +112,12 @@ static void omap3_core_restore_context(void)
omap_dma_global_context_restore();
}
+/*
+ * FIXME: This function should be called before entering off-mode after
+ * OMAP3 secure services have been accessed. Currently it is only called
+ * once during boot sequence, but this works as we are not using secure
+ * services.
+ */
static void omap3_save_secure_ram_context(u32 target_mpu_state)
{
u32 ret;
@@ -337,7 +343,6 @@ static void omap_sram_idle(void)
if (core_next_state == PWRDM_POWER_OFF) {
omap3_core_save_context();
omap3_prcm_save_context();
- omap3_save_secure_ram_context(mpu_next_state);
}
/* Enable IO-PAD wakeup */
prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
@@ -999,9 +1004,19 @@ static int __init omap3_pm_init(void)
if (!omap3_secure_ram_storage)
printk(KERN_ERR Memory allocation failed when
allocating for secure sram context\n);
+
+ local_irq_disable();
+ local_fiq_disable();
+
+ omap_dma_global_context_save();
+ omap3_save_secure_ram_context(PWRDM_POWER_ON);
+ omap_dma_global_context_restore();
+
+ local_irq_enable();
+ local_fiq_enable();
}
- omap3_save_scratchpad_contents();
+ omap3_save_scratchpad_contents();
err1:
return ret;
err2:
--
1.6.4.3
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[PATCH v2 15/32] OMAP3: PM: Enable SDRAM auto-refresh during sleep
From: Tero Kristo tero.kri...@nokia.com
Fix for ES3.0 bug: SDRC not sending auto-refresh when OMAP wakes-up
from OFF mode (warning for HS devices.)
Signed-off-by: Tero Kristo tero.kri...@nokia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm34xx.c | 29 +
1 files changed, 29 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 310c189..3f1f656 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -44,6 +44,13 @@
#include prm.h
#include pm.h
+#include sdrc.h
+
+#define SDRC_POWER_AUTOCOUNT_SHIFT 8
+#define SDRC_POWER_AUTOCOUNT_MASK (0x SDRC_POWER_AUTOCOUNT_SHIFT)
+#define SDRC_POWER_CLKCTRL_SHIFT 4
+#define SDRC_POWER_CLKCTRL_MASK (0x3 SDRC_POWER_CLKCTRL_SHIFT)
+#define SDRC_SELF_REFRESH_ON_AUTOCOUNT (0x2 SDRC_POWER_CLKCTRL_SHIFT)
/* Scratchpad offsets */
#define OMAP343X_TABLE_ADDRESS_OFFSET 0x31
@@ -297,6 +304,7 @@ static void omap_sram_idle(void)
int per_next_state = PWRDM_POWER_ON;
int core_next_state = PWRDM_POWER_ON;
int core_prev_state, per_prev_state;
+ u32 sdrc_pwr = 0;
if (!_omap_sram_idle)
return;
@@ -349,6 +357,21 @@ static void omap_sram_idle(void)
}
/*
+* Force SDRAM controller to self-refresh mode after timeout on
+* autocount. This is needed on ES3.0 to avoid SDRAM controller
+* hang-ups.
+*/
+ if (omap_rev() = OMAP3430_REV_ES3_0
+ omap_type() != OMAP2_DEVICE_TYPE_GP
+ core_next_state == PWRDM_POWER_OFF) {
+ sdrc_pwr = sdrc_read_reg(SDRC_POWER);
+ sdrc_write_reg((sdrc_pwr
+ ~(SDRC_POWER_AUTOCOUNT_MASK|SDRC_POWER_CLKCTRL_MASK)) |
+ (1 SDRC_POWER_AUTOCOUNT_SHIFT) |
+ SDRC_SELF_REFRESH_ON_AUTOCOUNT, SDRC_POWER);
+ }
+
+ /*
* omap3_arm_context is the location where ARM registers
* get saved. The restore path then reads from this
* location and restores them back.
@@ -356,6 +379,12 @@ static void omap_sram_idle(void)
_omap_sram_idle(omap3_arm_context, save_state);
cpu_init();
+ /* Restore normal SDRAM settings */
+ if (omap_rev() = OMAP3430_REV_ES3_0
+ omap_type() != OMAP2_DEVICE_TYPE_GP
+ core_next_state == PWRDM_POWER_OFF)
+ sdrc_write_reg(sdrc_pwr, SDRC_POWER);
+
/* Restore table entry modified during MMU restoration */
if (pwrdm_read_prev_pwrst(mpu_pwrdm) == PWRDM_POWER_OFF)
restore_table_entry();
--
1.6.4.3
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[PATCH v2 16/32] OMAP3: PM: Save and restore also CM_CLKSEL1_PLL_IVA2
From: Jouni Hogander jouni.hogan...@nokia.com
CM_CLKSEL1_PLL_IVA2 is not saved/restored currently. This patch is
adding save and restore for it.
Signed-off-by: Jouni Hogander jouni.hogan...@nokia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/prcm.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 56f77df..221eed1 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -39,6 +39,7 @@ static void __iomem *cm_base;
struct omap3_prcm_regs {
u32 control_padconf_sys_nirq;
+ u32 iva2_cm_clksel1;
u32 iva2_cm_clksel2;
u32 cm_sysconfig;
u32 sgx_cm_clksel;
@@ -262,6 +263,8 @@ void omap3_prcm_save_context(void)
{
prcm_context.control_padconf_sys_nirq =
omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_SYSNIRQ);
+ prcm_context.iva2_cm_clksel1 =
+cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL1);
prcm_context.iva2_cm_clksel2 =
cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL2);
prcm_context.cm_sysconfig = __raw_readl(OMAP3430_CM_SYSCONFIG);
@@ -417,6 +420,8 @@ void omap3_prcm_restore_context(void)
{
omap_ctrl_writel(prcm_context.control_padconf_sys_nirq,
OMAP343X_CONTROL_PADCONF_SYSNIRQ);
+ cm_write_mod_reg(prcm_context.iva2_cm_clksel1, OMAP3430_IVA2_MOD,
+CM_CLKSEL1);
cm_write_mod_reg(prcm_context.iva2_cm_clksel2, OMAP3430_IVA2_MOD,
CM_CLKSEL2);
__raw_writel(prcm_context.cm_sysconfig, OMAP3430_CM_SYSCONFIG);
--
1.6.4.3
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[PATCH v2 17/32] OMAP3: PM: Fix secure SRAM context save/restore
From: Kalle Jokiniemi kalle.jokini...@digia.com
The secure sram context save uses dma channels 0 and 1.
In order to avoid collision between kernel DMA transfers and
ROM code dma transfers, we need to reserve DMA channels 0
1 on high security devices.
A bug in ROM code leaves dma irq status bits uncleared.
Hence those irq status bits need to be cleared when restoring
DMA context after off mode.
There was also a faulty parameter given to PPA in the secure
ram context save assembly code, which caused interrupts to
be enabled during secure ram context save. This caused the
save to fail sometimes, which resulted the saved context
to be corrupted, but also left DMA channels in secure mode.
The secure mode DMA channels caused DMA secure error with
device 0 errors to be displayed.
Signed-off-by: Kalle Jokiniemi kalle.jokini...@digia.com
Signed-off-by: Jouni Hogander jouni.hogan...@nokia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm34xx.c|3 ---
arch/arm/mach-omap2/sleep34xx.S |2 +-
arch/arm/plat-omap/dma.c| 21 +
3 files changed, 18 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 3f1f656..a9f4034 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -130,9 +130,6 @@ static void omap3_save_secure_ram_context(u32
target_mpu_state)
u32 ret;
if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
- /* Disable dma irq before calling secure rom code API */
- omap_dma_disable_irq(0);
- omap_dma_disable_irq(1);
/*
* MPU next state must be set to POWER_ON temporarily,
* otherwise the WFI executed inside the ROM code
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index db75167..b6abadc 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -68,7 +68,7 @@ save_secure_ram_debug:
mov r0, #25 @ set service ID for PPA
mov r12, r0 @ copy secure service ID in r12
mov r1, #0 @ set task id for ROM code in r1
- mov r2, #7 @ set some flags in r2, r6
+ mov r2, #4 @ set some flags in r2, r6
mov r6, #0xff
mcr p15, 0, r0, c7, c10, 4 @ data write barrier
mcr p15, 0, r0, c7, c10, 5 @ data memory barrier
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index c0a6060..3b91fd3 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -2359,14 +2359,20 @@ EXPORT_SYMBOL(omap_dma_global_context_save);
void omap_dma_global_context_restore(void)
{
- dma_write(0x2, OCP_SYSCONFIG);
- while (!__raw_readl(omap_dma_base + OMAP_DMA4_SYSSTATUS))
- ;
dma_write(omap_dma_global_context.dma_gcr, GCR);
dma_write(omap_dma_global_context.dma_ocp_sysconfig,
OCP_SYSCONFIG);
dma_write(omap_dma_global_context.dma_irqenable_l0,
IRQENABLE_L0);
+
+ /*
+* A bug in ROM code leaves IRQ status for channels 0 and 1 uncleared
+* after secure sram context save and restore. Hence we need to
+* manually clear those IRQs to avoid spurious interrupts. This
+* affects only secure devices.
+*/
+ if (cpu_is_omap34xx() (omap_type() != OMAP2_DEVICE_TYPE_GP))
+ dma_write(0x3 , IRQSTATUS_L0);
}
EXPORT_SYMBOL(omap_dma_global_context_restore);
@@ -2517,8 +2523,8 @@ static int __init omap_init_dma(void)
setup_irq(irq, omap24xx_dma_irq);
}
- /* Enable smartidle idlemodes and autoidle */
if (cpu_is_omap34xx()) {
+ /* Enable smartidle idlemodes and autoidle */
u32 v = dma_read(OCP_SYSCONFIG);
v = ~(DMA_SYSCONFIG_MIDLEMODE_MASK |
DMA_SYSCONFIG_SIDLEMODE_MASK |
@@ -2527,6 +2533,13 @@ static int __init omap_init_dma(void)
DMA_SYSCONFIG_SIDLEMODE(DMA_IDLEMODE_SMARTIDLE) |
DMA_SYSCONFIG_AUTOIDLE);
dma_write(v , OCP_SYSCONFIG);
+ /* reserve dma channels 0 and 1 in high security devices */
+ if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
+ printk(KERN_INFO Reserving DMA channels 0 and 1 for
+ HS ROM code\n);
+ dma_chan[0].dev_id = 0;
+ dma_chan[1].dev_id = 1;
+ }
}
--
1.6.4.3
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[PATCH v2 18/32] ARM: OMAP: SMS: save/restore of SMS_SYSCONFIG for off-mode
From: Kalle Jokiniemi kalle.jokini...@digia.com
The SMS_SYSCONFIG register gets reset in off mode, added a
save/restore mechanism for that.
Signed-off-by: Kalle Jokiniemi kalle.jokini...@digia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm34xx.c |1 +
arch/arm/mach-omap2/sdrc.c | 27 +++
arch/arm/plat-omap/include/plat/sdrc.h |2 ++
3 files changed, 30 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index a9f4034..90d1dc5 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -399,6 +399,7 @@ static void omap_sram_idle(void)
omap3_core_restore_context();
omap3_prcm_restore_context();
omap3_sram_restore_context();
+ omap2_sms_restore_context();
}
if (per_next_state PWRDM_POWER_ON) {
per_prev_state =
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
index 07000de..9a59219 100644
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@ -37,12 +37,38 @@ static struct omap_sdrc_params *sdrc_init_params_cs0,
*sdrc_init_params_cs1;
void __iomem *omap2_sdrc_base;
void __iomem *omap2_sms_base;
+struct omap2_sms_regs {
+ u32 sms_sysconfig;
+};
+
+static struct omap2_sms_regs sms_context;
+
/* SDRC_POWER register bits */
#define SDRC_POWER_EXTCLKDIS_SHIFT 3
#define SDRC_POWER_PWDENA_SHIFT2
#define SDRC_POWER_PAGEPOLICY_SHIFT0
/**
+ * omap2_sms_save_context - Save SMS registers
+ *
+ * Save SMS registers that need to be restored after off mode.
+ */
+void omap2_sms_save_context(void)
+{
+ sms_context.sms_sysconfig = sms_read_reg(SMS_SYSCONFIG);
+}
+
+/**
+ * omap2_sms_restore_context - Restore SMS registers
+ *
+ * Restore SMS registers that need to be Restored after off mode.
+ */
+void omap2_sms_restore_context(void)
+{
+ sms_write_reg(sms_context.sms_sysconfig, SMS_SYSCONFIG);
+}
+
+/**
* omap2_sdrc_get_params - return SDRC register values for a given clock rate
* @r: SDRC clock rate (in Hz)
* @sdrc_cs0: chip select 0 ram timings **
@@ -132,4 +158,5 @@ void __init omap2_sdrc_init(struct omap_sdrc_params
*sdrc_cs0,
l = (1 SDRC_POWER_EXTCLKDIS_SHIFT) |
(1 SDRC_POWER_PAGEPOLICY_SHIFT);
sdrc_write_reg(l, SDRC_POWER);
+ omap2_sms_save_context();
}
diff --git a/arch/arm/plat-omap/include/plat/sdrc.h
b/arch/arm/plat-omap/include/plat/sdrc.h
index 7b58a5f..772b71e 100644
--- a/arch/arm/plat-omap/include/plat/sdrc.h
+++ b/arch/arm/plat-omap/include/plat/sdrc.h
@@ -120,6 +120,8 @@ void __init omap2_sdrc_init(struct omap_sdrc_params
*sdrc_cs0,
int omap2_sdrc_get_params(unsigned long r,
struct omap_sdrc_params **sdrc_cs0,
struct omap_sdrc_params **sdrc_cs1);
+void omap2_sms_save_context(void);
+void omap2_sms_restore_context(void);
#ifdef CONFIG_ARCH_OMAP2
--
1.6.4.3
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[PATCH v2 19/32] OMAP3: PM: Fix PLL_MOD CLKEN offset in scratchpad
From: Kalle Jokiniemi kalle.jokini...@digia.com The CM_CLKEN_PLL register saved in scratchpad memory was wrongly using offset of 0x0004 instead of 0x. The effect of this was that boot ROM code would restore the wrong value when waking up from off mode. This wrong value, however, will be overwritten by prcm context restore. Still, a short period of wrong clock settings in CM_CLKEN_PLL remained between ROM code and prcm context restore. This is fixed by the patch. Problem reported by: Jouni Hogander jouni.hogan...@nokia.com Signed-off-by: Kalle Jokiniemi kalle.jokini...@digia.com Signed-off-by: Kevin Hilman khil...@deeprootsystems.com --- arch/arm/mach-omap2/control.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index b84cff7..c41565e 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -230,7 +230,7 @@ void omap3_save_scratchpad_contents(void) prcm_block_contents.cm_clksel_wkup = cm_read_mod_reg(WKUP_MOD, CM_CLKSEL); prcm_block_contents.cm_clken_pll = - cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKEN_PLL); + cm_read_mod_reg(PLL_MOD, CM_CLKEN); prcm_block_contents.cm_autoidle_pll = cm_read_mod_reg(PLL_MOD, OMAP3430_CM_AUTOIDLE_PLL); prcm_block_contents.cm_clksel1_pll = -- 1.6.4.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 20/32] OMAP: PM: Clear DMA channel state after a wakeup
From: Aaro Koskinen aaro.koski...@nokia.com
Clear DMA channel states so that users can assume a known initial
state.
Signed-off-by: Aaro Koskinen aaro.koski...@nokia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/plat-omap/dma.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 3b91fd3..f716234 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -2359,6 +2359,8 @@ EXPORT_SYMBOL(omap_dma_global_context_save);
void omap_dma_global_context_restore(void)
{
+ int ch;
+
dma_write(omap_dma_global_context.dma_gcr, GCR);
dma_write(omap_dma_global_context.dma_ocp_sysconfig,
OCP_SYSCONFIG);
@@ -2373,6 +2375,10 @@ void omap_dma_global_context_restore(void)
*/
if (cpu_is_omap34xx() (omap_type() != OMAP2_DEVICE_TYPE_GP))
dma_write(0x3 , IRQSTATUS_L0);
+
+ for (ch = 0; ch dma_chan_count; ch++)
+ if (dma_chan[ch].dev_id != -1)
+ omap_clear_dma(ch);
}
EXPORT_SYMBOL(omap_dma_global_context_restore);
--
1.6.4.3
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[PATCH v2 21/32] OMAP: Store reboot mode in scratchpad on OMAP34xx
From: Juha Yrjola juha.yrj...@solidboot.com
The reboot mode can be communicated to a bootloader (or the
kernel itself) with a scratchpad register. This functionality
is especially useful, if userspace is allowed to change
the reboot mode.
Signed-off-by: Juha Yrjola juha.yrj...@solidboot.com
Signed-off-by: Tony Lindgren t...@atomide.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/prcm.c | 13 +++--
1 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 221eed1..029d376 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -135,9 +135,18 @@ void omap_prcm_arch_reset(char mode)
if (cpu_is_omap24xx())
prcm_offs = WKUP_MOD;
- else if (cpu_is_omap34xx())
+ else if (cpu_is_omap34xx()) {
+ u32 l;
+
prcm_offs = OMAP3430_GR_MOD;
- else
+ l = ('B' 24) | ('M' 16) | mode;
+ /* Reserve the first word in scratchpad for communicating
+* with the boot ROM. A pointer to a data structure
+* describing the boot process can be stored there,
+* cf. OMAP34xx TRM, Initialization / Software Booting
+* Configuration. */
+ omap_writel(l, OMAP343X_SCRATCHPAD + 4);
+ } else
WARN_ON(1);
prm_set_mod_reg_bits(OMAP_RST_DPLL3, prcm_offs, RM_RSTCTRL);
--
1.6.4.3
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[PATCH v2 22/32] OMAP3: PM: SDRC auto-refresh workaround for off-mode
From: Tero Kristo tero.kri...@nokia.com
Errata: ES3.0, ES3.1 SDRC not sending auto-refresh when OMAP wakes-up
from OFF mode
Signed-off-by: Tero Kristo tero.kri...@nokia.com
Signed-off-by: Kalle Jokiniemi kalle.jokini...@digia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/control.c |9 +++-
arch/arm/mach-omap2/sleep34xx.S | 84 -
arch/arm/plat-omap/include/plat/control.h |1 +
3 files changed, 91 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index c41565e..2ff8d7c 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -209,8 +209,13 @@ void omap3_save_scratchpad_contents(void)
/* Populate the Scratchpad contents */
scratchpad_contents.boot_config_ptr = 0x0;
- scratchpad_contents.public_restore_ptr =
-virt_to_phys(get_restore_pointer());
+ if (omap_rev() != OMAP3430_REV_ES3_0
+ omap_rev() != OMAP3430_REV_ES3_1)
+ scratchpad_contents.public_restore_ptr =
+ virt_to_phys(get_restore_pointer());
+ else
+ scratchpad_contents.public_restore_ptr =
+ virt_to_phys(get_es3_restore_pointer());
if (omap_type() == OMAP2_DEVICE_TYPE_GP)
scratchpad_contents.secure_ram_restore_ptr = 0x0;
else
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index b6abadc..dedfa0e 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -34,6 +34,7 @@
#define PM_PREPWSTST_CORE_VOMAP34XX_PRM_REGADDR(CORE_MOD, \
OMAP3430_PM_PREPWSTST)
+#define PM_PREPWSTST_CORE_P0x48306AE8
#define PM_PREPWSTST_MPU_V OMAP34XX_PRM_REGADDR(MPU_MOD, \
OMAP3430_PM_PREPWSTST)
#define PM_PWSTCTRL_MPU_P OMAP3430_PRM_BASE + MPU_MOD + PM_PWSTCTRL
@@ -44,6 +45,13 @@
#define SCRATCHPAD_BASE_P (OMAP343X_CTRL_BASE + OMAP343X_CONTROL_MEM_WKUP\
+ SCRATCHPAD_MEM_OFFS)
#define SDRC_POWER_V OMAP34XX_SDRC_REGADDR(SDRC_POWER)
+#define SDRC_SYSCONFIG_P (OMAP343X_SDRC_BASE + SDRC_SYSCONFIG)
+#define SDRC_MR_0_P(OMAP343X_SDRC_BASE + SDRC_MR_0)
+#define SDRC_EMR2_0_P (OMAP343X_SDRC_BASE + SDRC_EMR2_0)
+#define SDRC_MANUAL_0_P(OMAP343X_SDRC_BASE + SDRC_MANUAL_0)
+#define SDRC_MR_1_P(OMAP343X_SDRC_BASE + SDRC_MR_1)
+#define SDRC_EMR2_1_P (OMAP343X_SDRC_BASE + SDRC_EMR2_1)
+#define SDRC_MANUAL_1_P(OMAP343X_SDRC_BASE + SDRC_MANUAL_1)
.text
/* Function call to get the restore pointer for resume from OFF */
@@ -52,7 +60,59 @@ ENTRY(get_restore_pointer)
adr r0, restore
ldmfd sp!, {pc} @ restore regs and return
ENTRY(get_restore_pointer_sz)
-.word . - get_restore_pointer_sz
+.word . - get_restore_pointer
+
+ .text
+/* Function call to get the restore pointer for for ES3 to resume from OFF */
+ENTRY(get_es3_restore_pointer)
+ stmfd sp!, {lr} @ save registers on stack
+ adr r0, restore_es3
+ ldmfd sp!, {pc} @ restore regs and return
+ENTRY(get_es3_restore_pointer_sz)
+ .word . - get_es3_restore_pointer
+
+ENTRY(es3_sdrc_fix)
+ ldr r4, sdrc_syscfg @ get config addr
+ ldr r5, [r4]@ get value
+ tst r5, #0x100 @ is part access blocked
+ it eq
+ biceq r5, r5, #0x100 @ clear bit if set
+ str r5, [r4]@ write back change
+ ldr r4, sdrc_mr_0 @ get config addr
+ ldr r5, [r4]@ get value
+ str r5, [r4]@ write back change
+ ldr r4, sdrc_emr2_0 @ get config addr
+ ldr r5, [r4]@ get value
+ str r5, [r4]@ write back change
+ ldr r4, sdrc_manual_0 @ get config addr
+ mov r5, #0x2@ autorefresh command
+ str r5, [r4]@ kick off refreshes
+ ldr r4, sdrc_mr_1 @ get config addr
+ ldr r5, [r4]@ get value
+ str r5, [r4]@ write back change
+ ldr r4, sdrc_emr2_1 @ get config addr
+ ldr r5, [r4]@ get value
+ str r5, [r4]@ write back change
+ ldr r4, sdrc_manual_1 @ get config addr
+ mov r5, #0x2@ autorefresh command
+ str r5, [r4]@ kick off refreshes
+ bx lr
+sdrc_syscfg:
+ .word SDRC_SYSCONFIG_P
+sdrc_mr_0:
+ .word SDRC_MR_0_P
+sdrc_emr2_0:
+ .word SDRC_EMR2_0_P
+sdrc_manual_0:
[PATCH v2 23/32] OMAP3: PM: Fix INTC context save/restore
From: Aaro Koskinen aaro.koski...@nokia.com Wrong index was used for ILR. Signed-off-by: Aaro Koskinen aaro.koski...@nokia.com Signed-off-by: Kevin Hilman khil...@deeprootsystems.com --- arch/arm/mach-omap2/irq.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index ebd3538..e9bc782 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -241,7 +241,7 @@ void omap_intc_save_context(void) intc_bank_read_reg(bank, INTC_THRESHOLD); for (i = 0; i INTCPS_NR_IRQS; i++) intc_context[ind].ilr[i] = - intc_bank_read_reg(bank, (0x100 + 0x4*ind)); + intc_bank_read_reg(bank, (0x100 + 0x4*i)); for (i = 0; i INTCPS_NR_MIR_REGS; i++) intc_context[ind].mir[i] = intc_bank_read_reg(irq_banks[0], INTC_MIR0 + @@ -267,7 +267,7 @@ void omap_intc_restore_context(void) bank, INTC_THRESHOLD); for (i = 0; i INTCPS_NR_IRQS; i++) intc_bank_write_reg(intc_context[ind].ilr[i], - bank, (0x100 + 0x4*ind)); + bank, (0x100 + 0x4*i)); for (i = 0; i INTCPS_NR_MIR_REGS; i++) intc_bank_write_reg(intc_context[ind].mir[i], irq_banks[0], INTC_MIR0 + (0x20 * i)); -- 1.6.4.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 24/32] PM: Disable usb host HW save and restore
From: Kalle Jokiniemi kalle.jokini...@digia.com
The hardware SAVEANDRESTORE mechanism seems to leave
USB HOST power domain permanently into active state
after one transition from off to active state.
Disabling for now.
Signed-off-by: Kalle Jokiniemi ext-kalle.jokini...@nokia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/powerdomains34xx.h |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomains34xx.h
b/arch/arm/mach-omap2/powerdomains34xx.h
index f70eb2d..fd09b08 100644
--- a/arch/arm/mach-omap2/powerdomains34xx.h
+++ b/arch/arm/mach-omap2/powerdomains34xx.h
@@ -338,7 +338,13 @@ static struct powerdomain usbhost_pwrdm = {
.sleepdep_srcs= dss_per_usbhost_sleepdeps,
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRDM_POWER_RET,
- .flags= PWRDM_HAS_HDWR_SAR, /* for USBHOST ctrlr only */
+ /*
+* REVISIT: Enabling usb host save and restore mechanism seems to
+* leave the usb host domain permanently in ACTIVE mode after
+* changing the usb host power domain state from OFF to active once.
+* Disabling for now.
+*/
+ /*.flags = PWRDM_HAS_HDWR_SAR,*/ /* for USBHOST ctrlr only */
.banks= 1,
.pwrsts_mem_ret = {
[0] = PWRDM_POWER_RET, /* MEMRETSTATE */
--
1.6.4.3
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[PATCH v2 25/32] OMAP3: PM: Wait for SDRC ready iso a blind delay
From: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
This patch improves the wakeup SRAM code polling the SDRC to become ready
instead of just waiting for a fixed amount of time.
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/sleep34xx.S | 48 +-
1 files changed, 36 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index dedfa0e..15268f8 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -29,6 +29,7 @@
#include mach/io.h
#include plat/control.h
+#include cm.h
#include prm.h
#include sdrc.h
@@ -38,6 +39,7 @@
#define PM_PREPWSTST_MPU_V OMAP34XX_PRM_REGADDR(MPU_MOD, \
OMAP3430_PM_PREPWSTST)
#define PM_PWSTCTRL_MPU_P OMAP3430_PRM_BASE + MPU_MOD + PM_PWSTCTRL
+#define CM_IDLEST1_CORE_V OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST1)
#define SRAM_BASE_P0x4020
#define CONTROL_STAT 0x480022F0
#define SCRATCHPAD_MEM_OFFS0x310 /* Move this as correct place is
@@ -52,6 +54,8 @@
#define SDRC_MR_1_P(OMAP343X_SDRC_BASE + SDRC_MR_1)
#define SDRC_EMR2_1_P (OMAP343X_SDRC_BASE + SDRC_EMR2_1)
#define SDRC_MANUAL_1_P(OMAP343X_SDRC_BASE + SDRC_MANUAL_1)
+#define SDRC_DLLA_STATUS_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS)
+#define SDRC_DLLA_CTRL_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL)
.text
/* Function call to get the restore pointer for resume from OFF */
@@ -187,7 +191,7 @@ loop:
nop
nop
nop
- bl i_dll_wait
+ bl wait_sdrc_ok
ldmfd sp!, {r0-r12, pc} @ restore regs and return
restore_es3:
@@ -539,21 +543,41 @@ skip_l2_inval:
nop
nop
nop
- bl i_dll_wait
+ bl wait_sdrc_ok
/* restore regs and return */
ldmfd sp!, {r0-r12, pc}
-i_dll_wait:
- ldr r4, clk_stabilize_delay
+/* Make sure SDRC accesses are ok */
+wait_sdrc_ok:
+ldr r4, cm_idlest1_core
+ldr r5, [r4]
+and r5, r5, #0x2
+cmp r5, #0
+bne wait_sdrc_ok
+ldr r4, sdrc_power
+ldr r5, [r4]
+bic r5, r5, #0x40
+str r5, [r4]
+wait_dll_lock:
+/* Is dll in lock mode? */
+ldr r4, sdrc_dlla_ctrl
+ldr r5, [r4]
+tst r5, #0x4
+bxnelr
+/* wait till dll locks */
+ldr r4, sdrc_dlla_status
+ldr r5, [r4]
+and r5, r5, #0x4
+cmp r5, #0x4
+bne wait_dll_lock
+bx lr
-i_dll_delay:
- subsr4, r4, #0x1
- bne i_dll_delay
- ldr r4, sdrc_power
- ldr r5, [r4]
- bic r5, r5, #0x40
- str r5, [r4]
- bx lr
+cm_idlest1_core:
+ .word CM_IDLEST1_CORE_V
+sdrc_dlla_status:
+ .word SDRC_DLLA_STATUS_V
+sdrc_dlla_ctrl:
+ .word SDRC_DLLA_CTRL_V
pm_prepwstst_core:
.word PM_PREPWSTST_CORE_V
pm_prepwstst_core_p:
--
1.6.4.3
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[PATCH v2 26/32] OMAP3: PM debug: allow runtime toggle of PM features
Allow enable/disable of low-power states during idle. To
enable low-power idle:
echo 1 /debug/pm_debug/sleep_while_idle
to disable:
echo 0 /debug/pm_debug/sleep_while_idle
Also allow enable/disable of OFF-mode. To enable:
echo 1 /debug/pm_debug/enable_off_mode
to disable:
echo 0 /debug/pm_debug/enable_off_mode
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm-debug.c | 27 +++
arch/arm/mach-omap2/pm.h |4
arch/arm/mach-omap2/pm34xx.c | 22 ++
arch/arm/mach-omap2/serial.c |2 --
4 files changed, 53 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 7eb2c12..1725da3 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -527,6 +527,29 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm,
void *dir)
return 0;
}
+static int option_get(void *data, u64 *val)
+{
+ u32 *option = data;
+
+ *val = *option;
+
+ return 0;
+}
+
+static int option_set(void *data, u64 val)
+{
+ u32 *option = data;
+
+ *option = val;
+
+ if (option == enable_off_mode)
+ omap3_pm_off_mode_enable(val);
+
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(pm_dbg_option_fops, option_get, option_set, %llu\n);
+
static int __init pm_dbg_init(void)
{
int i;
@@ -569,6 +592,10 @@ static int __init pm_dbg_init(void)
}
+ (void) debugfs_create_file(enable_off_mode, S_IRUGO | S_IWUGO, d,
+ enable_off_mode, pm_dbg_option_fops);
+ (void) debugfs_create_file(sleep_while_idle, S_IRUGO | S_IWUGO, d,
+ sleep_while_idle, pm_dbg_option_fops);
pm_dbg_init_done = 1;
return 0;
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 45cafac..9582793 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -13,7 +13,11 @@
#include plat/powerdomain.h
+extern u32 enable_off_mode;
+extern u32 sleep_while_idle;
+
extern void *omap3_secure_ram_storage;
+extern void omap3_pm_off_mode_enable(int);
extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 90d1dc5..ade2e4a 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -25,6 +25,7 @@
#include linux/list.h
#include linux/err.h
#include linux/gpio.h
+#include linux/clk.h
#include plat/sram.h
#include plat/clockdomain.h
@@ -57,6 +58,9 @@
#define OMAP343X_TABLE_VALUE_OFFSET 0x30
#define OMAP343X_CONTROL_REG_VALUE_OFFSET 0x32
+u32 enable_off_mode;
+u32 sleep_while_idle;
+
struct power_state {
struct powerdomain *pwrdm;
u32 next_state;
@@ -456,6 +460,8 @@ static int omap3_fclks_active(void)
static int omap3_can_sleep(void)
{
+ if (!sleep_while_idle)
+ return 0;
if (!omap_uart_can_sleep())
return 0;
if (omap3_fclks_active())
@@ -900,6 +906,22 @@ static void __init prcm_setup_regs(void)
omap3_d2d_idle();
}
+void omap3_pm_off_mode_enable(int enable)
+{
+ struct power_state *pwrst;
+ u32 state;
+
+ if (enable)
+ state = PWRDM_POWER_OFF;
+ else
+ state = PWRDM_POWER_RET;
+
+ list_for_each_entry(pwrst, pwrst_list, node) {
+ pwrst-next_state = state;
+ set_pwrdm_state(pwrst-pwrdm, state);
+ }
+}
+
int omap3_pm_get_suspend_state(struct powerdomain *pwrdm)
{
struct power_state *pwrst;
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index dabc089..2e17b57 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -155,8 +155,6 @@ static inline void __init omap_uart_reset(struct
omap_uart_state *uart)
#if defined(CONFIG_PM) defined(CONFIG_ARCH_OMAP3)
-static int enable_off_mode; /* to be removed by full off-mode patches */
-
static void omap_uart_save_context(struct omap_uart_state *uart)
{
u16 lcr = 0;
--
1.6.4.3
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[PATCH v2 27/32] PM debug: allow configurable wakeup from suspend on OMAP GPtimer
Using debugfs, export a configurable wakeup timer to be used to
wakeup system from suspend.
If a non-zero value is written to
/debug/pm_debug/wakeup_timer_seconds, A timer wakeup event will wake
the system and resume after the configured number of seconds.
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm-debug.c |2 ++
arch/arm/mach-omap2/pm.h |3 +++
arch/arm/mach-omap2/pm34xx.c | 21 +
arch/arm/mach-omap2/timer-gp.c |2 ++
4 files changed, 28 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 1725da3..8baa30d 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -596,6 +596,8 @@ static int __init pm_dbg_init(void)
enable_off_mode, pm_dbg_option_fops);
(void) debugfs_create_file(sleep_while_idle, S_IRUGO | S_IWUGO, d,
sleep_while_idle, pm_dbg_option_fops);
+ (void) debugfs_create_file(wakeup_timer_seconds, S_IRUGO | S_IWUGO, d,
+ wakeup_timer_seconds, pm_dbg_option_fops);
pm_dbg_init_done = 1;
return 0;
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 9582793..7eb769f 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -22,6 +22,9 @@ extern void omap3_pm_off_mode_enable(int);
extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
+extern u32 wakeup_timer_seconds;
+extern struct omap_dm_timer *gptimer_wakeup;
+
#ifdef CONFIG_PM_DEBUG
extern void omap2_pm_dump(int mode, int resume, unsigned int us);
extern int omap2_pm_debug;
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index ade2e4a..ff818aa 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -36,6 +36,7 @@
#include plat/prcm.h
#include plat/gpmc.h
#include plat/dma.h
+#include plat/dmtimer.h
#include asm/tlbflush.h
@@ -60,6 +61,7 @@
u32 enable_off_mode;
u32 sleep_while_idle;
+u32 wakeup_timer_seconds;
struct power_state {
struct powerdomain *pwrdm;
@@ -535,6 +537,22 @@ out:
#ifdef CONFIG_SUSPEND
static suspend_state_t suspend_state;
+static void omap2_pm_wakeup_on_timer(u32 seconds)
+{
+ u32 tick_rate, cycles;
+
+ if (!seconds)
+ return;
+
+ tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup));
+ cycles = tick_rate * seconds;
+ omap_dm_timer_stop(gptimer_wakeup);
+ omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0x - cycles);
+
+ pr_info(PM: Resume timer in %d secs (%d ticks at %d ticks/sec.)\n,
+ seconds, cycles, tick_rate);
+}
+
static int omap3_pm_prepare(void)
{
disable_hlt();
@@ -546,6 +564,9 @@ static int omap3_pm_suspend(void)
struct power_state *pwrst;
int state, ret = 0;
+ if (wakeup_timer_seconds)
+ omap2_pm_wakeup_on_timer(wakeup_timer_seconds);
+
/* Read current next_pwrsts */
list_for_each_entry(pwrst, pwrst_list, node)
pwrst-saved_state = pwrdm_read_next_pwrst(pwrst-pwrdm);
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index df2b709..cd04dea 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -47,6 +47,7 @@ static struct omap_dm_timer *gptimer;
static struct clock_event_device clockevent_gpt;
static u8 __initdata gptimer_id = 1;
static u8 __initdata inited;
+struct omap_dm_timer *gptimer_wakeup;
static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
{
@@ -134,6 +135,7 @@ static void __init omap2_gp_clockevent_init(void)
gptimer = omap_dm_timer_request_specific(gptimer_id);
BUG_ON(gptimer == NULL);
+ gptimer_wakeup = gptimer;
#if defined(CONFIG_OMAP_32K_TIMER)
src = OMAP_TIMER_SRC_32_KHZ;
--
1.6.4.3
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[PATCH v2 28/32] OMAP3: PM: decouple PER and CORE context save and restore
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm34xx.c | 51 +++--
1 files changed, 29 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index ff818aa..d8a6e10 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -338,19 +338,20 @@ static void omap_sram_idle(void)
if (pwrdm_read_pwrst(neon_pwrdm) == PWRDM_POWER_ON)
set_pwrdm_state(neon_pwrdm, mpu_next_state);
- /* CORE PER */
+ /* PER */
+ per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
+ if (per_next_state PWRDM_POWER_ON) {
+ omap2_gpio_prepare_for_retention();
+ omap_uart_prepare_idle(2);
+ if (per_next_state == PWRDM_POWER_OFF)
+ omap3_per_save_context();
+ }
+
+ /* CORE */
core_next_state = pwrdm_read_next_pwrst(core_pwrdm);
if (core_next_state PWRDM_POWER_ON) {
- omap2_gpio_prepare_for_retention();
omap_uart_prepare_idle(0);
omap_uart_prepare_idle(1);
- /* PER changes only with core */
- per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
- if (per_next_state PWRDM_POWER_ON) {
- omap_uart_prepare_idle(2);
- if (per_next_state == PWRDM_POWER_OFF)
- omap3_per_save_context();
- }
if (core_next_state == PWRDM_POWER_OFF) {
omap3_core_save_context();
omap3_prcm_save_context();
@@ -392,14 +393,8 @@ static void omap_sram_idle(void)
if (pwrdm_read_prev_pwrst(mpu_pwrdm) == PWRDM_POWER_OFF)
restore_table_entry();
+ /* CORE */
if (core_next_state PWRDM_POWER_ON) {
- if (per_next_state PWRDM_POWER_ON)
- omap_uart_resume_idle(2);
- omap_uart_resume_idle(1);
- omap_uart_resume_idle(0);
-
- /* Disable IO-PAD wakeup */
- prm_clear_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
core_prev_state = pwrdm_read_prev_pwrst(core_pwrdm);
if (core_prev_state == PWRDM_POWER_OFF) {
omap3_core_restore_context();
@@ -407,15 +402,27 @@ static void omap_sram_idle(void)
omap3_sram_restore_context();
omap2_sms_restore_context();
}
- if (per_next_state PWRDM_POWER_ON) {
- per_prev_state =
- pwrdm_read_prev_pwrst(per_pwrdm);
- if (per_prev_state == PWRDM_POWER_OFF)
- omap3_per_restore_context();
- }
+ omap_uart_resume_idle(0);
+ omap_uart_resume_idle(1);
+ if (core_next_state == PWRDM_POWER_OFF)
+ prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF,
+ OMAP3430_GR_MOD,
+ OMAP3_PRM_VOLTCTRL_OFFSET);
+ }
+
+ /* PER */
+ if (per_next_state PWRDM_POWER_ON) {
+ per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm);
+ omap_uart_resume_idle(2);
+ if (per_prev_state == PWRDM_POWER_OFF)
+ omap3_per_restore_context();
omap2_gpio_resume_after_retention();
}
+ /* Disable IO-PAD wakeup */
+ if (core_next_state PWRDM_POWER_ON)
+ prm_clear_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
+
pwrdm_post_transition();
}
--
1.6.4.3
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[PATCH v2 29/32] OMAP3: PM: Prevent PER from going OFF when CORE is going INA
From: Tero Kristo tero.kri...@nokia.com
OMAP3 can't generate wakeups in this state, thus it is not permitted.
Signed-off-by: Tero Kristo tero.kri...@nokia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm34xx.c | 19 ++-
1 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index d8a6e10..55567bf 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -308,6 +308,7 @@ static void omap_sram_idle(void)
int core_next_state = PWRDM_POWER_ON;
int core_prev_state, per_prev_state;
u32 sdrc_pwr = 0;
+ int per_state_modified = 0;
if (!_omap_sram_idle)
return;
@@ -340,15 +341,21 @@ static void omap_sram_idle(void)
/* PER */
per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
+ core_next_state = pwrdm_read_next_pwrst(core_pwrdm);
if (per_next_state PWRDM_POWER_ON) {
- omap2_gpio_prepare_for_retention();
omap_uart_prepare_idle(2);
- if (per_next_state == PWRDM_POWER_OFF)
- omap3_per_save_context();
+ omap2_gpio_prepare_for_retention();
+ if (per_next_state == PWRDM_POWER_OFF) {
+ if (core_next_state == PWRDM_POWER_ON) {
+ per_next_state = PWRDM_POWER_RET;
+ pwrdm_set_next_pwrst(per_pwrdm, per_next_state);
+ per_state_modified = 1;
+ } else
+ omap3_per_save_context();
+ }
}
/* CORE */
- core_next_state = pwrdm_read_next_pwrst(core_pwrdm);
if (core_next_state PWRDM_POWER_ON) {
omap_uart_prepare_idle(0);
omap_uart_prepare_idle(1);
@@ -413,10 +420,12 @@ static void omap_sram_idle(void)
/* PER */
if (per_next_state PWRDM_POWER_ON) {
per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm);
- omap_uart_resume_idle(2);
if (per_prev_state == PWRDM_POWER_OFF)
omap3_per_restore_context();
omap2_gpio_resume_after_retention();
+ omap_uart_resume_idle(2);
+ if (per_state_modified)
+ pwrdm_set_next_pwrst(per_pwrdm, PWRDM_POWER_OFF);
}
/* Disable IO-PAD wakeup */
--
1.6.4.3
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[PATCH v2 31/32] OMAP3: PM: Enable IO-CHAIN wakeup
From: Kalle Jokiniemi kalle.jokini...@digia.com
OMAP 3430 ES3.1 chips have a separate bit for IO daisy-chain
wake up enabling. It needs to be enabled when entering
retention or off state, otherwise waking up might not work
in all situations.
Signed-off-by: Kalle Jokiniemi kalle.jokini...@digia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm34xx.c | 38 +--
arch/arm/mach-omap2/prm-regbits-34xx.h |2 +
2 files changed, 37 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 7623eda..511a57d 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -94,6 +94,35 @@ static inline void omap3_per_restore_context(void)
omap_gpio_restore_context();
}
+static void omap3_enable_io_chain(void)
+{
+ int timeout = 0;
+
+ if (omap_rev() = OMAP3430_REV_ES3_1) {
+ prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN, WKUP_MOD, PM_WKEN);
+ /* Do a readback to assure write has been done */
+ prm_read_mod_reg(WKUP_MOD, PM_WKEN);
+
+ while (!(prm_read_mod_reg(WKUP_MOD, PM_WKST)
+OMAP3430_ST_IO_CHAIN)) {
+ timeout++;
+ if (timeout 1000) {
+ printk(KERN_ERR Wake up daisy chain
+ activation failed.\n);
+ return;
+ }
+ prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN,
+WKUP_MOD, PM_WKST);
+ }
+ }
+}
+
+static void omap3_disable_io_chain(void)
+{
+ if (omap_rev() = OMAP3430_REV_ES3_1)
+ prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN, WKUP_MOD, PM_WKEN);
+}
+
static void omap3_core_save_context(void)
{
u32 control_padconf_off;
@@ -367,8 +396,9 @@ static void omap_sram_idle(void)
omap3_core_save_context();
omap3_prcm_save_context();
}
- /* Enable IO-PAD wakeup */
+ /* Enable IO-PAD and IO-CHAIN wakeups */
prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
+ omap3_enable_io_chain();
}
/*
@@ -432,9 +462,11 @@ static void omap_sram_idle(void)
pwrdm_set_next_pwrst(per_pwrdm, PWRDM_POWER_OFF);
}
- /* Disable IO-PAD wakeup */
- if (core_next_state PWRDM_POWER_ON)
+ /* Disable IO-PAD and IO-CHAIN wakeup */
+ if (core_next_state PWRDM_POWER_ON) {
prm_clear_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
+ omap3_disable_io_chain();
+ }
pwrdm_post_transition();
diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h
b/arch/arm/mach-omap2/prm-regbits-34xx.h
index 9fd03a2..8f21bae 100644
--- a/arch/arm/mach-omap2/prm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
@@ -365,6 +365,7 @@
/* PM_PREPWSTST_GFX specific bits */
/* PM_WKEN_WKUP specific bits */
+#define OMAP3430_EN_IO_CHAIN (1 16)
#define OMAP3430_EN_IO (1 8)
#define OMAP3430_EN_GPIO1 (1 3)
@@ -373,6 +374,7 @@
/* PM_IVA2GRPSEL_WKUP specific bits */
/* PM_WKST_WKUP specific bits */
+#define OMAP3430_ST_IO_CHAIN (1 16)
#define OMAP3430_ST_IO (1 8)
/* PRM_CLKSEL */
--
1.6.4.3
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[PATCH v2 32/32] OMAP3: PM: Program SDRC to send self refresh on timeout of AUTO_CNT
From: Rajendra Nayak rna...@ti.com
Due to an OMAP3 errata (1.142), on HS/EMU devices SDRC should be
programed to issue automatic self refresh on timeout
of AUTO_CNT = 1 prior to any transition to OFF mode.
This is needed only on sil rev's ES3.0 and above.
This patch enables the above needed WA in the SDRC power register
value stored in scratchpad, so that ROM code restores this value
in SDRC POWER on the wakeup path.
The original SDRC POWER register value is stored and restored back
in omap_sram_idle() function.
This fixes some random crashes observed while stressing suspend
on HS/EMU devices.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Kalle Jokiniemi kalle.jokini...@digia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/control.c | 16 +++-
arch/arm/mach-omap2/pm34xx.c | 24 +++-
arch/arm/plat-omap/include/plat/sdrc.h |6 ++
3 files changed, 28 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 2ff8d7c..cdd1f35 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -265,7 +265,21 @@ void omap3_save_scratchpad_contents(void)
(sdrc_read_reg(SDRC_ERR_TYPE) 0x);
sdrc_block_contents.dll_a_ctrl = sdrc_read_reg(SDRC_DLLA_CTRL);
sdrc_block_contents.dll_b_ctrl = 0x0;
- sdrc_block_contents.power = sdrc_read_reg(SDRC_POWER);
+ /*
+* Due to a OMAP3 errata (1.142), on EMU/HS devices SRDC should
+* be programed to issue automatic self refresh on timeout
+* of AUTO_CNT = 1 prior to any transition to OFF mode.
+*/
+ if ((omap_type() != OMAP2_DEVICE_TYPE_GP)
+(omap_rev() = OMAP3430_REV_ES3_0))
+ sdrc_block_contents.power = (sdrc_read_reg(SDRC_POWER)
+ ~(SDRC_POWER_AUTOCOUNT_MASK|
+ SDRC_POWER_CLKCTRL_MASK)) |
+ (1 SDRC_POWER_AUTOCOUNT_SHIFT) |
+ SDRC_SELF_REFRESH_ON_AUTOCOUNT;
+ else
+ sdrc_block_contents.power = sdrc_read_reg(SDRC_POWER);
+
sdrc_block_contents.cs_0 = 0x0;
sdrc_block_contents.mcfg_0 = sdrc_read_reg(SDRC_MCFG_0);
sdrc_block_contents.mr_0 = (sdrc_read_reg(SDRC_MR_0) 0x);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 511a57d..01b95ea 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -48,12 +48,6 @@
#include pm.h
#include sdrc.h
-#define SDRC_POWER_AUTOCOUNT_SHIFT 8
-#define SDRC_POWER_AUTOCOUNT_MASK (0x SDRC_POWER_AUTOCOUNT_SHIFT)
-#define SDRC_POWER_CLKCTRL_SHIFT 4
-#define SDRC_POWER_CLKCTRL_MASK (0x3 SDRC_POWER_CLKCTRL_SHIFT)
-#define SDRC_SELF_REFRESH_ON_AUTOCOUNT (0x2 SDRC_POWER_CLKCTRL_SHIFT)
-
/* Scratchpad offsets */
#define OMAP343X_TABLE_ADDRESS_OFFSET 0x31
#define OMAP343X_TABLE_VALUE_OFFSET 0x30
@@ -402,19 +396,15 @@ static void omap_sram_idle(void)
}
/*
-* Force SDRAM controller to self-refresh mode after timeout on
-* autocount. This is needed on ES3.0 to avoid SDRAM controller
-* hang-ups.
-*/
+ * On EMU/HS devices ROM code restores a SRDC value
+ * from scratchpad which has automatic self refresh on timeout
+ * of AUTO_CNT = 1 enabled. This takes care of errata 1.142.
+ * Hence store/restore the SDRC_POWER register here.
+ */
if (omap_rev() = OMAP3430_REV_ES3_0
omap_type() != OMAP2_DEVICE_TYPE_GP
- core_next_state == PWRDM_POWER_OFF) {
+ core_next_state == PWRDM_POWER_OFF)
sdrc_pwr = sdrc_read_reg(SDRC_POWER);
- sdrc_write_reg((sdrc_pwr
- ~(SDRC_POWER_AUTOCOUNT_MASK|SDRC_POWER_CLKCTRL_MASK)) |
- (1 SDRC_POWER_AUTOCOUNT_SHIFT) |
- SDRC_SELF_REFRESH_ON_AUTOCOUNT, SDRC_POWER);
- }
/*
* omap3_arm_context is the location where ARM registers
@@ -424,7 +414,7 @@ static void omap_sram_idle(void)
_omap_sram_idle(omap3_arm_context, save_state);
cpu_init();
- /* Restore normal SDRAM settings */
+ /* Restore normal SDRC POWER settings */
if (omap_rev() = OMAP3430_REV_ES3_0
omap_type() != OMAP2_DEVICE_TYPE_GP
core_next_state == PWRDM_POWER_OFF)
diff --git a/arch/arm/plat-omap/include/plat/sdrc.h
b/arch/arm/plat-omap/include/plat/sdrc.h
index 772b71e..f704030 100644
--- a/arch/arm/plat-omap/include/plat/sdrc.h
+++ b/arch/arm/plat-omap/include/plat/sdrc.h
@@ -44,6 +44,12 @@
#define SDRC_RFR_CTRL_10x0D4
#define SDRC_MANUAL_1 0x0D8
+#define SDRC_POWER_AUTOCOUNT_SHIFT 8
+#define SDRC_POWER_AUTOCOUNT_MASK (0x SDRC_POWER_AUTOCOUNT_SHIFT)
+#define SDRC_POWER_CLKCTRL_SHIFT
