Re: [PATCH] ARM: OMAP: Power on EHCI, serial, camera and DVI on beagleboard-xM
Op 18 dec 2010, om 03:07 heeft Tony Lindgren het volgende geschreven: * Anand Gadiyar gadi...@ti.com [101214 06:25]: On 12/14/2010 7:41 PM, Koen Kooi wrote: Any comments on this? ... - /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ - gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; This disappeared. So no more PMU STAT led? Koen, any update on this? I'll send and updated patch after the weekend. regards, Koen -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 resend] OMAP4: Pandaboard: Add omap_reserve functionality
On Fri, Dec 17, 2010 at 06:09:53PM -0800, Tony Lindgren wrote: * Raghuveer Murthy raghuveer.mur...@ti.com [101207 23:31]: This patch adds omap_reserve functionality to board-omap4panda.c. Helps in the reserving boot time memory in SDRAM, used here for framebuffer allocation. This patch is in similar lines to commit id 71ee7dad9b6991, from Russell king Cc: Russell King rmk+ker...@arm.linux.org.uk Cc: linux-arm-ker...@lists.infradead.org Signed-off-by: Raghuveer Murthy raghuveer.mur...@ti.com --- arch/arm/mach-omap2/board-omap4panda.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index da24745..0ccc24f 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c @@ -393,6 +393,7 @@ MACHINE_START(OMAP4_PANDA, OMAP4 Panda board) /* Maintainer: David Anders - Texas Instruments Inc */ .boot_params= 0x8100, .map_io = omap4_panda_map_io, + .reserve= omap_reserve, Please put .reserve before .map_io. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/6] OMAP4: Pandaboard: Add omap_reserve functionality
On Fri, Dec 17, 2010 at 07:05:21PM -0800, Tony Lindgren wrote: /* Maintainer: David Anders - Texas Instruments Inc */ .boot_params= 0x8100, .map_io = omap4_panda_map_io, + .reserve= omap_reserve, Please put .reserve before .map_io. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 3/9] OMAP2420: hwmod data: add system DMA
On Fri, 17 Dec 2010, G, Manjunath Kondaiah wrote:
Add OMAP2420 DMA hwmod data and also add required
DMA device attributes.
Signed-off-by: G, Manjunath Kondaiah manj...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 87
arch/arm/plat-omap/include/plat/dma.h | 11
2 files changed, 98 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index d953425..eb02fec 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -42,6 +42,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod;
static struct omap_hwmod omap2420_gpio2_hwmod;
static struct omap_hwmod omap2420_gpio3_hwmod;
static struct omap_hwmod omap2420_gpio4_hwmod;
+static struct omap_hwmod omap2420_dma_system_hwmod;
/* L3 - L4_CORE interface */
static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = {
@@ -779,6 +780,89 @@ static struct omap_hwmod omap2420_gpio4_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
};
+/* system dma */
+static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x002c,
+ .syss_offs = 0x0028,
+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
According to the OMAP242x TRM 2.3 Rev. X [SWPU064X] Table 10-34, the SDMA
has no SIDLEMODE register bitfield. So this SYSC_HAS_SIDLEMODE appears to
be incorrect. Manju, please confirm.
+SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
+SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
And if there is no SIDLEMODE register bitfield, then none of these SIDLE_*
modes should apply, so they should all be removed also.
+MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap2420_dma_hwmod_class = {
+ .name = dma,
+ .sysc = omap2420_dma_sysc,
+};
+
+/* dma attributes */
+static struct omap_dma_dev_attr dma_dev_attr = {
+ .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
+ IS_CSSA_32 | IS_CDSA_32,
+ .lch_count = 32,
+};
+
+static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = {
+ { .name = 0, .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
+ { .name = 1, .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
+ { .name = 2, .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
+ { .name = 3, .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
+};
+
+static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = {
+ {
+ .pa_start = 0x48056000,
+ .pa_end = 0x4a0560ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* dma_system - L3 */
+static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = {
+ .master = omap2420_dma_system_hwmod,
+ .slave = omap2420_l3_main_hwmod,
+ .clk= core_l3_ck,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* dma_system master ports */
+static struct omap_hwmod_ocp_if *omap2420_dma_system_masters[] = {
+ omap2420_dma_system__l3,
+};
+
+/* l4_cfg - dma_system */
l4_cfg should be l4_core.
+static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {
+ .master = omap2420_l4_core_hwmod,
+ .slave = omap2420_dma_system_hwmod,
+ .clk= sdma_ick,
+ .addr = omap2420_dma_system_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2420_dma_system_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* dma_system slave ports */
+static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = {
+ omap2420_l4_core__dma_system,
+};
+
+static struct omap_hwmod omap2420_dma_system_hwmod = {
+ .name = dma,
+ .class = omap2420_dma_hwmod_class,
+ .mpu_irqs = omap2420_dma_system_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dma_system_irqs),
+ .main_clk = core_l3_ck,
+ .slaves = omap2420_dma_system_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves),
+ .masters= omap2420_dma_system_masters,
+ .masters_cnt= ARRAY_SIZE(omap2420_dma_system_masters),
+ .dev_attr = dma_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
+ .flags = HWMOD_NO_IDLEST,
+};
+
static __initdata struct omap_hwmod *omap2420_hwmods[] = {
omap2420_l3_main_hwmod,
omap2420_l4_core_hwmod,
@@ -797,6 +881,9 @@ static __initdata struct omap_hwmod *omap2420_hwmods[] = {
omap2420_gpio2_hwmod,
omap2420_gpio3_hwmod,
omap2420_gpio4_hwmod,
+
+ /* dma_system class*/
+ omap2420_dma_system_hwmod,
NULL,
Re: [PATCH v2 4/9] OMAP2430: hwmod data: add system DMA
On Fri, 17 Dec 2010, G, Manjunath Kondaiah wrote:
Add OMAP2430 DMA hwmod data and also add required
DMA device attributes.
Signed-off-by: G, Manjunath Kondaiah manj...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 87
arch/arm/plat-omap/include/plat/dma.h |1 +
2 files changed, 88 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index f68409e..b52ba66 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -43,6 +43,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod;
static struct omap_hwmod omap2430_gpio3_hwmod;
static struct omap_hwmod omap2430_gpio4_hwmod;
static struct omap_hwmod omap2430_gpio5_hwmod;
+static struct omap_hwmod omap2430_dma_system_hwmod;
/* L3 - L4_CORE interface */
static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
@@ -840,6 +841,89 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
};
+/* dma_system */
+static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x002c,
+ .syss_offs = 0x0028,
+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
The OMAP2430 TRM Silicon Rev. 2.1 [Rev. Z] [SWPU090Z] Table 9-25
'DMA4_OCP_SYSCONFIG' does not list a SIDLEMODE register bitfield for this
IP block. Is there a reason why you list one?
+SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
+SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
If there is no SIDLEMODE register bitfield, then none of these SIDLE_*
modes should be included.
+MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap2430_dma_hwmod_class = {
+ .name = dma,
+ .sysc = omap2430_dma_sysc,
+};
+
+/* dma attributes */
+static struct omap_dma_dev_attr dma_dev_attr = {
+ .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
+ IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
+ .lch_count = 32,
+};
+
+static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = {
+ { .name = 0, .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
+ { .name = 1, .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
+ { .name = 2, .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
+ { .name = 3, .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
+};
+
+static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = {
+ {
+ .pa_start = 0x48056000,
+ .pa_end = 0x4a0560ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* dma_system - L3 */
+static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = {
+ .master = omap2430_dma_system_hwmod,
+ .slave = omap2430_l3_main_hwmod,
+ .clk= core_l3_ck,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* dma_system master ports */
+static struct omap_hwmod_ocp_if *omap2430_dma_system_masters[] = {
+ omap2430_dma_system__l3,
+};
+
+/* l4_cfg - dma_system */
l4_cfg should be l4_core.
+static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = {
+ .master = omap2430_l4_core_hwmod,
+ .slave = omap2430_dma_system_hwmod,
+ .clk= sdma_ick,
+ .addr = omap2430_dma_system_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2430_dma_system_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* dma_system slave ports */
+static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = {
+ omap2430_l4_core__dma_system,
+};
+
+static struct omap_hwmod omap2430_dma_system_hwmod = {
+ .name = dma,
+ .class = omap2430_dma_hwmod_class,
+ .mpu_irqs = omap2430_dma_system_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dma_system_irqs),
+ .main_clk = core_l3_ck,
+ .slaves = omap2430_dma_system_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves),
+ .masters= omap2430_dma_system_masters,
+ .masters_cnt= ARRAY_SIZE(omap2430_dma_system_masters),
+ .dev_attr = dma_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
+ .flags = HWMOD_NO_IDLEST,
+};
+
static __initdata struct omap_hwmod *omap2430_hwmods[] = {
omap2430_l3_main_hwmod,
omap2430_l4_core_hwmod,
@@ -859,6 +943,9 @@ static __initdata struct omap_hwmod *omap2430_hwmods[] = {
omap2430_gpio3_hwmod,
omap2430_gpio4_hwmod,
omap2430_gpio5_hwmod,
+
+ /* dma_system class*/
+ omap2430_dma_system_hwmod,
NULL,
};
diff --git
Re: [PATCH v2 3/9] OMAP2420: hwmod data: add system DMA
Hello Manju On Sat, 18 Dec 2010, G, Manjunath Kondaiah wrote: The clock entries are modified as per your review comments and tested the chagnes on N800 and 2430SDP(for patch 4/9). Can you pls ack these patches so that tony can merge this series? I've reviewed the patches and posted some comments, but cannot ack them yet until the SIDLEMODE parts are resolved. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 4/9] OMAP2430: hwmod data: add system DMA
On Sat, Dec 18, 2010 at 02:11:50AM -0700, Paul Walmsley wrote:
On Fri, 17 Dec 2010, G, Manjunath Kondaiah wrote:
Add OMAP2430 DMA hwmod data and also add required
DMA device attributes.
Signed-off-by: G, Manjunath Kondaiah manj...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 87
arch/arm/plat-omap/include/plat/dma.h |1 +
2 files changed, 88 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index f68409e..b52ba66 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -43,6 +43,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod;
static struct omap_hwmod omap2430_gpio3_hwmod;
static struct omap_hwmod omap2430_gpio4_hwmod;
static struct omap_hwmod omap2430_gpio5_hwmod;
+static struct omap_hwmod omap2430_dma_system_hwmod;
/* L3 - L4_CORE interface */
static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
@@ -840,6 +841,89 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
};
+/* dma_system */
+static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x002c,
+ .syss_offs = 0x0028,
+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
The OMAP2430 TRM Silicon Rev. 2.1 [Rev. Z] [SWPU090Z] Table 9-25
'DMA4_OCP_SYSCONFIG' does not list a SIDLEMODE register bitfield for this
IP block. Is there a reason why you list one?
+ SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
+ SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
If there is no SIDLEMODE register bitfield, then none of these SIDLE_*
modes should be included.
I'm confused. I thought the whole point of hwmod was that the data for
it was generated from a TI database of how the chip is actually setup.
However, from all the patching which seems to be going on, it looks to
me like that's not the case - and if that's true, hwmod was mis-sold.
It's just moved the problem rather than solving anything.
What's going on?
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Re: [PATCH v2 4/9] OMAP2430: hwmod data: add system DMA
On Sat, 18 Dec 2010, Russell King - ARM Linux wrote: I'm confused. I thought the whole point of hwmod was that the data for it was generated from a TI database of how the chip is actually setup. However, from all the patching which seems to be going on, it looks to me like that's not the case - and if that's true, hwmod was mis-sold. It's just moved the problem rather than solving anything. What's going on? OMAP4 and beyond data is being generated from the TI hardware database. However, apparently that is not possible with the OMAP2 and OMAP3 data. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] OMAP: Fix configuration of J-Type DPLLs to work for OMAP3 and OMAP4
Hello Jon
On Fri, 17 Dec 2010, Jon Hunter wrote:
From: Jon Hunter jon-hun...@ti.com
J-Type DPLLs have additional configuration parameters that need to
be programmed when setting the multipler and divider for the DPLL.
These parameters being the sigma delta divider (SD_DIV) for the DPLL
and the digital controlled oscillator (DCO) to be used by the DPLL.
The current code is implemented specifically to configure the
OMAP3630 PER J-Type DPLL. The OMAP4430 USB DPLL is also a J-Type DPLL
and so this code needs to be updated to work for both OMAP3 and OMAP4
devices and any other future devices that have J-TYPE DPLLs.
For the OMAP3630 PER DPLL both the SD_DIV and DCO paramenters are
used but for the OMAP4430 USB DPLL only the SD_DIV field is used.
The current implementation will only program the SD_DIV and DCO
fields if the DPLL has both and hence this does not work for
OMAP4430.
In order to make the code more generic add two new fields to the
dpll_data structure for the SD_DIV field and DCO field bit-masks
and only program these fields if the masks are defined for a specific
DPLL. This simplifies the code and allows us to remove the flag
DPLL_NO_DCO_SEL.
Has this patch been tested on both OMAP36xx and OMAP4 ?
Signed-off-by: Jon Hunter jon-hun...@ti.com
---
arch/arm/mach-omap2/clock.h |1 -
arch/arm/mach-omap2/clock3xxx_data.c|2 +
arch/arm/mach-omap2/clock44xx_data.c|3 +-
arch/arm/mach-omap2/dpll3xxx.c | 53 +++---
arch/arm/plat-omap/include/plat/clock.h |5 ++-
5 files changed, 40 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index a535c7a..896584e 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -49,7 +49,6 @@
/* DPLL Type and DCO Selection Flags */
#define DPLL_J_TYPE 0x1
-#define DPLL_NO_DCO_SEL 0x2
int omap2_clk_enable(struct clk *clk);
void omap2_clk_disable(struct clk *clk);
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index 0579604..461b1ca 100644
Any reason why you're removing this comment?
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -602,6 +602,8 @@ static struct dpll_data dpll4_dd_3630 __initdata = {
.autoidle_mask = OMAP3430_AUTO_PERIPH_DPLL_MASK,
.idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST),
.idlest_mask= OMAP3430_ST_PERIPH_CLK_MASK,
+ .dco_mask = OMAP3630_PERIPH_DPLL_DCO_SEL_MASK,
+ .sddiv_mask = OMAP3630_PERIPH_DPLL_SD_DIV_MASK,
.max_multiplier = OMAP3630_MAX_JTYPE_DPLL_MULT,
.min_divider= 1,
.max_divider= OMAP3_MAX_DPLL_DIV,
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index bfcd19f..cef179e 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -913,7 +913,7 @@ static struct clk usb_hs_clk_div_ck = {
static struct dpll_data dpll_usb_dd = {
.mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_USB,
.clk_bypass = usb_hs_clk_div_ck,
- .flags = DPLL_J_TYPE | DPLL_NO_DCO_SEL,
+ .flags = DPLL_J_TYPE,
.clk_ref= sys_clkin_ck,
.control_reg= OMAP4430_CM_CLKMODE_DPLL_USB,
.modes = (1 DPLL_LOW_POWER_BYPASS) | (1 DPLL_LOCKED),
@@ -924,6 +924,7 @@ static struct dpll_data dpll_usb_dd = {
.enable_mask= OMAP4430_DPLL_EN_MASK,
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
.idlest_mask= OMAP4430_ST_DPLL_CLK_MASK,
+ .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK,
.max_multiplier = OMAP4430_MAX_DPLL_MULT,
.max_divider= OMAP4430_MAX_DPLL_DIV,
.min_divider= 1,
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index ed8d330..48df8e4 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -225,23 +225,18 @@ static int _omap3_noncore_dpll_stop(struct clk *clk)
}
/**
- * lookup_dco_sddiv - Set j-type DPLL4 compensation variables
+ * lookup_dco - Lookup DCO used by j-type DPLL
* @clk: pointer to a DPLL struct clk
* @dco: digital control oscillator selector
- * @sd_div: target sigma-delta divider
* @m: DPLL multiplier to set
* @n: DPLL divider to set
*
* See 36xx TRM section 3.5.3.3.3.2 Type B DPLL (Low-Jitter)
*
- * XXX This code is not needed for 3430/AM35xx; can it be optimized
- * out in non-multi-OMAP builds for those chips?
Any reason why you're removing this comment?
*/
-static void lookup_dco_sddiv(struct clk *clk, u8 *dco, u8 *sd_div, u16 m,
- u8 n)
+static inline void lookup_dco(struct clk *clk, u8 *dco, u16 m, u8 n)
{
- unsigned long fint, clkinp, sd; /* watch out for overflow */
- int mod1, mod2;
+ unsigned long fint, clkinp;
[PATCH 6/7] OMAP3: add comments for low power code errata
From: Jean Pihet j-pi...@ti.com Errata covered: - 1.157 1.185 - i443 - i581 Tested on N900 and Beagleboard with full RET and OFF modes, using cpuidle and suspend. Signed-off-by: Jean Pihet j-pi...@ti.com Acked-by: Santosh Shilimkar santosh.shilim...@ti.com Tested-by: Nishanth Menon n...@ti.com --- arch/arm/mach-omap2/pm34xx.c|4 ++-- arch/arm/mach-omap2/sleep34xx.S | 11 +++ 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index adc0917..267f015 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -148,7 +148,7 @@ static void omap3_core_save_context(void) /* * Force write last pad into memory, as this can fail in some -* cases according to erratas 1.157, 1.185 +* cases according to errata 1.157, 1.185 */ omap_ctrl_writel(omap_ctrl_readl(OMAP343X_PADCONF_ETK_D14), OMAP343X_CONTROL_MEM_WKUP + 0x2a0); @@ -446,7 +446,7 @@ void omap_sram_idle(void) /* * On EMU/HS devices ROM code restores a SRDC value * from scratchpad which has automatic self refresh on timeout - * of AUTO_CNT = 1 enabled. This takes care of errata 1.142. + * of AUTO_CNT = 1 enabled. This takes care of erratum ID i443. * Hence store/restore the SDRC_POWER register here. */ if (omap_rev() = OMAP3430_REV_ES3_0 diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index 0e27429..7a63da2 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S @@ -596,6 +596,7 @@ usettbr0: * Internal functions */ +/* This function implements the erratum ID i443 WA, applies to 34xx = ES3.0 */ .text ENTRY(es3_sdrc_fix) ldr r4, sdrc_syscfg @ get config addr @@ -641,6 +642,16 @@ sdrc_manual_1: ENTRY(es3_sdrc_fix_sz) .word . - es3_sdrc_fix +/* + * This function implements the erratum ID i581 WA: + * SDRC state restore before accessing the SDRAM + * + * Only used at return from non-OFF mode. For OFF + * mode the ROM code configures the SDRC and + * the DPLL before calling the restore code directly + * from DDR. + */ + /* Make sure SDRC accesses are ok */ wait_sdrc_ok: -- 1.7.2.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 7/7] OMAP3: ASM sleep code format rework
From: Jean Pihet j-pi...@ti.com
Cosmetic fixes to the code:
- white spaces and tabs,
- alignement,
- comments rephrase and typos,
- multi-line comments
Tested on N900 and Beagleboard with full RET and OFF modes,
using cpuidle and suspend.
Signed-off-by: Jean Pihet j-pi...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Tested-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/sleep34xx.S | 224 ---
1 files changed, 117 insertions(+), 107 deletions(-)
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 7a63da2..29f4bf7 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -1,6 +1,4 @@
/*
- * linux/arch/arm/mach-omap2/sleep.S
- *
* (C) Copyright 2007
* Texas Instruments
* Karthik Dasu karthik...@ti.com
@@ -81,20 +79,20 @@
.text
/* Function call to get the restore pointer for resume from OFF */
ENTRY(get_restore_pointer)
-stmfd sp!, {lr} @ save registers on stack
+ stmfd sp!, {lr} @ save registers on stack
adr r0, restore
-ldmfd sp!, {pc} @ restore regs and return
+ ldmfd sp!, {pc} @ restore regs and return
ENTRY(get_restore_pointer_sz)
-.word . - get_restore_pointer
+ .word . - get_restore_pointer
.text
/* Function call to get the restore pointer for 3630 resume from OFF */
ENTRY(get_omap3630_restore_pointer)
-stmfd sp!, {lr} @ save registers on stack
+ stmfd sp!, {lr} @ save registers on stack
adr r0, restore_3630
-ldmfd sp!, {pc} @ restore regs and return
+ ldmfd sp!, {pc} @ restore regs and return
ENTRY(get_omap3630_restore_pointer_sz)
-.word . - get_omap3630_restore_pointer
+ .word . - get_omap3630_restore_pointer
.text
/* Function call to get the restore pointer for ES3 to resume from OFF */
@@ -112,16 +110,16 @@ ENTRY(get_es3_restore_pointer_sz)
* place on 3630. Hopefully some version in the future may not need this.
*/
ENTRY(enable_omap3630_toggle_l2_on_restore)
-stmfd sp!, {lr} @ save registers on stack
+ stmfd sp!, {lr} @ save registers on stack
/* Setup so that we will disable and enable l2 */
mov r1, #0x1
str r1, l2dis_3630
-ldmfd sp!, {pc} @ restore regs and return
+ ldmfd sp!, {pc} @ restore regs and return
+ .text
/* Function to call rom code to save secure ram context */
ENTRY(save_secure_ram_context)
stmfd sp!, {r1-r12, lr} @ save registers on stack
-
adr r3, api_params @ r3 points to parameters
str r0, [r3,#0x4] @ r0 has sdram address
ldr r12, high_mask
@@ -165,14 +163,14 @@ ENTRY(save_secure_ram_context_sz)
*
*
* Notes:
- * - this code gets copied to internal SRAM at boot. The execution pointer
- * in SRAM is _omap_sram_idle.
+ * - this code gets copied to internal SRAM at boot and after wake-up
+ * from OFF mode. The execution pointer in SRAM is _omap_sram_idle.
* - when the OMAP wakes up it continues at different execution points
* depending on the low power mode (non-OFF vs OFF modes),
* cf. 'Resume path for xxx mode' comments.
*/
ENTRY(omap34xx_cpu_suspend)
- stmfd sp!, {r0-r12, lr} @ save registers on stack
+ stmfd sp!, {r0-r12, lr} @ save registers on stack
/*
* r0 contains restore pointer in sdram
@@ -280,9 +278,9 @@ clean_l2:
* - should be faster and will change with kernel
* - 'might' have to copy address, load and jump to it
*/
- ldr r1, kernel_flush
- mov lr, pc
- bx r1
+ ldr r1, kernel_flush
+ mov lr, pc
+ bx r1
omap3_do_wfi:
ldr r4, sdrc_power @ read the SDRC_POWER register
@@ -375,18 +373,18 @@ restore_3630:
/* Fall through to common code for the remaining logic */
restore:
-/*
+ /*
* Check what was the reason for mpu reset and store the reason in r9:
* 0 - No context lost
- * 1 - Only L1 and logic lost
- * 2 - Only L2 lost - In this case, we wont be here
- * 3 - Both L1 and L2 lost
+* 1 - Only L1 and logic lost
+* 2 - Only L2 lost - In this case, we wont be here
+* 3 - Both L1 and L2 lost
*/
- ldr r1, pm_pwstctrl_mpu
+ ldr r1, pm_pwstctrl_mpu
ldr r2, [r1]
- and r2, r2, #0x3
- cmp r2, #0x0@ Check if target power state was OFF or RET
-moveq r9, #0x3@ MPU OFF = L1 and L2 lost
+ and r2, r2, #0x3
+ cmp r2, #0x0@ Check if target power state was OFF or RET
+ moveq r9, #0x3@ MPU OFF = L1 and L2 lost
movne r9, #0x1@ Only L1 and L2 lost = avoid L2 invalidation
[PATCH 2/7] OMAP2+: use global values for the SRAM PA addresses
From: Jean Pihet j-pi...@ti.com
The SRAM PA addresses are locally defined and used at
different places, i.e. SRAM management code and idle sleep code.
The macros are now defined at a centralized place, for
easier maintenance.
Tested on N900 and Beagleboard with full RET and OFF modes,
using cpuidle and suspend.
Signed-off-by: Jean Pihet j-pi...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Tested-by: Nishanth Menonn...@ti.com
---
arch/arm/mach-omap2/sdrc.h |1 -
arch/arm/mach-omap2/sleep34xx.S|1 +
arch/arm/plat-omap/include/plat/sram.h | 11 +++
arch/arm/plat-omap/sram.c |7 ++-
4 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h
index 68f57bb..b3f8379 100644
--- a/arch/arm/mach-omap2/sdrc.h
+++ b/arch/arm/mach-omap2/sdrc.h
@@ -74,5 +74,4 @@ static inline u32 sms_read_reg(u16 reg)
*/
#define SDRC_MPURATE_LOOPS 96
-
#endif
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 2191576..406cd2a 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -26,6 +26,7 @@
*/
#include linux/linkage.h
#include asm/assembler.h
+#include plat/sram.h
#include mach/io.h
#include cm.h
diff --git a/arch/arm/plat-omap/include/plat/sram.h
b/arch/arm/plat-omap/include/plat/sram.h
index 5905100..9967d5e 100644
--- a/arch/arm/plat-omap/include/plat/sram.h
+++ b/arch/arm/plat-omap/include/plat/sram.h
@@ -11,6 +11,7 @@
#ifndef __ARCH_ARM_OMAP_SRAM_H
#define __ARCH_ARM_OMAP_SRAM_H
+#ifndef __ASSEMBLY__
extern void * omap_sram_push(void * start, unsigned long size);
extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
@@ -74,4 +75,14 @@ extern void omap_push_sram_idle(void);
static inline void omap_push_sram_idle(void) {}
#endif /* CONFIG_PM */
+#endif /* __ASSEMBLY__ */
+
+/*
+ * OMAP2+: define the SRAM PA addresses.
+ * Used by the SRAM management code and the idle sleep code.
+ */
+#define OMAP2_SRAM_PA 0x4020
+#define OMAP3_SRAM_PA 0x4020
+#define OMAP4_SRAM_PA 0x4030
+
#endif
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 819ea0c..1a686c8 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -41,15 +41,12 @@
#define OMAP1_SRAM_PA 0x2000
#define OMAP1_SRAM_VA VMALLOC_END
-#define OMAP2_SRAM_PA 0x4020
-#define OMAP2_SRAM_PUB_PA 0x4020f800
+#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
#define OMAP2_SRAM_VA 0xfe40
#define OMAP2_SRAM_PUB_VA (OMAP2_SRAM_VA + 0x800)
-#define OMAP3_SRAM_PA 0x4020
#define OMAP3_SRAM_VA 0xfe40
-#define OMAP3_SRAM_PUB_PA 0x40208000
+#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000)
#define OMAP3_SRAM_PUB_VA (OMAP3_SRAM_VA + 0x8000)
-#define OMAP4_SRAM_PA 0x4030
#define OMAP4_SRAM_VA 0xfe40
#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000)
#define OMAP4_SRAM_PUB_VA (OMAP4_SRAM_VA + 0x4000)
--
1.7.2.3
--
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[PATCH 0/7 v6] OMAP3: clean up ASM sleep code
From: Jean Pihet j-pi...@ti.com This patch only contains clean-ups and cosmetic changes, no functional change. Clean-up of the ASM sleep code, for better readability and easier maintenance. Applies on top of Nishant's latest idle path errata fixes step 2, cf. http://marc.info/?l=linux-omapm=129139584919242w=2 Jean Pihet (7): OMAP3: remove unused code from the ASM sleep code OMAP2+: use global values for the SRAM PA addresses OMAP3: remove hardcoded values from the ASM sleep code OMAP3: re-organize the ASM sleep code OMAP3: rework of the ASM sleep code execution paths OMAP3: add comments for low power code errata OMAP3: ASM sleep code format rework arch/arm/mach-omap2/control.c |9 +- arch/arm/mach-omap2/control.h |2 + arch/arm/mach-omap2/pm.h |1 - arch/arm/mach-omap2/pm34xx.c |4 +- arch/arm/mach-omap2/sdrc.h |1 - arch/arm/mach-omap2/sleep34xx.S| 724 +--- arch/arm/plat-omap/include/plat/sram.h | 11 + arch/arm/plat-omap/sram.c |7 +- 8 files changed, 411 insertions(+), 348 deletions(-) -- 1.7.2.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/7] OMAP3: remove unused code from the ASM sleep code
From: Jean Pihet j-pi...@ti.com
Remove unused code:
- macros,
- variables,
- unused semaphore locking API. This API shall be added back
when needed,
- infinite loops for debug.
Tested on N900 and Beagleboard with full RET and OFF modes,
using cpuidle and suspend.
Signed-off-by: Jean Pihet j-pi...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Reviewed-by: Nishanth Menon n...@ti.com
Tested-by: Nishanth Menonn...@ti.com
---
arch/arm/mach-omap2/pm.h|1 -
arch/arm/mach-omap2/sleep34xx.S | 58 ---
2 files changed, 6 insertions(+), 53 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index aff39d0..e458b2a 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -80,7 +80,6 @@ extern void save_secure_ram_context(u32 *addr);
extern void omap3_save_scratchpad_contents(void);
extern unsigned int omap24xx_idle_loop_suspend_sz;
-extern unsigned int omap34xx_suspend_sz;
extern unsigned int save_secure_ram_context_sz;
extern unsigned int omap24xx_cpu_suspend_sz;
extern unsigned int omap34xx_cpu_suspend_sz;
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index d2eda01..2191576 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -35,11 +35,7 @@
#define SDRC_SCRATCHPAD_SEM_V 0xfa00291c
-#define PM_PREPWSTST_CORE_VOMAP34XX_PRM_REGADDR(CORE_MOD, \
- OMAP3430_PM_PREPWSTST)
#define PM_PREPWSTST_CORE_P0x48306AE8
-#define PM_PREPWSTST_MPU_V OMAP34XX_PRM_REGADDR(MPU_MOD, \
- OMAP3430_PM_PREPWSTST)
#define PM_PWSTCTRL_MPU_P OMAP3430_PRM_BASE + MPU_MOD + OMAP2_PM_PWSTCTRL
#define CM_IDLEST1_CORE_V OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST1)
#define CM_IDLEST_CKGEN_V OMAP34XX_CM_REGADDR(PLL_MOD, CM_IDLEST)
@@ -62,36 +58,10 @@
#define SDRC_DLLA_STATUS_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS)
#define SDRC_DLLA_CTRL_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL)
-.text
-/* Function to acquire the semaphore in scratchpad */
-ENTRY(lock_scratchpad_sem)
- stmfd sp!, {lr} @ save registers on stack
-wait_sem:
- mov r0,#1
- ldr r1, sdrc_scratchpad_sem
-wait_loop:
- ldr r2, [r1]@ load the lock value
- cmp r2, r0 @ is the lock free ?
- beq wait_loop @ not free...
- swp r2, r0, [r1]@ semaphore free so lock it and proceed
- cmp r2, r0 @ did we succeed ?
- beq wait_sem@ no - try again
- ldmfd sp!, {pc} @ restore regs and return
-sdrc_scratchpad_sem:
-.word SDRC_SCRATCHPAD_SEM_V
-ENTRY(lock_scratchpad_sem_sz)
-.word . - lock_scratchpad_sem
-
-.text
-/* Function to release the scratchpad semaphore */
-ENTRY(unlock_scratchpad_sem)
- stmfd sp!, {lr} @ save registers on stack
- ldr r3, sdrc_scratchpad_sem
- mov r2,#0
- str r2,[r3]
- ldmfd sp!, {pc} @ restore regs and return
-ENTRY(unlock_scratchpad_sem_sz)
-.word . - unlock_scratchpad_sem
+
+/*
+ * API functions
+ */
.text
/* Function call to get the restore pointer for resume from OFF */
@@ -178,8 +148,7 @@ ENTRY(es3_sdrc_fix_sz)
/* Function to call rom code to save secure ram context */
ENTRY(save_secure_ram_context)
stmfd sp!, {r1-r12, lr} @ save registers on stack
-save_secure_ram_debug:
- /* b save_secure_ram_debug */ @ enable to debug save code
+
adr r3, api_params @ r3 points to parameters
str r0, [r3,#0x4] @ r0 has sdram address
ldr r12, high_mask
@@ -219,8 +188,7 @@ ENTRY(save_secure_ram_context_sz)
*/
ENTRY(omap34xx_cpu_suspend)
stmfd sp!, {r0-r12, lr} @ save registers on stack
-loop:
- /*b loop*/ @Enable to debug by stepping through code
+
/* r0 contains restore pointer in sdram */
/* r1 contains information about saving context */
ldr r4, sdrc_power @ read the SDRC_POWER register
@@ -252,7 +220,6 @@ loop:
ldmfd sp!, {r0-r12, pc} @ restore regs and return
restore_es3:
- /*b restore_es3*/ @ Enable to debug restore code
ldr r5, pm_prepwstst_core_p
ldr r4, [r5]
and r4, r4, #0x3
@@ -272,7 +239,6 @@ copy_to_sram:
b restore
restore_3630:
- /*b restore_es3630*/@ Enable to debug restore code
ldr r1, pm_prepwstst_core_p
ldr r2, [r1]
and r2, r2, #0x3
@@ -284,7 +250,6 @@ restore_3630:
str r2, [r1]
/* Fall thru for the remaining logic */
restore:
- /* b restore*/ @ Enable to debug restore code
/* Check what was the reason for mpu reset and store the reason in r9*/
/* 1 - Only L1 and logic lost */
/*
[PATCH 3/7] OMAP3: remove hardcoded values from the ASM sleep code
From: Jean Pihet j-pi...@ti.com Using macros from existing include files for registers addresses. Tested on N900 and Beagleboard with full RET and OFF modes, using cpuidle and suspend. Based on original patch from Vishwa. Signed-off-by: Jean Pihet j-pi...@ti.com Cc: Vishwanath BS vishwanath...@ti.com Acked-by: Santosh Shilimkar santosh.shilim...@ti.com Tested-by: Nishanth Menon n...@ti.com --- arch/arm/mach-omap2/control.h |2 ++ arch/arm/mach-omap2/sleep34xx.S | 29 ++--- 2 files changed, 20 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index d7911c5..72efefb 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h @@ -274,6 +274,8 @@ #define OMAP343X_SCRATCHPAD_ROM(OMAP343X_CTRL_BASE + 0x860) #define OMAP343X_SCRATCHPAD(OMAP343X_CTRL_BASE + 0x910) #define OMAP343X_SCRATCHPAD_ROM_OFFSET 0x19C +#define OMAP343X_SCRATCHPAD_REGADDR(reg) OMAP2_L4_IO_ADDRESS(\ + OMAP343X_SCRATCHPAD + reg) /* AM35XX_CONTROL_IPSS_CLK_CTRL bits */ #define AM35XX_USBOTG_VBUSP_CLK_SHIFT 0 diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index 406cd2a..8e9f38f 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S @@ -34,20 +34,27 @@ #include sdrc.h #include control.h -#define SDRC_SCRATCHPAD_SEM_V 0xfa00291c - -#define PM_PREPWSTST_CORE_P0x48306AE8 +/* + * Registers access definitions + */ +#define SDRC_SCRATCHPAD_SEM_OFFS 0xc +#define SDRC_SCRATCHPAD_SEM_V OMAP343X_SCRATCHPAD_REGADDR\ + (SDRC_SCRATCHPAD_SEM_OFFS) +#define PM_PREPWSTST_CORE_POMAP3430_PRM_BASE + CORE_MOD +\ + OMAP3430_PM_PREPWSTST #define PM_PWSTCTRL_MPU_P OMAP3430_PRM_BASE + MPU_MOD + OMAP2_PM_PWSTCTRL #define CM_IDLEST1_CORE_V OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST1) #define CM_IDLEST_CKGEN_V OMAP34XX_CM_REGADDR(PLL_MOD, CM_IDLEST) -#define SRAM_BASE_P0x4020 -#define CONTROL_STAT 0x480022F0 -#define CONTROL_MEM_RTA_CTRL (OMAP343X_CTRL_BASE\ - + OMAP36XX_CONTROL_MEM_RTA_CTRL) -#define SCRATCHPAD_MEM_OFFS0x310 /* Move this as correct place is - * available */ -#define SCRATCHPAD_BASE_P (OMAP343X_CTRL_BASE + OMAP343X_CONTROL_MEM_WKUP\ - + SCRATCHPAD_MEM_OFFS) +#define SRAM_BASE_POMAP3_SRAM_PA +#define CONTROL_STAT OMAP343X_CTRL_BASE + OMAP343X_CONTROL_STATUS +#define CONTROL_MEM_RTA_CTRL (OMAP343X_CTRL_BASE +\ + OMAP36XX_CONTROL_MEM_RTA_CTRL) + +/* Move this as correct place is available */ +#define SCRATCHPAD_MEM_OFFS0x310 +#define SCRATCHPAD_BASE_P (OMAP343X_CTRL_BASE +\ + OMAP343X_CONTROL_MEM_WKUP +\ + SCRATCHPAD_MEM_OFFS) #define SDRC_POWER_V OMAP34XX_SDRC_REGADDR(SDRC_POWER) #define SDRC_SYSCONFIG_P (OMAP343X_SDRC_BASE + SDRC_SYSCONFIG) #define SDRC_MR_0_P(OMAP343X_SDRC_BASE + SDRC_MR_0) -- 1.7.2.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/7 v5] OMAP3: clean up ASM sleep code
On Sat, Dec 18, 2010 at 12:22 AM, Nishanth Menon n...@ti.com wrote: Jean Pihet had written, on 12/17/2010 05:07 PM, the following: Hi Kevin, On Sat, Dec 18, 2010 at 12:02 AM, Kevin Hilman khil...@deeprootsystems.com wrote: Hi Jean, jean.pi...@newoldbits.com writes: From: Jean Pihet j-pi...@ti.com This patch only contains clean-ups and cosmetic changes, no functional change. Clean-up of the ASM sleep code, for better readability and easier maintenance. Applies on top of Nishant's latest idle path errata fixes step 2, cf. http://marc.info/?l=linux-omapm=129139584919242w=2 Can you do one more spin of this series in order to collect the reviewed-by/tested-by tags posted, and address some of Nishanth's comments. Since we are reaching a merge window deadline, I'll leave it to your discretion to decide which of Nishanth's suggestions to address now and which to address later. Sure I will post a new version tomorrow. This will include some fixes after Nishant's comments. The rest can be done later after we agree on the future changes. Sounds good to me as well.. the minor cleanups should be easy to do.. will help with testing tomorrow on the new series if there are any functional changes. I will post out my revamped series as well 2morrow. Ok I just re-sent the series as '[PATCH 0/7 v6] OMAP3: clean up ASM sleep code'. Thanks! Jean -- Regards, Nishanth Menon -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 4/7] OMAP3: re-organize the ASM sleep code
From: Jean Pihet j-pi...@ti.com
Organize the code in the following sections:
- register access macros,
- API functions,
- internal functions.
Tested on N900 and Beagleboard with full RET and OFF modes,
using cpuidle and suspend.
Signed-off-by: Jean Pihet j-pi...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Tested-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/sleep34xx.S | 114 +--
1 files changed, 61 insertions(+), 53 deletions(-)
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 8e9f38f..beeb682 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -79,6 +79,7 @@ ENTRY(get_restore_pointer)
ldmfd sp!, {pc} @ restore regs and return
ENTRY(get_restore_pointer_sz)
.word . - get_restore_pointer
+
.text
/* Function call to get the restore pointer for 3630 resume from OFF */
ENTRY(get_omap3630_restore_pointer)
@@ -89,9 +90,18 @@ ENTRY(get_omap3630_restore_pointer_sz)
.word . - get_omap3630_restore_pointer
.text
+/* Function call to get the restore pointer for ES3 to resume from OFF */
+ENTRY(get_es3_restore_pointer)
+ stmfd sp!, {lr} @ save registers on stack
+ adr r0, restore_es3
+ ldmfd sp!, {pc} @ restore regs and return
+ENTRY(get_es3_restore_pointer_sz)
+ .word . - get_es3_restore_pointer
+
+ .text
/*
* L2 cache needs to be toggled for stable OFF mode functionality on 3630.
- * This function sets up a fflag that will allow for this toggling to take
+ * This function sets up a flag that will allow for this toggling to take
* place on 3630. Hopefully some version in the future maynot need this
*/
ENTRY(enable_omap3630_toggle_l2_on_restore)
@@ -101,58 +111,6 @@ ENTRY(enable_omap3630_toggle_l2_on_restore)
str r1, l2dis_3630
ldmfd sp!, {pc} @ restore regs and return
- .text
-/* Function call to get the restore pointer for for ES3 to resume from OFF */
-ENTRY(get_es3_restore_pointer)
- stmfd sp!, {lr} @ save registers on stack
- adr r0, restore_es3
- ldmfd sp!, {pc} @ restore regs and return
-ENTRY(get_es3_restore_pointer_sz)
- .word . - get_es3_restore_pointer
-
-ENTRY(es3_sdrc_fix)
- ldr r4, sdrc_syscfg @ get config addr
- ldr r5, [r4]@ get value
- tst r5, #0x100 @ is part access blocked
- it eq
- biceq r5, r5, #0x100 @ clear bit if set
- str r5, [r4]@ write back change
- ldr r4, sdrc_mr_0 @ get config addr
- ldr r5, [r4]@ get value
- str r5, [r4]@ write back change
- ldr r4, sdrc_emr2_0 @ get config addr
- ldr r5, [r4]@ get value
- str r5, [r4]@ write back change
- ldr r4, sdrc_manual_0 @ get config addr
- mov r5, #0x2@ autorefresh command
- str r5, [r4]@ kick off refreshes
- ldr r4, sdrc_mr_1 @ get config addr
- ldr r5, [r4]@ get value
- str r5, [r4]@ write back change
- ldr r4, sdrc_emr2_1 @ get config addr
- ldr r5, [r4]@ get value
- str r5, [r4]@ write back change
- ldr r4, sdrc_manual_1 @ get config addr
- mov r5, #0x2@ autorefresh command
- str r5, [r4]@ kick off refreshes
- bx lr
-sdrc_syscfg:
- .word SDRC_SYSCONFIG_P
-sdrc_mr_0:
- .word SDRC_MR_0_P
-sdrc_emr2_0:
- .word SDRC_EMR2_0_P
-sdrc_manual_0:
- .word SDRC_MANUAL_0_P
-sdrc_mr_1:
- .word SDRC_MR_1_P
-sdrc_emr2_1:
- .word SDRC_EMR2_1_P
-sdrc_manual_1:
- .word SDRC_MANUAL_1_P
-ENTRY(es3_sdrc_fix_sz)
- .word . - es3_sdrc_fix
-
/* Function to call rom code to save secure ram context */
ENTRY(save_secure_ram_context)
stmfd sp!, {r1-r12, lr} @ save registers on stack
@@ -577,6 +535,56 @@ skip_l2_inval:
/* restore regs and return */
ldmfd sp!, {r0-r12, pc}
+
+/*
+ * Internal functions
+ */
+
+ .text
+ENTRY(es3_sdrc_fix)
+ ldr r4, sdrc_syscfg @ get config addr
+ ldr r5, [r4]@ get value
+ tst r5, #0x100 @ is part access blocked
+ it eq
+ biceq r5, r5, #0x100 @ clear bit if set
+ str r5, [r4]@ write back change
+ ldr r4, sdrc_mr_0 @ get config addr
+ ldr r5, [r4]@ get value
+ str r5, [r4]@ write back change
+ ldr r4, sdrc_emr2_0 @ get config addr
+ ldr r5, [r4]
[PATCH 5/7] OMAP3: rework of the ASM sleep code execution paths
From: Jean Pihet j-pi...@ti.com
- Reworked and simplified the execution paths for better
readability and to avoid duplication of code,
- Added comments on the entry and exit points and the interaction
with the ROM code for OFF mode restore,
- Reworked the existing comments for better readability.
Tested on N900 and Beagleboard with full RET and OFF modes,
using cpuidle and suspend.
Signed-off-by: Jean Pihet j-pi...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Tested-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/control.c |9 +-
arch/arm/mach-omap2/sleep34xx.S | 317 +++
2 files changed, 195 insertions(+), 131 deletions(-)
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 728f268..f4b19ed 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -239,7 +239,14 @@ void omap3_save_scratchpad_contents(void)
struct omap3_scratchpad_prcm_block prcm_block_contents;
struct omap3_scratchpad_sdrc_block sdrc_block_contents;
- /* Populate the Scratchpad contents */
+ /*
+* Populate the Scratchpad contents
+*
+* The get_*restore_pointer functions are used to provide a
+* physical restore address where the ROM code jumps while waking
+* up from MPU OFF/OSWR state.
+* The restore pointer is stored into the scratchpad.
+*/
scratchpad_contents.boot_config_ptr = 0x0;
if (cpu_is_omap3630())
scratchpad_contents.public_restore_ptr =
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index beeb682..0e27429 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -71,6 +71,13 @@
* API functions
*/
+/*
+ * The get_*restore_pointer functions are used to provide a
+ * physical restore address where the ROM code jumps while waking
+ * up from MPU OFF/OSWR state.
+ * The restore pointer is stored into the scratchpad.
+ */
+
.text
/* Function call to get the restore pointer for resume from OFF */
ENTRY(get_restore_pointer)
@@ -102,7 +109,7 @@ ENTRY(get_es3_restore_pointer_sz)
/*
* L2 cache needs to be toggled for stable OFF mode functionality on 3630.
* This function sets up a flag that will allow for this toggling to take
- * place on 3630. Hopefully some version in the future maynot need this
+ * place on 3630. Hopefully some version in the future may not need this.
*/
ENTRY(enable_omap3630_toggle_l2_on_restore)
stmfd sp!, {lr} @ save registers on stack
@@ -144,34 +151,162 @@ ENTRY(save_secure_ram_context_sz)
.word . - save_secure_ram_context
/*
+ * ==
+ * == Idle entry point ==
+ * ==
+ */
+
+/*
* Forces OMAP into idle state
*
- * omap34xx_suspend() - This bit of code just executes the WFI
- * for normal idles.
+ * omap34xx_cpu_suspend() - This bit of code saves the CPU context if needed
+ * and executes the WFI instruction. Calling WFI effectively changes the
+ * power domains states to the desired target power states.
+ *
*
- * Note: This code get's copied to internal SRAM at boot. When the OMAP
- * wakes up it continues execution at the point it went to sleep.
+ * Notes:
+ * - this code gets copied to internal SRAM at boot. The execution pointer
+ * in SRAM is _omap_sram_idle.
+ * - when the OMAP wakes up it continues at different execution points
+ * depending on the low power mode (non-OFF vs OFF modes),
+ * cf. 'Resume path for xxx mode' comments.
*/
ENTRY(omap34xx_cpu_suspend)
stmfd sp!, {r0-r12, lr} @ save registers on stack
- /* r0 contains restore pointer in sdram */
- /* r1 contains information about saving context */
- ldr r4, sdrc_power @ read the SDRC_POWER register
- ldr r5, [r4]@ read the contents of SDRC_POWER
- orr r5, r5, #0x40 @ enable self refresh on idle req
- str r5, [r4]@ write back to SDRC_POWER register
+ /*
+* r0 contains restore pointer in sdram
+* r1 contains information about saving context:
+* 0 - No context lost
+* 1 - Only L1 and logic lost
+* 2 - Only L2 lost
+* 3 - Both L1 and L2 lost
+*/
+ /* Directly jump to WFI is the context save is not required */
cmp r1, #0x0
- /* If context save is required, do that and execute wfi */
- bne save_context_wfi
+ beq omap3_do_wfi
+
+ /* Otherwise fall through to the save context code */
+save_context_wfi:
+ mov r8, r0 @ Store SDRAM address in r8
+ mrc p15, 0, r5, c1, c0, 1 @ Read Auxiliary Control Register
+ mov r4, #0x1@ Number of parameters for restore call
+ stmia r8!, {r4-r5}@ Push parameters for restore call
+
Re: [PATCH 2/6] OMAP4: Pandaboard: Add omap_reserve functionality
* Russell King - ARM Linux li...@arm.linux.org.uk [101218 00:26]: On Fri, Dec 17, 2010 at 07:05:21PM -0800, Tony Lindgren wrote: /* Maintainer: David Anders - Texas Instruments Inc */ .boot_params= 0x8100, .map_io = omap4_panda_map_io, + .reserve= omap_reserve, Please put .reserve before .map_io. Hmm, that's the way it should be.. But we should also correct the earlier changes too? See 98c672cf1fa2a56f6f43e3f48b1208b83845582c (ARM: Move platform memory reservations out of generic code) and 71ee7dad9b69917079f24d42aff796bad7932914 (ARM: OMAP: Convert to use -reserve method to reserve boot time memory). In these patches .reserve is also after .map_io which is probably not intentional? Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/5] omap4: l2x0 fixes and cleanup
* Santosh Shilimkar santosh.shilim...@ti.com [101213 21:08]: ping ... How about merging this series in omap-testing if you are ok with it. Patch ARM: l2x0: Add aux control register bitfields is already acked by Catalin. Sorry for the delay on this series, applying. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/6] OMAP4: Pandaboard: Add omap_reserve functionality
* Russell King - ARM Linux li...@arm.linux.org.uk [101218 09:36]: On Sat, Dec 18, 2010 at 09:20:56AM -0800, Tony Lindgren wrote: * Russell King - ARM Linux li...@arm.linux.org.uk [101218 00:26]: On Fri, Dec 17, 2010 at 07:05:21PM -0800, Tony Lindgren wrote: /* Maintainer: David Anders - Texas Instruments Inc */ .boot_params= 0x8100, .map_io = omap4_panda_map_io, + .reserve= omap_reserve, Please put .reserve before .map_io. Hmm, that's the way it should be.. But we should also correct the earlier changes too? Strangely that's what I've been doing in my init_early patches. My comment was aimed to ensure that no new instances are introduced. OK, do you want to merge this one into your patches too? Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/6] OMAP4: Pandaboard: Add omap_reserve functionality
On Sat, Dec 18, 2010 at 09:41:36AM -0800, Tony Lindgren wrote: * Russell King - ARM Linux li...@arm.linux.org.uk [101218 09:36]: On Sat, Dec 18, 2010 at 09:20:56AM -0800, Tony Lindgren wrote: * Russell King - ARM Linux li...@arm.linux.org.uk [101218 00:26]: On Fri, Dec 17, 2010 at 07:05:21PM -0800, Tony Lindgren wrote: /* Maintainer: David Anders - Texas Instruments Inc */ .boot_params= 0x8100, .map_io = omap4_panda_map_io, + .reserve= omap_reserve, Please put .reserve before .map_io. Hmm, that's the way it should be.. But we should also correct the earlier changes too? Strangely that's what I've been doing in my init_early patches. My comment was aimed to ensure that no new instances are introduced. OK, do you want to merge this one into your patches too? Well, the main purpose of init_early is to provide a hook to allow platforms to initialize their sched_clock() implementation before the scheduler comes up. init_early is already in my misc branch, and should appear in linux-next during the next update, if it isn't there already. The patch for using this new hook is still work in progress (SMP issues has overtaken it again today.) However, the problem I currently have is that the sched_clock() patchset depends on the ftrace changes from Rabin (in devel-stable) and the init_early stuff is in the misc branch, and I'm trying to avoid merging those two branches until the patches for using the new hook have been finalized and reviewed. Once that's happened there's another pile of work to sort out the initialization of sched_clock(), especially as almost every machine class is completely different in this regard (due to dependencies with things like clk API.) I think this is going to be rather hit and miss, so I'm probably going to do this relatively slowly - let's do the init_early support and moving stuff there for this merge window, and leave resolving the sched_clock() initialization issue until the following merge window. (The rest of the sched_clock() stuff can go in as-is because it's no worse than what we do today.) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 6/6] omap2+: Initialize serial ports for wake-up events for n8x0
* Kevin Hilman khil...@deeprootsystems.com [101213 19:17]:
Tony Lindgren t...@atomide.com writes:
Use omap_serial_init_port so we can let the serial code handle the
remuxing of the RX pads.
Signed-off-by: Tony Lindgren t...@atomide.com
Does this work for UART wakeups on n810? I don't see any 'idle' value
for the pads, so I'm guessing it wont work without those, right? Or am
I missing something here.
Well this is still missing the gpio_request parts that are needed
for the serial port to wake. I have not added that as it currently
means we also get a gpio interrupt for every rx.
I'll do more patches to deal with the gpio parts later on.
The idle values are only needed for rx pins:
+static struct omap_device_pad serial2_pads[] __initdata = {
+ {
+ .name = uart3_rx_irrx.uart3_rx_irrx,
+ .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
+ .enable = OMAP_MUX_MODE0,
+ .idle = OMAP_MUX_MODE3/* Mux as GPIO for idle */
+ },
+ { .name = uart3_tx_irtx.uart3_tx_irtx, .enable = OMAP_MUX_MODE0, },
+};
For the others, nothing is done dynamically.
Regards,
Tony
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Re: [PATCH 2/6] OMAP4: Pandaboard: Add omap_reserve functionality
* Russell King - ARM Linux li...@arm.linux.org.uk [101218 09:50]: On Sat, Dec 18, 2010 at 09:41:36AM -0800, Tony Lindgren wrote: * Russell King - ARM Linux li...@arm.linux.org.uk [101218 09:36]: On Sat, Dec 18, 2010 at 09:20:56AM -0800, Tony Lindgren wrote: * Russell King - ARM Linux li...@arm.linux.org.uk [101218 00:26]: On Fri, Dec 17, 2010 at 07:05:21PM -0800, Tony Lindgren wrote: /* Maintainer: David Anders - Texas Instruments Inc */ .boot_params= 0x8100, .map_io = omap4_panda_map_io, + .reserve= omap_reserve, Please put .reserve before .map_io. Hmm, that's the way it should be.. But we should also correct the earlier changes too? Strangely that's what I've been doing in my init_early patches. My comment was aimed to ensure that no new instances are introduced. OK, do you want to merge this one into your patches too? Well, the main purpose of init_early is to provide a hook to allow platforms to initialize their sched_clock() implementation before the scheduler comes up. init_early is already in my misc branch, and should appear in linux-next during the next update, if it isn't there already. The patch for using this new hook is still work in progress (SMP issues has overtaken it again today.) However, the problem I currently have is that the sched_clock() patchset depends on the ftrace changes from Rabin (in devel-stable) and the init_early stuff is in the misc branch, and I'm trying to avoid merging those two branches until the patches for using the new hook have been finalized and reviewed. Once that's happened there's another pile of work to sort out the initialization of sched_clock(), especially as almost every machine class is completely different in this regard (due to dependencies with things like clk API.) I think this is going to be rather hit and miss, so I'm probably going to do this relatively slowly - let's do the init_early support and moving stuff there for this merge window, and leave resolving the sched_clock() initialization issue until the following merge window. (The rest of the sched_clock() stuff can go in as-is because it's no worse than what we do today.) OK, sounds good. I'll give those a try next week too. Will update this patch based on your original comment and keep it in my series. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv2] omap: rx51: Switch rx51_tpa6130a2_data __initdata to __initdata_or_module
If the TPA6130 is compiled as module the id and power_gpio values are
arbitrary at module probing time since the rx51_tpa6130a2_data was marked as
__initdata. Fix this by using __initdata_or_module. Then __initdata is
defined only if the kernel is built without CONFIG_MODULES and omitted
otherwise.
Signed-off-by: Jarkko Nikula jhnik...@gmail.com
---
For 2.6.38 as the TPA6130 is not used in 2.6.37.
v2
- __initdata not removed but replaced with __initdata_or_module. Thanks to
Tony Lindgren t...@atomide.com for hint.
---
arch/arm/mach-omap2/board-rx51-peripherals.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c
b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 7ea2081..fd95ccf 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -722,7 +722,7 @@ static struct twl4030_platform_data rx51_twldata __initdata
= {
.vio= rx51_vio,
};
-static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata = {
+static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata_or_module
= {
.id = TPA6130A2,
.power_gpio = 98,
};
--
1.7.0.4
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[PATCH v4 7/7] OMAP3630: PM: Erratum i583: disable coreoff if ES1.2
From: Eduardo Valentin eduardo.valen...@nokia.com
Limitation i583: Self_Refresh Exit issue after OFF mode
Issue:
When device is waking up from OFF mode, then SDRC state machine sends
inappropriate sequence violating JEDEC standards.
Impact:
OMAP3630 ES1.2 is impacted as follows depending on the platform:
CS0: for 38.4MHz as internal sysclk, DDR content seen to be stable, while
for all other sysclk frequencies, varied levels of instability
seen based on varied parameters.
CS1: impacted
This patch takes option #3 as recommended by the Silicon erratum:
Avoid core power domain transitioning to OFF mode. Power consumption
impact is expected in this case.
To do this, we route core OFF requests to RET request on the impacted
revisions of silicon.
[...@ti.com: rebased the code to 2.6.37-rc2- short circuit code changed a bit]
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Eduardo Valentin eduardo.valen...@nokia.com
---
v4: idle state control changed a bit -we wont register or enable
the states which cannot be enabled.
v3: http://marc.info/?t=129140247800027r=1w=2
no functional change in erratum wa implementation, just registration of
erratum is collated to a single cpu detection and version check
v2: https://patchwork.kernel.org/patch/365262/
rebased to this patch series instead of depending on hs changes
fix typo for macro definition
v1: http://marc.info/?l=linux-omapm=129013173425266w=2
arch/arm/mach-omap2/cpuidle34xx.c | 10 ++
arch/arm/mach-omap2/pm.h |1 +
arch/arm/mach-omap2/pm34xx.c | 24 +---
3 files changed, 32 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index f80d3f6..1b32e98 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -453,6 +453,16 @@ void omap_init_power_states(void)
omap3_power_states[OMAP3_STATE_C7].core_state = PWRDM_POWER_OFF;
omap3_power_states[OMAP3_STATE_C7].flags = CPUIDLE_FLAG_TIME_VALID |
CPUIDLE_FLAG_CHECK_BM;
+
+ /*
+* Erratum i583: implementation for ES rev Es1.2 on 3630. We cannot
+* enable OFF mode in a stable form for previous revisions.
+* we disable C7 state as a result.
+*/
+ if (IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583)) {
+ omap3_power_states[OMAP3_STATE_C7].valid = 0;
+ cpuidle_params_table[OMAP3_STATE_C7].valid = 0;
+ }
}
struct cpuidle_driver omap3_idle_driver = {
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 92ef400..9032d09 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -87,6 +87,7 @@ extern unsigned int omap24xx_cpu_suspend_sz;
extern unsigned int omap34xx_cpu_suspend_sz;
#define PM_RTA_ERRATUM_i608(1 0)
+#define PM_SDRC_WAKEUP_ERRATUM_i583(1 1)
#if defined(CONFIG_PM) defined(CONFIG_ARCH_OMAP3)
extern u16 pm34xx_errata;
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 21cd36e..7faea55 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -928,12 +928,28 @@ void omap3_pm_off_mode_enable(int enable)
state = PWRDM_POWER_RET;
#ifdef CONFIG_CPU_IDLE
- omap3_cpuidle_update_states(state, state);
+ /*
+* Erratum i583: implementation for ES rev Es1.2 on 3630. We cannot
+* enable OFF mode in a stable form for previous revisions, restrict
+* instead to RET
+*/
+ if (IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583))
+ omap3_cpuidle_update_states(state, PWRDM_POWER_RET);
+ else
+ omap3_cpuidle_update_states(state, state);
#endif
list_for_each_entry(pwrst, pwrst_list, node) {
- pwrst-next_state = state;
- omap_set_pwrdm_state(pwrst-pwrdm, state);
+ if (IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583)
+ pwrst-pwrdm == core_pwrdm
+ state == PWRDM_POWER_OFF) {
+ pwrst-next_state = PWRDM_POWER_RET;
+ pr_err(%s: Core OFF disabled due to errata i583\n,
+ __func__);
+ } else {
+ pwrst-next_state = state;
+ }
+ omap_set_pwrdm_state(pwrst-pwrdm, pwrst-next_state);
}
}
@@ -1011,6 +1027,8 @@ static void __init pm_errata_configure(void)
pm34xx_errata |= PM_RTA_ERRATUM_i608;
/* Enable the l2 cache toggling in sleep logic */
enable_omap3630_toggle_l2_on_restore();
+ if (omap_rev() OMAP3630_REV_ES1_2)
+ pm34xx_errata |= PM_SDRC_WAKEUP_ERRATUM_i583;
}
}
--
1.6.3.3
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[PATCH v4 6/7] OMAP3: PM: make omap3_cpuidle_update_states independent of enable_off_mode
Currently omap3_cpuidle_update_states makes whole sale decision
on which C states to update based on enable_off_mode variable
Instead, achieve the same functionality by independently providing
mpu and core deepest states the system is allowed to achieve and
update the idle states accordingly.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/cpuidle34xx.c | 19 ++-
arch/arm/mach-omap2/pm.h |3 ++-
arch/arm/mach-omap2/pm34xx.c |2 +-
3 files changed, 13 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index 0d50b45..f80d3f6 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -293,25 +293,26 @@ select_state:
DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);
/**
- * omap3_cpuidle_update_states - Update the cpuidle states.
+ * omap3_cpuidle_update_states() - Update the cpuidle states
+ * @mpu_deepest_state: Enable states upto and including this for mpu domain
+ * @core_deepest_state:Enable states upto and including this for core
domain
*
- * Currently, this function toggles the validity of idle states based upon
- * the flag 'enable_off_mode'. When the flag is set all states are valid.
- * Else, states leading to OFF state set to be invalid.
+ * This goes through the list of states available and enables and disables the
+ * validity of C states based on deepest state that can be achieved for the
+ * variable domain
*/
-void omap3_cpuidle_update_states(void)
+void omap3_cpuidle_update_states(u32 mpu_deepest_state, u32 core_deepest_state)
{
int i;
for (i = OMAP3_STATE_C1; i OMAP3_MAX_STATES; i++) {
struct omap3_processor_cx *cx = omap3_power_states[i];
- if (enable_off_mode) {
+ if ((cx-mpu_state = mpu_deepest_state)
+ (cx-core_state = core_deepest_state)) {
cx-valid = 1;
} else {
- if ((cx-mpu_state == PWRDM_POWER_OFF) ||
- (cx-core_state == PWRDM_POWER_OFF))
- cx-valid = 0;
+ cx-valid = 0;
}
}
}
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 5e0bee9..92ef400 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -58,7 +58,8 @@ extern u32 sleep_while_idle;
#endif
#if defined(CONFIG_CPU_IDLE)
-extern void omap3_cpuidle_update_states(void);
+extern void omap3_cpuidle_update_states(u32 core_deepest_state,
+ u32 core_deepest_state);
#endif
#if defined(CONFIG_PM_DEBUG) defined(CONFIG_DEBUG_FS)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 4ba7a06..21cd36e 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -928,7 +928,7 @@ void omap3_pm_off_mode_enable(int enable)
state = PWRDM_POWER_RET;
#ifdef CONFIG_CPU_IDLE
- omap3_cpuidle_update_states();
+ omap3_cpuidle_update_states(state, state);
#endif
list_for_each_entry(pwrst, pwrst_list, node) {
--
1.6.3.3
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[PATCH v4 2/7] OMAP3: PM: Erratum i581 support: dll kick strategy
From: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com Erratum i581 impacts OMAP3 platforms. PRCM DPLL control FSM removes SDRC_IDLEREQ before DPLL3 locks causing the DPLL not to be locked at times. IMPORTANT: *) This is not a complete workaround implementation as recommended by the silicon erratum. this is a support logic for detecting lockups and attempting to recover where possible and is known to provide stability in multiple platforms. *) This code is mostly important for inactive and retention. The ROM code waits for the maximum dll lock time when resuming from off mode. So for off mode this code isn't really needed. This should eventually get refactored as part of cleanups to sleep34xx.S Cc: Kevin Hilman khil...@deeprootsystems.com Cc: Tony Lindgren t...@atomide.com Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com --- (no change done, posting for completeness of the series) v2: https://patchwork.kernel.org/patch/365252/ typo correction- erratum, support, added comment from Peter from the thread to commit message v1: http://marc.info/?l=linux-omapm=129013172525234w=2 arch/arm/mach-omap2/sleep34xx.S | 52 +++--- 1 files changed, 47 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index 2c20fcf..3fbd1e5 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S @@ -42,6 +42,7 @@ OMAP3430_PM_PREPWSTST) #define PM_PWSTCTRL_MPU_P OMAP3430_PRM_BASE + MPU_MOD + OMAP2_PM_PWSTCTRL #define CM_IDLEST1_CORE_V OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST1) +#define CM_IDLEST_CKGEN_V OMAP34XX_CM_REGADDR(PLL_MOD, CM_IDLEST) #define SRAM_BASE_P0x4020 #define CONTROL_STAT 0x480022F0 #define SCRATCHPAD_MEM_OFFS0x310 /* Move this as correct place is @@ -554,31 +555,67 @@ skip_l2_inval: /* Make sure SDRC accesses are ok */ wait_sdrc_ok: + +/* DPLL3 must be locked before accessing the SDRC. Maybe the HW ensures this. */ + ldr r4, cm_idlest_ckgen +wait_dpll3_lock: + ldr r5, [r4] + tst r5, #1 + beq wait_dpll3_lock + ldr r4, cm_idlest1_core +wait_sdrc_ready: ldr r5, [r4] -and r5, r5, #0x2 -cmp r5, #0 -bne wait_sdrc_ok +tst r5, #0x2 +bne wait_sdrc_ready + /* allow DLL powerdown upon hw idle req */ ldr r4, sdrc_power ldr r5, [r4] bic r5, r5, #0x40 str r5, [r4] -wait_dll_lock: +is_dll_in_lock_mode: + /* Is dll in lock mode? */ ldr r4, sdrc_dlla_ctrl ldr r5, [r4] tst r5, #0x4 bxnelr /* wait till dll locks */ -ldr r4, sdrc_dlla_status +wait_dll_lock_timed: + ldr r4, wait_dll_lock_counter + add r4, r4, #1 + str r4, wait_dll_lock_counter + ldr r4, sdrc_dlla_status +movr6, #8 /* Wait 20uS for lock */ +wait_dll_lock: + subsr6, r6, #0x1 + beq kick_dll ldr r5, [r4] and r5, r5, #0x4 cmp r5, #0x4 bne wait_dll_lock bx lr + /* disable/reenable DLL if not locked */ +kick_dll: + ldr r4, sdrc_dlla_ctrl + ldr r5, [r4] + mov r6, r5 + bic r6, #(13) /* disable dll */ + str r6, [r4] + dsb + orr r6, r6, #(13) /* enable dll */ + str r6, [r4] + dsb + ldr r4, kick_counter + add r4, r4, #1 + str r4, kick_counter + b wait_dll_lock_timed + cm_idlest1_core: .word CM_IDLEST1_CORE_V +cm_idlest_ckgen: + .word CM_IDLEST_CKGEN_V sdrc_dlla_status: .word SDRC_DLLA_STATUS_V sdrc_dlla_ctrl: @@ -615,5 +652,10 @@ control_stat: .word CONTROL_STAT kernel_flush: .word v7_flush_dcache_all + /* these 2 words need to be at the end !!! */ +kick_counter: + .word 0 +wait_dll_lock_counter: + .word 0 ENTRY(omap34xx_cpu_suspend_sz) .word . - omap34xx_cpu_suspend -- 1.6.3.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 4/7] OMAP3630: PM: Erratum i608: disable RTA
Erratum id: i608
RTA (Retention Till Access) feature is not supported and leads to device
stability issues when enabled. This impacts modules with embedded memories
on OMAP3630
Workaround is to disable RTA on boot and coming out of core off.
For disabling rta coming out of off mode, we do this by overriding the
restore pointer for 3630 to allow us restore handler as the first point of
entry before caches are touched and is common for GP and HS devices.
to disable earlier than this could be possible by modifying the ppa for HS
devices, but not for GP devices.
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Tony Lindgren t...@atomide.com
[ambr...@ti.com: co-developer]
Signed-off-by: Ambresh K ambr...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
---
v4:
control register handling moved to control.c
errata handling framework introduction split out
into a separate patch
v3: http://marc.info/?t=129140247800026r=1w=2
additional comment to explain Ambresh's contrib
removed the redundant check for cpu_is34xx - it is already
done by pm_init
pm_errata_configure is __init
v2: https://patchwork.kernel.org/patch/365242/
fixed missing b restore for 3430 es3.1 code.
introduced erratum handling logic here splitting it out of uart errata
typo fixes for erratum
v1: http://marc.info/?l=linux-omapm=129013172825240w=2
arch/arm/mach-omap2/control.c | 13 -
arch/arm/mach-omap2/control.h |7 ++-
arch/arm/mach-omap2/pm.h|2 ++
arch/arm/mach-omap2/pm34xx.c| 10 ++
arch/arm/mach-omap2/sleep34xx.S | 26 ++
5 files changed, 56 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 1fa3294..27ed558 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -241,7 +241,10 @@ void omap3_save_scratchpad_contents(void)
/* Populate the Scratchpad contents */
scratchpad_contents.boot_config_ptr = 0x0;
- if (omap_rev() != OMAP3430_REV_ES3_0
+ if (cpu_is_omap3630())
+ scratchpad_contents.public_restore_ptr =
+ virt_to_phys(get_omap3630_restore_pointer());
+ else if (omap_rev() != OMAP3430_REV_ES3_0
omap_rev() != OMAP3430_REV_ES3_1)
scratchpad_contents.public_restore_ptr =
virt_to_phys(get_restore_pointer());
@@ -474,4 +477,12 @@ void omap3_control_restore_context(void)
omap_ctrl_writel(control_context.csi, OMAP343X_CONTROL_CSI);
return;
}
+
+void omap3630_ctrl_disable_rta(void)
+{
+ if (!cpu_is_omap3630())
+ return;
+ omap_ctrl_writel(OMAP36XX_RTA_DISABLE, OMAP36XX_CONTROL_MEM_RTA_CTRL);
+}
+
#endif /* CONFIG_ARCH_OMAP3 CONFIG_PM */
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index b6c6b7c..ec98dd7 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -204,6 +204,10 @@
#define OMAP343X_CONTROL_WKUP_DEBOBS3 (OMAP343X_CONTROL_GENERAL_WKUP + 0x014)
#define OMAP343X_CONTROL_WKUP_DEBOBS4 (OMAP343X_CONTROL_GENERAL_WKUP + 0x018)
+/* 36xx-only RTA - Retention till Accesss control registers and bits */
+#define OMAP36XX_CONTROL_MEM_RTA_CTRL 0x40C
+#define OMAP36XX_RTA_DISABLE 0x0
+
/* 34xx D2D idle-related pins, handled by PM core */
#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250
#define OMAP3_PADCONF_SAD2D_IDLEACK0x254
@@ -347,10 +351,11 @@ extern void omap3_save_scratchpad_contents(void);
extern void omap3_clear_scratchpad_contents(void);
extern u32 *get_restore_pointer(void);
extern u32 *get_es3_restore_pointer(void);
+extern u32 *get_omap3630_restore_pointer(void);
extern u32 omap3_arm_context[128];
extern void omap3_control_save_context(void);
extern void omap3_control_restore_context(void);
-
+extern void omap3630_ctrl_disable_rta(void);
#else
#define omap_ctrl_base_get() 0
#define omap_ctrl_readb(x) 0
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 0348fd7..8d9aa3e 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -85,6 +85,8 @@ extern unsigned int save_secure_ram_context_sz;
extern unsigned int omap24xx_cpu_suspend_sz;
extern unsigned int omap34xx_cpu_suspend_sz;
+#define PM_RTA_ERRATUM_i608(1 0)
+
#if defined(CONFIG_PM) defined(CONFIG_ARCH_OMAP3)
extern u16 pm34xx_errata;
#define IS_PM34XX_ERRATUM(id) (pm34xx_errata (id))
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 5702f41..b32a2ed 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -1007,6 +1007,8 @@ void omap_push_sram_idle(void)
static void __init pm_errata_configure(void)
{
+ if (cpu_is_omap3630())
+ pm34xx_errata |= PM_RTA_ERRATUM_i608;
}
static int __init
Re: [PATCH 0/7 v6] OMAP3: clean up ASM sleep code
jean.pi...@newoldbits.com had written, on 12/18/2010 09:44 AM, the following: Applies on top of Nishant's latest idle path errata fixes step 2, cf. http://marc.info/?l=linux-omapm=129139584919242w=2 Jean Pihet (7): OMAP3: remove unused code from the ASM sleep code OMAP2+: use global values for the SRAM PA addresses OMAP3: remove hardcoded values from the ASM sleep code OMAP3: re-organize the ASM sleep code OMAP3: rework of the ASM sleep code execution paths OMAP3: add comments for low power code errata OMAP3: ASM sleep code format rework just FYI - tested the series v6 as well with: SDP3430 and SDP3630 with script: http://elinux.org/OMAP_Power_Management#Quick_verification_of_suspend-idle_functionality Tested against v4 of my series. I have ensured that your series still applies cleanly on top of my new series. -- Regards, Nishanth Menon -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 3/9] OMAP2420: hwmod data: add system DMA
On Sat, Dec 18, 2010 at 02:03:27AM -0700, Paul Walmsley wrote:
On Fri, 17 Dec 2010, G, Manjunath Kondaiah wrote:
Add OMAP2420 DMA hwmod data and also add required
DMA device attributes.
Signed-off-by: G, Manjunath Kondaiah manj...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 87
arch/arm/plat-omap/include/plat/dma.h | 11
2 files changed, 98 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index d953425..eb02fec 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -42,6 +42,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod;
static struct omap_hwmod omap2420_gpio2_hwmod;
static struct omap_hwmod omap2420_gpio3_hwmod;
static struct omap_hwmod omap2420_gpio4_hwmod;
+static struct omap_hwmod omap2420_dma_system_hwmod;
/* L3 - L4_CORE interface */
static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = {
@@ -779,6 +780,89 @@ static struct omap_hwmod omap2420_gpio4_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
};
+/* system dma */
+static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x002c,
+ .syss_offs = 0x0028,
+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
According to the OMAP242x TRM 2.3 Rev. X [SWPU064X] Table 10-34, the SDMA
has no SIDLEMODE register bitfield. So this SYSC_HAS_SIDLEMODE appears to
be incorrect. Manju, please confirm.
I verified again in 2420 TRM, this entry should not there.
+ SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
+ SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
And if there is no SIDLEMODE register bitfield, then none of these SIDLE_*
modes should apply, so they should all be removed also.
correct.
+ MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap2420_dma_hwmod_class = {
+ .name = dma,
+ .sysc = omap2420_dma_sysc,
+};
+
+/* dma attributes */
+static struct omap_dma_dev_attr dma_dev_attr = {
+ .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
+ IS_CSSA_32 | IS_CDSA_32,
+ .lch_count = 32,
+};
+
+static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = {
+ { .name = 0, .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
+ { .name = 1, .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
+ { .name = 2, .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
+ { .name = 3, .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
+};
+
+static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = {
+ {
+ .pa_start = 0x48056000,
+ .pa_end = 0x4a0560ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* dma_system - L3 */
+static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = {
+ .master = omap2420_dma_system_hwmod,
+ .slave = omap2420_l3_main_hwmod,
+ .clk= core_l3_ck,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* dma_system master ports */
+static struct omap_hwmod_ocp_if *omap2420_dma_system_masters[] = {
+ omap2420_dma_system__l3,
+};
+
+/* l4_cfg - dma_system */
l4_cfg should be l4_core.
ok.
+static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {
+ .master = omap2420_l4_core_hwmod,
+ .slave = omap2420_dma_system_hwmod,
+ .clk= sdma_ick,
+ .addr = omap2420_dma_system_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2420_dma_system_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* dma_system slave ports */
+static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = {
+ omap2420_l4_core__dma_system,
+};
+
+static struct omap_hwmod omap2420_dma_system_hwmod = {
+ .name = dma,
+ .class = omap2420_dma_hwmod_class,
+ .mpu_irqs = omap2420_dma_system_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dma_system_irqs),
+ .main_clk = core_l3_ck,
+ .slaves = omap2420_dma_system_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves),
+ .masters= omap2420_dma_system_masters,
+ .masters_cnt= ARRAY_SIZE(omap2420_dma_system_masters),
+ .dev_attr = dma_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
+ .flags = HWMOD_NO_IDLEST,
+};
+
static __initdata struct omap_hwmod *omap2420_hwmods[] = {
omap2420_l3_main_hwmod,
omap2420_l4_core_hwmod,
@@ -797,6 +881,9 @@ static __initdata struct omap_hwmod *omap2420_hwmods[]
=
Re: [PATCH v2 4/9] OMAP2430: hwmod data: add system DMA
On Sat, Dec 18, 2010 at 02:11:50AM -0700, Paul Walmsley wrote:
On Fri, 17 Dec 2010, G, Manjunath Kondaiah wrote:
Add OMAP2430 DMA hwmod data and also add required
DMA device attributes.
Signed-off-by: G, Manjunath Kondaiah manj...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 87
arch/arm/plat-omap/include/plat/dma.h |1 +
2 files changed, 88 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index f68409e..b52ba66 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -43,6 +43,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod;
static struct omap_hwmod omap2430_gpio3_hwmod;
static struct omap_hwmod omap2430_gpio4_hwmod;
static struct omap_hwmod omap2430_gpio5_hwmod;
+static struct omap_hwmod omap2430_dma_system_hwmod;
/* L3 - L4_CORE interface */
static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
@@ -840,6 +841,89 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
};
+/* dma_system */
+static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x002c,
+ .syss_offs = 0x0028,
+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
The OMAP2430 TRM Silicon Rev. 2.1 [Rev. Z] [SWPU090Z] Table 9-25
'DMA4_OCP_SYSCONFIG' does not list a SIDLEMODE register bitfield for this
IP block. Is there a reason why you list one?
You are right. This has been corrected now.
+ SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
+ SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
If there is no SIDLEMODE register bitfield, then none of these SIDLE_*
modes should be included.
ok.
+ MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap2430_dma_hwmod_class = {
+ .name = dma,
+ .sysc = omap2430_dma_sysc,
+};
+
+/* dma attributes */
+static struct omap_dma_dev_attr dma_dev_attr = {
+ .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
+ IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
+ .lch_count = 32,
+};
+
+static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = {
+ { .name = 0, .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
+ { .name = 1, .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
+ { .name = 2, .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
+ { .name = 3, .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
+};
+
+static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = {
+ {
+ .pa_start = 0x48056000,
+ .pa_end = 0x4a0560ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* dma_system - L3 */
+static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = {
+ .master = omap2430_dma_system_hwmod,
+ .slave = omap2430_l3_main_hwmod,
+ .clk= core_l3_ck,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* dma_system master ports */
+static struct omap_hwmod_ocp_if *omap2430_dma_system_masters[] = {
+ omap2430_dma_system__l3,
+};
+
+/* l4_cfg - dma_system */
l4_cfg should be l4_core.
ok.
+static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = {
+ .master = omap2430_l4_core_hwmod,
+ .slave = omap2430_dma_system_hwmod,
+ .clk= sdma_ick,
+ .addr = omap2430_dma_system_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2430_dma_system_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* dma_system slave ports */
+static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = {
+ omap2430_l4_core__dma_system,
+};
+
+static struct omap_hwmod omap2430_dma_system_hwmod = {
+ .name = dma,
+ .class = omap2430_dma_hwmod_class,
+ .mpu_irqs = omap2430_dma_system_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dma_system_irqs),
+ .main_clk = core_l3_ck,
+ .slaves = omap2430_dma_system_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves),
+ .masters= omap2430_dma_system_masters,
+ .masters_cnt= ARRAY_SIZE(omap2430_dma_system_masters),
+ .dev_attr = dma_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
+ .flags = HWMOD_NO_IDLEST,
+};
+
static __initdata struct omap_hwmod *omap2430_hwmods[] = {
omap2430_l3_main_hwmod,
omap2430_l4_core_hwmod,
@@ -859,6 +943,9 @@ static __initdata struct omap_hwmod *omap2430_hwmods[]
= {
omap2430_gpio3_hwmod,
omap2430_gpio4_hwmod,
