Re: [PATCH 1/3] dt-bindings: arm: Document RZ/G2M SoC DT bindings

2018-07-31 Thread Rob Herring
On Tue, Jul 24, 2018 at 04:47:16PM +0100, Biju Das wrote:
> Add device tree bindings documentation for Renesas RZ/G2M (r8a774a1) SoC.
> 
> Signed-off-by: Biju Das 
> Reviewed-by: Chris Paterson 
> ---
>  Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
>  1 file changed, 2 insertions(+)

Reviewed-by: Rob Herring 


Re: [PATCH v3 1/4] serial: sh-sci: Improve interrupts description

2018-07-31 Thread Rob Herring
On Tue, Jul 31, 2018 at 05:41:36AM -0500, Chris Brandt wrote:
> Describe interrupts property in more detail, especially when there are
> more than one interrupt.
> 
> Signed-off-by: Chris Brandt 
> Reviewed-by: Geert Uytterhoeven 
> ---
>  .../devicetree/bindings/serial/renesas,sci-serial.txt| 16 
> +++-
>  1 file changed, 15 insertions(+), 1 deletion(-)

Reviewed-by: Rob Herring 


[PATCH/RFC 0/4] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore

2018-07-31 Thread Geert Uytterhoeven
Hi all,

SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
includes an ARM global timer.

Enable use of the global timer on these SoCs for scheduling and delay
loops, with the following impact:
  - Scheduler accuracy is increased from 10 ms to a few ns,
  - Calls to shmobile_init_delay() to preset loops-per-jiffies can be
removed.
Note that when using an old DTB lacking the global timer, the kernel
will still work, but the delay loop will need to be calibrated
during boot.
  - This also seems to get rid of lockdep warnings related to the sh_cmt
driver.

We still need shmobile_init_delay() to setup loops-per-jiffies for other
SoCs lacking an architectured or global timer:
  - emev2: Cortex-A9 (MPCore version and global timer not documented),
  - r7s72100: single-core Cortex-A9 MPCore r3p0 (global timer not
documented),
  - r7s9210: single-core Cortex-A9 MPCore r4p1 (global timer not
documented),
  - r8a7740: single-core Cortex-A9 r2p4,
  - r8a7778: single-core Cortex-A9 r2p2-00rel0.

This has been tested on KZM-A9-GT (SH-Mobile AG5) and Marzen (R-Car H1).

Thanks for your comments!

Geert Uytterhoeven (4):
  ARM: dts: sh73a0: Rename twd clock to periph clock
  ARM: dts: sh73a0: Add device node for ARM global timer
  ARM: dts: r8a7779: Add device node for ARM global timer
  [WIP] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs

 arch/arm/boot/dts/r8a7779.dtsi |  8 
 arch/arm/boot/dts/sh73a0.dtsi  | 11 +--
 arch/arm/mach-shmobile/Kconfig |  2 ++
 arch/arm/mach-shmobile/setup-r8a7779.c |  1 -
 arch/arm/mach-shmobile/setup-sh73a0.c  |  1 -
 5 files changed, 19 insertions(+), 4 deletions(-)

-- 
2.17.1

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds


[PATCH/RFC 4/4] [WIP] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs

2018-07-31 Thread Geert Uytterhoeven
SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
includes a global timer.

Enable the ARM global timer on these SoCs, which will be used for:
  - the scheduler clock, improving scheduler accuracy from 10 ms to 3 or
4 ns,
  - delay loops, allowing removal of calls to shmobile_init_delay() from
the corresponding machine vectors.

Note that when using an old DTB lacking the global timer, the kernel
will still work.  However, loops-per-jiffies will no longer be preset,
and the delay loop will need to be calibrated during boot.

Signed-off-by: Geert Uytterhoeven 
---
 arch/arm/mach-shmobile/Kconfig | 2 ++
 arch/arm/mach-shmobile/setup-r8a7779.c | 1 -
 arch/arm/mach-shmobile/setup-sh73a0.c  | 1 -
 3 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 94e9431d92b87405..d39ab39bba92b124 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -92,6 +92,7 @@ config ARCH_R8A7778
 
 config ARCH_R8A7779
bool "R-Car H1 (R8A77790)"
+   select ARM_GLOBAL_TIMER
select ARCH_RCAR_GEN1
 
 config ARCH_R8A7790
@@ -133,5 +134,6 @@ config ARCH_RZN1
 config ARCH_SH73A0
bool "SH-Mobile AG5 (R8A73A00)"
select ARCH_RMOBILE
+   select ARM_GLOBAL_TIMER
select RENESAS_INTC_IRQPIN
 endif
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c 
b/arch/arm/mach-shmobile/setup-r8a7779.c
index b13ec9088ce5354c..86406e3f9b22e31f 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -72,7 +72,6 @@ static const char *const r8a7779_compat_dt[] __initconst = {
 DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
.smp= smp_ops(r8a7779_smp_ops),
.map_io = r8a7779_map_io,
-   .init_early = shmobile_init_delay,
.init_irq   = r8a7779_init_irq_dt,
.init_late  = shmobile_init_late,
.dt_compat  = r8a7779_compat_dt,
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c 
b/arch/arm/mach-shmobile/setup-sh73a0.c
index cc08aa752244764a..eb4a62fa42895ebe 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -56,7 +56,6 @@ static const char *const sh73a0_boards_compat_dt[] 
__initconst = {
 DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)")
.smp= smp_ops(sh73a0_smp_ops),
.map_io = sh73a0_map_io,
-   .init_early = shmobile_init_delay,
.init_machine   = sh73a0_generic_init,
.init_late  = shmobile_init_late,
.dt_compat  = sh73a0_boards_compat_dt,
-- 
2.17.1



[PATCH/RFC 2/4] ARM: dts: sh73a0: Add device node for ARM global timer

2018-07-31 Thread Geert Uytterhoeven
Add a device node for the global timer, which is part of the Cortex-A9
MPCore.

The global timer can serve as an accurate (3 ns) clock source for
scheduling and delay loops.

Signed-off-by: Geert Uytterhoeven 
---
 arch/arm/boot/dts/sh73a0.dtsi | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index b495a9d2f1118006..29461d9282ea7e99 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -39,6 +39,13 @@
};
};
 
+   timer@f200 {
+   compatible = "arm,cortex-a9-global-timer";
+   reg = <0xf200 0x100>;
+   interrupts = ;
+   clocks = <_clk>;
+   };
+
timer@f600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0xf600 0x20>;
-- 
2.17.1



[PATCH/RFC 1/4] ARM: dts: sh73a0: Rename twd clock to periph clock

2018-07-31 Thread Geert Uytterhoeven
The "TWD" clock is actually the Cortex-A9 MPCore "PERIPHCLK" clock,
which not only clocks the private timers and watchdogs (TWD), but also
the interrupt controller and global timer.

Hence rename it from "twd" to "periph".

Signed-off-by: Geert Uytterhoeven 
---
 arch/arm/boot/dts/sh73a0.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index e8f0a07c45645737..b495a9d2f1118006 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -43,7 +43,7 @@
compatible = "arm,cortex-a9-twd-timer";
reg = <0xf600 0x20>;
interrupts = ;
-   clocks = <_clk>;
+   clocks = <_clk>;
};
 
gic: interrupt-controller@f0001000 {
@@ -812,7 +812,7 @@
clock-div = <13>;
clock-mult = <1>;
};
-   twd_clk: twd {
+   periph_clk: periph {
compatible = "fixed-factor-clock";
clocks = <_clocks SH73A0_CLK_Z>;
#clock-cells = <0>;
-- 
2.17.1



[PATCH/RFC 3/4] ARM: dts: r8a7779: Add device node for ARM global timer

2018-07-31 Thread Geert Uytterhoeven
Add a device node for the global timer, which is part of the Cortex-A9
MPCore.

The global timer can serve as an accurate (4 ns) clock source for
scheduling and delay loops.

Signed-off-by: Geert Uytterhoeven 
---
 arch/arm/boot/dts/r8a7779.dtsi | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 03919714645ae56d..f1c9b2bc542c5be9 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -68,6 +68,14 @@
  <0xf100 0x100>;
};
 
+   timer@f200 {
+   compatible = "arm,cortex-a9-global-timer";
+   reg = <0xf200 0x100>;
+   interrupts = ;
+   clocks = <_clocks R8A7779_CLK_ZS>;
+   };
+
timer@f600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0xf600 0x20>;
-- 
2.17.1



Re: [GIT/RFC PULL LTSI-4.14] Renesas SoCs and Drivers to v4.17

2018-07-31 Thread Laurent Pinchart
Hi Geert,

On Tuesday, 31 July 2018 16:48:48 EEST Geert Uytterhoeven wrote:
> On Wed, Jul 11, 2018 at 11:16 PM Laurent Pinchart wrote:
> > On Thursday, 5 July 2018 13:55:00 EEST Geert Uytterhoeven wrote:
> >> On Thu, Jun 14, 2018 at 1:36 PM Simon Horman  wrote:
> >>> This series is comprised of backports to v4.14 of the following
> > 
> >>> components from their standard as of v4.16 to that of v4.17:
> > [snip]
> > 
> >> I subjected it to the same testing I do for each renesas-drivers
> >> release.
> > 
> >> Regressions from v4.14.48:
> > [snip]
> > 
> >>   - Koelsch, Salvator-X (R-Car M3-W), Salvator-XS (R-Car H3 ES2.0):
> >> +rcar-du feb0.display: no connector for encoder
> >> 
> >> /soc/lvds@feb9, skipping
> >> 
> >> Laurent: do you know what's missing?
> > 
> > That message is printed when no connector node is linked in DT through OF
> > graph to the encoder DT node output port. That's expected in this case as
> > we have an LVDS encoder, but not connected panel. However,
> > rcar_du_encoders_init_one() should return before printing that message due
> > to
> > 
> > if (!of_device_is_available(entity)) {
> > dev_dbg(rcdu->dev,
> > "connected entity %pOF is disabled, skipping\n",
> > entity);
> > return -ENODEV;
> > }
> > 
> > as the LVDS encoder nodes in DT should be disabled.
> 
> The LVDS encoder nodes were enabled in the following commits:
>   - e5c3f4707f3956a2 ("ARM: dts: r8a7791: Convert to new LVDS DT bindings"),
> for Koelsch and Porter, but none of them has a connected panel?
>   - 15a1ff30d8f9bd83 ("ARM: dts: r8a7790: Convert to new LVDS DT bindings"),
> for both LVDS instances on Lager, but the second one doesn't have a panel
> connected?
> 
> edb0c3affe5214a2 ("ARM: dts: r8a7793: Convert to new LVDS DT bindings")
> for Gose did it right, though.

You're right, disabling the LVDS encoders there would make sense. I'll submit 
a patch to fix that.

-- 
Regards,

Laurent Pinchart





[PATCH] ARM: shmobile: r8a7779: Remove unused includes

2018-07-31 Thread Geert Uytterhoeven
Presumable unused since commit c99cd90d98a98aa1 ("ARM: shmobile:
r8a7779: Remove legacy SoC code").

Signed-off-by: Geert Uytterhoeven 
---
 arch/arm/mach-shmobile/setup-r8a7779.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c 
b/arch/arm/mach-shmobile/setup-r8a7779.c
index d589326099e01f6d..b13ec9088ce5354c 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -7,9 +7,7 @@
  * Copyright (C) 2013  Cogent Embedded, Inc.
  */
 #include 
-#include 
 #include 
-#include 
 
 #include 
 #include 
-- 
2.17.1



Re: [LTSI-dev] [GIT/RFC PULL LTSI-4.14] Renesas SoCs and Drivers to v4.18-rc6

2018-07-31 Thread Geert Uytterhoeven
Hi Simon,

On Wed, Jul 25, 2018 at 5:23 PM Simon Horman  wrote:
> ** This series is for informational purposes only! **
>
> This series is comprised of backports to v4.14.57 of the components used by
> Renesas SoCs to their standard as of v4.18-rc6, selected dependencies for
> those backports and selected post-v4.18-rc6 fixes as detailed in the git
> changelog text below.
>
> This is intended as dry-run of backports components used by
> Renesas SoCs from v4.18 to v4.14.57.
>
> There are 1601 patches.
>
> As this work is for informational purposes I do not expect these patches
> to be imported to quilt by Greg at this time. However, if you would like to
> do so and rebasing would help please feel free to ask me to do so.
>
> I do plan to post an updated version of this work once the
> LTSI-4.14 merge window opens. As part of that work I intend
> to address the following known problems:
>
> * R-Car H1 / Marzen does not boot to user-space due to an upstream
>   regression in the R-Car Thermal driver which I have posted a fix for.
>
>   "[PATCH] thermal: rcar_thermal: avoid NULL dereference in absense of IRQ
>   resources"
>
> * "xhci: Fix use-after-free in xhci_free_virt_device" is already
>   present in v4.14.57 and should be dropped from these backports.
>
> I have performed build testing of this backports on a wide range of
> backports. And boot-to-userspace testing on a wide range of boards
> based on Renesas SoCs. The only regression that testing highlighted
> is that on Marzen as highlighted above.
>
>
> The following changes since commit ecc160ece609498c946e73710e5c7c54c62b966a:
>
>   Linux 4.14.57 (2018-07-22 14:28:52 +0200)
>
> are available in the git repository at:
>
>   https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-backport.git 
> backport/v4.14.57/snapshot-to-v4.18-rc6+fixes-flattened

Thank you!

I subjected this to the same testing I do for each renesas-drivers release.
I have detected no regressions from v4.14.48, only increased functionality.

Gr{oetje,eeting}s,

Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds


Re: [GIT/RFC PULL LTSI-4.14] Renesas SoCs and Drivers to v4.17

2018-07-31 Thread Geert Uytterhoeven
Hi Laurent,

On Wed, Jul 11, 2018 at 11:16 PM Laurent Pinchart
 wrote:
> On Thursday, 5 July 2018 13:55:00 EEST Geert Uytterhoeven wrote:
> > On Thu, Jun 14, 2018 at 1:36 PM Simon Horman  wrote:
> > > This series is comprised of backports to v4.14 of the following
> > > components from their standard as of v4.16 to that of v4.17:
>
> [snip]
>
> > I subjected it to the same testing I do for each renesas-drivers release.
> >
> > Regressions from v4.14.48:
>
> [snip]
>
> >   - Koelsch, Salvator-X (R-Car M3-W), Salvator-XS (R-Car H3 ES2.0):
> >
> > +rcar-du feb0.display: no connector for encoder
> > /soc/lvds@feb9, skipping
> >
> > Laurent: do you know what's missing?
>
> That message is printed when no connector node is linked in DT through OF
> graph to the encoder DT node output port. That's expected in this case as we
> have an LVDS encoder, but not connected panel. However,
> rcar_du_encoders_init_one() should return before printing that message due to
>
> if (!of_device_is_available(entity)) {
> dev_dbg(rcdu->dev,
> "connected entity %pOF is disabled, skipping\n",
> entity);
> return -ENODEV;
> }
>
> as the LVDS encoder nodes in DT should be disabled.

The LVDS encoder nodes were enabled in the following commits:
  - e5c3f4707f3956a2 ("ARM: dts: r8a7791: Convert to new LVDS DT bindings"),
for Koelsch and Porter, but none of them has a connected panel?
  - 15a1ff30d8f9bd83 ("ARM: dts: r8a7790: Convert to new LVDS DT bindings"),
for both LVDS instances on Lager, but the second one doesn't have a panel
connected?

edb0c3affe5214a2 ("ARM: dts: r8a7793: Convert to new LVDS DT bindings")
for Gose did it right, though.

Gr{oetje,eeting}s,

Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds


renesas-drivers-2018-07-31-v4.18-rc7

2018-07-31 Thread Geert Uytterhoeven
I have pushed renesas-drivers-2018-07-31-v4.18-rc7 to
https://git.kernel.org/cgit/linux/kernel/git/geert/renesas-drivers.git

This tree is meant to ease development of platform support and drivers
for Renesas ARM SoCs. It is created by merging (a) the for-next branches
of various subsystem trees and (b) branches with driver code submitted
or planned for submission to maintainers into the development branch of
Simon Horman's renesas.git tree.

Today's version is based on renesas-devel-20180726-v4.18-rc6.

Included branches with driver code:
  - clk-renesas
  - sh-pfc
  - topic/serial-sh-sci-rz-a2-cleanup-v2
  - git://linuxtv.org/pinchartl/media.git#drm-du-iommu-v1-20171115
  - git://git.ragnatech.se/linux#for-renesas-drivers
  - 
git://git.kernel.org/pub/scm/linux/kernel/git/kbingham/rcar.git#tags/vsp1/du/interlaced/v5

Included fixes:
  - [LOCAL] arm64: defconfig: Update renesas_defconfig

Included subsystem trees:
  - git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git#linux-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git#clk-next
  - 
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git#for-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git#for-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git#for-next
  - git://git.infradead.org/users/dedekind/l2-mtd-2.6.git#master
  - git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git#master
  - git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git#tty-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git#i2c/for-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git#for-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next.git#master
  - git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git#usb-next
  - git://git.freedesktop.org/git/drm/drm.git#drm-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git#next
  - git://linuxtv.org/media_tree.git#master
  - git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc.git#next
  - 
git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm.git#for-next
  - git://git.linaro.org/people/daniel.lezcano/linux.git#clockevents/next
  - git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git#testing/next
  - git://git.infradead.org/users/vkoul/slave-dma.git#next
  - 
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git#staging-next
  - git://git.armlinux.org.uk/~rmk/linux-arm.git#for-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux.git#next
  - git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap.git#for-next
  - git://git.infradead.org/users/jcooper/linux.git#irqchip/for-next
  - git://github.com/bzolnier/linux.git#fbdev-for-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git#for-next
  - 
git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply.git#for-next
  - git://www.linux-watchdog.org/linux-watchdog-next.git#master
  - git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git#for-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git#for-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git#for-next/core
  - git://anongit.freedesktop.org/drm/drm-misc#for-linux-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git#next
  - git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy.git#next
  - 
git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git#next
  - git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git#for-mfd-next
  - git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git#for-next

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds


[PATCH v3 1/4] serial: sh-sci: Improve interrupts description

2018-07-31 Thread Chris Brandt
Describe interrupts property in more detail, especially when there are
more than one interrupt.

Signed-off-by: Chris Brandt 
Reviewed-by: Geert Uytterhoeven 
---
 .../devicetree/bindings/serial/renesas,sci-serial.txt| 16 +++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt 
b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
index a7cda6550100..eaca9da79d83 100644
--- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
+++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
@@ -73,7 +73,21 @@ Required properties:
 family-specific and/or generic versions.
 
   - reg: Base address and length of the I/O registers used by the UART.
-  - interrupts: Must contain an interrupt-specifier for the SCIx interrupt.
+  - interrupts: Must contain one or more interrupt-specifiers for the SCIx.
+If a single interrupt is expressed, then all events are
+multiplexed into this single interrupt.
+
+If multiple interrupts are provided by the hardware, the order
+in which the interrupts are listed must match order below. Note
+that some HW interrupt events may be muxed together resulting
+in duplicate entries.
+The interrupt order is as follows:
+  1. Error (ERI)
+  2. Receive buffer full (RXI)
+  3. Transmit buffer empty (TXI)
+  4. Break (BRI)
+  5. Data Ready (DRI)
+  6. Transmit End (TEI)
 
   - clocks: Must contain a phandle and clock-specifier pair for each entry
 in clock-names.
-- 
2.16.1



[PATCH v3 2/4] serial: sh-sci: Allow for compressed SCIF address

2018-07-31 Thread Chris Brandt
Some devices with SCIx_SH4_SCIF_REGTYPE have no space between registers.
Use the register area size to determine the spacing between register.

Signed-off-by: Chris Brandt 
---
v2:
* adjust for case of SCIx_PROBE_REGTYPE
---
 drivers/tty/serial/sh-sci.c | 25 +++--
 1 file changed, 15 insertions(+), 10 deletions(-)

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 6ff6f2bf3b9b..c29244f76057 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -348,15 +348,15 @@ static const struct sci_port_params 
sci_port_params[SCIx_NR_REGTYPES] = {
[SCIx_SH4_SCIF_REGTYPE] = {
.regs = {
[SCSMR] = { 0x00, 16 },
-   [SCBRR] = { 0x04,  8 },
-   [SCSCR] = { 0x08, 16 },
-   [SCxTDR]= { 0x0c,  8 },
-   [SCxSR] = { 0x10, 16 },
-   [SCxRDR]= { 0x14,  8 },
-   [SCFCR] = { 0x18, 16 },
-   [SCFDR] = { 0x1c, 16 },
-   [SCSPTR]= { 0x20, 16 },
-   [SCLSR] = { 0x24, 16 },
+   [SCBRR] = { 0x02,  8 },
+   [SCSCR] = { 0x04, 16 },
+   [SCxTDR]= { 0x06,  8 },
+   [SCxSR] = { 0x08, 16 },
+   [SCxRDR]= { 0x0a,  8 },
+   [SCFCR] = { 0x0c, 16 },
+   [SCFDR] = { 0x0e, 16 },
+   [SCSPTR]= { 0x10, 16 },
+   [SCLSR] = { 0x12, 16 },
},
.fifosize = 16,
.overrun_reg = SCLSR,
@@ -2848,7 +2848,7 @@ static int sci_init_single(struct platform_device *dev,
 {
struct uart_port *port = _port->port;
const struct resource *res;
-   unsigned int i;
+   unsigned int i, regtype;
int ret;
 
sci_port->cfg   = p;
@@ -2885,6 +2885,7 @@ static int sci_init_single(struct platform_device *dev,
if (unlikely(sci_port->params == NULL))
return -EINVAL;
 
+   regtype = sci_port->params - sci_port_params;
switch (p->type) {
case PORT_SCIFB:
sci_port->rx_trigger = 48;
@@ -2939,6 +2940,10 @@ static int sci_init_single(struct platform_device *dev,
port->regshift = 1;
}
 
+   if (regtype == SCIx_SH4_SCIF_REGTYPE)
+   if (sci_port->reg_size >= 0x20)
+   port->regshift = 1;
+
/*
 * The UART port needs an IRQ value, so we peg this to the RX IRQ
 * for the multi-IRQ ports, which is where we are primarily
-- 
2.16.1



[PATCH v3 3/4] serial: sh-sci: Remove SCIx_RZ_SCIFA_REGTYPE

2018-07-31 Thread Chris Brandt
There is no more need for SCIx_RZ_SCIFA_REGTYPE now that
SCIx_SH4_SCIF_REGTYPE can provide the same register/address definitions.

Also, R7S9210 no longer needs a special compatible since the standard
"renesas,scif" will work just fine.

Signed-off-by: Chris Brandt 
Reviewed-by: Geert Uytterhoeven 
---
v2:
* add Reviewed-by
---
 drivers/tty/serial/sh-sci.c | 31 ---
 include/linux/serial_sci.h  |  1 -
 2 files changed, 32 deletions(-)

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index c29244f76057..54ea58bbe3c9 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -293,33 +293,6 @@ static const struct sci_port_params 
sci_port_params[SCIx_NR_REGTYPES] = {
.error_clear = SCIF_ERROR_CLEAR,
},
 
-   /*
-* The "SCIFA" that is in RZ/T and RZ/A2.
-* It looks like a normal SCIF with FIFO data, but with a
-* compressed address space. Also, the break out of interrupts
-* are different: ERI/BRI, RXI, TXI, TEI, DRI.
-*/
-   [SCIx_RZ_SCIFA_REGTYPE] = {
-   .regs = {
-   [SCSMR] = { 0x00, 16 },
-   [SCBRR] = { 0x02,  8 },
-   [SCSCR] = { 0x04, 16 },
-   [SCxTDR]= { 0x06,  8 },
-   [SCxSR] = { 0x08, 16 },
-   [SCxRDR]= { 0x0A,  8 },
-   [SCFCR] = { 0x0C, 16 },
-   [SCFDR] = { 0x0E, 16 },
-   [SCSPTR]= { 0x10, 16 },
-   [SCLSR] = { 0x12, 16 },
-   },
-   .fifosize = 16,
-   .overrun_reg = SCLSR,
-   .overrun_mask = SCLSR_ORER,
-   .sampling_rate_mask = SCI_SR(32),
-   .error_mask = SCIF_DEFAULT_ERROR_MASK,
-   .error_clear = SCIF_ERROR_CLEAR,
-   },
-
/*
 * Common SH-3 SCIF definitions.
 */
@@ -3148,10 +3121,6 @@ static const struct of_device_id of_sci_match[] = {
.compatible = "renesas,scif-r7s72100",
.data = SCI_OF_DATA(PORT_SCIF, SCIx_SH2_SCIF_FIFODATA_REGTYPE),
},
-   {
-   .compatible = "renesas,scif-r7s9210",
-   .data = SCI_OF_DATA(PORT_SCIF, SCIx_RZ_SCIFA_REGTYPE),
-   },
/* Family-specific types */
{
.compatible = "renesas,rcar-gen1-scif",
diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
index 1c89611e0e06..c0e795d95477 100644
--- a/include/linux/serial_sci.h
+++ b/include/linux/serial_sci.h
@@ -36,7 +36,6 @@ enum {
SCIx_SH4_SCIF_FIFODATA_REGTYPE,
SCIx_SH7705_SCIF_REGTYPE,
SCIx_HSCIF_REGTYPE,
-   SCIx_RZ_SCIFA_REGTYPE,
 
SCIx_NR_REGTYPES,
 };
-- 
2.16.1



[PATCH v3 4/4] serial: sh-sci: Improve support for separate TEI and DRI interrupts

2018-07-31 Thread Chris Brandt
Some SCIF versions mux error and break interrupts together and then provide
a separate interrupt ID for just TEI/DRI.

Allow all 6 types of interrupts to be specified via platform data (or DT)
and for any signals that are muxed together (have the same interrupt
number) simply register one handler.

Signed-off-by: Chris Brandt 
Reviewed-by: Geert Uytterhoeven 
---
v3:
* Setting string to NULL first is no longer needed
v2:
* Removed - 1 from loop
* Added Reviewed-by
---
 drivers/tty/serial/sh-sci.c | 91 -
 1 file changed, 40 insertions(+), 51 deletions(-)

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 54ea58bbe3c9..ac4424bf6b13 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -65,7 +65,8 @@ enum {
SCIx_RXI_IRQ,
SCIx_TXI_IRQ,
SCIx_BRI_IRQ,
-   SCIx_TEIDRI_IRQ,
+   SCIx_DRI_IRQ,
+   SCIx_TEI_IRQ,
SCIx_NR_IRQS,
 
SCIx_MUX_IRQ = SCIx_NR_IRQS,/* special case */
@@ -77,9 +78,6 @@ enum {
((port)->irqs[SCIx_ERI_IRQ] &&  \
 ((port)->irqs[SCIx_RXI_IRQ] < 0))
 
-#define SCIx_TEIDRI_IRQ_EXISTS(port)   \
-   ((port)->irqs[SCIx_TEIDRI_IRQ] > 0)
-
 enum SCI_CLKS {
SCI_FCK,/* Functional Clock */
SCI_SCK,/* Optional External Clock */
@@ -1685,14 +1683,23 @@ static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
return IRQ_HANDLED;
 }
 
-static irqreturn_t sci_br_interrupt(int irq, void *ptr);
+static irqreturn_t sci_br_interrupt(int irq, void *ptr)
+{
+   struct uart_port *port = ptr;
+
+   /* Handle BREAKs */
+   sci_handle_breaks(port);
+   sci_clear_SCxSR(port, SCxSR_BREAK_CLEAR(port));
+
+   return IRQ_HANDLED;
+}
 
 static irqreturn_t sci_er_interrupt(int irq, void *ptr)
 {
struct uart_port *port = ptr;
struct sci_port *s = to_sci_port(port);
 
-   if (SCIx_TEIDRI_IRQ_EXISTS(s)) {
+   if (s->irqs[SCIx_ERI_IRQ] == s->irqs[SCIx_BRI_IRQ]) {
/* Break and Error interrupts are muxed */
unsigned short ssr_status = serial_port_in(port, SCxSR);
 
@@ -1727,17 +1734,6 @@ static irqreturn_t sci_er_interrupt(int irq, void *ptr)
return IRQ_HANDLED;
 }
 
-static irqreturn_t sci_br_interrupt(int irq, void *ptr)
-{
-   struct uart_port *port = ptr;
-
-   /* Handle BREAKs */
-   sci_handle_breaks(port);
-   sci_clear_SCxSR(port, SCxSR_BREAK_CLEAR(port));
-
-   return IRQ_HANDLED;
-}
-
 static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
 {
unsigned short ssr_status, scr_status, err_enabled, orer_status = 0;
@@ -1811,6 +1807,16 @@ static const struct sci_irq_desc {
.handler = sci_br_interrupt,
},
 
+   [SCIx_DRI_IRQ] = {
+   .desc = "rx ready",
+   .handler = sci_rx_interrupt,
+   },
+
+   [SCIx_TEI_IRQ] = {
+   .desc = "tx end",
+   .handler = sci_tx_interrupt,
+   },
+
/*
 * Special muxed handler.
 */
@@ -1823,12 +1829,19 @@ static const struct sci_irq_desc {
 static int sci_request_irq(struct sci_port *port)
 {
struct uart_port *up = >port;
-   int i, j, ret = 0;
+   int i, j, w, ret = 0;
 
for (i = j = 0; i < SCIx_NR_IRQS; i++, j++) {
const struct sci_irq_desc *desc;
int irq;
 
+   /* Check if already registered (muxed) */
+   for (w = 0; w < i; w++)
+   if (port->irqs[w] == port->irqs[i])
+   w = i + 1;
+   if (w > i)
+   continue;
+
if (SCIx_IRQ_IS_MUXED(port)) {
i = SCIx_MUX_IRQ;
irq = up->irq;
@@ -1844,32 +1857,8 @@ static int sci_request_irq(struct sci_port *port)
}
 
desc = sci_irq_desc + i;
-   port->irqstr[j] = NULL;
-   if (SCIx_TEIDRI_IRQ_EXISTS(port)) {
-   /*
-* ERI and BRI are muxed, just register ERI and
-* ignore BRI.
-* TEI and DRI are muxed, but only DRI
-* is enabled, so use RXI handler
-*/
-   if (i == SCIx_ERI_IRQ)
-   port->irqstr[j] = kasprintf(GFP_KERNEL,
-   "%s:err + break",
-   dev_name(up->dev));
-   if (i == SCIx_BRI_IRQ)
-   continue;
-   if (i == SCIx_TEIDRI_IRQ) {
-   port->irqstr[j] = kasprintf(GFP_KERNEL,
-   "%s:tx end + rx 
ready",
-   dev_name(up->dev));
-

[PATCH v3 0/4] serial: sh-sci: Clean up previous RZ/A2 support

2018-07-31 Thread Chris Brandt
This patch series doesn't really provide much new functionality, but
rather provides a cleaner solution for adding RZ/A2 support.

This series applies on top of tty-next

v3:
* removed a line of code that wasn't needed
v2:
* Incorporated feedback from Geert
* Added Reviewed-by

Chris Brandt (4):
  serial: sh-sci: Improve interrupts description
  serial: sh-sci: Allow for compressed SCIF address
  serial: sh-sci: Remove SCIx_RZ_SCIFA_REGTYPE
  serial: sh-sci: Improve support for separate TEI and DRI interrupts

 .../bindings/serial/renesas,sci-serial.txt |  16 ++-
 drivers/tty/serial/sh-sci.c| 147 -
 include/linux/serial_sci.h |   1 -
 3 files changed, 70 insertions(+), 94 deletions(-)

-- 
2.16.1



Re: [PATCH] dt-bindings: pwm: rcar: Add bindings for R-Car E3 support

2018-07-31 Thread Simon Horman
On Mon, Jul 30, 2018 at 08:49:51PM +0900, Yoshihiro Shimoda wrote:
> This patch adds bindings for R-Car E3. No driver update is needed.
> 
> Signed-off-by: Yoshihiro Shimoda 
> ---
>  Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt | 1 +
>  1 file changed, 1 insertion(+)

Reviewed-by: Simon Horman 



Re: [PATCH] pinctrl: sh-pfc: r8a77990: Add PWM pins, groups and functions

2018-07-31 Thread Simon Horman
On Mon, Jul 30, 2018 at 08:47:58PM +0900, Yoshihiro Shimoda wrote:
> From: Takeshi Kihara 
> 
> This patch adds PWM{0,1,2,3,4,5,6} pins, groups and functions to
> the R8A77990 SoC.
> 
> Signed-off-by: Takeshi Kihara 
> Signed-off-by: Yoshihiro Shimoda 
> ---
>  drivers/pinctrl/sh-pfc/pfc-r8a77990.c | 211 
> ++

Reviewed-by: Simon Horman 



Re: [PATCH v3 0/2] ARM: shmobile: Add support for RZ/A2

2018-07-31 Thread Simon Horman
On Fri, Jul 27, 2018 at 11:53:31AM -0500, Chris Brandt wrote:
> Introduce RZ/A2 (R7S9210) as an SoC that can be selected.
> 
> There is no DT mainlined yet, so this is what the entry would look
> like for the BSID register:
> 
>   bsid: chipid@fcfe8004 {
>   compatible = "renesas,bsid";
>   reg = <0xfcfe8004 4>;
>   };
> 
> 
> Chris Brandt (2):
>   soc: renesas: identify RZ/A2
>   dt-bindings: arm: Document RZ/A2 SoC DT bindings

Thanks Chris,

applied for v4.20.


RE: [PATCH 4/4] ARM: dts: iwg23s-sbc: Add pinctl support for EtherAVB

2018-07-31 Thread Biju Das
Hi Geert,

Thanks for the feedback.

 Subject: Re: [PATCH 4/4] ARM: dts: iwg23s-sbc: Add pinctl support for
> >   {
> > +   avb_pins: avb {
> > +   groups = "avb_mdio", "avb_gmii_tx_rx";
>
> avb_crs is wired, but deemed unused, right?

Yes, CRS is not used in full duplex mode.

> In that case:
> Reviewed-by: Geert Uytterhoeven 
>
> > +   function = "avb";
> > +   };
> > +
> > scif1_pins: scif1 {
> > groups = "scif1_data_b";
> > function = "scif1";
>
> Gr{oetje,eeting}s,
>
> Geert
>



Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, 
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered 
No. 04586709.


Re: [PATCH v2 4/4] serial: sh-sci: Improve support for separate TEI and DRI interrupts

2018-07-31 Thread Geert Uytterhoeven
Hi Chris,

On Mon, Jul 30, 2018 at 3:17 PM Chris Brandt  wrote:
> Some SCIF versions mux error and break interrupts together and then provide
> a separate interrupt ID for just TEI/DRI.
>
> Allow all 6 types of interrupts to be specified via platform data (or DT)
> and for any signals that are muxed together (have the same interrupt
> number) simply register one handler.
>
> Signed-off-by: Chris Brandt 
> Reviewed-by: Geert Uytterhoeven 
> ---
> v2:
> * Removed - 1 from loop
> * Added Reviewed-by

> --- a/drivers/tty/serial/sh-sci.c
> +++ b/drivers/tty/serial/sh-sci.c

> @@ -1845,31 +1858,8 @@ static int sci_request_irq(struct sci_port *port)
>
> desc = sci_irq_desc + i;
> port->irqstr[j] = NULL;

The above line can be removed again, too.

> -   if (SCIx_TEIDRI_IRQ_EXISTS(port)) {
> -   /*
> -* ERI and BRI are muxed, just register ERI and
> -* ignore BRI.
> -* TEI and DRI are muxed, but only DRI
> -* is enabled, so use RXI handler
> -*/
> -   if (i == SCIx_ERI_IRQ)
> -   port->irqstr[j] = kasprintf(GFP_KERNEL,
> -   "%s:err + break",
> -   
> dev_name(up->dev));
> -   if (i == SCIx_BRI_IRQ)
> -   continue;
> -   if (i == SCIx_TEIDRI_IRQ) {
> -   port->irqstr[j] = kasprintf(GFP_KERNEL,
> -   "%s:tx end + rx 
> ready",
> -   
> dev_name(up->dev));
> -   desc = sci_irq_desc + SCIx_RXI_IRQ;
> -   }
> -   }
> -
> -   if (!port->irqstr[j])
> -   port->irqstr[j] = kasprintf(GFP_KERNEL, "%s:%s",
> -   dev_name(up->dev),
> -   desc->desc);
> +   port->irqstr[j] = kasprintf(GFP_KERNEL, "%s:%s",
> +   dev_name(up->dev), desc->desc);
> if (!port->irqstr[j]) {
> ret = -ENOMEM;
> goto out_nomem;

Gr{oetje,eeting}s,

Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds


Re: [PATCH] arm64: dts: renesas: r8a779{7|8}0: move CAN clock node

2018-07-31 Thread Simon Horman
On Tue, Jul 31, 2018 at 08:45:11AM +0200, Geert Uytterhoeven wrote:
> On Mon, Jul 30, 2018 at 8:22 PM Sergei Shtylyov
>  wrote:
> > The CAN clock node should precede the "cpus" node in the R8A779{7|8}0
> > device  trees,  according to  the alphanumeric node sorting rule...
> >
> > Signed-off-by: Sergei Shtylyov 
> 
> Reviewed-by: Geert Uytterhoeven 

Thanks, applied for v4.20.


Re: [PATCH] arm64: dts: renesas: r8a77980: move IPMMU nodes

2018-07-31 Thread Simon Horman
On Thu, Jul 26, 2018 at 09:51:18PM +0300, Sergei Shtylyov wrote:
> The IPMMU nodes should follow the GEther node, not the CAN-FD node,
> according to the  part of the startng IPMMU-DS1 node.
> While moving the nodes, also do sort them by label alphanumerically...
> 
> Signed-off-by: Sergei Shtylyov 

Thanks Sergei, applied for v4.20.


Re: [PATCH v2] arm64: dts: renesas: r8a77990: Enable PWM for Ebisu board

2018-07-31 Thread Simon Horman
On Tue, Jul 31, 2018 at 04:43:19PM +0900, Yoshihiro Shimoda wrote:
> This patch adds PWM device nodes and enables PWM3 and PWM5 for
> R-Car E3 Ebisu board. These devices are used for backlight control.
> 
> Signed-off-by: Yoshihiro Shimoda 
> Reviewed-by: Geert Uytterhoeven 
> ---
>  I have submitted dt-bindings for R-Car E3 (not merged into PWM subsystem 
> yet):
>  https://patchwork.kernel.org/patch/10548969/
> 
>  Changes from v1:
>   - Add a comment about backlight on commit log.
>   - Add "Reviewed-by: Geert Uytterhoeven". (Thanks!)

Thanks, applied for v4.20.


Re: [PATCH] pinctrl: sh-pfc: r8a77965: Add SATA pins, groups and functions

2018-07-31 Thread Geert Uytterhoeven
Hi Wolfram,

On Wed, Jul 25, 2018 at 9:15 PM Wolfram Sang
 wrote:
> From: Takeshi Kihara 
>
> This patch adds SATA0 pin, group and function to the R8A77965 SoC.
>
> Signed-off-by: Takeshi Kihara 
> [wsa: rebased to upstream base]
> Signed-off-by: Wolfram Sang 

> --- a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77965.c

> @@ -3664,6 +3685,11 @@ static const char * const du_groups[] = {
> "du_disp",
>  };
>
> +static const char * const sata0_groups[] = {
> +   "sata0_devslp_a",
> +   "sata0_devslp_b",
> +};
> +

Moving the above hunk to its correct destination while applying...

>  static const char * const hscif0_groups[] = {
> "hscif0_data",
> "hscif0_clk",

Gr{oetje,eeting}s,

Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds


[PATCH v2] arm64: dts: renesas: r8a77990: Enable PWM for Ebisu board

2018-07-31 Thread Yoshihiro Shimoda
This patch adds PWM device nodes and enables PWM3 and PWM5 for
R-Car E3 Ebisu board. These devices are used for backlight control.

Signed-off-by: Yoshihiro Shimoda 
Reviewed-by: Geert Uytterhoeven 
---
 I have submitted dt-bindings for R-Car E3 (not merged into PWM subsystem yet):
 https://patchwork.kernel.org/patch/10548969/

 Changes from v1:
  - Add a comment about backlight on commit log.
  - Add "Reviewed-by: Geert Uytterhoeven". (Thanks!)

 arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts | 24 +
 arch/arm64/boot/dts/renesas/r8a77990.dtsi  | 70 ++
 2 files changed, 94 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts 
b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
index 2bc3a48..31934a3 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
@@ -67,6 +67,16 @@
};
};
 
+   pwm3_pins: pwm3 {
+   groups = "pwm3_b";
+   function = "pwm3";
+   };
+
+   pwm5_pins: pwm5 {
+   groups = "pwm5_a";
+   function = "pwm5";
+   };
+
usb0_pins: usb {
groups = "usb0_b";
function = "usb0";
@@ -78,6 +88,20 @@
};
 };
 
+ {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+
+   status = "okay";
+};
+
+ {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+
+   status = "okay";
+};
+
  {
timeout-sec = <60>;
status = "okay";
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi 
b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index 2c8f119..2ee0edf 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -337,6 +337,76 @@
status = "disabled";
};
 
+   pwm0: pwm@e6e3 {
+   compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
+   reg = <0 0xe6e3 0 0x8>;
+   clocks = < CPG_MOD 523>;
+   power-domains = < R8A77990_PD_ALWAYS_ON>;
+   resets = < 523>;
+   #pwm-cells = <2>;
+   status = "disabled";
+   };
+
+   pwm1: pwm@e6e31000 {
+   compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
+   reg = <0 0xe6e31000 0 0x8>;
+   clocks = < CPG_MOD 523>;
+   power-domains = < R8A77990_PD_ALWAYS_ON>;
+   resets = < 523>;
+   #pwm-cells = <2>;
+   status = "disabled";
+   };
+
+   pwm2: pwm@e6e32000 {
+   compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
+   reg = <0 0xe6e32000 0 0x8>;
+   clocks = < CPG_MOD 523>;
+   power-domains = < R8A77990_PD_ALWAYS_ON>;
+   resets = < 523>;
+   #pwm-cells = <2>;
+   status = "disabled";
+   };
+
+   pwm3: pwm@e6e33000 {
+   compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
+   reg = <0 0xe6e33000 0 0x8>;
+   clocks = < CPG_MOD 523>;
+   power-domains = < R8A77990_PD_ALWAYS_ON>;
+   resets = < 523>;
+   #pwm-cells = <2>;
+   status = "disabled";
+   };
+
+   pwm4: pwm@e6e34000 {
+   compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
+   reg = <0 0xe6e34000 0 0x8>;
+   clocks = < CPG_MOD 523>;
+   power-domains = < R8A77990_PD_ALWAYS_ON>;
+   resets = < 523>;
+   #pwm-cells = <2>;
+   status = "disabled";
+   };
+
+   pwm5: pwm@e6e35000 {
+   compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
+   reg = <0 0xe6e35000 0 0x8>;
+   clocks = < CPG_MOD 523>;
+   power-domains = < R8A77990_PD_ALWAYS_ON>;
+   resets = < 523>;
+   #pwm-cells = <2>;
+   status = "disabled";
+   };
+
+   pwm6: pwm@e6e36000 {
+   compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
+   reg = <0 0xe6e36000 0 0x8>;
+   clocks = < CPG_MOD 523>;
+   power-domains = < R8A77990_PD_ALWAYS_ON>;
+   resets = < 523>;
+   #pwm-cells = <2>;
+   status = "disabled";
+   };
+
scif2: serial@e6e88000 {
compatible = "renesas,scif-r8a77990",
  

RE: [PATCH] arm64: dts: renesas: r8a77990: Enable PWM for Ebisu board

2018-07-31 Thread Yoshihiro Shimoda
Hi Geert-san,

> From: Geert Uytterhoeven, Sent: Tuesday, July 31, 2018 3:39 PM
> 
> Hi Shimoda-san,
> 
> On Tue, Jul 31, 2018 at 8:14 AM Yoshihiro Shimoda
>  wrote:
> > > From: Geert Uytterhoeven, Sent: Tuesday, July 31, 2018 12:34 AM
> > > On Mon, Jul 30, 2018 at 1:55 PM Yoshihiro Shimoda
> > >  wrote:
> > > > This patch adds PWM device nodes and enables PWM3 and PWM5 for
> > > > R-Car E3 Ebisu board.
> > >
> > > Thanks for your patch!
> >
> > Thank you for your review!
> >
> > > This is used for blacklight control, right?
> >
> > Yes.
> >
> > > It may be a good idea to mention that in the comments and/or patch
> > > description.
> >
> > I got it. I'll revise the patch description as the following. Is it good?
> >
> > ---
> > This patch adds PWM device nodes and enables PWM3 and PWM5 for
> > R-Car E3 Ebisu board. These devices are used for backlight control.
> 
> Sounds good to me. Thanks!

Thank you for your comment! I'll submit v2 patch.

Best regards,
Yoshihiro Shimoda

> Gr{oetje,eeting}s,
> 
> Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- 
> ge...@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like 
> that.
> -- Linus Torvalds


Re: [PATCH] arm64: dts: renesas: r8a779{7|8}0: move CAN clock node

2018-07-31 Thread Geert Uytterhoeven
On Mon, Jul 30, 2018 at 8:22 PM Sergei Shtylyov
 wrote:
> The CAN clock node should precede the "cpus" node in the R8A779{7|8}0
> device  trees,  according to  the alphanumeric node sorting rule...
>
> Signed-off-by: Sergei Shtylyov 

Reviewed-by: Geert Uytterhoeven 

Gr{oetje,eeting}s,

Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds


Re: [PATCH] arm64: dts: renesas: r8a77990: Enable PWM for Ebisu board

2018-07-31 Thread Geert Uytterhoeven
Hi Shimoda-san,

On Tue, Jul 31, 2018 at 8:14 AM Yoshihiro Shimoda
 wrote:
> > From: Geert Uytterhoeven, Sent: Tuesday, July 31, 2018 12:34 AM
> > On Mon, Jul 30, 2018 at 1:55 PM Yoshihiro Shimoda
> >  wrote:
> > > This patch adds PWM device nodes and enables PWM3 and PWM5 for
> > > R-Car E3 Ebisu board.
> >
> > Thanks for your patch!
>
> Thank you for your review!
>
> > This is used for blacklight control, right?
>
> Yes.
>
> > It may be a good idea to mention that in the comments and/or patch
> > description.
>
> I got it. I'll revise the patch description as the following. Is it good?
>
> ---
> This patch adds PWM device nodes and enables PWM3 and PWM5 for
> R-Car E3 Ebisu board. These devices are used for backlight control.

Sounds good to me. Thanks!

Gr{oetje,eeting}s,

Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds


RE: [PATCH] arm64: dts: renesas: r8a77990: Enable PWM for Ebisu board

2018-07-31 Thread Yoshihiro Shimoda
Hi Geert-san,

> From: Geert Uytterhoeven, Sent: Tuesday, July 31, 2018 12:34 AM
> 
> Hi Shimoda-san,
> 
> On Mon, Jul 30, 2018 at 1:55 PM Yoshihiro Shimoda
>  wrote:
> > This patch adds PWM device nodes and enables PWM3 and PWM5 for
> > R-Car E3 Ebisu board.
> 
> Thanks for your patch!

Thank you for your review!

> This is used for blacklight control, right?

Yes.

> It may be a good idea to mention that in the comments and/or patch
> description.

I got it. I'll revise the patch description as the following. Is it good?

---
This patch adds PWM device nodes and enables PWM3 and PWM5 for
R-Car E3 Ebisu board. These devices are used for backlight control.
---

Best regards,
Yoshihiro Shimoda

> > Signed-off-by: Yoshihiro Shimoda 
> 
> Reviewed-by: Geert Uytterhoeven 
> 
> Gr{oetje,eeting}s,
> 
> Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- 
> ge...@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like 
> that.
> -- Linus Torvalds