Re: [PATCH/RFT] arm64: dts: renesas: r8a77990: Enable I2C DMA
On Sat, Oct 20, 2018 at 11:35 PM Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> This patch enables I2C DMA.
>
> NOTE: I2C7 DMA is not supported by R-Car Gen3 Hardware User's Manual
> Rev.0.80E.
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Yoshihiro Kaneko
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH] mmc: tmio: introduce mask for 'always 1' bits
> > > > +#define TMIO_STAT_ALWAYS_SET_27BIT(27) /* only known on R-Car > > > > 2+ so far */ > > > > > > The _27 seems to be odd to include in the name, but I assume it > > > was the least bad option you could come up with. > > > > Yes :) I am open for better suggestions. > > Simply dropping '_27' would be an improvement in my opinion. And if we get a second one later? Or make it a mask then? signature.asc Description: PGP signature
Re: [PATCH] mmc: tmio: introduce mask for 'always 1' bits
Hi Wolfram, Thanks for your work. On 2018-11-23 13:57:32 +0100, Simon Horman wrote: > On Thu, Nov 22, 2018 at 03:06:59PM +0100, Wolfram Sang wrote: > > > > > > +#define TMIO_STAT_ALWAYS_SET_27BIT(27) /* only known on R-Car > > > > 2+ so far */ > > > > > > The _27 seems to be odd to include in the name, but I assume it > > > was the least bad option you could come up with. > > > > Yes :) I am open for better suggestions. > > Simply dropping '_27' would be an improvement in my opinion. I'm slightly agreeing with Simon here to drop the _27. With or without that change I think this patch looks good so feel free to add. Reviewed-by: Niklas Söderlund -- Regards, Niklas Söderlund
Re: [PATCH 4/4] clk: renesas: r8a77980-cpg-mssr: add RPC clocks
Hi Sergei,
Thanks for your patch!
On Thu, Nov 22, 2018 at 7:45 PM Sergei Shtylyov
wrote:
> Add the RPCSRC internal clock on R-Car V3H (R8A77980) -- it's controlled
> by the RPCCKCR.DIV[4:3] on all the R-Car gen3 SoCs except V3M (R8A77970)
> but the encoding of this field is different between SoCs.
Given the tables and encoding are the same on H3, M3-W, M3-N, and V3H,
I think it makes sense to move the common support to rcar-gen3-cpg.c.
Heck, you could even just select a different table on D3/E3 using
soc_device_match(), if only one encoding would not select a different parent
clock :-(
> Add the RPC[D2] clocks (derived from this internal clock) and the RPC-IF
> module clock as well...
>
> Signed-off-by: Sergei Shtylyov
> --- renesas-drivers.orig/drivers/clk/renesas/r8a77980-cpg-mssr.c
> +++ renesas-drivers/drivers/clk/renesas/r8a77980-cpg-mssr.c
> @@ -21,6 +22,10 @@
> #include "renesas-cpg-mssr.h"
> #include "rcar-gen3-cpg.h"
>
> +enum r8a77980_clk_types {
> + CLK_TYPE_R8A77980_RPCSRC = CLK_TYPE_GEN3_SOC_BASE,
Rename and move to rcar_gen3_clk_types?
> @@ -215,6 +232,27 @@ static int __init r8a77980_cpg_mssr_init
> return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode);
> }
>
> +static struct clk * __init r8a77980_cpg_clk_register(struct device *dev,
> + const struct cpg_core_clk *core, const struct cpg_mssr_info *info,
> + struct clk **clks, void __iomem *base,
> + struct raw_notifier_head *notifiers)
> +{
> + if (core->type == CLK_TYPE_R8A77980_RPCSRC) {
I'd use a switch() statement here, for consistency with other drivers.
> + const struct clk *parent = clks[core->parent];
> +
> + if (IS_ERR(parent))
> + return ERR_CAST(parent);
> +
> + return clk_register_divider_table(NULL, core->name,
> + __clk_get_name(parent), 0,
> + base + CPG_RPCCKCR, 3, 2, 0,
> + cpg_rpcsrc_div_table, NULL);
Don't you need a spinlock (last parameter, currently NULL)?
This needs to be synchronized with controlling the RPCD2 and RPC clocks,
as they operate on the same register.
However, that would deadlock, as enabling e.g. RPC-IF will enable
all parent clocks?
> + } else {
> + return rcar_gen3_cpg_clk_register(dev, core, info, clks, base,
> + notifiers);
> + }
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH 3/4] clk: renesas: rcar-gen3-cpg: add RPCD2 clock
Hi Sergei,
On Thu, Nov 22, 2018 at 7:43 PM Sergei Shtylyov
wrote:
> Add the RPCD2 clock for the R-Car gen3 SoCs -- this clock is en/disabled
> via the RPCCKCR register on all the R-Car gen3 SoCs except V3M (R8A77970)
> and has a fixed divisor of 2 (applied to the RPC clock).
>
> Signed-off-by: Sergei Shtylyov
Thanks for your patch!
> --- renesas-drivers.orig/drivers/clk/renesas/rcar-gen3-cpg.c
> +++ renesas-drivers/drivers/clk/renesas/rcar-gen3-cpg.c
> @@ -524,6 +524,89 @@ static struct clk * __init cpg_rpc_clk_r
> return clk;
> }
>
> +static int cpg_rpcd2_clock_enable(struct clk_hw *hw)
> +{
> + struct rpc_clock *clock = to_rpc_clock(hw);
> +
> + cpg_reg_modify(clock->reg, CPG_RPC_CKSTP2, 0);
> +
> + return 0;
> +}
> +
> +static void cpg_rpcd2_clock_disable(struct clk_hw *hw)
> +{
> + struct rpc_clock *clock = to_rpc_clock(hw);
> +
> + cpg_reg_modify(clock->reg, 0, CPG_RPC_CKSTP2);
> +}
> +
> +static int cpg_rpcd2_clock_is_enabled(struct clk_hw *hw)
> +{
> + struct rpc_clock *clock = to_rpc_clock(hw);
> +
> + return !(readl(clock->reg) & CPG_RPC_CKSTP2);
> +}
As the above 3 functions are identical to their rpc_*() counterparts,
except for the bit touched, would it make sense to share them, e.g. by
storing the bit number in struct rpc_clock?
> +static long cpg_rpcd2_round_rate(struct clk_hw *hw, unsigned long rate,
> +unsigned long *parent_rate)
> +{
> + return *parent_rate / 2;
Given you set CLK_SET_RATE_PARENT, shouldn't you propagate up,
cfr. drivers/clk/clk-fixed-factor.c:clk_factor_round_rate()?
> +}
> +static struct clk * __init cpg_rpcd2_clk_register(const struct cpg_core_clk
> *core,
> + void __iomem *base,
> + const char *parent_name)
> +{
> + struct clk_init_data init;
> + struct rpc_clock *clock;
> + struct clk *clk;
> +
> + clock = kzalloc(sizeof(*clock), GFP_KERNEL);
> + if (!clock)
> + return ERR_PTR(-ENOMEM);
> +
> + init.name = core->name;
> + init.ops = _rpcd2_clock_ops;
> + init.flags = CLK_IS_BASIC | CLK_SET_RATE_PARENT;
I don't think CLK_IS_BASIC is appropriate?
#define CLK_IS_BASICBIT(5) /* Basic clk, can't do a to_clk_foo() */
Given RPCD2 is the combination of a gate and fixed-divider clock, would
it make sense to use clk_composite?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH] mmc: tmio: introduce mask for 'always 1' bits
On Thu, Nov 22, 2018 at 03:06:59PM +0100, Wolfram Sang wrote: > > > > +#define TMIO_STAT_ALWAYS_SET_27 BIT(27) /* only known on R-Car 2+ so > > > far */ > > > > The _27 seems to be odd to include in the name, but I assume it > > was the least bad option you could come up with. > > Yes :) I am open for better suggestions. Simply dropping '_27' would be an improvement in my opinion.
Re: [PATCH 2/4] clk: renesas: rcar-gen3-cpg: add RPC clock
Hi Sergei,
On Thu, Nov 22, 2018 at 7:41 PM Sergei Shtylyov
wrote:
> Add the RPC clock for the R-Car gen3 SoCs -- this clock is controlled by
> the RPCCKCR register on all the R-Car gen3 SoCs except V3M (R8A77970).
>
> Signed-off-by: Sergei Shtylyov
Thanks for your patch!
> --- renesas-drivers.orig/drivers/clk/renesas/rcar-gen3-cpg.c
> +++ renesas-drivers/drivers/clk/renesas/rcar-gen3-cpg.c
> @@ -409,6 +409,121 @@ free_clock:
> return clk;
> }
>
> +#define CPG_RPC_CKSTP2 BIT(9)
This bit is for RPCD2, so technically it should be part of patch 3/4.
Perhaps you can merge both patches, and absorb the non-SoC-specific
parts from patch 4/4?
> +#define CPG_RPC_CKSTP BIT(8)
> +#define CPG_RPC_DIV_4_3_MASK GENMASK(4, 3)
Unused
> +#define CPG_RPC_DIV_2_0_MASK GENMASK(2, 0)
> +
> +struct rpc_clock {
> + struct clk_hw hw;
> + void __iomem *reg;
As this register should be saved/restore during system suspend/resume,
you should add
struct cpg_simple_notifier csn;
> +};
> +static long cpg_rpc_clock_round_rate(struct clk_hw *hw, unsigned long rate,
> +unsigned long *parent_rate)
> +{
> + struct rpc_clock *clock = to_rpc_clock(hw);
> + unsigned int div = cpg_rpc_clock_calc_div(clock, rate, *parent_rate);
> +
> + return DIV_ROUND_CLOSEST(*parent_rate, div);
Given you set CLK_SET_RATE_PARENT, shouldn't you propagate up,
cfr. drivers/clk/clk-fixed-factor.c:clk_factor_round_rate()?
> +}
> +static struct clk * __init cpg_rpc_clk_register(const struct cpg_core_clk
> *core,
> + void __iomem *base,
> + const char *parent_name)
> +{
> + struct clk_init_data init;
> + struct rpc_clock *clock;
> + struct clk *clk;
> +
> + clock = kzalloc(sizeof(*clock), GFP_KERNEL);
> + if (!clock)
> + return ERR_PTR(-ENOMEM);
> +
> + init.name = core->name;
> + init.ops = _rpc_clock_ops;
> + init.flags = CLK_IS_BASIC | CLK_SET_RATE_PARENT;
I don't think CLK_IS_BASIC is appropriate?
#define CLK_IS_BASICBIT(5) /* Basic clk, can't do a to_clk_foo() */
> + init.parent_names = _name;
> + init.num_parents = 1;
> +
> + clock->reg = base + CPG_RPCCKCR;
> + clock->hw.init =
> +
> + clk = clk_register(NULL, >hw);
> + if (IS_ERR(clk))
> + kfree(clock);
> +
For save/restore during system suspend/resume:
cpg_simple_notifier_register(notifiers, >csn);
Hmm, looks like I missed that during review of commit 381081ffc2948e1e
("clk: renesas: r8a77970: Add SD0H/SD0 clocks for SDHI"), too.
> + return clk;
> +}
> +
>
> static const struct rcar_gen3_cpg_pll_config *cpg_pll_config __initdata;
> static unsigned int cpg_clk_extalr __initdata;
> @@ -583,6 +698,9 @@ struct clk * __init rcar_gen3_cpg_clk_re
> }
> break;
>
> + case CLK_TYPE_GEN3_RPC:
> + return cpg_rpc_clk_register(core, base,
> __clk_get_name(parent));
> +
> default:
> return ERR_PTR(-EINVAL);
> }
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH/RFT] arm64: dts: renesas: r8a77990: add thermal device support
On Wed, Oct 17, 2018 at 11:58:29AM +0200, Simon Horman wrote: > On Mon, Oct 15, 2018 at 11:12:26PM +0900, Yoshihiro Kaneko wrote: > > This patch adds the thermal device node and the thermal-zone for > > the R8A77990 SoC. > > > > Signed-off-by: Yoshihiro Kaneko > Thanks, > > This looks fine to me but I will wait to see if there are other reviews > before applying. > > Reviewed-by: Simon Horman > > Also tested on Ebisu/E3 in conjunction with "[PATCH/RFT 0/2] thermal: add > suport for R8A77990" > > # X=100; while [ "$X" -gt 0 ]; do X=$(($X -1 )); done; cat > # /sys/devices/virtual/thermal/thermal_zone0/temp; sleep 1; cat > # /sys/devices/virtual/thermal/thermal_zone0/temp > 3 > 25000 > > Tested-by: Simon Horman > I was waiting for the bindings to be reviewed, that has now happened and I have applied this patch for v4.21.
Re: [PATCH/RFT] arm64: dts: renesas: r8a77990: Enable I2C DMA
On Wed, Nov 21, 2018 at 01:02:57PM +0100, Simon Horman wrote: > On Sun, Oct 21, 2018 at 06:35:26AM +0900, Yoshihiro Kaneko wrote: > > From: Takeshi Kihara > > > > This patch enables I2C DMA. > > > > NOTE: I2C7 DMA is not supported by R-Car Gen3 Hardware User's Manual > > Rev.0.80E. > > > > Signed-off-by: Takeshi Kihara > > Signed-off-by: Yoshihiro Kaneko > > Base patch stack: > * renesas-devel-20181121-v4.20-rc3 > + "iommu/ipmmu-vmsa: Hook up r8a77990 DT matching code" > + "pinctrl: sh-pfc: r8a77990: Add Audio SSI pins, groups and functions" > + "pinctrl: sh-pfc: r8a77990: Add Audio clock pins, groups and functions" > > Config: renesas_defconfig + IPMMU_VMSA > > Should we enable IPMMU_VMSA in arm64 defconfig and renesas_defconfig? > > Test with base patch stack: > # grep dma /proc/interrupts | grep -v "0 0" > (no output) > # amixer set "DVC Out" 2% > # play xyz.wav > # grep dma /proc/interrupts | grep -v "0 0" > (no output) > > Test with base patch stack + this patch applied: > # grep dma /proc/interrupts | grep -v "0 0" > (no output) > # amixer set "DVC Out" 2% > # play xyz.wav > # grep dma /proc/interrupts | grep -v "0 0" > 109:512 0 GIC-0 352 Level ec70.dma-controller:0 > > > Tested-by: Simon Horman > Reviewed-by: Simon Horman > > I plan to apply this patch for v4.21. Done.
Re: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
On Wed, Nov 21, 2018 at 10:27:41AM +, Biju Das wrote:
> Hi Simon,
>
> Thanks for the feedback.
>
> > -Original Message-
> > From: Simon Horman
> > Sent: 21 November 2018 10:24
> > To: Biju Das
> > Cc: Rob Herring ; Mark Rutland
> > ; Magnus Damm ;
> > linux-renesas-soc@vger.kernel.org; devicet...@vger.kernel.org; Geert
> > Uytterhoeven ; Chris Paterson
> > ; Daniel Lezcano
> > ; Thomas Gleixner ; John
> > Stultz ; Fabrizio Castro
> >
> > Subject: Re: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
> >
> > On Fri, Oct 26, 2018 at 09:25:07AM +0100, Biju Das wrote:
> > > This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
> > >
> > > Signed-off-by: Biju Das
> > > ---
> > > This patch is tested against renesas-dev
> > >
> > > I have executed on inconsistency-check, nanosleep and
> > > clocksource_switch selftests on this arm64 SoC. The
> > > inconsistency-check and nanosleep tests are working fine.The
> > > clocksource_switch asynchronous test is failing due to inconsistency-check
> > failure on "arch_sys_counter".
> > >
> > > But if i skip the clocksource_switching of "arch_sys_counter", the
> > > asynchronous test is passing for CMT0/1/2/3 timer.
> > >
> > > Has any one noticed this issue?
> >
> > I am reluctant to apply this patch until there is a better understanding of
> > the
> > issue above.
>
> If I understand correctly this patch has no issue at all. The problem is
> related to ARM architecture timer.
> Please correct me if you think otherwise.
Thanks for the clarification, I have applied this patch for v4.21.
Re: [PATCH] arm64: dts: renesas: r8a7796: add SSIU support for sound
On Wed, Nov 21, 2018 at 11:58:59PM +, Kuninori Morimoto wrote:
>
> Hi Simon
>
> > > From: Kuninori Morimoto
> > >
> > > rsnd driver supports SSIU now, let's use it.
> > > Then, BUSIF DMA settings on rcar_sound,ssi (= rxu, txu) are
> > > no longer needed.
> > > To avoid git merge timing issue / git bisect issue,
> > > this patch doesn't remove it so far, but will be removed in
> > > the future.
> > >
> > > Signed-off-by: Kuninori Morimoto
> > > ---
> > > arch/arm64/boot/dts/renesas/r8a7796.dtsi | 211
> > > +++
> > > 1 file changed, 211 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> > > b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> > > index 449eb33..5cc9b8b 100644
> > > --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> > > +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> > > @@ -1826,6 +1826,217 @@
> > > };
> > > };
> > >
> > > + rcar_sound,ssiu {
> > > + ssiu00: ssiu-0 {
> > > + dmas = < 0x15>, < 0x16>;
> > > + dma-names = "rx", "tx";
> > > + };
> >
> > Hi Morimoto-san,
> >
> > I am having a little trouble finding documentation of the audma port
> > numbers used in this patch.
>
> ?? Sorry what do you mean ?
> You can find it on
>
> Table 48.5 Selecting On-Chip Peripheral Module Request Modes
Thanks, that is the information that I was looking fore.
I have gone ahead and applied this patch for v4.21.
Re: [PATCH v2] arm64: dts: renesas: r8a77990: Add I2C-DVFS device node
On Fri, Nov 23, 2018 at 10:21:39AM +0100, Geert Uytterhoeven wrote:
> Hi Simon,
>
> On Wed, Nov 21, 2018 at 1:12 PM Simon Horman
> wrote:
> >
> > From: Takeshi Kihara
> >
> > This patch adds I2C-DVFS device node for the R8A77990 SoC.
> >
> > v2
> > * Drop aliases update as in upstream it is not required to configure the
> > BD9571 PMIC for DDR backup, nor is the use of i2c are aliases desired.
> > * Do not describe the device as compatible with "renesas,rcar-gen3-iic" or
> > "renesas,rmobile-iic" fallback compat strings. The absence of automatic
> > transmission registers leads us to declare the r8a77990 IIC controller as
> > incompatible.
> >
> > Signed-off-by: Takeshi Kihara
> > Signed-off-by: Yoshihiro Kaneko
> > [simon: drop aliases hunk and fallback compat string usage]
> > Signed-off-by: Simon Horman
>
> Thanks for the update!
>
> > --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
> > @@ -357,6 +357,20 @@
> > reg = <0 0xe606 0 0x508>;
> > };
> >
> > + i2c_dvfs: i2c@e60b {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + compatible = "renesas,iic-r8a77990";
> > + reg = <0 0xe60b 0 0x34>;
>
> ... 0x15>;
Thanks, sorry for missing that.
> > + interrupts = ;
> > + clocks = < CPG_MOD 926>;
> > + power-domains = < R8A77990_PD_ALWAYS_ON>;
> > + resets = < 926>;
> > + dmas = < 0x11>, < 0x10>;
> > + dma-names = "tx", "rx";
> > + status = "disabled";
> > + };
>
> With thwe above fixed:
> Reviewed-by: Geert Uytterhoeven
I have applied the following for v4.21:
>From 0b80b6f4b26e3c6e5861234badc4b12ef2928cac Mon Sep 17 00:00:00 2001
From: Takeshi Kihara
Date: Wed, 21 Nov 2018 13:11:39 +0100
Subject: [PATCH] arm64: dts: renesas: r8a77990: Add I2C-DVFS device node
This patch adds I2C-DVFS device node for the R8A77990 SoC.
v2
* Drop aliases update as in upstream it is not required to configure the
BD9571 PMIC for DDR backup, nor is the use of i2c are aliases desired.
* Do not describe the device as compatible with "renesas,rcar-gen3-iic" or
"renesas,rmobile-iic" fallback compat strings. The absence of automatic
transmission registers leads us to declare the r8a77990 IIC controller as
incompatible.
v2.1
* Reduced register range to reflect documentation
Signed-off-by: Takeshi Kihara
Signed-off-by: Yoshihiro Kaneko
Signed-off-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index b0398e05e8ed..3b334be843f4 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -357,6 +357,20 @@
reg = <0 0xe606 0 0x508>;
};
+ i2c_dvfs: i2c@e60b {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a77990";
+ reg = <0 0xe60b 0 0x15>;
+ interrupts = ;
+ clocks = < CPG_MOD 926>;
+ power-domains = < R8A77990_PD_ALWAYS_ON>;
+ resets = < 926>;
+ dmas = < 0x11>, < 0x10>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
cpg: clock-controller@e615 {
compatible = "renesas,r8a77990-cpg-mssr";
reg = <0 0xe615 0 0x1000>;
--
2.11.0
Re: [PATCH] gpio: rcar: reference device instead of platform device
On Thu, Nov 22, 2018 at 9:19 PM Vladimir Zapolskiy wrote:
> The change simplifies dereferences to the mediated struct device, also
> it allows to limit the scope of the platform device usage to probe and
> remove functions only.
>
> Non-functional change.
>
> Signed-off-by: Vladimir Zapolskiy
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH 1/4] clk: renesas: rcar-gen3-cpg: factor out cpg_reg_modify()
On Thu, Nov 22, 2018 at 7:39 PM Sergei Shtylyov
wrote:
> There's quite often repeated sequence of a CPG register read-modify-write,
> so it seems worth factoring it out into a function -- this saves 68 bytes
> of the object code already (AArch64 gcc 4.8.5) and will save more with the
> next patches...
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH 1/2] i2c: sh_mobile: document support for r8a77990 (R-Car E3)
On Wed, Nov 21, 2018 at 1:11 PM Simon Horman wrote:
> Document support for the IIC code for the r8a77990 (R-Car E3).
>
> It is not considered compatible with existing fallback bindings
> due to the documented absence of automatic transmission registers.
>
> Signed-off-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH 2/2] i2c: sh_mobile: add support for r8a77990 (R-Car E3)
On Wed, Nov 21, 2018 at 1:11 PM Simon Horman wrote:
> Add support for the IIC code for the r8a77990 (R-Car E3).
>
> It is not considered compatible with existing fallback bindings
> due to the documented absence of automatic transmission registers.
>
> These registers are currently not used by the driver and
> thus the provides the same behaviour for "renesas,iic-r8a77990" and
> "renesas,rcar-gen3-iic". The point of declaring incompatibility is
> to allow for automatic transmission register support to be added to
> "renesas,iic-r8a77990" and "renesas,rcar-gen3-iic" in future.
>
> Signed-off-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH v2] arm64: dts: renesas: r8a77990: Add I2C-DVFS device node
Hi Simon,
On Wed, Nov 21, 2018 at 1:12 PM Simon Horman wrote:
>
> From: Takeshi Kihara
>
> This patch adds I2C-DVFS device node for the R8A77990 SoC.
>
> v2
> * Drop aliases update as in upstream it is not required to configure the
> BD9571 PMIC for DDR backup, nor is the use of i2c are aliases desired.
> * Do not describe the device as compatible with "renesas,rcar-gen3-iic" or
> "renesas,rmobile-iic" fallback compat strings. The absence of automatic
> transmission registers leads us to declare the r8a77990 IIC controller as
> incompatible.
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Yoshihiro Kaneko
> [simon: drop aliases hunk and fallback compat string usage]
> Signed-off-by: Simon Horman
Thanks for the update!
> --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
> @@ -357,6 +357,20 @@
> reg = <0 0xe606 0 0x508>;
> };
>
> + i2c_dvfs: i2c@e60b {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,iic-r8a77990";
> + reg = <0 0xe60b 0 0x34>;
... 0x15>;
> + interrupts = ;
> + clocks = < CPG_MOD 926>;
> + power-domains = < R8A77990_PD_ALWAYS_ON>;
> + resets = < 926>;
> + dmas = < 0x11>, < 0x10>;
> + dma-names = "tx", "rx";
> + status = "disabled";
> + };
With thwe above fixed:
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
[git pull] pinctrl: sh-pfc: Updates for v4.21
Hi Linus,
The following changes since commit 651022382c7f8da46cb4872a545ee1da6d097d2a:
Linux 4.20-rc1 (2018-11-04 15:37:52 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
tags/sh-pfc-for-v4.21-tag1
for you to fetch changes up to b59d0e782706785b7042539e820e95df3be4d04c:
pinctrl: Add RZ/A2 pin and gpio controller (2018-11-23 09:30:27 +0100)
pinctrl: sh-pfc: Updates for v4.21
- Fix VIN (Video IN) versioned groups on R-Car V2H, H3, and M3-W,
- Add I2C[0-3], DU1, VIN, QSPI1, and SDHI pin groups on RZ/G1C,
- Add audio, SDHI, VIN, HSCIF, and CAN(FD) support on R-Car E3,
- Add QSPI pin groups on R-Car V3M and V3H,
- Add VIN and CAN(FD) pin groups on R-Car M3-N,
- Add I2C[035] pin groups on R-Car H3 and M3-W,
- Add pinctrl and GPIO support for the new RZ/A2M (R7S9210) SoC,
- Small cleanups,
- Maintainership updates.
Thanks for pulling!
Chris Brandt (2):
dt-bindings: pinctrl: Add RZ/A2 pinctrl and GPIO
pinctrl: Add RZ/A2 pin and gpio controller
Dmitry Shifrin (2):
pinctrl: sh-pfc: r8a77970: Add QSPI pins, groups, and functions
pinctrl: sh-pfc: r8a77980: Add QSPI pins, groups, and functions
Fabrizio Castro (5):
pinctrl: sh-pfc: r8a77470: Add remaining I2C pin groups
pinctrl: sh-pfc: r8a77470: Add DU1 pin groups
pinctrl: sh-pfc: r8a77470: Add VIN pin groups
pinctrl: sh-pfc: r8a77470: Add QSPI1 pin groups
pinctrl: sh-pfc: r8a77470: Add SDHI support
Geert Uytterhoeven (3):
MAINTAINERS: Add Renesas RZ/A and RZ/N files to Renesas pinctrl section
pinctrl: sh-pfc: Reduce kernel size for narrow VIN channels
pinctrl: sh-pfc: r8a77995: Remove unused PINMUX_IPSR_{MSEL2,PHYS}()
Jacopo Mondi (6):
pinctrl: sh-pfc: Add optional arg to VIN_DATA_PIN_GROUP
pinctrl: sh-pfc: r8a7792: Fix VIN versioned groups
pinctrl: sh-pfc: r8a7795: Fix VIN versioned groups
pinctrl: sh-pfc: r8a7796: Fix VIN versioned groups
pinctrl: sh-pfc: r8a77965: Add VIN[4|5] groups/functions
pinctrl: sh-pfc: r8a77990: Add VIN[4|5] groups/functions
Laurent Pinchart (1):
MAINTAINERS: Remove Laurent Pinchart as Renesas pinctrl maintainer
Takeshi Kihara (12):
pinctrl: sh-pfc: r8a77990: Add Audio clock pins, groups and functions
pinctrl: sh-pfc: r8a77990: Add Audio SSI pins, groups and functions
pinctrl: sh-pfc: r8a77990: Add SDHI pins, groups and functions
pinctrl: sh-pfc: r8a77990: Add voltage switch operations for SDHI
pinctrl: sh-pfc: r8a77990: Add HSCIF pins, groups, and functions
pinctrl: sh-pfc: r8a7795: Add I2C{0,3,5} pins, groups and functions
pinctrl: sh-pfc: r8a7795-es1: Add I2C{0,3,5} pins, groups and functions
pinctrl: sh-pfc: r8a7796: Add I2C{0,3,5} pins, groups and functions
pinctrl: sh-pfc: r8a77965: Add CAN pins, groups and functions
pinctrl: sh-pfc: r8a77965: Add CAN FD pins, groups and functions
pinctrl: sh-pfc: r8a77990: Add CAN pins, groups and functions
pinctrl: sh-pfc: r8a77990: Add CAN FD pins, groups and functions
Ulrich Hecht (1):
pinctrl: sh-pfc: Add physical pin multiplexing helper macros
.../bindings/pinctrl/renesas,rza2-pinctrl.txt | 87 +
MAINTAINERS|2 +-
drivers/pinctrl/Kconfig| 11 +
drivers/pinctrl/Makefile |1 +
drivers/pinctrl/pinctrl-rza2.c | 519 ++
drivers/pinctrl/sh-pfc/pfc-r8a77470.c | 678 ++-
drivers/pinctrl/sh-pfc/pfc-r8a7792.c | 22 +-
drivers/pinctrl/sh-pfc/pfc-r8a7794.c |4 +-
drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c | 97 +-
drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 119 +-
drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 122 +-
drivers/pinctrl/sh-pfc/pfc-r8a77965.c | 370
drivers/pinctrl/sh-pfc/pfc-r8a77970.c | 70 +
drivers/pinctrl/sh-pfc/pfc-r8a77980.c | 70 +
drivers/pinctrl/sh-pfc/pfc-r8a77990.c | 1934 +---
drivers/pinctrl/sh-pfc/pfc-r8a77995.c |6 -
drivers/pinctrl/sh-pfc/sh_pfc.h| 54 +-
include/dt-bindings/pinctrl/r7s9210-pinctrl.h | 47 +
18 files changed, 3841 insertions(+), 372 deletions(-)
create mode 100644
Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.txt
create mode 100644 drivers/pinctrl/pinctrl-rza2.c
create mode 100644 include/dt-bindings/pinctrl/r7s9210-pinctrl.h
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm
[git pull] clk: renesas: Updates for v4.21
Hi Mike, Stephen,
The following changes since commit 651022382c7f8da46cb4872a545ee1da6d097d2a:
Linux 4.20-rc1 (2018-11-04 15:37:52 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
tags/clk-renesas-for-v4.21-tag1
for you to fetch changes up to eb38c119dd91c61de26f67050671a84064554f7d:
clk: renesas: r7s9210: Add USB clocks (2018-11-13 09:58:51 +0100)
clk: renesas: Updates for v4.21
- Add support for SDHI and USB clocks on RZ/A2,
- Add support for RPC (SPI Multi I/O Bus Controller) clocks on R-Car
V3M.
Thanks for pulling!
Chris Brandt (2):
clk: renesas: r7s9210: Add SDHI clocks
clk: renesas: r7s9210: Add USB clocks
Sergei Shtylyov (1):
clk: renesas: r8a77970: Add RPC clocks
drivers/clk/renesas/r7s9210-cpg-mssr.c | 7 +++
drivers/clk/renesas/r8a77970-cpg-mssr.c | 4
2 files changed, 11 insertions(+)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH v7 0/2] pinctrl: Add RZ/A2 pin and gpio driver
Hi Chris,
On Thu, Nov 15, 2018 at 5:15 PM Chris Brandt wrote:
> The pin controller in the RZ/A2 is nothing like the pin controller in
> the RZ/A1. That's a good thing! This pin controller is much more simple
> and easier to configure.
>
> So, this driver is faily simple (I hope).
Thanks, qeuing in sh-pfc-for-v4.21.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
