Re: [PATCH 2/2] arm64: dts: renesas: r8a77995: Fix VSP registers range
Hi Geert,
On Friday, 8 June 2018 14:53:28 EEST Geert Uytterhoeven wrote:
> On Fri, Jun 8, 2018 at 1:18 PM Laurent Pinchart wrote:
> > The R8A77995 VSP and FCP nodes have overlapping register ranges, as the
> > SoC integrates the FCP devices in the memory range usually used by the
> > VSP LUT and CLUT, which are not present. Fix this by shortening the VSP
> > registers range to 0x5000.
>
> According to datasheet rev. 1.00, the CLUT is present on R-Car D3, the
> LUT is not.
That was a typo, the commit message should have mentioned CLU, not CLUT. I've
sent a v2 that fixes this and covers the H3 and M3* SoCs.
> > Fixes: 295952a183d3 ("arm64: dts: renesas: r8a77995: add VSP instances")
> > Reported-by: Simon Horman
> > Reported-by: Geert Uytterhoeven
> > Signed-off-by: Laurent Pinchart
> >
>
> Apart from my comment above:
> Reviewed-by: Geert Uytterhoeven
--
Regards,
Laurent Pinchart
Re: [PATCH 2/2] arm64: dts: renesas: r8a77995: Fix VSP registers range
Hi Laurent,
Thanks for your patch!
On Fri, Jun 8, 2018 at 1:18 PM Laurent Pinchart
wrote:
> The R8A77995 VSP and FCP nodes have overlapping register ranges, as the
> SoC integrates the FCP devices in the memory range usually used by the
> VSP LUT and CLUT, which are not present. Fix this by shortening the VSP
> registers range to 0x5000.
According to datasheet rev. 1.00, the CLUT is present on R-Car D3, the
LUT is not.
> Fixes: 295952a183d3 ("arm64: dts: renesas: r8a77995: add VSP instances")
> Reported-by: Simon Horman
> Reported-by: Geert Uytterhoeven
> Signed-off-by: Laurent Pinchart
Apart from my comment above:
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
[PATCH 2/2] arm64: dts: renesas: r8a77995: Fix VSP registers range
The R8A77995 VSP and FCP nodes have overlapping register ranges, as the
SoC integrates the FCP devices in the memory range usually used by the
VSP LUT and CLUT, which are not present. Fix this by shortening the VSP
registers range to 0x5000.
Fixes: 295952a183d3 ("arm64: dts: renesas: r8a77995: add VSP instances")
Reported-by: Simon Horman
Reported-by: Geert Uytterhoeven
Signed-off-by: Laurent Pinchart
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index eb23c85c561b..49ca64285092 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -704,7 +704,7 @@
vspbs: vsp@fe96 {
compatible = "renesas,vsp2";
- reg = <0 0xfe96 0 0x8000>;
+ reg = <0 0xfe96 0 0x5000>;
interrupts = ;
clocks = < CPG_MOD 627>;
power-domains = < R8A77995_PD_ALWAYS_ON>;
@@ -714,7 +714,7 @@
vspd0: vsp@fea2 {
compatible = "renesas,vsp2";
- reg = <0 0xfea2 0 0x8000>;
+ reg = <0 0xfea2 0 0x5000>;
interrupts = ;
clocks = < CPG_MOD 623>;
power-domains = < R8A77995_PD_ALWAYS_ON>;
@@ -724,7 +724,7 @@
vspd1: vsp@fea28000 {
compatible = "renesas,vsp2";
- reg = <0 0xfea28000 0 0x8000>;
+ reg = <0 0xfea28000 0 0x5000>;
interrupts = ;
clocks = < CPG_MOD 622>;
power-domains = < R8A77995_PD_ALWAYS_ON>;
--
Regards,
Laurent Pinchart
