[GIT PULL] Samsung usb stuff for v3.5
Hi Greg and Felipe, Please pull Samsung 's3c-hsotg' UDC support for EXYNOS4210 and S5PV210 from: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git v3.5-for-usb Since it has a dependency on 'usb: hsotg: samsung ...' patches which have been already in usb tree now, so would be better if you could pull this series in your tree. Or this can be sent to upstream in the end of upcoming merge window after pulling usb tree. But I think usb tree is better in this case. If any problems, please kindly let me know. Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. The following changes since commit 36be50515fe2aef61533b516fa2576a2c7fe7664: Linux 3.4-rc7 (2012-05-12 18:37:47 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git v3.5-for-usb Joonyoung Shim (1): ARM: EXYNOS: Add s3c-hsotg device support for NURI board Lukasz Majewski (3): ARM: EXYNOS: Add usb otg phy control for EXYNOS4210 ARM: EXYNOS: Add s3c-hsotg device support for GONI board ARM: EXYNOS: Add s3c-hsotg device support for Universal C210 board arch/arm/mach-exynos/Kconfig |3 + arch/arm/mach-exynos/include/mach/irqs.h |1 + arch/arm/mach-exynos/include/mach/map.h |4 + arch/arm/mach-exynos/include/mach/regs-pmu.h |3 + arch/arm/mach-exynos/mach-nuri.c |9 ++- arch/arm/mach-exynos/mach-universal_c210.c | 10 +++ arch/arm/mach-exynos/setup-usb-phy.c | 100 ++--- arch/arm/mach-s5pv210/Kconfig|1 + arch/arm/mach-s5pv210/mach-goni.c|5 ++ 9 files changed, 107 insertions(+), 29 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [GIT PULL] Samsung devel-2 for v3.5
Sachin Kamat wrote: Hi Arnd, Thomas has posted a patch [1] (available on Grant's tree) to fix this problem. [1] http://git.secretlab.ca/?p=linux- 2.6.git;a=commitdiff;h=766644d2df254934d656a0a0628b636212c24f9e;hp=0034102 808e0dbbf3a2394b82b1bb40b5778de9e Yeah, I know that. But in this case, the Arnd's patch looks better to me and this helps to avoid build error in current arm-soc. I think, we can cleanup #ifdef CONFIG_OF in mach-exynos/ when we move on supporting DT for all of EXYNOS next time. Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v2] serial: samsung: Fixed wrong comparison for baudclk_rate
Russell King - ARM Linux wrote:
On Tue, May 15, 2012 at 09:37:16PM +0900, Kyoungil Kim wrote:
port-baudclk_rate should be compared to the rate of port-baudclk,
because port-baudclk_rate was assigned as the rate of port-baudclk
previously.
So to check that the current baudclk rate is same as previous rate,
the target of comparison sholud be the rate of port-baudclk.
Signed-off-by: Jun-Ho, Yoon junho78.y...@samsung.com
Signed-off-by: Kyoungil Kim ki0351@samsung.com
---
drivers/tty/serial/samsung.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index d8b0aee..6a6a86a 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -1014,10 +1014,10 @@ static int
s3c24xx_serial_cpufreq_transition(struct notifier_block *nb,
* a disturbance in the clock-rate over the change.
*/
- if (IS_ERR(port-clk))
+ if (IS_ERR(port-baudclk) || port-baudclk == NULL)
Still no. Why are you wanting to detect a NULL baud clock?
As I said, drivers have no business interpreting anything but IS_ERR(clk)
as being an error. They should not make any other assumptions.
Now that I look at this driver, it makes this mistake all over the place.
This needs to be fixed. Something like the below should do it. Please
check.
Russell, thanks for your kindly pointing out.
Kyoungil, could you please re-submit for this as per Russell's suggestion
(with Russell's patch)?
Thanks.
Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index d8b0aee..6a952b1 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -529,7 +529,7 @@ static void s3c24xx_serial_pm(struct uart_port *port,
unsigned int level,
switch (level) {
case 3:
- if (!IS_ERR(ourport-baudclk) ourport-baudclk != NULL)
+ if (!IS_ERR(ourport-baudclk))
clk_disable(ourport-baudclk);
clk_disable(ourport-clk);
@@ -538,7 +538,7 @@ static void s3c24xx_serial_pm(struct uart_port *port,
unsigned int level,
case 0:
clk_enable(ourport-clk);
- if (!IS_ERR(ourport-baudclk) ourport-baudclk != NULL)
+ if (!IS_ERR(ourport-baudclk))
clk_enable(ourport-baudclk);
break;
@@ -713,9 +713,9 @@ static void s3c24xx_serial_set_termios(struct
uart_port *port,
if (ourport-baudclk != clk) {
s3c24xx_serial_setsource(port, clk_sel);
- if (ourport-baudclk != NULL !IS_ERR(ourport-baudclk)) {
+ if (!IS_ERR(ourport-baudclk)) {
clk_disable(ourport-baudclk);
- ourport-baudclk = NULL;
+ ourport-baudclk = ERR_PTR(-EINVAL);
}
clk_enable(clk);
@@ -1160,6 +1160,9 @@ static ssize_t s3c24xx_serial_show_clksrc(struct
device *dev,
struct uart_port *port = s3c24xx_dev_to_port(dev);
struct s3c24xx_uart_port *ourport = to_ourport(port);
+ if (IS_ERR(ourport-baudclk))
+ return -EINVAL;
+
return snprintf(buf, PAGE_SIZE, * %s\n, ourport-baudclk-name);
}
@@ -1200,6 +1203,7 @@ static int s3c24xx_serial_probe(struct
platform_device *pdev)
return -ENODEV;
}
+ ourport-baudclk = ERR_PTR(-EINVAL);
ourport-info = ourport-drv_data-info;
ourport-cfg = (pdev-dev.platform_data) ?
(struct s3c2410_uartcfg *)pdev-dev.platform_data :
--
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RE: [PATCH 0/2] ARM: S3C64xx: cpuidle cleanups
Daniel Lezcano wrote: These couple of patches use the new cpuidle core api to refactor some part of the code. The first one declares the states directly in the driver declaration and the second one use the timekeeping flag to let the cpuidle core to compute the idle time. Basically, looks ok to me. I don't have this board, I was not able to test these patches. Mark, could you please check this patches on your board? Now, my smdk6410 has some problem to test this :( Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. Daniel Lezcano (2): ARM: s3c64xx: cpuidle - declare the states with the new api ARM: s3c64xx: cpuidle - use timekeeping wrapper arch/arm/mach-s3c64xx/cpuidle.c | 45 +-- 1 files changed, 15 insertions(+), 30 deletions(-) -- 1.7.5.4 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/3] ADD HSOTG support to SMDK and Origen boards
This patch series is based on Kukjin Kim's v3.5-for-usb tree. Sachin Kamat (3): ARM: EXYNOS: Add HSOTG support to Origen ARM: EXYNOS: Add HSOTG device to SMDKV310 ARM: S5PV210: Add HSOTG support to SMDKV210 arch/arm/mach-exynos/Kconfig |2 ++ arch/arm/mach-exynos/mach-origen.c|6 ++ arch/arm/mach-exynos/mach-smdkv310.c |6 ++ arch/arm/mach-s5pv210/Kconfig |2 ++ arch/arm/mach-s5pv210/mach-smdkv210.c |8 5 files changed, 24 insertions(+), 0 deletions(-) -- 1.7.4.1 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3] ARM: EXYNOS: Add HSOTG support to Origen
S3C-HSOTG device is added to Origen board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
arch/arm/mach-exynos/Kconfig |1 +
arch/arm/mach-exynos/mach-origen.c |6 ++
2 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 6919e23..4bc13f4 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -312,6 +312,7 @@ config MACH_ORIGEN
select S3C_DEV_WDT
select S3C_DEV_HSMMC
select S3C_DEV_HSMMC2
+ select S3C_DEV_USB_HSOTG
select S5P_DEV_FIMC0
select S5P_DEV_FIMC1
select S5P_DEV_FIMC2
diff --git a/arch/arm/mach-exynos/mach-origen.c
b/arch/arm/mach-exynos/mach-origen.c
index 878d4c9..aa35bfe 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -21,6 +21,7 @@
#include linux/mfd/max8997.h
#include linux/lcd.h
#include linux/rfkill-gpio.h
+#include linux/platform_data/s3c-hsotg.h
#include asm/mach/arch.h
#include asm/hardware/gic.h
@@ -500,6 +501,9 @@ static void __init origen_ohci_init(void)
exynos4_ohci_set_platdata(pdata);
}
+/* USB OTG */
+static struct s3c_hsotg_plat origen_hsotg_pdata;
+
static struct gpio_keys_button origen_gpio_keys_table[] = {
{
.code = KEY_MENU,
@@ -628,6 +632,7 @@ static struct platform_device *origen_devices[] __initdata
= {
s3c_device_hsmmc0,
s3c_device_i2c0,
s3c_device_rtc,
+ s3c_device_usb_hsotg,
s3c_device_wdt,
s5p_device_ehci,
s5p_device_fimc0,
@@ -714,6 +719,7 @@ static void __init origen_machine_init(void)
origen_ehci_init();
origen_ohci_init();
+ s3c_hsotg_set_platdata(origen_hsotg_pdata);
clk_xusbxti.rate = 2400;
s5p_tv_setup();
--
1.7.4.1
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[PATCH 2/3] ARM: EXYNOS: Add HSOTG support to SMDKV310
S3C-HSOTG device is added to SMDKV310 board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/mach-exynos/Kconfig |1 +
arch/arm/mach-exynos/mach-smdkv310.c |6 ++
2 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 4bc13f4..9928f3d 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -199,6 +199,7 @@ config MACH_SMDKV310
select S3C_DEV_HSMMC1
select S3C_DEV_HSMMC2
select S3C_DEV_HSMMC3
+ select S3C_DEV_USB_HSOTG
select SAMSUNG_DEV_BACKLIGHT
select EXYNOS4_DEV_AHCI
select SAMSUNG_DEV_KEYPAD
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c
b/arch/arm/mach-exynos/mach-smdkv310.c
index 83b91fa..b7a6360 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -19,6 +19,7 @@
#include linux/i2c.h
#include linux/input.h
#include linux/pwm_backlight.h
+#include linux/platform_data/s3c-hsotg.h
#include asm/mach/arch.h
#include asm/hardware/gic.h
@@ -256,6 +257,9 @@ static void __init smdkv310_ohci_init(void)
exynos4_ohci_set_platdata(pdata);
}
+/* USB OTG */
+static struct s3c_hsotg_plat smdkv310_hsotg_pdata;
+
static struct platform_device *smdkv310_devices[] __initdata = {
s3c_device_hsmmc0,
s3c_device_hsmmc1,
@@ -264,6 +268,7 @@ static struct platform_device *smdkv310_devices[]
__initdata = {
s3c_device_i2c1,
s5p_device_i2c_hdmiphy,
s3c_device_rtc,
+ s3c_device_usb_hsotg,
s3c_device_wdt,
s5p_device_ehci,
s5p_device_fimc0,
@@ -368,6 +373,7 @@ static void __init smdkv310_machine_init(void)
smdkv310_ehci_init();
smdkv310_ohci_init();
+ s3c_hsotg_set_platdata(smdkv310_hsotg_pdata);
clk_xusbxti.rate = 2400;
platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
--
1.7.4.1
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[PATCH 3/3] ARM: S5PV210: Add HSOTG support to SMDKV210
Adds S3C-HSOTG support to SMDKV210 board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/mach-s5pv210/Kconfig |2 ++
arch/arm/mach-s5pv210/mach-smdkv210.c |8
2 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 88e983b..77185c3 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -152,6 +152,7 @@ config MACH_SMDKV210
select S3C_DEV_I2C1
select S3C_DEV_I2C2
select S3C_DEV_RTC
+ select S3C_DEV_USB_HSOTG
select S3C_DEV_WDT
select S5P_DEV_FIMC0
select S5P_DEV_FIMC1
@@ -170,6 +171,7 @@ config MACH_SMDKV210
select S5PV210_SETUP_IDE
select S5PV210_SETUP_KEYPAD
select S5PV210_SETUP_SDHCI
+ select S5PV210_SETUP_USB_PHY
help
Machine support for Samsung SMDKV210
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c
b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 91d4ad8..0041045 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -19,6 +19,7 @@
#include linux/gpio.h
#include linux/delay.h
#include linux/pwm_backlight.h
+#include linux/platform_data/s3c-hsotg.h
#include asm/hardware/vic.h
#include asm/mach/arch.h
@@ -210,6 +211,9 @@ static struct s3c_fb_platdata smdkv210_lcd0_pdata
__initdata = {
.setup_gpio = s5pv210_fb_gpio_setup_24bpp,
};
+/* USB OTG */
+static struct s3c_hsotg_plat smdkv210_hsotg_pdata;
+
static struct platform_device *smdkv210_devices[] __initdata = {
s3c_device_adc,
s3c_device_cfcon,
@@ -223,6 +227,7 @@ static struct platform_device *smdkv210_devices[]
__initdata = {
s3c_device_i2c2,
s3c_device_rtc,
s3c_device_ts,
+ s3c_device_usb_hsotg,
s3c_device_wdt,
s5p_device_fimc0,
s5p_device_fimc1,
@@ -321,6 +326,9 @@ static void __init smdkv210_machine_init(void)
samsung_bl_set(smdkv210_bl_gpio_info, smdkv210_bl_data);
+ s3c_hsotg_set_platdata(smdkv210_hsotg_pdata);
+ clk_xusbxti.rate = 2400;
+
platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
}
--
1.7.4.1
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Re: [PATCH 1/2] ARM: s3c64xx: cpuidle - declare the states with the new api
On Mon, May 14, 2012 at 04:06:16PM +0200, Daniel Lezcano wrote: The states are now part of the cpuidle_driver structure, so we can declare the states in this structure directly. That saves us an extra variable declaration and a memcpy. Tested-by: Mark Brown broo...@opensource.wolfsonmicro.com signature.asc Description: Digital signature
Re: [PATCH 2/2] ARM: s3c64xx: cpuidle - use timekeeping wrapper
On Mon, May 14, 2012 at 04:06:17PM +0200, Daniel Lezcano wrote: The timekeeping is computed from the cpuidle core if we set the .en_core_tk_irqen flag. Let's use it and remove the duplicated code. Tested-by: Mark Brown broo...@opensource.wolfsonmicro.com signature.asc Description: Digital signature
Re: [PATCH] mmc: dw_mmc: Fixed sdio interrupt mask bit setting bug
Hi, On Mon, May 14 2012, Will Newton wrote: On Mon, May 14, 2012 at 9:38 AM, Kyoungil Kim ki0351@samsung.com wrote: The sdio interrupt mask bits are arranged in [31:16]. (1 SDMMC_INT_SDIO(slot-id))) does 16 bits left shift twice. So this patch changes to do 16 bits left shift only one time. Signed-off-by: Kyoungil Kim ki0351@samsung.com --- drivers/mmc/host/dw_mmc.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Yes, looks correct. Acked-by: Will Newton will.new...@imgtec.com Thanks, pushed to mmc-next for 3.5. - Chris. -- Chris Ball c...@laptop.org http://printf.net/ One Laptop Per Child -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 0/2] regulator: Add initial suport for max77686
This patch series adds support for max77686 which is a multifunction device which includes regulator (pmic), rtc and charger sub-blocks within it. The support for mfd driver and regulator driver are added by this patch series. This patch series also includes device tree and irqdomain support for mfd and regulator portions. Implemented the required modification, stated in the recieved review comments. changes since V1: -added regmap support. -implemented .get_voltage_sel, .set_voltage_sel and .set_voltage_time_sel after removing .get_voltage and .set_voltage in regulator driver. -used of_regulator_match() for parsing DT. -added Documentation for Devive Tree binding. This patch series is based on mark_regulator/for-next and has been tested on GAIA board. Yadwinder Singh Brar (2): mfd: Add support for MAX77686. regulator: Add support for MAX77686. Documentation/devicetree/bindings/mfd/max77686.txt | 63 +++ drivers/mfd/Kconfig| 21 + drivers/mfd/Makefile |1 + drivers/mfd/max77686-irq.c | 255 ++ drivers/mfd/max77686.c | 322 drivers/regulator/Kconfig |9 + drivers/regulator/Makefile |1 + drivers/regulator/max77686.c | 512 include/linux/mfd/max77686-private.h | 282 +++ include/linux/mfd/max77686.h | 100 10 files changed, 1566 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/mfd/max77686.txt create mode 100644 drivers/mfd/max77686-irq.c create mode 100644 drivers/mfd/max77686.c create mode 100644 drivers/regulator/max77686.c create mode 100644 include/linux/mfd/max77686-private.h create mode 100644 include/linux/mfd/max77686.h -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 2/2] regulator: Add support for MAX77686.
Add support for PMIC/regulator portion of MAX77686 multifunction device.
MAX77686 provides LDOs[1-26] and BUCKs[1-9]. This is initial release of driver
which supports setting and getting the voltage of a regulator with I2C
interface.
Signed-off-by: Yadwinder Singh Brar yadi.b...@samsung.com
---
drivers/regulator/Kconfig|9 +
drivers/regulator/Makefile |1 +
drivers/regulator/max77686.c | 512 ++
3 files changed, 522 insertions(+), 0 deletions(-)
create mode 100644 drivers/regulator/max77686.c
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 4ad4e8d..a41d2cf 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -195,6 +195,15 @@ config REGULATOR_MAX8998
via I2C bus. The provided regulator is suitable for S3C6410
and S5PC1XX chips to control VCC_CORE and VCC_USIM voltages.
+config REGULATOR_MAX77686
+ tristate Maxim 77686 regulator
+ depends on MFD_MAX77686
+ help
+ This driver controls a Maxim 77686 voltage regulator via I2C
+ bus. The provided regulator is suitable for Exynos5 chips to
+ control VDD_ARM and VDD_INT voltages.It supports LDOs[1-26]
+ and BUCKs[1-9].
+
config REGULATOR_PCAP
tristate Motorola PCAP2 regulator driver
depends on EZX_PCAP
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index dcc56dc..949b1f2 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -30,6 +30,7 @@ obj-$(CONFIG_REGULATOR_MAX8925) += max8925-regulator.o
obj-$(CONFIG_REGULATOR_MAX8952) += max8952.o
obj-$(CONFIG_REGULATOR_MAX8997) += max8997.o
obj-$(CONFIG_REGULATOR_MAX8998) += max8998.o
+obj-$(CONFIG_REGULATOR_MAX77686) += max77686.o
obj-$(CONFIG_REGULATOR_MC13783) += mc13783-regulator.o
obj-$(CONFIG_REGULATOR_MC13892) += mc13892-regulator.o
obj-$(CONFIG_REGULATOR_MC13XXX_CORE) += mc13xxx-regulator-core.o
diff --git a/drivers/regulator/max77686.c b/drivers/regulator/max77686.c
new file mode 100644
index 000..7379c29
--- /dev/null
+++ b/drivers/regulator/max77686.c
@@ -0,0 +1,512 @@
+/*
+ * max77686.c - Regulator driver for the Maxim 77686
+ *
+ * Copyright (C) 2012 Samsung Electronics Co. Ltd.
+ * Chiwoong Byun woong.b...@samsung.com
+ * Yadwinder Singh Brar yadi.b...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * This driver is based on max8997.c
+ */
+
+#include linux/module.h
+#include linux/bug.h
+#include linux/delay.h
+#include linux/err.h
+#include linux/gpio.h
+#include linux/slab.h
+#include linux/platform_device.h
+#include linux/regulator/driver.h
+#include linux/regulator/machine.h
+#include linux/regulator/of_regulator.h
+#include linux/mfd/max77686.h
+#include linux/mfd/max77686-private.h
+
+#define RAMP_VALUE (max77686-ramp_delay 6)
+
+struct max77686_data {
+ struct device *dev;
+ struct max77686_dev *iodev;
+ int num_regulators;
+ struct regulator_dev **rdev;
+ int ramp_delay; /* index of ramp_delay */
+
+ /*GPIO-DVS feature is not enabled with the
+*current version of MAX77686 driver.*/
+};
+
+static int max77686_get_enable_register(struct regulator_dev *rdev,
+ int *reg, int *mask, int *pattern)
+{
+ int rid = rdev_get_id(rdev);
+
+ switch (rid) {
+ case MAX77686_LDO1...MAX77686_LDO26:
+ *reg = MAX77686_REG_LDO1CTRL1 + (rid - MAX77686_LDO1);
+ *mask = 0xc0;
+ *pattern = 0xc0;
+ break;
+ case MAX77686_BUCK1:
+ *reg = MAX77686_REG_BUCK1CTRL;
+ *mask = 0x03;
+ *pattern = 0x03;
+ break;
+ case MAX77686_BUCK2:
+ *reg = MAX77686_REG_BUCK2CTRL1;
+ *mask = 0x30;
+ *pattern = 0x10;
+ break;
+ case MAX77686_BUCK3:
+ *reg = MAX77686_REG_BUCK3CTRL1;
+ *mask = 0x30;
+ *pattern = 0x10;
+ break;
+ case MAX77686_BUCK4:
+ *reg = MAX77686_REG_BUCK4CTRL1;
+ *mask = 0x30;
+ *pattern = 0x10;
+ break;
+ case MAX77686_BUCK5...MAX77686_BUCK9:
+ *reg =
[PATCH v2 1/2] mfd: Add support for MAX77686.
MAX77686 is a mulitifunction device with PMIC, RTC and Charger on chip. This
driver provides common support for accessing the device. This is initial
version of this driver that supports to enable the chip with its primary I2C
bus.It also includes IRQ and device tree support for MAX77686 chip.
Signed-off-by: Yadwinder Singh Brar yadi.b...@samsung.com
---
Documentation/devicetree/bindings/mfd/max77686.txt | 63
drivers/mfd/Kconfig| 21 ++
drivers/mfd/Makefile |1 +
drivers/mfd/max77686-irq.c | 255
drivers/mfd/max77686.c | 322
include/linux/mfd/max77686-private.h | 282 +
include/linux/mfd/max77686.h | 100 ++
7 files changed, 1044 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mfd/max77686.txt
create mode 100644 drivers/mfd/max77686-irq.c
create mode 100644 drivers/mfd/max77686.c
create mode 100644 include/linux/mfd/max77686-private.h
create mode 100644 include/linux/mfd/max77686.h
diff --git a/Documentation/devicetree/bindings/mfd/max77686.txt
b/Documentation/devicetree/bindings/mfd/max77686.txt
new file mode 100644
index 000..72e7933
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/max77686.txt
@@ -0,0 +1,63 @@
+Maxim MAX77686 multi-function device
+
+MAX77686 is a Mulitifunction device with PMIC, RTC and Charger on chip. It is
+interfaced to host controller using i2c interface. PMIC and Charger submodules
+are addressed using same i2c slave address where as RTC submodule uses
+different slave address,presently for which we are statically creating i2c
+client while probing.This document describes the binding for mfd device and
+PMIC submodule.
+
+Required properties:
+- compatible : Must be maxim,max77686;
+- reg : Specifiec the i2c slave address of PMIC block.
+- interrupts : This i2c device has an IRQ line connected to the main SoC.
+- interrupt-parent : The parent interrupt controller.
+
+Optional node:
+- max77686,buck_ramp_delay : Ramp delay to be setup for buck2,34.
+
+
+- voltage-regulators : The regulators of max77686 have to be instantiated
+ under subnode named voltage-regulators uing the following format.
+
+ regulator_name {
+ standard regulator constraints
+ };
+ refer Documentation/devicetree/bindings/regulator/regulator.txt
+
+ The names of regulator should be as follow:
+
+ -LDOn : for LDOs, where n can lie in range 1 to 26.
+ example: LDO1, LDO2, LDO26.
+ -BUCKn : for BUCKs, where n can lie in range 1 to 9.
+ example: BUCK1, BUCK5, BUCK9.
+
+
+Example:
+
+
+ max77686_pmic@09 {
+ compatible = maxim,max77686;
+ interrupt-parent = wakeup_eint;
+ interrupts = 26 0;
+ reg = 0x09;
+
+ max77686,buck_ramp_delay = 2; /* default */
+
+ voltage-regulators {
+ ldo11_reg: LDO11 {
+ regulator-name = vdd_ldo11;
+ regulator-min-microvolt = 190;
+ regulator-max-microvolt = 190;
+ regulator-always-on;
+ };
+
+ buck1_reg: BUCK1 {
+ regulator-name = vdd_mif;
+ regulator-min-microvolt = 95;
+ regulator-max-microvolt = 130;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+ }
+
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 29f463c..06a0a85 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -434,6 +434,27 @@ config MFD_MAX8998
additional drivers must be enabled in order to use the functionality
of the device.
+config MFD_MAX77686
+ bool Maxim Semiconductor MAX77686 PMIC Support
+ depends on I2C=y GENERIC_HARDIRQS
+ select MFD_CORE
+ select REGMAP_I2C
+ help
+ Say yes here to support for Maxim Semiconductor MAX77686.
+ This is a Power Management IC with RTC on chip.
+ This driver provides common support for accessing the device;
+ additional drivers must be enabled in order to use the functionality
+ of the device.
+
+config DEBUG_MAX77686
+ bool MAX77686 PMIC debugging
+ depends on MFD_MAX77686
+ help
+ Say yes, if you need enable debug messages in
+ MFD_MAX77686 driver.
+ Further for enabling/disabling particular type of debug
+ messages set max77686_debug_mask accordingly.
+
config MFD_S5M_CORE
bool SAMSUNG S5M Series Support
depends on I2C=y GENERIC_HARDIRQS
diff --git
[PATCH v2 0/6] mmc: dw_mmc: add support for device tree based instantiation
This patch series is the second version of the patches that adds device tree support for Synopsis Designware Mobile Storage Host Controller. The first patch converts the copy of controller device instance into a reference. This is need to allow device resource management api to correctly manage the resources allocated by the driver. The second patch fixes the incorrect abort of the probe in case a slot initialization fails. This is fixed by allowing as many slots to be initialized successfully and failing only if there are no slots that were initialized. The third patch adds clock lookup in the driver and this is optional. Platforms that do not need any clock gating and control for the dw_mmc controllers will not be affected with this change. The fourth patch adds a quirk to notify the controller about the absence of the write protect line. The fifth patch adds device tree based discovery support for the dw_mmc driver. The sixth patch add Samsung Exynos5250 specific extentions to the driver. Thomas Abraham (6): mmc: dw_mmc: convert copy of struct device in struct dw_mci to a reference mmc: dw_mmc: allow probe to succeed even if one slot is initialized mmc: dw_mmc: lookup for optional biu and ciu clocks mmc: dw_mmc: add quirk to indicate missing write protect line mmc: dw_mmc: add device tree support mmc: dw_mmc: add samsung exynos5250 specific extentions .../devicetree/bindings/mmc/synposis-dw-mshc.txt | 139 drivers/mmc/host/dw_mmc-pltfm.c| 41 +++- drivers/mmc/host/dw_mmc.c | 362 +--- drivers/mmc/host/dw_mmc.h | 23 ++ include/linux/mmc/dw_mmc.h | 17 +- 5 files changed, 530 insertions(+), 52 deletions(-) create mode 100644 Documentation/devicetree/bindings/mmc/synposis-dw-mshc.txt -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/3] ARM: dts: Add nodes for dw_mmc controllers for Samsung Exynos5250 platforms
Add device nodes for the four instances of dw_mmc controllers in Exynos5250
and enable instance 0 and 2 for the smdk5250 board.
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
arch/arm/boot/dts/exynos5250-smdk5250.dts | 59 +
arch/arm/boot/dts/exynos5250.dtsi | 32 +++
2 files changed, 91 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index dbc4bdb..ac408c8 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -16,6 +16,13 @@
model = SAMSUNG SMDK5250 board based on EXYNOS5250;
compatible = samsung,smdk5250, samsung,exynos5250;
+ aliases {
+ mshc0 = mshc_0;
+ mshc1 = mshc_1;
+ mshc2 = mshc_2;
+ mshc3 = mshc_3;
+ };
+
memory {
reg = 0x4000 0x8000;
};
@@ -86,4 +93,56 @@
i2c@12CD {
status = disabled;
};
+
+ mshc_0: dwmmc0@1220 {
+ num-slots = 1;
+ supports-highspeed;
+ card-detection-broken;
+ no-write-protect;
+ fifo-depth = 0x80;
+ card-detect-delay = 200;
+ samsung,dw-mshc-sdr-timing = 2 3 3;
+ samsung,dw-mshc-ddr-timing = 1 2 3;
+
+ slot@0 {
+ reg = 0;
+ bus-width = 8;
+ cd-gpios = gpc0 2 2 3 3;
+ gpios = gpc0 0 2 0 3, gpc0 1 2 0 3,
+ gpc1 0 2 3 3, gpc1 1 2 3 3,
+ gpc1 2 2 3 3, gpc1 3 2 3 3,
+ gpc0 3 2 3 3, gpc0 4 2 3 3,
+ gpc0 5 2 3 3, gpc0 6 2 3 3;
+ };
+ };
+
+ mshc_1: dwmmc1@1221 {
+ status = disabled;
+ };
+
+ mshc_2: dwmmc2@1222 {
+ num-slots = 1;
+ supports-highspeed;
+ card-detection-broken;
+ no-write-protect;
+ fifo-depth = 0x80;
+ card-detect-delay = 200;
+ samsung,dw-mshc-sdr-timing = 2 3 3;
+ samsung,dw-mshc-ddr-timing = 1 2 3;
+
+ slot@0 {
+ reg = 0;
+ bus-width = 4;
+ cd-gpios = gpc3 2 2 3 3;
+ gpios = gpc3 0 2 0 3, gpc3 1 2 0 3,
+ gpc3 3 2 3 3, gpc3 4 2 3 3,
+ gpc3 5 2 3 3, gpc3 6 2 3 3,
+ gpc4 3 3 3 3, gpc4 3 3 3 3,
+ gpc4 5 3 3 3, gpc4 6 3 3 3;
+ };
+ };
+
+ mshc_3: dwmmc3@1223 {
+ status = disabled;
+ };
};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index af12491..a6a497f 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -169,6 +169,38 @@
interrupts = 0 63 0;
};
+ dwmmc0@1220 {
+ compatible = samsung,exynos5250-dw-mshc;
+ reg = 0x1220 0x1000;
+ interrupts = 0 75 0;
+ #address-cells = 1;
+ #size-cells = 0;
+ };
+
+ dwmmc1@1221 {
+ compatible = samsung,exynos5250-dw-mshc;
+ reg = 0x1221 0x1000;
+ interrupts = 0 76 0;
+ #address-cells = 1;
+ #size-cells = 0;
+ };
+
+ dwmmc2@1222 {
+ compatible = samsung,exynos5250-dw-mshc;
+ reg = 0x1222 0x1000;
+ interrupts = 0 77 0;
+ #address-cells = 1;
+ #size-cells = 0;
+ };
+
+ dwmmc3@1223 {
+ compatible = samsung,exynos5250-dw-mshc;
+ reg = 0x1223 0x1000;
+ interrupts = 0 78 0;
+ #address-cells = 1;
+ #size-cells = 0;
+ };
+
amba {
#address-cells = 1;
#size-cells = 1;
--
1.6.6.rc2
--
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Re: [GIT PULL] Samsung usb stuff for v3.5
On Thu, May 17, 2012 at 03:45:55PM +0900, Kukjin Kim wrote: Hi Greg and Felipe, Please pull Samsung 's3c-hsotg' UDC support for EXYNOS4210 and S5PV210 from: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git v3.5-for-usb Since it has a dependency on 'usb: hsotg: samsung ...' patches which have been already in usb tree now, so would be better if you could pull this series in your tree. Or this can be sent to upstream in the end of upcoming merge window after pulling usb tree. But I think usb tree is better in this case. If any problems, please kindly let me know. All pulled into my usb-next branch now, thanks. greg k-h -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 6/6] mmc: dw_mmc: add samsung exynos5250 specific extentions
Hi Thomas,
On 05/18/2012 12:10 AM, Thomas Abraham wrote:
The instantiation of the Synopsis Designware controller on Exynos5250
include extension for SDR and DDR specific tx/rx phase shift timing
and CIU internal divider. In addition to that, the option to skip the
command hold stage is also introduced. Add support for these Exynos5250
specfic extenstions.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
.../devicetree/bindings/mmc/synposis-dw-mshc.txt | 33 -
drivers/mmc/host/dw_mmc-pltfm.c| 15 +++
drivers/mmc/host/dw_mmc.c | 40
+++-
drivers/mmc/host/dw_mmc.h | 14 +++
include/linux/mmc/dw_mmc.h |6 +++
5 files changed, 105 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/mmc/synposis-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/synposis-dw-mshc.txt
index 3acd6c9..99b166e 100644
--- a/Documentation/devicetree/bindings/mmc/synposis-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/synposis-dw-mshc.txt
@@ -7,6 +7,8 @@ Required Properties:
* compatible: should be one of the following
- snps,dw-mshc: for controllers compliant with synopsis dw-mshc.
+ - samsung,exynos5250-dw-mshc: for controllers with Samsung
+ Exynos5250 specific extentions.
* reg: physical base address of the dw-mshc controller and size of its memory
region.
@@ -74,13 +76,40 @@ Aliases:
the following format 'mshc{n}' where n is a unique number for the alias.
+Samsung Exynos5250 specific properties:
+
+* samsung,dw-mshc-sdr-timing: Specifies the value of CUI clock divider, CIU
+ clock phase shift value in transmit mode and CIU clock phase shift value in
+ receive mode for single data rate mode operation. Refer notes of the valid
+ values below.
+
+* samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock divider, CIU
+ clock phase shift value in transmit mode and CIU clock phase shift value in
+ receive mode for double data rate mode operation. Refer notes of the valid
+ values below. The order of the cells should be
+
+- First Cell:CIU clock divider value.
+- Second Cell: CIU clock phase shift value for tx mode.
+- Third Cell:CIU clock phase shift value for rx mode.
+
+ Valid values for SDR and DDR CIU clock timing:
+
+- valid values for CIU clock divider, tx phase shift and rx phase shift
+ is 0 to 7.
+
+- When CIU clock divider value is set to 3, all possible 8 phase shift
+ values can be used.
+
+- If CIU clock divider value is 0 (that is divide by 1), both tx and rx
+ phase shift clocks should be 0.
+
Example:
The MSHC controller node can be split into two portions, SoC specific and
board specific portions as listed below.
dwmmc0@1220 {
- compatible = snps,dw-mshc;
+ compatible = samsung,exynos5250-dw-mshc;
reg = 0x1220 0x1000;
interrupts = 0 75 0;
#address-cells = 1;
@@ -94,6 +123,8 @@ Example:
no-write-protect;
fifo-depth = 0x80;
card-detect-delay = 200;
+ samsung,dw-mshc-sdr-timing = 2 3 3;
+ samsung,dw-mshc-ddr-timing = 1 2 3;
slot@0 {
reg = 0;
diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c
index 8d24f6d..900f412 100644
--- a/drivers/mmc/host/dw_mmc-pltfm.c
+++ b/drivers/mmc/host/dw_mmc-pltfm.c
@@ -27,9 +27,24 @@ static struct dw_mci_drv_data synopsis_drv_data = {
.ctrl_type = DW_MCI_TYPE_SYNOPSIS,
};
+static unsigned long exynos5250_dwmmc_caps[4] = {
+ MMC_CAP_UHS_DDR50 | MMC_CAP_1_8V_DDR |
+ MMC_CAP_8_BIT_DATA | MMC_CAP_CMD23,
+ MMC_CAP_CMD23,
+ MMC_CAP_CMD23,
+ MMC_CAP_CMD23,
+};
+
+static struct dw_mci_drv_data exynos5250_drv_data = {
+ .ctrl_type = DW_MCI_TYPE_EXYNOS5250,
+ .caps = exynos5250_dwmmc_caps,
+};
+
static const struct of_device_id dw_mci_pltfm_match[] = {
{ .compatible = snps,dw-mshc,
.data = (void *)synopsis_drv_data, },
+ { .compatible = samsung,exynos5250-dw-mshc,
+ .data = (void *)exynos5250_drv_data, },
{},
};
MODULE_DEVICE_TABLE(of, dw_mci_pltfm_match);
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 0317287..58bab5b 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -236,6 +236,7 @@ static void dw_mci_set_timeout(struct dw_mci *host)
static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command
*cmd)
{
struct mmc_data *data;
+ struct dw_mci_slot *slot = mmc_priv(mmc);
u32 cmdr;
cmd-error = -EINPROGRESS;
@@
[PATCH 1/2] ARM: EXYYNOS: Use EXYNOS4210_GPEx instead of EXYNOS4_GPEx
Also use EXYNOS4210_GPIO_Ex instead of EXYNOS4_GPIO_Ex. The GPEx gpios
exist only on Exynos4210 and there are no on Exynos4x12. Redefine them
to exact SoC name.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/include/mach/gpio.h | 32 ++--
arch/arm/mach-exynos/mach-nuri.c | 16 +++---
arch/arm/mach-exynos/mach-origen.c |6 ++--
arch/arm/mach-exynos/mach-universal_c210.c | 32 ++--
arch/arm/mach-exynos/setup-fimc.c |4 +-
drivers/gpio/gpio-samsung.c| 20
6 files changed, 55 insertions(+), 55 deletions(-)
diff --git a/arch/arm/mach-exynos/include/mach/gpio.h
b/arch/arm/mach-exynos/include/mach/gpio.h
index eb24f1e..21c9bf1 100644
--- a/arch/arm/mach-exynos/include/mach/gpio.h
+++ b/arch/arm/mach-exynos/include/mach/gpio.h
@@ -26,11 +26,11 @@
#define EXYNOS4_GPIO_C1_NR (5)
#define EXYNOS4_GPIO_D0_NR (4)
#define EXYNOS4_GPIO_D1_NR (4)
-#define EXYNOS4_GPIO_E0_NR (5)
-#define EXYNOS4_GPIO_E1_NR (8)
-#define EXYNOS4_GPIO_E2_NR (6)
-#define EXYNOS4_GPIO_E3_NR (8)
-#define EXYNOS4_GPIO_E4_NR (8)
+#define EXYNOS4210_GPIO_E0_NR (5)
+#define EXYNOS4210_GPIO_E1_NR (8)
+#define EXYNOS4210_GPIO_E2_NR (6)
+#define EXYNOS4210_GPIO_E3_NR (8)
+#define EXYNOS4210_GPIO_E4_NR (8)
#define EXYNOS4_GPIO_F0_NR (8)
#define EXYNOS4_GPIO_F1_NR (8)
#define EXYNOS4_GPIO_F2_NR (8)
@@ -67,12 +67,12 @@ enum exynos4_gpio_number {
EXYNOS4_GPIO_C1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_C0),
EXYNOS4_GPIO_D0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_C1),
EXYNOS4_GPIO_D1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D0),
- EXYNOS4_GPIO_E0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D1),
- EXYNOS4_GPIO_E1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E0),
- EXYNOS4_GPIO_E2_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E1),
- EXYNOS4_GPIO_E3_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E2),
- EXYNOS4_GPIO_E4_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E3),
- EXYNOS4_GPIO_F0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E4),
+ EXYNOS4210_GPIO_E0_START= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D1),
+ EXYNOS4210_GPIO_E1_START= EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E0),
+ EXYNOS4210_GPIO_E2_START= EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E1),
+ EXYNOS4210_GPIO_E3_START= EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E2),
+ EXYNOS4210_GPIO_E4_START= EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E3),
+ EXYNOS4_GPIO_F0_START = EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E4),
EXYNOS4_GPIO_F1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F0),
EXYNOS4_GPIO_F2_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F1),
EXYNOS4_GPIO_F3_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F2),
@@ -108,11 +108,11 @@ enum exynos4_gpio_number {
#define EXYNOS4_GPC1(_nr) (EXYNOS4_GPIO_C1_START + (_nr))
#define EXYNOS4_GPD0(_nr) (EXYNOS4_GPIO_D0_START + (_nr))
#define EXYNOS4_GPD1(_nr) (EXYNOS4_GPIO_D1_START + (_nr))
-#define EXYNOS4_GPE0(_nr) (EXYNOS4_GPIO_E0_START + (_nr))
-#define EXYNOS4_GPE1(_nr) (EXYNOS4_GPIO_E1_START + (_nr))
-#define EXYNOS4_GPE2(_nr) (EXYNOS4_GPIO_E2_START + (_nr))
-#define EXYNOS4_GPE3(_nr) (EXYNOS4_GPIO_E3_START + (_nr))
-#define EXYNOS4_GPE4(_nr) (EXYNOS4_GPIO_E4_START + (_nr))
+#define EXYNOS4210_GPE0(_nr) (EXYNOS4210_GPIO_E0_START + (_nr))
+#define EXYNOS4210_GPE1(_nr) (EXYNOS4210_GPIO_E1_START + (_nr))
+#define EXYNOS4210_GPE2(_nr) (EXYNOS4210_GPIO_E2_START + (_nr))
+#define EXYNOS4210_GPE3(_nr) (EXYNOS4210_GPIO_E3_START + (_nr))
+#define EXYNOS4210_GPE4(_nr) (EXYNOS4210_GPIO_E4_START + (_nr))
#define EXYNOS4_GPF0(_nr) (EXYNOS4_GPIO_F0_START + (_nr))
#define EXYNOS4_GPF1(_nr) (EXYNOS4_GPIO_F1_START + (_nr))
#define EXYNOS4_GPF2(_nr) (EXYNOS4_GPIO_F2_START + (_nr))
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 5784b0a..d02c429 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -264,7 +264,7 @@ static struct s3c_fb_platdata nuri_fb_pdata __initdata = {
static void nuri_lcd_power_on(struct plat_lcd_data *pd, unsigned int power)
{
- int gpio = EXYNOS4_GPE1(5);
+ int gpio = EXYNOS4210_GPE1(5);
gpio_request(gpio, LVDS_nSHDN);
gpio_direction_output(gpio, power);
@@ -273,7 +273,7 @@ static void nuri_lcd_power_on(struct plat_lcd_data *pd,
unsigned int power)
static int nuri_bl_init(struct device *dev)
{
- return gpio_request_one(EXYNOS4_GPE2(3), GPIOF_OUT_INIT_LOW,
+ return gpio_request_one(EXYNOS4210_GPE2(3), GPIOF_OUT_INIT_LOW,
LCD_LD0_EN);
}
@@ -282,14 +282,14 @@ static int nuri_bl_notify(struct device *dev, int
brightness)
if (brightness 1)
brightness = 0;
-
[PATCH 2/2] gpio/exynos: Add support for Exynos4x12 SoC
Exynos4x12 GPIO part1 and part2 layouts are different with that of
Exynos4210. So, it needs to support gpios for Exynos4x12 SoC. This
doesn't support GPVx Exynos4x12 GPIO part4 yet.
In the Exynos4x12 GPIO part1 and part2, the interval of base register
offset is 0x20 but GPF0, GPJ0, GPK0 and GPM0 ignore the 0x20 interval
and have new value. The interrupt reg offset also is about GPF0 and GPK0
too. Refer the below layout.
- Exynos4x12 GPIO Part1
GPIOBase offset Interrupt reg offset
GPA00x000 0x00
GPA10x020 0x04
GPB 0x040 0x08
GPC00x060 0x0C
GPC10x080 0x10
GPD00x0A0 0x14
GPD10x0C0 0x18
...
GPF00x180 0x30
GPF10x1A0 0x34
GPF20x1C0 0x38
GPF30x1E0 0x3C
...
GPJ00x240 0x40
GPJ10x260 0x44
- Exynos4x12 GPIO Part2
...
GPK00x040 0x08
GPK10x060 0x0C
GPK20x080 0x10
GPK30x0A0 0x14
GPL00x0C0 0x18
GPL10x0E0 0x1C
GPL20x100 0x20
GPY00x120 x
GPY10x140 x
GPY20x160 x
GPY30x180 x
GPY40x1A0 x
GPY50x1C0 x
GPY60x1E0 x
...
GPM00x260 0x24
GPM10x280 0x28
GPM20x2A0 0x2C
GPM30x2C0 0x30
GPM40x2E0 0x34
GPX00xC00 x
GPX10xC20 x
GPX20xC40 x
GPX30xC60 x
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/include/mach/gpio.h | 28 +++-
arch/arm/mach-exynos/include/mach/irqs.h |6 -
drivers/gpio/gpio-samsung.c | 334 +++---
3 files changed, 327 insertions(+), 41 deletions(-)
diff --git a/arch/arm/mach-exynos/include/mach/gpio.h
b/arch/arm/mach-exynos/include/mach/gpio.h
index 21c9bf1..2103d14 100644
--- a/arch/arm/mach-exynos/include/mach/gpio.h
+++ b/arch/arm/mach-exynos/include/mach/gpio.h
@@ -26,11 +26,13 @@
#define EXYNOS4_GPIO_C1_NR (5)
#define EXYNOS4_GPIO_D0_NR (4)
#define EXYNOS4_GPIO_D1_NR (4)
+
#define EXYNOS4210_GPIO_E0_NR (5)
#define EXYNOS4210_GPIO_E1_NR (8)
#define EXYNOS4210_GPIO_E2_NR (6)
#define EXYNOS4210_GPIO_E3_NR (8)
#define EXYNOS4210_GPIO_E4_NR (8)
+
#define EXYNOS4_GPIO_F0_NR (8)
#define EXYNOS4_GPIO_F1_NR (8)
#define EXYNOS4_GPIO_F2_NR (8)
@@ -44,6 +46,13 @@
#define EXYNOS4_GPIO_L0_NR (8)
#define EXYNOS4_GPIO_L1_NR (3)
#define EXYNOS4_GPIO_L2_NR (8)
+
+#define EXYNOS4X12_GPIO_M0_NR (8)
+#define EXYNOS4X12_GPIO_M1_NR (7)
+#define EXYNOS4X12_GPIO_M2_NR (5)
+#define EXYNOS4X12_GPIO_M3_NR (8)
+#define EXYNOS4X12_GPIO_M4_NR (8)
+
#define EXYNOS4_GPIO_X0_NR (8)
#define EXYNOS4_GPIO_X1_NR (8)
#define EXYNOS4_GPIO_X2_NR (8)
@@ -67,12 +76,20 @@ enum exynos4_gpio_number {
EXYNOS4_GPIO_C1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_C0),
EXYNOS4_GPIO_D0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_C1),
EXYNOS4_GPIO_D1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D0),
+
EXYNOS4210_GPIO_E0_START= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D1),
EXYNOS4210_GPIO_E1_START= EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E0),
EXYNOS4210_GPIO_E2_START= EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E1),
EXYNOS4210_GPIO_E3_START= EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E2),
EXYNOS4210_GPIO_E4_START= EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E3),
- EXYNOS4_GPIO_F0_START = EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E4),
+
+ EXYNOS4X12_GPIO_M0_START= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D1),
+ EXYNOS4X12_GPIO_M1_START= EXYNOS_GPIO_NEXT(EXYNOS4X12_GPIO_M0),
+ EXYNOS4X12_GPIO_M2_START= EXYNOS_GPIO_NEXT(EXYNOS4X12_GPIO_M1),
+ EXYNOS4X12_GPIO_M3_START= EXYNOS_GPIO_NEXT(EXYNOS4X12_GPIO_M2),
+ EXYNOS4X12_GPIO_M4_START= EXYNOS_GPIO_NEXT(EXYNOS4X12_GPIO_M3),
+
+ EXYNOS4_GPIO_F0_START = EXYNOS_GPIO_NEXT(EXYNOS4X12_GPIO_M4),
EXYNOS4_GPIO_F1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F0),
EXYNOS4_GPIO_F2_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F1),
EXYNOS4_GPIO_F3_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F2),
@@ -108,11 +125,13 @@ enum exynos4_gpio_number {
#define EXYNOS4_GPC1(_nr) (EXYNOS4_GPIO_C1_START + (_nr))
#define EXYNOS4_GPD0(_nr) (EXYNOS4_GPIO_D0_START + (_nr))
#define EXYNOS4_GPD1(_nr) (EXYNOS4_GPIO_D1_START + (_nr))
+
#define EXYNOS4210_GPE0(_nr) (EXYNOS4210_GPIO_E0_START + (_nr))
#define EXYNOS4210_GPE1(_nr) (EXYNOS4210_GPIO_E1_START + (_nr))
#define EXYNOS4210_GPE2(_nr) (EXYNOS4210_GPIO_E2_START + (_nr))
#define EXYNOS4210_GPE3(_nr) (EXYNOS4210_GPIO_E3_START + (_nr))
#define EXYNOS4210_GPE4(_nr) (EXYNOS4210_GPIO_E4_START + (_nr))
+
#define
Re: [PATCH v2 1/6] mmc: dw_mmc: convert copy of struct device in struct dw_mci to a reference
Hi Thomas,
I think that also need to consider for using dw_mci-pci.c.
Best Regards,
Jaehoon chung
On 05/18/2012 12:10 AM, Thomas Abraham wrote:
The 'struct dw_mci' maintains a copy of the pdev-dev instance instead of
maintaining a reference to that 'struct device' instance. Any resource
allocated using the device resource management kernel API with the instance
of 'struct device' in 'struct dw_mci' is then incorrect. Fix this by
converting the copy of 'struct device' in 'struct dw_mci' to a reference.
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
drivers/mmc/host/dw_mmc-pltfm.c |2 +-
drivers/mmc/host/dw_mmc.c | 54 +++---
include/linux/mmc/dw_mmc.h |2 +-
3 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c
index 92ec3eb..9a63299 100644
--- a/drivers/mmc/host/dw_mmc-pltfm.c
+++ b/drivers/mmc/host/dw_mmc-pltfm.c
@@ -43,7 +43,7 @@ static int dw_mci_pltfm_probe(struct platform_device *pdev)
goto err_free;
}
- host-dev = pdev-dev;
+ host-dev = pdev-dev;
host-irq_flags = 0;
host-pdata = pdev-dev.platform_data;
ret = -ENOMEM;
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 1532357..01d870a 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -266,7 +266,7 @@ static void dw_mci_start_command(struct dw_mci *host,
struct mmc_command *cmd, u32 cmd_flags)
{
host-cmd = cmd;
- dev_vdbg(host-dev,
+ dev_vdbg(host-dev,
start command: ARGR=0x%08x CMDR=0x%08x\n,
cmd-arg, cmd_flags);
@@ -308,7 +308,7 @@ static void dw_mci_dma_cleanup(struct dw_mci *host)
if (data)
if (!data-host_cookie)
- dma_unmap_sg(host-dev,
+ dma_unmap_sg(host-dev,
data-sg,
data-sg_len,
dw_mci_get_dma_dir(data));
@@ -334,7 +334,7 @@ static void dw_mci_idmac_complete_dma(struct dw_mci *host)
{
struct mmc_data *data = host-data;
- dev_vdbg(host-dev, DMA complete\n);
+ dev_vdbg(host-dev, DMA complete\n);
host-dma_ops-cleanup(host);
@@ -462,7 +462,7 @@ static int dw_mci_pre_dma_transfer(struct dw_mci *host,
return -EINVAL;
}
- sg_len = dma_map_sg(host-dev,
+ sg_len = dma_map_sg(host-dev,
data-sg,
data-sg_len,
dw_mci_get_dma_dir(data));
@@ -505,7 +505,7 @@ static void dw_mci_post_req(struct mmc_host *mmc,
return;
if (data-host_cookie)
- dma_unmap_sg(slot-host-dev,
+ dma_unmap_sg(slot-host-dev,
data-sg,
data-sg_len,
dw_mci_get_dma_dir(data));
@@ -531,7 +531,7 @@ static int dw_mci_submit_data_dma(struct dw_mci *host,
struct mmc_data *data)
host-using_dma = 1;
- dev_vdbg(host-dev,
+ dev_vdbg(host-dev,
sd sg_cpu: %#lx sg_dma: %#lx sg_len: %d\n,
(unsigned long)host-sg_cpu, (unsigned long)host-sg_dma,
sg_len);
@@ -889,12 +889,12 @@ static void dw_mci_request_end(struct dw_mci *host,
struct mmc_request *mrq)
slot = list_entry(host-queue.next,
struct dw_mci_slot, queue_node);
list_del(slot-queue_node);
- dev_vdbg(host-dev, list not empty: %s is next\n,
+ dev_vdbg(host-dev, list not empty: %s is next\n,
mmc_hostname(slot-mmc));
host-state = STATE_SENDING_CMD;
dw_mci_start_request(host, slot);
} else {
- dev_vdbg(host-dev, list empty\n);
+ dev_vdbg(host-dev, list empty\n);
host-state = STATE_IDLE;
}
@@ -1033,7 +1033,7 @@ static void dw_mci_tasklet_func(unsigned long priv)
data-bytes_xfered = 0;
data-error = -ETIMEDOUT;
} else {
- dev_err(host-dev,
+ dev_err(host-dev,
data FIFO error
(status=%08x)\n,
status);
@@ -1750,7 +1750,7 @@ static int __init dw_mci_init_slot(struct dw_mci *host,
unsigned int id)
struct mmc_host *mmc;
struct dw_mci_slot *slot;
- mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host-dev);
+ mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host-dev);
if (!mmc)
return -ENOMEM;
@@
Re: [PATCH 1/2] ARM: EXYYNOS: Use EXYNOS4210_GPEx instead of EXYNOS4_GPEx
Add to cc Grant Likely and Linus Walleij
On 05/18/2012 11:18 AM, Joonyoung Shim wrote:
Also use EXYNOS4210_GPIO_Ex instead of EXYNOS4_GPIO_Ex. The GPEx gpios
exist only on Exynos4210 and there are no on Exynos4x12. Redefine them
to exact SoC name.
Signed-off-by: Joonyoung Shimjy0922.s...@samsung.com
Signed-off-by: Kyungmin Parkkyungmin.p...@samsung.com
---
arch/arm/mach-exynos/include/mach/gpio.h | 32 ++--
arch/arm/mach-exynos/mach-nuri.c | 16 +++---
arch/arm/mach-exynos/mach-origen.c |6 ++--
arch/arm/mach-exynos/mach-universal_c210.c | 32 ++--
arch/arm/mach-exynos/setup-fimc.c |4 +-
drivers/gpio/gpio-samsung.c| 20
6 files changed, 55 insertions(+), 55 deletions(-)
diff --git a/arch/arm/mach-exynos/include/mach/gpio.h
b/arch/arm/mach-exynos/include/mach/gpio.h
index eb24f1e..21c9bf1 100644
--- a/arch/arm/mach-exynos/include/mach/gpio.h
+++ b/arch/arm/mach-exynos/include/mach/gpio.h
@@ -26,11 +26,11 @@
#define EXYNOS4_GPIO_C1_NR(5)
#define EXYNOS4_GPIO_D0_NR(4)
#define EXYNOS4_GPIO_D1_NR(4)
-#define EXYNOS4_GPIO_E0_NR (5)
-#define EXYNOS4_GPIO_E1_NR (8)
-#define EXYNOS4_GPIO_E2_NR (6)
-#define EXYNOS4_GPIO_E3_NR (8)
-#define EXYNOS4_GPIO_E4_NR (8)
+#define EXYNOS4210_GPIO_E0_NR (5)
+#define EXYNOS4210_GPIO_E1_NR (8)
+#define EXYNOS4210_GPIO_E2_NR (6)
+#define EXYNOS4210_GPIO_E3_NR (8)
+#define EXYNOS4210_GPIO_E4_NR (8)
#define EXYNOS4_GPIO_F0_NR(8)
#define EXYNOS4_GPIO_F1_NR(8)
#define EXYNOS4_GPIO_F2_NR(8)
@@ -67,12 +67,12 @@ enum exynos4_gpio_number {
EXYNOS4_GPIO_C1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_C0),
EXYNOS4_GPIO_D0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_C1),
EXYNOS4_GPIO_D1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D0),
- EXYNOS4_GPIO_E0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D1),
- EXYNOS4_GPIO_E1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E0),
- EXYNOS4_GPIO_E2_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E1),
- EXYNOS4_GPIO_E3_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E2),
- EXYNOS4_GPIO_E4_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E3),
- EXYNOS4_GPIO_F0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E4),
+ EXYNOS4210_GPIO_E0_START= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D1),
+ EXYNOS4210_GPIO_E1_START= EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E0),
+ EXYNOS4210_GPIO_E2_START= EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E1),
+ EXYNOS4210_GPIO_E3_START= EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E2),
+ EXYNOS4210_GPIO_E4_START= EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E3),
+ EXYNOS4_GPIO_F0_START = EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E4),
EXYNOS4_GPIO_F1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F0),
EXYNOS4_GPIO_F2_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F1),
EXYNOS4_GPIO_F3_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F2),
@@ -108,11 +108,11 @@ enum exynos4_gpio_number {
#define EXYNOS4_GPC1(_nr) (EXYNOS4_GPIO_C1_START + (_nr))
#define EXYNOS4_GPD0(_nr) (EXYNOS4_GPIO_D0_START + (_nr))
#define EXYNOS4_GPD1(_nr) (EXYNOS4_GPIO_D1_START + (_nr))
-#define EXYNOS4_GPE0(_nr) (EXYNOS4_GPIO_E0_START + (_nr))
-#define EXYNOS4_GPE1(_nr) (EXYNOS4_GPIO_E1_START + (_nr))
-#define EXYNOS4_GPE2(_nr) (EXYNOS4_GPIO_E2_START + (_nr))
-#define EXYNOS4_GPE3(_nr) (EXYNOS4_GPIO_E3_START + (_nr))
-#define EXYNOS4_GPE4(_nr) (EXYNOS4_GPIO_E4_START + (_nr))
+#define EXYNOS4210_GPE0(_nr) (EXYNOS4210_GPIO_E0_START + (_nr))
+#define EXYNOS4210_GPE1(_nr) (EXYNOS4210_GPIO_E1_START + (_nr))
+#define EXYNOS4210_GPE2(_nr) (EXYNOS4210_GPIO_E2_START + (_nr))
+#define EXYNOS4210_GPE3(_nr) (EXYNOS4210_GPIO_E3_START + (_nr))
+#define EXYNOS4210_GPE4(_nr) (EXYNOS4210_GPIO_E4_START + (_nr))
#define EXYNOS4_GPF0(_nr) (EXYNOS4_GPIO_F0_START + (_nr))
#define EXYNOS4_GPF1(_nr) (EXYNOS4_GPIO_F1_START + (_nr))
#define EXYNOS4_GPF2(_nr) (EXYNOS4_GPIO_F2_START + (_nr))
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 5784b0a..d02c429 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -264,7 +264,7 @@ static struct s3c_fb_platdata nuri_fb_pdata __initdata = {
static void nuri_lcd_power_on(struct plat_lcd_data *pd, unsigned int power)
{
- int gpio = EXYNOS4_GPE1(5);
+ int gpio = EXYNOS4210_GPE1(5);
gpio_request(gpio, LVDS_nSHDN);
gpio_direction_output(gpio, power);
@@ -273,7 +273,7 @@ static void nuri_lcd_power_on(struct plat_lcd_data *pd,
unsigned int power)
static int nuri_bl_init(struct device *dev)
{
- return gpio_request_one(EXYNOS4_GPE2(3), GPIOF_OUT_INIT_LOW,
+ return gpio_request_one(EXYNOS4210_GPE2(3), GPIOF_OUT_INIT_LOW,
LCD_LD0_EN);
}
@@ -282,14 +282,14 @@ static int nuri_bl_notify(struct device *dev, int
Re: [PATCH 2/2] gpio/exynos: Add support for Exynos4x12 SoC
Add to cc Grant Likely and Linus Walleij
On 05/18/2012 11:18 AM, Joonyoung Shim wrote:
Exynos4x12 GPIO part1 and part2 layouts are different with that of
Exynos4210. So, it needs to support gpios for Exynos4x12 SoC. This
doesn't support GPVx Exynos4x12 GPIO part4 yet.
In the Exynos4x12 GPIO part1 and part2, the interval of base register
offset is 0x20 but GPF0, GPJ0, GPK0 and GPM0 ignore the 0x20 interval
and have new value. The interrupt reg offset also is about GPF0 and GPK0
too. Refer the below layout.
- Exynos4x12 GPIO Part1
GPIOBase offset Interrupt reg offset
GPA00x000 0x00
GPA10x020 0x04
GPB 0x040 0x08
GPC00x060 0x0C
GPC10x080 0x10
GPD00x0A0 0x14
GPD10x0C0 0x18
...
GPF00x180 0x30
GPF10x1A0 0x34
GPF20x1C0 0x38
GPF30x1E0 0x3C
...
GPJ00x240 0x40
GPJ10x260 0x44
- Exynos4x12 GPIO Part2
...
GPK00x040 0x08
GPK10x060 0x0C
GPK20x080 0x10
GPK30x0A0 0x14
GPL00x0C0 0x18
GPL10x0E0 0x1C
GPL20x100 0x20
GPY00x120 x
GPY10x140 x
GPY20x160 x
GPY30x180 x
GPY40x1A0 x
GPY50x1C0 x
GPY60x1E0 x
...
GPM00x260 0x24
GPM10x280 0x28
GPM20x2A0 0x2C
GPM30x2C0 0x30
GPM40x2E0 0x34
GPX00xC00 x
GPX10xC20 x
GPX20xC40 x
GPX30xC60 x
Signed-off-by: Joonyoung Shimjy0922.s...@samsung.com
Signed-off-by: Kyungmin Parkkyungmin.p...@samsung.com
---
arch/arm/mach-exynos/include/mach/gpio.h | 28 +++-
arch/arm/mach-exynos/include/mach/irqs.h |6 -
drivers/gpio/gpio-samsung.c | 334 +++---
3 files changed, 327 insertions(+), 41 deletions(-)
diff --git a/arch/arm/mach-exynos/include/mach/gpio.h
b/arch/arm/mach-exynos/include/mach/gpio.h
index 21c9bf1..2103d14 100644
--- a/arch/arm/mach-exynos/include/mach/gpio.h
+++ b/arch/arm/mach-exynos/include/mach/gpio.h
@@ -26,11 +26,13 @@
#define EXYNOS4_GPIO_C1_NR(5)
#define EXYNOS4_GPIO_D0_NR(4)
#define EXYNOS4_GPIO_D1_NR(4)
+
#define EXYNOS4210_GPIO_E0_NR (5)
#define EXYNOS4210_GPIO_E1_NR (8)
#define EXYNOS4210_GPIO_E2_NR (6)
#define EXYNOS4210_GPIO_E3_NR (8)
#define EXYNOS4210_GPIO_E4_NR (8)
+
#define EXYNOS4_GPIO_F0_NR(8)
#define EXYNOS4_GPIO_F1_NR(8)
#define EXYNOS4_GPIO_F2_NR(8)
@@ -44,6 +46,13 @@
#define EXYNOS4_GPIO_L0_NR(8)
#define EXYNOS4_GPIO_L1_NR(3)
#define EXYNOS4_GPIO_L2_NR(8)
+
+#define EXYNOS4X12_GPIO_M0_NR (8)
+#define EXYNOS4X12_GPIO_M1_NR (7)
+#define EXYNOS4X12_GPIO_M2_NR (5)
+#define EXYNOS4X12_GPIO_M3_NR (8)
+#define EXYNOS4X12_GPIO_M4_NR (8)
+
#define EXYNOS4_GPIO_X0_NR(8)
#define EXYNOS4_GPIO_X1_NR(8)
#define EXYNOS4_GPIO_X2_NR(8)
@@ -67,12 +76,20 @@ enum exynos4_gpio_number {
EXYNOS4_GPIO_C1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_C0),
EXYNOS4_GPIO_D0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_C1),
EXYNOS4_GPIO_D1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D0),
+
EXYNOS4210_GPIO_E0_START= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D1),
EXYNOS4210_GPIO_E1_START= EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E0),
EXYNOS4210_GPIO_E2_START= EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E1),
EXYNOS4210_GPIO_E3_START= EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E2),
EXYNOS4210_GPIO_E4_START= EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E3),
- EXYNOS4_GPIO_F0_START = EXYNOS_GPIO_NEXT(EXYNOS4210_GPIO_E4),
+
+ EXYNOS4X12_GPIO_M0_START= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D1),
+ EXYNOS4X12_GPIO_M1_START= EXYNOS_GPIO_NEXT(EXYNOS4X12_GPIO_M0),
+ EXYNOS4X12_GPIO_M2_START= EXYNOS_GPIO_NEXT(EXYNOS4X12_GPIO_M1),
+ EXYNOS4X12_GPIO_M3_START= EXYNOS_GPIO_NEXT(EXYNOS4X12_GPIO_M2),
+ EXYNOS4X12_GPIO_M4_START= EXYNOS_GPIO_NEXT(EXYNOS4X12_GPIO_M3),
+
+ EXYNOS4_GPIO_F0_START = EXYNOS_GPIO_NEXT(EXYNOS4X12_GPIO_M4),
EXYNOS4_GPIO_F1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F0),
EXYNOS4_GPIO_F2_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F1),
EXYNOS4_GPIO_F3_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F2),
@@ -108,11 +125,13 @@ enum exynos4_gpio_number {
#define EXYNOS4_GPC1(_nr) (EXYNOS4_GPIO_C1_START + (_nr))
#define EXYNOS4_GPD0(_nr) (EXYNOS4_GPIO_D0_START + (_nr))
#define EXYNOS4_GPD1(_nr) (EXYNOS4_GPIO_D1_START + (_nr))
+
#define EXYNOS4210_GPE0(_nr) (EXYNOS4210_GPIO_E0_START + (_nr))
#define EXYNOS4210_GPE1(_nr) (EXYNOS4210_GPIO_E1_START + (_nr))
#define EXYNOS4210_GPE2(_nr) (EXYNOS4210_GPIO_E2_START + (_nr))
#define EXYNOS4210_GPE3(_nr) (EXYNOS4210_GPIO_E3_START +
[PATCH 0/2] ARM: EXYNOS: G2D clock support to Exynos4
This patch series moves the SoC specific G2D clock entries from common clock file (clock-exynos4.c) to Exynos4210 specific clock file (clock-exynos4210.c) since G2D clock registers are different in Exynos4210 and Exynos4X12 SoCs and adds support for Exynos4x12 G2D clock. This series is based on Kukjin Kim's latest for-next branch. Sachin Kamat (2): ARM: EXYNOS: Move G2D clock entries to clock-exynos4210.c file ARM: EXYNOS: Add G2D related clock entries for SMDK4X12 arch/arm/mach-exynos/clock-exynos4.c| 41 +- arch/arm/mach-exynos/clock-exynos4.h|3 ++ arch/arm/mach-exynos/clock-exynos4210.c | 37 arch/arm/mach-exynos/clock-exynos4212.c | 41 +- 4 files changed, 81 insertions(+), 41 deletions(-) -- 1.7.4.1 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] ARM: EXYNOS: Move G2D clock entries to clock-exynos4210.c file
G2D clock registers are different in Exynos4210 and Exynos4X12 SoCs.
Hence moving the SoC specific G2D clock entries from common clock file
(clock-exynos4.c) to Exynos4210 specific clock file (clock-exynos4210.c).
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/mach-exynos/clock-exynos4.c| 41 +-
arch/arm/mach-exynos/clock-exynos4.h|3 ++
arch/arm/mach-exynos/clock-exynos4210.c | 37
3 files changed, 42 insertions(+), 39 deletions(-)
diff --git a/arch/arm/mach-exynos/clock-exynos4.c
b/arch/arm/mach-exynos/clock-exynos4.c
index bcb7db4..18d59d3 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -620,10 +620,6 @@ static struct clk exynos4_init_clocks_off[] = {
.enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit= (1 27),
}, {
- .name = fimg2d,
- .enable = exynos4_clk_ip_image_ctrl,
- .ctrlbit= (1 0),
- }, {
.name = mfc,
.devname= s5p-mfc,
.enable = exynos4_clk_ip_mfc_ctrl,
@@ -819,47 +815,21 @@ static struct clk *exynos4_clkset_mout_g2d0_list[] = {
[1] = exynos4_clk_sclk_apll.clk,
};
-static struct clksrc_sources exynos4_clkset_mout_g2d0 = {
+struct clksrc_sources exynos4_clkset_mout_g2d0 = {
.sources= exynos4_clkset_mout_g2d0_list,
.nr_sources = ARRAY_SIZE(exynos4_clkset_mout_g2d0_list),
};
-static struct clksrc_clk exynos4_clk_mout_g2d0 = {
- .clk= {
- .name = mout_g2d0,
- },
- .sources = exynos4_clkset_mout_g2d0,
- .reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 0, .size = 1 },
-};
-
static struct clk *exynos4_clkset_mout_g2d1_list[] = {
[0] = exynos4_clk_mout_epll.clk,
[1] = exynos4_clk_sclk_vpll.clk,
};
-static struct clksrc_sources exynos4_clkset_mout_g2d1 = {
+struct clksrc_sources exynos4_clkset_mout_g2d1 = {
.sources= exynos4_clkset_mout_g2d1_list,
.nr_sources = ARRAY_SIZE(exynos4_clkset_mout_g2d1_list),
};
-static struct clksrc_clk exynos4_clk_mout_g2d1 = {
- .clk= {
- .name = mout_g2d1,
- },
- .sources = exynos4_clkset_mout_g2d1,
- .reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 4, .size = 1 },
-};
-
-static struct clk *exynos4_clkset_mout_g2d_list[] = {
- [0] = exynos4_clk_mout_g2d0.clk,
- [1] = exynos4_clk_mout_g2d1.clk,
-};
-
-static struct clksrc_sources exynos4_clkset_mout_g2d = {
- .sources= exynos4_clkset_mout_g2d_list,
- .nr_sources = ARRAY_SIZE(exynos4_clkset_mout_g2d_list),
-};
-
static struct clk *exynos4_clkset_mout_mfc0_list[] = {
[0] = exynos4_clk_mout_mpll.clk,
[1] = exynos4_clk_sclk_apll.clk,
@@ -1126,13 +1096,6 @@ static struct clksrc_clk exynos4_clksrcs[] = {
.reg_div = { .reg = EXYNOS4_CLKDIV_LCD0, .shift = 0, .size = 4
},
}, {
.clk= {
- .name = sclk_fimg2d,
- },
- .sources = exynos4_clkset_mout_g2d,
- .reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 8, .size = 1
},
- .reg_div = { .reg = EXYNOS4_CLKDIV_IMAGE, .shift = 0, .size = 4
},
- }, {
- .clk= {
.name = sclk_mfc,
.devname= s5p-mfc,
},
diff --git a/arch/arm/mach-exynos/clock-exynos4.h
b/arch/arm/mach-exynos/clock-exynos4.h
index 28a1197..bd12d5f 100644
--- a/arch/arm/mach-exynos/clock-exynos4.h
+++ b/arch/arm/mach-exynos/clock-exynos4.h
@@ -23,6 +23,9 @@ extern struct clksrc_sources exynos4_clkset_group;
extern struct clk *exynos4_clkset_aclk_top_list[];
extern struct clk *exynos4_clkset_group_list[];
+extern struct clksrc_sources exynos4_clkset_mout_g2d0;
+extern struct clksrc_sources exynos4_clkset_mout_g2d1;
+
extern int exynos4_clksrc_mask_fsys_ctrl(struct clk *clk, int enable);
extern int exynos4_clk_ip_fsys_ctrl(struct clk *clk, int enable);
extern int exynos4_clk_ip_lcd1_ctrl(struct clk *clk, int enable);
diff --git a/arch/arm/mach-exynos/clock-exynos4210.c
b/arch/arm/mach-exynos/clock-exynos4210.c
index b8689ff..0bf767a 100644
--- a/arch/arm/mach-exynos/clock-exynos4210.c
+++ b/arch/arm/mach-exynos/clock-exynos4210.c
@@ -48,6 +48,32 @@ static struct clksrc_clk *sysclks[] = {
/* nothing here yet */
};
+static struct clksrc_clk exynos4_clk_mout_g2d0 = {
+ .clk= {
+ .name = mout_g2d0,
+ },
+ .sources = exynos4_clkset_mout_g2d0,
+ .reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 0, .size = 1 },
+};
+
+static struct clksrc_clk exynos4_clk_mout_g2d1 = {
+ .clk= {
+ .name = mout_g2d1,
+ },
[PATCH 2/2] ARM: EXYNOS: Add G2D related clock entries for SMDK4X12
Adds G2D related clock entries for SMDK4X12 boards.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/mach-exynos/clock-exynos4212.c | 41 +-
1 files changed, 39 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-exynos/clock-exynos4212.c
b/arch/arm/mach-exynos/clock-exynos4212.c
index da397d2..fdc26ac 100644
--- a/arch/arm/mach-exynos/clock-exynos4212.c
+++ b/arch/arm/mach-exynos/clock-exynos4212.c
@@ -68,12 +68,45 @@ static struct clksrc_clk clk_mout_mpll_user = {
.reg_src= { .reg = EXYNOS4_CLKSRC_CPU, .shift = 24, .size = 1 },
};
+static struct clksrc_clk exynos4_clk_mout_g2d0 = {
+ .clk= {
+ .name = mout_g2d0,
+ },
+ .sources = exynos4_clkset_mout_g2d0,
+ .reg_src = { .reg = EXYNOS4_CLKSRC_DMC, .shift = 20, .size = 1 },
+};
+
+static struct clksrc_clk exynos4_clk_mout_g2d1 = {
+ .clk= {
+ .name = mout_g2d1,
+ },
+ .sources = exynos4_clkset_mout_g2d1,
+ .reg_src = { .reg = EXYNOS4_CLKSRC_DMC, .shift = 24, .size = 1 },
+};
+
+static struct clk *exynos4_clkset_mout_g2d_list[] = {
+ [0] = exynos4_clk_mout_g2d0.clk,
+ [1] = exynos4_clk_mout_g2d1.clk,
+};
+
+static struct clksrc_sources exynos4_clkset_mout_g2d = {
+ .sources= exynos4_clkset_mout_g2d_list,
+ .nr_sources = ARRAY_SIZE(exynos4_clkset_mout_g2d_list),
+};
+
static struct clksrc_clk *sysclks[] = {
clk_mout_mpll_user,
};
static struct clksrc_clk clksrcs[] = {
- /* nothing here yet */
+ {
+ .clk= {
+ .name = sclk_fimg2d,
+ },
+ .sources = exynos4_clkset_mout_g2d,
+ .reg_src = { .reg = EXYNOS4_CLKSRC_DMC, .shift = 28, .size = 1
},
+ .reg_div = { .reg = EXYNOS4_CLKDIV_DMC1, .shift = 0, .size = 4
},
+ },
};
static struct clk init_clocks_off[] = {
@@ -102,7 +135,11 @@ static struct clk init_clocks_off[] = {
.devname= exynos-fimc-lite.1,
.enable = exynos4212_clk_ip_isp0_ctrl,
.ctrlbit= (1 3),
- }
+ }, {
+ .name = fimg2d,
+ .enable = exynos4_clk_ip_dmc_ctrl,
+ .ctrlbit= (1 23),
+ },
};
#ifdef CONFIG_PM_SLEEP
--
1.7.4.1
--
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