Re: [PATCH v2] thermal: exynos: Handle the misplaced TRIMINFO register
Hi Naveen,
On Thu, Aug 1, 2013 at 4:06 PM, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
This patch adds code to handle the misplaced TRIMINFO register
incase of Exynos5420.
On Exynos5420 we have a TRIMINFO register being misplaced for
TMU channels 2, 3 and 4
TRIMINFO at 0x1006c000 contains data for TMU channel 3
TRIMINFO at 0x100a contains data for TMU channel 4
TRIMINFO at 0x10068000 contains data for TMU channel 2
The misplaced register address is passed through devicetree and
map it seperately during probe.
Also, adds the documentation under devicetree/bindings/thermal/
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Doug Anderson diand...@chromium.org
---
Changes since v1:
Rebased on
http://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git
Is it rebased against next branch?
.../devicetree/bindings/thermal/exynos-thermal.txt | 48
drivers/thermal/exynos_thermal.c | 26 ++-
In the new directory structure this file is renamed as
drivers/thermal/samsung/exynos_tmu.c.
Thanks,
Amit Daniel
2 files changed, 72 insertions(+), 2 deletions(-)
create mode 100644
Documentation/devicetree/bindings/thermal/exynos-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
new file mode 100644
index 000..1db279e
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -0,0 +1,48 @@
+* Exynos Thermal
+
+Required properties:
+- compatible: should be one of the following.
+* samsung,exynos4210-tmu - for controllers compatible with exynos4210
tmu.
+* samsung,exynos5250-tmu - for controllers compatible with exynos5250
tmu.
+* samsung,exynos5420-tmu - for controllers compatible with exynos5420
tmu.
+
+- reg: physical base address of the controller and length of
+ memory mapped region.
+
+** NOTE FOR EXYNOS5420 **
+TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
+
+TERMINFO for TMU channel 2 is present in address space of TMU channel 3
+TERMINFO for TMU channel 3 is present in address space of TMU channel 4
+TERMINFO for TMU channel 4 is present in address space of TMU channel 2
+
+* In such cases the reg property contains the misplaced register address
and
+ range as the second parameter.
+
+- interrupts : interrupt number to the cpu.
+- clocks : Clock number as per common clock framework for the cpu.
+- clock-names : clock name to be used in the driver
+
+Example:
+
+ /* tmu for CPU0 */
+ tmu@1006 {
+ compatible = samsung,exynos5420-tmu;
+ reg = 0x1006 0x100;
+ interrupts = 0 65 0;
+ clocks = clock 318;
+ clock-names = tmu_apbif;
+ };
+
+Example: In case of Exynos5420 TMU channel 3
+
+ /* tmu for CPU3 */
+ tmu@1006c000 {
+ compatible = samsung,exynos5420-tmu;
+ /* 2nd reg is for the misplaced TRIMINFO register */
+ reg = 0x1006c000 0x100, 0x100a 0x4;
+ interrupts = 0 185 0;
+ clocks = clock 318;
+ clock-names = tmu_apbif;
+ };
+
diff --git a/drivers/thermal/exynos_thermal.c
b/drivers/thermal/exynos_thermal.c
index d20ce9e..1ad9005 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -38,6 +38,7 @@
#include linux/cpufreq.h
#include linux/cpu_cooling.h
#include linux/of.h
+#include linux/of_address.h
/* Exynos generic registers */
#define EXYNOS_TMU_REG_TRIMINFO0x0
@@ -120,7 +121,7 @@
struct exynos_tmu_data {
struct exynos_tmu_platform_data *pdata;
struct resource *mem;
- void __iomem *base;
+ void __iomem *base, *triminfo_base;
int irq;
enum soc_type soc;
struct work_struct irq_work;
@@ -593,8 +594,14 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
__raw_writel(EXYNOS_TRIMINFO_RELOAD,
data-base + EXYNOS_TMU_TRIMINFO_CON);
}
+
/* Save trimming info in order to perform calibration */
- trim_info = readl(data-base + EXYNOS_TMU_REG_TRIMINFO);
+ if (data-triminfo_base)
+ /* On exynos5420 TRIMINFO is misplaced for some channels */
+ trim_info = readl(data-triminfo_base);
+ else
+ trim_info = readl(data-base + EXYNOS_TMU_REG_TRIMINFO);
+
data-temp_error1 = trim_info EXYNOS_TMU_TRIM_TEMP_MASK;
data-temp_error2 = ((trim_info 8) EXYNOS_TMU_TRIM_TEMP_MASK);
@@ -941,6 +948,15 @@ static int exynos_tmu_probe(struct platform_device *pdev)
return ret;
}
+ /* For Exynos5420 The misplaced TERMINFO register address will
Re: [PATCH v2] thermal: exynos: Handle the misplaced TRIMINFO register
On 7 August 2013 12:06, amit daniel kachhap amit.dan...@samsung.com wrote:
Hi Naveen,
On Thu, Aug 1, 2013 at 4:06 PM, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
This patch adds code to handle the misplaced TRIMINFO register
incase of Exynos5420.
On Exynos5420 we have a TRIMINFO register being misplaced for
TMU channels 2, 3 and 4
TRIMINFO at 0x1006c000 contains data for TMU channel 3
TRIMINFO at 0x100a contains data for TMU channel 4
TRIMINFO at 0x10068000 contains data for TMU channel 2
The misplaced register address is passed through devicetree and
map it seperately during probe.
Also, adds the documentation under devicetree/bindings/thermal/
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Doug Anderson diand...@chromium.org
---
Changes since v1:
Rebased on
http://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git
Is it rebased against next branch?
Sorry, i re based it on to master.
.../devicetree/bindings/thermal/exynos-thermal.txt | 48
drivers/thermal/exynos_thermal.c | 26 ++-
In the new directory structure this file is renamed as
drivers/thermal/samsung/exynos_tmu.c.
Yea, just checked it. Will re-base and submit.
Thanks,
Amit Daniel
2 files changed, 72 insertions(+), 2 deletions(-)
create mode 100644
Documentation/devicetree/bindings/thermal/exynos-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
new file mode 100644
index 000..1db279e
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -0,0 +1,48 @@
+* Exynos Thermal
+
+Required properties:
+- compatible: should be one of the following.
+* samsung,exynos4210-tmu - for controllers compatible with exynos4210
tmu.
+* samsung,exynos5250-tmu - for controllers compatible with exynos5250
tmu.
+* samsung,exynos5420-tmu - for controllers compatible with exynos5420
tmu.
+
+- reg: physical base address of the controller and length of
+ memory mapped region.
+
+** NOTE FOR EXYNOS5420 **
+TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
+
+TERMINFO for TMU channel 2 is present in address space of TMU channel 3
+TERMINFO for TMU channel 3 is present in address space of TMU channel 4
+TERMINFO for TMU channel 4 is present in address space of TMU channel 2
+
+* In such cases the reg property contains the misplaced register
address and
+ range as the second parameter.
+
+- interrupts : interrupt number to the cpu.
+- clocks : Clock number as per common clock framework for the cpu.
+- clock-names : clock name to be used in the driver
+
+Example:
+
+ /* tmu for CPU0 */
+ tmu@1006 {
+ compatible = samsung,exynos5420-tmu;
+ reg = 0x1006 0x100;
+ interrupts = 0 65 0;
+ clocks = clock 318;
+ clock-names = tmu_apbif;
+ };
+
+Example: In case of Exynos5420 TMU channel 3
+
+ /* tmu for CPU3 */
+ tmu@1006c000 {
+ compatible = samsung,exynos5420-tmu;
+ /* 2nd reg is for the misplaced TRIMINFO register */
+ reg = 0x1006c000 0x100, 0x100a 0x4;
+ interrupts = 0 185 0;
+ clocks = clock 318;
+ clock-names = tmu_apbif;
+ };
+
diff --git a/drivers/thermal/exynos_thermal.c
b/drivers/thermal/exynos_thermal.c
index d20ce9e..1ad9005 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -38,6 +38,7 @@
#include linux/cpufreq.h
#include linux/cpu_cooling.h
#include linux/of.h
+#include linux/of_address.h
/* Exynos generic registers */
#define EXYNOS_TMU_REG_TRIMINFO0x0
@@ -120,7 +121,7 @@
struct exynos_tmu_data {
struct exynos_tmu_platform_data *pdata;
struct resource *mem;
- void __iomem *base;
+ void __iomem *base, *triminfo_base;
int irq;
enum soc_type soc;
struct work_struct irq_work;
@@ -593,8 +594,14 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
__raw_writel(EXYNOS_TRIMINFO_RELOAD,
data-base + EXYNOS_TMU_TRIMINFO_CON);
}
+
/* Save trimming info in order to perform calibration */
- trim_info = readl(data-base + EXYNOS_TMU_REG_TRIMINFO);
+ if (data-triminfo_base)
+ /* On exynos5420 TRIMINFO is misplaced for some channels */
+ trim_info = readl(data-triminfo_base);
+ else
+ trim_info = readl(data-base + EXYNOS_TMU_REG_TRIMINFO);
+
data-temp_error1 = trim_info EXYNOS_TMU_TRIM_TEMP_MASK;
data-temp_error2 = ((trim_info 8) EXYNOS_TMU_TRIM_TEMP_MASK);
@@ -941,6 +948,15 @@ static
Re: [PATCH 1/3] clk: exynos4: Make exynos4_plls static
On Tue, Aug 06, 2013 at 08:37:28PM -0700, Joe Perches wrote:
On Wed, 2013-08-07 at 08:51 +0530, Sachin Kamat wrote:
+CC Joe Perches
On 7 August 2013 01:32, Russell King - ARM Linux li...@arm.linux.org.uk
wrote:
Also note:
On Tue, Aug 06, 2013 at 05:01:13PM +0530, Sachin Kamat wrote:
@@ -984,7 +984,7 @@ static __initdata struct of_device_id
ext_clk_match[] = {
For the declaration above...
-struct __initdata samsung_pll_clock exynos4_plls[nr_plls] = {
+static struct __initdata samsung_pll_clock exynos4_plls[nr_plls] = {
And this one... __initdata should come just before the '=', not at the
start, not in the middle and not before the variable.
The reasoning is that with how you have it above, the attributes are
applied to the structure. You want to apply the attributes to the
declaration instead, so it should come after the variable name.
So, for example:
struct foo *foo __attribute__((section(.foo))) = (void *)1;
will place the foo variable into a section called .foo, but:
struct __attribute__((section(.foo))) foo *foo = (void *)1;
will place foo into the normal .data section.
So, the rule with variable declarations is that the __ specifiers we
have as macros in the kernel always come after the variable name being
declared and nowhere else. We consider anywhere else buggy.
Thanks for this useful tip, Russell. There are several instances in
the kernel where these attributes are used at the beginning of the
variable declaration.
Probably it would be useful to add this to checkpatch. Joe?
I think Russell is using the royal We.
No I'm not. There have been many patches to fix errors like the above
in the past. If it's not considered a bug by the community as a whole,
it damn well should be.
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[PATCH V3 3/3] ASoC: Samsung: I2S: Modify the I2S driver to support I2S on Exynos5420
Exynos5420 added support for I2S TDM mode. For this, there are some
register changes in the I2S controller. This patch adds the relevant
register changes to support I2S in normal mode. This patch adds a
quirk for TDM mode and if TDM mode is present all the relevent changes
will be applied.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
.../devicetree/bindings/sound/samsung-i2s.txt |4 +
include/linux/platform_data/asoc-s3c.h |1 +
sound/soc/samsung/i2s-regs.h | 15
sound/soc/samsung/i2s.c| 81 ++--
4 files changed, 93 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.txt
b/Documentation/devicetree/bindings/sound/samsung-i2s.txt
index b3f6443..9b5c892 100644
--- a/Documentation/devicetree/bindings/sound/samsung-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/samsung-i2s.txt
@@ -11,6 +11,10 @@ Required SoC Specific Properties:
with secondary fifo and s/w reset control.
- samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with
secondary fifo, s/w reset control and internal mux for root clk src.
+ - samsung,exynos5420-i2s: for 8/16/24bit multichannel(7.1) I2S with
+ secondary fifo, s/w reset control, internal mux for root clk src and
+ TDM support. TDM (Time division multiplexing) is to allow transfer of
+ multiple channel audio data on single data line.
- reg: physical base address of the controller and length of memory mapped
region.
diff --git a/include/linux/platform_data/asoc-s3c.h
b/include/linux/platform_data/asoc-s3c.h
index 8827259..9efc04d 100644
--- a/include/linux/platform_data/asoc-s3c.h
+++ b/include/linux/platform_data/asoc-s3c.h
@@ -36,6 +36,7 @@ struct samsung_i2s {
*/
#define QUIRK_NO_MUXPSR(1 2)
#define QUIRK_NEED_RSTCLR (1 3)
+#define QUIRK_SUPPORTS_TDM (1 4)
/* Quirks of the I2S controller */
u32 quirks;
dma_addr_t idma_addr;
diff --git a/sound/soc/samsung/i2s-regs.h b/sound/soc/samsung/i2s-regs.h
index 30513b7..821a502 100644
--- a/sound/soc/samsung/i2s-regs.h
+++ b/sound/soc/samsung/i2s-regs.h
@@ -31,6 +31,10 @@
#define I2SLVL1ADDR0x34
#define I2SLVL2ADDR0x38
#define I2SLVL3ADDR0x3c
+#define I2SSTR10x40
+#define I2SVER 0x44
+#define I2SFIC20x48
+#define I2STDM 0x4c
#define CON_RSTCLR (1 31)
#define CON_FRXOFSTATUS(1 26)
@@ -117,6 +121,17 @@
#define MOD_BCLK_MASK 3
#define MOD_8BIT (1 0)
+#define EXYNOS5420_MOD_LRP_SHIFT 15
+#define EXYNOS5420_MOD_SDF_SHIFT 6
+#define EXYNOS5420_MOD_RCLK_SHIFT 4
+#define EXYNOS5420_MOD_BCLK_SHIFT 0
+#define EXYNOS5420_MOD_BCLK_64FS 4
+#define EXYNOS5420_MOD_BCLK_96FS 5
+#define EXYNOS5420_MOD_BCLK_128FS 6
+#define EXYNOS5420_MOD_BCLK_192FS 7
+#define EXYNOS5420_MOD_BCLK_256FS 8
+#define EXYNOS5420_MOD_BCLK_MASK 0xf
+
#define MOD_CDCLKCON (1 12)
#define PSR_PSREN (1 15)
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 8a5504c..6964672 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -199,7 +199,12 @@ static inline bool is_manager(struct i2s_dai *i2s)
/* Read RCLK of I2S (in multiples of LRCLK) */
static inline unsigned get_rfs(struct i2s_dai *i2s)
{
- u32 rfs = (readl(i2s-addr + I2SMOD) MOD_RCLK_SHIFT);
+ u32 rfs;
+
+ if (i2s-quirks QUIRK_SUPPORTS_TDM)
+ rfs = readl(i2s-addr + I2SMOD) EXYNOS5420_MOD_RCLK_SHIFT;
+ else
+ rfs = (readl(i2s-addr + I2SMOD) MOD_RCLK_SHIFT);
rfs = MOD_RCLK_MASK;
switch (rfs) {
@@ -214,8 +219,12 @@ static inline unsigned get_rfs(struct i2s_dai *i2s)
static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
{
u32 mod = readl(i2s-addr + I2SMOD);
- int rfs_shift = MOD_RCLK_SHIFT;
+ int rfs_shift;
+ if (i2s-quirks QUIRK_SUPPORTS_TDM)
+ rfs_shift = EXYNOS5420_MOD_RCLK_SHIFT;
+ else
+ rfs_shift = MOD_RCLK_SHIFT;
mod = ~(MOD_RCLK_MASK rfs_shift);
switch (rfs) {
@@ -239,10 +248,22 @@ static inline void set_rfs(struct i2s_dai *i2s, unsigned
rfs)
/* Read Bit-Clock of I2S (in multiples of LRCLK) */
static inline unsigned get_bfs(struct i2s_dai *i2s)
{
- u32 bfs = readl(i2s-addr + I2SMOD) MOD_BCLK_SHIFT;
- bfs = MOD_BCLK_MASK;
+ u32 bfs;
+
+ if (i2s-quirks QUIRK_SUPPORTS_TDM) {
+ bfs = readl(i2s-addr + I2SMOD) EXYNOS5420_MOD_BCLK_SHIFT;
+ bfs = EXYNOS5420_MOD_BCLK_MASK;
+ } else {
+ bfs = readl(i2s-addr + I2SMOD) MOD_BCLK_SHIFT;
+ bfs = MOD_BCLK_MASK;
+ }
switch (bfs) {
+ case 8: return 256;
+ case 7: return 192;
+ case 6: return 128;
+ case
[PATCH V3 2/3] ASoC: Samsung: I2S: Add quirks as driver data in I2S
Samsung has different versions of I2S introduced in different
platforms. Each version has some new support added for multichannel,
secondary fifo, s/w reset control and internal mux for rclk src clk.
Each newly added change has a quirk. So this patch adds all the
required quirks as driver data and based on compatible string from
dtsi fetches the quirks.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
.../devicetree/bindings/sound/samsung-i2s.txt | 21 +++---
sound/soc/samsung/i2s.c| 82 +---
2 files changed, 64 insertions(+), 39 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.txt
b/Documentation/devicetree/bindings/sound/samsung-i2s.txt
index 025e66b..b3f6443 100644
--- a/Documentation/devicetree/bindings/sound/samsung-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/samsung-i2s.txt
@@ -2,7 +2,16 @@
Required SoC Specific Properties:
-- compatible : samsung,i2s-v5
+- compatible : should be one of the following.
+ - samsung,s3c6410-i2s: for 8/16/24bit stereo I2S. Previous versions
+ has only 8/16bit support.
+ - samsung,s3c6410-i2sv4: for 8/16/24bit multichannel(5.1 channel) I2S.
+ Introduced in s3c6410. This also applicable for s5p64x0 platforms.
+ - samsung,s5pc100-i2s: for 8/16/24bit multichannel(5.1 channel) I2S
+ with secondary fifo and s/w reset control.
+ - samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with
+ secondary fifo, s/w reset control and internal mux for root clk src.
+
- reg: physical base address of the controller and length of memory mapped
region.
- dmas: list of DMA controller phandle and DMA request line ordered pairs.
@@ -21,13 +30,6 @@ Required SoC Specific Properties:
Optional SoC Specific Properties:
-- samsung,supports-6ch: If the I2S Primary sound source has 5.1 Channel
- support, this flag is enabled.
-- samsung,supports-rstclr: This flag should be set if I2S software reset bit
- control is required. When this flag is set I2S software reset bit will be
- enabled or disabled based on need.
-- samsung,supports-secdai:If I2S block has a secondary FIFO and internal DMA,
- then this flag is enabled.
- samsung,idma-addr: Internal DMA register base address of the audio
sub system(used in secondary sound source).
- pinctrl-0: Should specify pin control groups used for this controller.
@@ -46,9 +48,6 @@ i2s0: i2s@0383 {
clock_audss EXYNOS_I2S_BUS,
clock_audss EXYNOS_SCLK_I2S;
clock-names = iis, i2s_opclk0, i2s_opclk1;
- samsung,supports-6ch;
- samsung,supports-rstclr;
- samsung,supports-secdai;
samsung,idma-addr = 0x0300;
pinctrl-names = default;
pinctrl-0 = i2s0_bus;
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 47e08dd..8a5504c 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -40,6 +40,7 @@ enum samsung_dai_type {
struct samsung_i2s_dai_data {
int dai_type;
+ u32 quirks;
};
struct i2s_dai {
@@ -1032,18 +1033,18 @@ static struct i2s_dai *i2s_alloc_dai(struct
platform_device *pdev, bool sec)
static const struct of_device_id exynos_i2s_match[];
-static inline int samsung_i2s_get_driver_data(struct platform_device *pdev)
+static inline struct samsung_i2s_dai_data *samsung_i2s_get_driver_data(
+ struct platform_device *pdev)
{
#ifdef CONFIG_OF
- struct samsung_i2s_dai_data *data;
if (pdev-dev.of_node) {
const struct of_device_id *match;
match = of_match_node(exynos_i2s_match, pdev-dev.of_node);
- data = (struct samsung_i2s_dai_data *) match-data;
- return data-dai_type;
+ return (struct samsung_i2s_dai_data *) match-data;
} else
#endif
- return platform_get_device_id(pdev)-driver_data;
+ return (struct samsung_i2s_dai_data *)
+ platform_get_device_id(pdev)-driver_data;
}
#ifdef CONFIG_PM_RUNTIME
@@ -1074,13 +1075,13 @@ static int samsung_i2s_probe(struct platform_device
*pdev)
struct resource *res;
u32 regs_base, quirks = 0, idma_addr = 0;
struct device_node *np = pdev-dev.of_node;
- enum samsung_dai_type samsung_dai_type;
+ struct samsung_i2s_dai_data *i2s_dai_data;
int ret = 0;
/* Call during Seconday interface registration */
- samsung_dai_type = samsung_i2s_get_driver_data(pdev);
+ i2s_dai_data = samsung_i2s_get_driver_data(pdev);
- if (samsung_dai_type == TYPE_SEC) {
+ if (i2s_dai_data-dai_type == TYPE_SEC) {
sec_dai = dev_get_drvdata(pdev-dev);
if (!sec_dai) {
dev_err(pdev-dev, Unable to get drvdata\n);
@@ -1129,15 +1130,7 @@ static int samsung_i2s_probe(struct platform_device
*pdev)
idma_addr =
[PATCH V3 0/3] Add audio support on smdk5420
Samsung has different versions of I2S introduced in different platforms. Each version has some new support added for multichannel, secondary fifo, s/w reset control, internal mux for rclk src clk and tdm support. Each newly added change has a quirk. So this patch adds all the required quirks as driver data and based on compatible string from dtsi fetches the quirks. This also adds i2s support on exynos5420. Changes since V2: - Seperated out driver side changes and dts changes in two patch sets. - Replaced samsung,s3c6410-i2s-v4 with samsung,s3c6410-i2s-multi for more clarity as suggested by Tomasz Figa. Changes since V1: - Pass quirks as driver data and fetch the quirks based on compatible string from dtsi file as suggested by Tomasz Figa and Mark Brown - Make the I2S driver more flexible with respect to register access as suggested by Tomasz Figa and Mark Brown - Add 5420 support in the driver. - Modify the dtsi files with the corresponding compatible strings and removed the i2s quirks from 5250 dtsi file. - Updated the i2s Documentation with relevent changes and i2s versioning info. - Add i2s nodes on exynos5420.dtsi - Enable sound support on smdk5420 This patch set is made based on Mark Brown for-next branch on sound.git. Padmavathi Venna (3): platform: Increase platform name size ASoC: Samsung: I2S: Add quirks as driver data in I2S ASoC: Samsung: I2S: Modify the I2S driver to support I2S on Exynos5420 .../devicetree/bindings/sound/samsung-i2s.txt | 25 ++-- include/linux/mod_devicetable.h|2 +- include/linux/platform_data/asoc-s3c.h |1 + sound/soc/samsung/i2s-regs.h | 15 ++ sound/soc/samsung/i2s.c| 163 +++- 5 files changed, 158 insertions(+), 48 deletions(-) -- 1.7.4.4 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V3 1/3] platform: Increase platform name size
This patch increases the platform name size from 20 to 30 as one of
i2s platform_device name in this patchset crosses the limit.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
include/linux/mod_devicetable.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetable.h
index 45e9214..3a2c079 100644
--- a/include/linux/mod_devicetable.h
+++ b/include/linux/mod_devicetable.h
@@ -479,7 +479,7 @@ struct dmi_system_id {
#define DMI_MATCH(a, b){ .slot = a, .substr = b }
#define DMI_EXACT_MATCH(a, b) { .slot = a, .substr = b, .exact_match = 1 }
-#define PLATFORM_NAME_SIZE 20
+#define PLATFORM_NAME_SIZE 30
#define PLATFORM_MODULE_PREFIX platform:
struct platform_device_id {
--
1.7.4.4
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[PATCH 2/3] ARM: dts: Add osc clock node on smdk5420.
This patch adds 16MHz oscillator clock node required for audio
on smdk5420 and adds the phandle of the same in wm8994 clock info.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts
b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index b979405..a9eab45 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -31,6 +31,13 @@
};
};
+ osc3_clk16mhz: clk16mhz {
+ compatible = osc3_clk16mhz;
+ #clock-cells = 0;
+ clock-frequency = 16934400;
+ clock-output-names = osc3_clk16mhz;
+ };
+
dwmmc0@1220 {
status = okay;
num-slots = 1;
@@ -123,6 +130,9 @@
DBVDD-supply = dbvdd;
SPKVDD1-supply = spkvdd;
SPKVDD2-supply = spkvdd;
+
+ clocks = osc3_clk16mhz;
+ clock-names = mclk1;
};
};
--
1.7.4.4
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[PATCH 1/3] ARM: dts: Enable sound support on smdk5420
This patch enables i2s0 and sound support on smdk5420.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts
b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index e86c1ae..b979405 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -126,4 +126,14 @@
};
};
+ i2s0: i2s@0383 {
+ status = okay;
+ };
+
+ sound {
+ compatible = samsung,smdk-wm8994;
+
+ samsung,i2s-controller = i2s0;
+ samsung,audio-codec = wm8994;
+ };
};
--
1.7.4.4
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[PATCH 2/7] ARM: dts: exynos5420: add i2s controllers
From: Andrew Bresticker abres...@chromium.org
This adds device-tree bindings for the i2s controllers on Exynos 5420.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Signed-off-by: Padmavathi Venna padm...@samsung.com
Reviewed-on: https://gerrit.chromium.org/gerrit/57713
---
arch/arm/boot/dts/exynos5420.dtsi | 32
1 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dts/exynos5420.dtsi
index c2a2bd6..286354e 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -242,4 +242,36 @@
pinctrl-names = default;
pinctrl-0 = i2c3_bus;
};
+
+ i2s_0: i2s@0383 {
+ compatible = samsung,exynos5420-i2s;
+ dmas = adma 0
+ adma 2
+ adma 1;
+ dma-names = tx, rx, tx-sec;
+ clocks = clock_audss EXYNOS_I2S_BUS,
+ clock_audss EXYNOS_I2S_BUS,
+ clock_audss EXYNOS_SCLK_I2S;
+ clock-names = iis, i2s_opclk0, i2s_opclk1;
+ pinctrl-names = default;
+ pinctrl-0 = i2s0_bus;
+ status = disabled;
+ };
+
+ i2s_1: i2s@12D6 {
+ clocks = clock 275, clock 138;
+ clock-names = iis, i2s_opclk0;
+ pinctrl-names = default;
+ pinctrl-0 = i2s1_bus;
+ status = disabled;
+ };
+
+ i2s_2: i2s@12D7 {
+ clocks = clock 276, clock 139;
+ clock-names = iis, i2s_opclk0;
+ pinctrl-names = default;
+ pinctrl-0 = i2s2_bus;
+ status = disabled;
+ };
+
};
--
1.7.4.4
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[PATCH 4/7] ARM: dts: exynos5250: move common i2s properties to exynos5 dtsi
I2S nodes shares some properties across exynos5 SoCs (exynos5250
and exyno5420). Common code is moved to exynos5.dtsi which is
included in exyno5250 and exynos5420 SoC files.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
arch/arm/boot/dts/exynos5.dtsi| 21 +
arch/arm/boot/dts/exynos5250.dtsi | 12
2 files changed, 21 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index ec384c9..c37b57d 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -191,4 +191,25 @@
#size-cells = 0;
status = disabled;
};
+
+ i2s0: i2s@0383 {
+ reg = 0x0383 0x100;
+ samsung,idma-addr = 0x0300;
+ };
+
+ i2s1: i2s@12D6 {
+ compatible = samsung,s3c6410-i2s;
+ reg = 0x12D6 0x100;
+ dmas = pdma1 12
+ pdma1 11;
+ dma-names = tx, rx;
+ };
+
+ i2s2: i2s@12D7 {
+ compatible = samsung,s3c6410-i2s;
+ reg = 0x12D7 0x100;
+ dmas = pdma0 12
+ pdma0 11;
+ dma-names = tx, rx;
+ };
};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 5b36121..3873ff7 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -394,7 +394,6 @@
i2s0: i2s@0383 {
compatible = samsung,s5pv210-i2s;
- reg = 0x0383 0x100;
dmas = pdma0 10
pdma0 9
pdma0 8;
@@ -403,17 +402,11 @@
clock_audss EXYNOS_I2S_BUS,
clock_audss EXYNOS_SCLK_I2S;
clock-names = iis, i2s_opclk0, i2s_opclk1;
- samsung,idma-addr = 0x0300;
pinctrl-names = default;
pinctrl-0 = i2s0_bus;
};
i2s1: i2s@12D6 {
- compatible = samsung,s3c6410-i2s;
- reg = 0x12D6 0x100;
- dmas = pdma1 12
- pdma1 11;
- dma-names = tx, rx;
clocks = clock 307, clock 157;
clock-names = iis, i2s_opclk0;
pinctrl-names = default;
@@ -421,11 +414,6 @@
};
i2s2: i2s@12D7 {
- compatible = samsung,s3c6410-i2s;
- reg = 0x12D7 0x100;
- dmas = pdma0 12
- pdma0 11;
- dma-names = tx, rx;
clocks = clock 308, clock 158;
clock-names = iis, i2s_opclk0;
pinctrl-names = default;
--
1.7.4.4
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[PATCH v4 00/13] Exynos5 IS driver
The patch series add support for Exynos5 camera subsystem. It re-uses mipi-csis and fimc-lite from exynos4-is and adds a new media device and fimc-is device drivers for exynos5. The media device supports asynchronos subdev registration for the fimc-is sensors and is based on the patch series from Sylwester for exynos4-is [1]. [1] http://www.mail-archive.com/linux-media@vger.kernel.org/msg64653.html Changes from v3 --- - Dropped the RFC tag - Addressed all review comments from Sylwester and Sachin - Removed clock provider for media dev - Added s5k4e5 sensor devicetree binding doc Changes from v2 --- - Added exynos5 media device driver from Shaik to this series - Added ISP pipeline support in media device driver - Based on Sylwester's latest exynos4-is development - Asynchronos registration of sensor subdevs - Made independent IS-sensor support - Add s5k4e5 sensor driver - Addressed review comments from Sylwester, Hans, Andrzej, Sachin Changes from v1 --- - Addressed all review comments from Sylwester - Made sensor subdevs as independent i2c devices - Lots of cleanup - Debugfs support added - Removed PMU global register access Arun Kumar K (12): [media] exynos5-fimc-is: Add Exynos5 FIMC-IS device tree bindings documentation [media] exynos5-fimc-is: Add driver core files [media] exynos5-fimc-is: Add common driver header files [media] exynos5-fimc-is: Add register definition and context header [media] exynos5-fimc-is: Add isp subdev [media] exynos5-fimc-is: Add scaler subdev [media] exynos5-fimc-is: Add sensor interface [media] exynos5-fimc-is: Add the hardware pipeline control [media] exynos5-fimc-is: Add the hardware interface module [media] exynos5-is: Add Kconfig and Makefile V4L: s5k6a3: Change sensor min/max resolutions V4L: Add driver for s5k4e5 image sensor Shaik Ameer Basha (1): [media] exynos5-is: Adding media device driver for exynos5 .../devicetree/bindings/media/exynos5-fimc-is.txt | 52 + .../devicetree/bindings/media/exynos5-mdev.txt | 148 ++ .../devicetree/bindings/media/i2c/s5k4e5.txt | 44 + drivers/media/i2c/Kconfig |8 + drivers/media/i2c/Makefile |1 + drivers/media/i2c/s5k4e5.c | 361 + drivers/media/i2c/s5k6a3.c | 21 +- drivers/media/platform/Kconfig |1 + drivers/media/platform/Makefile|1 + drivers/media/platform/exynos5-is/Kconfig | 20 + drivers/media/platform/exynos5-is/Makefile |7 + drivers/media/platform/exynos5-is/exynos5-mdev.c | 1189 ++ drivers/media/platform/exynos5-is/exynos5-mdev.h | 164 ++ drivers/media/platform/exynos5-is/fimc-is-cmd.h| 187 +++ drivers/media/platform/exynos5-is/fimc-is-core.c | 413 + drivers/media/platform/exynos5-is/fimc-is-core.h | 134 ++ drivers/media/platform/exynos5-is/fimc-is-err.h| 257 +++ .../media/platform/exynos5-is/fimc-is-interface.c | 810 ++ .../media/platform/exynos5-is/fimc-is-interface.h | 125 ++ drivers/media/platform/exynos5-is/fimc-is-isp.c| 516 ++ drivers/media/platform/exynos5-is/fimc-is-isp.h| 90 ++ .../media/platform/exynos5-is/fimc-is-metadata.h | 767 + drivers/media/platform/exynos5-is/fimc-is-param.h | 1160 ++ .../media/platform/exynos5-is/fimc-is-pipeline.c | 1691 .../media/platform/exynos5-is/fimc-is-pipeline.h | 127 ++ drivers/media/platform/exynos5-is/fimc-is-regs.h | 105 ++ drivers/media/platform/exynos5-is/fimc-is-scaler.c | 449 ++ drivers/media/platform/exynos5-is/fimc-is-scaler.h | 106 ++ drivers/media/platform/exynos5-is/fimc-is-sensor.c | 45 + drivers/media/platform/exynos5-is/fimc-is-sensor.h | 66 + drivers/media/platform/exynos5-is/fimc-is.h| 160 ++ 31 files changed, 9217 insertions(+), 8 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/exynos5-fimc-is.txt create mode 100644 Documentation/devicetree/bindings/media/exynos5-mdev.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/s5k4e5.txt create mode 100644 drivers/media/i2c/s5k4e5.c create mode 100644 drivers/media/platform/exynos5-is/Kconfig create mode 100644 drivers/media/platform/exynos5-is/Makefile create mode 100644 drivers/media/platform/exynos5-is/exynos5-mdev.c create mode 100644 drivers/media/platform/exynos5-is/exynos5-mdev.h create mode 100644 drivers/media/platform/exynos5-is/fimc-is-cmd.h create mode 100644 drivers/media/platform/exynos5-is/fimc-is-core.c create mode 100644 drivers/media/platform/exynos5-is/fimc-is-core.h create mode 100644 drivers/media/platform/exynos5-is/fimc-is-err.h create mode 100644 drivers/media/platform/exynos5-is/fimc-is-interface.c create mode 100644 drivers/media/platform/exynos5-is/fimc-is-interface.h create mode 100644
Re: [PATCH V3 0/7] Add i2s nodes on Exynos5420 and enable sound support on sdmk5420
Hi, Abandoning this series due to some mistake in the post. Will post new patch set. Thanks Padma On Wed, Aug 7, 2013 at 2:20 PM, Padmavathi Venna padm...@samsung.com wrote: Changes since V2: - Seperated out driver side changes and dts changes in two patch sets - Added proper names for wm8994 regulators as commented by Mark - Moved common i2s nodes into the exynos5.dtsi - Added clock info in wm8994 node as requested by Mark. - Registered the 16.9MHz oscillator clock as fixed clock in the machine file. Right now no user of this clock but as Mark requested to add mclk info in wm8994 node, I added this part. This patch set is dependent on the following i2c, dma and audio subsystem clk controller patches. http://comments.gmane.org/gmane.linux.kernel.samsung-soc/20077 http://comments.gmane.org/gmane.linux.kernel.samsung-soc/20661 http://comments.gmane.org/gmane.linux.kernel.samsung-soc/20668 This patch set is made based on Kukjin Kim for-next branch. Andrew Bresticker (1): ARM: dts: exynos5420: add i2s controllers Padmavathi Venna (6): ARM: dts: Change i2s compatible string on exynos5250 ARM: dts: Add i2c bus 1 and it's audio codec child node on smdk5420 ARM: dts: exynos5250: move common i2s properties to exynos5 dtsi ARM: dts: Add osc clock node on smdk5420. ASoC: Samsung: wm8994: Register the osc clock. ARM: dts: Enable sound support on smdk5420 arch/arm/boot/dts/exynos5.dtsi| 21 arch/arm/boot/dts/exynos5250.dtsi | 17 +-- arch/arm/boot/dts/exynos5420-smdk5420.dts | 78 + arch/arm/boot/dts/exynos5420.dtsi | 32 sound/soc/samsung/smdk_wm8994.c | 12 + 5 files changed, 144 insertions(+), 16 deletions(-) -- 1.7.4.4 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 02/13] [media] exynos5-fimc-is: Add Exynos5 FIMC-IS device tree bindings documentation
The patch adds the DT binding documentation for Samsung Exynos5 SoC series imaging subsystem (FIMC-IS). Signed-off-by: Arun Kumar K arun...@samsung.com Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com --- .../devicetree/bindings/media/exynos5-fimc-is.txt | 52 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/exynos5-fimc-is.txt diff --git a/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt b/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt new file mode 100644 index 000..5e6dee6 --- /dev/null +++ b/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt @@ -0,0 +1,52 @@ +Samsung EXYNOS5 SoC series Imaging Subsystem (FIMC-IS) +-- + +The camera subsystem on Samsung Exynos5 SoC has some changes relative +to previous SoC versions. Exynos5 has almost similar MIPI-CSIS and +FIMC-LITE IPs but has a much improved version of FIMC-IS which can +handle sensor controls and camera post-processing operations. The +Exynos5 FIMC-IS has a dedicated ARM Cortex A5 processor, many +post-processing blocks (ISP, DRC, FD, ODC, DIS, 3DNR) and two +dedicated scalers (SCC and SCP). + +fimc-is node + + +Required properties: + +- compatible: must be samsung,exynos5250-fimc-is +- reg : physical base address and size of the memory mapped + registers +- interrupt-parent : parent interrupt controller +- interrupts: fimc-is interrupt to the parent combiner +- clocks: list of clock specifiers, corresponding to entries in + clock-names property; +- clock-names : must contain isp, mcu_isp, isp_div0, isp_div1, + isp_divmpwm, mcu_isp_div0, mcu_isp_div1 entries, + matching entries in the clocks property. + +pmu subnode +--- + +Required properties: + - reg : should contain PMU physical base address and size of the memory + mapped registers. + +i2c-isp (ISP I2C bus controller) nodes +-- + +Required properties: + +- compatible : should be samsung,exynos4212-i2c-isp for Exynos4212, + Exynos4412 and Exynos5250 SoCs; +- reg : physical base address and length of the registers set; +- clocks : must contain gate clock specifier for this controller; +- clock-names : must contain i2c_isp entry. + +For the i2c-isp node, it is required to specify a pinctrl state named default, +according to the pinctrl bindings defined in ../pinctrl/pinctrl-bindings.txt. + +Device tree nodes of the image sensors' controlled directly by the FIMC-IS +firmware must be child nodes of their corresponding ISP I2C bus controller node. +The data link of these image sensors must be specified using the common video +interfaces bindings, defined in video-interfaces.txt. -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 01/13] [media] exynos5-is: Adding media device driver for exynos5
From: Shaik Ameer Basha shaik.am...@samsung.com
This patch adds support for media device for EXYNOS5 SoCs.
The current media device supports the following ips to connect
through the media controller framework.
* MIPI-CSIS
Support interconnection(subdev interface) between devices
* FIMC-LITE
Support capture interface from device(Sensor, MIPI-CSIS) to memory
Support interconnection(subdev interface) between devices
* FIMC-IS
Camera post-processing IP having multiple sub-nodes.
G-Scaler will be added later to the current media device.
The media device creates two kinds of pipelines for connecting
the above mentioned IPs.
The pipeline0 is uses Sensor, MIPI-CSIS and FIMC-LITE which captures
image data and dumps to memory.
Pipeline1 uses FIMC-IS components for doing post-processing
operations on the captured image and give scaled YUV output.
Pipeline0
++ +---+ +---+ ++
| Sensor | -- | MIPI-CSIS | -- | FIMC-LITE | -- | Memory |
++ +---+ +---+ ++
Pipeline1
++ ++ +---+ +---+
| Memory | -- | ISP | -- |SCC| -- |SCP|
++ ++ +---+ +---+
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
Signed-off-by: Arun Kumar K arun...@samsung.com
---
.../devicetree/bindings/media/exynos5-mdev.txt | 148 +++
drivers/media/platform/exynos5-is/exynos5-mdev.c | 1189
drivers/media/platform/exynos5-is/exynos5-mdev.h | 164 +++
3 files changed, 1501 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/exynos5-mdev.txt
create mode 100644 drivers/media/platform/exynos5-is/exynos5-mdev.c
create mode 100644 drivers/media/platform/exynos5-is/exynos5-mdev.h
diff --git a/Documentation/devicetree/bindings/media/exynos5-mdev.txt
b/Documentation/devicetree/bindings/media/exynos5-mdev.txt
new file mode 100644
index 000..8b2ffb9
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/exynos5-mdev.txt
@@ -0,0 +1,148 @@
+Samsung EXYNOS5 SoC Camera Subsystem
+
+
+The Exynos5 SoC Camera subsystem comprises of multiple sub-devices
+represented by separate device tree nodes. Currently this includes: FIMC-LITE,
+MIPI CSIS and FIMC-IS.
+
+The sub-subdevices are defined as child nodes of the common 'camera' node which
+also includes common properties of the whole subsystem not really specific to
+any single sub-device, like common camera port pins or the CAMCLK clock outputs
+for external image sensors attached to an SoC.
+
+Common 'camera' node
+
+
+Required properties:
+
+- compatible : must be samsung,exynos5-fimc, simple-bus
+- clocks : list of clock specifiers, corresponding to entries in
+ the clock-names property;
+- clock-names : must contain sclk_bayer entry and matching clock property
+ entry
+
+The pinctrl bindings defined in ../pinctrl/pinctrl-bindings.txt must be used
+to define a required pinctrl state named default and optional pinctrl states:
+idle, active-a, active-b. These optional states can be used to switch the
+camera port pinmux at runtime. The idle state should configure both the
camera
+ports A and B into high impedance state, especially the CAMCLK clock output
+should be inactive. For the active-a state the camera port A must be
activated
+and the port B deactivated and for the state active-b it should be the other
+way around.
+
+The 'camera' node must include at least one 'fimc-lite' child node.
+
+'parallel-ports' node
+-
+
+This node should contain child 'port' nodes specifying active parallel video
+input ports. It includes camera A and camera B inputs. 'reg' property in the
+port nodes specifies data input - 0, 1 indicates input A, B respectively.
+
+Image sensor nodes
+--
+
+The sensor device nodes should be added to their control bus controller (e.g.
+I2C0) nodes and linked to a port node in the csis or the parallel-ports node,
+using the common video interfaces bindings, defined in video-interfaces.txt.
+The implementation of this bindings requires clock-frequency property to be
+present in the sensor device nodes.
+
+Example:
+
+ aliases {
+ fimc-lite0 = fimc_lite_0
+ };
+
+ /* Parallel bus IF sensor */
+ i2c_0: i2c@1386 {
+ s5k6aa: sensor@3c {
+ compatible = samsung,s5k6aafx;
+ reg = 0x3c;
+ vddio-supply = ...;
+
+ clock-frequency = 2400;
+ clocks = ...;
+ clock-names = mclk;
+
+ port {
+ s5k6aa_ep: endpoint {
+ remote-endpoint = fimc0_ep;
+ bus-width = 8;
+
[PATCH v4 05/13] [media] exynos5-fimc-is: Add register definition and context header
This patch adds the register definition file for the fimc-is driver and also the header file containing the main context for the driver. Signed-off-by: Arun Kumar K arun...@samsung.com Signed-off-by: Kilyeon Im kilyeon...@samsung.com --- drivers/media/platform/exynos5-is/fimc-is-regs.h | 105 ++ drivers/media/platform/exynos5-is/fimc-is.h | 160 ++ 2 files changed, 265 insertions(+) create mode 100644 drivers/media/platform/exynos5-is/fimc-is-regs.h create mode 100644 drivers/media/platform/exynos5-is/fimc-is.h diff --git a/drivers/media/platform/exynos5-is/fimc-is-regs.h b/drivers/media/platform/exynos5-is/fimc-is-regs.h new file mode 100644 index 000..06aa466 --- /dev/null +++ b/drivers/media/platform/exynos5-is/fimc-is-regs.h @@ -0,0 +1,105 @@ +/* + * Samsung Exynos5 SoC series FIMC-IS driver + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd + * Arun Kumar K arun...@samsung.com + * Kil-yeon Lim kilyeon...@samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef FIMC_IS_REGS_H +#define FIMC_IS_REGS_H + +/* WDT_ISP register */ +#define WDT0x0017 +/* MCUCTL register */ +#define MCUCTL 0x0018 +/* MCU Controller Register */ +#define MCUCTLR(MCUCTL+0x00) +#define MCUCTLR_AXI_ISPX_AWCACHE(x)((x) 16) +#define MCUCTLR_AXI_ISPX_ARCACHE(x)((x) 12) +#define MCUCTLR_MSWRST (1 0) +/* Boot Base OFfset Address Register */ +#define BBOAR (MCUCTL+0x04) +#define BBOAR_BBOA(x) ((x) 0) + +/* Interrupt Generation Register 0 from Host CPU to VIC */ +#define INTGR0 (MCUCTL+0x08) +#define INTGR0_INTGC(n)(1 ((n) + 16)) +#define INTGR0_INTGD(n)(1 (n)) + +/* Interrupt Clear Register 0 from Host CPU to VIC */ +#define INTCR0 (MCUCTL+0x0c) +#define INTCR0_INTCC(n)(1 ((n) + 16)) +#define INTCR0_INTCD(n)(1 (n)) + +/* Interrupt Mask Register 0 from Host CPU to VIC */ +#define INTMR0 (MCUCTL+0x10) +#define INTMR0_INTMC(n)(1 ((n) + 16)) +#define INTMR0_INTMD(n)(1 (n)) + +/* Interrupt Status Register 0 from Host CPU to VIC */ +#define INTSR0 (MCUCTL+0x14) +#define INTSR0_GET_INTSD(n, x) (((x) (n)) 0x1) +#define INTSR0_GET_INTSC(n, x) (((x) ((n) + 16)) 0x1) + +/* Interrupt Mask Status Register 0 from Host CPU to VIC */ +#define INTMSR0(MCUCTL+0x18) +#define INTMSR0_GET_INTMSD(n, x) (((x) (n)) 0x1) +#define INTMSR0_GET_INTMSC(n, x) (((x) ((n) + 16)) 0x1) + +/* Interrupt Generation Register 1 from ISP CPU to Host IC */ +#define INTGR1 (MCUCTL+0x1c) +#define INTGR1_INTGC(n)(1 (n)) + +/* Interrupt Clear Register 1 from ISP CPU to Host IC */ +#define INTCR1 (MCUCTL+0x20) +#define INTCR1_INTCC(n)(1 (n)) + +/* Interrupt Mask Register 1 from ISP CPU to Host IC */ +#define INTMR1 (MCUCTL+0x24) +#define INTMR1_INTMC(n)(1 (n)) + +/* Interrupt Status Register 1 from ISP CPU to Host IC */ +#define INTSR1 (MCUCTL+0x28) +/* Interrupt Mask Status Register 1 from ISP CPU to Host IC */ +#define INTMSR1(MCUCTL+0x2c) +/* Interrupt Clear Register 2 from ISP BLK's interrupts to Host IC */ +#define INTCR2 (MCUCTL+0x30) +#define INTCR2_INTCC(n)(1 (n)) + +/* Interrupt Mask Register 2 from ISP BLK's interrupts to Host IC */ +#define INTMR2 (MCUCTL+0x34) +#define INTMR2_INTMCIS(n) (1 (n)) + +/* Interrupt Status Register 2 from ISP BLK's interrupts to Host IC */ +#define INTSR2 (MCUCTL+0x38) +/* Interrupt Mask Status Register 2 from ISP BLK's interrupts to Host IC */ +#define INTMSR2(MCUCTL+0x3c) +/* General Purpose Output Control Register (0~17) */ +#define GPOCTLR(MCUCTL+0x40) +#define GPOCTLR_GPOG(n, x) ((x) (n)) + +/* General Purpose Pad Output Enable Register (0~17) */ +#define GPOENCTLR (MCUCTL+0x44) +#define GPOENCTLR_GPOEN0(n, x) ((x) (n)) + +/* General Purpose Input Control Register (0~17) */ +#define GPICTLR(MCUCTL+0x48) + +/* IS Shared Registers between ISP CPU and HOST CPU */ +#define ISSR(n)(MCUCTL + 0x80 + (n)) + +/* PMU for FIMC-IS*/ +#define PMUREG_CMU_RESET_ISP_SYS_PWR_REG 0x1584 +#define
[PATCH v4 03/13] [media] exynos5-fimc-is: Add driver core files
This driver is for the FIMC-IS IP available in Samsung Exynos5
SoC onwards. This patch adds the core files for the new driver.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Kilyeon Im kilyeon...@samsung.com
---
drivers/media/platform/exynos5-is/fimc-is-core.c | 413 ++
drivers/media/platform/exynos5-is/fimc-is-core.h | 134 +++
2 files changed, 547 insertions(+)
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-core.c
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-core.h
diff --git a/drivers/media/platform/exynos5-is/fimc-is-core.c
b/drivers/media/platform/exynos5-is/fimc-is-core.c
new file mode 100644
index 000..067dea6
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-core.c
@@ -0,0 +1,413 @@
+/*
+ * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
+*
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Arun Kumar K arun...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/bug.h
+#include linux/ctype.h
+#include linux/device.h
+#include linux/debugfs.h
+#include linux/delay.h
+#include linux/errno.h
+#include linux/err.h
+#include linux/firmware.h
+#include linux/fs.h
+#include linux/gpio.h
+#include linux/interrupt.h
+#include linux/kernel.h
+#include linux/list.h
+#include linux/module.h
+#include linux/types.h
+#include linux/platform_device.h
+#include linux/pm_runtime.h
+#include linux/slab.h
+#include linux/videodev2.h
+#include linux/of.h
+#include linux/of_gpio.h
+#include linux/of_address.h
+#include linux/of_platform.h
+#include linux/of_irq.h
+#include linux/pinctrl/consumer.h
+
+#include media/v4l2-device.h
+#include media/v4l2-ioctl.h
+#include media/v4l2-mem2mem.h
+#include media/v4l2-of.h
+#include media/videobuf2-core.h
+#include media/videobuf2-dma-contig.h
+
+#include fimc-is.h
+#include fimc-is-i2c.h
+
+#define CLK_MCU_ISP_DIV0_FREQ (200 * 100)
+#define CLK_MCU_ISP_DIV1_FREQ (100 * 100)
+#define CLK_ISP_DIV0_FREQ (134 * 100)
+#define CLK_ISP_DIV1_FREQ (68 * 100)
+#define CLK_ISP_DIVMPWM_FREQ (34 * 100)
+
+static char *fimc_is_clock_name[] = {
+ [IS_CLK_ISP]= isp,
+ [IS_CLK_MCU_ISP]= mcu_isp,
+ [IS_CLK_ISP_DIV0] = isp_div0,
+ [IS_CLK_ISP_DIV1] = isp_div1,
+ [IS_CLK_ISP_DIVMPWM]= isp_divmpwm,
+ [IS_CLK_MCU_ISP_DIV0] = mcu_isp_div0,
+ [IS_CLK_MCU_ISP_DIV1] = mcu_isp_div1,
+};
+
+static void fimc_is_put_clocks(struct fimc_is *is)
+{
+ int i;
+
+ for (i = 0; i IS_CLK_MAX_NUM; i++) {
+ if (IS_ERR(is-clock[i]))
+ continue;
+ clk_unprepare(is-clock[i]);
+ clk_put(is-clock[i]);
+ is-clock[i] = NULL;
+ }
+}
+
+static int fimc_is_get_clocks(struct fimc_is *is)
+{
+ struct device *dev = is-pdev-dev;
+ int i, ret;
+
+ for (i = 0; i IS_CLK_MAX_NUM; i++) {
+ is-clock[i] = clk_get(dev, fimc_is_clock_name[i]);
+ if (IS_ERR(is-clock[i]))
+ goto err;
+ ret = clk_prepare(is-clock[i]);
+ if (ret 0) {
+ clk_put(is-clock[i]);
+ is-clock[i] = ERR_PTR(-EINVAL);
+ goto err;
+ }
+ }
+ return 0;
+err:
+ fimc_is_put_clocks(is);
+ pr_err(Failed to get clock: %s\n, fimc_is_clock_name[i]);
+ return -ENXIO;
+}
+
+static int fimc_is_configure_clocks(struct fimc_is *is)
+{
+ int i, ret;
+
+ for (i = 0; i IS_CLK_MAX_NUM; i++)
+ is-clock[i] = ERR_PTR(-EINVAL);
+
+ ret = fimc_is_get_clocks(is);
+ if (ret)
+ return ret;
+
+ /* Set rates */
+ ret = clk_set_rate(is-clock[IS_CLK_MCU_ISP_DIV0],
+ CLK_MCU_ISP_DIV0_FREQ);
+ if (ret)
+ return ret;
+ ret = clk_set_rate(is-clock[IS_CLK_MCU_ISP_DIV1],
+ CLK_MCU_ISP_DIV1_FREQ);
+ if (ret)
+ return ret;
+ ret = clk_set_rate(is-clock[IS_CLK_ISP_DIV0], CLK_ISP_DIV0_FREQ);
+ if (ret)
+ return ret;
+ ret = clk_set_rate(is-clock[IS_CLK_ISP_DIV1], CLK_ISP_DIV1_FREQ);
+ if (ret)
+ return ret;
+ ret = clk_set_rate(is-clock[IS_CLK_ISP_DIVMPWM],
+ CLK_ISP_DIVMPWM_FREQ);
+ return ret;
+}
+
+static void fimc_is_pipelines_destroy(struct fimc_is *is)
+{
+ int i;
+
+ for (i = 0; i is-drvdata-num_instance; i++)
+ fimc_is_pipeline_destroy(is-pipeline[i]);
+}
+
+static int fimc_is_parse_sensor_config(struct fimc_is *is, unsigned int index,
+ struct device_node *node)
+{
+ struct fimc_is_sensor *sensor =
[PATCH v4 08/13] [media] exynos5-fimc-is: Add sensor interface
Some sensors to be used with fimc-is are exclusively controlled
by the fimc-is firmware. This minimal sensor driver provides
the required info for the firmware to configure the sensors
sitting on I2C bus.
Signed-off-by: Arun Kumar K arun...@samsung.com
---
drivers/media/platform/exynos5-is/fimc-is-sensor.c | 45 +
drivers/media/platform/exynos5-is/fimc-is-sensor.h | 66
2 files changed, 111 insertions(+)
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-sensor.c
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-sensor.h
diff --git a/drivers/media/platform/exynos5-is/fimc-is-sensor.c
b/drivers/media/platform/exynos5-is/fimc-is-sensor.c
new file mode 100644
index 000..7df2b11
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-sensor.c
@@ -0,0 +1,45 @@
+/*
+ * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Author: Arun Kumar K arun...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include fimc-is-sensor.h
+
+static const struct sensor_drv_data s5k6a3_drvdata = {
+ .id = FIMC_IS_SENSOR_ID_S5K6A3,
+ .open_timeout = S5K6A3_OPEN_TIMEOUT,
+ .setfile_name = setfile_6a3.bin,
+};
+
+static const struct sensor_drv_data s5k4e5_drvdata = {
+ .id = FIMC_IS_SENSOR_ID_S5K4E5,
+ .open_timeout = S5K4E5_OPEN_TIMEOUT,
+ .setfile_name = setfile_4e5.bin,
+};
+
+static const struct of_device_id fimc_is_sensor_of_ids[] = {
+ {
+ .compatible = samsung,s5k6a3,
+ .data = s5k6a3_drvdata,
+ },
+ {
+ .compatible = samsung,s5k4e5,
+ .data = s5k4e5_drvdata,
+ },
+ { }
+};
+
+const struct sensor_drv_data *exynos5_is_sensor_get_drvdata(
+ struct device_node *node)
+{
+ const struct of_device_id *of_id;
+
+ of_id = of_match_node(fimc_is_sensor_of_ids, node);
+ return of_id ? of_id-data : NULL;
+}
diff --git a/drivers/media/platform/exynos5-is/fimc-is-sensor.h
b/drivers/media/platform/exynos5-is/fimc-is-sensor.h
new file mode 100644
index 000..736ef16
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-sensor.h
@@ -0,0 +1,66 @@
+/*
+ * Samsung EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ *
+ * Author: Arun Kumar K arun...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef FIMC_IS_SENSOR_H_
+#define FIMC_IS_SENSOR_H_
+
+#include linux/of.h
+#include linux/types.h
+
+#define S5K6A3_OPEN_TIMEOUT2000 /* ms */
+#define S5K6A3_SENSOR_WIDTH1392
+#define S5K6A3_SENSOR_HEIGHT 1392
+
+#define S5K4E5_OPEN_TIMEOUT2000 /* ms */
+#define S5K4E5_SENSOR_WIDTH2560
+#define S5K4E5_SENSOR_HEIGHT 1920
+
+#define SENSOR_WIDTH_PADDING 16
+#define SENSOR_HEIGHT_PADDING 10
+
+enum fimc_is_sensor_id {
+ FIMC_IS_SENSOR_ID_S5K3H2 = 1,
+ FIMC_IS_SENSOR_ID_S5K6A3,
+ FIMC_IS_SENSOR_ID_S5K4E5,
+ FIMC_IS_SENSOR_ID_S5K3H7,
+ FIMC_IS_SENSOR_ID_CUSTOM,
+ FIMC_IS_SENSOR_ID_END
+};
+
+struct sensor_drv_data {
+ enum fimc_is_sensor_id id;
+ /* sensor open timeout in ms */
+ unsigned short open_timeout;
+ char *setfile_name;
+};
+
+/**
+ * struct fimc_is_sensor - fimc-is sensor data structure
+ * @drvdata: a pointer to the sensor's parameters data structure
+ * @i2c_bus: ISP I2C bus index (0...1)
+ * @width: sensor active width
+ * @height: sensor active height
+ * @pixel_width: sensor effective pixel width (width + padding)
+ * @pixel_height: sensor effective pixel height (height + padding)
+ */
+struct fimc_is_sensor {
+ const struct sensor_drv_data *drvdata;
+ unsigned int i2c_bus;
+ unsigned int width;
+ unsigned int height;
+ unsigned int pixel_width;
+ unsigned int pixel_height;
+};
+
+const struct sensor_drv_data *exynos5_is_sensor_get_drvdata(
+ struct device_node *node);
+
+#endif /* FIMC_IS_SENSOR_H_ */
--
1.7.9.5
--
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[PATCH v4 06/13] [media] exynos5-fimc-is: Add isp subdev
fimc-is driver takes video data input from the ISP video node
which is added in this patch. This node accepts Bayer input
buffers which is given from the IS sensors.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Kilyeon Im kilyeon...@samsung.com
---
drivers/media/platform/exynos5-is/fimc-is-isp.c | 516 +++
drivers/media/platform/exynos5-is/fimc-is-isp.h | 90
2 files changed, 606 insertions(+)
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-isp.c
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-isp.h
diff --git a/drivers/media/platform/exynos5-is/fimc-is-isp.c
b/drivers/media/platform/exynos5-is/fimc-is-isp.c
new file mode 100644
index 000..afbf4a2
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-isp.c
@@ -0,0 +1,516 @@
+/*
+ * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Arun Kumar K arun...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include media/v4l2-ioctl.h
+#include media/videobuf2-dma-contig.h
+
+#include fimc-is.h
+
+#define ISP_DRV_NAME fimc-is-isp
+
+static const struct fimc_is_fmt formats[] = {
+ {
+ .name = Bayer GR-BG 8bits,
+ .fourcc = V4L2_PIX_FMT_SGRBG8,
+ .depth = { 8 },
+ .num_planes = 1,
+ },
+ {
+ .name = Bayer GR-BG 10bits,
+ .fourcc = V4L2_PIX_FMT_SGRBG10,
+ .depth = { 16 },
+ .num_planes = 1,
+ },
+ {
+ .name = Bayer GR-BG 12bits,
+ .fourcc = V4L2_PIX_FMT_SGRBG12,
+ .depth = { 16 },
+ .num_planes = 1,
+ },
+};
+#define NUM_FORMATS ARRAY_SIZE(formats)
+
+static const struct fimc_is_fmt *find_format(struct v4l2_format *f)
+{
+ unsigned int i;
+
+ for (i = 0; i NUM_FORMATS; i++)
+ if (formats[i].fourcc == f-fmt.pix_mp.pixelformat)
+ return formats[i];
+ return NULL;
+}
+
+static int isp_video_output_start_streaming(struct vb2_queue *vq,
+ unsigned int count)
+{
+ struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
+
+ set_bit(STATE_RUNNING, isp-output_state);
+ return 0;
+}
+
+static int isp_video_output_stop_streaming(struct vb2_queue *vq)
+{
+ struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
+ struct fimc_is_buf *buf;
+
+ /* Release un-used buffers */
+ while (!list_empty(isp-wait_queue)) {
+ buf = fimc_is_isp_wait_queue_get(isp);
+ vb2_buffer_done(buf-vb, VB2_BUF_STATE_ERROR);
+ }
+ while (!list_empty(isp-run_queue)) {
+ buf = fimc_is_isp_run_queue_get(isp);
+ vb2_buffer_done(buf-vb, VB2_BUF_STATE_ERROR);
+ }
+
+ clear_bit(STATE_RUNNING, isp-output_state);
+ return 0;
+}
+
+static int isp_video_output_queue_setup(struct vb2_queue *vq,
+ const struct v4l2_format *pfmt,
+ unsigned int *num_buffers, unsigned int *num_planes,
+ unsigned int sizes[], void *allocators[])
+{
+ struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
+ const struct fimc_is_fmt *fmt = isp-fmt;
+ unsigned int wh, i;
+
+ if (!fmt)
+ return -EINVAL;
+
+ *num_planes = fmt-num_planes;
+ wh = isp-width * isp-height;
+
+ for (i = 0; i *num_planes; i++) {
+ allocators[i] = isp-alloc_ctx;
+ sizes[i] = (wh * fmt-depth[i]) / 8;
+ }
+ return 0;
+}
+
+static int isp_video_output_buffer_init(struct vb2_buffer *vb)
+{
+ struct fimc_is_buf *buf = container_of(vb, struct fimc_is_buf, vb);
+
+ buf-paddr[0] = vb2_dma_contig_plane_dma_addr(vb, 0);
+ return 0;
+}
+
+static void isp_video_output_buffer_queue(struct vb2_buffer *vb)
+{
+ struct vb2_queue *vq = vb-vb2_queue;
+ struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
+ struct fimc_is_buf *buf = container_of(vb, struct fimc_is_buf, vb);
+
+ fimc_is_pipeline_buf_lock(isp-pipeline);
+ fimc_is_isp_wait_queue_add(isp, buf);
+ fimc_is_pipeline_buf_unlock(isp-pipeline);
+
+ /* Call shot command */
+ fimc_is_pipeline_shot(isp-pipeline);
+}
+
+static const struct vb2_ops isp_video_output_qops = {
+ .queue_setup = isp_video_output_queue_setup,
+ .buf_init= isp_video_output_buffer_init,
+ .buf_queue = isp_video_output_buffer_queue,
+ .wait_prepare= vb2_ops_wait_prepare,
+ .wait_finish = vb2_ops_wait_finish,
+ .start_streaming = isp_video_output_start_streaming,
+
[PATCH v4 07/13] [media] exynos5-fimc-is: Add scaler subdev
FIMC-IS has two hardware scalers named as scaler-codec and
scaler-preview. This patch adds the common code handling the
video nodes and subdevs of both the scalers.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Kilyeon Im kilyeon...@samsung.com
---
drivers/media/platform/exynos5-is/fimc-is-scaler.c | 449
drivers/media/platform/exynos5-is/fimc-is-scaler.h | 106 +
2 files changed, 555 insertions(+)
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-scaler.c
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-scaler.h
diff --git a/drivers/media/platform/exynos5-is/fimc-is-scaler.c
b/drivers/media/platform/exynos5-is/fimc-is-scaler.c
new file mode 100644
index 000..c9bd07b
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-scaler.c
@@ -0,0 +1,449 @@
+/*
+ * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Arun Kumar K arun...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include media/v4l2-ioctl.h
+#include media/videobuf2-dma-contig.h
+
+#include fimc-is.h
+
+#define IS_SCALER_DRV_NAME fimc-is-scaler
+
+static const struct fimc_is_fmt formats[] = {
+ {
+ .name = YUV 4:2:0 3p MultiPlanar,
+ .fourcc = V4L2_PIX_FMT_YUV420M,
+ .depth = {8, 2, 2},
+ .num_planes = 3,
+ },
+ {
+ .name = YUV 4:2:0 2p MultiPlanar,
+ .fourcc = V4L2_PIX_FMT_NV12M,
+ .depth = {8, 4},
+ .num_planes = 2,
+ },
+ {
+ .name = YUV 4:2:2 1p MultiPlanar,
+ .fourcc = V4L2_PIX_FMT_NV16,
+ .depth = {16},
+ .num_planes = 1,
+ },
+};
+#define NUM_FORMATS ARRAY_SIZE(formats)
+
+static const struct fimc_is_fmt *find_format(struct v4l2_format *f)
+{
+ unsigned int i;
+
+ for (i = 0; i NUM_FORMATS; i++) {
+ if (formats[i].fourcc == f-fmt.pix_mp.pixelformat)
+ return formats[i];
+ }
+ return NULL;
+}
+
+static int scaler_video_capture_start_streaming(struct vb2_queue *vq,
+ unsigned int count)
+{
+ struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
+ int ret;
+
+ ret = fimc_is_pipeline_scaler_start(ctx-pipeline,
+ ctx-scaler_id,
+ vq-num_buffers,
+ ctx-fmt-num_planes);
+ if (ret) {
+ v4l2_err(ctx-subdev, Scaler start failed.\n);
+ return -EINVAL;
+ }
+
+ set_bit(STATE_RUNNING, ctx-capture_state);
+ return 0;
+}
+
+static int scaler_video_capture_stop_streaming(struct vb2_queue *vq)
+{
+ struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
+ struct fimc_is_buf *buf;
+ int ret;
+
+ ret = fimc_is_pipeline_scaler_stop(ctx-pipeline, ctx-scaler_id);
+ if (ret)
+ v4l2_info(ctx-subdev, Scaler already stopped.\n);
+
+ /* Release un-used buffers */
+ while (!list_empty(ctx-wait_queue)) {
+ buf = fimc_is_scaler_wait_queue_get(ctx);
+ vb2_buffer_done(buf-vb, VB2_BUF_STATE_ERROR);
+ }
+ while (!list_empty(ctx-run_queue)) {
+ buf = fimc_is_scaler_run_queue_get(ctx);
+ vb2_buffer_done(buf-vb, VB2_BUF_STATE_ERROR);
+ }
+
+ clear_bit(STATE_RUNNING, ctx-capture_state);
+ return 0;
+}
+
+static int scaler_video_capture_queue_setup(struct vb2_queue *vq,
+ const struct v4l2_format *pfmt,
+ unsigned int *num_buffers, unsigned int *num_planes,
+ unsigned int sizes[], void *allocators[])
+{
+ struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
+ const struct fimc_is_fmt *fmt = ctx-fmt;
+ unsigned int wh;
+ int i;
+
+ if (!fmt)
+ return -EINVAL;
+
+ *num_planes = fmt-num_planes;
+ wh = ctx-width * ctx-height;
+
+ for (i = 0; i *num_planes; i++) {
+ allocators[i] = ctx-alloc_ctx;
+ sizes[i] = (wh * fmt-depth[i]) / 8;
+ }
+ return 0;
+}
+
+static int scaler_video_capture_buffer_init(struct vb2_buffer *vb)
+{
+ struct vb2_queue *vq = vb-vb2_queue;
+ struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
+ struct fimc_is_buf *buf = container_of(vb, struct fimc_is_buf, vb);
+ const struct fimc_is_fmt *fmt;
+ int i;
+
+ fmt = ctx-fmt;
+ for (i = 0; i fmt-num_planes; i++)
+ buf-paddr[i] = vb2_dma_contig_plane_dma_addr(vb, i);
+
+ return 0;
+}
+
+static void
[PATCH v4 10/13] [media] exynos5-fimc-is: Add the hardware interface module
The hardware interface module finally sends the commands to the
FIMC-IS firmware and runs the interrupt handler for getting the
responses.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Kilyeon Im kilyeon...@samsung.com
---
.../media/platform/exynos5-is/fimc-is-interface.c | 810
.../media/platform/exynos5-is/fimc-is-interface.h | 125 +++
2 files changed, 935 insertions(+)
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-interface.c
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-interface.h
diff --git a/drivers/media/platform/exynos5-is/fimc-is-interface.c
b/drivers/media/platform/exynos5-is/fimc-is-interface.c
new file mode 100644
index 000..9fcf89d
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-interface.c
@@ -0,0 +1,810 @@
+/*
+ * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
+*
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Kil-yeon Lim kilyeon...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/debugfs.h
+#include linux/seq_file.h
+#include fimc-is.h
+#include fimc-is-cmd.h
+#include fimc-is-regs.h
+
+#define init_request_barrier(itf) mutex_init(itf-request_barrier)
+#define enter_request_barrier(itf) mutex_lock(itf-request_barrier)
+#define exit_request_barrier(itf) mutex_unlock(itf-request_barrier)
+
+static inline void itf_get_cmd(struct fimc_is_interface *itf,
+ struct fimc_is_msg *msg, unsigned int index)
+{
+ struct is_common_reg __iomem *com_regs = itf-com_regs;
+
+ memset(msg, 0, sizeof(*msg));
+
+ switch (index) {
+ case INTR_GENERAL:
+ msg-command = com_regs-ihcmd;
+ msg-instance = com_regs-ihc_sensorid;
+ memcpy(msg-param, com_regs-ihc_param,
+ 4 * sizeof(msg-param[0]));
+ break;
+ case INTR_SCC_FDONE:
+ msg-command = IHC_FRAME_DONE;
+ msg-instance = com_regs-scc_sensor_id;
+ memcpy(msg-param, com_regs-scc_param,
+ 3 * sizeof(msg-param[0]));
+ break;
+ case INTR_SCP_FDONE:
+ msg-command = IHC_FRAME_DONE;
+ msg-instance = com_regs-scp_sensor_id;
+ memcpy(msg-param, com_regs-scp_param,
+ 3 * sizeof(msg-param[0]));
+ break;
+ case INTR_META_DONE:
+ msg-command = IHC_FRAME_DONE;
+ msg-instance = com_regs-meta_sensor_id;
+ msg-param[0] = com_regs-meta_param1;
+ break;
+ case INTR_SHOT_DONE:
+ msg-command = IHC_FRAME_DONE;
+ msg-instance = com_regs-shot_sensor_id;
+ memcpy(msg-param, com_regs-shot_param,
+ 2 * sizeof(msg-param[0]));
+ break;
+ default:
+ dev_err(itf-dev, %s Unknown command\n, __func__);
+ break;
+ }
+}
+
+static inline unsigned int itf_get_intr(struct fimc_is_interface *itf)
+{
+ unsigned int status;
+ struct is_common_reg __iomem *com_regs = itf-com_regs;
+
+ status = readl(itf-regs + INTMSR1) | com_regs-ihcmd_iflag |
+ com_regs-scc_iflag |
+ com_regs-scp_iflag |
+ com_regs-meta_iflag |
+ com_regs-shot_iflag;
+
+ return status;
+}
+
+static void itf_set_state(struct fimc_is_interface *itf,
+ unsigned long state)
+{
+ unsigned long flags;
+ spin_lock_irqsave(itf-slock_state, flags);
+ __set_bit(state, itf-state);
+ spin_unlock_irqrestore(itf-slock_state, flags);
+}
+
+static void itf_clr_state(struct fimc_is_interface *itf,
+ unsigned long state)
+{
+ unsigned long flags;
+ spin_lock_irqsave(itf-slock_state, flags);
+ __clear_bit(state, itf-state);
+ spin_unlock_irqrestore(itf-slock_state, flags);
+}
+
+static int itf_get_state(struct fimc_is_interface *itf,
+ unsigned long state)
+{
+ int ret = 0;
+ unsigned long flags;
+
+ spin_lock_irqsave(itf-slock_state, flags);
+ ret = test_bit(state, itf-state);
+ spin_unlock_irqrestore(itf-slock_state, flags);
+ return ret;
+}
+
+static void itf_init_wakeup(struct fimc_is_interface *itf)
+{
+ itf_set_state(itf, IS_IF_STATE_INIT);
+ wake_up(itf-irq_queue);
+}
+
+void itf_busy_wakeup(struct fimc_is_interface *itf)
+{
+ itf_clr_state(itf, IS_IF_STATE_BUSY);
+ wake_up(itf-irq_queue);
+}
+
+static int itf_wait_hw_ready(struct fimc_is_interface *itf)
+{
+ int t;
+ for (t = TRY_RECV_AWARE_COUNT; t = 0; t--) {
+ unsigned int cfg = readl(itf-regs + INTMSR0);
+ if (INTMSR0_GET_INTMSD(0, cfg) == 0)
+
[PATCH v4 12/13] V4L: s5k6a3: Change sensor min/max resolutions
s5k6a3 sensor has actual pixel resolution of 1408x1402 against the active resolution 1392x1392. The real resolution is needed when raw sensor SRGB data is dumped to memory by fimc-lite. Signed-off-by: Arun Kumar K arun...@samsung.com --- drivers/media/i2c/s5k6a3.c | 21 + 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/media/i2c/s5k6a3.c b/drivers/media/i2c/s5k6a3.c index ccbb4fc..6dec2ec 100644 --- a/drivers/media/i2c/s5k6a3.c +++ b/drivers/media/i2c/s5k6a3.c @@ -25,10 +25,14 @@ #include media/v4l2-async.h #include media/v4l2-subdev.h -#define S5K6A3_SENSOR_MAX_WIDTH1392 -#define S5K6A3_SENSOR_MAX_HEIGHT 1392 -#define S5K6A3_SENSOR_MIN_WIDTH32 -#define S5K6A3_SENSOR_MIN_HEIGHT 32 +#define S5K6A3_SENSOR_MAX_WIDTH1408 +#define S5K6A3_SENSOR_MAX_HEIGHT 1408 + +#define S5K6A3_SENSOR_ACTIVE_WIDTH 1392 +#define S5K6A3_SENSOR_ACTIVE_HEIGHT1392 + +#define S5K6A3_SENSOR_MIN_WIDTH(32 + 16) +#define S5K6A3_SENSOR_MIN_HEIGHT (32 + 10) #define S5K6A3_DEF_PIX_WIDTH 1296 #define S5K6A3_DEF_PIX_HEIGHT 732 @@ -107,10 +111,11 @@ static void s5k6a3_try_format(struct v4l2_mbus_framefmt *mf) fmt = find_sensor_format(mf); mf-code = fmt-code; - v4l_bound_align_image(mf-width, S5K6A3_SENSOR_MIN_WIDTH, - S5K6A3_SENSOR_MAX_WIDTH, 0, - mf-height, S5K6A3_SENSOR_MIN_HEIGHT, - S5K6A3_SENSOR_MAX_HEIGHT, 0, 0); + v4l_bound_align_image(mf-width, + S5K6A3_SENSOR_MIN_WIDTH, S5K6A3_SENSOR_MAX_WIDTH, 0, + mf-height, + S5K6A3_SENSOR_MIN_HEIGHT, S5K6A3_SENSOR_MAX_HEIGHT, 0, + 0); } static struct v4l2_mbus_framefmt *__s5k6a3_get_format( -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 11/13] [media] exynos5-is: Add Kconfig and Makefile
Adds Kconfig and Makefile for exynos5-is driver files. Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com Signed-off-by: Kilyeon Im kilyeon...@samsung.com Signed-off-by: Arun Kumar K arun...@samsung.com --- drivers/media/platform/Kconfig |1 + drivers/media/platform/Makefile|1 + drivers/media/platform/exynos5-is/Kconfig | 20 drivers/media/platform/exynos5-is/Makefile |7 +++ 4 files changed, 29 insertions(+) create mode 100644 drivers/media/platform/exynos5-is/Kconfig create mode 100644 drivers/media/platform/exynos5-is/Makefile diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index 08de865..4b0475e 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -123,6 +123,7 @@ config VIDEO_S3C_CAMIF source drivers/media/platform/soc_camera/Kconfig source drivers/media/platform/exynos4-is/Kconfig +source drivers/media/platform/exynos5-is/Kconfig source drivers/media/platform/s5p-tv/Kconfig endif # V4L_PLATFORM_DRIVERS diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile index eee28dd..40bf09f 100644 --- a/drivers/media/platform/Makefile +++ b/drivers/media/platform/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_VIDEO_SAMSUNG_S5P_TV)+= s5p-tv/ obj-$(CONFIG_VIDEO_SAMSUNG_S5P_G2D)+= s5p-g2d/ obj-$(CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC) += exynos-gsc/ +obj-$(CONFIG_VIDEO_SAMSUNG_EXYNOS5_CAMERA) += exynos5-is/ obj-$(CONFIG_BLACKFIN) += blackfin/ diff --git a/drivers/media/platform/exynos5-is/Kconfig b/drivers/media/platform/exynos5-is/Kconfig new file mode 100644 index 000..c872757 --- /dev/null +++ b/drivers/media/platform/exynos5-is/Kconfig @@ -0,0 +1,20 @@ +config VIDEO_SAMSUNG_EXYNOS5_CAMERA + bool Samsung Exynos5 Media Device driver + depends on VIDEO_V4L2 VIDEO_V4L2_SUBDEV_API PM_RUNTIME + depends on VIDEO_SAMSUNG_EXYNOS4_IS + help + This is a v4l2 based media controller driver for + Exynos5 SoC. + +if VIDEO_SAMSUNG_EXYNOS5_CAMERA + +config VIDEO_SAMSUNG_EXYNOS5_FIMC_IS + tristate Samsung Exynos5 SoC FIMC-IS driver + depends on I2C OF + depends on VIDEO_EXYNOS4_FIMC_IS + select VIDEOBUF2_DMA_CONTIG + help + This is a V4L2 driver for Samsung Exynos5 SoC series Imaging + Subsystem known as FIMC-IS. + +endif #VIDEO_SAMSUNG_EXYNOS5_MDEV diff --git a/drivers/media/platform/exynos5-is/Makefile b/drivers/media/platform/exynos5-is/Makefile new file mode 100644 index 000..6cdb037 --- /dev/null +++ b/drivers/media/platform/exynos5-is/Makefile @@ -0,0 +1,7 @@ +ccflags-y += -Idrivers/media/platform/exynos4-is +exynos5-fimc-is-objs := fimc-is-core.o fimc-is-isp.o fimc-is-scaler.o +exynos5-fimc-is-objs += fimc-is-pipeline.o fimc-is-interface.o fimc-is-sensor.o +exynos-mdevice-objs := exynos5-mdev.o + +obj-$(CONFIG_VIDEO_SAMSUNG_EXYNOS5_FIMC_IS) += exynos5-fimc-is.o +obj-$(CONFIG_VIDEO_SAMSUNG_EXYNOS5_CAMERA) += exynos-mdevice.o -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 09/13] [media] exynos5-fimc-is: Add the hardware pipeline control
This patch adds the crucial hardware pipeline control for the
fimc-is driver. All the subdev nodes will call this pipeline
interfaces to reach the hardware. Responsibilities of this module
involves configuring and maintaining the hardware pipeline involving
multiple sub-ips like ISP, DRC, Scalers, ODC, 3DNR, FD etc.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Kilyeon Im kilyeon...@samsung.com
---
.../media/platform/exynos5-is/fimc-is-pipeline.c | 1691
.../media/platform/exynos5-is/fimc-is-pipeline.h | 127 ++
2 files changed, 1818 insertions(+)
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-pipeline.c
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-pipeline.h
diff --git a/drivers/media/platform/exynos5-is/fimc-is-pipeline.c
b/drivers/media/platform/exynos5-is/fimc-is-pipeline.c
new file mode 100644
index 000..e37ce56
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-pipeline.c
@@ -0,0 +1,1691 @@
+/*
+ * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
+*
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Arun Kumar K arun...@samsung.com
+ * Kil-yeon Lim kilyeon...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include fimc-is.h
+#include fimc-is-pipeline.h
+#include fimc-is-metadata.h
+#include fimc-is-regs.h
+#include fimc-is-cmd.h
+#include media/videobuf2-dma-contig.h
+#include linux/delay.h
+
+/* Default setting values */
+#define DEFAULT_PREVIEW_STILL_WIDTH1280
+#define DEFAULT_PREVIEW_STILL_HEIGHT 720
+#define DEFAULT_CAPTURE_VIDEO_WIDTH1920
+#define DEFAULT_CAPTURE_VIDEO_HEIGHT 1080
+#define DEFAULT_CAPTURE_STILL_WIDTH2560
+#define DEFAULT_CAPTURE_STILL_HEIGHT 1920
+#define DEFAULT_CAPTURE_STILL_CROP_WIDTH 2560
+#define DEFAULT_CAPTURE_STILL_CROP_HEIGHT 1440
+#define DEFAULT_PREVIEW_VIDEO_WIDTH640
+#define DEFAULT_PREVIEW_VIDEO_HEIGHT 480
+
+/* Init params for pipeline devices */
+static const struct sensor_param init_sensor_param = {
+ .frame_rate = {
+ .frame_rate = 30,
+ },
+};
+
+static const struct isp_param init_isp_param = {
+ .control = {
+ .cmd = CONTROL_COMMAND_START,
+ .bypass = CONTROL_BYPASS_DISABLE,
+ },
+ .otf_input = {
+ .cmd = OTF_INPUT_COMMAND_DISABLE,
+ .width = DEFAULT_CAPTURE_STILL_WIDTH,
+ .height = DEFAULT_CAPTURE_STILL_HEIGHT,
+ .format = OTF_INPUT_FORMAT_BAYER,
+ .bitwidth = OTF_INPUT_BIT_WIDTH_10BIT,
+ .order = OTF_INPUT_ORDER_BAYER_GR_BG,
+ .frametime_max = 3,
+ },
+ .dma1_input = {
+ .cmd = DMA_INPUT_COMMAND_DISABLE,
+ },
+ .dma2_input = {
+ .cmd = DMA_INPUT_COMMAND_DISABLE,
+ },
+ .aa = {
+ .cmd = ISP_AA_COMMAND_START,
+ .target = ISP_AA_TARGET_AF | ISP_AA_TARGET_AE |
+ ISP_AA_TARGET_AWB,
+ .mode = ISP_AF_CONTINUOUS,
+ },
+ .flash = {
+ .cmd = ISP_FLASH_COMMAND_DISABLE,
+ .redeye = ISP_FLASH_REDEYE_DISABLE,
+ },
+ .awb = {
+ .cmd = ISP_AWB_COMMAND_AUTO,
+ },
+ .effect = {
+ .cmd = ISP_IMAGE_EFFECT_DISABLE,
+ },
+ .iso = {
+ .cmd = ISP_ISO_COMMAND_AUTO,
+ },
+ .adjust = {
+ .cmd = ISP_ADJUST_COMMAND_AUTO,
+ },
+ .metering = {
+ .cmd = ISP_METERING_COMMAND_CENTER,
+ .win_width = DEFAULT_CAPTURE_STILL_WIDTH,
+ .win_height = DEFAULT_CAPTURE_STILL_HEIGHT,
+ },
+ .afc = {
+ .cmd = ISP_AFC_COMMAND_AUTO,
+ },
+ .otf_output = {
+ .cmd = OTF_OUTPUT_COMMAND_ENABLE,
+ .width = DEFAULT_CAPTURE_STILL_WIDTH,
+ .height = DEFAULT_CAPTURE_STILL_HEIGHT,
+ .format = OTF_OUTPUT_FORMAT_YUV444,
+ .bitwidth = OTF_OUTPUT_BIT_WIDTH_12BIT,
+ .order = OTF_OUTPUT_ORDER_BAYER_GR_BG,
+ },
+ .dma1_output = {
+ .cmd = DMA_OUTPUT_COMMAND_DISABLE,
+ .width = DEFAULT_CAPTURE_STILL_WIDTH,
+ .height = DEFAULT_CAPTURE_STILL_HEIGHT,
+ .format = DMA_INPUT_FORMAT_YUV444,
+ .bitwidth = DMA_INPUT_BIT_WIDTH_8BIT,
+ .plane = 1,
+ .order = DMA_INPUT_ORDER_YCBCR,
+ },
+ .dma2_output = {
+ .cmd = DMA_OUTPUT_COMMAND_DISABLE,
+ .width = DEFAULT_CAPTURE_STILL_WIDTH,
+ .height = DEFAULT_CAPTURE_STILL_HEIGHT,
+ .format = DMA_OUTPUT_FORMAT_BAYER,
+
[PATCH v4 13/13] V4L: Add driver for s5k4e5 image sensor
This patch adds subdev driver for Samsung S5K4E5 raw image sensor.
Like s5k6a3, it is also another fimc-is firmware controlled
sensor. This minimal sensor driver doesn't do any I2C communications
as its done by ISP firmware. It can be updated if needed to a
regular sensor driver by adding the I2C communication.
Signed-off-by: Arun Kumar K arun...@samsung.com
---
.../devicetree/bindings/media/i2c/s5k4e5.txt | 44 +++
drivers/media/i2c/Kconfig |8 +
drivers/media/i2c/Makefile |1 +
drivers/media/i2c/s5k4e5.c | 361
4 files changed, 414 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/i2c/s5k4e5.txt
create mode 100644 drivers/media/i2c/s5k4e5.c
diff --git a/Documentation/devicetree/bindings/media/i2c/s5k4e5.txt
b/Documentation/devicetree/bindings/media/i2c/s5k4e5.txt
new file mode 100644
index 000..88dd726
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/i2c/s5k4e5.txt
@@ -0,0 +1,44 @@
+* Samsung S5K4E5 Raw Image Sensor
+
+S5K4E5 is a raw image sensor with maximum resolution of 2560x1920
+pixels. Data transfer is carried out via MIPI-CSI2 port and controls
+via I2C bus.
+
+Required Properties:
+- compatible : must be samsung,s5k4e5
+- reg : I2C device address
+- gpios: reset gpio pin
+- clocks : clock specifier for the clock-names property.
+- clock-names : must contain mclk entry and matching clock property
+ entry.
+- svdda-supply : core voltage supply
+- svddio-supply: I/O voltage supply
+
+Optional Properties:
+- clock-frequency : operating frequency for the sensor
+default value will be taken if not provided.
+
+The device node should be added to their control bus controller (e.g.
+I2C0) nodes and linked to the csis port node, using the common video
+interfaces bindings, defined in video-interfaces.txt.
+
+Example:
+
+ i2c-isp@1313 {
+ s5k4e5@20 {
+ compatible = samsung,s5k4e5;
+ reg = 0x20;
+ gpios = gpx1 2 1;
+ clock-frequency = 2400;
+ clocks = clock 129;
+ clock-names = mclk;
+ svdda-supply = ...;
+ svddio-supply = ...;
+ port {
+ is_s5k4e5_ep: endpoint {
+ data-lanes = 1 2 3 4;
+ remote-endpoint = csis0_ep;
+ };
+ };
+ };
+ };
diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index f7e9147..271028b 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -572,6 +572,14 @@ config VIDEO_S5K6A3
This is a V4L2 sensor-level driver for Samsung S5K6A3 raw
camera sensor.
+config VIDEO_S5K4E5
+ tristate Samsung S5K4E5 sensor support
+ depends on MEDIA_CAMERA_SUPPORT
+ depends on I2C VIDEO_V4L2 VIDEO_V4L2_SUBDEV_API OF
+ ---help---
+ This is a V4L2 sensor-level driver for Samsung S5K4E5 raw
+ camera sensor.
+
config VIDEO_S5K4ECGX
tristate Samsung S5K4ECGX sensor support
depends on I2C VIDEO_V4L2 VIDEO_V4L2_SUBDEV_API
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index cf3cf03..0aeed8e 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -65,6 +65,7 @@ obj-$(CONFIG_VIDEO_SR030PC30) += sr030pc30.o
obj-$(CONFIG_VIDEO_NOON010PC30)+= noon010pc30.o
obj-$(CONFIG_VIDEO_S5K6AA) += s5k6aa.o
obj-$(CONFIG_VIDEO_S5K6A3) += s5k6a3.o
+obj-$(CONFIG_VIDEO_S5K4E5) += s5k4e5.o
obj-$(CONFIG_VIDEO_S5K4ECGX) += s5k4ecgx.o
obj-$(CONFIG_VIDEO_S5C73M3)+= s5c73m3/
obj-$(CONFIG_VIDEO_ADP1653)+= adp1653.o
diff --git a/drivers/media/i2c/s5k4e5.c b/drivers/media/i2c/s5k4e5.c
new file mode 100644
index 000..0a6ece6
--- /dev/null
+++ b/drivers/media/i2c/s5k4e5.c
@@ -0,0 +1,361 @@
+/*
+ * Samsung S5K4E5 image sensor driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Author: Arun Kumar K arun...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/clk.h
+#include linux/delay.h
+#include linux/device.h
+#include linux/errno.h
+#include linux/gpio.h
+#include linux/i2c.h
+#include linux/kernel.h
+#include linux/module.h
+#include linux/of_gpio.h
+#include linux/pm_runtime.h
+#include linux/regulator/consumer.h
+#include linux/slab.h
+#include linux/videodev2.h
+#include media/v4l2-async.h
+#include media/v4l2-subdev.h
+
+#define S5K4E5_SENSOR_MAX_WIDTH2576
+#define S5K4E5_SENSOR_MAX_HEIGHT 1930
+
Каким образом покинуть шмалить?
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[PATCH V3 4/7] ARM: dts: exynos5250: move common i2s properties to exynos5 dtsi
I2S nodes shares some properties across exynos5 SoCs (exynos5250
and exyno5420). Common code is moved to exynos5.dtsi which is
included in exyno5250 and exynos5420 SoC files.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
arch/arm/boot/dts/exynos5.dtsi| 21 +
arch/arm/boot/dts/exynos5250.dtsi | 12
2 files changed, 21 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index ec384c9..c37b57d 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -191,4 +191,25 @@
#size-cells = 0;
status = disabled;
};
+
+ i2s0: i2s@0383 {
+ reg = 0x0383 0x100;
+ samsung,idma-addr = 0x0300;
+ };
+
+ i2s1: i2s@12D6 {
+ compatible = samsung,s3c6410-i2s;
+ reg = 0x12D6 0x100;
+ dmas = pdma1 12
+ pdma1 11;
+ dma-names = tx, rx;
+ };
+
+ i2s2: i2s@12D7 {
+ compatible = samsung,s3c6410-i2s;
+ reg = 0x12D7 0x100;
+ dmas = pdma0 12
+ pdma0 11;
+ dma-names = tx, rx;
+ };
};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 5b36121..3873ff7 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -394,7 +394,6 @@
i2s0: i2s@0383 {
compatible = samsung,s5pv210-i2s;
- reg = 0x0383 0x100;
dmas = pdma0 10
pdma0 9
pdma0 8;
@@ -403,17 +402,11 @@
clock_audss EXYNOS_I2S_BUS,
clock_audss EXYNOS_SCLK_I2S;
clock-names = iis, i2s_opclk0, i2s_opclk1;
- samsung,idma-addr = 0x0300;
pinctrl-names = default;
pinctrl-0 = i2s0_bus;
};
i2s1: i2s@12D6 {
- compatible = samsung,s3c6410-i2s;
- reg = 0x12D6 0x100;
- dmas = pdma1 12
- pdma1 11;
- dma-names = tx, rx;
clocks = clock 307, clock 157;
clock-names = iis, i2s_opclk0;
pinctrl-names = default;
@@ -421,11 +414,6 @@
};
i2s2: i2s@12D7 {
- compatible = samsung,s3c6410-i2s;
- reg = 0x12D7 0x100;
- dmas = pdma0 12
- pdma0 11;
- dma-names = tx, rx;
clocks = clock 308, clock 158;
clock-names = iis, i2s_opclk0;
pinctrl-names = default;
--
1.7.4.4
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[PATCH V3 3/7] ARM: dts: Add i2c bus 1 and it's audio codec child node on smdk5420
This patch adds i2c bus 1 and wm8994 codec node on i2c bus1 and the
required regulator supplies and properties on smdk5420 board.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 58 +
1 files changed, 58 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts
b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index d05de7a..e86c1ae 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -68,4 +68,62 @@
bus-width = 4;
};
};
+
+ avdd2: fixed-regulator@0 {
+ compatible = regulator-fixed;
+ regulator-name = avdd2-supply;
+ regulator-min-microvolt = 180;
+ regulator-max-microvolt = 180;
+ regulator-always-on;
+ };
+
+ cpvdd: fixed-regulator@1 {
+ compatible = regulator-fixed;
+ regulator-name = cpvdd-supply;
+ regulator-min-microvolt = 180;
+ regulator-max-microvolt = 180;
+ regulator-always-on;
+ };
+
+ dbvdd: fixed-regulator@2 {
+ compatible = regulator-fixed;
+ regulator-name = dbvdd-supply;
+ regulator-min-microvolt = 330;
+ regulator-max-microvolt = 330;
+ regulator-always-on;
+ };
+
+ spkvdd: fixed-regulator@3 {
+ compatible = regulator-fixed;
+ regulator-name = spkvdd-supply;
+ regulator-min-microvolt = 500;
+ regulator-max-microvolt = 500;
+ regulator-always-on;
+ };
+
+ i2c@12C7 {
+ status = okay;
+ samsung,i2c-sda-delay = 100;
+ samsung,i2c-max-bus-freq = 2;
+
+ eeprom@51 {
+ compatible = samsung,s524ad0xd1;
+ reg = 0x51;
+ };
+
+ wm8994: wm8994@1a {
+ compatible = wlf,wm8994;
+ reg = 0x1a;
+
+ gpio-controller;
+ #gpio-cells = 2;
+
+ AVDD2-supply = avdd2;
+ CPVDD-supply = cpvdd;
+ DBVDD-supply = dbvdd;
+ SPKVDD1-supply = spkvdd;
+ SPKVDD2-supply = spkvdd;
+ };
+ };
+
};
--
1.7.4.4
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[PATCH V3 7/7] ARM: dts: Enable sound support on smdk5420
This patch enables i2s0 and sound support on smdk5420.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts
b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index 3c56a91..a9eab45 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -136,4 +136,14 @@
};
};
+ i2s0: i2s@0383 {
+ status = okay;
+ };
+
+ sound {
+ compatible = samsung,smdk-wm8994;
+
+ samsung,i2s-controller = i2s0;
+ samsung,audio-codec = wm8994;
+ };
};
--
1.7.4.4
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[PATCH V3 6/7] ASoC: Samsung: wm8994: Register the osc clock.
This patch registers the 16MHz oscillator clock as fixed clk.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
sound/soc/samsung/smdk_wm8994.c | 12
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/sound/soc/samsung/smdk_wm8994.c b/sound/soc/samsung/smdk_wm8994.c
index 581ea4a..a6edded 100644
--- a/sound/soc/samsung/smdk_wm8994.c
+++ b/sound/soc/samsung/smdk_wm8994.c
@@ -9,6 +9,7 @@
#include ../codecs/wm8994.h
#include sound/pcm_params.h
+#include linux/clk-provider.h
#include linux/module.h
#include linux/of.h
@@ -37,6 +38,15 @@
/* SMDK has a 16.934MHZ crystal attached to WM8994 */
#define SMDK_WM8994_FREQ 16934000
+/* 16.9MHz fixed oscillator clock */
+static void init_osc_clock(void)
+{
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, osc3_clk16mhz);
+ of_fixed_clk_setup(np);
+}
+
static int smdk_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
@@ -173,6 +183,8 @@ static int smdk_audio_probe(struct platform_device *pdev)
smdk_dai[0].platform_of_node = smdk_dai[0].cpu_of_node;
}
+ init_osc_clock();
+
ret = snd_soc_register_card(card);
if (ret)
--
1.7.4.4
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[PATCH V3 2/7] ARM: dts: exynos5420: add i2s controllers
From: Andrew Bresticker abres...@chromium.org
This adds device-tree bindings for the i2s controllers on Exynos 5420.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Signed-off-by: Padmavathi Venna padm...@samsung.com
Reviewed-on: https://gerrit.chromium.org/gerrit/57713
---
arch/arm/boot/dts/exynos5420.dtsi | 32
1 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dts/exynos5420.dtsi
index c2a2bd6..286354e 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -242,4 +242,36 @@
pinctrl-names = default;
pinctrl-0 = i2c3_bus;
};
+
+ i2s_0: i2s@0383 {
+ compatible = samsung,exynos5420-i2s;
+ dmas = adma 0
+ adma 2
+ adma 1;
+ dma-names = tx, rx, tx-sec;
+ clocks = clock_audss EXYNOS_I2S_BUS,
+ clock_audss EXYNOS_I2S_BUS,
+ clock_audss EXYNOS_SCLK_I2S;
+ clock-names = iis, i2s_opclk0, i2s_opclk1;
+ pinctrl-names = default;
+ pinctrl-0 = i2s0_bus;
+ status = disabled;
+ };
+
+ i2s_1: i2s@12D6 {
+ clocks = clock 275, clock 138;
+ clock-names = iis, i2s_opclk0;
+ pinctrl-names = default;
+ pinctrl-0 = i2s1_bus;
+ status = disabled;
+ };
+
+ i2s_2: i2s@12D7 {
+ clocks = clock 276, clock 139;
+ clock-names = iis, i2s_opclk0;
+ pinctrl-names = default;
+ pinctrl-0 = i2s2_bus;
+ status = disabled;
+ };
+
};
--
1.7.4.4
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[PATCH V3 0/7] Add i2s nodes on Exynos5420 and enable sound support on sdmk5420
Changes since V2: - Seperated out driver side changes and dts changes in two patch sets - Added proper names for wm8994 regulators as commented by Mark - Moved common i2s nodes into the exynos5.dtsi - Added clock info in wm8994 node as requested by Mark. - Registered the 16.9MHz oscillator clock as fixed clock in the machine file. Right now no user of this clock but as Mark requested to add mclk info in wm8994 node, I added this part. This patch set is dependent on the following i2c, dma and audio subsystem clk controller patches. http://comments.gmane.org/gmane.linux.kernel.samsung-soc/20077 http://comments.gmane.org/gmane.linux.kernel.samsung-soc/20661 http://comments.gmane.org/gmane.linux.kernel.samsung-soc/20668 This patch set is made based on Kukjin Kim for-next branch. Andrew Bresticker (1): ARM: dts: exynos5420: add i2s controllers Padmavathi Venna (6): ARM: dts: Change i2s compatible string on exynos5250 ARM: dts: Add i2c bus 1 and it's audio codec child node on smdk5420 ARM: dts: exynos5250: move common i2s properties to exynos5 dtsi ARM: dts: Add osc clock node on smdk5420. ASoC: Samsung: wm8994: Register the osc clock. ARM: dts: Enable sound support on smdk5420 arch/arm/boot/dts/exynos5.dtsi| 21 arch/arm/boot/dts/exynos5250.dtsi | 17 +-- arch/arm/boot/dts/exynos5420-smdk5420.dts | 78 + arch/arm/boot/dts/exynos5420.dtsi | 32 sound/soc/samsung/smdk_wm8994.c | 12 + 5 files changed, 144 insertions(+), 16 deletions(-) -- 1.7.4.4 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V3 1/7] ARM: dts: Change i2s compatible string on exynos5250
This patch removes quirks from i2s node and change the i2s
compatible names.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
arch/arm/boot/dts/exynos5250.dtsi |9 +++--
1 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 48c0a88..5b36121 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -393,7 +393,7 @@
};
i2s0: i2s@0383 {
- compatible = samsung,i2s-v5;
+ compatible = samsung,s5pv210-i2s;
reg = 0x0383 0x100;
dmas = pdma0 10
pdma0 9
@@ -403,16 +403,13 @@
clock_audss EXYNOS_I2S_BUS,
clock_audss EXYNOS_SCLK_I2S;
clock-names = iis, i2s_opclk0, i2s_opclk1;
- samsung,supports-6ch;
- samsung,supports-rstclr;
- samsung,supports-secdai;
samsung,idma-addr = 0x0300;
pinctrl-names = default;
pinctrl-0 = i2s0_bus;
};
i2s1: i2s@12D6 {
- compatible = samsung,i2s-v5;
+ compatible = samsung,s3c6410-i2s;
reg = 0x12D6 0x100;
dmas = pdma1 12
pdma1 11;
@@ -424,7 +421,7 @@
};
i2s2: i2s@12D7 {
- compatible = samsung,i2s-v5;
+ compatible = samsung,s3c6410-i2s;
reg = 0x12D7 0x100;
dmas = pdma0 12
pdma0 11;
--
1.7.4.4
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[PATCH V3 5/7] ARM: dts: Add osc clock node on smdk5420.
This patch adds 16MHz oscillator clock node required for audio
on smdk5420 and adds the phandle of the same in wm8994 clock info.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts
b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index e86c1ae..3c56a91 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -31,6 +31,13 @@
};
};
+ osc3_clk16mhz: clk16mhz {
+ compatible = osc3_clk16mhz;
+ #clock-cells = 0;
+ clock-frequency = 16934400;
+ clock-output-names = osc3_clk16mhz;
+ };
+
dwmmc0@1220 {
status = okay;
num-slots = 1;
@@ -123,6 +130,9 @@
DBVDD-supply = dbvdd;
SPKVDD1-supply = spkvdd;
SPKVDD2-supply = spkvdd;
+
+ clocks = osc3_clk16mhz;
+ clock-names = mclk1;
};
};
--
1.7.4.4
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Re: [PATCH V5 17/30] thermal: exynos: Remove non DT based support
On 11 June 2013 18:23, Amit Daniel Kachhap amit.dan...@samsung.com wrote:
Recently non DT support from Exynos platform is removed and hence
removing non DT support from the driver also. This will help in easy
maintainence.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
Hello Amit,
When you remove the non-DT support why have the #ifdef CONFIG_OF in the driver
instead make the dependency in Kconfig itself.
---
drivers/thermal/samsung/exynos_tmu.c | 17 +
1 files changed, 1 insertions(+), 16 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index acbd295..4356118 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -403,19 +403,6 @@ static const struct of_device_id exynos_tmu_match[] = {
MODULE_DEVICE_TABLE(of, exynos_tmu_match);
#endif
-static struct platform_device_id exynos_tmu_driver_ids[] = {
- {
- .name = exynos4210-tmu,
- .driver_data= (kernel_ulong_t)EXYNOS4210_TMU_DRV_DATA,
- },
- {
- .name = exynos5250-tmu,
- .driver_data= (kernel_ulong_t)EXYNOS5250_TMU_DRV_DATA,
- },
- { },
-};
-MODULE_DEVICE_TABLE(platform, exynos_tmu_driver_ids);
-
static inline struct exynos_tmu_platform_data *exynos_get_driver_data(
struct platform_device *pdev)
{
@@ -428,8 +415,7 @@ static inline struct exynos_tmu_platform_data
*exynos_get_driver_data(
return (struct exynos_tmu_platform_data *) match-data;
}
#endif
- return (struct exynos_tmu_platform_data *)
- platform_get_device_id(pdev)-driver_data;
+ return NULL;
}
static int exynos_tmu_probe(struct platform_device *pdev)
@@ -586,7 +572,6 @@ static struct platform_driver exynos_tmu_driver = {
},
.probe = exynos_tmu_probe,
.remove = exynos_tmu_remove,
- .id_table = exynos_tmu_driver_ids,
};
module_platform_driver(exynos_tmu_driver);
--
1.7.1
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--
Shine bright,
(: Nav :)
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Re: [PATCH V7 23/30] thermal: exynos: Add thermal configuration data for exynos5440 TMU sensor
On 26 June 2013 06:54, Jungseok Lee jays@samsung.com wrote:
On Monday, June 24, 2013 7:51 PM, Amit Daniel Kachhap wrote:
This patch adds configuration data for exynos5440 soc. Also register
definations for the controller are added.
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Acked-by: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
drivers/thermal/samsung/exynos_tmu.c |4 ++
drivers/thermal/samsung/exynos_tmu_data.c | 71
+
drivers/thermal/samsung/exynos_tmu_data.h |7 +++
3 files changed, 82 insertions(+), 0 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index 6bc86f6..651f460 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -456,6 +456,10 @@ static const struct of_device_id exynos_tmu_match[] = {
.compatible = samsung,exynos5250-tmu,
.data = (void *)EXYNOS5250_TMU_DRV_DATA,
},
+ {
+ .compatible = samsung,exynos5440-tmu,
+ .data = (void *)EXYNOS5440_TMU_DRV_DATA,
+ },
{},
};
MODULE_DEVICE_TABLE(of, exynos_tmu_match);
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c
b/drivers/thermal/samsung/exynos_tmu_data.c
index 2612b45..5952915 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -175,3 +175,74 @@ struct exynos_tmu_init_data const
exynos5250_default_tmu_data = {
.tmu_count = 1,
};
#endif
+
+#if defined(CONFIG_SOC_EXYNOS5440)
+static const struct exynos_tmu_registers exynos5440_tmu_registers = {
+ .triminfo_data = EXYNOS5440_TMU_S0_7_TRIM,
+ .triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
+ .triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
+ .tmu_ctrl = EXYNOS5440_TMU_S0_7_CTRL,
+ .buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
+ .buf_vref_sel_mask = EXYNOS_TMU_REF_VOLTAGE_MASK,
+ .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
+ .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
+ .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
+ .buf_slope_sel_shift = EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT,
+ .buf_slope_sel_mask = EXYNOS_TMU_BUF_SLOPE_SEL_MASK,
+ .core_en_shift = EXYNOS_TMU_CORE_EN_SHIFT,
+ .tmu_status = EXYNOS5440_TMU_S0_7_STATUS,
+ .tmu_cur_temp = EXYNOS5440_TMU_S0_7_TEMP,
+ .threshold_th0 = EXYNOS5440_TMU_S0_7_TH0,
+ .threshold_th1 = EXYNOS5440_TMU_S0_7_TH1,
+ .threshold_th2 = EXYNOS5440_TMU_S0_7_TH2,
+ .threshold_th3_l0_shift = EXYNOS5440_TMU_TH_RISE4_SHIFT,
+ .tmu_inten = EXYNOS5440_TMU_S0_7_IRQEN,
+ .inten_rise_mask = EXYNOS5440_TMU_RISE_INT_MASK,
+ .inten_rise_shift = EXYNOS5440_TMU_RISE_INT_SHIFT,
+ .inten_fall_mask = EXYNOS5440_TMU_FALL_INT_MASK,
+ .inten_fall_shift = EXYNOS5440_TMU_FALL_INT_SHIFT,
+ .inten_rise0_shift = EXYNOS5440_TMU_INTEN_RISE0_SHIFT,
+ .inten_rise1_shift = EXYNOS5440_TMU_INTEN_RISE1_SHIFT,
+ .inten_rise2_shift = EXYNOS5440_TMU_INTEN_RISE2_SHIFT,
+ .inten_rise3_shift = EXYNOS5440_TMU_INTEN_RISE3_SHIFT,
+ .inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,
+ .tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,
+ .tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,
+ .tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS,
+ .emul_con = EXYNOS5440_TMU_S0_7_DEBUG,
+ .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
+ .tmu_pmin = EXYNOS5440_TMU_PMIN,
+};
+
+#define EXYNOS5440_TMU_DATA \
+ .trigger_levels[0] = 100, \
+ .trigger_levels[4] = 105, \
+ .trigger_enable[0] = 1, \
+ .trigger_type[0] = SW_TRIP, \
+ .trigger_type[4] = HW_TRIP, \
+ .max_trigger_level = 5, \
+ .gain = 5, \
+ .reference_voltage = 16, \
+ .noise_cancel_mode = 4, \
+ .cal_type = TYPE_ONE_POINT_TRIMMING, \
+ .cal_mode = 0, \
.cal_mode = SW_MODE is a clearer expression.
+ .efuse_value = 0x5b2d, \
.efuse_value should be incremented by one.
Thanks,
Jungseok Lee
+ .min_efuse_value = 16, \
+ .max_efuse_value = 76, \
+ .first_point_trim = 25, \
+ .second_point_trim = 70, \
+ .default_temp_offset = 25, \
+ .type = SOC_ARCH_EXYNOS5440, \
+ .registers = exynos5440_tmu_registers, \
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_FALLING_TRIP | \
+ TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_SHARED_MEMORY),
+
+struct exynos_tmu_init_data const exynos5440_default_tmu_data = {
+ .tmu_data = {
+ { EXYNOS5440_TMU_DATA } ,
+ { EXYNOS5440_TMU_DATA } ,
+ { EXYNOS5440_TMU_DATA } ,
+ },
+ .tmu_count = 3,
+};
+#endif
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h
b/drivers/thermal/samsung/exynos_tmu_data.h
index ad263e9..43ce5fb 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -143,4 +143,11 @@ extern
Re: [PATCH V3 6/7] ASoC: Samsung: wm8994: Register the osc clock.
On Wed, Aug 07, 2013 at 02:40:15PM +0530, Padmavathi Venna wrote:
This patch registers the 16MHz oscillator clock as fixed clk.
+/* 16.9MHz fixed oscillator clock */
+static void init_osc_clock(void)
+{
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, osc3_clk16mhz);
+ of_fixed_clk_setup(np);
+}
+
static int smdk_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
@@ -173,6 +183,8 @@ static int smdk_audio_probe(struct platform_device *pdev)
smdk_dai[0].platform_of_node = smdk_dai[0].cpu_of_node;
}
+ init_osc_clock();
+
This doesn't seem great - it means that this machine driver needs to
know about a specifically named fixed clock which makes it hard to reuse
on other similar boards. For example I'm intending to reuse this on
Arndale. Mike?
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Re: [PATCH V3 1/7] ARM: dts: Change i2s compatible string on exynos5250
On Wed, Aug 07, 2013 at 02:40:10PM +0530, Padmavathi Venna wrote: This patch removes quirks from i2s node and change the i2s compatible names. This needs to go along with the driver change otherwise we break bisection. signature.asc Description: Digital signature
Re: [PATCH V3 1/7] ARM: dts: Change i2s compatible string on exynos5250
Hi Mark, On Wed, Aug 7, 2013 at 3:40 PM, Mark Brown broo...@kernel.org wrote: On Wed, Aug 07, 2013 at 02:40:10PM +0530, Padmavathi Venna wrote: This patch removes quirks from i2s node and change the i2s compatible names. This needs to go along with the driver change otherwise we break bisection. some of the patches at dts side are dependent on this patch. So I separated it into another set. Should I re-post this patch along with other driver side patches? Thanks Padma -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V3 2/3] ASoC: Samsung: I2S: Add quirks as driver data in I2S
Hi Padmavathi,
[Ccing DT maintainers with a little comment about contents of this patch
for them:
This is a rework of Samsung i2s bindings to make them more reasonable than
they are at the moment. I know this was supposed to be stable, fixed, ABI,
etc., but as we discussed a lot the whole topic of DT bindings, we need to
sanitize existing bindings and this patch is a part of this work.]
On Wednesday 07 of August 2013 14:15:21 Padmavathi Venna wrote:
Samsung has different versions of I2S introduced in different
platforms. Each version has some new support added for multichannel,
secondary fifo, s/w reset control and internal mux for rclk src clk.
Each newly added change has a quirk. So this patch adds all the
required quirks as driver data and based on compatible string from
dtsi fetches the quirks.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
.../devicetree/bindings/sound/samsung-i2s.txt | 21 +++---
sound/soc/samsung/i2s.c| 82
+--- 2 files changed, 64 insertions(+), 39 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.txt
b/Documentation/devicetree/bindings/sound/samsung-i2s.txt index
025e66b..b3f6443 100644
--- a/Documentation/devicetree/bindings/sound/samsung-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/samsung-i2s.txt
@@ -2,7 +2,16 @@
Required SoC Specific Properties:
-- compatible : samsung,i2s-v5
+- compatible : should be one of the following.
+ - samsung,s3c6410-i2s: for 8/16/24bit stereo I2S. Previous versions
+ has only 8/16bit support.
The comment about previous versions seems a bit enigmatic.
If there is another variant supported by this driver that supports only
8/16bit audio data, then it should have a separate compatible value.
+ - samsung,s3c6410-i2sv4: for 8/16/24bit multichannel(5.1 channel)
I2S. + Introduced in s3c6410. This also applicable for s5p64x0
platforms. + - samsung,s5pc100-i2s: for 8/16/24bit multichannel(5.1
channel) I2S + with secondary fifo and s/w reset control.
+ - samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with
+ secondary fifo, s/w reset control and internal mux for root clk
src. +
- reg: physical base address of the controller and length of memory
mapped region.
- dmas: list of DMA controller phandle and DMA request line ordered
pairs. @@ -21,13 +30,6 @@ Required SoC Specific Properties:
Optional SoC Specific Properties:
-- samsung,supports-6ch: If the I2S Primary sound source has 5.1 Channel
- support, this flag is enabled.
-- samsung,supports-rstclr: This flag should be set if I2S software reset
bit - control is required. When this flag is set I2S software reset bit
will be - enabled or disabled based on need.
-- samsung,supports-secdai:If I2S block has a secondary FIFO and internal
DMA, - then this flag is enabled.
- samsung,idma-addr: Internal DMA register base address of the audio
sub system(used in secondary sound source).
- pinctrl-0: Should specify pin control groups used for this controller.
@@ -46,9 +48,6 @@ i2s0: i2s@0383 {
The example has also a compatible value set to samsung,i2s-v5. I don't
think this is compliant to the new bindings.
clock_audss EXYNOS_I2S_BUS,
clock_audss EXYNOS_SCLK_I2S;
clock-names = iis, i2s_opclk0, i2s_opclk1;
- samsung,supports-6ch;
- samsung,supports-rstclr;
- samsung,supports-secdai;
samsung,idma-addr = 0x0300;
pinctrl-names = default;
pinctrl-0 = i2s0_bus;
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 47e08dd..8a5504c 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -40,6 +40,7 @@ enum samsung_dai_type {
struct samsung_i2s_dai_data {
const struct samsung_i2s_dai_data
int dai_type;
+ u32 quirks;
};
struct i2s_dai {
@@ -1032,18 +1033,18 @@ static struct i2s_dai *i2s_alloc_dai(struct
platform_device *pdev, bool sec)
static const struct of_device_id exynos_i2s_match[];
-static inline int samsung_i2s_get_driver_data(struct platform_device
*pdev) +static inline struct samsung_i2s_dai_data
*samsung_i2s_get_driver_data( +
struct platform_device
*pdev)
{
#ifdef CONFIG_OF
- struct samsung_i2s_dai_data *data;
if (pdev-dev.of_node) {
const struct of_device_id *match;
match = of_match_node(exynos_i2s_match, pdev-dev.of_node);
- data = (struct samsung_i2s_dai_data *) match-data;
- return data-dai_type;
+ return (struct samsung_i2s_dai_data *) match-data;
If you make the dai_data const this cast will be no longer necessary.
} else
#endif
- return platform_get_device_id(pdev)-driver_data;
+ return (struct samsung_i2s_dai_data *)
+
Re: [PATCH V3 6/7] ASoC: Samsung: wm8994: Register the osc clock.
Hi Mark,
On Wed, Aug 7, 2013 at 3:40 PM, Mark Brown broo...@kernel.org wrote:
On Wed, Aug 07, 2013 at 02:40:15PM +0530, Padmavathi Venna wrote:
This patch registers the 16MHz oscillator clock as fixed clk.
+/* 16.9MHz fixed oscillator clock */
+static void init_osc_clock(void)
+{
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, osc3_clk16mhz);
+ of_fixed_clk_setup(np);
+}
+
static int smdk_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
@@ -173,6 +183,8 @@ static int smdk_audio_probe(struct platform_device *pdev)
smdk_dai[0].platform_of_node = smdk_dai[0].cpu_of_node;
}
+ init_osc_clock();
+
This doesn't seem great - it means that this machine driver needs to
Yes. True. But I am not sure of the correct place to keep this code.
Any suggestions?
Thanks
Padma
know about a specifically named fixed clock which makes it hard to reuse
on other similar boards. For example I'm intending to reuse this on
Arndale. Mike?
--
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More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V3 2/3] ASoC: Samsung: I2S: Add quirks as driver data in I2S
Ahh, one more thing inline.
On Wednesday 07 of August 2013 14:15:21 Padmavathi Venna wrote:
Samsung has different versions of I2S introduced in different
platforms. Each version has some new support added for multichannel,
secondary fifo, s/w reset control and internal mux for rclk src clk.
Each newly added change has a quirk. So this patch adds all the
required quirks as driver data and based on compatible string from
dtsi fetches the quirks.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
.../devicetree/bindings/sound/samsung-i2s.txt | 21 +++---
sound/soc/samsung/i2s.c| 82
+--- 2 files changed, 64 insertions(+), 39 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.txt
b/Documentation/devicetree/bindings/sound/samsung-i2s.txt index
025e66b..b3f6443 100644
--- a/Documentation/devicetree/bindings/sound/samsung-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/samsung-i2s.txt
@@ -2,7 +2,16 @@
Required SoC Specific Properties:
-- compatible : samsung,i2s-v5
+- compatible : should be one of the following.
+ - samsung,s3c6410-i2s: for 8/16/24bit stereo I2S. Previous versions
+ has only 8/16bit support.
+ - samsung,s3c6410-i2sv4: for 8/16/24bit multichannel(5.1 channel)
I2S. + Introduced in s3c6410. This also applicable for s5p64x0
platforms. + - samsung,s5pc100-i2s: for 8/16/24bit multichannel(5.1
channel) I2S + with secondary fifo and s/w reset control.
+ - samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with
+ secondary fifo, s/w reset control and internal mux for root clk
src. +
- reg: physical base address of the controller and length of memory
mapped region.
- dmas: list of DMA controller phandle and DMA request line ordered
pairs. @@ -21,13 +30,6 @@ Required SoC Specific Properties:
Optional SoC Specific Properties:
-- samsung,supports-6ch: If the I2S Primary sound source has 5.1 Channel
- support, this flag is enabled.
-- samsung,supports-rstclr: This flag should be set if I2S software reset
bit - control is required. When this flag is set I2S software reset bit
will be - enabled or disabled based on need.
-- samsung,supports-secdai:If I2S block has a secondary FIFO and internal
DMA, - then this flag is enabled.
- samsung,idma-addr: Internal DMA register base address of the audio
sub system(used in secondary sound source).
- pinctrl-0: Should specify pin control groups used for this controller.
@@ -46,9 +48,6 @@ i2s0: i2s@0383 {
clock_audss EXYNOS_I2S_BUS,
clock_audss EXYNOS_SCLK_I2S;
clock-names = iis, i2s_opclk0, i2s_opclk1;
- samsung,supports-6ch;
- samsung,supports-rstclr;
- samsung,supports-secdai;
samsung,idma-addr = 0x0300;
pinctrl-names = default;
pinctrl-0 = i2s0_bus;
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 47e08dd..8a5504c 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -40,6 +40,7 @@ enum samsung_dai_type {
struct samsung_i2s_dai_data {
int dai_type;
+ u32 quirks;
};
struct i2s_dai {
@@ -1032,18 +1033,18 @@ static struct i2s_dai *i2s_alloc_dai(struct
platform_device *pdev, bool sec)
static const struct of_device_id exynos_i2s_match[];
-static inline int samsung_i2s_get_driver_data(struct platform_device
*pdev) +static inline struct samsung_i2s_dai_data
*samsung_i2s_get_driver_data( +
struct platform_device
*pdev)
{
#ifdef CONFIG_OF
- struct samsung_i2s_dai_data *data;
if (pdev-dev.of_node) {
const struct of_device_id *match;
match = of_match_node(exynos_i2s_match, pdev-dev.of_node);
- data = (struct samsung_i2s_dai_data *) match-data;
- return data-dai_type;
+ return (struct samsung_i2s_dai_data *) match-data;
} else
#endif
- return platform_get_device_id(pdev)-driver_data;
+ return (struct samsung_i2s_dai_data *)
+ platform_get_device_id(pdev)-driver_data;
}
#ifdef CONFIG_PM_RUNTIME
@@ -1074,13 +1075,13 @@ static int samsung_i2s_probe(struct
platform_device *pdev) struct resource *res;
u32 regs_base, quirks = 0, idma_addr = 0;
struct device_node *np = pdev-dev.of_node;
- enum samsung_dai_type samsung_dai_type;
+ struct samsung_i2s_dai_data *i2s_dai_data;
int ret = 0;
/* Call during Seconday interface registration */
- samsung_dai_type = samsung_i2s_get_driver_data(pdev);
+ i2s_dai_data = samsung_i2s_get_driver_data(pdev);
- if (samsung_dai_type == TYPE_SEC) {
+ if (i2s_dai_data-dai_type == TYPE_SEC) {
sec_dai = dev_get_drvdata(pdev-dev);
if (!sec_dai) {
dev_err(pdev-dev, Unable to get drvdata\n);
@@ -1129,15
[PATCH] cpufreq: exynos5440: Fix to skip when new frequency same as current
This patch fixes the issue of un-necessary setting the clock controller when the new target frequency is same as the current one. This case usually occurs with governors like ondemand which passes the target frequency as the percentage of average frequency. This check is present in most of the cpufreq driver. Cc: Viresh Kumar viresh.ku...@linaro.org Cc: Rafael J. Wysocki r...@sisk.pl Cc: Kukjin Kim kgene@samsung.com Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com --- drivers/cpufreq/exynos5440-cpufreq.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/drivers/cpufreq/exynos5440-cpufreq.c b/drivers/cpufreq/exynos5440-cpufreq.c index 0c74018..d514c15 100644 --- a/drivers/cpufreq/exynos5440-cpufreq.c +++ b/drivers/cpufreq/exynos5440-cpufreq.c @@ -238,6 +238,9 @@ static int exynos_target(struct cpufreq_policy *policy, freqs.old = dvfs_info-cur_frequency; freqs.new = freq_table[index].frequency; + if (freqs.old == freqs.new) + goto out; + cpufreq_notify_transition(policy, freqs, CPUFREQ_PRECHANGE); /* Set the target frequency in all C0_3_PSTATE register */ -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V3 1/7] ARM: dts: Change i2s compatible string on exynos5250
On Wednesday 07 of August 2013 16:02:16 Padma Venkat wrote: Hi Mark, On Wed, Aug 7, 2013 at 3:40 PM, Mark Brown broo...@kernel.org wrote: On Wed, Aug 07, 2013 at 02:40:10PM +0530, Padmavathi Venna wrote: This patch removes quirks from i2s node and change the i2s compatible names. This needs to go along with the driver change otherwise we break bisection. some of the patches at dts side are dependent on this patch. So I separated it into another set. Should I re-post this patch along with other driver side patches? I fully agree with Mark. There are 2 ways of solving this: a) Do things in steps that don't break anything, i.e.: 1) add new bindings to the driver, 2) update DTS files, 3) remove old bindings from the driver. b) Do all the things above atomically, in one patch. Personally, I'm a fan of method a), but if it requires much effort then method b) can be used as a fallback. Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] cpufreq: exynos5440: Fix to skip when new frequency same as current
On 7 August 2013 16:46, Amit Daniel Kachhap amit.dan...@samsung.com wrote: This patch fixes the issue of un-necessary setting the clock controller when the new target frequency is same as the current one. This case usually occurs with governors like ondemand which passes the target frequency as the percentage of average frequency. This check is present in most of the cpufreq driver. Cc: Viresh Kumar viresh.ku...@linaro.org Cc: Rafael J. Wysocki r...@sisk.pl Cc: Kukjin Kim kgene@samsung.com Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com --- drivers/cpufreq/exynos5440-cpufreq.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) Applied. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] cpufreq: exynos5440: Fix to skip when new frequency same as current
On 07/08/13 12:22, Viresh Kumar wrote: On 7 August 2013 16:46, Amit Daniel Kachhap amit.dan...@samsung.com wrote: This patch fixes the issue of un-necessary setting the clock controller when the new target frequency is same as the current one. This case usually occurs with governors like ondemand which passes the target frequency as the percentage of average frequency. This check is present in most of the cpufreq driver. Cc: Viresh Kumar viresh.ku...@linaro.org Cc: Rafael J. Wysocki r...@sisk.pl Cc: Kukjin Kim kgene@samsung.com Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com --- drivers/cpufreq/exynos5440-cpufreq.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) Applied. Hi Viresh, Any particular reason we need this check in all drivers after your commit: 5a1c0228 cpufreq: Avoid calling cpufreq driver's target() routine if target_freq == policy-cur I think it can removed from all drivers, am I missing something ? Regards, Sudeep -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] cpufreq: exynos5440: Fix to skip when new frequency same as current
On 7 August 2013 17:00, Sudeep KarkadaNagesha sudeep.karkadanage...@arm.com wrote: Any particular reason we need this check in all drivers after your commit: 5a1c0228 cpufreq: Avoid calling cpufreq driver's target() routine if target_freq == policy-cur I think it can removed from all drivers, am I missing something ? Yeah.. Just a bit though :) So, cpufreq core checks this when we call target for any frequency. Now, cpufreq driver actually does a cpufreq_frequency_table_target() and so the frequency may vary than what is requested, in case requested frequency isn't picked from the table. In such cases we check it again to be sure that we aren't at this frequency already.. Earlier I thought of calling cpufreq_frequency_table_target() in the core before calling target but dropped the idea as I wasn't sure of the side effects. @Rafael: Do you see why we shouldn't/can't call cpufreq_frequency_table_target() from the core itself and so drivers never need to do it? -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V3 2/3] ASoC: Samsung: I2S: Add quirks as driver data in I2S
Hi Tomasz,
On Wed, Aug 7, 2013 at 4:32 PM, Tomasz Figa t.f...@samsung.com wrote:
Hi Padmavathi,
[Ccing DT maintainers with a little comment about contents of this patch
for them:
This is a rework of Samsung i2s bindings to make them more reasonable than
they are at the moment. I know this was supposed to be stable, fixed, ABI,
etc., but as we discussed a lot the whole topic of DT bindings, we need to
sanitize existing bindings and this patch is a part of this work.]
[snip]
Required SoC Specific Properties:
-- compatible : samsung,i2s-v5
+- compatible : should be one of the following.
+ - samsung,s3c6410-i2s: for 8/16/24bit stereo I2S. Previous versions
+ has only 8/16bit support.
The comment about previous versions seems a bit enigmatic.
If there is another variant supported by this driver that supports only
8/16bit audio data, then it should have a separate compatible value.
For previous i2s controllers there are two other i2s drivers
available. I think I can delete this comment here.
+ - samsung,s3c6410-i2sv4: for 8/16/24bit multichannel(5.1 channel)
I2S. + Introduced in s3c6410. This also applicable for s5p64x0
platforms. + - samsung,s5pc100-i2s: for 8/16/24bit multichannel(5.1
channel) I2S + with secondary fifo and s/w reset control.
+ - samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with
+ secondary fifo, s/w reset control and internal mux for root clk
src. +
- reg: physical base address of the controller and length of memory
mapped region.
- dmas: list of DMA controller phandle and DMA request line ordered
pairs. @@ -21,13 +30,6 @@ Required SoC Specific Properties:
Optional SoC Specific Properties:
-- samsung,supports-6ch: If the I2S Primary sound source has 5.1 Channel
- support, this flag is enabled.
-- samsung,supports-rstclr: This flag should be set if I2S software reset
bit - control is required. When this flag is set I2S software reset bit
will be - enabled or disabled based on need.
-- samsung,supports-secdai:If I2S block has a secondary FIFO and internal
DMA, - then this flag is enabled.
- samsung,idma-addr: Internal DMA register base address of the audio
sub system(used in secondary sound source).
- pinctrl-0: Should specify pin control groups used for this controller.
@@ -46,9 +48,6 @@ i2s0: i2s@0383 {
The example has also a compatible value set to samsung,i2s-v5. I don't
think this is compliant to the new bindings.
Yes. It's my mistake. Will change this to new one.
clock_audss EXYNOS_I2S_BUS,
clock_audss EXYNOS_SCLK_I2S;
clock-names = iis, i2s_opclk0, i2s_opclk1;
- samsung,supports-6ch;
- samsung,supports-rstclr;
- samsung,supports-secdai;
samsung,idma-addr = 0x0300;
pinctrl-names = default;
pinctrl-0 = i2s0_bus;
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 47e08dd..8a5504c 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -40,6 +40,7 @@ enum samsung_dai_type {
struct samsung_i2s_dai_data {
const struct samsung_i2s_dai_data
OK.
int dai_type;
+ u32 quirks;
};
struct i2s_dai {
@@ -1032,18 +1033,18 @@ static struct i2s_dai *i2s_alloc_dai(struct
platform_device *pdev, bool sec)
static const struct of_device_id exynos_i2s_match[];
-static inline int samsung_i2s_get_driver_data(struct platform_device
*pdev) +static inline struct samsung_i2s_dai_data
*samsung_i2s_get_driver_data( +
struct platform_device
*pdev)
{
#ifdef CONFIG_OF
- struct samsung_i2s_dai_data *data;
if (pdev-dev.of_node) {
const struct of_device_id *match;
match = of_match_node(exynos_i2s_match, pdev-dev.of_node);
- data = (struct samsung_i2s_dai_data *) match-data;
- return data-dai_type;
+ return (struct samsung_i2s_dai_data *) match-data;
If you make the dai_data const this cast will be no longer necessary.
} else
#endif
- return platform_get_device_id(pdev)-driver_data;
+ return (struct samsung_i2s_dai_data *)
+ platform_get_device_id(pdev)-driver_data;
}
#ifdef CONFIG_PM_RUNTIME
@@ -1074,13 +1075,13 @@ static int samsung_i2s_probe(struct
platform_device *pdev) struct resource *res;
u32 regs_base, quirks = 0, idma_addr = 0;
struct device_node *np = pdev-dev.of_node;
- enum samsung_dai_type samsung_dai_type;
+ struct samsung_i2s_dai_data *i2s_dai_data;
const
OK.
int ret = 0;
/* Call during Seconday interface registration */
- samsung_dai_type = samsung_i2s_get_driver_data(pdev);
+ i2s_dai_data = samsung_i2s_get_driver_data(pdev);
- if (samsung_dai_type == TYPE_SEC) {
+ if (i2s_dai_data-dai_type == TYPE_SEC) {
sec_dai = dev_get_drvdata(pdev-dev);
if (!sec_dai) {
[PATCH] [media] exynos-gsc: fix s2r functionality
From: Prathyush K prathyus...@samsung.com
When gsc is in runtime suspended state, there is no need to call
m2m_suspend during suspend and similarily, there is no need to call
m2m_resume during resume if already in runtime suspended state. This
patch adds the necessary conditions to achieve this.
Signed-off-by: Prathyush K prathyus...@samsung.com
Signed-off-by: Arun Mankuzhi aru...@samsung.com
Signed-off-by: Arun Kumar K arun...@samsung.com
---
drivers/media/platform/exynos-gsc/gsc-core.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/media/platform/exynos-gsc/gsc-core.c
b/drivers/media/platform/exynos-gsc/gsc-core.c
index 559fab2..fe69eae 100644
--- a/drivers/media/platform/exynos-gsc/gsc-core.c
+++ b/drivers/media/platform/exynos-gsc/gsc-core.c
@@ -1210,12 +1210,12 @@ static int gsc_resume(struct device *dev)
spin_unlock_irqrestore(gsc-slock, flags);
return 0;
}
- gsc_hw_set_sw_reset(gsc);
- gsc_wait_reset(gsc);
-
spin_unlock_irqrestore(gsc-slock, flags);
- return gsc_m2m_resume(gsc);
+ if (!pm_runtime_suspended(dev))
+ return gsc_runtime_resume(dev);
+
+ return 0;
}
static int gsc_suspend(struct device *dev)
@@ -1227,7 +1227,10 @@ static int gsc_suspend(struct device *dev)
if (test_and_set_bit(ST_SUSPEND, gsc-state))
return 0;
- return gsc_m2m_suspend(gsc);
+ if (!pm_runtime_suspended(dev))
+ return gsc_runtime_suspend(dev);
+
+ return 0;
}
static const struct dev_pm_ops gsc_pm_ops = {
--
1.7.9.5
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Re: [PATCH 6/7] ASoC: Samsung: wm8994: Register the osc clock.
On Wed, Aug 07, 2013 at 02:20:41PM +0530, Padmavathi Venna wrote: This patch registers the 16MHz oscillator clock as fixed clk. This appears to be the same as one of the patches in another series you sent? signature.asc Description: Digital signature
Re: [PATCH V3 3/7] ARM: dts: Add i2c bus 1 and it's audio codec child node on smdk5420
On Wednesday 07 of August 2013 14:40:12 Padmavathi Venna wrote:
This patch adds i2c bus 1 and wm8994 codec node on i2c bus1 and the
required regulator supplies and properties on smdk5420 board.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 58
+ 1 files changed, 58 insertions(+), 0
deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts
b/arch/arm/boot/dts/exynos5420-smdk5420.dts index d05de7a..e86c1ae
100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -68,4 +68,62 @@
bus-width = 4;
};
};
+
+ avdd2: fixed-regulator@0 {
@ suffix should be present only if reg property is present as well.
Otherwise a suffix separated with - should be used, like fixed-
regulator-0.
+ compatible = regulator-fixed;
+ regulator-name = avdd2-supply;
+ regulator-min-microvolt = 180;
+ regulator-max-microvolt = 180;
+ regulator-always-on;
+ };
+
+ cpvdd: fixed-regulator@1 {
+ compatible = regulator-fixed;
+ regulator-name = cpvdd-supply;
+ regulator-min-microvolt = 180;
+ regulator-max-microvolt = 180;
+ regulator-always-on;
+ };
+
+ dbvdd: fixed-regulator@2 {
+ compatible = regulator-fixed;
+ regulator-name = dbvdd-supply;
+ regulator-min-microvolt = 330;
+ regulator-max-microvolt = 330;
+ regulator-always-on;
+ };
+
+ spkvdd: fixed-regulator@3 {
+ compatible = regulator-fixed;
+ regulator-name = spkvdd-supply;
+ regulator-min-microvolt = 500;
+ regulator-max-microvolt = 500;
+ regulator-always-on;
+ };
All these regulators should be made subnodes of a fixed-regulators node
aggregating all fixed regulators on the board, like on following example:
fixed-regulators {
avdd2: fixed-regulator-0 {
compatible = regulator-fixed;
regulator-name = avdd2-supply;
regulator-min-microvolt = 180;
regulator-max-microvolt = 180;
regulator-always-on;
};
cpvdd: fixed-regulator-1 {
compatible = regulator-fixed;
regulator-name = cpvdd-supply;
regulator-min-microvolt = 180;
regulator-max-microvolt = 180;
regulator-always-on;
};
/* ... */
};
Best regards,
Tomasz
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Re: [PATCH V3 4/7] ARM: dts: exynos5250: move common i2s properties to exynos5 dtsi
On Wednesday 07 of August 2013 14:40:13 Padmavathi Venna wrote:
I2S nodes shares some properties across exynos5 SoCs (exynos5250
and exyno5420). Common code is moved to exynos5.dtsi which is
included in exyno5250 and exynos5420 SoC files.
Shouldn't this patch be ordered before patch 1/7, which already uses the
i2s1 and i2s2 nodes inherited from exynos5.dtsi, even though they get moved
to it later in this series.
Best regards,
Tomasz
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
arch/arm/boot/dts/exynos5.dtsi| 21 +
arch/arm/boot/dts/exynos5250.dtsi | 12
2 files changed, 21 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5.dtsi
b/arch/arm/boot/dts/exynos5.dtsi index ec384c9..c37b57d 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -191,4 +191,25 @@
#size-cells = 0;
status = disabled;
};
+
+ i2s0: i2s@0383 {
+ reg = 0x0383 0x100;
+ samsung,idma-addr = 0x0300;
+ };
+
+ i2s1: i2s@12D6 {
+ compatible = samsung,s3c6410-i2s;
+ reg = 0x12D6 0x100;
+ dmas = pdma1 12
+ pdma1 11;
+ dma-names = tx, rx;
+ };
+
+ i2s2: i2s@12D7 {
+ compatible = samsung,s3c6410-i2s;
+ reg = 0x12D7 0x100;
+ dmas = pdma0 12
+ pdma0 11;
+ dma-names = tx, rx;
+ };
};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi index 5b36121..3873ff7 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -394,7 +394,6 @@
i2s0: i2s@0383 {
compatible = samsung,s5pv210-i2s;
- reg = 0x0383 0x100;
dmas = pdma0 10
pdma0 9
pdma0 8;
@@ -403,17 +402,11 @@
clock_audss EXYNOS_I2S_BUS,
clock_audss EXYNOS_SCLK_I2S;
clock-names = iis, i2s_opclk0, i2s_opclk1;
- samsung,idma-addr = 0x0300;
pinctrl-names = default;
pinctrl-0 = i2s0_bus;
};
i2s1: i2s@12D6 {
- compatible = samsung,s3c6410-i2s;
- reg = 0x12D6 0x100;
- dmas = pdma1 12
- pdma1 11;
- dma-names = tx, rx;
clocks = clock 307, clock 157;
clock-names = iis, i2s_opclk0;
pinctrl-names = default;
@@ -421,11 +414,6 @@
};
i2s2: i2s@12D7 {
- compatible = samsung,s3c6410-i2s;
- reg = 0x12D7 0x100;
- dmas = pdma0 12
- pdma0 11;
- dma-names = tx, rx;
clocks = clock 308, clock 158;
clock-names = iis, i2s_opclk0;
pinctrl-names = default;
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Re: [PATCH V3 5/7] ARM: dts: Add osc clock node on smdk5420.
On Wednesday 07 of August 2013 14:40:14 Padmavathi Venna wrote:
This patch adds 16MHz oscillator clock node required for audio
on smdk5420 and adds the phandle of the same in wm8994 clock info.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts
b/arch/arm/boot/dts/exynos5420-smdk5420.dts index e86c1ae..3c56a91
100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -31,6 +31,13 @@
};
};
+ osc3_clk16mhz: clk16mhz {
+ compatible = osc3_clk16mhz;
Hmm?
What about the generic fixed rate clock binding[1]?
Also please name nodes being added with generic names, not platform-
specific ones. For example, fixed-rate-clock-0 or oscillator-0, just like
it is done with fixed regulators.
Best regards,
Tomasz
[1] - Documentation/devicetree/bindings/clock/fixed-clock.txt
+ #clock-cells = 0;
+ clock-frequency = 16934400;
+ clock-output-names = osc3_clk16mhz;
+ };
+
dwmmc0@1220 {
status = okay;
num-slots = 1;
@@ -123,6 +130,9 @@
DBVDD-supply = dbvdd;
SPKVDD1-supply = spkvdd;
SPKVDD2-supply = spkvdd;
+
+ clocks = osc3_clk16mhz;
+ clock-names = mclk1;
};
};
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Re: [PATCH V3 6/7] ASoC: Samsung: wm8994: Register the osc clock.
On Wednesday 07 of August 2013 14:40:15 Padmavathi Venna wrote:
This patch registers the 16MHz oscillator clock as fixed clk.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
sound/soc/samsung/smdk_wm8994.c | 12
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/sound/soc/samsung/smdk_wm8994.c
b/sound/soc/samsung/smdk_wm8994.c index 581ea4a..a6edded 100644
--- a/sound/soc/samsung/smdk_wm8994.c
+++ b/sound/soc/samsung/smdk_wm8994.c
@@ -9,6 +9,7 @@
#include ../codecs/wm8994.h
#include sound/pcm_params.h
+#include linux/clk-provider.h
#include linux/module.h
#include linux/of.h
@@ -37,6 +38,15 @@
/* SMDK has a 16.934MHZ crystal attached to WM8994 */
#define SMDK_WM8994_FREQ 16934000
+/* 16.9MHz fixed oscillator clock */
+static void init_osc_clock(void)
+{
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, osc3_clk16mhz);
+ of_fixed_clk_setup(np);
+}
+
static int smdk_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
@@ -173,6 +183,8 @@ static int smdk_audio_probe(struct platform_device
*pdev) smdk_dai[0].platform_of_node = smdk_dai[0].cpu_of_node;
}
+ init_osc_clock();
+
ret = snd_soc_register_card(card);
if (ret)
I don't think this patch is needed at all. You can use generic fixed rate
clock bindings[1] to define a fixed rate clock using device tree.
Best regards,
Tomasz
[1] - Documentation/devicetree/bindings/clock/fixed-clock.txt
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Re: [PATCH V3 6/7] ASoC: Samsung: wm8994: Register the osc clock.
On Wed, Aug 07, 2013 at 05:18:10PM +0200, Tomasz Figa wrote: I don't think this patch is needed at all. You can use generic fixed rate clock bindings[1] to define a fixed rate clock using device tree. OK, good - that's what I'd have expected but I wasn't sure if that hadn't been defined for some reason. signature.asc Description: Digital signature
Re: [PATCH v8 06/12] ARM: dts: Add description of System MMU of Exynos SoCs
On Wed, Aug 7, 2013 at 5:07 AM, Cho KyongHo pullip@samsung.com wrote: ... I don't understand how this is possible. Can someone explain this better in the IOMMU documentation please? System MMU is dedicated to a master H/W such as FIMD and FIMC. Sory - Exynos 5250 documentation I have (confidential version) uses FIMD and FIMC but never explains what they are nor identifies them in a diagram. Based on the references, they are related to the video mixer but I don't know exactly what function FIMD/FIMC serve. Thus, attaching a master H/W to an iommu domain can be thought as attaching a System MMU to an iommu domain even though such thinking is not correct view of the relationship between iommu domain and System MMU. This almost makes sense. I understand the above to mean the System MMU is a proxy for the FIMD and FIMC. I can understand we might have multiple MMUs in a system...e.g. every range of memory might have it's own MMU. But they share the same physical address space and generally live under one page table. Because of one page table I would consider them one entity from the the IOMMUs perspective. Sorry, I don't understand. Do you mean you are thinking that it is better to share one page table by all IOMMUs in a system? No. This is how the previous IOMMUs I worked on functioned. It doesn't mean this is how current ones should. My example above was referring to CPU MMUs in the case of NUMA architectures. Each NUMA CPU socket can have it's own MMU (and TLB) and corresponding memory controller. All CPUs in an SMP system map process and kernel virtual addresses to one common physical address space. This means allocation and use of physical address space has to be managed as one entity (even if several page tables exist in the implementation - e.g. NUMA). Back to the original comment that started my question (pulled out of context now...sorry): Just make sure that it will be possible to attach more than one sysmmu controller to one iommu domain. Does that mean the IOMMU now has to map to multiple physical address spaces or am I completely missing what a SysMMU does? The SysMMU is the System Memory Management Unit, right? I still thinking one IOMMU domain maps one (IO) virtual address space to one (common with CPU and other IOMMU) physical address space. cheers, grant Thank you, KyongHo thanks, grant -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/3 v5] usb: phy-samsung-usb: Simplify PMU register handling
On Tue, Aug 06, 2013 at 07:00:17PM +0100, Julius Werner wrote:
This patch simplifies the way the phy-samsung-usb code finds the correct
power management register to enable PHY clock gating. Previously, the
code would calculate the register address from a device tree supplied
base address and add an offset based on the PHY type.
Since every PHY has its own device tree entry and needs only one
register, we can just encode the address itself in the device tree and
remove the diffentiation in the code. The bitmask needed to specify the
bit within that register stays in place, allowing support for platforms
like s3c64xx that use different bits within the same register.
This breaks compatibility, both for an old kernel and a new dt and a new
kernel with an old dt. Is anyone using these bindings?
Signed-off-by: Julius Werner jwer...@chromium.org
---
.../devicetree/bindings/usb/samsung-usbphy.txt | 26
+-
arch/arm/boot/dts/exynos5250.dtsi | 4 ++--
drivers/usb/phy/phy-samsung-usb.c | 18 ---
drivers/usb/phy/phy-samsung-usb.h | 23 +--
drivers/usb/phy/phy-samsung-usb2.c | 11 -
drivers/usb/phy/phy-samsung-usb3.c | 2 +-
6 files changed, 22 insertions(+), 62 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
index 33fd354..1cf9b68 100644
--- a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
+++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
@@ -34,14 +34,7 @@ Optional properties:
- The child node 'usbphy-sys' to the node 'usbphy' is for the system
controller
interface for usb-phy. It should provide the following information
required by
usb-phy controller to control phy.
- - reg : base physical address of PHY_CONTROL registers.
- The size of this register is the total sum of size of all PHY_CONTROL
- registers that the SoC has. For example, the size will be
- '0x4' in case we have only one PHY_CONTROL register (e.g.
- OTHERS register in S3C64XX or USB_PHY_CONTROL register in S5PV210)
- and, '0x8' in case we have two PHY_CONTROL registers (e.g.
- USBDEVICE_PHY_CONTROL and USBHOST_PHY_CONTROL registers in exynos4x).
- and so on.
+ - reg : address of PHY_CONTROL register for this PHY.
Example:
- Exynos4210
@@ -57,8 +50,8 @@ Example:
clock-names = xusbxti, otg;
usbphy-sys {
- /* USB device and host PHY_CONTROL registers */
- reg = 0x10020704 0x8;
+ /* USB device PHY_CONTROL register */
+ reg = 0x10020704 0x4;
};
};
Why are we describing fewer registers now? Are they described elsewhere?
The dt should describe the device, not only the portion of it Linux
wants to use right now.
Thanks,
Mark.
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Re: [PATCH] [media] exynos-gsc: fix s2r functionality
On 08/07/2013 02:53 PM, Arun Kumar K wrote: From: Prathyush K prathyus...@samsung.com When gsc is in runtime suspended state, there is no need to call m2m_suspend during suspend and similarily, there is no need to call s/similarily/similarly. I'll fix that typo when applying. m2m_resume during resume if already in runtime suspended state. This patch adds the necessary conditions to achieve this. Signed-off-by: Prathyush K prathyus...@samsung.com Signed-off-by: Arun Mankuzhi aru...@samsung.com Signed-off-by: Arun Kumar K arun...@samsung.com Thanks, that looks good. I'll queue it for 3.12. We actually have similar patch for the exynos4-is fimc-is-i2c driver. However this is sort of things that IMO should ideally be handled in the PM core. -- Sylwester Nawrocki Samsung RD Institute Poland -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V5] pci: exynos: split into two parts such as Synopsys part and Exynos part
On Tue, Aug 6, 2013 at 10:13 PM, Jingoo Han jg1@samsung.com wrote: On Wednesday, July 31, 2013 5:14 PM, Jingoo Han jg1@samsung.com wrote: Exynos PCIe IP consists of Synopsys specific part and Exynos specific part. Only core block is a Synopsys designware part; other parts are Exynos specific. Also, the Synopsys designware part can be shared with other platforms; thus, it can be split two parts such as Synopsys designware part and Exynos specific part. Signed-off-by: Jingoo Han jg1@samsung.com Cc: Pratyush Anand pratyush.an...@st.com Cc: Mohit KUMAR mohit.ku...@st.com Hi Bjorn Helgaas, There is no comment for last 2 weeks. Will you accept this patch? I don't have any problem with this, since it's really arch code. Do you want me to merge it, or do you have a standard path for merging Exynos and/or Designware changes? Bjorn In case you need it: Acked-by: Bjorn Helgaas bhelg...@google.com --- Changes since v4: - fixed section mismatch warnings - fixed sparse warnings .../devicetree/bindings/pci/designware-pcie.txt|3 + arch/arm/boot/dts/exynos5440.dtsi |2 + drivers/pci/host/Makefile |3 +- drivers/pci/host/pci-exynos.c | 530 ++ drivers/pci/host/pcie-designware.c | 1011 ++-- drivers/pci/host/pcie-designware.h | 65 ++ 6 files changed, 874 insertions(+), 740 deletions(-) create mode 100644 drivers/pci/host/pci-exynos.c create mode 100644 drivers/pci/host/pcie-designware.h -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v6 13/20] pwm: Add new pwm-samsung driver
Hi Tomasz, +#ifndef CONFIG_CLKSRC_SAMSUNG_PWM +/* + * PWM block is shared between pwm-samsung and samsung_pwm_timer drivers + * and some registers need access synchronization. If both drivers are + * compiled in, the spinlock is defined in the clocksource driver, + * otherwise following definition is used. + * + * Currently we do not need any more complex synchronization method + * because all the supported SoCs contain only one instance of the PWM + * IP. Should this change, both drivers will need to be modified to + * properly synchronize accesses to particular instances. + */ +static DEFINE_SPINLOCK(samsung_pwm_lock); Shouldn't this not be static? It's declared in clocksource/samsung_pwm.h whether or not the samsung_pwm_timer is compiled in or not. Thanks, Andrew -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v6 13/20] pwm: Add new pwm-samsung driver
On Wednesday 07 of August 2013 12:35:42 Andrew Bresticker wrote: Hi Tomasz, +#ifndef CONFIG_CLKSRC_SAMSUNG_PWM +/* + * PWM block is shared between pwm-samsung and samsung_pwm_timer drivers + * and some registers need access synchronization. If both drivers are + * compiled in, the spinlock is defined in the clocksource driver, + * otherwise following definition is used. + * + * Currently we do not need any more complex synchronization method + * because all the supported SoCs contain only one instance of the PWM + * IP. Should this change, both drivers will need to be modified to + * properly synchronize accesses to particular instances. + */ +static DEFINE_SPINLOCK(samsung_pwm_lock); Shouldn't this not be static? It should be static, when the clocksource driver is not used, but... It's declared in clocksource/samsung_pwm.h whether or not the samsung_pwm_timer is compiled in or not. ..it should not be defined as non-static in this case (= an ifdef is needed in this header). I believe I had this already fixed, not sure what happened with the fix... Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] cpufreq: exynos5440: Fix to skip when new frequency same as current
On Wednesday, August 07, 2013 05:03:59 PM Viresh Kumar wrote: On 7 August 2013 17:00, Sudeep KarkadaNagesha sudeep.karkadanage...@arm.com wrote: Any particular reason we need this check in all drivers after your commit: 5a1c0228 cpufreq: Avoid calling cpufreq driver's target() routine if target_freq == policy-cur I think it can removed from all drivers, am I missing something ? Yeah.. Just a bit though :) So, cpufreq core checks this when we call target for any frequency. Now, cpufreq driver actually does a cpufreq_frequency_table_target() and so the frequency may vary than what is requested, in case requested frequency isn't picked from the table. In such cases we check it again to be sure that we aren't at this frequency already.. Earlier I thought of calling cpufreq_frequency_table_target() in the core before calling target but dropped the idea as I wasn't sure of the side effects. @Rafael: Do you see why we shouldn't/can't call cpufreq_frequency_table_target() from the core itself and so drivers never need to do it? It looks like it would require us to redefine .target() to take next_state instead of target_freq (at least in the acpi-cpufreq case), wouldn't it? Rafael -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] [media] exynos-gsc: fix s2r functionality
Hi Sylwester, On Wed, Aug 7, 2013 at 10:23 PM, Sylwester Nawrocki s.nawro...@samsung.com wrote: On 08/07/2013 02:53 PM, Arun Kumar K wrote: From: Prathyush K prathyus...@samsung.com When gsc is in runtime suspended state, there is no need to call m2m_suspend during suspend and similarily, there is no need to call s/similarily/similarly. I'll fix that typo when applying. Thanks. m2m_resume during resume if already in runtime suspended state. This patch adds the necessary conditions to achieve this. Signed-off-by: Prathyush K prathyus...@samsung.com Signed-off-by: Arun Mankuzhi aru...@samsung.com Signed-off-by: Arun Kumar K arun...@samsung.com Thanks, that looks good. I'll queue it for 3.12. We actually have similar patch for the exynos4-is fimc-is-i2c driver. However this is sort of things that IMO should ideally be handled in the PM core. Yes indeed. Regards Arun -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v8 06/12] ARM: dts: Add description of System MMU of Exynos SoCs
-Original Message- From: grund...@google.com [mailto:grund...@google.com] On Behalf Of Grant Grundler Sent: Thursday, August 08, 2013 1:21 AM On Wed, Aug 7, 2013 at 5:07 AM, Cho KyongHo pullip@samsung.com wrote: ... I don't understand how this is possible. Can someone explain this better in the IOMMU documentation please? System MMU is dedicated to a master H/W such as FIMD and FIMC. Sory - Exynos 5250 documentation I have (confidential version) uses FIMD and FIMC but never explains what they are nor identifies them in a diagram. Based on the references, they are related to the video mixer but I don't know exactly what function FIMD/FIMC serve. Ok. FIMD is a display controller that reads RGB data and conveys the data to the screen. FIMC performs various functions including storing camera censor data to the memory, image post processing like scaling, color space conversion and rotation and conveying the processed data to FIMD. Thus, attaching a master H/W to an iommu domain can be thought as attaching a System MMU to an iommu domain even though such thinking is not correct view of the relationship between iommu domain and System MMU. This almost makes sense. I understand the above to mean the System MMU is a proxy for the FIMD and FIMC. I can understand we might have multiple MMUs in a system...e.g. every range of memory might have it's own MMU. But they share the same physical address space and generally live under one page table. Because of one page table I would consider them one entity from the the IOMMUs perspective. Sorry, I don't understand. Do you mean you are thinking that it is better to share one page table by all IOMMUs in a system? No. This is how the previous IOMMUs I worked on functioned. It doesn't mean this is how current ones should. My example above was referring to CPU MMUs in the case of NUMA architectures. Each NUMA CPU socket can have it's own MMU (and TLB) and corresponding memory controller. All CPUs in an SMP system map process and kernel virtual addresses to one common physical address space. This means allocation and use of physical address space has to be managed as one entity (even if several page tables exist in the implementation - e.g. NUMA). Back to the original comment that started my question (pulled out of context now...sorry): Just make sure that it will be possible to attach more than one sysmmu controller to one iommu domain. Does that mean the IOMMU now has to map to multiple physical address spaces or am I completely missing what a SysMMU does? I think I have explained what the quotation actually intended. Exynos System MMUs in a SoC have the same view of physical address space. But they provide different views of memory to their master H/Ws. I think this is what Marek wanted to say. The SysMMU is the System Memory Management Unit, right? Yes it is IOMMU in Exynos SoCs. It is referred as SysMMU, sysmmu, smmu or System MMU. All are the same in the context of Exynos SoCs. It is not an implementation of ARM System MMU specifications. I still thinking one IOMMU domain maps one (IO) virtual address space to one (common with CPU and other IOMMU) physical address space. Definitely I agree with you. However, this discussion is not started from Marek's comment that several System MMUs can be attached to the same page table It actually means: - providing the same virtual address space to their master H/W - ** The master H/Ws are attached to the same iommu domain. ** Regards, KyongHo. cheers, grant Thank you, KyongHo thanks, grant -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] cpufreq: exynos5440: Fix to skip when new frequency same as current
On 8 August 2013 04:55, Rafael J. Wysocki r...@sisk.pl wrote: It looks like it would require us to redefine .target() to take next_state instead of target_freq (at least in the acpi-cpufreq case), wouldn't it? If we don't do it, then atleast for few drivers, like acpi-cpufreq, which use index more than just for frequency, we may end up calling cpufreq_frequency_table_target() twice. Once in the core and then in driver. I believe this is doable and will post a patch soon. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
