[PATCH 0/4] ARM: S3C64XX: SmartQ suspend support

[Maurus Cuelenaere]

These patches add suspend support to SmartQ boards, plus some S3C PM related
cleanups.

Maurus Cuelenaere (4):
  ARM: SAMSUNG: make SAMSUNG_PM_DEBUG select DEBUG_LL
  ARM: SAMSUNG: Fix warning 's3c_pm_show_resume_irqs' defined but not
used
  ARM: S3C64XX: Add suspend support to SmartQ boards
  ARM: S3C64XX: Add wakeup sources to SmartQ boards

 arch/arm/mach-s3c64xx/mach-smartq.c  |4 
 arch/arm/mach-s3c64xx/mach-smartq5.c |1 +
 arch/arm/mach-s3c64xx/mach-smartq7.c |1 +
 arch/arm/plat-samsung/Kconfig|1 +
 arch/arm/plat-samsung/pm.c   |5 +++--
 5 files changed, 10 insertions(+), 2 deletions(-)

-- 
1.7.2.3

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[PATCH 1/4] ARM: SAMSUNG: make SAMSUNG_PM_DEBUG select DEBUG_LL

[Maurus Cuelenaere]

When selecting SAMSUNG_PM_DEBUG, it complains about a missing printascii()
function if you do not select DEBUG_LL, so make the former select the latter.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/plat-samsung/Kconfig |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 7c0bde7..d5816e7 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -260,6 +260,7 @@ comment Power management
 config SAMSUNG_PM_DEBUG
bool S3C2410 PM Suspend debug
depends on PM
+   select DEBUG_LL
help
  Say Y here if you want verbose debugging from the PM Suspend and
  Resume code. See file:Documentation/arm/Samsung-S3C24XX/Suspend.txt
-- 
1.7.2.3

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[PATCH 2/4] ARM: SAMSUNG: Fix warning 's3c_pm_show_resume_irqs' defined but not used

[Maurus Cuelenaere]

s3c_pm_show_resume_irqs() is used by some s3c_pm_arch_show_resume_irqs()
implementations, which get included through mach/pm-core.h. Add __maybe_unused
to silence warnings when it isn't used (e.g. on S3C64XX platforms).

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/plat-samsung/pm.c |5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c
index 27cfca5..ad6dd63 100644
--- a/arch/arm/plat-samsung/pm.c
+++ b/arch/arm/plat-samsung/pm.c
@@ -214,8 +214,9 @@ void s3c_pm_do_restore_core(struct sleep_save *ptr, int 
count)
  *
  * print any IRQs asserted at resume time (ie, we woke from)
 */
-static void s3c_pm_show_resume_irqs(int start, unsigned long which,
-   unsigned long mask)
+static void __maybe_unused s3c_pm_show_resume_irqs(int start,
+  unsigned long which,
+  unsigned long mask)
 {
int i;
 
-- 
1.7.2.3

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[PATCH 3/4] ARM: S3C64XX: Add suspend support to SmartQ boards

[Maurus Cuelenaere]

The only missing thing for suspend support on SmartQ boards, is a call to
s3c_pm_init, so add that. This was tested on a S3C6410 SmartQ 7.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c64xx/mach-smartq.c |4 
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c 
b/arch/arm/mach-s3c64xx/mach-smartq.c
index 3a9639b..0f59a5c 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq.c
@@ -32,6 +32,7 @@
 #include plat/iic.h
 #include plat/gpio-cfg.h
 #include plat/hwmon.h
+#include plat/pm.h
 #include plat/regs-serial.h
 #include plat/udc-hs.h
 #include plat/usb-control.h
@@ -380,6 +381,9 @@ void __init smartq_map_io(void)
 
 void __init smartq_machine_init(void)
 {
+   /* enable suspend support */
+   s3c_pm_init();
+
s3c_i2c0_set_platdata(NULL);
s3c_hwmon_set_platdata(smartq_hwmon_pdata);
s3c_sdhci1_set_platdata(smartq_internal_hsmmc_pdata);
-- 
1.7.2.3

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[PATCH 4/4] ARM: S3C64XX: Add wakeup sources to SmartQ boards

[Maurus Cuelenaere]

This patch adds the power on/off button on both SmartQ boards as suspend wakeup
sources.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c64xx/mach-smartq5.c |1 +
 arch/arm/mach-s3c64xx/mach-smartq7.c |1 +
 2 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c 
b/arch/arm/mach-s3c64xx/mach-smartq5.c
index a4d59b0..57b84d3 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq5.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq5.c
@@ -64,6 +64,7 @@ static struct gpio_keys_button smartq5_buttons[] = {
.desc   = Power,
.active_low = 1,
.debounce_interval  = 5,
+   .wakeup = 1,
.type   = EV_KEY,
},
{
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c 
b/arch/arm/mach-s3c64xx/mach-smartq7.c
index e50a7d7..5b2f9fe 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq7.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq7.c
@@ -64,6 +64,7 @@ static struct gpio_keys_button smartq7_buttons[] = {
.desc   = Power,
.active_low = 1,
.debounce_interval  = 5,
+   .wakeup = 1,
.type   = EV_KEY,
},
{
-- 
1.7.2.3

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[PATCH 0/2] ARM: S3C64XX: SmartQ: add suspend support

[Maurus Cuelenaere]

These patches add suspend support to the SmartQ (and other S3C64XX) boards.

Currently the LCD needs re-initializing when waking up, otherwise it'll just
display a WSOD.

This was tested on a SmartQ 7.

Maurus Cuelenaere (2):
  ARM: S3C64XX: Add suspend support
  ARM: S3C64XX: Add wakeup sources to SmartQ boards

 arch/arm/mach-s3c64xx/mach-smartq5.c |1 +
 arch/arm/mach-s3c64xx/mach-smartq7.c |1 +
 arch/arm/mach-s3c64xx/pm.c   |3 +++
 3 files changed, 5 insertions(+), 0 deletions(-)

-- 
1.7.2.3

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[PATCH 1/2] ARM: S3C64XX: Add suspend support

[Maurus Cuelenaere]

The only missing thing for SoC-wide suspend support, is a call to s3c_pm_init,
so add that. This was tested on a S3C6410 SmartQ 7.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c64xx/pm.c |3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index 79412f7..db292c9 100644
--- a/arch/arm/mach-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -187,6 +187,9 @@ static int s3c64xx_pm_init(void)
pm_cpu_prep = s3c64xx_pm_prepare;
pm_cpu_sleep = s3c64xx_cpu_suspend;
pm_uart_udivslot = 1;
+
+   s3c_pm_init();
+
return 0;
 }
 
-- 
1.7.2.3

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Re: [PATCH 1/2] ARM: S3C64XX: Add suspend support

[Maurus Cuelenaere]

 Op 06-10-10 01:23, Kyungmin Park schreef:
 Hi,

 I agree your approach, put the common features in common place.
 but Samsung maintainers insist put these at each machine file at current time.

 So move this to the each machines for their tastes.
I did it that way first, but then wondered why this wasn't done for all boards.

When looking at some S3C24XX boards, you'll see that these need changes to the
bootloader to support suspend; but IIRC this isn't needed for S3C64XX so I think
this can be safely enabled for all S3C64XX boards?

-- 
Maurus Cuelenaere

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[PATCH] ARM: SAMSUNG: Fix warning 's3c_pm_show_resume_irqs' defined but not used

[Maurus Cuelenaere]

s3c_pm_show_resume_irqs() is used by some s3c_pm_arch_show_resume_irqs()
implementations, which get included through mach/pm-core.h. Add __maybe_unused
to silence warnings when it isn't used (e.g. on S3C64XX platforms).

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/plat-samsung/pm.c |5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c
index 27cfca5..ad6dd63 100644
--- a/arch/arm/plat-samsung/pm.c
+++ b/arch/arm/plat-samsung/pm.c
@@ -214,8 +214,9 @@ void s3c_pm_do_restore_core(struct sleep_save *ptr, int 
count)
  *
  * print any IRQs asserted at resume time (ie, we woke from)
 */
-static void s3c_pm_show_resume_irqs(int start, unsigned long which,
-   unsigned long mask)
+static void __maybe_unused s3c_pm_show_resume_irqs(int start,
+  unsigned long which,
+  unsigned long mask)
 {
int i;
 
-- 
1.7.2.3

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[PATCH] ARM: SAMSUNG: make SAMSUNG_PM_DEBUG select DEBUG_LL

[Maurus Cuelenaere]

When selecting SAMSUNG_PM_DEBUG, it complains about a missing printascii()
function if you do not select DEBUG_LL, so make the former select the latter.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/plat-samsung/Kconfig |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 7c0bde7..d5816e7 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -260,6 +260,7 @@ comment Power management
 config SAMSUNG_PM_DEBUG
bool S3C2410 PM Suspend debug
depends on PM
+   select DEBUG_LL
help
  Say Y here if you want verbose debugging from the PM Suspend and
  Resume code. See file:Documentation/arm/Samsung-S3C24XX/Suspend.txt
-- 
1.7.0.4

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Re: [PATCH 5/5] ARM: S3C64XX: Add wifi RF kill support for SmartQ boards

[Maurus Cuelenaere]

 Op 13-08-10 21:18, Maurus Cuelenaere schreef:
 This patch create a new platform driver which adds support for RF kill to the
 on-board WM-G-MR-09 wifi chip. It also adds the platform device glue to the
 SmartQ board definitions.

 Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
 ---
  arch/arm/mach-s3c64xx/Kconfig   |7 ++
  arch/arm/mach-s3c64xx/Makefile  |3 +
  arch/arm/mach-s3c64xx/mach-smartq.c |   38 ++
  arch/arm/mach-s3c64xx/smartq-wifi.c |  135 
 +++
  4 files changed, 152 insertions(+), 31 deletions(-)
  create mode 100644 arch/arm/mach-s3c64xx/smartq-wifi.c

@Ben:
Any specific reason why you didn't pick this up?

-- 
Maurus Cuelenaere
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Re: [PATCH 3/3] ARM: S3C64XX: Stop and flush requests on freeing

[Maurus Cuelenaere]

 Op 15-08-10 15:36, Jassi Brar schreef:
 On Sun, Aug 15, 2010 at 10:28 PM, Jassi Brar jassisinghb...@gmail.com wrote:
 On Mon, May 31, 2010 at 8:34 PM, Maurus Cuelenaere
 mcuelena...@gmail.com wrote:
 When a DMA channel is freed, its pending requests should be flushed and the
 channel should be halted. This patch ensures that happens.

 Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
 ---
  arch/arm/mach-s3c64xx/dma.c |3 ++-
  1 files changed, 2 insertions(+), 1 deletions(-)

 diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
 index 1fd9d0c..e1f22af 100644
 --- a/arch/arm/mach-s3c64xx/dma.c
 +++ b/arch/arm/mach-s3c64xx/dma.c
 @@ -560,7 +560,8 @@ int s3c2410_dma_free(unsigned int channel, struct 
 s3c2410_dma_client *client)
   channel, chan-client, client);
}

 -   /* sort out stopping and freeing the channel */
 +   s3c64xx_dma_flush(chan);
 +   s3c64xx_dma_stop(chan);
 I think, the order should be reverted.

You're probably right.

 Though it's a matter of S3C DMA API spec.
 Shouldn't the client be made to explicitly do S3C2410_DMAOP_FLUSH
 a pending req before freeing the channel? If so, the patch may not be needed.

I can't find anything about the client needing to flush the request itself.

Documentation/arm/Samsung-S3C24XX/DMA.txt doesn't mention anything regarding it
and the comment above s3c2410_dma_free() says release the given channel back to
the system, will stop and flush any outstanding transfers, and ensure the
channel is ready for the next claimant.


-- 
Maurus Cuelenaere
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[PATCH 1/3] ARM: S3C64XX: Add SDMA clocks

[Maurus Cuelenaere]

This adds the clock definition bits for SDMA.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c64xx/clock.c |   12 
 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 7e03f0a..1362d31 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -230,6 +230,18 @@ static struct clk init_clocks_disable[] = {
.parent = clk_h,
.enable = s3c64xx_hclk_ctrl,
.ctrlbit= S3C_CLKCON_HCLK_DMA1,
+   }, {
+   .name   = sdma0,
+   .id = -1,
+   .parent = clk_h,
+   .enable = s3c64xx_hclk_ctrl,
+   .ctrlbit= S3C_CLKCON_HCLK_SDMA0,
+   }, {
+   .name   = sdma1,
+   .id = -1,
+   .parent = clk_h,
+   .enable = s3c64xx_hclk_ctrl,
+   .ctrlbit= S3C_CLKCON_HCLK_SDMA1,
},
 };
 
-- 
1.7.0.4

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[PATCH 2/3] ARM: S3C64XX: Add SDMA support to DMA core

[Maurus Cuelenaere]

The crypto engine uses the DMACH_SECURITY_[RT]X channels, who seem to be
hardcoded to SDMA-only in hardware, so add support for SDMA to the S3C64XX
DMA core.

Only DMACH_SECURITY_[RT]X are using SDMA, other channels are unaffected and
will continue to use standard DMA.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c64xx/dma.c |   51 ++
 1 files changed, 41 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index e7d03ab..1fd9d0c 100644
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -45,6 +45,15 @@ struct s3c64xx_dmac {
 /* pool to provide LLI buffers */
 static struct dma_pool *dma_pool;
 
+/* SDMA channel state information */
+static struct s3c2410_dma_chan sdma_chans[S3C_DMA_CHANNELS];
+
+/* Currently hardcodes SECURITY_[RT]X SDMA-only as dictated by HW */
+static inline bool channel_needs_sdma(unsigned int chan)
+{
+   return chan == DMACH_SECURITY_RX || chan == DMACH_SECURITY_TX;
+}
+
 /* Debug configuration and code */
 
 static unsigned char debug_show_buffs = 0;
@@ -92,16 +101,20 @@ static void dbg_showbuffs(struct s3c2410_dma_chan *chan)
 
 static struct s3c2410_dma_chan *s3c64xx_dma_map_channel(unsigned int channel)
 {
+   struct s3c2410_dma_chan *chans = s3c2410_chans;
struct s3c2410_dma_chan *chan;
unsigned int start, offs;
 
+   if (channel_needs_sdma(channel))
+   chans = sdma_chans;
+
start = 0;
 
if (channel = DMACH_PCM1_TX)
start = 8;
 
for (offs = 0; offs  8; offs++) {
-   chan = s3c2410_chans[start + offs];
+   chan = chans[start + offs];
if (!chan-in_use)
goto found;
}
@@ -634,8 +647,12 @@ static struct sysdev_class dma_sysclass = {
.name   = s3c64xx-dma,
 };
 
+static struct sysdev_class sdma_sysclass = {
+   .name   = s3c64xx-sdma,
+};
+
 static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
-int irq, unsigned int base)
+int irq, unsigned int base, bool sdma)
 {
struct s3c2410_dma_chan *chptr = s3c2410_chans[chno];
struct s3c64xx_dmac *dmac;
@@ -651,7 +668,7 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
}
 
dmac-sysdev.id = chno / 8;
-   dmac-sysdev.cls = dma_sysclass;
+   dmac-sysdev.cls = sdma ? sdma_sysclass : dma_sysclass;
 
err = sysdev_register(dmac-sysdev);
if (err) {
@@ -666,7 +683,11 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
goto err_dev;
}
 
-   snprintf(clkname, sizeof(clkname), dma%d, dmac-sysdev.id);
+   if (sdma) {
+   snprintf(clkname, sizeof(clkname), sdma%d, dmac-sysdev.id);
+   chptr = sdma_chans[chno];
+   } else
+   snprintf(clkname, sizeof(clkname), dma%d, dmac-sysdev.id);
 
dmac-clk = clk_get(NULL, clkname);
if (IS_ERR(dmac-clk)) {
@@ -690,8 +711,8 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
regptr = regs + PL080_Cx_BASE(0);
 
for (ch = 0; ch  8; ch++, chno++, chptr++) {
-   printk(KERN_INFO %s: registering DMA %d (%p)\n,
-  __func__, chno, regptr);
+   printk(KERN_INFO %s: registering %sDMA %d (%p)\n,
+  __func__, sdma ? S : , chno, regptr);
 
chptr-bit = 1  ch;
chptr-number = chno;
@@ -737,12 +758,22 @@ static int __init s3c64xx_dma_init(void)
return -ENOMEM;
}
 
-   /* Set all DMA configuration to be DMA, not SDMA */
-   writel(0xff, S3C_SYSREG(0x110));
+   ret = sysdev_class_register(sdma_sysclass);
+   if (ret) {
+   printk(KERN_ERR %s: failed to create sysclass\n, __func__);
+   return -ENOMEM;
+   }
+
+   /* Set all DMA configuration to be DMA, except SECURITY_[RT]X */
+   writel(0x3fff, S3C_SYSREG(0x110));
 
/* Register standard DMA controlers */
-   s3c64xx_dma_init1(0, DMACH_UART0, IRQ_DMA0, 0x7500);
-   s3c64xx_dma_init1(8, DMACH_PCM1_TX, IRQ_DMA1, 0x7510);
+   s3c64xx_dma_init1(0, DMACH_UART0, IRQ_DMA0, 0x7500, false);
+   s3c64xx_dma_init1(8, DMACH_PCM1_TX, IRQ_DMA1, 0x7510, false);
+
+   /* Register SDMA controllers */
+   s3c64xx_dma_init1(0, DMACH_UART0, IRQ_SDMA0, 0x7DB0, true);
+   s3c64xx_dma_init1(8, DMACH_PCM1_TX, IRQ_SDMA1, 0x7DC0, true);
 
return 0;
 }
-- 
1.7.0.4

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Re: [RFC 9/9] crypto: Add Samsung crypto engine driver

[Maurus Cuelenaere]

 Op 13-08-10 00:32, David Miller schreef:
 From: Maurus Cuelenaere mcuelena...@gmail.com
 Date: Thu, 12 Aug 2010 13:47:24 +0200

 The main issues still remain (DMA not working at all and FIFO not
 working for some (T)DES transfers). Additionally, I couldn't get
 tcrypt to test the s3c-sss driver for some reason, it always picked
 the standard AES/TDES/DES driver (even though s3c-sss has a higher
 priority and succeeded the self-test).
 I forget the details of your driver, but were your encryption algorithms
 implemented async?

Yes, all are async (also the not-yet-working hash algorithms).

 tcrypt can validate async crypto algorithms, but cannot performance
 test them just yet.  I can performance test async hash algorithms,
 for which I added the code for a few months ago.
Hmm ok, I suppose implementing support for performance testing async crypto
algorithms isn't trivial?

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[PATCH 0/5] ARM: S3C64XX: SmartQ related patches

[Maurus Cuelenaere]

These patches add further peripheral support to the SmartQ boards.
This was based on 320b2b8de12698082609ebbc1a17165727f4c893.

Maurus Cuelenaere (4):
  ARM: S3C64XX: Move SmartQ LCD control platform definition to shared
file
  ARM: S3C64XX: Set wifi and iNAND as permanently connected SD devices
on SmartQ boards
  ARM: S3C64XX: Add audio support to SmartQ
  ARM: S3C64XX: Add wifi RF kill support for SmartQ boards

Patrick Georgi (1):
  ARM: S3C64XX: Framebuffer fix for SmartQ5

 arch/arm/mach-s3c64xx/Kconfig|7 ++
 arch/arm/mach-s3c64xx/Makefile   |3 +
 arch/arm/mach-s3c64xx/mach-smartq.c  |   78 +++
 arch/arm/mach-s3c64xx/mach-smartq5.c |   36 +
 arch/arm/mach-s3c64xx/mach-smartq7.c |   28 ---
 arch/arm/mach-s3c64xx/smartq-wifi.c  |  135 ++
 6 files changed, 194 insertions(+), 93 deletions(-)
 create mode 100644 arch/arm/mach-s3c64xx/smartq-wifi.c

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[PATCH 1/5] ARM: S3C64XX: Move SmartQ LCD control platform definition to shared file

[Maurus Cuelenaere]

This shares the common LCD control platform definition used in the SmartQ 5 and
7. This also corrects it as a GPIO bitbanged SPI device instead of an I²C one,
which was wrong.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c64xx/mach-smartq.c  |   32 ++--
 arch/arm/mach-s3c64xx/mach-smartq5.c |   28 
 arch/arm/mach-s3c64xx/mach-smartq7.c |   28 
 3 files changed, 30 insertions(+), 58 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c 
b/arch/arm/mach-s3c64xx/mach-smartq.c
index 028d080..54309da 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq.c
@@ -16,6 +16,7 @@
 #include linux/platform_device.h
 #include linux/pwm_backlight.h
 #include linux/serial_core.h
+#include linux/spi/spi_gpio.h
 #include linux/usb/gpio_vbus.h
 
 #include asm/mach-types.h
@@ -184,6 +185,33 @@ static struct s3c_hwmon_pdata smartq_hwmon_pdata 
__initdata = {
},
 };
 
+static int __init smartq_lcd_setup_gpio(void)
+{
+   int ret;
+
+   ret = gpio_request(S3C64XX_GPM(3), LCD power);
+   if (ret  0)
+   return ret;
+
+   /* turn power off */
+   gpio_direction_output(S3C64XX_GPM(3), 0);
+
+   return 0;
+}
+
+/* GPM0 - CS */
+static struct spi_gpio_platform_data smartq_lcd_control = {
+   .sck= S3C64XX_GPM(1),
+   .mosi   = S3C64XX_GPM(2),
+   .miso   = S3C64XX_GPM(2),
+};
+
+static struct platform_device smartq_lcd_control_device = {
+   .name   = spi-gpio,
+   .id = 1,
+   .dev.platform_data  = smartq_lcd_control,
+};
+
 static void smartq_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
 {
gpio_direction_output(S3C64XX_GPM(3), power);
@@ -199,7 +227,6 @@ static struct platform_device smartq_lcd_power_device = {
.dev.platform_data  = smartq_lcd_power_data,
 };
 
-
 static struct platform_device *smartq_devices[] __initdata = {
s3c_device_hsmmc1, /* Init iNAND first, ... */
s3c_device_hsmmc0, /* ... then the external SD card */
@@ -214,6 +241,7 @@ static struct platform_device *smartq_devices[] __initdata 
= {
s3c_device_ts,
s3c_device_usb_hsotg,
smartq_backlight_device,
+   smartq_lcd_control_device,
smartq_lcd_power_device,
smartq_usb_otg_vbus_dev,
 };
@@ -252,7 +280,6 @@ static int __init smartq_power_off_init(void)
/* leave power on */
gpio_direction_output(S3C64XX_GPK(15), 0);
 
-
pm_power_off = smartq_power_off;
 
return ret;
@@ -354,6 +381,7 @@ void __init smartq_machine_init(void)
s3c_sdhci2_set_platdata(smartq_internal_hsmmc_pdata);
s3c24xx_ts_set_platdata(smartq_touchscreen_pdata);
 
+   WARN_ON(smartq_lcd_setup_gpio());
WARN_ON(smartq_power_off_init());
WARN_ON(smartq_usb_host_init());
WARN_ON(smartq_usb_otg_init());
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c 
b/arch/arm/mach-s3c64xx/mach-smartq5.c
index a065062..2bfa708 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq5.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq5.c
@@ -12,7 +12,6 @@
 #include linux/fb.h
 #include linux/gpio.h
 #include linux/gpio_keys.h
-#include linux/i2c-gpio.h
 #include linux/init.h
 #include linux/input.h
 #include linux/leds.h
@@ -33,31 +32,6 @@
 
 #include mach-smartq.h
 
-static void __init smartq5_lcd_setup_gpio(void)
-{
-   gpio_request(S3C64XX_GPM(0), LCD SCEN pin);
-   gpio_request(S3C64XX_GPM(1), LCD SCL pin);
-   gpio_request(S3C64XX_GPM(2), LCD SDA pin);
-   gpio_request(S3C64XX_GPM(3), LCD power);
-
-   /* turn power off */
-   gpio_direction_output(S3C64XX_GPM(0), 1);
-   gpio_direction_input(S3C64XX_GPM(1));
-   gpio_direction_input(S3C64XX_GPM(2));
-   gpio_direction_output(S3C64XX_GPM(3), 0);
-}
-
-static struct i2c_gpio_platform_data smartq5_lcd_control = {
-   .sda_pin= S3C64XX_GPM(2),
-   .scl_pin= S3C64XX_GPM(1),
-};
-
-static struct platform_device smartq5_lcd_control_device = {
-   .name   = i2c-gpio,
-   .id = 1,
-   .dev.platform_data  = smartq5_lcd_control,
-};
-
 static struct gpio_led smartq5_leds[] __initdata = {
{
.name   = smartq5:green,
@@ -159,7 +133,6 @@ static struct s3c_fb_platdata smartq5_lcd_pdata __initdata 
= {
 static struct platform_device *smartq5_devices[] __initdata = {
smartq5_leds_device,
smartq5_buttons_device,
-   smartq5_lcd_control_device,
 };
 
 static void __init smartq5_machine_init(void)
@@ -167,7 +140,6 @@ static void __init smartq5_machine_init(void)
s3c_fb_set_platdata(smartq5_lcd_pdata);
 
smartq_machine_init();
-   smartq5_lcd_setup_gpio();
 
platform_add_devices(smartq5_devices, ARRAY_SIZE

[PATCH 5/5] ARM: S3C64XX: Add wifi RF kill support for SmartQ boards

[Maurus Cuelenaere]

This patch create a new platform driver which adds support for RF kill to the
on-board WM-G-MR-09 wifi chip. It also adds the platform device glue to the
SmartQ board definitions.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c64xx/Kconfig   |7 ++
 arch/arm/mach-s3c64xx/Makefile  |3 +
 arch/arm/mach-s3c64xx/mach-smartq.c |   38 ++
 arch/arm/mach-s3c64xx/smartq-wifi.c |  135 +++
 4 files changed, 152 insertions(+), 31 deletions(-)
 create mode 100644 arch/arm/mach-s3c64xx/smartq-wifi.c

diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 071e8a1..42a8c45 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -234,3 +234,10 @@ config MACH_SMARTQ7
select MACH_SMARTQ
help
Machine support for the SmartQ 7
+
+config SMARTQ_WIFI
+   bool
+   default y
+   depends on MACH_SMARTQ  (RFKILL || !RFKILL)
+   help
+   RF kill support for SmartQ wifi chip
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index 48d3dfa..46af002 100644
--- a/arch/arm/mach-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -65,3 +65,6 @@ obj-y += dev-audio.o
 obj-$(CONFIG_S3C64XX_DEV_SPI)  += dev-spi.o
 obj-$(CONFIG_S3C64XX_DEV_TS)   += dev-ts.o
 obj-$(CONFIG_S3C64XX_DEV_ONENAND1) += dev-onenand1.o
+
+# Misc
+obj-$(CONFIG_SMARTQ_WIFI)  += smartq-wifi.o
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c 
b/arch/arm/mach-s3c64xx/mach-smartq.c
index 3a9639b..0e3f43d 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq.c
@@ -9,7 +9,6 @@
  *
  */
 
-#include linux/delay.h
 #include linux/fb.h
 #include linux/gpio.h
 #include linux/init.h
@@ -231,6 +230,12 @@ static struct i2c_board_info smartq_i2c_devs[] __initdata 
= {
{ I2C_BOARD_INFO(wm8987, 0x1a), },
 };
 
+static struct platform_device smartq_wifi_device = {
+   .name   = smartq-wifi,
+   .id = -1,
+   .dev.parent = s3c_device_hsmmc2.dev,
+};
+
 static struct platform_device *smartq_devices[] __initdata = {
s3c_device_hsmmc1, /* Init iNAND first, ... */
s3c_device_hsmmc0, /* ... then the external SD card */
@@ -249,6 +254,7 @@ static struct platform_device *smartq_devices[] __initdata 
= {
smartq_lcd_control_device,
smartq_lcd_power_device,
smartq_usb_otg_vbus_dev,
+   smartq_wifi_device,
 };
 
 static void __init smartq_lcd_mode_set(void)
@@ -339,35 +345,6 @@ static int __init smartq_usb_otg_init(void)
return 0;
 }
 
-static int __init smartq_wifi_init(void)
-{
-   int ret;
-
-   ret = gpio_request(S3C64XX_GPK(1), wifi control);
-   if (ret  0) {
-   pr_err(%s: failed to get GPK1\n, __func__);
-   return ret;
-   }
-
-   ret = gpio_request(S3C64XX_GPK(2), wifi reset);
-   if (ret  0) {
-   pr_err(%s: failed to get GPK2\n, __func__);
-   gpio_free(S3C64XX_GPK(1));
-   return ret;
-   }
-
-   /* turn power on */
-   gpio_direction_output(S3C64XX_GPK(1), 1);
-
-   /* reset device */
-   gpio_direction_output(S3C64XX_GPK(2), 0);
-   mdelay(100);
-   gpio_set_value(S3C64XX_GPK(2), 1);
-   gpio_direction_input(S3C64XX_GPK(2));
-
-   return 0;
-}
-
 static struct map_desc smartq_iodesc[] __initdata = {};
 void __init smartq_map_io(void)
 {
@@ -393,7 +370,6 @@ void __init smartq_machine_init(void)
WARN_ON(smartq_power_off_init());
WARN_ON(smartq_usb_host_init());
WARN_ON(smartq_usb_otg_init());
-   WARN_ON(smartq_wifi_init());
 
platform_add_devices(smartq_devices, ARRAY_SIZE(smartq_devices));
 }
diff --git a/arch/arm/mach-s3c64xx/smartq-wifi.c 
b/arch/arm/mach-s3c64xx/smartq-wifi.c
new file mode 100644
index 000..54b2406
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/smartq-wifi.c
@@ -0,0 +1,135 @@
+/*
+ * linux/arch/arm/mach-s3c64xx/smartq-rfkill.c
+ *
+ * Copyright (C) 2010 Maurus Cuelenaere
+ * Based on h1940 bluetooth RF kill driver
+ *  Copyright (c) Arnaud Patard arnaud.pat...@rtp-net.org
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include linux/delay.h
+#include linux/gpio.h
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/rfkill.h
+
+#include plat/gpio-cfg.h
+
+#define WIFI_POWER S3C64XX_GPK(1)
+#define WIFI_RESET S3C64XX_GPK(2)
+
+#define smartq_wifi_enable(en) smartq_wifi_rfk_block(NULL, !en)
+
+static int smartq_wifi_rfk_block(void *data, bool blocked)
+{
+   /* change power depending on state */
+   gpio_set_value(WIFI_POWER, !blocked);
+
+   if (!blocked) {
+   /* when powering on, reset device

[PATCH] USB: s3c-hsotg: Remove DEBUG define

[Maurus Cuelenaere]

DEBUG is defined unconditionally, remove it as this clutters the message log.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 drivers/usb/gadget/s3c-hsotg.c |2 --
 1 files changed, 0 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c
index 521ebed..a229744 100644
--- a/drivers/usb/gadget/s3c-hsotg.c
+++ b/drivers/usb/gadget/s3c-hsotg.c
@@ -12,8 +12,6 @@
  * published by the Free Software Foundation.
 */
 
-#define DEBUG
-
 #include linux/kernel.h
 #include linux/module.h
 #include linux/spinlock.h
-- 
1.7.0.4

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Re: [RFC 9/9] crypto: Add Samsung crypto engine driver

[Maurus Cuelenaere]

 Hi,

Op 03-08-10 06:44, Kyungmin Park schreef:
 Hi,

 Any update on this?

Sorry for the late reply.

The current (functional) status of the driver doesn't differ much from the 
original one. I've reworked the crypto request handling code like David 
suggested and started adding support for (HMAC) SHA-1 acceleration.

The main issues still remain (DMA not working at all and FIFO not working for 
some (T)DES transfers). Additionally, I couldn't get tcrypt to test the s3c-sss 
driver for some reason, it always picked the standard AES/TDES/DES driver (even 
though s3c-sss has a higher priority and succeeded the self-test).

-- 
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Re: [PATCHv5 3/4] sdhci-s3c: add support for new card detection methods (driver part)

[Maurus Cuelenaere]

-host = host;
   sc-pdev = pdev;
   sc-pdata = pdata;
 + sc-ext_cd_gpio = -1;
  
   platform_set_drvdata(pdev, host);
  
 @@ -355,6 +389,13 @@ static int __devinit sdhci_s3c_probe(struct 
 platform_device *pdev)
* SDHCI block, or a missing configuration that needs to be set. */
   host-quirks |= SDHCI_QUIRK_NO_BUSY_IRQ;
  
 + if (pdata-cd_type == S3C_SDHCI_CD_NONE ||
 + pdata-cd_type == S3C_SDHCI_CD_PERMANENT)
 + host-quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
 +
 + if (pdata-cd_type == S3C_SDHCI_CD_PERMANENT)
 + host-mmc-caps = MMC_CAP_NONREMOVABLE;
 +
   host-quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
SDHCI_QUIRK_32BIT_DMA_SIZE);
  
 @@ -367,6 +408,33 @@ static int __devinit sdhci_s3c_probe(struct 
 platform_device *pdev)
   goto err_add_host;
   }
  
 + /* pdata-ext_cd_init might call sdhci_s3c_notify_change immediately,
 +so it can be called only after sdhci_add_host() */
 + if (pdata-cd_type == S3C_SDHCI_CD_EXTERNAL  pdata-ext_cd_init)
 + pdata-ext_cd_init(sdhci_s3c_notify_change);
 +
 + if (pdata-cd_type == S3C_SDHCI_CD_GPIO 
 + gpio_is_valid(pdata-ext_cd_gpio)) {
 + int status;
 +
 + gpio_request(pdata-ext_cd_gpio, SDHCI EXT CD);

Shouldn't you check the return value of gpio_request()?

 + sc-ext_cd_gpio = pdata-ext_cd_gpio;
 +
 + sc-ext_cd_irq = gpio_to_irq(pdata-ext_cd_gpio);
 + if (sc-ext_cd_irq 
 + request_threaded_irq(sc-ext_cd_irq, NULL, 
 sdhci_s3c_gpio_card_detect_thread,
 + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
 + dev_name(pdev-dev), sc)) {
 + dev_err(pdev-dev, cannot request irq for card 
 detect\n);
 + sc-ext_cd_irq = 0;
 + }
 +
 + status = gpio_get_value(sc-ext_cd_gpio);
 + if (sc-pdata-ext_cd_gpio_invert)
 + status = !status;
 + sdhci_s3c_notify_change(sc-pdev, status);
 + }
 +
   return 0;
  
   err_add_host:
 @@ -391,10 +459,20 @@ static int __devinit sdhci_s3c_probe(struct 
 platform_device *pdev)
  
  static int __devexit sdhci_s3c_remove(struct platform_device *pdev)
  {
 + struct s3c_sdhci_platdata *pdata = pdev-dev.platform_data;
   struct sdhci_host *host =  platform_get_drvdata(pdev);
   struct sdhci_s3c *sc = sdhci_priv(host);
   int ptr;
  
 + if (pdata-cd_type == S3C_SDHCI_CD_EXTERNAL  pdata-ext_cd_cleanup)
 + pdata-ext_cd_cleanup(sdhci_s3c_notify_change);
 +
 + if (sc-ext_cd_irq)
 + free_irq(sc-ext_cd_irq, sc);
 +
 + if (sc-ext_cd_gpio != -1)

Perhaps if (gpio_is_valid(...)) ?

 + gpio_free(sc-ext_cd_gpio);
 +
   sdhci_remove_host(host, 1);
  
   for (ptr = 0; ptr  3; ptr++) {

-- 
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Re: [PATCH 4/4] sdhci-s3c: add regulator support

[Maurus Cuelenaere]

 Op 28-07-10 16:19, Marek Szyprowski schreef:
 This patch adds support for regulator API to sdhci-s3c driver. Regulators
 can be used to disable power in suspended state to reduce dissipated
 energy.

I'm not sure about this, when I would try to do this I'd look at implementing
this in the sdhci driver itself instead of a subdriver of it.

 Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
 Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
 ---
  drivers/mmc/host/sdhci-s3c.c |   30 +-
  1 files changed, 29 insertions(+), 1 deletions(-)

 diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
 index 606e695..b9d46a5 100644
 --- a/drivers/mmc/host/sdhci-s3c.c
 +++ b/drivers/mmc/host/sdhci-s3c.c
 @@ -19,6 +19,7 @@
  #include linux/clk.h
  #include linux/io.h
  #include linux/gpio.h
 +#include linux/regulator/consumer.h
  
  #include linux/mmc/host.h
  
 @@ -50,6 +51,7 @@ struct sdhci_s3c {
  
   struct clk  *clk_io;
   struct clk  *clk_bus[MAX_BUS_CLK];
 + struct regulator*vmmc;
  };
  
  static inline struct sdhci_s3c *to_s3c(struct sdhci_host *host)
 @@ -309,6 +311,13 @@ static int __devinit sdhci_s3c_probe(struct 
 platform_device *pdev)
  
   platform_set_drvdata(pdev, host);
  
 + sc-vmmc = regulator_get(dev, vmmc);
 + if (IS_ERR(sc-vmmc)) {
 + dev_warn(dev, no vmmc regulator found\n);
 + sc-vmmc = NULL;
 + } else
 + regulator_enable(sc-vmmc);
 +
   sc-clk_io = clk_get(dev, hsmmc);
   if (IS_ERR(sc-clk_io)) {
   dev_err(dev, failed to get io clock\n);
 @@ -482,6 +491,11 @@ static int __devexit sdhci_s3c_remove(struct 
 platform_device *pdev)
   clk_disable(sc-clk_io);
   clk_put(sc-clk_io);
  
 + if (sc-vmmc) {
 + regulator_disable(sc-vmmc);
 + regulator_put(sc-vmmc);
 + }
 +
   iounmap(host-ioaddr);
   release_resource(sc-ioarea);
   kfree(sc-ioarea);
 @@ -496,15 +510,29 @@ static int __devexit sdhci_s3c_remove(struct 
 platform_device *pdev)
  
  static int sdhci_s3c_suspend(struct platform_device *dev, pm_message_t pm)
  {
 + int ret = 0;
   struct sdhci_host *host = platform_get_drvdata(dev);
 + struct sdhci_s3c *sc = sdhci_priv(host);
  
   sdhci_suspend_host(host, pm);
 - return 0;
 +
 + if (sc-vmmc)
 + ret = regulator_disable(sc-vmmc);
 +
 + return ret;
  }
  
  static int sdhci_s3c_resume(struct platform_device *dev)
  {
   struct sdhci_host *host = platform_get_drvdata(dev);
 + struct sdhci_s3c *sc = sdhci_priv(host);
 +
 + if (sc-vmmc) {
 + int ret = regulator_disable(sc-vmmc);
 + if (ret)
 + return ret;
 + mdelay(2);

Shouldn't these delays be handled in the regulator framework itself?

 + }
  
   sdhci_resume_host(host);
   return 0;


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Re: [PATCH 4/4] sdhci-s3c: add regulator support

[Maurus Cuelenaere]

 Op 28-07-10 17:41, Mark Brown schreef:
 On 28 Jul 2010, at 07:48, Maurus Cuelenaere mcuelena...@gmail.com wrote:
 +   struct sdhci_s3c *sc = sdhci_priv(host);
 +
 +   if (sc-vmmc) {
 +   int ret = regulator_disable(sc-vmmc);
 +   if (ret)
 +   return ret;
 +   mdelay(2);
 Shouldn't these delays be handled in the regulator framework itself?
 A 2ms delay on power down seems suspicious for a regulator. I'm not sure why 
 this is required but if it is I suspect it's due to a large cap on the 
 regulator output and light load rather than something that's always true for 
 whatever regulator is providing the supply.

I wasn't suggesting to do the delay in the framework *itself*, rather in the
regulator driver and/or the board platform code which needs this delay.

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Re: [PATCH v3 3/3] sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT quirk for Samsung SoC

[Maurus Cuelenaere]

 Op 27-07-10 13:58, Kukjin Kim schreef:
 Maurus Cuelenaere wrote:
  Op 23-07-10 13:56, Kukjin Kim schreef:
 From: Hyuk Lee hyuk1@samsung.com

 If host controller doesn't have WP pin which should be connnected with SDMMC
 card WP pin, can implement get_ro function with using the allocated gpio.
 In order to use this quirk wp_gpio in the platform data must be set.

 Signed-off-by: Hyuk Lee hyuk1@samsung.com
 Signed-off-by: Kukjin Kim kgene@samsung.com
 ---
  drivers/mmc/host/sdhci-s3c.c |   43
 ++
  drivers/mmc/host/sdhci.c |3 ++
  drivers/mmc/host/sdhci.h |3 ++
  3 files changed, 49 insertions(+), 0 deletions(-)

 diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
 index 0d25285..0b75e57 100644
 --- a/drivers/mmc/host/sdhci-s3c.c
 +++ b/drivers/mmc/host/sdhci-s3c.c
 @@ -22,6 +22,7 @@

  #include linux/mmc/host.h

 +#include plat/gpio-cfg.h
  #include plat/sdhci.h
  #include plat/regs-sdhci.h

 @@ -213,6 +214,36 @@ static void sdhci_s3c_set_clock(struct sdhci_host 
 *host,
 unsigned int clock)
  }

  /**
 + * sdhci_s3c_get_ro - callback for get_ro
 + * @host: The SDHCI host being changed
 + *
 + * If the WP pin is connected with GPIO, can get the value which indicates
 + * the card is locked or not.
 +*/
 +static int sdhci_s3c_get_ro(struct mmc_host *mmc)
 +{
 +   struct sdhci_s3c *sc;
 +   struct sdhci_host *host;
 +
 +   host = mmc_priv(mmc);
 +   sc = sdhci_priv(host);
 This can be done as static initializer if you reverse the order above.
 Could you please kindly explain about this?
 Sorry, I cannot get the exactly meaning...

+static int sdhci_s3c_get_ro(struct mmc_host *mmc)
+{
+   struct sdhci_host *host = mmc_priv(mmc);
+   struct sdhci_s3c *sc = sdhci_priv(host);



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Re: [PATCH v3 3/3] sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT quirk for Samsung SoC

[Maurus Cuelenaere]

 Op 23-07-10 13:56, Kukjin Kim schreef:
 From: Hyuk Lee hyuk1@samsung.com

 If host controller doesn't have WP pin which should be connnected with SDMMC
 card WP pin, can implement get_ro function with using the allocated gpio.
 In order to use this quirk wp_gpio in the platform data must be set.

 Signed-off-by: Hyuk Lee hyuk1@samsung.com
 Signed-off-by: Kukjin Kim kgene@samsung.com
 ---
  drivers/mmc/host/sdhci-s3c.c |   43 
 ++
  drivers/mmc/host/sdhci.c |3 ++
  drivers/mmc/host/sdhci.h |3 ++
  3 files changed, 49 insertions(+), 0 deletions(-)

 diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
 index 0d25285..0b75e57 100644
 --- a/drivers/mmc/host/sdhci-s3c.c
 +++ b/drivers/mmc/host/sdhci-s3c.c
 @@ -22,6 +22,7 @@
  
  #include linux/mmc/host.h
  
 +#include plat/gpio-cfg.h
  #include plat/sdhci.h
  #include plat/regs-sdhci.h
  
 @@ -213,6 +214,36 @@ static void sdhci_s3c_set_clock(struct sdhci_host *host, 
 unsigned int clock)
  }
  
  /**
 + * sdhci_s3c_get_ro - callback for get_ro
 + * @host: The SDHCI host being changed
 + *
 + * If the WP pin is connected with GPIO, can get the value which indicates
 + * the card is locked or not.
 +*/
 +static int sdhci_s3c_get_ro(struct mmc_host *mmc)
 +{
 + struct sdhci_s3c *sc;
 + struct sdhci_host *host;
 +
 + host = mmc_priv(mmc);
 + sc = sdhci_priv(host);

This can be done as static initializer if you reverse the order above.

 +
 + return gpio_get_value(sc-pdata-wp_gpio);
 +}

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Re: [PATCH v2] s3c-fb: Automatically calculate pixel clock when none is given

[Maurus Cuelenaere]

 Op 15-07-10 20:52, Andrew Morton schreef:
 On Tue, 13 Jul 2010 02:05:45 +0200
 Maurus Cuelenaere mcuelena...@gmail.com wrote:

 This patch adds a simple algorithm which calculates the pixel clock based on 
 the
 video mode parameters. This is only done when no pixel clock is supplied 
 through
 the platform data.

 So..  we are to assume that there's a platform which doesn't provide
 the pixel clock data?  Adding some information about that in the
 changelog would have been useful.

Not exactly, this allows you to omit the pixel clock data and thus sharing the
algo used for calculating it; which is done in another patch (not submitted to
linux-fbdev, see [1]).

[1] - http://www.spinics.net/lists/linux-samsung-soc/msg02086.html

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[PATCH] s3c-fb: Automatically calculate pixel clock when none is given

[Maurus Cuelenaere]

This patch adds a simple algorithm which calculates the pixel clock based on the
video mode parameters. This is only done when no pixel clock is supplied through
the platform data.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 drivers/video/s3c-fb.c |   25 +
 1 files changed, 25 insertions(+), 0 deletions(-)

diff --git a/drivers/video/s3c-fb.c b/drivers/video/s3c-fb.c
index 9682ecc..e4715eb 100644
--- a/drivers/video/s3c-fb.c
+++ b/drivers/video/s3c-fb.c
@@ -654,6 +654,28 @@ static struct fb_ops s3c_fb_ops = {
 };
 
 /**
+ * s3c_fb_missing_pixclock() - calculates pixel clock
+ * @mode: The video mode to change.
+ *
+ * Calculate the pixel clock when none has been given through platform data.
+ */
+static void __devinit s3c_fb_missing_pixclock(struct fb_videomode *mode)
+{
+   u64 pixclk = 1ULL;
+   u32 div;
+
+   div  = mode-left_margin + mode-hsync_len + mode-right_margin +
+  mode-xres;
+   div *= mode-upper_margin + mode-vsync_len + mode-lower_margin +
+  mode-yres;
+   div *= mode-refresh ? : 60;
+
+   do_div(pixclk, div);
+
+   mode-pixclock = pixclk;
+}
+
+/**
  * s3c_fb_alloc_memory() - allocate display memory for framebuffer window
  * @sfb: The base resources for the hardware.
  * @win: The window to initialise memory for.
@@ -925,6 +947,9 @@ static int __devinit s3c_fb_probe(struct platform_device 
*pdev)
if (!pd-win[win])
continue;
 
+   if (!pd-win[win]-win_mode.pixclock)
+   s3c_fb_missing_pixclock(pd-win[win]-win_mode);
+
ret = s3c_fb_probe_win(sfb, win, sfb-windows[win]);
if (ret  0) {
dev_err(dev, failed to create window %d\n, win);
-- 
1.7.0.4

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Re: [PATCH] ARM: S5P: Add PMU device

[Maurus Cuelenaere]

 Op 05-07-10 03:46, Joonyoung Shim schreef:
 This patch adds an initcall for the s5p platforms so that they register
 their PMU IRQs with the PMU framework in the Kernel.

 Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
 ---
  arch/arm/mach-s5p6442/include/mach/irqs.h |2 +-
  arch/arm/mach-s5pc100/include/mach/irqs.h |1 +
  arch/arm/mach-s5pv210/include/mach/irqs.h |1 +
  arch/arm/plat-s5p/Makefile|1 +
  arch/arm/plat-s5p/dev-pmu.c   |   37 
 +
  5 files changed, 41 insertions(+), 1 deletions(-)
  create mode 100644 arch/arm/plat-s5p/dev-pmu.c

Wouldn't it be better if this was in plat-samsung? I can see that the S3C6410
datasheet mentions a PMU_IRQ_ENABLE bit in SYS_OTHERS so I suspect that it has
the same functionality (even though there's no mention of which interrupt this
is).


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Re: [PATCH 2/3] ASoC: Add SmartQ sound driver

[Maurus Cuelenaere]

 Op 04-07-10 11:05, Mark Brown schreef:
 On Sat, Jul 03, 2010 at 02:46:12AM +0200, Maurus Cuelenaere wrote:
 This adds sound support for the SmartQ board.

 The hardware consists of a S3C6410 coupled with a WM8987 over I²S. The WM8750
 driver is used for driving the WM8987, as they are register compatible.
 I've applied this, but...

 +static struct snd_soc_jack_pin smartq_jack_pins[] = {
 +/* Disable speaker when headphone is plugged in */
 +{
 +.pin= Internal Speaker,
 +.mask   = SND_JACK_HEADPHONE,
 +.invert = true,
 +},
 +};
 ...it probably also make sense to disable the headphone output when the
 headphone is not plugged in to save power?

I don't see what power there is to save? The speaker and headphone jack are 
connected to the same physical pins, so when disabling the pins for one of 
them, the other is also disabled.

The only way to disable the speaker is to shutdown its amplifier (using that 
GPIO pin).

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Re: [PATCH v2 1/2] ARM: SAMSUNG: Add device definition for HSMMC3

[Maurus Cuelenaere]

 Op 03-07-10 03:21, Kukjin Kim schreef:
 Maurus Cuelenaere wrote:
  Op 03-07-10 02:07, Kukjin Kim schreef:

  /* S3C6400 SDHCI setup */

 @@ -264,10 +267,22 @@ static inline void s5pv210_default_sdhci2(void)
  static inline void s5pv210_default_sdhci2(void) { }
  #endif /* CONFIG_S3C_DEV_HSMMC2 */

 +#ifdef CONFIG_S3C_DEV_HSMMC3
 +static inline void s5pv210_default_sdhci3(void)
 +{
 +   s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
 +   s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio;
 +   s3c_hsmmc3_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
 +}
 +#else
 +static inline void s5pv210_default_sdhci3(void) { }
 +#endif /* CONFIG_S3C_DEV_HSMMC3 */
 This could be simplified by putting the #ifdef inside the function.
 Yeah, you're right..but used same style with others in this file.
 ...so will modify it as your comment with others soon.

Hmm yes, I guess it's just a matter of personal taste.

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Re: [PATCH 2/3] ASoC: Add SmartQ sound driver

[Maurus Cuelenaere]

 Op 04-07-10 11:42, Mark Brown schreef:
 On Sun, Jul 04, 2010 at 11:19:37AM +0200, Maurus Cuelenaere wrote:

 I don't see what power there is to save? The speaker and headphone
 jack are connected to the same physical pins, so when disabling the
 pins for one of them, the other is also disabled.
 Meh, so they are.  That's a slightly unusual design - normally you'd
 wire the speaker amplifier to a separate set of outputs to the
 headphone.

I know, most of the SmartQ design is slightly unusual..

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Re: [PATCH 2/3] ASoC: Add SmartQ sound driver

[Maurus Cuelenaere]

 Op 03-07-10 02:46, Maurus Cuelenaere schreef:
 +static struct snd_soc_jack_pin smartq_jack_pins[] = {
 + /* Disable speaker when headphone is plugged in */
 + {
 + .pin= Internal Speaker,
 + .mask   = SND_JACK_HEADPHONE,
 + .invert = true,
 + },
 +};

Hmm I just discovered that this .invert should be false (guess I didn't test 
enough), should I resubmit this patch or submit an incremental one?

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[PATCH] ASoC: Invert speaker enabling behaviour in SmartQ sound driver

[Maurus Cuelenaere]

The speaker was enabled when the headphone was plugged in, which isn't the
wanted behaviour so correct this.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 sound/soc/s3c24xx/smartq_wm8987.c |1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/sound/soc/s3c24xx/smartq_wm8987.c 
b/sound/soc/s3c24xx/smartq_wm8987.c
index c90ef96..b480348 100644
--- a/sound/soc/s3c24xx/smartq_wm8987.c
+++ b/sound/soc/s3c24xx/smartq_wm8987.c
@@ -112,7 +112,6 @@ static struct snd_soc_jack_pin smartq_jack_pins[] = {
{
.pin= Internal Speaker,
.mask   = SND_JACK_HEADPHONE,
-   .invert = true,
},
 };
 
-- 
1.7.0.4

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Re: [PATCH v3 05/12] s3c-fb: Add support for display panning

[Maurus Cuelenaere]

 Op 02-07-10 13:25, Ben Dooks schreef:
 On 28/06/10 12:28, Maurus Cuelenaere wrote:
  Op 28-06-10 10:08, Pawel Osciak schreef:
 Supports all bpp modes.

 The PRTCON register is used to disable in-hardware updates of registers
 that store start and end addresses of framebuffer memory. This prevents
 display corruption in case we do not make it before VSYNC with updating
 them atomically. With this feature there is no need to wait for a VSYNC
 interrupt before each such update.

 Signed-off-by: Pawel Osciak p.osc...@samsung.com
 Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
 ---
  arch/arm/plat-samsung/include/plat/regs-fb.h |5 ++
  drivers/video/s3c-fb.c   |   71 
 ++
  2 files changed, 76 insertions(+), 0 deletions(-)

 diff --git a/arch/arm/plat-samsung/include/plat/regs-fb.h 
 b/arch/arm/plat-samsung/include/plat/regs-fb.h
 index ac10013..f454e32 100644
 --- a/arch/arm/plat-samsung/include/plat/regs-fb.h
 +++ b/arch/arm/plat-samsung/include/plat/regs-fb.h
 @@ -112,6 +112,11 @@
  #define VIDCON2_ORGYCbCr   (1  8)
  #define VIDCON2_YUVORDCrCb (1  7)
  
 +/* PRTCON (S3C6410, S5PC100) */
 +
 +#define PRTCON (0x0c)
 +#define PRTCON_PROTECT (1  11)
 +
  /* VIDTCON0 */
  
  #define VIDTCON0_VBPDE_MASK(0xff  24)
 diff --git a/drivers/video/s3c-fb.c b/drivers/video/s3c-fb.c
 index 59ac76a..4f3680d 100644
 --- a/drivers/video/s3c-fb.c
 +++ b/drivers/video/s3c-fb.c
 @@ -71,6 +71,7 @@ struct s3c_fb;
   * @buf_end: Offset of buffer end registers.
   * @osd: The base for the OSD registers.
   * @palette: Address of palette memory, or 0 if none.
 + * @has_prtcon: Set if has PRTCON register.
   */
  struct s3c_fb_variant {
 unsigned intis_2443:1;
 @@ -85,6 +86,8 @@ struct s3c_fb_variant {
 unsigned short  osd;
 unsigned short  osd_stride;
 unsigned short  palette[S3C_FB_MAX_WIN];
 +
 +   unsigned inthas_prtcon:1;
  };
  
  /**
 @@ -379,6 +382,9 @@ static int s3c_fb_set_par(struct fb_info *info)
  
 info-fix.line_length = (var-xres_virtual * var-bits_per_pixel) / 8;
  
 +   info-fix.xpanstep = info-var.xres_virtual  info-var.xres ? 1 : 0;
 +   info-fix.ypanstep = info-var.yres_virtual  info-var.yres ? 1 : 0;
 No need for the '? 1 : 0'
 I tihnk there is, IIRC there is no neccessity for a compiler to produce
 one for true, just that the result be !0

Hmm ok, I only checked this using GCC 4.4.3 and this:

#include stdio.h
#include stdbool.h

int main(void) {
printf(%d %d\n, (int)(1  2), (int)(1  2));   // gives 0 1
printf(%d %d\n, (bool)(1  2), (bool)(1  2)); // gives 0 1

return 0;
}

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[PATCH 1/2] ASoC: Add SmartQ sound driver

[Maurus Cuelenaere]

This adds sound support for the SmartQ board.

The hardware consists of a S3C6410 coupled with a WM8987 over I²S. As there's
no driver for the WM8987 currently, this uses the WM8750 driver (which should
be register compatible).

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 sound/soc/s3c24xx/Kconfig |6 +
 sound/soc/s3c24xx/Makefile|2 +
 sound/soc/s3c24xx/smartq_wm8987.c |  300 +
 3 files changed, 308 insertions(+), 0 deletions(-)
 create mode 100644 sound/soc/s3c24xx/smartq_wm8987.c

diff --git a/sound/soc/s3c24xx/Kconfig b/sound/soc/s3c24xx/Kconfig
index 2a7cc22..4f46ba0 100644
--- a/sound/soc/s3c24xx/Kconfig
+++ b/sound/soc/s3c24xx/Kconfig
@@ -125,3 +125,9 @@ config SND_SOC_SMDK_WM9713
select SND_S3C_SOC_AC97
help
  Sat Y if you want to add support for SoC audio on the SMDK.
+
+config SND_S3C64XX_SOC_SMARTQ
+   tristate SoC I2S Audio support for SmartQ board
+   depends on SND_S3C24XX_SOC  MACH_SMARTQ
+   select SND_S3C64XX_SOC_I2S
+   select SND_SOC_WM8750
diff --git a/sound/soc/s3c24xx/Makefile b/sound/soc/s3c24xx/Makefile
index 81d8dc5..50172c3 100644
--- a/sound/soc/s3c24xx/Makefile
+++ b/sound/soc/s3c24xx/Makefile
@@ -29,6 +29,7 @@ snd-soc-s3c24xx-simtec-hermes-objs := s3c24xx_simtec_hermes.o
 snd-soc-s3c24xx-simtec-tlv320aic23-objs := s3c24xx_simtec_tlv320aic23.o
 snd-soc-smdk64xx-wm8580-objs := smdk64xx_wm8580.o
 snd-soc-smdk-wm9713-objs := smdk_wm9713.o
+snd-soc-s3c64xx-smartq-wm8987-objs := smartq_wm8987.o
 
 obj-$(CONFIG_SND_S3C24XX_SOC_JIVE_WM8750) += snd-soc-jive-wm8750.o
 obj-$(CONFIG_SND_S3C24XX_SOC_NEO1973_WM8753) += snd-soc-neo1973-wm8753.o
@@ -41,3 +42,4 @@ obj-$(CONFIG_SND_S3C24XX_SOC_SIMTEC_HERMES) += 
snd-soc-s3c24xx-simtec-hermes.o
 obj-$(CONFIG_SND_S3C24XX_SOC_SIMTEC_TLV320AIC23) += 
snd-soc-s3c24xx-simtec-tlv320aic23.o
 obj-$(CONFIG_SND_S3C64XX_SOC_WM8580) += snd-soc-smdk64xx-wm8580.o
 obj-$(CONFIG_SND_SOC_SMDK_WM9713) += snd-soc-smdk-wm9713.o
+obj-$(CONFIG_SND_S3C64XX_SOC_SMARTQ) += snd-soc-s3c64xx-smartq-wm8987.o
diff --git a/sound/soc/s3c24xx/smartq_wm8987.c 
b/sound/soc/s3c24xx/smartq_wm8987.c
new file mode 100644
index 000..ef6183f
--- /dev/null
+++ b/sound/soc/s3c24xx/smartq_wm8987.c
@@ -0,0 +1,300 @@
+/* sound/soc/s3c24xx/smartq_wm8987.c
+ *
+ * Copyright 2010 Maurus Cuelenaere mcuelena...@gmail.com
+ *
+ * Based on smdk6410_wm8987.c
+ * Copyright 2007 Wolfson Microelectronics PLC. - li...@wolfsonmicro.com
+ * Graeme Gregory - graeme.greg...@wolfsonmicro.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ */
+
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/gpio.h
+
+#include sound/pcm.h
+#include sound/pcm_params.h
+#include sound/soc-dapm.h
+#include sound/jack.h
+
+#include asm/mach-types.h
+
+#include s3c-dma.h
+#include s3c64xx-i2s.h
+
+#include ../codecs/wm8750.h
+
+/*
+ * According to http://www.wolfsonmicro.com/products/WM8987 the WM8987 is
+ * register compatible with the WM8750, so I'm currently using that one as
+ * there's no WM8987 codec driver.
+ */
+
+static struct snd_soc_card snd_soc_smartq;
+
+static int smartq_hifi_hw_params(struct snd_pcm_substream *substream,
+   struct snd_pcm_hw_params *params)
+{
+   struct snd_soc_pcm_runtime *rtd = substream-private_data;
+   struct snd_soc_dai *codec_dai = rtd-dai-codec_dai;
+   struct snd_soc_dai *cpu_dai = rtd-dai-cpu_dai;
+   struct s3c_i2sv2_rate_calc div;
+   unsigned int clk = 0;
+   int ret;
+
+   s3c_i2sv2_iis_calc_rate(div, NULL, params_rate(params),
+   s3c_i2sv2_get_clock(cpu_dai));
+
+   switch (params_rate(params)) {
+   case 8000:
+   case 16000:
+   case 32000:
+   case 48000:
+   case 96000:
+   clk = 12288000;
+   break;
+   case 11025:
+   case 22050:
+   case 44100:
+   case 88200:
+   clk = 11289600;
+   break;
+   }
+
+   /* set codec DAI configuration */
+   ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
+SND_SOC_DAIFMT_NB_NF |
+SND_SOC_DAIFMT_CBS_CFS);
+   if (ret  0)
+   return ret;
+
+   /* set cpu DAI configuration */
+   ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
+  SND_SOC_DAIFMT_NB_NF |
+  SND_SOC_DAIFMT_CBS_CFS);
+   if (ret  0)
+   return ret;
+
+   /* set the codec system clock for DAC and ADC */
+   ret = snd_soc_dai_set_sysclk(codec_dai, WM8750_SYSCLK, clk,
+SND_SOC_CLOCK_IN

[PATCH 2/2] ARM: S3C64XX: Add audio support to SmartQ

[Maurus Cuelenaere]

This adds the I²C board information for the WM8987 used in the SmartQ as audio
codec and adds the I²C/I²S platform drivers.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c64xx/mach-smartq.c |7 +++
 1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c 
b/arch/arm/mach-s3c64xx/mach-smartq.c
index 028d080..ee77255 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq.c
@@ -199,6 +199,9 @@ static struct platform_device smartq_lcd_power_device = {
.dev.platform_data  = smartq_lcd_power_data,
 };
 
+static struct i2c_board_info smartq_i2c_devs[] __initdata = {
+   { I2C_BOARD_INFO(wm8750, 0x1a), },
+};
 
 static struct platform_device *smartq_devices[] __initdata = {
s3c_device_hsmmc1, /* Init iNAND first, ... */
@@ -213,6 +216,7 @@ static struct platform_device *smartq_devices[] __initdata 
= {
s3c_device_timer[1],
s3c_device_ts,
s3c_device_usb_hsotg,
+   s3c64xx_device_iis0,
smartq_backlight_device,
smartq_lcd_power_device,
smartq_usb_otg_vbus_dev,
@@ -354,6 +358,9 @@ void __init smartq_machine_init(void)
s3c_sdhci2_set_platdata(smartq_internal_hsmmc_pdata);
s3c24xx_ts_set_platdata(smartq_touchscreen_pdata);
 
+   i2c_register_board_info(0, smartq_i2c_devs,
+   ARRAY_SIZE(smartq_i2c_devs));
+
WARN_ON(smartq_power_off_init());
WARN_ON(smartq_usb_host_init());
WARN_ON(smartq_usb_otg_init());
-- 
1.7.0.4

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Re: [alsa-devel] [PATCH 1/2] ASoC: Add SmartQ sound driver

[Maurus Cuelenaere]

 Op 03-07-10 02:15, Mark Brown schreef:
 On Sat, Jan 30, 2010 at 06:23:14PM +0100, Maurus Cuelenaere wrote:

 Might want to check your mail setup - the date looks wrong.

Looks like it picked the date I first started this commit, will correct it next 
time.

 This adds sound support for the SmartQ board.

 The hardware consists of a S3C6410 coupled with a WM8987 over I²S. As there's
 no driver for the WM8987 currently, this uses the WM8750 driver (which should
 be register compatible).
 There's no need to add a separate driver for a register compatible part,
 just add the I2C/SPI IDs to the existing driver.  Otherwise we just
 duplicate it redundantly.  Please update this and the comment in the
 driver to reflect that.

Ok, will do.

 Otherwise this looks OK, but there's a couple of things that it'd be
 nice to update:

 +dev_info(smartq_snd_device-dev, SmartQ WM8987 audio driver 
 inited\n);
 Best to remove this, it gets a bit noisy.

Ok.

 +MODULE_AUTHOR(Maurus Cuelenaere);
 Better to add your mail address too.

Ok.

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Re: [PATCH v5] libata: pata_samsung: Add Samsung PATA controller driver

[Maurus Cuelenaere]

 Op 30-06-10 12:39, Kukjin Kim schreef:
 Maurus Cuelenaere wrote:
 Hi Maurus :-)

Hi Kukjin

  Op 29-06-10 13:05, Kukjin Kim schreef:
 From: Abhilash Kesavan a.kesa...@samsung.com

 Adds support for the Samsung PATA controller. This driver is based on the
 Libata subsystem and references the earlier patches sent for IDE subsystem.

 Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
 Signed-off-by: Kukjin Kim kgene@samsung.com
 Cc: Ben Dooks ben-li...@fluff.org
snip
 +/*
 + * Waits until the IDE controller is able to perform next read/write
 + * operation to the disk. Needed for 64XX series boards only.
 + */
 +static int wait_for_host_ready(struct s3c_ide_info *info)
 +{
 +   ulong timeout;
 +   void __iomem *fifo_reg = info-ide_addr + info-fifo_status_reg;
 +
 Shouldn't this have an if (type != S3C64XX) return 0; ?

 Actually, wait_for_host_ready() is called only by pata_s3c_port_ops methods 

Oh, ok. Sorry for the noise.

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Re: [RFC 9/9] crypto: Add Samsung crypto engine driver

[Maurus Cuelenaere]

 Op 27-06-10 06:07, David Miller schreef:
 From: Maurus Cuelenaere mcuelena...@gmail.com
 Date: Fri, 11 Jun 2010 21:49:21 +0200

 This patch adds support for the Samsung crypto engine driver available in the
 S3C64XX and S5PC100 SoCs. Currently this supports AES and (T)DES with ECB and
 CBC block ciphers (also CTR for AES). Support for (HMAC)-SHA1 acceleration is
 also available in this engine, but isn't used in the driver yet.

 Support for DMA has been added in the code but is currently disabled due to
 issues with data transfers.

 Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
 I would personally queue up new crypto requests directly when there are
 no queued up requests and -cur_req is NULL, instead of doing all of
 that work to do the submission in the tasklet.  I would also do the
 completion and queue running directly in the hw IRQ handler.

 The tasklet is just pure overhead.

 Basically, when doing async crypto, every cycle that is consumed just
 to implement crypto job submission and completion takes away from the
 gains you get by doing it in hw at all.

 You can see this clearly if you do performance comparisons between the
 synchronous crypto routines and your async ones done in HW.

I'll rewrite it like you're suggesting.
I'd go with a threaded interrupt handler in that case then, or do you also 
consider this as too much overhead?

I'll do some performance comparisons of threaded interrupt handler vs normal 
and go with the fastest.

Thanks for the review!

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Re: [PATCH 4/4] ARM: S3C2416: Add platform helpers for setup SDHCI

[Maurus Cuelenaere]

-function 0 */
 + for (gpio = S3C2410_GPL(0); gpio  end; gpio++) {
 + s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
 + s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
 + }
 +
 + s3c_gpio_cfgpin(S3C2410_GPL(8), S3C_GPIO_SFN(2));
 + s3c_gpio_setpull(S3C2410_GPL(8), S3C_GPIO_PULL_NONE);
 + s3c_gpio_cfgpin(S3C2410_GPL(9), S3C_GPIO_SFN(2));
 + s3c_gpio_setpull(S3C2410_GPL(9), S3C_GPIO_PULL_NONE);
 +}
 +
 +
 diff --git a/arch/arm/mach-s3c2416/setup-sdhci.c 
 b/arch/arm/mach-s3c2416/setup-sdhci.c
 new file mode 100644
 index 000..345ddd1
 --- /dev/null
 +++ b/arch/arm/mach-s3c2416/setup-sdhci.c
 @@ -0,0 +1,62 @@
 +/* linux/arch/arm/mach-s3c2416/setup-sdhci.c
 + *
 + * Copyright 2010 Promwad Innovation Company
 + *   Yauhen Kharuzhy yauhen.kharu...@promwad.com
 + *
 + * S3C2416 - Helper functions for settign up SDHCI device(s) (HSMMC)
 + *
 + * Based on mach-s3c64xx/setup-sdhci.c
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 +*/
 +
 +#include linux/kernel.h
 +#include linux/types.h
 +#include linux/interrupt.h
 +#include linux/platform_device.h
 +#include linux/io.h
 +
 +#include linux/mmc/card.h
 +#include linux/mmc/host.h
 +
 +#include plat/regs-sdhci.h
 +#include plat/sdhci.h
 +
 +/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
 +
 +char *s3c2416_hsmmc_clksrcs[4] = {
 + [0] = hsmmc,
 + [1] = hsmmc,
 + [2] = hsmmc-if,
 + /* [3] = 48m, - note not successfully used yet */
 +};
 +
 +void s3c2416_setup_sdhci_cfg_card(struct platform_device *dev,
 +   void __iomem *r,
 +   struct mmc_ios *ios,
 +   struct mmc_card *card)
 +{
 + u32 ctrl2, ctrl3;
 +
 + ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
 + ctrl2 = S3C_SDHCI_CTRL2_SELBASECLK_MASK;
 + ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
 +   S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
 +   S3C_SDHCI_CTRL2_ENFBCLKRX |
 +   S3C_SDHCI_CTRL2_DFCNT_NONE |
 +   S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
 +
 + if (ios-clock  25 * 100)
 + ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
 +  S3C_SDHCI_CTRL3_FCSEL2 |
 +  S3C_SDHCI_CTRL3_FCSEL1 |
 +  S3C_SDHCI_CTRL3_FCSEL0);
 + else
 + ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
 +
 + writel(ctrl2, r + S3C_SDHCI_CONTROL2);
 + writel(ctrl3, r + S3C_SDHCI_CONTROL3);
 +}
 +
 diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h 
 b/arch/arm/plat-samsung/include/plat/sdhci.h
 index 13f9fb2..d408140 100644
 --- a/arch/arm/plat-samsung/include/plat/sdhci.h
 +++ b/arch/arm/plat-samsung/include/plat/sdhci.h
 @@ -78,6 +78,8 @@ extern void s3c64xx_setup_sdhci2_cfg_gpio(struct 
 platform_device *, int w);
  extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
  extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
  extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
 +extern void s3c2416_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
 +extern void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
  
  /* S3C6400 SDHCI setup */
  
 @@ -270,6 +272,38 @@ static inline void s5pv210_default_sdhci1(void) { }
  static inline void s5pv210_default_sdhci2(void) { }
  #endif /* CONFIG_S5PC100_SETUP_SDHCI */
  
 +/* S3C2416 SDHCI setup */
 +#ifdef CONFIG_S3C2416_SETUP_SDHCI
 +extern char *s3c2416_hsmmc_clksrcs[4];
 +
 +extern void s3c2416_setup_sdhci_cfg_card(struct platform_device *dev,
 +void __iomem *r,
 +struct mmc_ios *ios,
 +struct mmc_card *card);
 +
 +#ifdef CONFIG_S3C_DEV_HSMMC
 +static inline void s3c2416_default_sdhci0(void)
 +{
 + s3c_hsmmc0_def_platdata.clocks = s3c2416_hsmmc_clksrcs;
 + s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio;
 + s3c_hsmmc0_def_platdata.cfg_card = s3c2416_setup_sdhci_cfg_card;
 +}
 +#else
 +static inline void s3c2416_default_sdhci0(void) { }
 +#endif /* CONFIG_S3C_DEV_HSMMC */
 +
 +#ifdef CONFIG_S3C_DEV_HSMMC1
 +static inline void s3c2416_default_sdhci1(void)
 +{
 + s3c_hsmmc1_def_platdata.clocks = s3c2416_hsmmc_clksrcs;
 + s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio;
 + s3c_hsmmc1_def_platdata.cfg_card = s3c2416_setup_sdhci_cfg_card;
 +}
 +#else
 +static inline void s3c2416_default_sdhci1(void) { }
 +#endif /* CONFIG_S3C_DEV_HSMMC1 */
 +
 +#endif /* CONFIG_S3C2416_SETUP_SDHCI */
  
  
  
   


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Re: [PATCH 2/3] ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210

[Maurus Cuelenaere]

Op 15-06-10 13:27, Kukjin Kim schreef:
 From: Lee Hyuk hyuk1@samsung.com

 S5PV210 HSMMC host controller doesn't have the Write Protection pin which
 should be connnected with SDMMC card WP pin. So allocated a GPIO in order to
 get the data from SDMMC card WP pin with EXT_INT and implement get_ro and
 cfg_wp function.

 Signed-off-by: Hyuk Lee hyuk1@samsung.com
 Signed-off-by: Kukjin Kim kgene@samsung.com
 ---
  arch/arm/mach-s5pv210/mach-smdkv210.c |2 +
  arch/arm/mach-s5pv210/setup-sdhci.c   |   72 
 +
  2 files changed, 74 insertions(+), 0 deletions(-)

 diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c 
 b/arch/arm/mach-s5pv210/mach-smdkv210.c
 index b08f376..18cdb8c 100644
 --- a/arch/arm/mach-s5pv210/mach-smdkv210.c
 +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
 @@ -27,6 +27,7 @@
  #include plat/cpu.h
  #include plat/adc.h
  #include plat/ts.h
 +#include plat/sdhci.h
  
  /* Following are default values for UCON, ULCON and UFCON UART registers */
  #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL |\
 @@ -101,6 +102,7 @@ static void __init smdkv210_map_io(void)
  static void __init smdkv210_machine_init(void)
  {
   s3c24xx_ts_set_platdata(s3c_ts_platform);
 + s3c_sdhci_set_platdata();
   

Wouldn't it be better to name this s5pv210_sdhci_set_platdata() ?
Also, see below.

   platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
  }
  
 diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c 
 b/arch/arm/mach-s5pv210/setup-sdhci.c
 index 51815ec..b553b36 100644
 --- a/arch/arm/mach-s5pv210/setup-sdhci.c
 +++ b/arch/arm/mach-s5pv210/setup-sdhci.c
 @@ -15,13 +15,17 @@
  #include linux/interrupt.h
  #include linux/platform_device.h
  #include linux/io.h
 +#include linux/gpio.h
  
  #include linux/mmc/card.h
  #include linux/mmc/host.h
  
 +#include plat/gpio-cfg.h
  #include plat/regs-sdhci.h
  #include plat/sdhci.h
  
 +#include mach/map.h
 +
  /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
  
  char *s5pv210_hsmmc_clksrcs[4] = {
 @@ -61,3 +65,71 @@ void s5pv210_setup_sdhci_cfg_card(struct platform_device 
 *dev,
   writel(ctrl2, r + S3C_SDHCI_CONTROL2);
   writel(ctrl3, r + S3C_SDHCI_CONTROL3);
  }
 +
 +static int s5pv210_sdhci_get_ro(struct mmc_host *mmc)
 +{
 + int gpio_dat;
 +
 + if ((mmc-index == 0  s3c_hsmmc0_def_platdata.cfg_wp != NULL) ||
 + (mmc-index == 1  s3c_hsmmc1_def_platdata.cfg_wp != NULL)) {
 + gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x04);
 + return !!(gpio_dat  0x80);
 + } else if (mmc-index == 2  s3c_hsmmc2_def_platdata.cfg_wp != NULL) {
 + gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x64);
 + return !!(gpio_dat  0x2);
 + } else if (mmc-index == 3  s3c_hsmmc3_def_platdata.cfg_wp != NULL) {
 + gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x24);
 + return !!(gpio_dat  0x1);
 + } else
 + return 0;
 +}
 +
 +static void s5pv210_setup_sdhci_gpio_wp(int dev_id)
 +{
 + switch (dev_id) {
 + case 0:
 + case 1:
 + s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_INPUT);
 + s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
 + break;
 + case 2:
 + s3c_gpio_cfgpin(S5PV210_GPH3(1), S3C_GPIO_INPUT);
 + s3c_gpio_setpull(S5PV210_GPH3(1), S3C_GPIO_PULL_UP);
 + break;
 + case 3:
 + s3c_gpio_cfgpin(S5PV210_GPH1(0), S3C_GPIO_INPUT);
 + s3c_gpio_setpull(S5PV210_GPH1(0), S3C_GPIO_PULL_UP);
 + break;
 + default:
 + break;
 + }
 +}
 +
 +static struct s3c_sdhci_platdata hsmmc0_platdata = {
 + .cfg_wp = s5pv210_setup_sdhci_gpio_wp,
 + .get_ro = s5pv210_sdhci_get_ro,
 +};
 +
 +static struct s3c_sdhci_platdata hsmmc1_platdata = {
 + .cfg_wp = s5pv210_setup_sdhci_gpio_wp,
 + .get_ro = s5pv210_sdhci_get_ro,
 +};
 +
 +static struct s3c_sdhci_platdata hsmmc2_platdata = {
 + .cfg_wp = s5pv210_setup_sdhci_gpio_wp,
 + .get_ro = s5pv210_sdhci_get_ro,
 +};
 +
 +static struct s3c_sdhci_platdata hsmmc3_platdata = {
 + .cfg_wp = s5pv210_setup_sdhci_gpio_wp,
 + .get_ro = s5pv210_sdhci_get_ro,
 +};
 +
 +void s3c_sdhci_set_platdata(void)
 +{
 + s3c_sdhci0_set_platdata(hsmmc0_platdata);
 + s3c_sdhci1_set_platdata(hsmmc1_platdata);
 + s3c_sdhci2_set_platdata(hsmmc2_platdata);
 + s3c_sdhci3_set_platdata(hsmmc3_platdata);
 +}
 +EXPORT_SYMBOL(s3c_sdhci_set_platdata);
   

Why do you export this function? I don't see this being used anywhere
except in mach-s5pv210.

-- 
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S3C FB pixclock calculation

[Maurus Cuelenaere]

Hi,

one thing that has bothered me for some time is the fb pixclock value: this
seems rather arbitrary and undocumented (couldn't find it in the datasheets).

Though I did find an algorithm, which I've used in the SmartQ machs for the
calculation of this value (I can't remember where I found it, I think it was in
the original SmartQ kernels).

So I made this small patch which does the calculation in the s3c fb driver
itself when the pixclock pdata hasn't been set (see below).

I've checked this against the SMDK6410 value (and ANW6410 and HMT, which are
identical) and it seems to match so I *think* this is correct, but as it's
undocumented I'm not sure.

Is anyone able to tell me whether I'm correct? (if so, I'll clean up this patch
and send it for inclusion)

--
Maurus Cuelenaere

diff --git a/drivers/video/s3c-fb.c b/drivers/video/s3c-fb.c
index 9682ecc..17d882f 100644
--- a/drivers/video/s3c-fb.c
+++ b/drivers/video/s3c-fb.c
@@ -235,6 +235,22 @@ static int s3c_fb_calc_pixclk(struct s3c_fb *sfb, unsigned 
int pixclk)
return result;
 }

+static void s3c_fb_missing_pixclock(struct fb_videomode *mode)
+{
+   u64 pixclk = 1ULL;
+   u32 div;
+
+   div  = mode-left_margin + mode-hsync_len + mode-right_margin +
+  mode-xres;
+   div *= mode-upper_margin + mode-vsync_len + mode-lower_margin +
+  mode-yres;
+   div *= mode-refresh ? : 80;
+
+   do_div(pixclk, div);
+
+   mode-pixclock = pixclk;
+}
+
 /**
  * s3c_fb_align_word() - align pixel count to word boundary
  * @bpp: The number of bits per pixel
@@ -925,6 +941,9 @@ static int __devinit s3c_fb_probe(struct platform_device 
*pdev)
if (!pd-win[win])
continue;

+   if (!pd-win[win]-win_mode.pixclock)
+   s3c_fb_missing_pixclock(pd-win[win]-win_mode);
+
ret = s3c_fb_probe_win(sfb, win, sfb-windows[win]);
if (ret  0) {
dev_err(dev, failed to create window %d\n, win);


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Re: [PATCH 06/11] USB: s3c-hsotg: Add initial detection and setup for dedicated FIFO mode

[Maurus Cuelenaere]

Op 11-06-10 10:20, Ben Dooks schreef:
 Add support for the dedicated FIFO mode on newer SoCs such as the S5PV210
 partly to improve support and to fix the bug where any non-EP0 IN endpoint
 requires its own FIFO allocation.
 
 To fix this, we ensure that any non-zero IN endpoint is given a TXFIFO
 using the same allocation method as the periodic case (all our current
 hardware has enough FIFOs and FIFO memory for a 1:1 mapping) and ensure
 that the necessary transmission done interrupt is enabled.
 
 The default settings from reset for the core point all EPs at FIFO0,
 used for the control endpoint. However, the controller documentation
 states that all IN endpoints _must_ have a unique FIFO to avoid any
 contention during transmission.
 
 Note, this leaves us with a large IN FIFO for EP0 (which re-uses the
 old NPTXFIFO) for an endpoint which cannot shift more than a pair of
 packets at a time... this is a waste, but it looks like we cannot
 re-allocate space to the individual IN FIFOs as they are already
 maxed out (to be confirmed).
 
 Signed-off-by: Ben Dooks ben-linux-elnmno+kys3ytjvyw6y...@public.gmane.org?

Shouldn't this be s/\?// ?

 ---
  .../arm/plat-samsung/include/plat/regs-usb-hsotg.h |2 +
  drivers/usb/gadget/s3c-hsotg.c |   40 
 +++-
  2 files changed, 40 insertions(+), 2 deletions(-)
 
 diff --git a/arch/arm/plat-samsung/include/plat/regs-usb-hsotg.h 
 b/arch/arm/plat-samsung/include/plat/regs-usb-hsotg.h
 index 8d18d9d..dc90f5e 100644
 --- a/arch/arm/plat-samsung/include/plat/regs-usb-hsotg.h
 +++ b/arch/arm/plat-samsung/include/plat/regs-usb-hsotg.h
 @@ -226,6 +226,7 @@
  
  #define S3C_DIEPMSK  S3C_HSOTG_REG(0x810)
  
 +#define S3C_DIEPMSK_TxFIFOEmpty  (1  7)
  #define S3C_DIEPMSK_INEPNakEffMsk(1  6)
  #define S3C_DIEPMSK_INTknEPMisMsk(1  5)
  #define S3C_DIEPMSK_INTknTXFEmpMsk   (1  4)
 @@ -371,6 +372,7 @@
  
  #define S3C_DIEPDMA(_a)  S3C_HSOTG_REG(0x914 + 
 ((_a) * 0x20))
  #define S3C_DOEPDMA(_a)  S3C_HSOTG_REG(0xB14 + 
 ((_a) * 0x20))
 +#define S3C_DTXFSTS(_a)  S3C_HSOTG_REG(0x918 + 
 ((_a) * 0x20))
  
  #define S3C_EPFIFO(_a)   S3C_HSOTG_REG(0x1000 + 
 ((_a) * 0x1000))
  
 diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c
 index 5b61bcf..819e75a 100644
 --- a/drivers/usb/gadget/s3c-hsotg.c
 +++ b/drivers/usb/gadget/s3c-hsotg.c
 @@ -12,6 +12,8 @@
   * published by the Free Software Foundation.
  */
  
 +#define DEBUG

I don't think this is an intended change?

 +
  #include linux/kernel.h
  #include linux/module.h
  #include linux/spinlock.h
 @@ -131,6 +133,7 @@ struct s3c_hsotg_ep {
   * @regs: The memory area mapped for accessing registers.
   * @regs_res: The resource that was allocated when claiming register space.
   * @irq: The IRQ number we are using
 + * @dedicated_fifos: Set if the hardware has dedicated IN-EP fifos.
   * @debug_root: root directrory for debugfs.
   * @debug_file: main status file for debugfs.
   * @debug_fifo: FIFO status file for debugfs.
 @@ -149,6 +152,8 @@ struct s3c_hsotg {
   struct resource *regs_res;
   int irq;
  
 + unsigned intdedicated_fifos:1;
 +
   struct dentry   *debug_root;
   struct dentry   *debug_file;
   struct dentry   *debug_fifo;
 @@ -467,7 +472,7 @@ static int s3c_hsotg_write_fifo(struct s3c_hsotg *hsotg,
   if (to_write == 0)
   return 0;
  
 - if (periodic) {
 + if (periodic  !hsotg-dedicated_fifos) {
   u32 epsize = readl(hsotg-regs + S3C_DIEPTSIZ(hs_ep-index));
   int size_left;
   int size_done;
 @@ -505,6 +510,11 @@ static int s3c_hsotg_write_fifo(struct s3c_hsotg *hsotg,
   s3c_hsotg_en_gsint(hsotg, S3C_GINTSTS_PTxFEmp);
   return -ENOSPC;
   }
 + } else if (hsotg-dedicated_fifos  hs_ep-index != 0) {
 + can_write = readl(hsotg-regs + S3C_DTXFSTS(hs_ep-index));
 +
 + can_write = 0x;
 + can_write *= 4;
   } else {
   if (S3C_GNPTXSTS_NPTxQSpcAvail_GET(gnptxsts) == 0) {
   dev_dbg(hsotg-dev,
 @@ -1830,6 +1840,15 @@ static void s3c_hsotg_epint(struct s3c_hsotg *hsotg, 
 unsigned int idx,
__func__, idx);
   clear |= S3C_DIEPMSK_INTknEPMisMsk;
   }
 +
 + /* FIFO has space or is empty (see GAHBCFG) */
 + if (hsotg-dedicated_fifos 
 + ints  S3C_DIEPMSK_TxFIFOEmpty) {
 + dev_dbg(hsotg-dev, %s: ep%d: TxFIFOEmpty\n,
 + __func__, idx);
 + s3c_hsotg_trytx(hsotg, hs_ep);
 + clear |= S3C_DIEPMSK_TxFIFOEmpty;
 + }

[RFC/PATCH 0/9] Samsung crypto engine

[Maurus Cuelenaere]

Hi all,

this patchset introduces crypto acceleration support for the crypto engine
available in S3C64XX and S5PC100 SoC's. I only have access to a S3C6410 board so
it would be nice if people could test these patches on S5PC100.

The driver currently only supports AES and (T)DES in PIO mode, but even then it
doesn't always succeed the DES self-tests so the driver part of this patch is
more an RFC than an actual patch.

AES seems to work better than (T)DES, but it hangs on 64-bytes transfers (DES
hangs on a 24-byte transfer).

There is support for DMA in the driver, but that has its own set of problems (it
can't even finish a single transfer).

I've tagged the patches I think are worthy for upstreaming with [PATCH], the
others are tagged with [RFC] (reviews are welcome!).

I'm not completely sure about my approach of handling the subsystems' register
offsets currently as this limits the driver to S3C64XX- or S5PC100-only.

Mapping these to virtual space could solve this and would have the benefit of
reducing the ~11MB IO space on S3C64XX SoC's.

Maurus Cuelenaere (9):
  ARM: S3C64XX: Add SDMA clocks
  ARM: S3C64XX: Add SDMA support to DMA core
  ARM: S3C64XX: Stop and flush requests on freeing
  ARM: S3C64XX: Add support for secur clock
  ARM: S3C64XX: Add crypto engine register definitions
  ARM: S5PC100: Add crypto engine register definitions
  ARM: SAMSUNG: Add crypto engine platform definition
  ARM: SAMSUNG: Add crypto engine register definitions
  crypto: Add Samsung crypto engine driver

 arch/arm/Kconfig  |2 +
 arch/arm/mach-s3c64xx/clock.c |   21 +
 arch/arm/mach-s3c64xx/dma.c   |   54 +-
 arch/arm/mach-s3c64xx/include/mach/map.h  |3 +
 arch/arm/mach-s3c64xx/include/mach/regs-sss.h |   27 +
 arch/arm/mach-s5pc100/include/mach/map.h  |4 +
 arch/arm/mach-s5pc100/include/mach/regs-sss.h |   29 +
 arch/arm/plat-samsung/Kconfig |5 +
 arch/arm/plat-samsung/Makefile|1 +
 arch/arm/plat-samsung/dev-sss.c   |   46 +
 arch/arm/plat-samsung/include/plat/devs.h |2 +
 arch/arm/plat-samsung/include/plat/regs-sss.h |  153 +++
 drivers/crypto/Kconfig|   11 +
 drivers/crypto/Makefile   |1 +
 drivers/crypto/s3c-sss.c  | 1320 +
 15 files changed, 1668 insertions(+), 11 deletions(-)
 create mode 100644 arch/arm/mach-s3c64xx/include/mach/regs-sss.h
 create mode 100644 arch/arm/mach-s5pc100/include/mach/regs-sss.h
 create mode 100644 arch/arm/plat-samsung/dev-sss.c
 create mode 100644 arch/arm/plat-samsung/include/plat/regs-sss.h
 create mode 100644 drivers/crypto/s3c-sss.c

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[PATCH 1/9] ARM: S3C64XX: Add SDMA clocks

[Maurus Cuelenaere]

This adds the clock definition bits for SDMA.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c64xx/clock.c |   12 
 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 7a4138b..d3e11a1 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -218,6 +218,18 @@ static struct clk init_clocks_disable[] = {
.parent = clk_h,
.enable = s3c64xx_hclk_ctrl,
.ctrlbit= S3C_CLKCON_HCLK_DMA1,
+   }, {
+   .name   = sdma0,
+   .id = -1,
+   .parent = clk_h,
+   .enable = s3c64xx_hclk_ctrl,
+   .ctrlbit= S3C_CLKCON_HCLK_SDMA0,
+   }, {
+   .name   = sdma1,
+   .id = -1,
+   .parent = clk_h,
+   .enable = s3c64xx_hclk_ctrl,
+   .ctrlbit= S3C_CLKCON_HCLK_SDMA1,
},
 };
 
-- 
1.7.1


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[PATCH 3/9] ARM: S3C64XX: Stop and flush requests on freeing

[Maurus Cuelenaere]

When a DMA channel is freed, its pending requests should be flushed and the
channel should be halted. This patch ensures that happens.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c64xx/dma.c |3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index be043db..48cbfbc 100644
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -560,7 +560,8 @@ int s3c2410_dma_free(unsigned int channel, struct 
s3c2410_dma_client *client)
   channel, chan-client, client);
}
 
-   /* sort out stopping and freeing the channel */
+   s3c64xx_dma_flush(chan);
+   s3c64xx_dma_stop(chan);
 
 
chan-client = NULL;
-- 
1.7.1


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[PATCH 5/9] ARM: S3C64XX: Add crypto engine register definitions

[Maurus Cuelenaere]

This patch adds the physical address and size which corresponds to the crypto
engine on the S3C64XX. It also adds the offsets for the crypto subsystems.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c64xx/include/mach/map.h  |3 ++
 arch/arm/mach-s3c64xx/include/mach/regs-sss.h |   27 +
 2 files changed, 30 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-s3c64xx/include/mach/regs-sss.h

diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h 
b/arch/arm/mach-s3c64xx/include/mach/map.h
index 9fdd50c..fa80afc 100644
--- a/arch/arm/mach-s3c64xx/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
@@ -87,6 +87,9 @@
 #define S3C64XX_PA_USB_HSPHY   (0x7C10)
 #define S3C64XX_VA_USB_HSPHY   S3C_ADDR_CPU(0x0020)
 
+#define SAMSUNG_PA_SSS (0x7D00)
+#define SAMSUNG_SZ_SSS (SZ_1M * 10 + SZ_256)
+
 /* place VICs close together */
 #define VA_VIC0(S3C_VA_IRQ + 0x00)
 #define VA_VIC1(S3C_VA_IRQ + 0x1)
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-sss.h 
b/arch/arm/mach-s3c64xx/include/mach/regs-sss.h
new file mode 100644
index 000..3a0769f
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-sss.h
@@ -0,0 +1,27 @@
+/*
+ * linux/arch/arm/mach-s3c64xx/include/mach/regs-sss.h
+ *
+ * Copyright (C) 2010 Maurus Cuelenaere
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __MACH_S3C64XX_REGS_SSS_H
+#define __MACH_S3C64XX_REGS_SSS_H __FILE__
+
+#define SSS_OFF_CFG(0x00)
+#define SSS_OFF_AES_RX (0x10)
+#define SSS_OFF_TDES_RX(0x20)
+#define SSS_OFF_HASH_RX(0x30)
+#define SSS_OFF_FIFO_RX(0x40)
+#define SSS_OFF_AES_TX (0x50)
+#define SSS_OFF_TDES_TX(0x60)
+#define SSS_OFF_HASH_TX(0x70)
+#define SSS_OFF_FIFO_TX(0x80)
+#define SSS_OFF_SDMA_RX(0x90)
+#define SSS_OFF_SDMA_TX(0xA0)
+
+#endif /* __MACH_S3C64XX_REGS_SSS_H */
-- 
1.7.1


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[PATCH 6/9] ARM: S5PC100: Add crypto engine register definitions

[Maurus Cuelenaere]

This patch adds the physical address and size which corresponds to the crypto
engine on the S5PC100. It also adds the offsets for the crypto subsystems.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s5pc100/include/mach/map.h  |4 +++
 arch/arm/mach-s5pc100/include/mach/regs-sss.h |   29 +
 2 files changed, 33 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-s5pc100/include/mach/regs-sss.h

diff --git a/arch/arm/mach-s5pc100/include/mach/map.h 
b/arch/arm/mach-s5pc100/include/mach/map.h
index 4681ebe..1d842b5 100644
--- a/arch/arm/mach-s5pc100/include/mach/map.h
+++ b/arch/arm/mach-s5pc100/include/mach/map.h
@@ -116,6 +116,10 @@
 #define S5PC100_PA_SDRAM   (0x2000)
 #define S5PC1XX_PA_SDRAM   S5PC100_PA_SDRAM
 
+/* Crypto Engine */
+#define SAMSUNG_PA_SSS (0xF400)
+#define SAMSUNG_SZ_SSS (SZ_1M * 3 + SZ_64K)
+
 /* compatibility defines. */
 #define S3C_PA_RTC S5PC100_PA_RTC
 #define S3C_PA_UARTS5PC100_PA_UART
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-sss.h 
b/arch/arm/mach-s5pc100/include/mach/regs-sss.h
new file mode 100644
index 000..41b3e6b
--- /dev/null
+++ b/arch/arm/mach-s5pc100/include/mach/regs-sss.h
@@ -0,0 +1,29 @@
+/*
+ * linux/arch/arm/mach-s5pc100/include/mach/regs-sss.h
+ *
+ * Copyright (C) 2010 Maurus Cuelenaere
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __MACH_S5PC100_REGS_SSS_H
+#define __MACH_S5PC100_REGS_SSS_H __FILE__
+
+#define SSS_OFF_CFG(0x00)
+#define SSS_OFF_FIFO_RX(0x01)
+#define SSS_OFF_AES_RX (0x04)
+#define SSS_OFF_TDES_RX(0x05)
+#define SSS_OFF_HASH_RX(0x06)
+
+#define SSS_OFF_FIFO_TX(0x11)
+#define SSS_OFF_AES_TX (0x14)
+#define SSS_OFF_TDES_TX(0x15)
+#define SSS_OFF_HASH_TX(0x16)
+
+#define SSS_OFF_SDMA_RX(0x20)
+#define SSS_OFF_SDMA_TX(0x30)
+
+#endif /* __MACH_S5PC100_REGS_SSS_H */
-- 
1.7.1


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[PATCH 7/9] ARM: SAMSUNG: Add crypto engine platform definition

[Maurus Cuelenaere]

This patch adds the platform device used by the crypto engine driver.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/Kconfig  |2 +
 arch/arm/plat-samsung/Kconfig |5 +++
 arch/arm/plat-samsung/Makefile|1 +
 arch/arm/plat-samsung/dev-sss.c   |   46 +
 arch/arm/plat-samsung/include/plat/devs.h |2 +
 5 files changed, 56 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/plat-samsung/dev-sss.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3f8718f..3e80510 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -680,6 +680,7 @@ config ARCH_S3C64XX
select S3C_DEV_NAND
select USB_ARCH_HAS_OHCI
select SAMSUNG_GPIOLIB_4BIT
+   select SAMSUNG_DEV_SSS
help
  Samsung S3C64XX series based systems
 
@@ -705,6 +706,7 @@ config ARCH_S5PC1XX
select HAVE_CLK
select CPU_V7
select ARM_L1_CACHE_SHIFT_6
+   select SAMSUNG_DEV_SSS
help
  Samsung S5PC1XX series based systems
 
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 229919e..c001d54 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -211,6 +211,11 @@ config SAMSUNG_DEV_TS
help
Common in platform device definitions for touchscreen device
 
+config SAMSUNG_DEV_SSS
+   bool
+   help
+   Compile in platform device definitions for Security Sub-Systems
+
 # DMA
 
 config S3C_DMA
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 4828849..43a3c64 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_S3C_DEV_RTC) += dev-rtc.o
 
 obj-$(CONFIG_SAMSUNG_DEV_ADC)  += dev-adc.o
 obj-$(CONFIG_SAMSUNG_DEV_TS)   += dev-ts.o
+obj-$(CONFIG_SAMSUNG_DEV_SSS)  += dev-sss.o
 
 # DMA support
 
diff --git a/arch/arm/plat-samsung/dev-sss.c b/arch/arm/plat-samsung/dev-sss.c
new file mode 100644
index 000..6c662a1
--- /dev/null
+++ b/arch/arm/plat-samsung/dev-sss.c
@@ -0,0 +1,46 @@
+/* linux/arch/arm/plat-samsung/dev-sss.c
+ *
+ * Copyright (c) 2010 Maurus Cuelenaere
+ *
+ * Based on arch/arm/plat-samsung/dev-hsmmc1.c
+ * original file Copyright (c) 2008 Simtec Electronics
+ *
+ * Samsung series device definition for security sub-system
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include linux/kernel.h
+#include linux/platform_device.h
+
+#include mach/irqs.h
+#include mach/map.h
+
+#include plat/devs.h
+
+static struct resource s3c_sss_resource[] = {
+   {
+   .start = SAMSUNG_PA_SSS,
+   .end   = SAMSUNG_PA_SSS + SAMSUNG_SZ_SSS - 1,
+   .flags = IORESOURCE_MEM,
+   }, {
+   .start = IRQ_SEC,
+   .end   = IRQ_SEC,
+   .flags = IORESOURCE_IRQ,
+   }
+};
+
+static u64 s3c_device_sss_dmamask = 0xUL;
+
+struct platform_device s3c_device_sss = {
+   .name   = s3c-sss,
+   .id = -1,
+   .num_resources  = ARRAY_SIZE(s3c_sss_resource),
+   .resource   = s3c_sss_resource,
+   .dev= {
+   .dma_mask   = s3c_device_sss_dmamask,
+   .coherent_dma_mask  = 0xUL,
+   },
+};
diff --git a/arch/arm/plat-samsung/include/plat/devs.h 
b/arch/arm/plat-samsung/include/plat/devs.h
index ef69e56..c689fae 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -64,6 +64,8 @@ extern struct platform_device s3c_device_nand;
 extern struct platform_device s3c_device_usbgadget;
 extern struct platform_device s3c_device_usb_hsotg;
 
+extern struct platform_device s3c_device_sss;
+
 extern struct platform_device s5pv210_device_ac97;
 extern struct platform_device s5pv210_device_pcm0;
 extern struct platform_device s5pv210_device_pcm1;
-- 
1.7.1


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[RFC 9/9] crypto: Add Samsung crypto engine driver

[Maurus Cuelenaere]

This patch adds support for the Samsung crypto engine driver available in the
S3C64XX and S5PC100 SoCs. Currently this supports AES and (T)DES with ECB and
CBC block ciphers (also CTR for AES). Support for (HMAC)-SHA1 acceleration is
also available in this engine, but isn't used in the driver yet.

Support for DMA has been added in the code but is currently disabled due to
issues with data transfers.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 drivers/crypto/Kconfig   |   11 +
 drivers/crypto/Makefile  |1 +
 drivers/crypto/s3c-sss.c | 1320 ++
 3 files changed, 1332 insertions(+), 0 deletions(-)
 create mode 100644 drivers/crypto/s3c-sss.c

diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index b08403d..597a151 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -222,4 +222,15 @@ config CRYPTO_DEV_PPC4XX
help
  This option allows you to have support for AMCC crypto acceleration.
 
+config CRYPTO_DEV_SSS
+   tristate Samsung Security Sub-Systems
+   depends on SAMSUNG_DEV_SSS
+   select CRYPTO_ALGAPI
+   select CRYPTO_BLKCIPHER
+   select CRYPTO_DES
+   select CRYPTO_HASH
+   help
+   This driver utilizes the cryptographic engine in Samsung S3C64XX
+   and S5PC100 SoCs.
+
 endif # CRYPTO_HW
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index 6ffcb3f..ef14b4d 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_CRYPTO_DEV_MV_CESA) += mv_cesa.o
 obj-$(CONFIG_CRYPTO_DEV_TALITOS) += talitos.o
 obj-$(CONFIG_CRYPTO_DEV_IXP4XX) += ixp4xx_crypto.o
 obj-$(CONFIG_CRYPTO_DEV_PPC4XX) += amcc/
+obj-$(CONFIG_CRYPTO_DEV_SSS) += s3c-sss.o
diff --git a/drivers/crypto/s3c-sss.c b/drivers/crypto/s3c-sss.c
new file mode 100644
index 000..9fd5288
--- /dev/null
+++ b/drivers/crypto/s3c-sss.c
@@ -0,0 +1,1320 @@
+/*
+ * linux/drivers/crypto/s3c-sss.c
+ *
+ * Copyright (C) 2010 Maurus Cuelenaere
+ *
+ * Support for S3C64XX Security Sub-Systems
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+/*#define DEBUG*/
+
+#include linux/clk.h
+#include linux/crypto.h
+#include linux/dma-mapping.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/kernel.h
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/spinlock.h
+#include linux/timer.h
+
+#include crypto/internal/hash.h
+#include crypto/algapi.h
+#include crypto/aes.h
+#include crypto/ctr.h
+#include crypto/des.h
+#include crypto/sha.h
+#include crypto/scatterwalk.h
+
+#include mach/dma.h
+
+#include plat/regs-sss.h
+
+#define SSS_CRA_PRIORITY   300
+#define SSS_MAX_KEY_SIZE   AES_MAX_KEY_SIZE
+#define SSS_FIFO_SIZE  0x40U
+#define SSS_TIMEOUT(3*HZ)
+
+/**
+ * struct s3c_sss - driver state.
+ * @dev: pointer to the device struct
+ * @clock: clock associated with peripheral
+ * @irq: irq associated with peripheral
+ * @regs: pointer to mapped registers
+ * @regs_phys: pointer to physical address of registers
+ * @regs_res: pointer to struct resource representing registers
+ * @cur_req: pointer to pending request (NULL indicates no current request)
+ * @dma_client: struct used for passing to DMA core
+ * @lock: lock used for synchronizing queue accesses
+ * @tasklet: tasklet doing the main work
+ * @timer: timer used for timing out faulty requests
+ * @queue: queue containing requests
+ */
+struct s3c_sss {
+   struct device   *dev;
+
+   struct clk  *clock;
+   int irq;
+   void __iomem*regs;
+   void __iomem*regs_phys;
+   struct resource *regs_res;
+
+   struct ablkcipher_request   *cur_req;
+   struct s3c2410_dma_client   dma_client;
+   spinlock_t  lock;
+   struct tasklet_struct   tasklet;
+   struct timer_list   timer;
+   struct crypto_queue queue;
+};
+
+/**
+ * struct sss_context - cipher/hash key state
+ * @key: storage for the key
+ * @key_len: length of the key
+ * @dev: pointer to struct containing the driver state
+ */
+struct sss_context {
+   u8  key[SSS_MAX_KEY_SIZE];
+   unsigned intkey_len;
+
+   struct s3c_sss  *dev;
+};
+
+/**
+ * struct sss_fifo_channel - FIFO handling state
+ *
+ * @cur_sg: scatterlist used in current transfer
+ * @offset: offset within current scatterlist
+ * @dir: FIFO direction
+ * @sg: pointer to scatter-gather lists
+ * @sg_count: amount of scatter-gather lists
+ * @req_size: size of current request
+ * @bytes_done: amount of data transferred
+ * @dev: pointer to struct containing the driver state
+ */
+struct

Re: [PATCH 1/6] USB: s3c_hsotg: Add support for external USB clock

[Maurus Cuelenaere]

Op 01-06-10 22:41, Greg KH schreef:
 On Tue, May 25, 2010 at 05:36:48AM +0100, Ben Dooks wrote:
   
 From: Maurus Cuelenaere mcuelena...@gmail.com

 The PLL that drives the USB clock supports 3 input clocks: 12, 24 and 48Mhz.
 This patch adds support to the USB driver for setting the correct register 
 bit
 according to the given clock.

 This depends on the following patch:
 [PATCH] ARM: S3C64XX: Add USB external clock definition
 
 Care to take this through the arm tree then?

 thanks,

 greg k-h
   

If I'm not mistaken, this patch is already in Ben's tree (the
USB_GADGET_DUALSPEED one too)

-- 
Maurus Cuelenaere

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[PATCH 0/3] ARM: S3C64XX: DMA core patches

[Maurus Cuelenaere]

The first two patches add support for SDMA to the DMA core, which the crypto
engine needs to support DMA.

The third one implements behaviour that seems to be forgotten, namely stopping
and flushing pending requests on freeing a DMA channel.

Maurus Cuelenaere (3):
  ARM: S3C64XX: Add SDMA clocks
  ARM: S3C64XX: Add SDMA support to DMA core
  ARM: S3C64XX: Stop and flush requests on freeing

 arch/arm/mach-s3c64xx/clock.c |   12 +
 arch/arm/mach-s3c64xx/dma.c   |   55 -
 2 files changed, 55 insertions(+), 12 deletions(-)

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[PATCH 2/3] ARM: S3C64XX: Add SDMA support to DMA core

[Maurus Cuelenaere]

The crypto engine uses the DMACH_SECURITY_[RT]X channels, who seem to be
hardcoded to SDMA-only in hardware, so add support for SDMA to the S3C64XX
DMA core.

Only DMACH_SECURITY_[RT]X are using SDMA, other channels are unaffected and
will continue to use standard DMA.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c64xx/dma.c |   52 +-
 1 files changed, 41 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index 5567e03..8c9946f 100644
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -45,6 +45,15 @@ struct s3c64xx_dmac {
 /* pool to provide LLI buffers */
 static struct dma_pool *dma_pool;
 
+/* SDMA channel state information */
+struct s3c2410_dma_chan sdma_chans[S3C_DMA_CHANNELS];
+
+/* Currently hardcodes SECURITY_[RT]X SDMA-only as dictated by HW */
+static inline bool channel_needs_sdma(unsigned int chan)
+{
+   return chan == DMACH_SECURITY_RX || chan == DMACH_SECURITY_TX;
+}
+
 /* Debug configuration and code */
 
 static unsigned char debug_show_buffs = 0;
@@ -92,16 +101,20 @@ static void dbg_showbuffs(struct s3c2410_dma_chan *chan)
 
 static struct s3c2410_dma_chan *s3c64xx_dma_map_channel(unsigned int channel)
 {
+   struct s3c2410_dma_chan *chans = s3c2410_chans;
struct s3c2410_dma_chan *chan;
unsigned int start, offs;
 
+   if (channel_needs_sdma(channel))
+   chans = sdma_chans;
+
start = 0;
 
if (channel = DMACH_PCM1_TX)
start = 8;
 
for (offs = 0; offs  8; offs++) {
-   chan = s3c2410_chans[start + offs];
+   chan = chans[start + offs];
if (!chan-in_use)
goto found;
}
@@ -549,7 +562,6 @@ int s3c2410_dma_free(unsigned int channel, struct 
s3c2410_dma_client *client)
 
/* sort out stopping and freeing the channel */
 
-
chan-client = NULL;
chan-in_use = 0;
 
@@ -634,8 +646,12 @@ static struct sysdev_class dma_sysclass = {
.name   = s3c64xx-dma,
 };
 
+static struct sysdev_class sdma_sysclass = {
+   .name   = s3c64xx-sdma,
+};
+
 static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
-int irq, unsigned int base)
+int irq, unsigned int base, bool sdma)
 {
struct s3c2410_dma_chan *chptr = s3c2410_chans[chno];
struct s3c64xx_dmac *dmac;
@@ -651,7 +667,7 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
}
 
dmac-sysdev.id = chno / 8;
-   dmac-sysdev.cls = dma_sysclass;
+   dmac-sysdev.cls = sdma ? sdma_sysclass : dma_sysclass;
 
err = sysdev_register(dmac-sysdev);
if (err) {
@@ -666,7 +682,11 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
goto err_dev;
}
 
-   snprintf(clkname, sizeof(clkname), dma%d, dmac-sysdev.id);
+   if (sdma) {
+   snprintf(clkname, sizeof(clkname), sdma%d, dmac-sysdev.id);
+   chptr = sdma_chans[chno];
+   } else
+   snprintf(clkname, sizeof(clkname), dma%d, dmac-sysdev.id);
 
dmac-clk = clk_get(NULL, clkname);
if (IS_ERR(dmac-clk)) {
@@ -690,8 +710,8 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
regptr = regs + PL080_Cx_BASE(0);
 
for (ch = 0; ch  8; ch++, chno++, chptr++) {
-   printk(KERN_INFO %s: registering DMA %d (%p)\n,
-  __func__, chno, regptr);
+   printk(KERN_INFO %s: registering %sDMA %d (%p)\n,
+   __func__, sdma ? S : , chno, regptr);
 
chptr-bit = 1  ch;
chptr-number = chno;
@@ -737,12 +757,22 @@ static int __init s3c64xx_dma_init(void)
return -ENOMEM;
}
 
-   /* Set all DMA configuration to be DMA, not SDMA */
-   writel(0xff, S3C_SYSREG(0x110));
+   ret = sysdev_class_register(sdma_sysclass);
+   if (ret) {
+   printk(KERN_ERR %s: failed to create sysclass\n, __func__);
+   return -ENOMEM;
+   }
+
+   /* Set all DMA configuration to be DMA, except SECURITY_[RT]X */
+   writel(0x3fff, S3C_SYSREG(0x110));
 
/* Register standard DMA controlers */
-   s3c64xx_dma_init1(0, DMACH_UART0, IRQ_DMA0, 0x7500);
-   s3c64xx_dma_init1(8, DMACH_PCM1_TX, IRQ_DMA1, 0x7510);
+   s3c64xx_dma_init1(0, DMACH_UART0, IRQ_DMA0, 0x7500, false);
+   s3c64xx_dma_init1(8, DMACH_PCM1_TX, IRQ_DMA1, 0x7510, false);
+
+   /* Register SDMA controllers */
+   s3c64xx_dma_init1(0, DMACH_UART0, IRQ_SDMA0, 0x7DB0, true);
+   s3c64xx_dma_init1(8, DMACH_PCM1_TX, IRQ_SDMA1, 0x7DC0, true);
 
return 0;
 }
-- 
1.7.1


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More

[PATCH 3/3] ARM: S3C64XX: Stop and flush requests on freeing

[Maurus Cuelenaere]

When a DMA channel is freed, its pending requests should be flushed and the
channel should be halted. This patch ensures that happens.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c64xx/dma.c |3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index 8c9946f..193b07f 100644
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -560,7 +560,8 @@ int s3c2410_dma_free(unsigned int channel, struct 
s3c2410_dma_client *client)
   channel, chan-client, client);
}
 
-   /* sort out stopping and freeing the channel */
+   s3c64xx_dma_flush(chan);
+   s3c64xx_dma_stop(chan);
 
chan-client = NULL;
chan-in_use = 0;
-- 
1.7.1

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Samsung Crypto engine problems

[Maurus Cuelenaere]

Hi,

I'm currently trying to develop a driver for the Samsung crypto engine
available
in S3C64XX and S5PC100 SoC's (the only SoC's I could find datasheets for).

However, I'm running into problems in both DMA and FIFO mode: when using
DMA,
the RX transfer seems to be pushing (len-4) bytes to the FIFO, which
results in
the FIFO waiting for the last 4 bytes and halting the entire operation.

When using PIO (FIFO mode), everything seems to work smoothly until the
kernel
self-test runs DES decryption test 1 (which is a 24 byte data transfer). The
data gets pushed to the RX FIFO and the DES engine responds with an
interrupt
indicating it has done its job, but the TX FIFO interrupt never gets
triggered
and thus the decrypted data never gets fetched.

Any pointers to what I've could done wrong would be thankful.

(I've attached my current work as an inline patch below)

P.S.: this was tested on a S3C6410 SoC, the only one I have access to. I've
tried to make the register accesses as generic as possible so the
S5PC100 SoC's
can use the driver too, but that's untested. Any confirmation that the
AES en-
and decryption self-tests succeed would be appreciated (these tests
succeed on
my S3C6410).

--
Maurus Cuelenaere


diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3f8718f..3e80510 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -680,6 +680,7 @@ config ARCH_S3C64XX
 select S3C_DEV_NAND
 select USB_ARCH_HAS_OHCI
 select SAMSUNG_GPIOLIB_4BIT
+select SAMSUNG_DEV_SSS
 help
   Samsung S3C64XX series based systems

@@ -705,6 +706,7 @@ config ARCH_S5PC1XX
 select HAVE_CLK
 select CPU_V7
 select ARM_L1_CACHE_SHIFT_6
+select SAMSUNG_DEV_SSS
 help
   Samsung S5PC1XX series based systems

diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index d3e11a1..bdb173c 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -230,6 +230,12 @@ static struct clk init_clocks_disable[] = {
 .parent= clk_h,
 .enable= s3c64xx_hclk_ctrl,
 .ctrlbit= S3C_CLKCON_HCLK_SDMA1,
+}, {
+.name= secur,
+.id= -1,
+.parent= clk_h2,
+.enable= s3c64xx_sclk_ctrl,
+.ctrlbit= S3C_CLKCON_SCLK_SECUR
 },
 };

diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h
b/arch/arm/mach-s3c64xx/include/mach/map.h
index 9fdd50c..fa80afc 100644
--- a/arch/arm/mach-s3c64xx/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
@@ -87,6 +87,9 @@
 #define S3C64XX_PA_USB_HSPHY(0x7C10)
 #define S3C64XX_VA_USB_HSPHYS3C_ADDR_CPU(0x0020)

+#define SAMSUNG_PA_SSS(0x7D00)
+#define SAMSUNG_SZ_SSS(SZ_1M * 10 + SZ_256)
+
 /* place VICs close together */
 #define VA_VIC0(S3C_VA_IRQ + 0x00)
 #define VA_VIC1(S3C_VA_IRQ + 0x1)
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-sss.h
b/arch/arm/mach-s3c64xx/include/mach/regs-sss.h
new file mode 100644
index 000..3a0769f
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-sss.h
@@ -0,0 +1,27 @@
+/*
+ * linux/arch/arm/mach-s3c64xx/include/mach/regs-sss.h
+ *
+ * Copyright (C) 2010 Maurus Cuelenaere
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __MACH_S3C64XX_REGS_SSS_H
+#define __MACH_S3C64XX_REGS_SSS_H __FILE__
+
+#define SSS_OFF_CFG(0x00)
+#define SSS_OFF_AES_RX(0x10)
+#define SSS_OFF_TDES_RX(0x20)
+#define SSS_OFF_HASH_RX(0x30)
+#define SSS_OFF_FIFO_RX(0x40)
+#define SSS_OFF_AES_TX(0x50)
+#define SSS_OFF_TDES_TX(0x60)
+#define SSS_OFF_HASH_TX(0x70)
+#define SSS_OFF_FIFO_TX(0x80)
+#define SSS_OFF_SDMA_RX(0x90)
+#define SSS_OFF_SDMA_TX(0xA0)
+
+#endif /* __MACH_S3C64XX_REGS_SSS_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h
b/arch/arm/mach-s5pc100/include/mach/map.h
index 4681ebe..1d842b5 100644
--- a/arch/arm/mach-s5pc100/include/mach/map.h
+++ b/arch/arm/mach-s5pc100/include/mach/map.h
@@ -116,6 +116,10 @@
 #define S5PC100_PA_SDRAM(0x2000)
 #define S5PC1XX_PA_SDRAMS5PC100_PA_SDRAM

+/* Crypto Engine */
+#define SAMSUNG_PA_SSS(0xF400)
+#define SAMSUNG_SZ_SSS(SZ_1M * 3 + SZ_64K)
+
 /* compatibility defines. */
 #define S3C_PA_RTCS5PC100_PA_RTC
 #define S3C_PA_UARTS5PC100_PA_UART
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-sss.h
b/arch/arm/mach-s5pc100/include/mach/regs-sss.h
new file mode 100644
index 000..41b3e6b
--- /dev/null
+++ b/arch/arm/mach-s5pc100/include/mach/regs-sss.h
@@ -0,0 +1,29 @@
+/*
+ * linux/arch/arm/mach-s5pc100/include/mach/regs-sss.h

[PATCH 0/2] Fixes for s3c RTC driver

[Maurus Cuelenaere]

The first patch fixes a segfault when dereferencing a garbage pointer while
the second one ensures that the correct max_user_freq gets set.

These should probably go in mainline as soon as possible.

Maurus Cuelenaere (2):
  RTC: s3c: Initialize driver data before using it
  RTC: s3c: Initialize s3c_rtc_cpu_type before using it

 drivers/rtc/rtc-s3c.c |9 +
 1 files changed, 5 insertions(+), 4 deletions(-)

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[PATCH 2/2] RTC: s3c: Initialize s3c_rtc_cpu_type before using it

[Maurus Cuelenaere]

Make sure s3c_rtc_cpu_type is initialised _before_ it's used in an if() check.

This was probably caused due to a merge mistake.

Reported-by: Jiri Pinkava jiri.pink...@vscht.cz
Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 drivers/rtc/rtc-s3c.c |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index 6adebf3..70b68d3 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -508,13 +508,13 @@ static int __devinit s3c_rtc_probe(struct platform_device 
*pdev)
goto err_nortc;
}
 
+   s3c_rtc_cpu_type = platform_get_device_id(pdev)-driver_data;
+
if (s3c_rtc_cpu_type == TYPE_S3C64XX)
rtc-max_user_freq = 32768;
else
rtc-max_user_freq = 128;
 
-   s3c_rtc_cpu_type = platform_get_device_id(pdev)-driver_data;
-
platform_set_drvdata(pdev, rtc);
 
s3c_rtc_setfreq(pdev-dev, 1);
-- 
1.7.1

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Re: [PATCH 2/2] RTC: s3c: Initialize s3c_rtc_cpu_type before using it

[Maurus Cuelenaere]

Op 27-05-10 23:52, Andrew Morton schreef:
 On Thu, 27 May 2010 23:28:47 +0200
 Maurus Cuelenaere mcuelena...@gmail.com wrote:

   
 Make sure s3c_rtc_cpu_type is initialised _before_ it's used in an if() 
 check.

 This was probably caused due to a merge mistake.
 
 Nope, I went back to your original email:

 @@ -471,7 +509,12 @@ static int __devinit s3c_rtc_probe(struct
 platform_device *pdev)
 goto err_nortc;
 }

 -   rtc-max_user_freq = 128;
 +   if (s3c_rtc_cpu_type == TYPE_S3C64XX)
 +   rtc-max_user_freq = 32768;
 +   else
 +   rtc-max_user_freq = 128;
 +
 +   s3c_rtc_cpu_type = platform_get_device_id(pdev)-driver_data;
   

Hmm, odd. Ok, I apologize for this (obvious) mistake then.

-- 
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Re: [PATCH 2/2] USB: s3c_hsotg: Add support for external USB clock

[Maurus Cuelenaere]

Op 17-05-10 20:17, Maurus Cuelenaere schreef:
 The PLL that drives the USB clock supports 3 input clocks: 12, 24 and 48Mhz.
 This patch adds support to the USB driver for setting the correct register bit
 according to the given clock.

 This depends on the following patch:
 [PATCH] ARM: S3C64XX: Add USB external clock definition

 Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
 ---
  drivers/usb/gadget/s3c-hsotg.c |   19 +++
  1 files changed, 19 insertions(+), 0 deletions(-)
   

Same for this one:

Acked-by: Ben Dooks ben-li...@fluff.org

-- 
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Re: [PATCH 05/15] ARM: S5PC100: Use common functions for gpiolib implementation

[Maurus Cuelenaere]

Op 17-05-10 13:14, Kukjin Kim schreef:
 Marek Szyprowski wrote:
   
 snip
 -
  static __init int s5pc1xx_gpiolib_init(void)
  {
 -struct s3c_gpio_chip *chips;
 +struct s3c_gpio_chip *chip;
  int nr_chips;

 -chips = s5pc100_gpio_chips;
 -nr_chips = ARRAY_SIZE(s5pc100_gpio_chips);
 +chip = s5pc100_gpio_chips;
 +nr_chips = ARRAY_SIZE(s5pc100_gpio_chips);
 +
 +for (; nr_chips  0; nr_chips--, chip++)
 +s5pc100_gpiolib_link(chip);

 -s5pc1xx_gpiolib_add(chips, nr_chips, s5pc1xx_gpiolib_link);
 +samsung_gpiolib_add_4bit_chips(s5pc100_gpio_chips,
 +   ARRAY_SIZE(s5pc100_gpio_chips));
 
 nr_chips?
   

You can't use nr_chips as it has been decremented to 0 in the for loop
above it.

-- 
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[PATCH 1/2] ARM: S3C64XX: Add USB external clock definition

[Maurus Cuelenaere]

This adds the xusbxti clock to S3C64XX platform.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c64xx/clock.c  |7 +++
 arch/arm/plat-samsung/include/plat/clock.h |1 +
 2 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 2ac2e7d..6830bb7 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -88,6 +88,12 @@ struct clk clk_48m = {
.enable = clk_48m_ctrl,
 };
 
+struct clk clk_xusbxti = {
+   .name   = xusbxti,
+   .id = -1,
+   .rate   = 4800,
+};
+
 static int inline s3c64xx_gate(void __iomem *reg,
struct clk *clk,
int enable)
@@ -762,6 +768,7 @@ static struct clk *clks[] __initdata = {
clk_27m,
clk_48m,
clk_h2,
+   clk_xusbxti,
 };
 
 /**
diff --git a/arch/arm/plat-samsung/include/plat/clock.h 
b/arch/arm/plat-samsung/include/plat/clock.h
index 60b6269..efbc984 100644
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -74,6 +74,7 @@ extern struct clk clk_ext;
 extern struct clk clk_h2;
 extern struct clk clk_27m;
 extern struct clk clk_48m;
+extern struct clk clk_xusbxti;
 
 extern int clk_default_setrate(struct clk *clk, unsigned long rate);
 extern struct clk_ops clk_ops_def_setrate;
-- 
1.7.1


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[PATCH 2/2] USB: s3c_hsotg: Add support for external USB clock

[Maurus Cuelenaere]

The PLL that drives the USB clock supports 3 input clocks: 12, 24 and 48Mhz.
This patch adds support to the USB driver for setting the correct register bit
according to the given clock.

This depends on the following patch:
[PATCH] ARM: S3C64XX: Add USB external clock definition

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 drivers/usb/gadget/s3c-hsotg.c |   19 +++
 1 files changed, 19 insertions(+), 0 deletions(-)

diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c
index 1f73b48..dce9366 100644
--- a/drivers/usb/gadget/s3c-hsotg.c
+++ b/drivers/usb/gadget/s3c-hsotg.c
@@ -23,6 +23,7 @@
 #include linux/delay.h
 #include linux/io.h
 #include linux/slab.h
+#include linux/clk.h
 
 #include linux/usb/ch9.h
 #include linux/usb/gadget.h
@@ -2699,6 +2700,7 @@ static void __devinit s3c_hsotg_initep(struct s3c_hsotg 
*hsotg,
  */
 static void s3c_hsotg_otgreset(struct s3c_hsotg *hsotg)
 {
+   struct clk *xusbxti;
u32 osc;
 
writel(0, S3C_PHYPWR);
@@ -2706,6 +2708,23 @@ static void s3c_hsotg_otgreset(struct s3c_hsotg *hsotg)
 
osc = hsotg-plat-is_osc ? S3C_PHYCLK_EXT_OSC : 0;
 
+   xusbxti = clk_get(hsotg-dev, xusbxti);
+   if (xusbxti  !IS_ERR(xusbxti)) {
+   switch (clk_get_rate(xusbxti)) {
+   case 1200:
+   osc |= S3C_PHYCLK_CLKSEL_12M;
+   break;
+   case 2400:
+   osc |= S3C_PHYCLK_CLKSEL_24M;
+   break;
+   default:
+   case 4800:
+   /* default reference clock */
+   break;
+   }
+   clk_put(xusbxti);
+   }
+
writel(osc | 0x10, S3C_PHYCLK);
 
/* issue a full set of resets to the otg and core */
-- 
1.7.1

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Re: [PATCH 4/6] ARM: S3C64XX: Adds Touch Screen Driver Support for S3C6410

[Maurus Cuelenaere]

Op 10-05-10 02:28, Ben Dooks schreef:
 On Fri, May 07, 2010 at 11:29:31AM +, NAVEEN KRISHNA CHATRADHI wrote:
   
 Hi, Maurus

 --- Original Message ---
 Sender : Maurus Cuelenaeremcuelena...@gmail.com 
 Date   : May 07, 2010 14:55 (GMT+05:00)
 Title  : Re: [PATCH 4/6] ARM: S3C64XX: Adds Touch Screen Driver Support for
  S3C6410

 Hi Naveen,

 Kukjin Kim kgene@samsung.com wrote:

 
 From: Naveen Krishna ch.nav...@samsung.com

 Signed-off-by: Naveen Krishna Ch ch.nav...@samsung.com
 Signed-off-by: Kukjin Kim kgene@samsung.com
 ---
 arch/arm/mach-s3c64xx/Kconfig  |1 +
 arch/arm/mach-s3c64xx/mach-smdk6410.c  |   12 +++
 arch/arm/mach-s3c64xx/s3c6410.c|1 +
 arch/arm/plat-samsung/Kconfig  |5 +++
 arch/arm/plat-samsung/Makefile |1 +
 arch/arm/plat-samsung/dev-ts.c |   54 
 
 drivers/input/touchscreen/Kconfig  |3 +-
 drivers/input/touchscreen/s3c2410_ts.c |   19 +--
 8 files changed, 92 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/plat-samsung/dev-ts.c

   
 I'm sure you've seen my patch which does pretty much the same wrt adjusting 
 s3c2410_ts.c.
 Though that one has already been acked by Ben so I'm unsure what should 
 happen: you adjusting your patchset or me dropping mine (obviously I prefer 
 the former :) ).
 My patch was under review for over a week, its a coincidence that i saw your 
 patch and my patch was posted on mainline. 
 I'ill rework my patches anyway, I'ill wait for a day on Ben Dook's Comments 
 on my patch set.
 
 Naveen's patches do have two advantages, firstly that they add a gpio
 callback to the platform data so that if it is needed in the future it
 can be used again. The second is that it covers more than just the 24xx
 and 64xx series.

 I tried applying this with Maurus' updates but they don't apply well together
 and I'm not going to spend a lot of time trying to get the two sets applied.

 Maurus, hope you're not too offended if we go for Naveen's series, unless
 you have any technical commenbts that need to be sorted. 
   

No, sure, go ahead.

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Re: [PATCH 4/6] ARM: S3C64XX: Adds Touch Screen Driver Support for S3C6410

[Maurus Cuelenaere]

Hi Naveen,

Kukjin Kim kgene@samsung.com wrote:

From: Naveen Krishna ch.nav...@samsung.com

Signed-off-by: Naveen Krishna Ch ch.nav...@samsung.com
Signed-off-by: Kukjin Kim kgene@samsung.com
---
 arch/arm/mach-s3c64xx/Kconfig  |1 +
 arch/arm/mach-s3c64xx/mach-smdk6410.c  |   12 +++
 arch/arm/mach-s3c64xx/s3c6410.c|1 +
 arch/arm/plat-samsung/Kconfig  |5 +++
 arch/arm/plat-samsung/Makefile |1 +
 arch/arm/plat-samsung/dev-ts.c |   54 
 drivers/input/touchscreen/Kconfig  |3 +-
 drivers/input/touchscreen/s3c2410_ts.c |   19 +--
 8 files changed, 92 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/plat-samsung/dev-ts.c


I'm sure you've seen my patch which does pretty much the same wrt adjusting 
s3c2410_ts.c.
Though that one has already been acked by Ben so I'm unsure what should happen: 
you adjusting your patchset or me dropping mine (obviously I prefer the former 
:) ).

P.S.: I'd recommend splitting this patch and sending the drivers/input part to 
the linux-input mailing list.

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[PATCH] ARM: S3C64XX: Add s3c64xx support to touchscreen driver

[Maurus Cuelenaere]

Add support for the s3c64xx touchscreen to the s3c2410_ts driver,
ensuring it compiles and supports the extra features such as the
interrupt generation.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 drivers/input/touchscreen/Kconfig  |6 +++---
 drivers/input/touchscreen/s3c2410_ts.c |   26 ++
 2 files changed, 25 insertions(+), 7 deletions(-)

diff --git a/drivers/input/touchscreen/Kconfig 
b/drivers/input/touchscreen/Kconfig
index 8a8fa4d..be8e9ba 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -158,11 +158,11 @@ config TOUCHSCREEN_FUJITSU
  module will be called fujitsu-ts.
 
 config TOUCHSCREEN_S3C2410
-   tristate Samsung S3C2410 touchscreen input driver
-   depends on ARCH_S3C2410
+   tristate Samsung S3C touchscreen input driver
+   depends on ARCH_S3C2410 || ARCH_S3C64XX
select S3C24XX_ADC
help
- Say Y here if you have the s3c2410 touchscreen.
+ Say Y here if you have the s3c touchscreen.
 
  If unsure, say N.
 
diff --git a/drivers/input/touchscreen/s3c2410_ts.c 
b/drivers/input/touchscreen/s3c2410_ts.c
index 98a7d12..66d1c83 100644
--- a/drivers/input/touchscreen/s3c2410_ts.c
+++ b/drivers/input/touchscreen/s3c2410_ts.c
@@ -87,6 +87,12 @@ struct s3c2410ts {
 
 static struct s3c2410ts ts;
 
+enum s3c_cpu_type {
+   TYPE_S3C2410,
+   TYPE_S3C2440,
+   TYPE_S3C64XX,
+};
+
 /**
  * s3c2410_ts_connect - configure gpio for s3c2410 systems
  *
@@ -96,10 +102,14 @@ static struct s3c2410ts ts;
 */
 static inline void s3c2410_ts_connect(void)
 {
+#ifdef PLAT_S3C24XX
+   /* As s3c2410_gpio_cfgpin() isn't defined for non-s3c24xx builds,
+  guard these with an ifdef. */
s3c2410_gpio_cfgpin(S3C2410_GPG(12), S3C2410_GPG12_XMON);
s3c2410_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPG13_nXPON);
s3c2410_gpio_cfgpin(S3C2410_GPG(14), S3C2410_GPG14_YMON);
s3c2410_gpio_cfgpin(S3C2410_GPG(15), S3C2410_GPG15_nYPON);
+#endif
 }
 
 /**
@@ -170,6 +180,7 @@ static DEFINE_TIMER(touch_timer, touch_timer_fire, 0, 0);
  */
 static irqreturn_t stylus_irq(int irq, void *dev_id)
 {
+   struct platform_device *pdev = to_platform_device(ts.dev);
unsigned long data0;
unsigned long data1;
bool down;
@@ -188,6 +199,12 @@ static irqreturn_t stylus_irq(int irq, void *dev_id)
else
dev_info(ts.dev, %s: count=%d\n, __func__, ts.count);
 
+
+   if (platform_get_device_id(pdev)-driver_data == TYPE_S3C64XX) {
+   /* Clear pen down/up interrupt */
+   writel(0x0, ts.io + S3C64XX_ADCCLRINTPNDNUP);
+   }
+
return IRQ_HANDLED;
 }
 
@@ -297,7 +314,7 @@ static int __devinit s3c2410ts_probe(struct platform_device 
*pdev)
}
 
/* Configure the touchscreen external FETs on the S3C2410 */
-   if (!platform_get_device_id(pdev)-driver_data)
+   if (platform_get_device_id(pdev)-driver_data == TYPE_S3C2410)
s3c2410_ts_connect();
 
ts.client = s3c_adc_register(pdev, s3c24xx_ts_select,
@@ -420,15 +437,16 @@ static struct dev_pm_ops s3c_ts_pmops = {
 #endif
 
 static struct platform_device_id s3cts_driver_ids[] = {
-   { s3c2410-ts, 0 },
-   { s3c2440-ts, 1 },
+   { s3c2410-ts, TYPE_S3C2410 },
+   { s3c2440-ts, TYPE_S3C2440 },
+   { s3c64xx-ts, TYPE_S3C64XX },
{ }
 };
 MODULE_DEVICE_TABLE(platform, s3cts_driver_ids);
 
 static struct platform_driver s3c_ts_driver = {
.driver = {
-   .name   = s3c24xx-ts,
+   .name   = s3c-ts,
.owner  = THIS_MODULE,
 #ifdef CONFIG_PM
.pm = s3c_ts_pmops,
-- 
1.7.1

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Re: SAMSUNG How to handle changes in TSADC IP register bits

[Maurus Cuelenaere]

Op 06-05-10 07:41, Ben Dooks schreef:
 On Thu, May 06, 2010 at 06:38:22AM +0100, Ben Dooks wrote:
   
 On Thu, May 06, 2010 at 04:08:20AM +, NAVEEN KRISHNA CHATRADHI wrote:
 
 Hi Ben, 
  
 I'm working on Touchscreen driver support for S5PC100, S5PV210, S3C6410  
 S5P6440.
 The TSADC registers bit fields are keep on varying between the different 
 SoCs, though the IP as a whole remains same.

 For example: 
 Some of the ADC CONTROL REGISTER bit fields in S3C6410 are made as seperate 
 register 
 ADC CHANNEL MUX REGISTER
 How do we handle this in the driver which should be generic to all the SoCs.
   
 I've already merged the first changes for the s3c6410 (see Maurus' previous
 patches) ready for the next mainline merge.
 
 Maurus, can you send the change to the core driver to support the extended
 range please.
   

Done.


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Re: [PATCH] ARM: S3C64XX: Add USB clock source frequency as driver data to s3c-hsotg

[Maurus Cuelenaere]

Op 06-05-10 03:26, Ben Dooks schreef:
 On Tue, May 04, 2010 at 01:12:36PM +0200, Maurus Cuelenaere wrote:
   
 The upcoming SmartQ machines use a different base clock frequency
 for the USB block, this patch allows passing it as platform data
 to the driver.
 
 When I merge thomas' patch for addign a clock for this crystal, it might
 be worth changing the driver to get this and see what rate the clock is
 at by that method.
   

Do you mean [PATCH] ARM: S5P: Add USB External Crystal clock definition?
Other then that I can't really find any USB clock related patches.

 Will hold off on this patch, also going to do some woth on the hsotg
 driver anyway, since it could really do with some work on DMA support
 and some debugging.
   

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Re: SAMSUNG How to handle changes in TSADC IP register bits

[Maurus Cuelenaere]

Hi Naveen,

Op 06-05-10 12:15, NAVEEN KRISHNA CHATRADHI schreef:
 Hi Ben, Maurus,

 --- Original Message ---
 Sender : Maurus Cuelenaeremcuelena...@gmail.com 
 Date   : May 06, 2010 14:52 (GMT+05:00)
 Title  : Re: SAMSUNG How to handle changes in TSADC IP register bits

 Op 06-05-10 07:41, Ben Dooks schreef:
   
 On Thu, May 06, 2010 at 06:38:22AM +0100, Ben Dooks wrote:
   
 
 On Thu, May 06, 2010 at 04:08:20AM +, NAVEEN KRISHNA CHATRADHI wrote:
 
   
 Hi Ben, 
  
 I'm working on Touchscreen driver support for S5PC100, S5PV210, S3C6410  
 S5P6440.
 The TSADC registers bit fields are keep on varying between the different 
 SoCs, though the IP as a whole remains same.

 For example: 
 Some of the ADC CONTROL REGISTER bit fields in S3C6410 are made as 
 seperate register 
 ADC CHANNEL MUX REGISTER
 How do we handle this in the driver which should be generic to all the 
 SoCs.
   
 
 I've already merged the first changes for the s3c6410 (see Maurus' previous
 patches) ready for the next mainline merge.
 
   
 Maurus, can you send the change to the core driver to support the extended
 range please.
   
 
 I've seen this patch from Maurus a long ago.
 Maurus, Do you have any other patches other than, Cause i have already made 
 patches for 
 touchscreen support for S3C6410/6440 S5Pv210/C110/C100 these boards.

 I'ill post it in a day or 2. 
   

No, I only added support for the S3C6410 (as that's the only board I have).

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Re: [PATCH 1/3] s3c6410: Add new quirk in sdhci driver and update ADMA descriptor build.

[Maurus Cuelenaere]

Op 05-05-10 16:59, Ben Dooks schreef:
 On Tue, May 04, 2010 at 11:43:22AM +0200, Maurus Cuelenaere wrote:

 The 'From:' line seems to have been lost?
   

Hmm that's odd, I'm sure it was in the patch though..
Perhaps Thunderbird/Gmail stripped it while sending..

To be clear: the original author of this patch (and PATCH 2/3) is
Thomas Abraham thomas...@samsung.com, not me.
I wrote PATCH 3/3.

 The s3c6410 sdhci controller does not support the 'End' attribute and
 NOP attribute in the same 8-Byte ADMA descriptor. This patch adds a
 new quirk to identify sdhci host contollers with such behaviour.
 In addition to this, for controllers using the new quirk, the last
 entry in the ADMA descritor table is marked with the 'End' attribute
 (instead of using a NOP descriptor with 'End' attribute).

 Signed-off-by: Thomas Abraham thomas...@samsung.com
 Acked-by: Ben Dooks ben-li...@fluff.org
 Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
 ---
  drivers/mmc/host/sdhci.c |   20 +++-
  drivers/mmc/host/sdhci.h |2 ++
  2 files changed, 17 insertions(+), 5 deletions(-)

 diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
 index 9d4fdfa..db5d566 100644
 --- a/drivers/mmc/host/sdhci.c
 +++ b/drivers/mmc/host/sdhci.c
 @@ -496,12 +496,22 @@ static int sdhci_adma_table_pre(struct sdhci_host 
 *host,
  WARN_ON((desc - host-adma_desc)  (128 * 2 + 1) * 4);
  }
  
 -/*
 - * Add a terminating entry.
 - */
 +if (host-quirks  SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC) {
 +/*
 +* Mark the last descriptor as the terminating descriptor
 +*/
 +if (desc != host-adma_desc) {
 +desc -= 8;
 +desc[0] |= 0x2; /* end */
 +}
 +} else {
 +/*
 +* Add a terminating entry.
 +*/
  
 -/* nop, end, valid */
 -sdhci_set_adma_desc(desc, 0, 0, 0x3);
 +/* nop, end, valid */
 +sdhci_set_adma_desc(desc, 0, 0, 0x3);
 +}
  
  /*
   * Resync align buffer as we might have changed it.
 diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
 index 842f46f..7ba0006 100644
 --- a/drivers/mmc/host/sdhci.h
 +++ b/drivers/mmc/host/sdhci.h
 @@ -236,6 +236,8 @@ struct sdhci_host {
  #define SDHCI_QUIRK_DELAY_AFTER_POWER   (123)
  /* Controller uses SDCLK instead of TMCLK for data timeouts */
  #define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK (124)
 +/* Controller cannot support End Attribute in NOP ADMA descriptor */
 +#define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC   (125)
  
  int irq;/* Device IRQ */
  void __iomem *  ioaddr; /* Mapped address */
 -- 
 1.7.1


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[PATCH 0/3] Enable ADMA and multiblock in s3c64xx SDHCI controller

[Maurus Cuelenaere]

This is a resend of the following patches, rebased against 2.6.34-rc6:

Maurus Cuelenaere (1):
  SDHCI: Enable multiblock transfers in sdhci-s3c

Thomas Abraham (2):
  s3c6410: Add new quirk in sdhci driver and update ADMA descriptor
build.
  s3c6410: Enable ADMA feature in 6410 sdhci controller.

 drivers/mmc/host/sdhci-s3c.c |   10 +-
 drivers/mmc/host/sdhci.c |   20 +++-
 drivers/mmc/host/sdhci.h |2 ++
 3 files changed, 18 insertions(+), 14 deletions(-)

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[PATCH 1/3] s3c6410: Add new quirk in sdhci driver and update ADMA descriptor build.

[Maurus Cuelenaere]

The s3c6410 sdhci controller does not support the 'End' attribute and
NOP attribute in the same 8-Byte ADMA descriptor. This patch adds a
new quirk to identify sdhci host contollers with such behaviour.
In addition to this, for controllers using the new quirk, the last
entry in the ADMA descritor table is marked with the 'End' attribute
(instead of using a NOP descriptor with 'End' attribute).

Signed-off-by: Thomas Abraham thomas...@samsung.com
Acked-by: Ben Dooks ben-li...@fluff.org
Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 drivers/mmc/host/sdhci.c |   20 +++-
 drivers/mmc/host/sdhci.h |2 ++
 2 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 9d4fdfa..db5d566 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -496,12 +496,22 @@ static int sdhci_adma_table_pre(struct sdhci_host *host,
WARN_ON((desc - host-adma_desc)  (128 * 2 + 1) * 4);
}
 
-   /*
-* Add a terminating entry.
-*/
+   if (host-quirks  SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC) {
+   /*
+   * Mark the last descriptor as the terminating descriptor
+   */
+   if (desc != host-adma_desc) {
+   desc -= 8;
+   desc[0] |= 0x2; /* end */
+   }
+   } else {
+   /*
+   * Add a terminating entry.
+   */
 
-   /* nop, end, valid */
-   sdhci_set_adma_desc(desc, 0, 0, 0x3);
+   /* nop, end, valid */
+   sdhci_set_adma_desc(desc, 0, 0, 0x3);
+   }
 
/*
 * Resync align buffer as we might have changed it.
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 842f46f..7ba0006 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -236,6 +236,8 @@ struct sdhci_host {
 #define SDHCI_QUIRK_DELAY_AFTER_POWER  (123)
 /* Controller uses SDCLK instead of TMCLK for data timeouts */
 #define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK(124)
+/* Controller cannot support End Attribute in NOP ADMA descriptor */
+#define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC  (125)
 
int irq;/* Device IRQ */
void __iomem *  ioaddr; /* Mapped address */
-- 
1.7.1


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[PATCH 2/3] s3c6410: Enable ADMA feature in 6410 sdhci controller.

[Maurus Cuelenaere]

This patch enables ADMA feature in 6410 SDHCI controller
driver.

Signed-off-by: Thomas Abraham thomas...@samsung.com
Acked-by: Ben Dooks ben-li...@fluff.org
Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 drivers/mmc/host/sdhci-s3c.c |7 +--
 1 files changed, 1 insertions(+), 6 deletions(-)

diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index 2136794..ad3a78e 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -317,12 +317,7 @@ static int __devinit sdhci_s3c_probe(struct 
platform_device *pdev)
host-irq = irq;
 
/* Setup quirks for the controller */
-
-   /* Currently with ADMA enabled we are getting some length
-* interrupts that are not being dealt with, do disable
-* ADMA until this is sorted out. */
-   host-quirks |= SDHCI_QUIRK_BROKEN_ADMA;
-   host-quirks |= SDHCI_QUIRK_32BIT_ADMA_SIZE;
+   host-quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC;
 
 #ifndef CONFIG_MMC_SDHCI_S3C_DMA
 
-- 
1.7.1


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[PATCH 3/3] SDHCI: Enable multiblock transfers in sdhci-s3c

[Maurus Cuelenaere]

Wifi over SDIO doesn't work correctly without multiblock, so enable
this. This patch depends on the following patches:

[PATCH] s3c6410: Enable ADMA feature in 6410 sdhci controller.
[PATCH] s3c6410: Add new quirk in sdhci driver and update ADMA descriptor build.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 drivers/mmc/host/sdhci-s3c.c |3 ---
 1 files changed, 0 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index 2136794..2c1a618 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -330,9 +330,6 @@ static int __devinit sdhci_s3c_probe(struct platform_device 
*pdev)
 * support as well. */
host-quirks |= SDHCI_QUIRK_BROKEN_DMA;
 
-   /* PIO currently has problems with multi-block IO */
-   host-quirks |= SDHCI_QUIRK_NO_MULTIBLOCK;
-
 #endif /* CONFIG_MMC_SDHCI_S3C_DMA */
 
/* It seems we do not get an DATA transfer complete on non-busy
-- 
1.7.1

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[PATCH] ARM: SAMSUNG: Move HWMON from plat-s3c24xx to plat-samsung

[Maurus Cuelenaere]

Move HWMON platform definition from plat-s3c24xx to plat-samsung
and adjust mach-bast to use the new s3c_hwmon_set_platdata().
This allows usage of dev-hwmon by other Samsung SoCs.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c2410/Kconfig  |1 +
 arch/arm/mach-s3c2410/mach-bast.c  |2 +-
 arch/arm/plat-s3c24xx/devs.c   |8 -
 arch/arm/plat-samsung/Kconfig  |5 +++
 arch/arm/plat-samsung/Makefile |1 +
 arch/arm/plat-samsung/dev-hwmon.c  |   42 
 arch/arm/plat-samsung/include/plat/hwmon.h |   10 ++
 7 files changed, 60 insertions(+), 9 deletions(-)
 create mode 100644 arch/arm/plat-samsung/dev-hwmon.c

diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index 5547318..ca5c3c6 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -110,6 +110,7 @@ config ARCH_BAST
select MACH_BAST_IDE
select S3C24XX_DCLK
select ISA
+   select S3C_DEV_HWMON
select S3C_DEV_USB_HOST
select S3C_DEV_NAND
help
diff --git a/arch/arm/mach-s3c2410/mach-bast.c 
b/arch/arm/mach-s3c2410/mach-bast.c
index 02b1b62..c8786df 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -634,7 +634,7 @@ static void __init bast_map_io(void)
 
s3c24xx_register_clocks(bast_clocks, ARRAY_SIZE(bast_clocks));
 
-   s3c_device_hwmon.dev.platform_data = bast_hwmon_info;
+   s3c_hwmon_set_platdata(bast_hwmon_info);
 
s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc));
s3c24xx_init_clocks(0);
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index 9265f09..3166f32 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -338,14 +338,6 @@ struct platform_device s3c_device_adc = {
.resource = s3c_adc_resource,
 };
 
-/* HWMON */
-
-struct platform_device s3c_device_hwmon = {
-   .name   = s3c-hwmon,
-   .id = -1,
-   .dev.parent = s3c_device_adc.dev,
-};
-
 /* SDI */
 
 static struct resource s3c_sdi_resource[] = {
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index d552c65..7a36cf8 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -160,6 +160,11 @@ config S3C_DEV_HSMMC2
help
  Compile in platform device definitions for HSMMC channel 2
 
+config S3C_DEV_HWMON
+   bool
+   help
+   Compile in platform device definitions for HWMON
+
 config S3C_DEV_I2C1
bool
help
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 22c89d0..0ad820a 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_S3C_ADC) += adc.o
 obj-$(CONFIG_S3C_DEV_HSMMC)+= dev-hsmmc.o
 obj-$(CONFIG_S3C_DEV_HSMMC1)   += dev-hsmmc1.o
 obj-$(CONFIG_S3C_DEV_HSMMC2)   += dev-hsmmc2.o
+obj-$(CONFIG_S3C_DEV_HWMON)+= dev-hwmon.o
 obj-y  += dev-i2c0.o
 obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o
 obj-$(CONFIG_S3C_DEV_FB)   += dev-fb.o
diff --git a/arch/arm/plat-samsung/dev-hwmon.c 
b/arch/arm/plat-samsung/dev-hwmon.c
new file mode 100644
index 000..b3ffb95
--- /dev/null
+++ b/arch/arm/plat-samsung/dev-hwmon.c
@@ -0,0 +1,42 @@
+/* linux/arch/arm/plat-samsung/dev-hwmon.c
+ *
+ * Copyright 2008 Simtec Electronics
+ * Ben Dooks b...@simtec.co.uk
+ * http://armlinux.simtec.co.uk/
+ *
+ * Adapted for HWMON by Maurus Cuelenaere
+ *
+ * Samsung series device definition for HWMON
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include linux/kernel.h
+#include linux/platform_device.h
+
+#include plat/devs.h
+#include plat/hwmon.h
+
+struct platform_device s3c_device_hwmon = {
+   .name   = s3c-hwmon,
+   .id = -1,
+   .dev.parent = s3c_device_adc.dev,
+};
+
+void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
+{
+   struct s3c_hwmon_pdata *npd;
+
+   if (!pd) {
+   printk(KERN_ERR %s: no platform data\n, __func__);
+   return;
+   }
+
+   npd = kmemdup(pd, sizeof(struct s3c_hwmon_pdata), GFP_KERNEL);
+   if (!npd)
+   printk(KERN_ERR %s: no memory for platform data\n, __func__);
+
+   s3c_device_hwmon.dev.platform_data = npd;
+}
diff --git a/arch/arm/plat-samsung/include/plat/hwmon.h 
b/arch/arm/plat-samsung/include/plat/hwmon.h
index 1ba88ea..c167e44 100644
--- a/arch/arm/plat-samsung/include/plat/hwmon.h
+++ b/arch/arm/plat-samsung/include/plat/hwmon.h
@@ -37,5 +37,15 @@ struct s3c_hwmon_pdata {
struct s3c_hwmon_chcfg  *in[8];
 };
 
+/**
+ * s3c_hwmon_set_platdata - Set platform data for S3C HWMON

[PATCH] ARM: S3C64XX: Add USB clock source frequency as driver data to s3c-hsotg

[Maurus Cuelenaere]

The upcoming SmartQ machines use a different base clock frequency
for the USB block, this patch allows passing it as platform data
to the driver.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/plat-samsung/include/plat/udc-hs.h |8 
 drivers/usb/gadget/s3c-hsotg.c  |1 +
 2 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-samsung/include/plat/udc-hs.h 
b/arch/arm/plat-samsung/include/plat/udc-hs.h
index a22a4f2..2905344 100644
--- a/arch/arm/plat-samsung/include/plat/udc-hs.h
+++ b/arch/arm/plat-samsung/include/plat/udc-hs.h
@@ -18,12 +18,20 @@ enum s3c_hsotg_dmamode {
S3C_HSOTG_DMA_DRV,  /* DMA is chosen by driver */
 };
 
+enum s3c_hsotg_clkfreq {
+   S3C_HSOTG_CLKFREQ_48MHZ = 0,
+   S3C_HSOTG_CLKFREQ_12MHZ = 2,
+   S3C_HSOTG_CLKFREQ_24MHZ = 3,
+};
+
 /**
  * struct s3c_hsotg_plat - platform data for high-speed otg/udc
  * @dma: Whether to use DMA or not.
  * @is_osc: The clock source is an oscillator, not a crystal
+ * @clk_sel: Frequency of the clock source
  */
 struct s3c_hsotg_plat {
enum s3c_hsotg_dmamode  dma;
unsigned intis_osc : 1;
+   enum s3c_hsotg_clkfreq  clk_sel;
 };
diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c
index 1f73b48..600b56d 100644
--- a/drivers/usb/gadget/s3c-hsotg.c
+++ b/drivers/usb/gadget/s3c-hsotg.c
@@ -2705,6 +2705,7 @@ static void s3c_hsotg_otgreset(struct s3c_hsotg *hsotg)
mdelay(1);
 
osc = hsotg-plat-is_osc ? S3C_PHYCLK_EXT_OSC : 0;
+   osc |= hsotg-plat-clk_sel;
 
writel(osc | 0x10, S3C_PHYCLK);
 
-- 
1.7.1

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[PATCH 1/2] ARM: SAMSUNG: Move mach/ts.h to plat/ts.h

[Maurus Cuelenaere]

This moves mach-s3c2410/include/mach/ts.h to plat-samsung/include/plat/ts.h in
order to prepare for s3c64xx support in the touchscreen driver.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c2410/mach-h1940.c |2 +-
 arch/arm/plat-s3c24xx/devs.c   |3 +--
 .../mach = plat-samsung/include/plat}/ts.h|2 +-
 drivers/input/touchscreen/s3c2410_ts.c |2 +-
 4 files changed, 4 insertions(+), 5 deletions(-)
 rename arch/arm/{mach-s3c2410/include/mach = plat-samsung/include/plat}/ts.h 
(92%)

diff --git a/arch/arm/mach-s3c2410/mach-h1940.c 
b/arch/arm/mach-s3c2410/mach-h1940.c
index fbedd07..75e3ffb 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -46,7 +46,6 @@
 #include mach/h1940.h
 #include mach/h1940-latch.h
 #include mach/fb.h
-#include mach/ts.h
 #include plat/udc.h
 #include plat/iic.h
 
@@ -56,6 +55,7 @@
 #include plat/pll.h
 #include plat/pm.h
 #include plat/mci.h
+#include plat/ts.h
 
 static struct map_desc h1940_iodesc[] __initdata = {
[0] = {
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index 9265f09..93855a9 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -38,8 +38,7 @@
 #include plat/devs.h
 #include plat/cpu.h
 #include plat/regs-spi.h
-
-#include mach/ts.h
+#include plat/ts.h
 
 /* Serial port registrations */
 
diff --git a/arch/arm/mach-s3c2410/include/mach/ts.h 
b/arch/arm/plat-samsung/include/plat/ts.h
similarity index 92%
rename from arch/arm/mach-s3c2410/include/mach/ts.h
rename to arch/arm/plat-samsung/include/plat/ts.h
index dc36170..8a51675 100644
--- a/arch/arm/mach-s3c2410/include/mach/ts.h
+++ b/arch/arm/plat-samsung/include/plat/ts.h
@@ -1,4 +1,4 @@
-/* linux/include/asm/arch-s3c2410/ts.h
+/* arch/arm/plat-samsung/include/plat/ts.h
  *
  * Copyright (c) 2005 Arnaud Patard arnaud.pat...@rtp-net.org
  *
diff --git a/drivers/input/touchscreen/s3c2410_ts.c 
b/drivers/input/touchscreen/s3c2410_ts.c
index 98a7d12..a2e1228 100644
--- a/drivers/input/touchscreen/s3c2410_ts.c
+++ b/drivers/input/touchscreen/s3c2410_ts.c
@@ -37,9 +37,9 @@
 
 #include plat/adc.h
 #include plat/regs-adc.h
+#include plat/ts.h
 
 #include mach/regs-gpio.h
-#include mach/ts.h
 
 #define TSC_SLEEP  (S3C2410_ADCTSC_PULL_UP_DISABLE | S3C2410_ADCTSC_XY_PST(0))
 
-- 
1.7.1


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[PATCH 2/2] ARM: S3C64XX: Add touchscreen platform device definition

[Maurus Cuelenaere]

This patch adds the touchscreen platform device definition for S3C64XX boards.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c64xx/Makefile |1 +
 arch/arm/mach-s3c64xx/dev-ts.c |   61 
 arch/arm/plat-samsung/Kconfig  |6 
 3 files changed, 68 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-s3c64xx/dev-ts.c

diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index 3758e15..a690a9d 100644
--- a/arch/arm/mach-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -60,3 +60,4 @@ obj-y += dev-rtc.o
 obj-y  += dev-audio.o
 obj-$(CONFIG_S3C_ADC)  += dev-adc.o
 obj-$(CONFIG_S3C64XX_DEV_SPI)  += dev-spi.o
+obj-$(CONFIG_S3C64XX_DEV_TS)   += dev-ts.o
diff --git a/arch/arm/mach-s3c64xx/dev-ts.c b/arch/arm/mach-s3c64xx/dev-ts.c
new file mode 100644
index 000..17cc793
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-ts.c
@@ -0,0 +1,61 @@
+/* linux/arch/arm/mach-s3c64xx/dev-ts.c
+ *
+ * Copyright (c) 2008 Simtec Electronics
+ * http://armlinux.simtec.co.uk/
+ * Ben Dooks b...@simtec.co.uk, ben-li...@fluff.org
+ *
+ * Adapted by Maurus Cuelenaere for s3c64xx
+ *
+ * S3C64XX series device definition for touchscreen device
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include linux/kernel.h
+#include linux/string.h
+#include linux/platform_device.h
+
+#include mach/irqs.h
+#include mach/map.h
+
+#include plat/devs.h
+#include plat/ts.h
+
+static struct resource s3c_ts_resource[] = {
+   [0] = {
+   .start = S3C64XX_PA_ADC,
+   .end   = S3C64XX_PA_ADC + SZ_256 - 1,
+   .flags = IORESOURCE_MEM,
+   },
+   [1] = {
+   .start = IRQ_TC,
+   .end   = IRQ_TC,
+   .flags = IORESOURCE_IRQ,
+   },
+};
+
+struct platform_device s3c_device_ts = {
+   .name   = s3c64xx-ts,
+   .id = -1,
+   .num_resources  = ARRAY_SIZE(s3c_ts_resource),
+   .resource   = s3c_ts_resource,
+};
+
+void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
+{
+   struct s3c2410_ts_mach_info *npd;
+
+   if (!pd) {
+   printk(KERN_ERR %s: no platform data\n, __func__);
+   return;
+   }
+
+   npd = kmemdup(pd, sizeof(struct s3c2410_ts_mach_info), GFP_KERNEL);
+   if (!npd)
+   printk(KERN_ERR %s: no memory for platform data\n, __func__);
+
+   s3c_device_ts.dev.platform_data = npd;
+}
+EXPORT_SYMBOL(s3c24xx_ts_set_platdata);
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index d552c65..5d3ef35 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -191,6 +191,12 @@ config S3C64XX_DEV_SPI
  Compile in platform device definitions for S3C64XX's type
  SPI controllers.
 
+config S3C64XX_DEV_TS
+   bool
+   help
+   Common in platform device definitions for S3C64XX touchscreen
+   device
+
 # DMA
 
 config S3C_DMA
-- 
1.7.1

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[PATCH 1/7] ARM: S3C64XX: Add clock source frequency as driver data to s3c-hsotg

[Maurus Cuelenaere]

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/plat-s3c/include/plat/udc-hs.h |8 
 drivers/usb/gadget/s3c-hsotg.c  |1 +
 2 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-s3c/include/plat/udc-hs.h
b/arch/arm/plat-s3c/include/plat/udc-hs.h
index dd04db0..0dd69ca 100644
--- a/arch/arm/plat-s3c/include/plat/udc-hs.h
+++ b/arch/arm/plat-s3c/include/plat/udc-hs.h
@@ -18,12 +18,20 @@ enum s3c_hostg_dmamode {
S3C_HSOTG_DMA_DRV,  /* DMA is chosen by driver */
 };

+enum s3c_hsotg_clkfreq {
+   S3C_HSOTG_CLKFREQ_48MHZ = 0,
+   S3C_HSOTG_CLKFREQ_12MHZ = 2,
+   S3C_HSOTG_CLKFREQ_24MHZ = 3,
+};
+
 /**
  * struct s3c_hsotg_plat - platform data for high-speed otg/udc
  * @dma: Whether to use DMA or not.
  * @is_osc: The clock source is an oscillator, not a crystal
+ * @clk_sel: Frequency of the clock source
  */
 struct s3c_hsotg_plat {
enum s3c_hostg_dmamode  dma;
unsigned intis_osc : 1;
+   enum s3c_hsotg_clkfreq  clk_sel;
 };
diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c
index 4b5dbd0..c6240bb 100644
--- a/drivers/usb/gadget/s3c-hsotg.c
+++ b/drivers/usb/gadget/s3c-hsotg.c
@@ -2699,6 +2699,7 @@ static void s3c_hsotg_otgreset(struct s3c_hsotg *hsotg)
mdelay(1);

osc = hsotg-plat-is_osc ? S3C_PHYCLK_EXT_OSC : 0;
+   osc |= hsotg-plat-clk_sel;

writel(osc | 0x10, S3C_PHYCLK);

-- 
1.7.0.1
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[PATCH 4/7] ARM: S3C64XX: Add touchscreen platform device definition

[Maurus Cuelenaere]

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c64xx/Makefile |1 +
 arch/arm/mach-s3c64xx/dev-ts.c |   61 
 arch/arm/plat-samsung/Kconfig  |6 
 3 files changed, 68 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-s3c64xx/dev-ts.c

diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index d1d341a..02bc97f 100644
--- a/arch/arm/mach-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -60,3 +60,4 @@ obj-y += dev-rtc.o
 obj-$(CONFIG_S3C_ADC)  += dev-adc.o
 obj-$(CONFIG_SND_S3C24XX_SOC)  += dev-audio.o
 obj-$(CONFIG_S3C64XX_DEV_SPI)  += dev-spi.o
+obj-$(CONFIG_S3C64XX_DEV_TS)  += dev-ts.o
diff --git a/arch/arm/mach-s3c64xx/dev-ts.c b/arch/arm/mach-s3c64xx/dev-ts.c
new file mode 100644
index 000..17cc793
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-ts.c
@@ -0,0 +1,61 @@
+/* linux/arch/arm/mach-s3c64xx/dev-ts.c
+ *
+ * Copyright (c) 2008 Simtec Electronics
+ * http://armlinux.simtec.co.uk/
+ * Ben Dooks b...@simtec.co.uk, ben-li...@fluff.org
+ *
+ * Adapted by Maurus Cuelenaere for s3c64xx
+ *
+ * S3C64XX series device definition for touchscreen device
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include linux/kernel.h
+#include linux/string.h
+#include linux/platform_device.h
+
+#include mach/irqs.h
+#include mach/map.h
+
+#include plat/devs.h
+#include plat/ts.h
+
+static struct resource s3c_ts_resource[] = {
+   [0] = {
+   .start = S3C64XX_PA_ADC,
+   .end   = S3C64XX_PA_ADC + SZ_256 - 1,
+   .flags = IORESOURCE_MEM,
+   },
+   [1] = {
+   .start = IRQ_TC,
+   .end   = IRQ_TC,
+   .flags = IORESOURCE_IRQ,
+   },
+};
+
+struct platform_device s3c_device_ts = {
+   .name   = s3c64xx-ts,
+   .id = -1,
+   .num_resources  = ARRAY_SIZE(s3c_ts_resource),
+   .resource   = s3c_ts_resource,
+};
+
+void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
+{
+   struct s3c2410_ts_mach_info *npd;
+
+   if (!pd) {
+   printk(KERN_ERR %s: no platform data\n, __func__);
+   return;
+   }
+
+   npd = kmemdup(pd, sizeof(struct s3c2410_ts_mach_info), GFP_KERNEL);
+   if (!npd)
+   printk(KERN_ERR %s: no memory for platform data\n, __func__);
+
+   s3c_device_ts.dev.platform_data = npd;
+}
+EXPORT_SYMBOL(s3c24xx_ts_set_platdata);
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index d552c65..5d3ef35 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -191,6 +191,12 @@ config S3C64XX_DEV_SPI
  Compile in platform device definitions for S3C64XX's type
  SPI controllers.

+config S3C64XX_DEV_TS
+   bool
+   help
+   Common in platform device definitions for S3C64XX touchscreen
+   device
+
 # DMA

 config S3C_DMA
-- 
1.7.0.1
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[PATCH 5/7] ARM: S3C64XX: Add s3c64xx support to touchscreen driver

[Maurus Cuelenaere]

This ack's the extra interrupt s3c64xx platforms have in the touchscreen driver.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 drivers/input/touchscreen/Kconfig  |6 +++---
 drivers/input/touchscreen/s3c2410_ts.c |   26 ++
 2 files changed, 25 insertions(+), 7 deletions(-)

diff --git a/drivers/input/touchscreen/Kconfig
b/drivers/input/touchscreen/Kconfig
index dfafc76..0378b3d 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -146,11 +146,11 @@ config TOUCHSCREEN_FUJITSU
  module will be called fujitsu-ts.

 config TOUCHSCREEN_S3C2410
-   tristate Samsung S3C2410 touchscreen input driver
-   depends on ARCH_S3C2410
+   tristate Samsung S3C touchscreen input driver
+   depends on ARCH_S3C2410 || ARCH_S3C64XX
select S3C24XX_ADC
help
- Say Y here if you have the s3c2410 touchscreen.
+ Say Y here if you have the s3c touchscreen.

  If unsure, say N.

diff --git a/drivers/input/touchscreen/s3c2410_ts.c
b/drivers/input/touchscreen/s3c2410_ts.c
index 0cd0ca6..04c990e 100644
--- a/drivers/input/touchscreen/s3c2410_ts.c
+++ b/drivers/input/touchscreen/s3c2410_ts.c
@@ -40,7 +40,9 @@
 #include plat/regs-adc.h
 #include plat/ts.h

+#ifdef PLAT_S3C24XX
 #include mach/regs-gpio.h
+#endif

 #define TSC_SLEEP  (S3C2410_ADCTSC_PULL_UP_DISABLE | S3C2410_ADCTSC_XY_PST(0))

@@ -88,6 +90,12 @@ struct s3c2410ts {

 static struct s3c2410ts ts;

+enum s3c_cpu_type {
+   TYPE_S3C2410,
+   TYPE_S3C2440,
+   TYPE_S3C64XX,
+};
+
 /**
  * s3c2410_ts_connect - configure gpio for s3c2410 systems
  *
@@ -97,10 +105,12 @@ static struct s3c2410ts ts;
 */
 static inline void s3c2410_ts_connect(void)
 {
+#ifdef PLAT_S3C24XX
s3c2410_gpio_cfgpin(S3C2410_GPG(12), S3C2410_GPG12_XMON);
s3c2410_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPG13_nXPON);
s3c2410_gpio_cfgpin(S3C2410_GPG(14), S3C2410_GPG14_YMON);
s3c2410_gpio_cfgpin(S3C2410_GPG(15), S3C2410_GPG15_nYPON);
+#endif
 }

 /**
@@ -169,6 +179,7 @@ static DEFINE_TIMER(touch_timer, touch_timer_fire, 0, 0);
  */
 static irqreturn_t stylus_irq(int irq, void *dev_id)
 {
+   struct platform_device *pdev = to_platform_device(ts.dev);
unsigned long data0;
unsigned long data1;
bool down;
@@ -187,6 +198,12 @@ static irqreturn_t stylus_irq(int irq, void *dev_id)
else
dev_info(ts.dev, %s: count=%d\n, __func__, ts.count);

+
+   if (platform_get_device_id(pdev)-driver_data == TYPE_S3C64XX) {
+   /* Clear pen down/up interrupt */
+   writel(0x0, ts.io + S3C64XX_ADCCLRINTPNDNUP);
+   }
+
return IRQ_HANDLED;
 }

@@ -296,7 +313,7 @@ static int __devinit s3c2410ts_probe(struct
platform_device *pdev)
}

/* Configure the touchscreen external FETs on the S3C2410 */
-   if (!platform_get_device_id(pdev)-driver_data)
+   if (platform_get_device_id(pdev)-driver_data == TYPE_S3C2410)
s3c2410_ts_connect();

ts.client = s3c_adc_register(pdev, s3c24xx_ts_select,
@@ -418,15 +435,16 @@ static struct dev_pm_ops s3c_ts_pmops = {
 #endif

 static struct platform_device_id s3cts_driver_ids[] = {
-   { s3c2410-ts, 0 },
-   { s3c2440-ts, 1 },
+   { s3c2410-ts, TYPE_S3C2410 },
+   { s3c2440-ts, TYPE_S3C2440 },
+   { s3c64xx-ts, TYPE_S3C64XX },
{ }
 };
 MODULE_DEVICE_TABLE(platform, s3cts_driver_ids);

 static struct platform_driver s3c_ts_driver = {
.driver = {
-   .name   = s3c24xx-ts,
+   .name   = s3c-ts,
.owner  = THIS_MODULE,
 #ifdef CONFIG_PM
.pm = s3c_ts_pmops,
-- 
1.7.0.1
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Re: [PATCH 1/2 v3] ARM: SAMSUNG: Move HWMON from plat-s3c24xx to plat-samsung

[Maurus Cuelenaere]

On Wed, Jan 27, 2010 at 01:15, Maurus Cuelenaere mcuelena...@gmail.com wrote:
 Move HWMON platform definition from plat-s3c24xx to plat-samsung
 and adjust mach-bast to use the new s3c_hwmon_set_platdata().

 Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
 ---
 Changes since v2:
 remove EXPORT_SYMBOL
 add kerneldoc for s3c_hwmon_set_platdata
 attribute original copyright holder

 Changes since v1:
 select S3C_DEV_HWMON for mach-bast config


Any updates on this?

--
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Re: [PATCH 5/7] ARM: S3C64XX: Add s3c64xx support to touchscreen driver

[Maurus Cuelenaere]

Op 08-03-10 21:01, Ben Dooks schreef:

On Mon, Mar 08, 2010 at 07:38:59PM +0100, Maurus Cuelenaere wrote:
   

This ack's the extra interrupt s3c64xx platforms have in the touchscreen driver.
 

This acks, no need for an ' here.

You'd have been better off sayinh:

Add support for the S3C64XX touchscreen to the s3c2410_ts driver, ensuring
it compiles and supports the extra features such as the interrupt generation.
   


Ok, should I resend this?


Signed-off-by: Maurus Cuelenaeremcuelena...@gmail.com
---
  drivers/input/touchscreen/Kconfig  |6 +++---
  drivers/input/touchscreen/s3c2410_ts.c |   26 ++
  2 files changed, 25 insertions(+), 7 deletions(-)

diff --git a/drivers/input/touchscreen/Kconfig
b/drivers/input/touchscreen/Kconfig
index dfafc76..0378b3d 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -146,11 +146,11 @@ config TOUCHSCREEN_FUJITSU
  module will be called fujitsu-ts.

  config TOUCHSCREEN_S3C2410
-   tristate Samsung S3C2410 touchscreen input driver
-   depends on ARCH_S3C2410
+   tristate Samsung S3C touchscreen input driver
+   depends on ARCH_S3C2410 || ARCH_S3C64XX
select S3C24XX_ADC
help
- Say Y here if you have the s3c2410 touchscreen.
+ Say Y here if you have the s3c touchscreen.

  If unsure, say N.

diff --git a/drivers/input/touchscreen/s3c2410_ts.c
b/drivers/input/touchscreen/s3c2410_ts.c
index 0cd0ca6..04c990e 100644
--- a/drivers/input/touchscreen/s3c2410_ts.c
+++ b/drivers/input/touchscreen/s3c2410_ts.c
@@ -40,7 +40,9 @@
  #includeplat/regs-adc.h
  #includeplat/ts.h

 

OA  +#ifdef PLAT_S3C24XX
   

  #includemach/regs-gpio.h
+#endif
 

hmm, does this correct a compile error?
   


It does, this has been mentioned in a previous version of this patch.
Last time I checked, this file wasn't available for S3C64xx targets.
Also, see below.


  #define TSC_SLEEP  (S3C2410_ADCTSC_PULL_UP_DISABLE | S3C2410_ADCTSC_XY_PST(0))

@@ -88,6 +90,12 @@ struct s3c2410ts {

  static struct s3c2410ts ts;

+enum s3c_cpu_type {
+   TYPE_S3C2410,
+   TYPE_S3C2440,
+   TYPE_S3C64XX,
+};
+
  /**
   * s3c2410_ts_connect - configure gpio for s3c2410 systems
   *
@@ -97,10 +105,12 @@ static struct s3c2410ts ts;
  */
  static inline void s3c2410_ts_connect(void)
  {
+#ifdef PLAT_S3C24XX
s3c2410_gpio_cfgpin(S3C2410_GPG(12), S3C2410_GPG12_XMON);
s3c2410_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPG13_nXPON);
s3c2410_gpio_cfgpin(S3C2410_GPG(14), S3C2410_GPG14_YMON);
s3c2410_gpio_cfgpin(S3C2410_GPG(15), S3C2410_GPG15_nYPON);
+#endif
  }


The s3c2410_gpio_cfgpin() and S3C2410_* aren't defined for S3C64xx builds.

--
Maurus Cuelenaere

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Re: [PATCH 4/7] ARM: S3C64XX: Add touchscreen platform device definition

[Maurus Cuelenaere]

This adds the touchscreen platform device definition for S3C64XX boards.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c64xx/Makefile |    1 +
 arch/arm/mach-s3c64xx/dev-ts.c |   61 
 arch/arm/plat-samsung/Kconfig  |    6 
 3 files changed, 68 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-s3c64xx/dev-ts.c

diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index d1d341a..02bc97f 100644
--- a/arch/arm/mach-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -60,3 +60,4 @@ obj-y                         += dev-rtc.o
 obj-$(CONFIG_S3C_ADC)          += dev-adc.o
 obj-$(CONFIG_SND_S3C24XX_SOC)  += dev-audio.o
 obj-$(CONFIG_S3C64XX_DEV_SPI)  += dev-spi.o
+obj-$(CONFIG_S3C64XX_DEV_TS)  += dev-ts.o
diff --git a/arch/arm/mach-s3c64xx/dev-ts.c b/arch/arm/mach-s3c64xx/dev-ts.c
new file mode 100644
index 000..17cc793
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-ts.c
@@ -0,0 +1,61 @@
+/* linux/arch/arm/mach-s3c64xx/dev-ts.c
+ *
+ * Copyright (c) 2008 Simtec Electronics
+ *     http://armlinux.simtec.co.uk/
+ *     Ben Dooks b...@simtec.co.uk, ben-li...@fluff.org
+ *
+ * Adapted by Maurus Cuelenaere for s3c64xx
+ *
+ * S3C64XX series device definition for touchscreen device
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include linux/kernel.h
+#include linux/string.h
+#include linux/platform_device.h
+
+#include mach/irqs.h
+#include mach/map.h
+
+#include plat/devs.h
+#include plat/ts.h
+
+static struct resource s3c_ts_resource[] = {
+       [0] = {
+               .start = S3C64XX_PA_ADC,
+               .end   = S3C64XX_PA_ADC + SZ_256 - 1,
+               .flags = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start = IRQ_TC,
+               .end   = IRQ_TC,
+               .flags = IORESOURCE_IRQ,
+       },
+};
+
+struct platform_device s3c_device_ts = {
+       .name           = s3c64xx-ts,
+       .id             = -1,
+       .num_resources  = ARRAY_SIZE(s3c_ts_resource),
+       .resource       = s3c_ts_resource,
+};
+
+void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
+{
+       struct s3c2410_ts_mach_info *npd;
+
+       if (!pd) {
+               printk(KERN_ERR %s: no platform data\n, __func__);
+               return;
+       }
+
+       npd = kmemdup(pd, sizeof(struct s3c2410_ts_mach_info), GFP_KERNEL);
+       if (!npd)
+               printk(KERN_ERR %s: no memory for platform data\n, __func__);
+
+       s3c_device_ts.dev.platform_data = npd;
+}
+EXPORT_SYMBOL(s3c24xx_ts_set_platdata);
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index d552c65..5d3ef35 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -191,6 +191,12 @@ config S3C64XX_DEV_SPI
         Compile in platform device definitions for S3C64XX's type
         SPI controllers.

+config S3C64XX_DEV_TS
+       bool
+       help
+           Common in platform device definitions for S3C64XX touchscreen
+           device
+
 # DMA

 config S3C_DMA
--
1.7.0.1
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[PATCH] ARM: SAMSUNG: Fix s3c hsotg driver compilation

[Maurus Cuelenaere]

File regs-sys.h was moved from plat to mach.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 drivers/usb/gadget/s3c-hsotg.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c
index fec9c09..eda6a91 100644
--- a/drivers/usb/gadget/s3c-hsotg.c
+++ b/drivers/usb/gadget/s3c-hsotg.c
@@ -27,10 +27,10 @@
 #include linux/usb/gadget.h

 #include mach/map.h
+#include mach/regs-sys.h

 #include plat/regs-usb-hsotg-phy.h
 #include plat/regs-usb-hsotg.h
-#include plat/regs-sys.h
 #include plat/udc-hs.h

 #define DMA_ADDR_INVALID (~((dma_addr_t)0))
-- 
1.7.0
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[PATCH 1/2] ARM: SAMSUNG: Move HWMON from plat-s3c24xx to plat-samsung

[Maurus Cuelenaere]

Move HWMON platform definition from plat-s3c24xx to plat-samsung
and adjust mach-bast to use the new s3c_hwmon_set_platdata().

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c2410/mach-bast.c  |2 +-
 arch/arm/plat-s3c24xx/devs.c   |8 -
 arch/arm/plat-samsung/Kconfig  |5 +++
 arch/arm/plat-samsung/Makefile |1 +
 arch/arm/plat-samsung/dev-hwmon.c  |   39 
 arch/arm/plat-samsung/include/plat/hwmon.h |2 +
 6 files changed, 48 insertions(+), 9 deletions(-)
 create mode 100644 arch/arm/plat-samsung/dev-hwmon.c

diff --git a/arch/arm/mach-s3c2410/mach-bast.c
b/arch/arm/mach-s3c2410/mach-bast.c
index 02b1b62..c8786df 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -634,7 +634,7 @@ static void __init bast_map_io(void)

s3c24xx_register_clocks(bast_clocks, ARRAY_SIZE(bast_clocks));

-   s3c_device_hwmon.dev.platform_data = bast_hwmon_info;
+   s3c_hwmon_set_platdata(bast_hwmon_info);

s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc));
s3c24xx_init_clocks(0);
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index 986d4e5..67e0db7 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -319,14 +319,6 @@ struct platform_device s3c_device_adc = {
.resource = s3c_adc_resource,
 };

-/* HWMON */
-
-struct platform_device s3c_device_hwmon = {
-   .name   = s3c-hwmon,
-   .id = -1,
-   .dev.parent = s3c_device_adc.dev,
-};
-
 /* SDI */

 static struct resource s3c_sdi_resource[] = {
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 1c2fe91..429fe80 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -107,6 +107,11 @@ config S3C_DEV_HSMMC2
help
  Compile in platform device definitions for HSMMC channel 2

+config S3C_DEV_HWMON
+   bool
+   help
+   Compile in platform device definitions for HWMON
+
 config S3C_DEV_I2C1
bool
help
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index c8c8cae..e0b622e 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -31,6 +31,7 @@ obj-$(CONFIG_S3C_ADC) += adc.o
 obj-$(CONFIG_S3C_DEV_HSMMC)+= dev-hsmmc.o
 obj-$(CONFIG_S3C_DEV_HSMMC1)   += dev-hsmmc1.o
 obj-$(CONFIG_S3C_DEV_HSMMC2)   += dev-hsmmc2.o
+obj-$(CONFIG_S3C_DEV_HWMON)+= dev-hwmon.o
 obj-y  += dev-i2c0.o
 obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o
 obj-$(CONFIG_S3C_DEV_FB)   += dev-fb.o
diff --git a/arch/arm/plat-samsung/dev-hwmon.c
b/arch/arm/plat-samsung/dev-hwmon.c
new file mode 100644
index 000..2c1080d
--- /dev/null
+++ b/arch/arm/plat-samsung/dev-hwmon.c
@@ -0,0 +1,39 @@
+/* linux/arch/arm/plat-samsung/dev-hwmon.c
+ *
+ * Copyright 2010 Maurus Cuelenaere
+ *
+ * Samsung series device definition for HWMON
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include linux/kernel.h
+#include linux/platform_device.h
+
+#include plat/devs.h
+#include plat/hwmon.h
+
+struct platform_device s3c_device_hwmon = {
+   .name   = s3c-hwmon,
+   .id = -1,
+   .dev.parent = s3c_device_adc.dev,
+};
+
+void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
+{
+   struct s3c_hwmon_pdata *npd;
+
+   if (!pd) {
+   printk(KERN_ERR %s: no platform data\n, __func__);
+   return;
+   }
+
+   npd = kmemdup(pd, sizeof(struct s3c_hwmon_pdata), GFP_KERNEL);
+   if (!npd)
+   printk(KERN_ERR %s: no memory for platform data\n, __func__);
+
+   s3c_device_hwmon.dev.platform_data = npd;
+}
+EXPORT_SYMBOL(s3c_hwmon_set_platdata);
diff --git a/arch/arm/plat-samsung/include/plat/hwmon.h
b/arch/arm/plat-samsung/include/plat/hwmon.h
index 1ba88ea..352795b 100644
--- a/arch/arm/plat-samsung/include/plat/hwmon.h
+++ b/arch/arm/plat-samsung/include/plat/hwmon.h
@@ -37,5 +37,7 @@ struct s3c_hwmon_pdata {
struct s3c_hwmon_chcfg  *in[8];
 };

+extern void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd);
+
 #endif /* __ASM_ARCH_ADC_HWMON_H */

-- 
1.6.6.1
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[PATCH 2/2] HWMON: Add s3c64xx support to s3c-hwmon

[Maurus Cuelenaere]

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 drivers/hwmon/Kconfig |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 68cf877..a8a267c 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -702,7 +702,7 @@ config SENSORS_SHT15

 config SENSORS_S3C
tristate S3C24XX/S3C64XX Inbuilt ADC
-   depends on ARCH_S3C2410
+   depends on ARCH_S3C2410 || ARCH_S3C64XX
help
  If you say yes here you get support for the on-board ADCs of
  the Samsung S3C24XX or S3C64XX series of SoC
-- 
1.6.6.1
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[PATCH 1/2 v2] ARM: SAMSUNG: Move HWMON from plat-s3c24xx to plat-samsung

[Maurus Cuelenaere]

Move HWMON platform definition from plat-s3c24xx to plat-samsung
and adjust mach-bast to use the new s3c_hwmon_set_platdata().

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
Changes since v1:
select S3C_DEV_HWMON for mach-bast config

 arch/arm/mach-s3c2410/Kconfig  |1 +
 arch/arm/mach-s3c2410/mach-bast.c  |2 +-
 arch/arm/plat-s3c24xx/devs.c   |8 -
 arch/arm/plat-samsung/Kconfig  |5 +++
 arch/arm/plat-samsung/Makefile |1 +
 arch/arm/plat-samsung/dev-hwmon.c  |   39 
 arch/arm/plat-samsung/include/plat/hwmon.h |2 +
 7 files changed, 49 insertions(+), 9 deletions(-)
 create mode 100644 arch/arm/plat-samsung/dev-hwmon.c

diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index 5547318..ca5c3c6 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -110,6 +110,7 @@ config ARCH_BAST
select MACH_BAST_IDE
select S3C24XX_DCLK
select ISA
+   select S3C_DEV_HWMON
select S3C_DEV_USB_HOST
select S3C_DEV_NAND
help
diff --git a/arch/arm/mach-s3c2410/mach-bast.c
b/arch/arm/mach-s3c2410/mach-bast.c
index 02b1b62..c8786df 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -634,7 +634,7 @@ static void __init bast_map_io(void)

s3c24xx_register_clocks(bast_clocks, ARRAY_SIZE(bast_clocks));

-   s3c_device_hwmon.dev.platform_data = bast_hwmon_info;
+   s3c_hwmon_set_platdata(bast_hwmon_info);

s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc));
s3c24xx_init_clocks(0);
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index 986d4e5..67e0db7 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -319,14 +319,6 @@ struct platform_device s3c_device_adc = {
.resource = s3c_adc_resource,
 };

-/* HWMON */
-
-struct platform_device s3c_device_hwmon = {
-   .name   = s3c-hwmon,
-   .id = -1,
-   .dev.parent = s3c_device_adc.dev,
-};
-
 /* SDI */

 static struct resource s3c_sdi_resource[] = {
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 1c2fe91..429fe80 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -107,6 +107,11 @@ config S3C_DEV_HSMMC2
help
  Compile in platform device definitions for HSMMC channel 2

+config S3C_DEV_HWMON
+   bool
+   help
+   Compile in platform device definitions for HWMON
+
 config S3C_DEV_I2C1
bool
help
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index c8c8cae..e0b622e 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -31,6 +31,7 @@ obj-$(CONFIG_S3C_ADC) += adc.o
 obj-$(CONFIG_S3C_DEV_HSMMC)+= dev-hsmmc.o
 obj-$(CONFIG_S3C_DEV_HSMMC1)   += dev-hsmmc1.o
 obj-$(CONFIG_S3C_DEV_HSMMC2)   += dev-hsmmc2.o
+obj-$(CONFIG_S3C_DEV_HWMON)+= dev-hwmon.o
 obj-y  += dev-i2c0.o
 obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o
 obj-$(CONFIG_S3C_DEV_FB)   += dev-fb.o
diff --git a/arch/arm/plat-samsung/dev-hwmon.c
b/arch/arm/plat-samsung/dev-hwmon.c
new file mode 100644
index 000..2c1080d
--- /dev/null
+++ b/arch/arm/plat-samsung/dev-hwmon.c
@@ -0,0 +1,39 @@
+/* linux/arch/arm/plat-samsung/dev-hwmon.c
+ *
+ * Copyright 2010 Maurus Cuelenaere
+ *
+ * Samsung series device definition for HWMON
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include linux/kernel.h
+#include linux/platform_device.h
+
+#include plat/devs.h
+#include plat/hwmon.h
+
+struct platform_device s3c_device_hwmon = {
+   .name   = s3c-hwmon,
+   .id = -1,
+   .dev.parent = s3c_device_adc.dev,
+};
+
+void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
+{
+   struct s3c_hwmon_pdata *npd;
+
+   if (!pd) {
+   printk(KERN_ERR %s: no platform data\n, __func__);
+   return;
+   }
+
+   npd = kmemdup(pd, sizeof(struct s3c_hwmon_pdata), GFP_KERNEL);
+   if (!npd)
+   printk(KERN_ERR %s: no memory for platform data\n, __func__);
+
+   s3c_device_hwmon.dev.platform_data = npd;
+}
+EXPORT_SYMBOL(s3c_hwmon_set_platdata);
diff --git a/arch/arm/plat-samsung/include/plat/hwmon.h
b/arch/arm/plat-samsung/include/plat/hwmon.h
index 1ba88ea..352795b 100644
--- a/arch/arm/plat-samsung/include/plat/hwmon.h
+++ b/arch/arm/plat-samsung/include/plat/hwmon.h
@@ -37,5 +37,7 @@ struct s3c_hwmon_pdata {
struct s3c_hwmon_chcfg  *in[8];
 };

+extern void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd);
+
 #endif /* __ASM_ARCH_ADC_HWMON_H */

-- 
1.6.6.1
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Re: [PATCH 2/4] ARM: SAMSUNG: Rename s3c24xx touchscreen interface to s3c

[Maurus Cuelenaere]

Op 26-01-10 15:55, Ben Dooks schreef:

On Fri, Jan 22, 2010 at 11:47:11PM +0100, Maurus Cuelenaere wrote:
   

ARM: SAMSUNG: Rename s3c24xx touchscreen interface to s3c

Signed-off-by: Maurus Cuelenaeremcuelena...@gmail.com
 

Renaming for naming sake is in my view just a waste of diff, unless
anyone disagrees here.
   


Well I don't think it's pointless, having s3c24xx_ts_set_platdata() and 
s3c2410_ts_mach_info instead of their s3c_ equivalents make it look like 
the API only handles s3c24xx platforms, which isn't true (anymore).


But I can remove this commit, if you want to.

--
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[PATCH 1/2 v3] ARM: SAMSUNG: Move HWMON from plat-s3c24xx to plat-samsung

[Maurus Cuelenaere]

Move HWMON platform definition from plat-s3c24xx to plat-samsung
and adjust mach-bast to use the new s3c_hwmon_set_platdata().

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
Changes since v2:
remove EXPORT_SYMBOL
add kerneldoc for s3c_hwmon_set_platdata
attribute original copyright holder

Changes since v1:
select S3C_DEV_HWMON for mach-bast config

 arch/arm/mach-s3c2410/Kconfig  |1 +
 arch/arm/mach-s3c2410/mach-bast.c  |2 +-
 arch/arm/plat-s3c24xx/devs.c   |8 -
 arch/arm/plat-samsung/Kconfig  |5 +++
 arch/arm/plat-samsung/Makefile |1 +
 arch/arm/plat-samsung/dev-hwmon.c  |   42 
 arch/arm/plat-samsung/include/plat/hwmon.h |   10 ++
 7 files changed, 60 insertions(+), 9 deletions(-)
 create mode 100644 arch/arm/plat-samsung/dev-hwmon.c

diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index 5547318..ca5c3c6 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -110,6 +110,7 @@ config ARCH_BAST
select MACH_BAST_IDE
select S3C24XX_DCLK
select ISA
+   select S3C_DEV_HWMON
select S3C_DEV_USB_HOST
select S3C_DEV_NAND
help
diff --git a/arch/arm/mach-s3c2410/mach-bast.c
b/arch/arm/mach-s3c2410/mach-bast.c
index 02b1b62..c8786df 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -634,7 +634,7 @@ static void __init bast_map_io(void)

s3c24xx_register_clocks(bast_clocks, ARRAY_SIZE(bast_clocks));

-   s3c_device_hwmon.dev.platform_data = bast_hwmon_info;
+   s3c_hwmon_set_platdata(bast_hwmon_info);

s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc));
s3c24xx_init_clocks(0);
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index 986d4e5..67e0db7 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -319,14 +319,6 @@ struct platform_device s3c_device_adc = {
.resource = s3c_adc_resource,
 };

-/* HWMON */
-
-struct platform_device s3c_device_hwmon = {
-   .name   = s3c-hwmon,
-   .id = -1,
-   .dev.parent = s3c_device_adc.dev,
-};
-
 /* SDI */

 static struct resource s3c_sdi_resource[] = {
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 1c2fe91..429fe80 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -107,6 +107,11 @@ config S3C_DEV_HSMMC2
help
  Compile in platform device definitions for HSMMC channel 2

+config S3C_DEV_HWMON
+   bool
+   help
+   Compile in platform device definitions for HWMON
+
 config S3C_DEV_I2C1
bool
help
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index c8c8cae..e0b622e 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -31,6 +31,7 @@ obj-$(CONFIG_S3C_ADC) += adc.o
 obj-$(CONFIG_S3C_DEV_HSMMC)+= dev-hsmmc.o
 obj-$(CONFIG_S3C_DEV_HSMMC1)   += dev-hsmmc1.o
 obj-$(CONFIG_S3C_DEV_HSMMC2)   += dev-hsmmc2.o
+obj-$(CONFIG_S3C_DEV_HWMON)+= dev-hwmon.o
 obj-y  += dev-i2c0.o
 obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o
 obj-$(CONFIG_S3C_DEV_FB)   += dev-fb.o
diff --git a/arch/arm/plat-samsung/dev-hwmon.c
b/arch/arm/plat-samsung/dev-hwmon.c
new file mode 100644
index 000..b3ffb95
--- /dev/null
+++ b/arch/arm/plat-samsung/dev-hwmon.c
@@ -0,0 +1,42 @@
+/* linux/arch/arm/plat-samsung/dev-hwmon.c
+ *
+ * Copyright 2008 Simtec Electronics
+ * Ben Dooks b...@simtec.co.uk
+ * http://armlinux.simtec.co.uk/
+ *
+ * Adapted for HWMON by Maurus Cuelenaere
+ *
+ * Samsung series device definition for HWMON
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include linux/kernel.h
+#include linux/platform_device.h
+
+#include plat/devs.h
+#include plat/hwmon.h
+
+struct platform_device s3c_device_hwmon = {
+   .name   = s3c-hwmon,
+   .id = -1,
+   .dev.parent = s3c_device_adc.dev,
+};
+
+void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
+{
+   struct s3c_hwmon_pdata *npd;
+
+   if (!pd) {
+   printk(KERN_ERR %s: no platform data\n, __func__);
+   return;
+   }
+
+   npd = kmemdup(pd, sizeof(struct s3c_hwmon_pdata), GFP_KERNEL);
+   if (!npd)
+   printk(KERN_ERR %s: no memory for platform data\n, __func__);
+
+   s3c_device_hwmon.dev.platform_data = npd;
+}
diff --git a/arch/arm/plat-samsung/include/plat/hwmon.h
b/arch/arm/plat-samsung/include/plat/hwmon.h
index 1ba88ea..c167e44 100644
--- a/arch/arm/plat-samsung/include/plat/hwmon.h
+++ b/arch/arm/plat-samsung/include/plat/hwmon.h
@@ -37,5 +37,15 @@ struct s3c_hwmon_pdata

[PATCH 1/4 v2] ARM: SAMSUNG: Move mach/ts.h to plat/ts.h

[Maurus Cuelenaere]

This moves mach-s3c2410/include/mach/ts.h to plat-samsung/include/plat/ts.h in
order to prepare for s3c64xx support in the touchscreen driver.
---
 arch/arm/mach-s3c2410/mach-h1940.c |2 +-
 arch/arm/plat-s3c24xx/devs.c   |3 +--
 .../mach = plat-samsung/include/plat}/ts.h|2 +-
 drivers/input/touchscreen/s3c2410_ts.c |2 +-
 4 files changed, 4 insertions(+), 5 deletions(-)
 rename arch/arm/{mach-s3c2410/include/mach =
plat-samsung/include/plat}/ts.h (92%)

diff --git a/arch/arm/mach-s3c2410/mach-h1940.c
b/arch/arm/mach-s3c2410/mach-h1940.c
index fbedd07..75e3ffb 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -46,7 +46,6 @@
 #include mach/h1940.h
 #include mach/h1940-latch.h
 #include mach/fb.h
-#include mach/ts.h
 #include plat/udc.h
 #include plat/iic.h

@@ -56,6 +55,7 @@
 #include plat/pll.h
 #include plat/pm.h
 #include plat/mci.h
+#include plat/ts.h

 static struct map_desc h1940_iodesc[] __initdata = {
[0] = {
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index 986d4e5..3e55bdd 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -37,8 +37,7 @@
 #include plat/devs.h
 #include plat/cpu.h
 #include plat/regs-spi.h
-
-#include mach/ts.h
+#include plat/ts.h

 /* Serial port registrations */

diff --git a/arch/arm/mach-s3c2410/include/mach/ts.h
b/arch/arm/plat-samsung/include/plat/ts.h
similarity index 92%
rename from arch/arm/mach-s3c2410/include/mach/ts.h
rename to arch/arm/plat-samsung/include/plat/ts.h
index dc36170..8a51675 100644
--- a/arch/arm/mach-s3c2410/include/mach/ts.h
+++ b/arch/arm/plat-samsung/include/plat/ts.h
@@ -1,4 +1,4 @@
-/* linux/include/asm/arch-s3c2410/ts.h
+/* arch/arm/plat-samsung/include/plat/ts.h
  *
  * Copyright (c) 2005 Arnaud Patard arnaud.pat...@rtp-net.org
  *
diff --git a/drivers/input/touchscreen/s3c2410_ts.c
b/drivers/input/touchscreen/s3c2410_ts.c
index 6386b44..0cd0ca6 100644
--- a/drivers/input/touchscreen/s3c2410_ts.c
+++ b/drivers/input/touchscreen/s3c2410_ts.c
@@ -38,9 +38,9 @@

 #include plat/adc.h
 #include plat/regs-adc.h
+#include plat/ts.h

 #include mach/regs-gpio.h
-#include mach/ts.h

 #define TSC_SLEEP  (S3C2410_ADCTSC_PULL_UP_DISABLE | S3C2410_ADCTSC_XY_PST(0))

-- 
1.6.6.1
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Re: [PATCH 2/4] ARM: SAMSUNG: Rename s3c24xx touchscreen interface to s3c

[Maurus Cuelenaere]

Op 26-01-10 17:02, Maurus Cuelenaere schreef:

Op 26-01-10 15:55, Ben Dooks schreef:

On Fri, Jan 22, 2010 at 11:47:11PM +0100, Maurus Cuelenaere wrote:

ARM: SAMSUNG: Rename s3c24xx touchscreen interface to s3c

Signed-off-by: Maurus Cuelenaeremcuelena...@gmail.com

Renaming for naming sake is in my view just a waste of diff, unless
anyone disagrees here.


Well I don't think it's pointless, having s3c24xx_ts_set_platdata() 
and s3c2410_ts_mach_info instead of their s3c_ equivalents make it 
look like the API only handles s3c24xx platforms, which isn't true 
(anymore).


But I can remove this commit, if you want to.


I have removed this commit and rebased the patches in my tree, will 
repost them when an appropriate solution for the ADC/TS resource sharing 
has been found.


--
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[PATCH 0/4] Add s3c64xx support to touchscreen driver

[Maurus Cuelenaere]

Hi,

these patches add support for the s3c64xx platforms to the touchscreen driver.
This was based on next-samsung in Ben Dook's tree.

These depend on:
[PATCH] ARM: SAMSUNG: Fix null pointer dereference in ADC driver

I'm not quite sure regarding the resources in patch 3, perhaps these should be
somehow shared with the ADC driver? (I also can't seem to figure out how the
s3c24xx handles this at the moment..)

Regards,
Maurus Cuelenaere
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[PATCH 1/4] ARM: SAMSUNG: Move mach/ts.h to plat/ts.h

[Maurus Cuelenaere]

ARM: SAMSUNG: Move mach/ts.h to plat/ts.h

This moves mach-s3c2410/include/mach/ts.h to plat-samsung/include/plat/ts.h in
order to prepare for s3c64xx support in the touchscreen driver.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c2410/include/mach/ts.h |   21 -
 arch/arm/mach-s3c2410/mach-h1940.c  |2 +-
 arch/arm/plat-s3c24xx/devs.c|3 +--
 arch/arm/plat-samsung/include/plat/ts.h |   21 +
 drivers/input/touchscreen/s3c2410_ts.c  |2 +-
 5 files changed, 24 insertions(+), 25 deletions(-)
 delete mode 100644 arch/arm/mach-s3c2410/include/mach/ts.h
 create mode 100644 arch/arm/plat-samsung/include/plat/ts.h

diff --git a/arch/arm/mach-s3c2410/include/mach/ts.h
b/arch/arm/mach-s3c2410/include/mach/ts.h
deleted file mode 100644
index dc36170..000
--- a/arch/arm/mach-s3c2410/include/mach/ts.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/* linux/include/asm/arch-s3c2410/ts.h
- *
- * Copyright (c) 2005 Arnaud Patard arnaud.pat...@rtp-net.org
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARM_TS_H
-#define __ASM_ARM_TS_H
-
-struct s3c2410_ts_mach_info {
-   int delay;
-   int presc;
-   int oversampling_shift;
-};
-
-extern void s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *);
-
-#endif /* __ASM_ARM_TS_H */
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c
b/arch/arm/mach-s3c2410/mach-h1940.c
index fbedd07..75e3ffb 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -46,7 +46,6 @@
 #include mach/h1940.h
 #include mach/h1940-latch.h
 #include mach/fb.h
-#include mach/ts.h
 #include plat/udc.h
 #include plat/iic.h

@@ -56,6 +55,7 @@
 #include plat/pll.h
 #include plat/pm.h
 #include plat/mci.h
+#include plat/ts.h

 static struct map_desc h1940_iodesc[] __initdata = {
[0] = {
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index 986d4e5..3e55bdd 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -37,8 +37,7 @@
 #include plat/devs.h
 #include plat/cpu.h
 #include plat/regs-spi.h
-
-#include mach/ts.h
+#include plat/ts.h

 /* Serial port registrations */

diff --git a/arch/arm/plat-samsung/include/plat/ts.h
b/arch/arm/plat-samsung/include/plat/ts.h
new file mode 100644
index 000..8a51675
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/ts.h
@@ -0,0 +1,21 @@
+/* arch/arm/plat-samsung/include/plat/ts.h
+ *
+ * Copyright (c) 2005 Arnaud Patard arnaud.pat...@rtp-net.org
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARM_TS_H
+#define __ASM_ARM_TS_H
+
+struct s3c2410_ts_mach_info {
+   int delay;
+   int presc;
+   int oversampling_shift;
+};
+
+extern void s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *);
+
+#endif /* __ASM_ARM_TS_H */
diff --git a/drivers/input/touchscreen/s3c2410_ts.c
b/drivers/input/touchscreen/s3c2410_ts.c
index 6386b44..0cd0ca6 100644
--- a/drivers/input/touchscreen/s3c2410_ts.c
+++ b/drivers/input/touchscreen/s3c2410_ts.c
@@ -38,9 +38,9 @@

 #include plat/adc.h
 #include plat/regs-adc.h
+#include plat/ts.h

 #include mach/regs-gpio.h
-#include mach/ts.h

 #define TSC_SLEEP  (S3C2410_ADCTSC_PULL_UP_DISABLE | S3C2410_ADCTSC_XY_PST(0))

-- 
1.6.6.1
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[PATCH 2/4] ARM: SAMSUNG: Rename s3c24xx touchscreen interface to s3c

[Maurus Cuelenaere]

ARM: SAMSUNG: Rename s3c24xx touchscreen interface to s3c

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c2410/mach-h1940.c  |4 ++--
 arch/arm/plat-s3c24xx/devs.c|   10 +-
 arch/arm/plat-samsung/include/plat/ts.h |4 ++--
 drivers/input/touchscreen/s3c2410_ts.c  |4 ++--
 4 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-s3c2410/mach-h1940.c
b/arch/arm/mach-s3c2410/mach-h1940.c
index 75e3ffb..76392f2 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -141,7 +141,7 @@ static struct s3c2410_udc_mach_info h1940_udc_cfg
__initdata = {
.vbus_pin_inverted  = 1,
 };

-static struct s3c2410_ts_mach_info h1940_ts_cfg __initdata = {
+static struct s3c_ts_mach_info h1940_ts_cfg __initdata = {
.delay = 1,
.presc = 49,
.oversampling_shift = 2,
@@ -313,7 +313,7 @@ static void __init h1940_init(void)
s3c24xx_fb_set_platdata(h1940_fb_info);
s3c24xx_mci_set_platdata(h1940_mmc_cfg);
s3c24xx_udc_set_platdata(h1940_udc_cfg);
-   s3c24xx_ts_set_platdata(h1940_ts_cfg);
+   s3c_ts_set_platdata(h1940_ts_cfg);
s3c_i2c0_set_platdata(NULL);

/* Turn off suspend on both USB ports, and switch the
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index 3e55bdd..f1c1426 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -163,14 +163,14 @@ struct platform_device s3c_device_ts = {
 };
 EXPORT_SYMBOL(s3c_device_ts);

-static struct s3c2410_ts_mach_info s3c2410ts_info;
+static struct s3c_ts_mach_info s3c2410ts_info;

-void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info
*hard_s3c2410ts_info)
+void __init s3c_ts_set_platdata(struct s3c_ts_mach_info *hard_s3cts_info)
 {
-   memcpy(s3c2410ts_info, hard_s3c2410ts_info, sizeof(struct
s3c2410_ts_mach_info));
-   s3c_device_ts.dev.platform_data = s3c2410ts_info;
+   memcpy(s3cts_info, hard_s3cts_info, sizeof(struct s3c_ts_mach_info));
+   s3c_device_ts.dev.platform_data = s3cts_info;
 }
-EXPORT_SYMBOL(s3c24xx_ts_set_platdata);
+EXPORT_SYMBOL(s3c_ts_set_platdata);

 /* USB Device (Gadget)*/

diff --git a/arch/arm/plat-samsung/include/plat/ts.h
b/arch/arm/plat-samsung/include/plat/ts.h
index 8a51675..ed5a1d7 100644
--- a/arch/arm/plat-samsung/include/plat/ts.h
+++ b/arch/arm/plat-samsung/include/plat/ts.h
@@ -10,12 +10,12 @@
 #ifndef __ASM_ARM_TS_H
 #define __ASM_ARM_TS_H

-struct s3c2410_ts_mach_info {
+struct s3c_ts_mach_info {
int delay;
int presc;
int oversampling_shift;
 };

-extern void s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *);
+extern void s3c_ts_set_platdata(struct s3c_ts_mach_info *);

 #endif /* __ASM_ARM_TS_H */
diff --git a/drivers/input/touchscreen/s3c2410_ts.c
b/drivers/input/touchscreen/s3c2410_ts.c
index 0cd0ca6..3debbc2 100644
--- a/drivers/input/touchscreen/s3c2410_ts.c
+++ b/drivers/input/touchscreen/s3c2410_ts.c
@@ -247,7 +247,7 @@ static void s3c24xx_ts_select(struct
s3c_adc_client *client, unsigned select)
  */
 static int __devinit s3c2410ts_probe(struct platform_device *pdev)
 {
-   struct s3c2410_ts_mach_info *info;
+   struct s3c_ts_mach_info *info;
struct device *dev = pdev-dev;
struct input_dev *input_dev;
struct resource *res;
@@ -398,7 +398,7 @@ static int s3c2410ts_suspend(struct device *dev)
 static int s3c2410ts_resume(struct device *dev)
 {
struct platform_device *pdev = to_platform_device(dev);
-   struct s3c2410_ts_mach_info *info = pdev-dev.platform_data;
+   struct s3c_ts_mach_info *info = pdev-dev.platform_data;

clk_enable(ts.clock);

-- 
1.6.6.1
--
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[PATCH 4/4] ARM: S3C64XX: Add s3c64xx support to touchscreen driver

[Maurus Cuelenaere]

ARM: S3C64XX: Add s3c64xx support to touchscreen driver

This ack's the extra interrupt s3c64xx platforms have in the touchscreen driver.

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 drivers/input/touchscreen/Kconfig  |6 +++---
 drivers/input/touchscreen/s3c2410_ts.c |   28 
 2 files changed, 27 insertions(+), 7 deletions(-)

diff --git a/drivers/input/touchscreen/Kconfig
b/drivers/input/touchscreen/Kconfig
index dfafc76..0378b3d 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -146,11 +146,11 @@ config TOUCHSCREEN_FUJITSU
  module will be called fujitsu-ts.

 config TOUCHSCREEN_S3C2410
-   tristate Samsung S3C2410 touchscreen input driver
-   depends on ARCH_S3C2410
+   tristate Samsung S3C touchscreen input driver
+   depends on ARCH_S3C2410 || ARCH_S3C64XX
select S3C24XX_ADC
help
- Say Y here if you have the s3c2410 touchscreen.
+ Say Y here if you have the s3c touchscreen.

  If unsure, say N.

diff --git a/drivers/input/touchscreen/s3c2410_ts.c
b/drivers/input/touchscreen/s3c2410_ts.c
index 3debbc2..7dfbc38 100644
--- a/drivers/input/touchscreen/s3c2410_ts.c
+++ b/drivers/input/touchscreen/s3c2410_ts.c
@@ -40,7 +40,9 @@
 #include plat/regs-adc.h
 #include plat/ts.h

+#ifdef PLAT_S3C24XX
 #include mach/regs-gpio.h
+#endif

 #define TSC_SLEEP  (S3C2410_ADCTSC_PULL_UP_DISABLE | S3C2410_ADCTSC_XY_PST(0))

@@ -88,6 +90,12 @@ struct s3c2410ts {

 static struct s3c2410ts ts;

+enum s3c_cpu_type {
+   TYPE_S3C2410,
+   TYPE_S3C2440,
+   TYPE_S3C64XX,
+};
+
 /**
  * s3c2410_ts_connect - configure gpio for s3c2410 systems
  *
@@ -95,6 +103,7 @@ static struct s3c2410ts ts;
  * connected to the device (later systems such as the S3C2440 integrate
  * these into the device).
 */
+#ifdef PLAT_S3C24XX
 static inline void s3c2410_ts_connect(void)
 {
s3c2410_gpio_cfgpin(S3C2410_GPG(12), S3C2410_GPG12_XMON);
@@ -102,6 +111,7 @@ static inline void s3c2410_ts_connect(void)
s3c2410_gpio_cfgpin(S3C2410_GPG(14), S3C2410_GPG14_YMON);
s3c2410_gpio_cfgpin(S3C2410_GPG(15), S3C2410_GPG15_nYPON);
 }
+#endif

 /**
  * get_down - return the down state of the pen
@@ -169,6 +179,7 @@ static DEFINE_TIMER(touch_timer, touch_timer_fire, 0, 0);
  */
 static irqreturn_t stylus_irq(int irq, void *dev_id)
 {
+   struct platform_device *pdev = to_platform_device(ts.dev);
unsigned long data0;
unsigned long data1;
bool down;
@@ -187,6 +198,12 @@ static irqreturn_t stylus_irq(int irq, void *dev_id)
else
dev_info(ts.dev, %s: count=%d\n, __func__, ts.count);

+
+   if (platform_get_device_id(pdev)-driver_data == TYPE_S3C64XX) {
+   /* Clear pen down/up interrupt */
+   writel(0x0, ts.io + S3C64XX_ADCCLRINTPNDNUP);
+   }
+
return IRQ_HANDLED;
 }

@@ -295,9 +312,11 @@ static int __devinit s3c2410ts_probe(struct
platform_device *pdev)
goto err_clk;
}

+#ifdef PLAT_S3C24XX
/* Configure the touchscreen external FETs on the S3C2410 */
-   if (!platform_get_device_id(pdev)-driver_data)
+   if (platform_get_device_id(pdev)-driver_data == TYPE_S3C2410)
s3c2410_ts_connect();
+#endif

ts.client = s3c_adc_register(pdev, s3c24xx_ts_select,
 s3c24xx_ts_conversion, 1);
@@ -418,15 +437,16 @@ static struct dev_pm_ops s3c_ts_pmops = {
 #endif

 static struct platform_device_id s3cts_driver_ids[] = {
-   { s3c2410-ts, 0 },
-   { s3c2440-ts, 1 },
+   { s3c2410-ts, TYPE_S3C2410 },
+   { s3c2440-ts, TYPE_S3C2440 },
+   { s3c64xx-ts, TYPE_S3C64XX },
{ }
 };
 MODULE_DEVICE_TABLE(platform, s3cts_driver_ids);

 static struct platform_driver s3c_ts_driver = {
.driver = {
-   .name   = s3c24xx-ts,
+   .name   = s3c-ts,
.owner  = THIS_MODULE,
 #ifdef CONFIG_PM
.pm = s3c_ts_pmops,
-- 
1.6.6.1
--
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s3c-hsotg driver problem

[Maurus Cuelenaere]

Hi,

I'm trying to get the USB OTG port working on my device (S3C6410 board), 
but am running into problems.
This board doesn't have a 48Mhz clock, so I set the reference clock in 
the USB PLL to a 12Mhz external crystal (see patch).


Still, I'm having trouble getting it to work; I'm seeing these messages 
(see attachment for full log):


s3c-hsotg s3c-hsotg: s3c_hsotg_rx_data: FIFO 8 bytes on ep0 but no req 
(DxEPCTl=0x00028000)

hub 1-0:1.0: connect-debounce failed, port 2 disabled

This looks like the hardware is configured correctly, but the 
currently-in-use gadget isn't setting up an EP0 RX transfer?
I've tried Mass Storage, serial, Ethernet, ... gadgets and they all give 
the same errors.


Any hints/pointers would be welcome!

Thanks,
Maurus Cuelenaere
[0.00] Linux version 2.6.33-rc2-00332-g244c196-dirty 
(mcuelena...@wim2160) (gcc version 4.3.3 (GCC) ) #41 PREEMPT Sat Jan 16 
02:17:53 CET 2010
[0.00] CPU: ARMv6-compatible processor [410fb766] revision 6 (ARMv7), 
cr=00c5387f
[0.00] CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction 
cache
[0.00] Machine: SmartQ 7
[0.00] Memory policy: ECC disabled, Data cache writeback
[0.00] On node 0 totalpages: 32768
[0.00] free_area_init_node: node 0, pgdat c0483bac, node_mem_map 
c04fc000
[0.00]   Normal zone: 256 pages used for memmap
[0.00]   Normal zone: 0 pages reserved
[0.00]   Normal zone: 32512 pages, LIFO batch:7
[0.00] CPU S3C6410 (id 0x36410101)
[0.00] s3c6410_init_clocks: initialising clocks
[0.00] S3C24XX Clocks, Copyright 2004 Simtec Electronics
[0.00] s3c6400_setup_clocks: registering clocks
[0.00] s3c6400_setup_clocks: clkdiv0 = 01043310
[0.00] s3c6400_setup_clocks: xtal is 1200
[0.00] S3C64XX: PLL settings, A=66600, M=53200, E=9600
[0.00] S3C64XX: HCLK2=26600, HCLK=13300, PCLK=6650
[0.00] mout_apll: source is fout_apll (1), rate is 66600
[0.00] mout_epll: source is epll (1), rate is 9600
[0.00] mout_mpll: source is mpll (1), rate is 53200
[0.00] mmc_bus: source is mout_epll (0), rate is 3200
[0.00] mmc_bus: source is mout_epll (0), rate is 3200
[0.00] mmc_bus: source is mout_epll (0), rate is 3200
[0.00] usb-bus-host: source is mout_epll (1), rate is 4800
[0.00] s3c64xx_clk_doutmpll_get_rate: parent is 53200
[0.00] uclk1: source is dout_mpll (1), rate is 6650
[0.00] spi-bus: source is mout_epll (0), rate is 4800
[0.00] spi-bus: source is mout_epll (0), rate is 4800
[0.00] audio-bus: source is mout_epll (0), rate is 4800
[0.00] audio-bus: source is mout_epll (0), rate is 4800
[0.00] irda-bus: source is mout_epll (0), rate is 4800
[0.00] camera: source is hclk2 (0), rate is 26600
[0.00] Built 1 zonelists in Zone order, mobility grouping on.  Total 
pages: 32512
[0.00] Kernel command line: loglevel=6 rootwait 
console=ttySAC0,115200n8 ignore_loglevel root=/dev/mmcblk1p1
[0.00] debug: ignoring loglevel setting.
[0.00] PID hash table entries: 512 (order: -1, 2048 bytes)
[0.00] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
[0.00] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
[0.00] Memory: 128MB = 128MB total
[0.00] Memory: 124672KB available (4220K code, 704K data, 140K init, 0K 
highmem)
[0.00] SLUB: Genslabs=11, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, 
Nodes=1
[0.00] Hierarchical RCU implementation.
[0.00] NR_IRQS:246
[0.00] s3c64xx_init_irq: initialising interrupts
[0.00] VIC @f400: id 0x00041192, vendor 0x41
[0.00] VIC @f401: id 0x00041192, vendor 0x41
[0.00] timer tcon=, tcnt 1b0f0, tcfg 0201,0001, usec 
1719
[0.00] Console: colour dummy device 80x30
[0.00] console [ttySAC0] enabled
[0.01] Calibrating delay loop... 665.19 BogoMIPS (lpj=3325952)
[0.24] Mount-cache hash table entries: 512
[0.24] CPU: Testing write buffer coherency: ok
[0.25] regulator: core version 0.5
[0.25] NET: Registered protocol family 16
[0.37] s3c64xx_dma_init: Registering DMA channels
[0.37] s3c64xx_dma_init1: registering DMA 0 (c8808100)
[0.37] s3c64xx_dma_init1: registering DMA 1 (c8808120)
[0.38] s3c64xx_dma_init1: registering DMA 2 (c8808140)
[0.38] s3c64xx_dma_init1: registering DMA 3 (c8808160)
[0.39] s3c64xx_dma_init1: registering DMA 4 (c8808180)
[0.40] s3c64xx_dma_init1: registering DMA 5 (c88081a0)
[0.40] s3c64xx_dma_init1: registering DMA 6 (c88081c0)
[0.41] s3c64xx_dma_init1: registering DMA 7 (c88081e0)
[0.41] PL080: IRQ 73, at c8808000
[0.42] s3c64xx_dma_init1: registering

[PATCH] Add S3C64XX RTC platform driver

[Maurus Cuelenaere]

Add S3C64XX RTC platform driver

Signed-off-by: Maurus Cuelenaere mcuelena...@gmail.com
---
 arch/arm/mach-s3c6400/include/mach/map.h |1 +
 arch/arm/plat-s3c64xx/Makefile   |1 +
 arch/arm/plat-s3c64xx/dev-rtc.c  |   43 ++
 3 files changed, 45 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/plat-s3c64xx/dev-rtc.c

diff --git a/arch/arm/mach-s3c6400/include/mach/map.h
b/arch/arm/mach-s3c6400/include/mach/map.h
index 106ee13..793fb8b 100644
--- a/arch/arm/mach-s3c6400/include/mach/map.h
+++ b/arch/arm/mach-s3c6400/include/mach/map.h
@@ -42,6 +42,7 @@
 #define S3C64XX_PA_FB  (0x7710)
 #define S3C64XX_PA_USB_HSOTG   (0x7C00)
 #define S3C64XX_PA_WATCHDOG(0x7E004000)
+#define S3C64XX_PA_RTC (0x7E005000)
 #define S3C64XX_PA_SYSCON  (0x7E00F000)
 #define S3C64XX_PA_AC97(0x7F001000)
 #define S3C64XX_PA_IIS0(0x7F002000)
diff --git a/arch/arm/plat-s3c64xx/Makefile b/arch/arm/plat-s3c64xx/Makefile
index b85b435..e66dbd7 100644
--- a/arch/arm/plat-s3c64xx/Makefile
+++ b/arch/arm/plat-s3c64xx/Makefile
@@ -13,6 +13,7 @@ obj-  :=
 # Core files

 obj-y  += dev-uart.o
+obj-y  += dev-rtc.o
 obj-y  += cpu.o
 obj-y  += irq.o
 obj-y  += irq-eint.o
diff --git a/arch/arm/plat-s3c64xx/dev-rtc.c b/arch/arm/plat-s3c64xx/dev-rtc.c
new file mode 100644
index 000..b9e7a05
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/dev-rtc.c
@@ -0,0 +1,43 @@
+/* linux/arch/arm/plat-s3c64xx/dev-rtc.c
+ *
+ * Copyright 2009 by Maurus Cuelenaere mcuelena...@gmail.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/kernel.h
+#include linux/string.h
+#include linux/platform_device.h
+
+#include mach/irqs.h
+#include mach/map.h
+
+#include plat/devs.h
+
+static struct resource s3c_rtc_resource[] = {
+   [0] = {
+   .start = S3C64XX_PA_RTC,
+   .end   = S3C64XX_PA_RTC + 0xff,
+   .flags = IORESOURCE_MEM,
+   },
+   [1] = {
+   .start = IRQ_RTC_ALARM,
+   .end   = IRQ_RTC_ALARM,
+   .flags = IORESOURCE_IRQ,
+   },
+   [2] = {
+   .start = IRQ_RTC_TIC,
+   .end   = IRQ_RTC_TIC,
+   .flags = IORESOURCE_IRQ
+   }
+};
+
+struct platform_device s3c_device_rtc = {
+   .name = s3c64xx-rtc,
+   .id   = -1,
+   .num_resources= ARRAY_SIZE(s3c_rtc_resource),
+   .resource = s3c_rtc_resource,
+};
+EXPORT_SYMBOL(s3c_device_rtc);
-- 
1.6.6
--
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