Re: [linux-sunxi] [PATCH] rtc-sunxi: Allow to select RTC clock source

[Julian Calaby]

Hi Chen-Yu,

On Thu, Jul 28, 2016 at 1:22 PM, Chen-Yu Tsai  wrote:
> On Thu, Jul 28, 2016 at 11:20 AM, Julian Calaby  
> wrote:
>> Hi Onno,
>>
>> On Thu, Jul 28, 2016 at 12:58 AM, Onno Kortmann  wrote:
>>> This adds a sysfs 'clock_source' attribute which can be used to query
>>> and set the clock source of the RTC, either 'internal' or 'external'.
>>
>> Shouldn't this also be a devicetree attribute so we can set this for
>> boards we know have crystals?
>>
>> (Also, is there equivalent functionality for sun6i-rtc?)
>
> Yes there is. I'm more interested in whether boards without crystals
> exist.

Good point, maybe the attribute should indicate that there's no
crystal and have the default be to assume there is one.

Alternatively, is it possible to detect whether there's a crystal or not?

Thanks,

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Re: [linux-sunxi] [PATCH] rtc-sunxi: Allow to select RTC clock source

[Chen-Yu Tsai]

On Thu, Jul 28, 2016 at 11:20 AM, Julian Calaby  wrote:
> Hi Onno,
>
> On Thu, Jul 28, 2016 at 12:58 AM, Onno Kortmann  wrote:
>> This adds a sysfs 'clock_source' attribute which can be used to query
>> and set the clock source of the RTC, either 'internal' or 'external'.
>
> Shouldn't this also be a devicetree attribute so we can set this for
> boards we know have crystals?
>
> (Also, is there equivalent functionality for sun6i-rtc?)

Yes there is. I'm more interested in whether boards without crystals
exist.

ChenYu

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Re: [linux-sunxi] [PATCH] rtc-sunxi: Allow to select RTC clock source

[Julian Calaby]

Hi Onno,

On Thu, Jul 28, 2016 at 12:58 AM, Onno Kortmann  wrote:
> This adds a sysfs 'clock_source' attribute which can be used to query
> and set the clock source of the RTC, either 'internal' or 'external'.

Shouldn't this also be a devicetree attribute so we can set this for
boards we know have crystals?

(Also, is there equivalent functionality for sun6i-rtc?)

Thanks,

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[linux-sunxi] Linux 3.4 and mainline uboot stuck at starting kernel

[Eyad Majali]

HI all;
i'm using q8 A33 tablet , and recent u-boot (compiled for a23 , because a33 
defconfig produce timeout initializing dram)
u-boot boots ok on the lcd , it can run sunxi-next kernel which is 4.x , 
but doesn't run linux-3.4   from allwinner,
it is stuck at "Starting kernel" ,i need that kernel to run because it 
contains i2c driver while sunxi-next doesn't ,
steps i took to solve this but were unsuccessful :
-bootm_boot_mode is set to "sec"
-"Enable workarounds for booting old kernels" in U-Boot
-manually setting machid  in u-boot : setenv machid 0x1029  , 0x1029 
corresponds to "sunxi  MACH_SUNXI  SUNXI   4137"  in
arch/arm/tools/mach-types
-modified kernel source to use R_UART as LL_DEBUG (which is the only uart 
available in the Q8 board) , but no text output after starting kernel.

any help is appreciated , thanks in advance

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[linux-sunxi] Linux 3.4 and mainline uboot stuck at starting kernel

[Eyad Majali]

HI all;
i'm using q8 A33 tablet , and recent u-boot (compiled for a23 , because a33 
defconfig produce timeout initializing dram)
u-boot boots ok on the lcd , it can run sunxi-next kernel which is 4.x , 
but doesn't run linux-3.4   from allwinner,
it is stuck at "Starting kernel" ,i need that kernel to run because it 
contains i2c driver while sunxi-next doesn't ,
steps i took to solve this but were unsuccessful :
-*bootm_boot_mode* is set to "*sec"*
-*"Enable workarounds for booting old kernels"* in U-Boot
-manually setting machid  in u-boot : setenv machid 0x1029  , 0x1029 
corresponds to "sunxi  MACH_SUNXI  SUNXI   4137"  in
arch/arm/tools/mach-types

any help is appreciated , thanks in advance

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[linux-sunxi] Immediate requirement for Digital Analyst ..Northern VA Location..

[GuruBrahma Raju]

Hello
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2.Strong experience using the following software programs:
Fireworks, Photoshop, Dreamweaver, Visio, Microsoft Project and Captivate.

3.Working knowledge of online marketing tactics, industry
trends and user behavior including search, email and social networking
platforms.  Working knowledge of user experience and content management
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4.Ability to lead and contribute to process improvement
projects involving online applications and tasks.

5.Excellent written and oral communication skills.

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projects as the project lead.

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for inconvenience.*


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Universal Tech Consulting Inc
Email : r...@universal-tech.us
Contact : 248 579 5334
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[linux-sunxi] Re: [PATCH 4/9] clk: sunxi-ng: mux: Add support for mux tables

[Jean-Francois Moine]

On Wed, 27 Jul 2016 08:59:34 +0200
Maxime Ripard  wrote:

> On Tue, Jul 26, 2016 at 07:43:06PM +0200, Jean-Francois Moine wrote:
> > On Tue, 26 Jul 2016 15:04:26 +0800
> > Chen-Yu Tsai  wrote:
> > 
> > > Some clock muxes have holes, i.e. invalid or unconnected inputs,
> > > between parent mux values.
> > > 
> > > Add support for specifying a mux table to map clock parents to
> > > mux values.
> > 
> > Putting empty strings in the holes should work. No?
> > Ex:
> > 
> > static const char * const csi_mclk_parents[] =
> > { "pll-video0", "pll-video1", "", "", "", "osc24M" };
> 
> Not really. The clock would be declared as orphan, while it's really
> not.
> 
> Parenting functions would also not work as expected,
> clk_hw_get_parent_by_index being the obvious example, in that case
> returning the empty string for an invalid parent, while it should
> really return NULL.

I don't see why the clock should be orphan.
Then, when a parent is "", clk_hw_get_parent_by_index() returns NULL.

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[linux-sunxi] Re: [PATCH 4/9] clk: sunxi-ng: mux: Add support for mux tables

[Jean-Francois Moine]

On Wed, 27 Jul 2016 09:40:20 +0200
Maxime Ripard  wrote:

> > > Parenting functions would also not work as expected,
> > > clk_hw_get_parent_by_index being the obvious example, in that case
> > > returning the empty string for an invalid parent, while it should
> > > really return NULL.
> > 
> > I don't see why the clock should be orphan.
> > Then, when a parent is "", clk_hw_get_parent_by_index() returns NULL.
> 
> Why? It should return NULL when there's no parent, while you
> explicitly registered a parent.

"" is not an existing parent. It could be "none" / "dum" / "toto" / ...
with the same result: 'this index cannot be used in mux'.

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[linux-sunxi] [PATCH] rtc-sunxi: Allow to select RTC clock source

[Onno Kortmann]

This adds a sysfs 'clock_source' attribute which can be used to query
and set the clock source of the RTC, either 'internal' or 'external'.

Important note: Probing the pins of the 32kHz crystal with a scope will
not reliably tell you whether the (usually) more accurate external is
selected! On a 'Cubietech Cubietruck' board, the author saw a stable
32768Hz signal on the crystal, even though the internal oscillator was
selected and the clock wildly drifting.

Using adjtimex might help to figure out which oscillator is selected:

~# echo internal > /sys/devices/.../1c20d00.rtc/clock_source
~# adjtimex -n -c=3
  --- current ---   -- suggested --
cmos time system-cmos  error_ppm   tick  freqtick  freq
1469627826  31.224561
1469627835  31.85809863353.6  1 0
1469627844  32.49078263268.4  1 09367   2069425
~# echo external > /sys/devices/.../1c20d00.rtc/clock_source
~# adjtimex -n -c=3
  --- current ---   -- suggested --
cmos time system-cmos  error_ppm   tick  freqtick  freq
1469627851  32.883407
1469627861  32.883380   -2.7  1 0
1469627871  32.883352   -2.8  1 0   1185937

Signed-off-by: Onno Kortmann 
---
 drivers/rtc/rtc-sunxi.c | 54 +
 1 file changed, 54 insertions(+)

diff --git a/drivers/rtc/rtc-sunxi.c b/drivers/rtc/rtc-sunxi.c
index abada60..3fcf571 100644
--- a/drivers/rtc/rtc-sunxi.c
+++ b/drivers/rtc/rtc-sunxi.c
@@ -36,6 +36,8 @@
 #define SUNXI_LOSC_CTRL0x
 #define SUNXI_LOSC_CTRL_RTC_HMS_ACCBIT(8)
 #define SUNXI_LOSC_CTRL_RTC_YMD_ACCBIT(7)
+#define SUNXI_LOSC_OSC32K_SRC_SEL  BIT(0)
+#define SUNXI_LOSC_KEY_VALUE   0x16aa
 
 #define SUNXI_RTC_YMD  0x0004
 
@@ -432,6 +434,50 @@ static const struct of_device_id sunxi_rtc_dt_ids[] = {
 };
 MODULE_DEVICE_TABLE(of, sunxi_rtc_dt_ids);
 
+/* As per page 126 of the A20 manual, the lowest bit in LOSC_CTRL_REG controls
+ * the 32.768KHz clock source to use for the RTC. Using the clock_source sysfs
+ * attribute, the clock can be selected between external (accurate 32kHz
+ * crystal) and internal (seems to be an inaccurate RC oscillator) mode.  It
+ * appears that this bit is non-volatile and will be kept in the RTC when the
+ * system is powered off.
+ */
+static ssize_t sunxi_rtc_show_clock_source(struct device *dev,
+   struct device_attribute *attr,
+   char *buf)
+{
+   struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
+   u32 val = readl(chip->base + SUNXI_LOSC_CTRL);
+   if (val & SUNXI_LOSC_OSC32K_SRC_SEL)
+   return sprintf(buf, "external\n");
+   else
+   return sprintf(buf, "internal\n");
+}
+
+static ssize_t sunxi_rtc_store_clock_source(struct device *dev,
+   struct device_attribute *attr,
+   const char *buf, size_t count) {
+   struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
+   u32 val = readl(chip->base + SUNXI_LOSC_CTRL);
+
+   if (strncmp(buf, "external", 8) == 0)
+   val|=SUNXI_LOSC_OSC32K_SRC_SEL;
+   else if (strncmp(buf, "internal", 8) == 0)
+   val&=~SUNXI_LOSC_OSC32K_SRC_SEL;
+   else
+   return -EINVAL;
+
+/* Writing this bit requires setting the upper 16 bit to 0x16aa (key
+* value). */
+   val |= SUNXI_LOSC_KEY_VALUE;
+
+   writel(val, chip->base + SUNXI_LOSC_CTRL);
+   return count;
+}
+
+static DEVICE_ATTR(clock_source, S_IRUGO | S_IWUSR,
+   sunxi_rtc_show_clock_source,
+   sunxi_rtc_store_clock_source);
+
 static int sunxi_rtc_probe(struct platform_device *pdev)
 {
struct sunxi_rtc_dev *chip;
@@ -490,6 +536,13 @@ static int sunxi_rtc_probe(struct platform_device *pdev)
 
dev_info(>dev, "RTC enabled\n");
 
+   ret = device_create_file(>dev, _attr_clock_source);
+   if (ret) {
+   dev_err(>dev, "Unable to create sysfs entry: %s\n",
+   dev_attr_clock_source.attr.name);
+   return ret;
+   }
+
return 0;
 }
 
@@ -499,6 +552,7 @@ static int sunxi_rtc_remove(struct platform_device *pdev)
 
rtc_device_unregister(chip->rtc);
 
+   device_remove_file(>dev, _attr_clock_source);
return 0;
 }
 
-- 
2.2.0.34.gb8f29bf

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[linux-sunxi] Re: [PATCH 5/9] clk: sunxi-ng: mux: support fixed pre-dividers on multiple parents

[Jean-Francois Moine]

On Tue, 26 Jul 2016 15:04:27 +0800
Chen-Yu Tsai  wrote:

> Some clocks on the A31 have fixed pre-dividers on multiple parents.
> Add support for them.

This could be done by intermediate clocks.

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[linux-sunxi] Re: [PATCH 4/9] clk: sunxi-ng: mux: Add support for mux tables

[Jean-Francois Moine]

On Tue, 26 Jul 2016 15:04:26 +0800
Chen-Yu Tsai  wrote:

> Some clock muxes have holes, i.e. invalid or unconnected inputs,
> between parent mux values.
> 
> Add support for specifying a mux table to map clock parents to
> mux values.

Putting empty strings in the holes should work. No?
Ex:

static const char * const csi_mclk_parents[] =
{ "pll-video0", "pll-video1", "", "", "", "osc24M" };

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[linux-sunxi] Re: [PATCH 8/9] clk: sunxi-ng: Add A31/A31s clocks

[Rob Herring]

On Tue, Jul 26, 2016 at 03:04:30PM +0800, Chen-Yu Tsai wrote:
> Add a new style driver for the clock control unit in Allwinner A31/A31s.
> 
> A few clocks are still missing:
> 
> - EMAC clock
> 
> Signed-off-by: Chen-Yu Tsai 
> ---
>  .../devicetree/bindings/clock/sunxi-ccu.txt|3 +-

Acked-by: Rob Herring 

>  drivers/clk/sunxi-ng/Kconfig   |   10 +
>  drivers/clk/sunxi-ng/Makefile  |1 +
>  drivers/clk/sunxi-ng/ccu-sun6i-a31.c   | 1230 
> 
>  drivers/clk/sunxi-ng/ccu-sun6i-a31.h   |   72 ++
>  include/dt-bindings/clock/sun6i-a31-ccu.h  |  187 +++
>  include/dt-bindings/reset/sun6i-a31-ccu.h  |  106 ++
>  7 files changed, 1608 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/clk/sunxi-ng/ccu-sun6i-a31.c
>  create mode 100644 drivers/clk/sunxi-ng/ccu-sun6i-a31.h
>  create mode 100644 include/dt-bindings/clock/sun6i-a31-ccu.h
>  create mode 100644 include/dt-bindings/reset/sun6i-a31-ccu.h

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Re: [linux-sunxi] Re: Kernel 4.4.15 cut usb otg power on A13 (q8 compatible) tablet.

[Maxime Ripard]

On Wed, Jul 27, 2016 at 06:12:04AM -0700, Silvio Pellicano wrote:
> 
> Sorry , i read now that otg is not well supported, remove otg support from 
> kernel

Where did you read that? It works just fine on most boards, including
A13 ones.

However, what kind of cable did you use? The cheap micro-to-USB-A
cables usually don't behave as they should and do not set the ID-pin
that is used to identify whether it should run as host or peripheral.

> Thank for read may be useful to add a notice in sunxi-wiki 

Please don't.

Maxime

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signature.asc
Description: PGP signature

[linux-sunxi] Re: Kernel 4.4.15 cut usb otg power on A13 (q8 compatible) tablet.

[Silvio Pellicano]

Sorry , i read now that otg is not well supported, remove otg support from 
kernel 
and commented out.
/*usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
allwinner,pins = "PG1";
allwinner,function = "gpio_in";
allwinner,drive = ;
allwinner,pull = ;
};

usb0_id_detect_pin: usb0_id_detect_pin@0 {
allwinner,pins = "PG2";
allwinner,function = "gpio_in";
allwinner,drive = ;
allwinner,pull = ;
};
usb0_vbus_pin_a: usb0_vbus_pin@0 {
allwinner,pins = "PG12";
allwinner,function = "gpio_out";
allwinner,drive = ;
allwinner,pull = ;
};
*/

/*pinctrl-0 = <_id_detect_pin>, <_vbus_detect_pin>;
usb0_id_det-gpio = < 6 2 GPIO_ACTIVE_HIGH>; /* PG2 
usb0_vbus_det-gpio = < 6 1 GPIO_ACTIVE_HIGH>;/* PG1 */

_otg {
dr_mode = "host";
status = "okay";
};

and force phy to host only  seems work!

Thank for read may be useful to add a notice in sunxi-wiki 

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[linux-sunxi] Re: [PATCH v4] ARM: dts: sun8i: Add dts file for Olimex A33-OLinuXino

[stefan . mavrodiev]

On Wednesday, July 27, 2016 8:21:46 AM EEST Maxime Ripard wrote:
> On Wed, Jul 27, 2016 at 08:12:29AM +0300, stefan.mavrod...@gmail.com wrote:
> > > > +_dcdc1 {
> > > > +   regulator-always-on;
> > > > +   regulator-min-microvolt = <330>;
> > > > +   regulator-max-microvolt = <330>;
> > > > +   regulator-name = "vcc-dsi";
> > > > +};
> > > 
> > > What is it used for? Is it really necessary to keep it on at all time?
> > 
> > I think so.
> > This is the supply for the MMC.
> 
> Then it's poorly named, and you should tie it to the MMC, and remove
> the always-on if it's only used by the mmc. always-on is supposed to
> be for regulators that shouldn't but turned off for the system to stay
> running. Some MMC regulator doesn't fit that description.
> 
It's named upon the A33 power pin - "VCC-DSI". 
If I remove "always-on" the board still will work, since dcdc1 is tied to 
mmc0. 
vmmc-supply = <_dcdc1>;

We assume this voltage will be always present and there are some pullups that 
are tied to it (on i2c0 and i2c1 bus).  In this case should I remove "always-
on" from the regulator node?

> Maxime

Best regards,
Stefan Mavrodiev


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[linux-sunxi] Re: [PATCH 7/9] clk: sunxi-ng: mux: Add clk notifier functions

[Maxime Ripard]

On Wed, Jul 27, 2016 at 03:32:58PM +0800, Chen-Yu Tsai wrote:
> On Wed, Jul 27, 2016 at 3:30 PM, Maxime Ripard
>  wrote:
> > On Tue, Jul 26, 2016 at 03:04:29PM +0800, Chen-Yu Tsai wrote:
> >> On sunxi we support cpufreq by changing the clock rate of PLL-CPU.
> >> It's possible the clock output of the PLL goes out of the CPU's
> >> operational limits when the PLL's multipliers / dividers are changed
> >> and it hasn't stabilized yet. This would result in the CPU hanging.
> >>
> >> To circumvent this, we temporarily switch the CPU mux clock to another
> >> stable clock before the rate change, and switch it back after the PLL
> >> stabilizes. This is done with clk notifiers registered on the PLL.
> >>
> >> This patch adds common functions for notifiers to reparent mux clocks.
> >>
> >> Signed-off-by: Chen-Yu Tsai 
> >> ---
> >>  drivers/clk/sunxi-ng/ccu_mux.c | 36 
> >>  drivers/clk/sunxi-ng/ccu_mux.h | 14 ++
> >>  2 files changed, 50 insertions(+)
> >>
> >> diff --git a/drivers/clk/sunxi-ng/ccu_mux.c 
> >> b/drivers/clk/sunxi-ng/ccu_mux.c
> >> index f96eabb5d1f3..8a6e9065cb85 100644
> >> --- a/drivers/clk/sunxi-ng/ccu_mux.c
> >> +++ b/drivers/clk/sunxi-ng/ccu_mux.c
> >> @@ -8,7 +8,9 @@
> >>   * the License, or (at your option) any later version.
> >>   */
> >>
> >> +#include 
> >>  #include 
> >> +#include 
> >>
> >>  #include "ccu_gate.h"
> >>  #include "ccu_mux.h"
> >> @@ -199,3 +201,37 @@ const struct clk_ops ccu_mux_ops = {
> >>   .determine_rate = __clk_mux_determine_rate,
> >>   .recalc_rate= ccu_mux_recalc_rate,
> >>  };
> >> +
> >> +/*
> >> + * This clock notifier is called when the frequency of the of the parent
> >> + * PLL clock is to be changed. The idea is to switch the parent to a
> >> + * stable clock, such as the main oscillator, while the PLL frequency
> >> + * stabilizes.
> >> + */
> >> +static int ccu_mux_notifier_cb(struct notifier_block *nb,
> >> +unsigned long event, void *data)
> >> +{
> >> + struct ccu_mux_nb *mux = to_ccu_mux_nb(nb);
> >> + int ret = 0;
> >> +
> >> + if (event == PRE_RATE_CHANGE) {
> >> + mux->original_index = ccu_mux_helper_get_parent(mux->common,
> >> + mux->cm);
> >> + ret = ccu_mux_helper_set_parent(mux->common, mux->cm,
> >> + mux->bypass_index);
> >> + } else if (event == POST_RATE_CHANGE) {
> >> + ret = ccu_mux_helper_set_parent(mux->common, mux->cm,
> >> + mux->original_index);
> >> + }
> >> +
> >> + udelay(mux->delay_us);
> >
> > Are you sure we need that delay?
> >
> > set_rate will end and notify you once the PLL rate is stable, so it
> > looks redundant.
> 
> The delay requirement is on the cpu mux clk, not the PLL. The
> datasheet says you should wait for up to 8 clock cycles after
> changing the parent. Not sure how this factors with the CPU
> actually doing the waiting though.
> 
> So this is separate from the PLL lock delay.

Ok, thanks :)

Maxime

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[linux-sunxi] Re: [PATCH 4/9] clk: sunxi-ng: mux: Add support for mux tables

[Maxime Ripard]

On Wed, Jul 27, 2016 at 09:18:27AM +0200, Jean-Francois Moine wrote:
> On Wed, 27 Jul 2016 08:59:34 +0200
> Maxime Ripard  wrote:
> 
> > On Tue, Jul 26, 2016 at 07:43:06PM +0200, Jean-Francois Moine wrote:
> > > On Tue, 26 Jul 2016 15:04:26 +0800
> > > Chen-Yu Tsai  wrote:
> > > 
> > > > Some clock muxes have holes, i.e. invalid or unconnected inputs,
> > > > between parent mux values.
> > > > 
> > > > Add support for specifying a mux table to map clock parents to
> > > > mux values.
> > > 
> > > Putting empty strings in the holes should work. No?
> > > Ex:
> > > 
> > > static const char * const csi_mclk_parents[] =
> > >   { "pll-video0", "pll-video1", "", "", "", "osc24M" };
> > 
> > Not really. The clock would be declared as orphan, while it's really
> > not.
> > 
> > Parenting functions would also not work as expected,
> > clk_hw_get_parent_by_index being the obvious example, in that case
> > returning the empty string for an invalid parent, while it should
> > really return NULL.
> 
> I don't see why the clock should be orphan.
> Then, when a parent is "", clk_hw_get_parent_by_index() returns NULL.

Why? It should return NULL when there's no parent, while you
explicitly registered a parent.

Maxime

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[linux-sunxi] Re: [PATCH 7/9] clk: sunxi-ng: mux: Add clk notifier functions

[Maxime Ripard]

On Tue, Jul 26, 2016 at 03:04:29PM +0800, Chen-Yu Tsai wrote:
> On sunxi we support cpufreq by changing the clock rate of PLL-CPU.
> It's possible the clock output of the PLL goes out of the CPU's
> operational limits when the PLL's multipliers / dividers are changed
> and it hasn't stabilized yet. This would result in the CPU hanging.
> 
> To circumvent this, we temporarily switch the CPU mux clock to another
> stable clock before the rate change, and switch it back after the PLL
> stabilizes. This is done with clk notifiers registered on the PLL.
> 
> This patch adds common functions for notifiers to reparent mux clocks.
> 
> Signed-off-by: Chen-Yu Tsai 
> ---
>  drivers/clk/sunxi-ng/ccu_mux.c | 36 
>  drivers/clk/sunxi-ng/ccu_mux.h | 14 ++
>  2 files changed, 50 insertions(+)
> 
> diff --git a/drivers/clk/sunxi-ng/ccu_mux.c b/drivers/clk/sunxi-ng/ccu_mux.c
> index f96eabb5d1f3..8a6e9065cb85 100644
> --- a/drivers/clk/sunxi-ng/ccu_mux.c
> +++ b/drivers/clk/sunxi-ng/ccu_mux.c
> @@ -8,7 +8,9 @@
>   * the License, or (at your option) any later version.
>   */
>  
> +#include 
>  #include 
> +#include 
>  
>  #include "ccu_gate.h"
>  #include "ccu_mux.h"
> @@ -199,3 +201,37 @@ const struct clk_ops ccu_mux_ops = {
>   .determine_rate = __clk_mux_determine_rate,
>   .recalc_rate= ccu_mux_recalc_rate,
>  };
> +
> +/*
> + * This clock notifier is called when the frequency of the of the parent
> + * PLL clock is to be changed. The idea is to switch the parent to a
> + * stable clock, such as the main oscillator, while the PLL frequency
> + * stabilizes.
> + */
> +static int ccu_mux_notifier_cb(struct notifier_block *nb,
> +unsigned long event, void *data)
> +{
> + struct ccu_mux_nb *mux = to_ccu_mux_nb(nb);
> + int ret = 0;
> +
> + if (event == PRE_RATE_CHANGE) {
> + mux->original_index = ccu_mux_helper_get_parent(mux->common,
> + mux->cm);
> + ret = ccu_mux_helper_set_parent(mux->common, mux->cm,
> + mux->bypass_index);
> + } else if (event == POST_RATE_CHANGE) {
> + ret = ccu_mux_helper_set_parent(mux->common, mux->cm,
> + mux->original_index);
> + }
> +
> + udelay(mux->delay_us);

Are you sure we need that delay?

set_rate will end and notify you once the PLL rate is stable, so it
looks redundant.

Maxime

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[linux-sunxi] Re: [PATCH 6/9] clk: sunxi-ng: nkm: Add mux to support multiple parents

[Maxime Ripard]

On Tue, Jul 26, 2016 at 03:04:28PM +0800, Chen-Yu Tsai wrote:
> The MIPI mode of the MIPI-PLL on A31 is an NKM-style PLL with 2
> selectable parents.
> 
> Add mux support to the NKM clock.
> 
> Signed-off-by: Chen-Yu Tsai 

Applied, thanks

Maxime

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[linux-sunxi] Re: [PATCH 5/9] clk: sunxi-ng: mux: support fixed pre-dividers on multiple parents

[Maxime Ripard]

Hi,

On Tue, Jul 26, 2016 at 03:04:27PM +0800, Chen-Yu Tsai wrote:
> Some clocks on the A31 have fixed pre-dividers on multiple parents.
> Add support for them.
> 
> Signed-off-by: Chen-Yu Tsai 
> ---
>  drivers/clk/sunxi-ng/ccu-sun8i-h3.c |  9 +
>  drivers/clk/sunxi-ng/ccu_mux.c  |  6 --
>  drivers/clk/sunxi-ng/ccu_mux.h  | 10 ++
>  3 files changed, 15 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c 
> b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
> index 9af359544110..5f5c900c235b 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
> +++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
> @@ -184,15 +184,16 @@ static SUNXI_CCU_MP_WITH_MUX(apb2_clk, "apb2", 
> apb2_parents, 0x058,
>0);
>  
>  static const char * const ahb2_parents[] = { "ahb1" , "pll-periph0" };
> +static const struct ccu_mux_fixed_prediv ahb2_fixed_predivs[] = {
> + { .index = 1, .div = 2},
> + { },
> +};
>  static struct ccu_mux ahb2_clk = {
>   .mux= {
>   .shift  = 0,
>   .width  = 1,
>  
> - .fixed_prediv   = {
> - .index  = 1,
> - .div= 2,
> - },
> + .fixed_predivs  = ahb2_fixed_predivs,

I think I'd prefer to have the number of dividers too, instead of
iterating until we find a 0 one. It's easier to iterate over it, the
errors are easier to catch and it's consistent with the other arrays
we give, for example for the parents.

Maxime

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[linux-sunxi] Re: [PATCH 4/9] clk: sunxi-ng: mux: Add support for mux tables

[Maxime Ripard]

On Tue, Jul 26, 2016 at 07:43:06PM +0200, Jean-Francois Moine wrote:
> On Tue, 26 Jul 2016 15:04:26 +0800
> Chen-Yu Tsai  wrote:
> 
> > Some clock muxes have holes, i.e. invalid or unconnected inputs,
> > between parent mux values.
> > 
> > Add support for specifying a mux table to map clock parents to
> > mux values.
> 
> Putting empty strings in the holes should work. No?
> Ex:
> 
> static const char * const csi_mclk_parents[] =
>   { "pll-video0", "pll-video1", "", "", "", "osc24M" };

Not really. The clock would be declared as orphan, while it's really
not.

Parenting functions would also not work as expected,
clk_hw_get_parent_by_index being the obvious example, in that case
returning the empty string for an invalid parent, while it should
really return NULL.

Maxime

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[linux-sunxi] Re: [PATCH 4/9] clk: sunxi-ng: mux: Add support for mux tables

[Maxime Ripard]

On Tue, Jul 26, 2016 at 03:04:26PM +0800, Chen-Yu Tsai wrote:
> Some clock muxes have holes, i.e. invalid or unconnected inputs,
> between parent mux values.
> 
> Add support for specifying a mux table to map clock parents to
> mux values.
> 
> Signed-off-by: Chen-Yu Tsai 
> ---
>  drivers/clk/sunxi-ng/ccu_mux.c | 12 
>  drivers/clk/sunxi-ng/ccu_mux.h | 12 ++--
>  2 files changed, 22 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/sunxi-ng/ccu_mux.c b/drivers/clk/sunxi-ng/ccu_mux.c
> index 1329b9ab481e..68b32f168a74 100644
> --- a/drivers/clk/sunxi-ng/ccu_mux.c
> +++ b/drivers/clk/sunxi-ng/ccu_mux.c
> @@ -107,6 +107,15 @@ u8 ccu_mux_helper_get_parent(struct ccu_common *common,
>   parent = reg >> cm->shift;
>   parent &= (1 << cm->width) - 1;
>  
> + if (cm->table) {
> + int num_parents = clk_hw_get_num_parents(>hw);
> + int i;
> +
> + for (i = 0; i < num_parents; i++)
> + if (cm->table[i] == parent)
> + return i;
> + }
> +
>   return parent;
>  }
>  
> @@ -117,6 +126,9 @@ int ccu_mux_helper_set_parent(struct ccu_common *common,
>   unsigned long flags;
>   u32 reg;
>  
> + if (cm->table)
> + index = cm->table[index];
> +
>   spin_lock_irqsave(common->lock, flags);
>  
>   reg = readl(common->base + common->reg);
> diff --git a/drivers/clk/sunxi-ng/ccu_mux.h b/drivers/clk/sunxi-ng/ccu_mux.h
> index d35ce5e93840..f0078de78712 100644
> --- a/drivers/clk/sunxi-ng/ccu_mux.h
> +++ b/drivers/clk/sunxi-ng/ccu_mux.h
> @@ -6,8 +6,9 @@
>  #include "ccu_common.h"
>  
>  struct ccu_mux_internal {
> - u8  shift;
> - u8  width;
> + u8  shift;
> + u8  width;
> + const u8*table;
>  
>   struct {
>   u8  index;
> @@ -21,6 +22,13 @@ struct ccu_mux_internal {
>   } variable_prediv;
>  };
>  
> +#define SUNXI_CLK_MUX_TABLE(_shift, _width, _table)  \
> + {   \
> + .shift  = _shift,   \
> + .width  = _width,   \
> + .table  = _table,   \
> + }
> +

I basically had the exact same patch done a few days ago :)

This is in my A64 serie, together with some cleanup on that macro that
is not consistent with the other internal structures.

Maxime

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[linux-sunxi] Re: [PATCH 3/9] clk: sunxi-ng: mux: Increase fixed pre-divider div size

[Maxime Ripard]

On Tue, Jul 26, 2016 at 03:04:25PM +0800, Chen-Yu Tsai wrote:
> Some clocks have a predivider value that is larger than what u8 can
> store. One such example is the OUT clk found on A20/A31, which has
> a /750 pre-divider on one of the osc24M parents.
> 
> Increase the size of the div field to u16.
> 
> Signed-off-by: Chen-Yu Tsai 

Applied, thanks!
Maxime

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[linux-sunxi] Re: [PATCH v4] ARM: dts: sun8i: Add dts file for Olimex A33-OLinuXino

[Maxime Ripard]

On Wed, Jul 27, 2016 at 08:12:29AM +0300, stefan.mavrod...@gmail.com wrote:
> > > +_dcdc1 {
> > > + regulator-always-on;
> > > + regulator-min-microvolt = <330>;
> > > + regulator-max-microvolt = <330>;
> > > + regulator-name = "vcc-dsi";
> > > +};
> > 
> > What is it used for? Is it really necessary to keep it on at all time?
> 
> I think so.
> This is the supply for the MMC.

Then it's poorly named, and you should tie it to the MMC, and remove
the always-on if it's only used by the mmc. always-on is supposed to
be for regulators that shouldn't but turned off for the system to stay
running. Some MMC regulator doesn't fit that description.

Maxime

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