[linux-sunxi] [PATCH] spi: sun4i: update max transfer size reported

[Jonathan Liu]

The spi-sun4i driver already has the ability to do large transfers.
However, the max transfer size reported is still fifo depth - 1.

Update the max transfer size reported to the max value possible.

Fixes: 196737912da5 ("spi: sun4i: Allow transfers larger than FIFO size")
Signed-off-by: Jonathan Liu 
---
 drivers/spi/spi-sun4i.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c
index cbfac6596fad..1fdfc6e6691d 100644
--- a/drivers/spi/spi-sun4i.c
+++ b/drivers/spi/spi-sun4i.c
@@ -198,7 +198,7 @@ static void sun4i_spi_set_cs(struct spi_device *spi, bool 
enable)
 
 static size_t sun4i_spi_max_transfer_size(struct spi_device *spi)
 {
-   return SUN4I_FIFO_DEPTH - 1;
+   return SUN4I_MAX_XFER_SIZE - 1;
 }
 
 static int sun4i_spi_transfer_one(struct spi_master *master,
-- 
2.27.0

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Re: [linux-sunxi] [PATCH] ARM: HYP/non-sec: Don't enable ARMV7_LPAE for old sunxi kernels

[Jonathan Liu]

Hi Jagan,

On Fri., 22 Mar. 2019 at 4:05 am, Jagan Teki 
wrote:

> On Tue, Mar 19, 2019 at 11:09 AM Jonathan Liu  wrote:
> >
> > Old sunxi kernels fail to boot with ARMV7_LPAE enabled.
>
> Any idea why? I don't have relevant stuff with to test this.
>
I don't know why. It failed to boot linux-sunxi 3.4.104 kernel on A20
OLinuXino-MICRO after updating from 2018.07 to 2018.09-rc1 and would hang
at "Starting kernel...".

I bisected the issue to:
https://git.denx.de/?p=u-boot.git;a=commit;h=d32e86bde8a31a49cf4a9b233ad91ecdfc96ba2a

No problems booting mainline kernel.

Thanks.

Regards,
Jonathan

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[linux-sunxi] [PATCH] ARM: HYP/non-sec: Don't enable ARMV7_LPAE for old sunxi kernels

[Jonathan Liu]

Old sunxi kernels fail to boot with ARMV7_LPAE enabled.

Signed-off-by: Jonathan Liu 
---
 arch/arm/cpu/armv7/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig
index 73d57a2aae..cdb7e402b4 100644
--- a/arch/arm/cpu/armv7/Kconfig
+++ b/arch/arm/cpu/armv7/Kconfig
@@ -53,7 +53,7 @@ config ARMV7_PSCI_NR_CPUS
 config ARMV7_LPAE
bool "Use LPAE page table format" if EXPERT
depends on CPU_V7A
-   default y if ARMV7_VIRT
+   default y if ARMV7_VIRT && !OLD_SUNXI_KERNEL_COMPAT
---help---
Say Y here to use the long descriptor page table format. This is
required if U-Boot runs in HYP mode.
-- 
2.21.0

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[linux-sunxi] [PATCH] ARM: HYP/non-sec: Don't enable ARMV7_LPAE for old sunxi kernels

[Jonathan Liu]

Old sunxi kernels fail to boot with ARMV7_LPAE enabled.

Signed-off-by: Jonathan Liu 
---
 arch/arm/cpu/armv7/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig
index 73d57a2aae..cdb7e402b4 100644
--- a/arch/arm/cpu/armv7/Kconfig
+++ b/arch/arm/cpu/armv7/Kconfig
@@ -53,7 +53,7 @@ config ARMV7_PSCI_NR_CPUS
 config ARMV7_LPAE
bool "Use LPAE page table format" if EXPERT
depends on CPU_V7A
-   default y if ARMV7_VIRT
+   default y if ARMV7_VIRT && !OLD_SUNXI_KERNEL_COMPAT
---help---
Say Y here to use the long descriptor page table format. This is
required if U-Boot runs in HYP mode.
-- 
2.21.0

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Re: [linux-sunxi] Intermittent U-boot hang on A20 devices after reboot

[Jonathan Liu]

Hi Priit,

On Mon, 19 Nov 2018 at 19:08, Priit Laes  wrote:
>
> On Sun, Nov 18, 2018 at 06:12:34PM +, Priit Laes wrote:
> > On Sat, Nov 17, 2018 at 05:19:38PM +0100, Paul Kocialkowski wrote:
> > > Hi,
> > >
> > > On Fri, 2018-11-16 at 15:07 +, Priit Laes wrote:
> > > > On Fri, Nov 16, 2018 at 03:46:14PM +0100, Jens Thiele wrote:
> > > > > Priit Laes  writes:
> > > > >
> > > > > > Heya!
> > > > > >
> > > > > > I've been running into intermittent u-boot hangs
> > > > > > (latest u-boot and kernel mainline versions) on various
> > > > > > Olimex A20 Lime2 boards. These hangs seem to happen always
> > > > > > in the same spot after rebooting mainline kernel:
> > > > > >
> > > > > > [snip]
> > > > > > U-Boot SPL 2018.11-rc2-00064-gada6bb81d9-dirty (Nov 16 2018 - 
> > > > > > 15:48:29 +0200)
> > > > > > DR
> > > > > > [/snip]
> > > > > >
> > > > > > Any ideas what to test?
> > > > >
> > > > > is your power supply unit strong enough? (especially if you have LCD
> > > > > displays attached)
> > > >
> > > > Should be, 2A 5V brick via barrel connector.
> > > >
> > > > Other things connected:
> > > > - serial (uart)
> > > > - ethernet cable
> > > > - hdmi cable
> > > > - otg cable
> > >
> > > I have been experiencing the same issue on an A20-OLinuXino-Lime2 (non-
> > > eMMC). It seems to happen when rebooting from the kernel, but not with
> > > the "reset" command in U-Boot.
> >
> > Yes, confirming that reset command from u-boot works.

>
> OK, I managed to track it down to enabling ALDO3 regulator.
> Unfortunately adding delays did not help, and only thing
> that seems to be working is to disable regulator in the
> configuration (CONFIG_AXP_ALDO3_VOLT ):
>

Probably related to this old thread -
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html

> [snip]
> diff --git a/board/sunxi/board.c b/board/sunxi/board.c
> index d1d7f9f400..70d8e7a0f7 100644
> --- a/board/sunxi/board.c
> +++ b/board/sunxi/board.c
> @@ -552,14 +552,22 @@ void sunxi_board_init(void)
> defined CONFIG_AXP818_POWER
> power_failed |= axp_set_aldo1(CONFIG_AXP_ALDO1_VOLT);
>  #endif
> +puts("aldo2\n");
> +udelay(10);
> power_failed |= axp_set_aldo2(CONFIG_AXP_ALDO2_VOLT);
>  #if !defined(CONFIG_AXP152_POWER)
> +puts("aldo3\n");
> +udelay(10);
> power_failed |= axp_set_aldo3(CONFIG_AXP_ALDO3_VOLT);
>  #endif
>  #ifdef CONFIG_AXP209_POWER
> +puts("aldo4\n");
> +udelay(10);
> power_failed |= axp_set_aldo4(CONFIG_AXP_ALDO4_VOLT);
>  #endif
>
> +puts("OK?\n");
> +
>  #if defined(CONFIG_AXP221_POWER) || defined(CONFIG_AXP809_POWER) || \
> defined(CONFIG_AXP818_POWER)
> power_failed |= axp_set_dldo(1, CONFIG_AXP_DLDO1_VOLT);
> [/snip]
>
> > >
> > > Cheers,
> > >
> > > Paul
> > >
> > > --
> > > Developer of free digital technology and hardware support.
> > >
> > > Website: https://www.paulk.fr/
> > > Coding blog: https://code.paulk.fr/
> > > Git repositories: https://git.paulk.fr/ https://git.code.paulk.fr/
> > >
> > > --
> > > You received this message because you are subscribed to the Google Groups 
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> >
> >
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Regards,
Jonathan

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Re: [linux-sunxi] [PATCH 5/5] sunxi: doc: Add basic fastboot example

[Jonathan Liu]

Hi Priit,

On Wed, 24 Oct 2018 at 04:21, Priit Laes  wrote:
>
> From: Priit Laes 
>
> Signed-off-by: Priit Laes 
> ---
>  board/sunxi/README.fastboot | 98 ++-
>  1 file changed, 98 insertions(+)
>  create mode 100644 board/sunxi/README.fastboot
>
> diff --git a/board/sunxi/README.fastboot b/board/sunxi/README.fastboot
> new file mode 100644
> index 000..470fa6f
> --- /dev/null
> +++ b/board/sunxi/README.fastboot
> @@ -0,0 +1,98 @@
> +Using fastboot on sunxi devices
> +===
> +

> +Fastboot is a diagnostic protocol, primarily used to modify the
> +filesystems on the flash device via USB or UDP. It requires that
> +the device is started in a boot loader or Seconday Boot Loader mode.

"Seconday" -> "Secondary"

> +
> +This document currently walks through an installation with a device
> +with eMMC storage.
> +
> +Prerequisites
> +-
> +
> +* fastboot binaries installed on client machine
> +* sunxi-tools installed on client machine (optional)
> +* u-boot tools (mkimage)
> +* u-boot binaries for the target sunxi device
> +* filesystem images
> +  * root file system containing operating system
> +  * vfat file system
> +* Sunxi device connected to client via OTG port
> +
> +Getting your device into Fastboot mode
> +--
> +
> +To enter into fastboot mode, execute the `fastboot` command in
> +U-Boot:
> +
> +$ fastboot usb 0
> +
> +On the client machine, you can check whether the device is visible
> +using the `fastboot devices` command. And for fun, you can also
> +fetch the bootloader version using the fastboot protocol:
> +
> +$ fastboot devices
> +1234567890abcdef   fastboot
> +$ fastboot getvar bootloader-version
> +bootloader-version: U-Boot 2018.11-rc2-00033-ge3beca3a2f
> +finished. total time: 0.000s
> +
> +Preparing the device for flashing
> +-
> +
> +Now that the device is in the fastboot mode, we can continue with
> +creating the partitions on the device. By default, u-boot for sunxi
> +defines following partitions:
> +
> +* loader1 - partition for secondary program loader
> +* loader2 - partition for u-boot
> +* esp - EFI system partition, also used for u-boot to look up boot.scr
> +* system  - Root partition for system
> +
> +These partitions have also assigned GUID's according to Discoverable
> +Partitions Specification [1], to enable automatic discovery of partitions
> +and their mountpoints.
> +
> +You can start by formatting the internal storage by executing the
> +`fastboot oem format` command from client:
> +
> +$ fastboot oem format
> +
> +This equivalent to running the `gpt write mmc 1 $partitions` from u-boot.
> +
> +[1] 
> https://www.freedesktop.org/wiki/Specifications/DiscoverablePartitionsSpec/
> +
> +Flashing the device
> +---
> +
> +Now that we have the partitions created, all that is left for us
> +is to flash the data.
> +

> +`loader1` is used for storing the Seconday Program Loader, in our
> +case, it is the `spl/sunxi-spl.bin` in the u-boot directory:

"Seconday" -> "Secondary"

> +
> +$ fastboot flash loader1 spl/sunxi-spl.bin
> +
> +`loader2` is for storing the u-boot binary. `u-boot.img` in the
> +u-boot source directory:
> +
> +$ fastboot flash loader2 u-boot.img
> +
> +`esp` partition (EFI System Partition) can be kept empty, although
> +if it is VFAT partition, u-boot automatically looks up the `boot.scr`
> +file for device-specific configuration. (You can create empty vfat
> +partition by `fallocate -l 32M esp.img && mkfs.vfat esp.img`)
> +
> +$ fastboot flash esp esp.img
> +
> +`system` partition is where the operating system resides. Creating
> +that is left as an exercise to the reader.
> +
> +$ fastboot flash system system.img
> +
> +Now, if everything has been properly set up (aka proper kernel
> +with machine-specific dtb installed on system.img, and boot.scr
> +on esp partition), you can reboot the machine:
> +
> +$ fastboot reboot
> --
> git-series 0.9.1
>
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Regards,
Jonathan

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[linux-sunxi] [PATCH v3 3/3] drm/sun4i: hdmi: Add missing rate halving check in sun4i_tmds_determine_rate

[Jonathan Liu]

It was only checking the divider when determing the closest match if
it could not match the requested rate exactly.

For a projector connected to an Olimex A20-OLinuXino-LIME using HDMI
with a native resolution of 1280x800 and pixel clock of 83.5 MHz, this
resulted in 1280x800 mode not being available and the following in dmesg
when the kernel is booted with drm.debug=0x3e:
[drm:drm_mode_debug_printmodeline] Modeline 37:"1280x800" 60 83500 1280 1352 
1480 1680 800 810 816 831 0x48 0x5
[drm:drm_mode_prune_invalid] Not using 1280x800 mode: NOCLOCK

Fixes: 9c5681011a0c ("drm/sun4i: Add HDMI support")
Signed-off-by: Jonathan Liu <net...@gmail.com>
---
 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c 
b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
index 88eeeaf34638..3ecffa52c814 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
@@ -102,9 +102,12 @@ static int sun4i_tmds_determine_rate(struct clk_hw *hw,
goto out;
}
 
-   if (!best_parent || abs(rate - rounded / i) <
-   abs(rate - best_parent / best_div)) {
+   if (!best_parent ||
+   abs(rate - rounded / i / j) <
+   abs(rate - best_parent / best_half /
+   best_div)) {
best_parent = rounded;
+   best_half = i;
best_div = j;
}
}
-- 
2.15.1

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[linux-sunxi] [PATCH v3 1/3] drm/sun4i: hdmi: Check for unset best_parent in sun4i_tmds_determine_rate

[Jonathan Liu]

It is possible that if there is no exact rate match and
"rounded = clk_hw_round_rate(parent, ideal)" gives high enough values
(e.g. if rounded is 2 * ideal) that the condition
"abs(rate - rounded / i) < abs(rate - best_parent / best_div)" is never
met and best_parent is never set. This results in req->rate and
req->best_parent_rate being assigned 0.

To avoid this, we set best_parent to the first calculated rate if it is
unset. The sun4i_tmds_calc_divider function already has a similar check.

Fixes: 9c5681011a0c ("drm/sun4i: Add HDMI support")
Signed-off-by: Jonathan Liu <net...@gmail.com>
---
 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c 
b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
index dc332ea56f6c..4d235e5ea31c 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
@@ -102,7 +102,7 @@ static int sun4i_tmds_determine_rate(struct clk_hw *hw,
goto out;
}
 
-   if (abs(rate - rounded / i) <
+   if (!best_parent || abs(rate - rounded / i) <
abs(rate - best_parent / best_div)) {
best_parent = rounded;
best_div = i;
-- 
2.15.1

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[linux-sunxi] [PATCH v3 2/3] drm/sun4i: hdmi: Fix incorrect assignment in sun4i_tmds_determine_rate

[Jonathan Liu]

best_div is set to i which corresponds to rate halving when it should be
set to j which corresponds to the divider.

Fixes: 9c5681011a0c ("drm/sun4i: Add HDMI support")
Signed-off-by: Jonathan Liu <net...@gmail.com>
---
 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c 
b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
index 4d235e5ea31c..88eeeaf34638 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
@@ -105,7 +105,7 @@ static int sun4i_tmds_determine_rate(struct clk_hw *hw,
if (!best_parent || abs(rate - rounded / i) <
abs(rate - best_parent / best_div)) {
best_parent = rounded;
-   best_div = i;
+   best_div = j;
}
}
}
-- 
2.15.1

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[linux-sunxi] [PATCH v3 0/3] drm/sun4i: hdmi: Fix sun4i_tmds_determine_rate

[Jonathan Liu]

This patchset fixes several issues in sun4i_tmds_determine_rate that I
discovered while trying to get a projector connected to an Olimex
A20-OLinuXino-LIME using HDMI with a native resolution of 1280x800 and
pixel clock of 83.5 MHz to display at its native resolution.

Changes for v3:
- Improve commit message for unset best_parent

Changes for v2:
- Split into separate patches for each issue
- Add details to commit message for reproducing issue

Jonathan Liu (3):
  drm/sun4i: hdmi: Check for unset best_parent in
sun4i_tmds_determine_rate
  drm/sun4i: hdmi: Fix incorrect assignment in sun4i_tmds_determine_rate
  drm/sun4i: hdmi: Add missing rate halving check in
sun4i_tmds_determine_rate

 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

-- 
2.15.1

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[linux-sunxi] Re: [PATCH v2 1/3] drm/sun4i: hdmi: Check for unset best_parent in sun4i_tmds_determine_rate

[Jonathan Liu]

Hi Maxime,

On 5 January 2018 at 21:03, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Fri, Jan 05, 2018 at 09:44:39AM +1100, Jonathan Liu wrote:
>> On 5 January 2018 at 06:56, Maxime Ripard
>> <maxime.rip...@free-electrons.com> wrote:
>> > On Tue, Dec 26, 2017 at 10:12:25PM +1100, Jonathan Liu wrote:
>> >> We should check if the best match has been set before comparing it.
>> >>
>> >> Fixes: 9c5681011a0c ("drm/sun4i: Add HDMI support")
>> >> Signed-off-by: Jonathan Liu <net...@gmail.com>
>> >> ---
>> >>  drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c | 2 +-
>> >>  1 file changed, 1 insertion(+), 1 deletion(-)
>> >>
>> >> diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c 
>> >> b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
>> >> index dc332ea56f6c..4d235e5ea31c 100644
>> >> --- a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
>> >> +++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
>> >> @@ -102,7 +102,7 @@ static int sun4i_tmds_determine_rate(struct clk_hw 
>> >> *hw,
>> >>   goto out;
>> >>   }
>> >>
>> >> - if (abs(rate - rounded / i) <
>> >> + if (!best_parent || abs(rate - rounded / i) 
>> >> <
>> >
>> > Why is that causing any issue?
>> >
>> > If best_parent is set to 0...
>> >
>> >>   abs(rate - best_parent / best_div)) {
>> >
>> > ... the value returned here is going to be rate, which is going to be
>> > higher than the first part of the comparison meaning ...
>> >
>> >>   best_parent = rounded;
>> >
>> > ... that best_parent is going to be set there.
>>
>> Consider the following:
>> rate = 8350
>> rounded = ideal * 2
>>
>> It is possible that if "rounded = clk_hw_round_rate(parent, ideal)"
>> gives high enough values that the condition "abs(rate - rounded / i) <
>> abs(rate - best_parent / best_div)" is never met.
>>
>> Then you can end up with:
>> req->rate = 0
>> req->best_parent_rate = 0
>> req->best_parent_hw = ...
>>
>> Also, the sun4i_tmds_calc_divider function has a similar check.
>
> Ok. That explanation must be part of your commit log, or at least
> which problem you're trying to address and in which situation it will
> trigger.

Ok. I have added amended the commit message with explanation for v3.

Regards,
Jonathan

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[linux-sunxi] Re: [PATCH v2 1/3] drm/sun4i: hdmi: Check for unset best_parent in sun4i_tmds_determine_rate

[Jonathan Liu]

Hi Maxime,

On 5 January 2018 at 06:56, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Tue, Dec 26, 2017 at 10:12:25PM +1100, Jonathan Liu wrote:
>> We should check if the best match has been set before comparing it.
>>
>> Fixes: 9c5681011a0c ("drm/sun4i: Add HDMI support")
>> Signed-off-by: Jonathan Liu <net...@gmail.com>
>> ---
>>  drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c 
>> b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
>> index dc332ea56f6c..4d235e5ea31c 100644
>> --- a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
>> +++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
>> @@ -102,7 +102,7 @@ static int sun4i_tmds_determine_rate(struct clk_hw *hw,
>>   goto out;
>>   }
>>
>> - if (abs(rate - rounded / i) <
>> + if (!best_parent || abs(rate - rounded / i) <
>
> Why is that causing any issue?
>
> If best_parent is set to 0...
>
>>   abs(rate - best_parent / best_div)) {
>
> ... the value returned here is going to be rate, which is going to be
> higher than the first part of the comparison meaning ...
>
>>   best_parent = rounded;
>
> ... that best_parent is going to be set there.

Consider the following:
rate = 8350
rounded = ideal * 2

It is possible that if "rounded = clk_hw_round_rate(parent, ideal)"
gives high enough values that the condition "abs(rate - rounded / i) <
abs(rate - best_parent / best_div)" is never met.

Then you can end up with:
req->rate = 0
req->best_parent_rate = 0
req->best_parent_hw = ...

Also, the sun4i_tmds_calc_divider function has a similar check.

Regards,
Jonathan

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[linux-sunxi] [PATCH v2 2/3] drm/sun4i: hdmi: Fix incorrect assignment in sun4i_tmds_determine_rate

[Jonathan Liu]

best_div is set to i which corresponds to rate halving when it should be
set to j which corresponds to the divider.

Fixes: 9c5681011a0c ("drm/sun4i: Add HDMI support")
Signed-off-by: Jonathan Liu <net...@gmail.com>
---
 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c 
b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
index 4d235e5ea31c..88eeeaf34638 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
@@ -105,7 +105,7 @@ static int sun4i_tmds_determine_rate(struct clk_hw *hw,
if (!best_parent || abs(rate - rounded / i) <
abs(rate - best_parent / best_div)) {
best_parent = rounded;
-   best_div = i;
+   best_div = j;
}
}
}
-- 
2.15.0

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[linux-sunxi] [PATCH v2 1/3] drm/sun4i: hdmi: Check for unset best_parent in sun4i_tmds_determine_rate

[Jonathan Liu]

We should check if the best match has been set before comparing it.

Fixes: 9c5681011a0c ("drm/sun4i: Add HDMI support")
Signed-off-by: Jonathan Liu <net...@gmail.com>
---
 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c 
b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
index dc332ea56f6c..4d235e5ea31c 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
@@ -102,7 +102,7 @@ static int sun4i_tmds_determine_rate(struct clk_hw *hw,
goto out;
}
 
-   if (abs(rate - rounded / i) <
+   if (!best_parent || abs(rate - rounded / i) <
abs(rate - best_parent / best_div)) {
best_parent = rounded;
best_div = i;
-- 
2.15.0

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[linux-sunxi] [PATCH v2 0/3] drm/sun4i: hdmi: Fix sun4i_tmds_determine_rate

[Jonathan Liu]

This patchset fixes several issues in sun4i_tmds_determine_rate that I
discovered while trying to get a projector connected to an Olimex
A20-OLinuXino-LIME using HDMI with a native resolution of 1280x800 and
pixel clock of 83.5 MHz to display at its native resolution.

Changes for v2:
- Split into separate patches for each issue
- Add details to commit message for reproducing issue

Jonathan Liu (3):
  drm/sun4i: hdmi: Check for unset best_parent in
sun4i_tmds_determine_rate
  drm/sun4i: hdmi: Fix incorrect assignment in sun4i_tmds_determine_rate
  drm/sun4i: hdmi: Add missing rate halving check in
sun4i_tmds_determine_rate

 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

-- 
2.15.0

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[linux-sunxi] [PATCH v2 3/3] drm/sun4i: hdmi: Add missing rate halving check in sun4i_tmds_determine_rate

[Jonathan Liu]

It was only checking the divider when determing the closest match if
it could not match the requested rate exactly.

For a projector connected to an Olimex A20-OLinuXino-LIME using HDMI
with a native resolution of 1280x800 and pixel clock of 83.5 MHz, this
resulted in 1280x800 mode not being available and the following in dmesg
when the kernel is booted with drm.debug=0x3e:
[drm:drm_mode_debug_printmodeline] Modeline 37:"1280x800" 60 83500 1280 1352 
1480 1680 800 810 816 831 0x48 0x5
[drm:drm_mode_prune_invalid] Not using 1280x800 mode: NOCLOCK

Fixes: 9c5681011a0c ("drm/sun4i: Add HDMI support")
Signed-off-by: Jonathan Liu <net...@gmail.com>
---
 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c 
b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
index 88eeeaf34638..3ecffa52c814 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
@@ -102,9 +102,12 @@ static int sun4i_tmds_determine_rate(struct clk_hw *hw,
goto out;
}
 
-   if (!best_parent || abs(rate - rounded / i) <
-   abs(rate - best_parent / best_div)) {
+   if (!best_parent ||
+   abs(rate - rounded / i / j) <
+   abs(rate - best_parent / best_half /
+   best_div)) {
best_parent = rounded;
+   best_half = i;
best_div = j;
}
}
-- 
2.15.0

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[linux-sunxi] [PATCH] drm/sun4i: hdmi: Fix sun4i_tmds_determine_rate

[Jonathan Liu]

There are several issues in sun4i_tmds_determine_rate:
- doesn't check if the best match was already set before comparing it
  with the enumerated parameters which could result in integer divide
  by zero
- doesn't consider rate halving when determining closest match if it
  can't match the requested rate exactly
- sets best_div to i which corresponds to rate halving when it should be
  set to j which corresponds to the divider

Fix these issues.

Fixes: 9c5681011a0c ("drm/sun4i: Add HDMI support")
Signed-off-by: Jonathan Liu <net...@gmail.com>
---
 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c 
b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
index dc332ea56f6c..3ecffa52c814 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
@@ -102,10 +102,13 @@ static int sun4i_tmds_determine_rate(struct clk_hw *hw,
goto out;
}
 
-   if (abs(rate - rounded / i) <
-   abs(rate - best_parent / best_div)) {
+   if (!best_parent ||
+   abs(rate - rounded / i / j) <
+   abs(rate - best_parent / best_half /
+   best_div)) {
best_parent = rounded;
-   best_div = i;
+   best_half = i;
+   best_div = j;
}
}
}
-- 
2.15.0

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Re: [linux-sunxi] [PATCHv6 12/28] net: Add ability to set MAC address via EEPROM

[Jonathan Liu]

Hi Olliver,

On 15 May 2017 at 18:02, Olliver Schinagl  wrote:
> This patch allows Kconfig to enable and set parameters to make it
> possible to read the MAC address from an EEPROM. The net core layer then
> uses this information to read MAC addresses from this EEPROM.
>
> Besides the various tuneables as to how to access the eeprom (bus,
> address, addressing mode/length, 2 configurable that are EEPROM generic
> (e.g. SPI or some other form of access) which are:
>
> NET_ETHADDR_EEPROM_OFFSET, indicating where in the EEPROM the start of
> the MAC address is. The default is 8 allowing for 8 bytes before the MAC
> for other purposes (header MAGIC for example).

Note that Olimex has started to write their own data to the EEPROM for
their A20 boards:
https://github.com/OLIMEX/OLINUXINO/blob/master/SOFTWARE/A20/A20-eeprom-contents/Olimex-A20-EEPROM-september-2017.pdf

>
> NET_ETHADDR_EEPROM_CRC8, indicating the MAC is appended with a CRC8-CCIT
> checksum that should be verified.
>
> Currently only I2C eeproms have been tested and thus only those options
> are available, but shouldn't be a limit. NET_ETHADDR_EEPROM_SPI can be
> just as created and added.
>
> The code currently first checks if there is a non-zero MAC address in
> the eeprom. If that fails to be the case, the read_rom_hwaddr can be
> used by a board to supply the MAC in other ways.
>
> If both these fails, the other code is still in place to query the
> environent, which then can be used to override the hardware supplied
> data.
>
> Signed-off-by: Olliver Schinagl 

Regards,
Jonathan

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[linux-sunxi] [PATCH] drm/sun4i: tcon: Add dithering support for RGB565/RGB666 LCD panels

[Jonathan Liu]

Dithering is supported on TCON channel 0 which is used for LCD panels.

Signed-off-by: Jonathan Liu <net...@gmail.com>
---
 drivers/gpu/drm/sun4i/sun4i_tcon.c | 37 +
 drivers/gpu/drm/sun4i/sun4i_tcon.h | 18 +-
 2 files changed, 54 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c 
b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index 68751b999877..cf313ca858b3 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -12,11 +12,13 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -168,7 +170,9 @@ void sun4i_tcon0_mode_set(struct sun4i_tcon *tcon,
  struct drm_display_mode *mode)
 {
unsigned int bp, hsync, vsync;
+   u32 bus_format = 0;
u8 clk_delay;
+   struct drm_connector *connector = tcon->panel->connector;
u32 val = 0;
 
/* Configure the dot clock */
@@ -230,6 +234,39 @@ void sun4i_tcon0_mode_set(struct sun4i_tcon *tcon,
   SUN4I_TCON0_IO_POL_HSYNC_POSITIVE | 
SUN4I_TCON0_IO_POL_VSYNC_POSITIVE,
   val);
 
+   if (connector->display_info.num_bus_formats)
+   bus_format = connector->display_info.bus_formats[0];
+
+   switch (bus_format) {
+   case MEDIA_BUS_FMT_RGB565_1X16:
+   case MEDIA_BUS_FMT_RGB666_1X18:
+   /* Enable dithering */
+   /* FIXME: Undocumented bits */
+   regmap_write(tcon->regs, SUN4I_TCON0_FRM_SEED0_REG, 0x);
+   regmap_write(tcon->regs, SUN4I_TCON0_FRM_SEED1_REG, 0x);
+   regmap_write(tcon->regs, SUN4I_TCON0_FRM_SEED2_REG, 0x);
+   regmap_write(tcon->regs, SUN4I_TCON0_FRM_SEED3_REG, 0x);
+   regmap_write(tcon->regs, SUN4I_TCON0_FRM_SEED4_REG, 0x);
+   regmap_write(tcon->regs, SUN4I_TCON0_FRM_SEED5_REG, 0x);
+   regmap_write(tcon->regs, SUN4I_TCON0_FRM_TAB0_REG, 0x0101);
+   regmap_write(tcon->regs, SUN4I_TCON0_FRM_TAB1_REG, 0x1515);
+   regmap_write(tcon->regs, SUN4I_TCON0_FRM_TAB2_REG, 0x5757);
+   regmap_write(tcon->regs, SUN4I_TCON0_FRM_TAB3_REG, 0x7f7f);
+   val = SUN4I_TCON0_FRM_CTL_ENABLE;
+
+   if (bus_format == MEDIA_BUS_FMT_RGB565_1X16) {
+   val |= SUN4I_TCON0_FRM_CTL_MODE_R;
+   val |= SUN4I_TCON0_FRM_CTL_MODE_B;
+   }
+
+   regmap_write(tcon->regs, SUN4I_TCON0_FRM_CTL_REG, val);
+   break;
+   default:
+   /* Disable dithering */
+   regmap_write(tcon->regs, SUN4I_TCON0_FRM_CTL_REG, 0);
+   break;
+   }
+
/* Map output pins to channel 0 */
regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG,
   SUN4I_TCON_GCTL_IOMAP_MASK,
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h 
b/drivers/gpu/drm/sun4i/sun4i_tcon.h
index d9e1357cc8ae..d64d45144c91 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.h
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h
@@ -31,7 +31,23 @@
 #define SUN4I_TCON_GINT0_VBLANK_INT(pipe)  BIT(15 - (pipe))
 
 #define SUN4I_TCON_GINT1_REG   0x8
-#define SUN4I_TCON_FRM_CTL_REG 0x10
+
+#define SUN4I_TCON0_FRM_CTL_REG0x10
+#define SUN4I_TCON0_FRM_CTL_ENABLE BIT(31)
+#define SUN4I_TCON0_FRM_CTL_MODE_R BIT(6)
+#define SUN4I_TCON0_FRM_CTL_MODE_G BIT(5)
+#define SUN4I_TCON0_FRM_CTL_MODE_B BIT(4)
+
+#define SUN4I_TCON0_FRM_SEED0_REG  0x14
+#define SUN4I_TCON0_FRM_SEED1_REG  0x18
+#define SUN4I_TCON0_FRM_SEED2_REG  0x1c
+#define SUN4I_TCON0_FRM_SEED3_REG  0x20
+#define SUN4I_TCON0_FRM_SEED4_REG  0x24
+#define SUN4I_TCON0_FRM_SEED5_REG  0x28
+#define SUN4I_TCON0_FRM_TAB0_REG   0x2c
+#define SUN4I_TCON0_FRM_TAB1_REG   0x30
+#define SUN4I_TCON0_FRM_TAB2_REG   0x34
+#define SUN4I_TCON0_FRM_TAB3_REG   0x38
 
 #define SUN4I_TCON0_CTL_REG0x40
 #define SUN4I_TCON0_CTL_TCON_ENABLEBIT(31)
-- 
2.14.2

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[linux-sunxi] Re: [PATCH v2] usb: musb: sunxi: Explicitly release USB PHY on exit

[Jonathan Liu]

On 16 October 2017 at 23:49, Bin Liu <b-...@ti.com> wrote:
> On Mon, Oct 16, 2017 at 04:13:51PM +1100, Jonathan Liu wrote:
>> On 10 October 2017 at 14:22, Bin Liu <b-...@ti.com> wrote:
>> > On Tue, Oct 10, 2017 at 01:45:25PM +1100, Jonathan Liu wrote:
>> >> This fixes a kernel oops when unloading the driver due to usb_put_phy
>> >> being called after usb_phy_generic_unregister when the device is
>> >> detached. Calling usb_phy_generic_unregister causes x->dev->driver to
>> >> be NULL in usb_put_phy and results in a NULL pointer dereference.
>> >>
>> >> Cc: sta...@vger.kernel.org # v4.3+
>> >> Signed-off-by: Jonathan Liu <net...@gmail.com>
>> >> ---
>> >> Changes for v2:
>> >>  - Use devm_usb_put_phy instead of usb_put_phy
>> >>
>> >>  drivers/usb/musb/sunxi.c | 2 ++
>> >>  1 file changed, 2 insertions(+)
>> >>
>> >> diff --git a/drivers/usb/musb/sunxi.c b/drivers/usb/musb/sunxi.c
>> >> index c9a09b5bb6e5..dc353e24d53c 100644
>> >> --- a/drivers/usb/musb/sunxi.c
>> >> +++ b/drivers/usb/musb/sunxi.c
>> >> @@ -297,6 +297,8 @@ static int sunxi_musb_exit(struct musb *musb)
>> >>   if (test_bit(SUNXI_MUSB_FL_HAS_SRAM, >flags))
>> >>   sunxi_sram_release(musb->controller->parent);
>> >>
>> >> + devm_usb_put_phy(glue->dev, glue->xceiv);
>> >> +
>> >>   return 0;
>> >>  }
>> >
>> >
>>
>> > Applied. Thanks.
>> > -Bin.
>>
>> Which repository was it applied to?
>
> I don't have a public repo (yet), but the patch has been sent to Greg,
> so it should be merged into the next -rc.
>
> Regards,
> -Bin.

The MAINTAINERS file has
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git listed as
the tree for drivers/usb/musb/. I guess that should be updated.

Regards,
Jonathan

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[linux-sunxi] Re: [PATCH v2] usb: musb: sunxi: Explicitly release USB PHY on exit

[Jonathan Liu]

On 10 October 2017 at 14:22, Bin Liu <b-...@ti.com> wrote:
> On Tue, Oct 10, 2017 at 01:45:25PM +1100, Jonathan Liu wrote:
>> This fixes a kernel oops when unloading the driver due to usb_put_phy
>> being called after usb_phy_generic_unregister when the device is
>> detached. Calling usb_phy_generic_unregister causes x->dev->driver to
>> be NULL in usb_put_phy and results in a NULL pointer dereference.
>>
>> Cc: sta...@vger.kernel.org # v4.3+
>> Signed-off-by: Jonathan Liu <net...@gmail.com>
>> ---
>> Changes for v2:
>>  - Use devm_usb_put_phy instead of usb_put_phy
>>
>>  drivers/usb/musb/sunxi.c | 2 ++
>>  1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/usb/musb/sunxi.c b/drivers/usb/musb/sunxi.c
>> index c9a09b5bb6e5..dc353e24d53c 100644
>> --- a/drivers/usb/musb/sunxi.c
>> +++ b/drivers/usb/musb/sunxi.c
>> @@ -297,6 +297,8 @@ static int sunxi_musb_exit(struct musb *musb)
>>   if (test_bit(SUNXI_MUSB_FL_HAS_SRAM, >flags))
>>   sunxi_sram_release(musb->controller->parent);
>>
>> + devm_usb_put_phy(glue->dev, glue->xceiv);
>> +
>>   return 0;
>>  }
>
>

> Applied. Thanks.
> -Bin.

Which repository was it applied to?

Regards,
Jonathan

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[linux-sunxi] [PATCH v2] usb: musb: sunxi: Explicitly release USB PHY on exit

[Jonathan Liu]

This fixes a kernel oops when unloading the driver due to usb_put_phy
being called after usb_phy_generic_unregister when the device is
detached. Calling usb_phy_generic_unregister causes x->dev->driver to
be NULL in usb_put_phy and results in a NULL pointer dereference.

Cc: sta...@vger.kernel.org # v4.3+
Signed-off-by: Jonathan Liu <net...@gmail.com>
---
Changes for v2:
 - Use devm_usb_put_phy instead of usb_put_phy

 drivers/usb/musb/sunxi.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/usb/musb/sunxi.c b/drivers/usb/musb/sunxi.c
index c9a09b5bb6e5..dc353e24d53c 100644
--- a/drivers/usb/musb/sunxi.c
+++ b/drivers/usb/musb/sunxi.c
@@ -297,6 +297,8 @@ static int sunxi_musb_exit(struct musb *musb)
if (test_bit(SUNXI_MUSB_FL_HAS_SRAM, >flags))
sunxi_sram_release(musb->controller->parent);
 
+   devm_usb_put_phy(glue->dev, glue->xceiv);
+
return 0;
 }
 
-- 
2.14.2

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[linux-sunxi] Re: [PATCH] usb: musb: sunxi: Explicitly release USB PHY on exit

[Jonathan Liu]

Hi,

On 10 October 2017 at 13:14, Bin Liu <b-...@ti.com> wrote:
> On Tue, Oct 10, 2017 at 08:17:34AM +1100, Jonathan Liu wrote:
>> Hi,
>>
>> On 10 October 2017 at 01:23, Bin Liu <b-...@ti.com> wrote:
>> > Hi,
>> >
>> > On Tue, Sep 26, 2017 at 09:39:23PM +1000, Jonathan Liu wrote:
>> >> This fixes a kernel oops when unloading the driver due to usb_put_phy
>> >> being called after usb_phy_generic_unregister when the device is
>> >> detached. Calling usb_phy_generic_unregister causes x->dev->driver to
>> >> be NULL in usb_put_phy and results in a NULL pointer dereference.
>> >>
>> >> As we are now explicitly managing the lifetime of usb_phy,
>> >> devm_usb_get_phy is changed to usb_get_phy and we call usb_put_phy in
>> >> the probe error path.
>> >>
>> >> Cc: sta...@vger.kernel.org # v4.3+
>> >> Signed-off-by: Jonathan Liu <net...@gmail.com>
>> >> ---
>> >>  drivers/usb/musb/sunxi.c | 8 ++--
>> >>  1 file changed, 6 insertions(+), 2 deletions(-)
>> >>
>> >> diff --git a/drivers/usb/musb/sunxi.c b/drivers/usb/musb/sunxi.c
>> >> index c9a09b5bb6e5..8eed61042103 100644
>> >> --- a/drivers/usb/musb/sunxi.c
>> >> +++ b/drivers/usb/musb/sunxi.c
>> >> @@ -297,6 +297,8 @@ static int sunxi_musb_exit(struct musb *musb)
>> >>   if (test_bit(SUNXI_MUSB_FL_HAS_SRAM, >flags))
>> >>   sunxi_sram_release(musb->controller->parent);
>> >>
>> >> + usb_put_phy(glue->xceiv);
>> >
>> > Will devm_usb_put_phy() solve the issue too? Then you don't need the
>> > changes in sunxi_musb_probe() below.
>> >
>>
>> devm_usb_put_phy does solve the issue without changes in
>> sunxi_musb_probe but I think it is clearer that the lifetime is
>> explicitly managed if we don't mix implicit and explicit freeing of
>> resources.
>
> Then what is the purpose of the devm_* API?
>
> The original bug was that devm_usb_get_phy() is called in _probe, but
> devm_usb_put_phy() was never called, which caused the device ref count
> unbalanced. It is not related to implicit/explicit resource management.
>
> devm_* is recommended whenever applicable.
>

Ok. Will use devm_usb_put_phy in v2 patch.

> Regards,
> -Bin.
>

Regards,
Jonathan

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[linux-sunxi] Re: [PATCH] usb: musb: sunxi: Explicitly release USB PHY on exit

[Jonathan Liu]

Hi,

On 10 October 2017 at 01:23, Bin Liu <b-...@ti.com> wrote:
> Hi,
>
> On Tue, Sep 26, 2017 at 09:39:23PM +1000, Jonathan Liu wrote:
>> This fixes a kernel oops when unloading the driver due to usb_put_phy
>> being called after usb_phy_generic_unregister when the device is
>> detached. Calling usb_phy_generic_unregister causes x->dev->driver to
>> be NULL in usb_put_phy and results in a NULL pointer dereference.
>>
>> As we are now explicitly managing the lifetime of usb_phy,
>> devm_usb_get_phy is changed to usb_get_phy and we call usb_put_phy in
>> the probe error path.
>>
>> Cc: sta...@vger.kernel.org # v4.3+
>> Signed-off-by: Jonathan Liu <net...@gmail.com>
>> ---
>>  drivers/usb/musb/sunxi.c | 8 ++--
>>  1 file changed, 6 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/usb/musb/sunxi.c b/drivers/usb/musb/sunxi.c
>> index c9a09b5bb6e5..8eed61042103 100644
>> --- a/drivers/usb/musb/sunxi.c
>> +++ b/drivers/usb/musb/sunxi.c
>> @@ -297,6 +297,8 @@ static int sunxi_musb_exit(struct musb *musb)
>>   if (test_bit(SUNXI_MUSB_FL_HAS_SRAM, >flags))
>>   sunxi_sram_release(musb->controller->parent);
>>
>> + usb_put_phy(glue->xceiv);
>
> Will devm_usb_put_phy() solve the issue too? Then you don't need the
> changes in sunxi_musb_probe() below.
>

devm_usb_put_phy does solve the issue without changes in
sunxi_musb_probe but I think it is clearer that the lifetime is
explicitly managed if we don't mix implicit and explicit freeing of
resources.

>> +
>>   return 0;
>>  }
>>
>> @@ -781,7 +783,7 @@ static int sunxi_musb_probe(struct platform_device *pdev)
>>   return PTR_ERR(glue->usb_phy);
>>   }
>>
>> - glue->xceiv = devm_usb_get_phy(>dev, USB_PHY_TYPE_USB2);
>> + glue->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
>>   if (IS_ERR(glue->xceiv)) {
>>   ret = PTR_ERR(glue->xceiv);
>>   dev_err(>dev, "Error getting usb-phy %d\n", ret);
>> @@ -803,11 +805,13 @@ static int sunxi_musb_probe(struct platform_device 
>> *pdev)
>>   if (IS_ERR(glue->musb_pdev)) {
>>   ret = PTR_ERR(glue->musb_pdev);
>>   dev_err(>dev, "Error registering musb dev: %d\n", ret);
>> - goto err_unregister_usb_phy;
>> + goto err_put_usb_phy;
>>   }
>>
>>   return 0;
>>
>> +err_put_usb_phy:
>> + usb_put_phy(glue->xceiv);
>>  err_unregister_usb_phy:
>>   usb_phy_generic_unregister(glue->usb_phy);
>>   return ret;
>> --
>> 2.13.2
>
> Regards,
> -Bin.

Regards,
Jonathan

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[linux-sunxi] [PATCH] usb: musb: Check for host-mode using is_host_active() on reset interrupt

[Jonathan Liu]

The sunxi musb has a bug where sometimes it will generate a babble
error on device disconnect instead of a disconnect IRQ. When this
happens the musb controller switches from host mode to device mode
(it clears MUSB_DEVCTL_HM/MUSB_DEVCTL_SESSION and sets
MUSB_DEVCTL_BDEVICE) and gets stuck in this state.

The babble error is misdetected as a bus reset because MUSB_DEVCTL_HM
was cleared.

To fix this, use is_host_active() rather than (devctl & MUSB_DEVCTL_HM)
to detect babble error so that sunxi musb babble recovery can handle it
by restoring the mode. This information is provided by the driver logic
and does not rely on register contents.

Cc: sta...@vger.kernel.org # v4.1+
Signed-off-by: Jonathan Liu <net...@gmail.com>
---
 drivers/usb/musb/musb_core.c | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index 029692053dd3..1bce7df3e110 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -906,7 +906,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 
int_usb,
 */
if (int_usb & MUSB_INTR_RESET) {
handled = IRQ_HANDLED;
-   if (devctl & MUSB_DEVCTL_HM) {
+   if (is_host_active(musb)) {
/*
 * When BABBLE happens what we can depends on which
 * platform MUSB is running, because some platforms
@@ -916,9 +916,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 
int_usb,
 * drop the session.
 */
dev_err(musb->controller, "Babble\n");
-
-   if (is_host_active(musb))
-   musb_recover_from_babble(musb);
+   musb_recover_from_babble(musb);
} else {
musb_dbg(musb, "BUS RESET as %s",
usb_otg_state_string(musb->xceiv->otg->state));
-- 
2.13.2

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Re: [linux-sunxi] Re: [PATCH v2 1/2] ARM: dts: sun7i: Fix A20-OLinuXino-MICRO dts for LAN8710

[Jonathan Liu]

Hi Stefan,

On 31 August 2017 at 15:20, Stefan Mavrodiev  wrote:
> On 08/30/2017 05:37 PM, Maxime Ripard wrote:
>>
>> Hi,
>>
>> On Mon, Aug 28, 2017 at 09:32:42AM +0300, Stefan Mavrodiev wrote:
>>>
>>>  From revision J the board uses new phy chip LAN8710. Compared
>>> with RTL8201, RA17 pin is TXERR. It has pullup which causes phy
>>> not to work. To fix this PA17 is muxed with GMAC function. This
>>> makes the pin output-low.
>>>
>>> This patch is compatible with earlier board revisions, since this
>>> pin wasn't connected to phy.
>>>
>>> Signed-off-by: Stefan Mavrodiev 
>>> ---
>>>   arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 7 ++-
>>>   1 file changed, 6 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
>>> b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
>>> index 0b7403e..cb1b081 100644
>>> --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
>>> +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
>>> @@ -102,7 +102,7 @@
>>>  {
>>> pinctrl-names = "default";
>>> -   pinctrl-0 = <_pins_mii_a>;
>>> +   pinctrl-0 = <_pins_mii_a>,<_txerr>;
>>> phy = <>;
>>> phy-mode = "mii";
>>> status = "okay";
>>> @@ -229,6 +229,11 @@
>>>   };
>>>  {
>>> +   gmac_txerr: gmac_txerr@0 {
>>> +   pins = "PA17";
>>> +   function = "gmac";
>>> +   };
>>> +
>>
>> The patch looks fine, I still have one question though.
>>
>> Can a PHY operate without this signal? My real question is, would it
>> make sense to mux that pin for all the users, or is it an optional
>> signal that each board designer can choose to use or not?
>>
>> Thanks!
>> Maxime
>>
> This phy (LAN8710) cannot work without this pin. Part of the problem is in
> that we've replaced
> without paying attention to this signal.
>
> RTL8201 has no TXERR pin. The pin PA17 is used as reset signal and therefore
> is pulled up with
> resistor. However on old revisions this option (there is jumper pad between
> SOC and PHY).
>
> As I said, LAN8710 cannot work without this signal. In the datasheet is
> written:
> ...
> The controller drives TXER high when a transmit error is detected.
> ...
>
> In the current variant of the dts, all data is threated as error.
>
> So to answer you question. This is feature only on our board and highly
> depends on the chosen PHY.
> I don't think this should be muxed for all users.
>
>
>
> Best regards,
> Stefan Mavrodiev,
> Olimex Ltd.

Will you be submitting a patch for U-Boot as well?

Regards,
Jonathan

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[linux-sunxi] Re: [PATCH] usb: musb: sunxi: Explicitly release USB PHY on exit

[Jonathan Liu]

Hi,

On 26 September 2017 at 21:39, Jonathan Liu <net...@gmail.com> wrote:
> This fixes a kernel oops when unloading the driver due to usb_put_phy
> being called after usb_phy_generic_unregister when the device is
> detached. Calling usb_phy_generic_unregister causes x->dev->driver to
> be NULL in usb_put_phy and results in a NULL pointer dereference.
>
> As we are now explicitly managing the lifetime of usb_phy,
> devm_usb_get_phy is changed to usb_get_phy and we call usb_put_phy in
> the probe error path.
>
> Cc: sta...@vger.kernel.org # v4.3+
> Signed-off-by: Jonathan Liu <net...@gmail.com>
> ---
>  drivers/usb/musb/sunxi.c | 8 ++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/usb/musb/sunxi.c b/drivers/usb/musb/sunxi.c
> index c9a09b5bb6e5..8eed61042103 100644
> --- a/drivers/usb/musb/sunxi.c
> +++ b/drivers/usb/musb/sunxi.c
> @@ -297,6 +297,8 @@ static int sunxi_musb_exit(struct musb *musb)
> if (test_bit(SUNXI_MUSB_FL_HAS_SRAM, >flags))
> sunxi_sram_release(musb->controller->parent);
>
> +   usb_put_phy(glue->xceiv);
> +
> return 0;
>  }
>
> @@ -781,7 +783,7 @@ static int sunxi_musb_probe(struct platform_device *pdev)
> return PTR_ERR(glue->usb_phy);
> }
>
> -   glue->xceiv = devm_usb_get_phy(>dev, USB_PHY_TYPE_USB2);
> +   glue->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
> if (IS_ERR(glue->xceiv)) {
> ret = PTR_ERR(glue->xceiv);
> dev_err(>dev, "Error getting usb-phy %d\n", ret);
> @@ -803,11 +805,13 @@ static int sunxi_musb_probe(struct platform_device 
> *pdev)
> if (IS_ERR(glue->musb_pdev)) {
> ret = PTR_ERR(glue->musb_pdev);
> dev_err(>dev, "Error registering musb dev: %d\n", ret);
> -   goto err_unregister_usb_phy;
> +   goto err_put_usb_phy;
> }
>
> return 0;
>
> +err_put_usb_phy:
> +   usb_put_phy(glue->xceiv);
>  err_unregister_usb_phy:
> usb_phy_generic_unregister(glue->usb_phy);
> return ret;
> --
> 2.13.2
>

Another way I could fix this would be to check if x->dev->driver is
NULL before dereferencing in usb_put_phy but I am not sure if this
breaks any expectations in the USB subsystem...

Regards,
Jonathan

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[linux-sunxi] [PATCH] usb: musb: sunxi: Explicitly release USB PHY on exit

[Jonathan Liu]

This fixes a kernel oops when unloading the driver due to usb_put_phy
being called after usb_phy_generic_unregister when the device is
detached. Calling usb_phy_generic_unregister causes x->dev->driver to
be NULL in usb_put_phy and results in a NULL pointer dereference.

As we are now explicitly managing the lifetime of usb_phy,
devm_usb_get_phy is changed to usb_get_phy and we call usb_put_phy in
the probe error path.

Cc: sta...@vger.kernel.org # v4.3+
Signed-off-by: Jonathan Liu <net...@gmail.com>
---
 drivers/usb/musb/sunxi.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/musb/sunxi.c b/drivers/usb/musb/sunxi.c
index c9a09b5bb6e5..8eed61042103 100644
--- a/drivers/usb/musb/sunxi.c
+++ b/drivers/usb/musb/sunxi.c
@@ -297,6 +297,8 @@ static int sunxi_musb_exit(struct musb *musb)
if (test_bit(SUNXI_MUSB_FL_HAS_SRAM, >flags))
sunxi_sram_release(musb->controller->parent);
 
+   usb_put_phy(glue->xceiv);
+
return 0;
 }
 
@@ -781,7 +783,7 @@ static int sunxi_musb_probe(struct platform_device *pdev)
return PTR_ERR(glue->usb_phy);
}
 
-   glue->xceiv = devm_usb_get_phy(>dev, USB_PHY_TYPE_USB2);
+   glue->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
if (IS_ERR(glue->xceiv)) {
ret = PTR_ERR(glue->xceiv);
dev_err(>dev, "Error getting usb-phy %d\n", ret);
@@ -803,11 +805,13 @@ static int sunxi_musb_probe(struct platform_device *pdev)
if (IS_ERR(glue->musb_pdev)) {
ret = PTR_ERR(glue->musb_pdev);
dev_err(>dev, "Error registering musb dev: %d\n", ret);
-   goto err_unregister_usb_phy;
+   goto err_put_usb_phy;
}
 
return 0;
 
+err_put_usb_phy:
+   usb_put_phy(glue->xceiv);
 err_unregister_usb_phy:
usb_phy_generic_unregister(glue->usb_phy);
return ret;
-- 
2.13.2

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[linux-sunxi] [PATCH] dt-bindings: clock: sunxi-ccu: Add compatibles for sun5i CCU driver

[Jonathan Liu]

The bindings were not updated when the sun5i CCU driver was added in
commit 5e73761786d6 ("clk: sunxi-ng: Add sun5i CCU driver").

Signed-off-by: Jonathan Liu <net...@gmail.com>
---
 Documentation/devicetree/bindings/clock/sunxi-ccu.txt | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt 
b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
index df9fad58facd..dbe0c1c58ab5 100644
--- a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
@@ -3,6 +3,8 @@ Allwinner Clock Control Unit Binding
 
 Required properties :
 - compatible: must contain one of the following compatibles:
+   - "allwinner,sun5i-a10s-ccu"
+   - "allwinner,sun5i-a13-ccu"
- "allwinner,sun6i-a31-ccu"
- "allwinner,sun8i-a23-ccu"
- "allwinner,sun8i-a33-ccu"
@@ -15,6 +17,7 @@ Required properties :
- "allwinner,sun50i-a64-ccu"
- "allwinner,sun50i-a64-r-ccu"
- "allwinner,sun50i-h5-ccu"
+   - "nextthing,gr8-ccu"
 
 - reg: Must contain the registers base address and length
 - clocks: phandle to the oscillators feeding the CCU. Two are needed:
-- 
2.13.2

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[linux-sunxi] Re: [PATCH v6 2/6] clk: sunxi-ng: Add sun4i/sun7i CCU driver

[Jonathan Liu]

Hi Priit,

On 15 July 2017 at 00:49, Priit Laes  wrote:
> Introduce a clock controller driver for sun4i A10 and sun7i A20
> series SoCs.
>
> Signed-off-by: Priit Laes 
> ---
>  drivers/clk/sunxi-ng/Kconfig  |   13 +-
>  drivers/clk/sunxi-ng/Makefile |1 +-
>  drivers/clk/sunxi-ng/ccu-sun4i-a10.c  | 1454 ++-
>  drivers/clk/sunxi-ng/ccu-sun4i-a10.h  |   61 +-
>  include/dt-bindings/clock/sun4i-a10-ccu.h |  200 +++-
>  include/dt-bindings/clock/sun7i-a20-ccu.h |   53 +-
>  include/dt-bindings/reset/sun4i-a10-ccu.h |   69 +-
>  7 files changed, 1851 insertions(+)
>  create mode 100644 drivers/clk/sunxi-ng/ccu-sun4i-a10.c
>  create mode 100644 drivers/clk/sunxi-ng/ccu-sun4i-a10.h
>  create mode 100644 include/dt-bindings/clock/sun4i-a10-ccu.h
>  create mode 100644 include/dt-bindings/clock/sun7i-a20-ccu.h
>  create mode 100644 include/dt-bindings/reset/sun4i-a10-ccu.h



> diff --git a/drivers/clk/sunxi-ng/ccu-sun4i-a10.c 
> b/drivers/clk/sunxi-ng/ccu-sun4i-a10.c
> new file mode 100644
> index 000..09e97d7
> --- /dev/null
> +++ b/drivers/clk/sunxi-ng/ccu-sun4i-a10.c



> +static void __init sun4i_ccu_init(struct device_node *node,
> + const struct sunxi_ccu_desc *desc)
> +{
> +   void __iomem *reg;
> +   u32 val;
> +
> +   reg = of_io_request_and_map(node, 0, of_node_full_name(node));
> +   if (IS_ERR(reg)) {
> +   pr_err("%s: Could not map the clock registers\n",
> +  of_node_full_name(node));
> +   return;
> +   }
> +
> +   /* Force the PLL-Audio-1x divider to 4 */
> +   val = readl(reg + SUN4I_PLL_AUDIO_REG);

> +   val &= ~GENMASK(19, 16);
> +   writel(val | (3 << 16), reg + SUN4I_PLL_AUDIO_REG);

This doesn't work for me on A20 (440 Hz tone outputs at 880 Hz tone)
and I need to use the following instead:
   val &= ~GENMASK(29, 26);
   writel(val | (4 << 26), reg + SUN4I_PLL_AUDIO_REG);

Toggling bits 16-19 doesn't seem to have any effect on the audio for me.

Thanks.

Regards,
Jonathan

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[linux-sunxi] [PATCH] drm/panel: simple: Fix width and height for Olimex LCD-OLinuXino-4.3TS

[Jonathan Liu]

The physical size of the panel is 105.5 (W) x 67.2 (H) x 4.05 (D) mm
but the active display area is 95.04 (W) x 53.856 (H) mm.

The width and height should be set to the active display area.

Signed-off-by: Jonathan Liu <net...@gmail.com>
---
 drivers/gpu/drm/panel/panel-simple.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-simple.c 
b/drivers/gpu/drm/panel/panel-simple.c
index 474fa759e06e..39a622a547e7 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -1522,8 +1522,8 @@ static const struct panel_desc olimex_lcd_olinuxino_43ts 
= {
.modes = _lcd_olinuxino_43ts_mode,
.num_modes = 1,
.size = {
-   .width = 105,
-   .height = 67,
+   .width = 95,
+   .height = 54,
},
.bus_format = MEDIA_BUS_FMT_RGB888_1X24,
 };
-- 
2.13.2

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[linux-sunxi] [PATCH v3] drm/sun4i: Implement drm_driver lastclose to restore fbdev console

[Jonathan Liu]

The drm_driver lastclose callback is called when the last userspace
DRM client has closed. Call drm_fbdev_cma_restore_mode to restore
the fbdev console otherwise the fbdev console will stop working.

Fixes: 9026e0d122ac ("drm: Add Allwinner A10 Display Engine support")
Cc: sta...@vger.kernel.org
Signed-off-by: Jonathan Liu <net...@gmail.com>
Reviewed-by: Chen-Yu Tsai <w...@csie.org>
---
Changes for v3:
 - Add 'Fixes:' tag
 - Add CC to stable
 - Add 'Reviewed-by: Chen-Yu Tsai <w...@csie.org>'

Changes for v2:
 - Rename sun4i_drm_lastclose to sun4i_drv_lastclose

 drivers/gpu/drm/sun4i/sun4i_drv.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c 
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index abc7d8fe06b4..a45a627283a1 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -25,12 +25,20 @@
 #include "sun4i_framebuffer.h"
 #include "sun4i_tcon.h"
 
+static void sun4i_drv_lastclose(struct drm_device *dev)
+{
+   struct sun4i_drv *drv = dev->dev_private;
+
+   drm_fbdev_cma_restore_mode(drv->fbdev);
+}
+
 DEFINE_DRM_GEM_CMA_FOPS(sun4i_drv_fops);
 
 static struct drm_driver sun4i_drv_driver = {
.driver_features= DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | 
DRIVER_ATOMIC,
 
/* Generic Operations */
+   .lastclose  = sun4i_drv_lastclose,
.fops   = _drv_fops,
.name   = "sun4i-drm",
.desc   = "Allwinner sun4i Display Engine",
-- 
2.13.2

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[linux-sunxi] Re: [PATCH v2] drm/sun4i: Implement drm_driver lastclose to restore fbdev console

[Jonathan Liu]

Hi Maxime,

On 10 July 2017 at 16:44, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Sun, Jul 09, 2017 at 11:11:07PM +0800, Chen-Yu Tsai wrote:
>> On Sun, Jul 9, 2017 at 3:59 PM, Jonathan Liu <net...@gmail.com> wrote:
>> > The drm_driver lastclose callback is called when the last userspace
>> > DRM client has closed. Call drm_fbdev_cma_restore_mode to restore
>> > the fbdev console otherwise the fbdev console will stop working.
>> >
>> > Signed-off-by: Jonathan Liu <net...@gmail.com>
>>
>> This should have
>>
>> Fixes: 9026e0d122ac ("drm: Add Allwinner A10 Display Engine support")
>>
>> Otherwise,
>>
>> Reviewed-by: Chen-Yu Tsai <w...@csie.org>
>
> And it should be sent to stable too.
>
> Can you resend it?

Will do.

>
> Thanks!
> Maxime
>
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com

Regards,
Jonathan

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[linux-sunxi] Re: [PATCH v5 2/6] clk: sunxi-ng: Add sun4i/sun7i CCU driver

[Jonathan Liu]

Hi Priit,

On 5 July 2017 at 06:04, Priit Laes  wrote:
> Introduce a clock controller driver for sun4i A10 and sun7i A20
> series SoCs.
>
> Signed-off-by: Priit Laes 
> ---
>  drivers/clk/sunxi-ng/Kconfig  |   14 +-
>  drivers/clk/sunxi-ng/Makefile |1 +-
>  drivers/clk/sunxi-ng/ccu-sun4i-a10.c  | 1448 ++-
>  drivers/clk/sunxi-ng/ccu-sun4i-a10.h  |   61 +-
>  include/dt-bindings/clock/sun4i-a10-ccu.h |  200 +++-
>  include/dt-bindings/clock/sun7i-a20-ccu.h |   53 +-
>  include/dt-bindings/reset/sun4i-a10-ccu.h |   67 +-
>  7 files changed, 1844 insertions(+)
>  create mode 100644 drivers/clk/sunxi-ng/ccu-sun4i-a10.c
>  create mode 100644 drivers/clk/sunxi-ng/ccu-sun4i-a10.h
>  create mode 100644 include/dt-bindings/clock/sun4i-a10-ccu.h
>  create mode 100644 include/dt-bindings/clock/sun7i-a20-ccu.h
>  create mode 100644 include/dt-bindings/reset/sun4i-a10-ccu.h
>
[snip]
> diff --git a/drivers/clk/sunxi-ng/ccu-sun4i-a10.c 
> b/drivers/clk/sunxi-ng/ccu-sun4i-a10.c
> new file mode 100644
> index 000..49052b7
> --- /dev/null
> +++ b/drivers/clk/sunxi-ng/ccu-sun4i-a10.c
[snip]

> +static const char *const hdmi_parents[] = { "pll-video0", "pll-video0-2x",
> +   "pll-video1", "pll-video1-2x" };
> +static SUNXI_CCU_M_WITH_MUX_GATE(hdmi_clk, "hdmi", hdmi_parents,
> +0x150, 0, 4, 24, 2, BIT(31), 0);

hdmi_parents is in the wrong order. The correct order is "pll-video0",
"pll-video1", "pll-video0-2x", "pll-video1-2x".

Regards,
Jonathan

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[linux-sunxi] [PATCH v2] drm/sun4i: Implement drm_driver lastclose to restore fbdev console

[Jonathan Liu]

The drm_driver lastclose callback is called when the last userspace
DRM client has closed. Call drm_fbdev_cma_restore_mode to restore
the fbdev console otherwise the fbdev console will stop working.

Signed-off-by: Jonathan Liu <net...@gmail.com>
---
Changes for v2:
 - Rename sun4i_drm_lastclose to sun4i_drv_lastclose

 drivers/gpu/drm/sun4i/sun4i_drv.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c 
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index abc7d8fe06b4..a45a627283a1 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -25,12 +25,20 @@
 #include "sun4i_framebuffer.h"
 #include "sun4i_tcon.h"
 
+static void sun4i_drv_lastclose(struct drm_device *dev)
+{
+   struct sun4i_drv *drv = dev->dev_private;
+
+   drm_fbdev_cma_restore_mode(drv->fbdev);
+}
+
 DEFINE_DRM_GEM_CMA_FOPS(sun4i_drv_fops);
 
 static struct drm_driver sun4i_drv_driver = {
.driver_features= DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | 
DRIVER_ATOMIC,
 
/* Generic Operations */
+   .lastclose  = sun4i_drv_lastclose,
.fops   = _drv_fops,
.name   = "sun4i-drm",
.desc   = "Allwinner sun4i Display Engine",
-- 
2.13.2

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[linux-sunxi] [PATCH] drm/sun4i: Implement drm_driver lastclose to restore fbdev console

[Jonathan Liu]

The drm_driver lastclose callback is called when the last userspace
DRM client has closed. Call drm_fbdev_cma_restore_mode to restore
the fbdev console otherwise the fbdev console will stop working.

Signed-off-by: Jonathan Liu <net...@gmail.com>
---
 drivers/gpu/drm/sun4i/sun4i_drv.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c 
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index abc7d8fe06b4..c434540d409c 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -25,12 +25,20 @@
 #include "sun4i_framebuffer.h"
 #include "sun4i_tcon.h"
 
+static void sun4i_drm_lastclose(struct drm_device *dev)
+{
+   struct sun4i_drv *drv = dev->dev_private;
+
+   drm_fbdev_cma_restore_mode(drv->fbdev);
+}
+
 DEFINE_DRM_GEM_CMA_FOPS(sun4i_drv_fops);
 
 static struct drm_driver sun4i_drv_driver = {
.driver_features= DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | 
DRIVER_ATOMIC,
 
/* Generic Operations */
+   .lastclose  = sun4i_drm_lastclose,
.fops   = _drv_fops,
.name   = "sun4i-drm",
.desc   = "Allwinner sun4i Display Engine",
-- 
2.13.2

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[linux-sunxi] [PATCH v8] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

The documentation for drm_do_get_edid in drivers/gpu/drm/drm_edid.c states:
"As in the general case the DDC bus is accessible by the kernel at the I2C
level, drivers must make all reasonable efforts to expose it as an I2C
adapter and use drm_get_edid() instead of abusing this function."

Exposing the DDC bus as an I2C adapter is more beneficial as it can be used
for purposes other than reading the EDID such as modifying the EDID or
using the HDMI DDC pins as an I2C bus through the I2C dev interface from
userspace (e.g. i2c-tools).

Implement this for A10s.

Signed-off-by: Jonathan Liu <net...@gmail.com>
---
Changes for v8:
 - Fix clock rate in comment being 100 MHz when it is actually 100 kHz
 - Fix clearing of bits in interrupt status register as they are cleared by
   writing 1 to the bit rather than 0
 - Set FIFO RX/TX thresholds so interrupt status register can be used to
   check if FIFO is ready instead of having to additionally check the FIFO
   status register
 - Remove unused linux/ktime.h include in sun4i_hdmi_i2c.c
 - Reduce timeout for clearing FIFO from 100 ms to 2 ms
 - Use BIT macro instead of GENMASK for SUN4I_HDMI_DDC_BYTE_COUNT_MAX to
   make it clearer that the maximum is derived from the field bit width rather
   than its position in the register

Changes for v7:
 - Fix mixed declarations and code compiler warning for level variable

Changes for v6:
 - Use fixed byte time of 100 us instead of dynamically calculating from DDC
   clock that is set to a fixed 100 MHz rate anyway
 - Change is_fifo_flag_unset to not read the status register as well to be
   more consistent with is_err_status

Changes for v5:
 - Use devm_kzalloc instead of devm_kmemdup and remove const struct i2c_adapter
 - Rework to use readl_poll_timeout for checking FIFO status

Changes for v4:
 - Carry over copyright from initial I2C code into sun4i_hdmi_i2c.c
 - Clean up indentation in sun4i_hdmi.h
 - Rename SUN4I_HDMI_DDC_MAX_TRANSFER_SIZE to SUN4I_HDMI_DDC_BYTE_COUNT_MAX
   and group it under the SUN4I_HDMI_DDC_BYTE_COUNT_REG define, changing the
   value to use the GENMASK macro to make it clear that it is derived from
   the width of the field in the register
 - Fix SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_UNDERFLOW typo which should be
   SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_OVERFLOW
 - Remove redundant rewriting of SUN4I_HDMI_DDC_INT_STATUS_REG register
 - Change struct i2c_adapter to be const by using devm_kmemdup on creation
 - Return -ETIMEDOUT instead of -EIO if there is timeout while transferring an
   I2C message
 - Instead of waiting for 1-2 bytes to transfer, wait for the time it would
   take for remaining bytes to transfer (limited by FIFO size)
 - Add additional comments

Changes for v3:
 - Explain why drm_do_get_edid should be used and why it's better to expose it
   as an I2C adapter in commit message
 - Reorder bit defines in descending order for consistency
 - Keep old unused macros instead of removing them
 - The v2 algorithm split large transfers into 16 byte transfers but this may
   cause a large single write to be treated as multiple writes causing data
   corruption. The algorithm has been reworked to not split larger transfers
   and make more use of the FIFO to avoid this.
 - Moved the creation of the DDC clock from sun4i_hdmi_enc.c to
   sun4i_hdmi_i2c.c
 - Reformatted code
 - Instead of masking bits that we don't want to check for errors, explicitly
   check the error bits
 - Clear error bits at start of transfer in case of error from previous transfer
 - Poll for completion of FIFO clear after setting FIFO clear bit

Changes for v2:
 - Rebased against Maxime's sunxi-drm/for-next branch
 - Fix up error paths in sun4i_hdmi_bind so that the I2C adapter is deleted if
   any of the calls after the I2C adapter is created fails
 - Remove unnecessary includes in sun4i_hdmi_i2c.c

 drivers/gpu/drm/sun4i/Makefile |   1 +
 drivers/gpu/drm/sun4i/sun4i_hdmi.h |  24 
 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 101 ++-
 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c | 220 +
 4 files changed, 256 insertions(+), 90 deletions(-)
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c

diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index e29fd3a2ba9c..43c753cafc88 100644
--- a/drivers/gpu/drm/sun4i/Makefile
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -2,6 +2,7 @@ sun4i-drm-y += sun4i_drv.o
 sun4i-drm-y += sun4i_framebuffer.o
 
 sun4i-drm-hdmi-y += sun4i_hdmi_enc.o
+sun4i-drm-hdmi-y += sun4i_hdmi_i2c.o
 sun4i-drm-hdmi-y += sun4i_hdmi_ddc_clk.o
 sun4i-drm-hdmi-y += sun4i_hdmi_tmds_clk.o
 
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi.h 
b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
index 2f2f2ff1ea63..0957ff2076ac 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi.h
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
@@ -96,6 +96,7 @@
 #define SUN4I_HDMI_DDC_CTRL_ENABLE BIT(31)
 #define SUN4I_HDMI_DDC_CTRL_START_CMD  

[linux-sunxi] Re: [PATCH v5] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

Hi Maxime,

On 30 June 2017 at 19:58, Jonathan Liu <net...@gmail.com> wrote:
> Hi Maxime,
>
> On 30 June 2017 at 19:34, Maxime Ripard
> <maxime.rip...@free-electrons.com> wrote:
>> Hi,
>>
>> On Fri, Jun 30, 2017 at 08:22:13AM +1000, Jonathan Liu wrote:
>>> Hi Maxime,
>>>
>>> On 30 June 2017 at 01:56, Maxime Ripard
>>> <maxime.rip...@free-electrons.com> wrote:
>>> > On Wed, Jun 28, 2017 at 08:39:33PM +1000, Jonathan Liu wrote:
>>> >> >> + u32 int_status;
>>> >> >> + u32 fifo_status;
>>> >> >> + /* Read needs empty flag unset, write needs full flag unset */
>>> >> >> + u32 flag = read ? SUN4I_HDMI_DDC_FIFO_STATUS_EMPTY :
>>> >> >> +   SUN4I_HDMI_DDC_FIFO_STATUS_FULL;
>>> >> >> + int ret;
>>> >> >> +
>>> >> >> + /* Wait until error or FIFO ready */
>>> >> >> + ret = readl_poll_timeout(hdmi->base + 
>>> >> >> SUN4I_HDMI_DDC_INT_STATUS_REG,
>>> >> >> +  int_status,
>>> >> >> +  is_err_status(int_status) ||
>>> >> >> +  is_fifo_flag_unset(hdmi, _status, 
>>> >> >> flag),
>>> >> >> +  min(len, SUN4I_HDMI_DDC_FIFO_SIZE) * 
>>> >> >> byte_time,
>>> >> >> +  10);
>>> >> >> +
>>> >> >> + if (is_err_status(int_status))
>>> >> >> + return -EIO;
>>> >> >> + if (ret)
>>> >> >> + return -ETIMEDOUT;
>>> >> >
>>> >> > Why not just have
>>> >> > ret = readl_poll_timeout(hdmi->base + SUN4I_HDMI_DDC_FIFO_STATUS_REG, 
>>> >> > reg,
>>> >> >  !(reg & flag), 100, 10);
>>> >> >
>>> >> > if (ret < 0)
>>> >> > if (is_err_status())
>>> >> > return -EIO;
>>> >> > return ret;
>>> >> >
>>> >> >
>>> >>
>>> >> If I check error status after readl_poll_timeout and there is an error
>>> >> (e.g. the I2C address does not have a corresponding device connected
>>> >> or nothing connected to HDMI port) it will keep checking the fifo
>>> >> status even though error bit is set in the int status and then timeout
>>> >> after 100 ms. If it checks the int status register at the same time,
>>> >> it will error after 100 nanoseconds. I don't want to introduce
>>> >> unnecessary delays considering part of the reason for adding this
>>> >> driver to make it more usable for non-standard use cases.
>>> >
>>> > Well, polling for 100ms doesn't seem great either. What was the
>>> > rationale behind that timeout?
>>> >
>>>
>>> When an error occurs one of the error bits will be set in the
>>> INT_STATUS register so this is detected very quickly if I check the
>>> INT_STATUS and FIFO_STATUS at the same time. The 100 ms timeout is in
>>> case the I2C slave does clock stretching in which case the transfer
>>> may take longer than the predicted time.
>>
>> 100ms isn't stretching anymore, it's worse than that.
>>
>
> What would you suggest?
>

You need to consider the fact that there are I2C devices such as
sensors that may do I2C clock stretching up to several tens of
milliseconds. For example the HTU21D humidity sensor takes up to 50 ms
max to perform measurement of temperature during which it is holding
down the clock to do I2C clock stretching.

>>> > And we can also reverse the check and look at the INT_STATUS
>>> > register. The errors will be there, and we can program the threshold
>>> > we want in both directions and use the
>>> > DDC_FIFO_Request_Interrupt_Status bit.
>>> >
>>>
>>> I did try that when I was doing the v3 patch but I couldn't get it to
>>> work as mentioned previously in the v3 patch discussion. I programmed
>>> the FIFO_RX_TRIGGER_THRES and FIFO_TX_TRIGGER_THRES in DDC_FIFO_Ctrl
>>> register at the same time as setting FIFO_Address_Clear but the
>>> request interrupt status bit did not get updated to the appropriate
>>> state that is consistent with the FIFO level and the thresholds. I did
>>> try this several times for subsequent patch versions without success.
>>
>> What values did you set it to?
>>
>
> FIFO_RX_TRIGGER_THRES: 0
> FIFO_TX_TRIGGER_THRES: 15
>
>> Maxime
>>
>> --
>> Maxime Ripard, Free Electrons
>> Embedded Linux and Kernel engineering
>> http://free-electrons.com
>
> Regards,
> Jonathan

Regards,
Jonathan

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[linux-sunxi] Re: [PATCH v5] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

Hi Chen-Yu and Maxime,

On 30 June 2017 at 13:16, Chen-Yu Tsai <w...@csie.org> wrote:
> On Fri, Jun 30, 2017 at 6:22 AM, Jonathan Liu <net...@gmail.com> wrote:
>> Hi Maxime,
>>
>> On 30 June 2017 at 01:56, Maxime Ripard
>> <maxime.rip...@free-electrons.com> wrote:
>>> On Wed, Jun 28, 2017 at 08:39:33PM +1000, Jonathan Liu wrote:
>>>> >> + u32 int_status;
>>>> >> + u32 fifo_status;
>>>> >> + /* Read needs empty flag unset, write needs full flag unset */
>>>> >> + u32 flag = read ? SUN4I_HDMI_DDC_FIFO_STATUS_EMPTY :
>>>> >> +   SUN4I_HDMI_DDC_FIFO_STATUS_FULL;
>>>> >> + int ret;
>>>> >> +
>>>> >> + /* Wait until error or FIFO ready */
>>>> >> + ret = readl_poll_timeout(hdmi->base + 
>>>> >> SUN4I_HDMI_DDC_INT_STATUS_REG,
>>>> >> +  int_status,
>>>> >> +  is_err_status(int_status) ||
>>>> >> +  is_fifo_flag_unset(hdmi, _status, 
>>>> >> flag),
>>>> >> +  min(len, SUN4I_HDMI_DDC_FIFO_SIZE) * 
>>>> >> byte_time,
>>>> >> +  10);
>>>> >> +
>>>> >> + if (is_err_status(int_status))
>>>> >> + return -EIO;
>>>> >> + if (ret)
>>>> >> + return -ETIMEDOUT;
>>>> >
>>>> > Why not just have
>>>> > ret = readl_poll_timeout(hdmi->base + SUN4I_HDMI_DDC_FIFO_STATUS_REG, 
>>>> > reg,
>>>> >  !(reg & flag), 100, 10);
>>>> >
>>>> > if (ret < 0)
>>>> > if (is_err_status())
>>>> > return -EIO;
>>>> > return ret;
>>>> >
>>>> >
>>>>
>>>> If I check error status after readl_poll_timeout and there is an error
>>>> (e.g. the I2C address does not have a corresponding device connected
>>>> or nothing connected to HDMI port) it will keep checking the fifo
>>>> status even though error bit is set in the int status and then timeout
>>>> after 100 ms. If it checks the int status register at the same time,
>>>> it will error after 100 nanoseconds. I don't want to introduce
>>>> unnecessary delays considering part of the reason for adding this
>>>> driver to make it more usable for non-standard use cases.
>>>
>>> Well, polling for 100ms doesn't seem great either. What was the
>>> rationale behind that timeout?
>>>
>>
>> When an error occurs one of the error bits will be set in the
>> INT_STATUS register so this is detected very quickly if I check the
>> INT_STATUS and FIFO_STATUS at the same time. The 100 ms timeout is in
>> case the I2C slave does clock stretching in which case the transfer
>> may take longer than the predicted time.
>>
>>> And we can also reverse the check and look at the INT_STATUS
>>> register. The errors will be there, and we can program the threshold
>>> we want in both directions and use the
>>> DDC_FIFO_Request_Interrupt_Status bit.
>>>
>>
>> I did try that when I was doing the v3 patch but I couldn't get it to
>> work as mentioned previously in the v3 patch discussion. I programmed
>> the FIFO_RX_TRIGGER_THRES and FIFO_TX_TRIGGER_THRES in DDC_FIFO_Ctrl
>> register at the same time as setting FIFO_Address_Clear but the
>> request interrupt status bit did not get updated to the appropriate
>> state that is consistent with the FIFO level and the thresholds. I did
>> try this several times for subsequent patch versions without success.
>
> The manual says "When FIFO level is above this value in read mode, DMA
> request and FIFO request interrupt are asserted if relative enable is on."
>
> Perhaps try enabling the interrupts? But if that were the case, wouldn't
> using interrupts instead of polling be better?
>
> ChenYu
>

I managed to get the thresholds working so switching to using
interrupts instead of polling will be my next goal.

>>
>>> Maxime
>>>
>>> --
>>> Maxime Ripard, Free Electrons
>>> Embedded Linux and Kernel engineering
>>> http://free-electrons.com
>>
>> Regards,
>> Jonathan

Regards,
Jonathan

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[linux-sunxi] Re: [PATCH v5] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

Hi Maxime,

On 30 June 2017 at 19:34, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> Hi,
>
> On Fri, Jun 30, 2017 at 08:22:13AM +1000, Jonathan Liu wrote:
>> Hi Maxime,
>>
>> On 30 June 2017 at 01:56, Maxime Ripard
>> <maxime.rip...@free-electrons.com> wrote:
>> > On Wed, Jun 28, 2017 at 08:39:33PM +1000, Jonathan Liu wrote:
>> >> >> + u32 int_status;
>> >> >> + u32 fifo_status;
>> >> >> + /* Read needs empty flag unset, write needs full flag unset */
>> >> >> + u32 flag = read ? SUN4I_HDMI_DDC_FIFO_STATUS_EMPTY :
>> >> >> +   SUN4I_HDMI_DDC_FIFO_STATUS_FULL;
>> >> >> + int ret;
>> >> >> +
>> >> >> + /* Wait until error or FIFO ready */
>> >> >> + ret = readl_poll_timeout(hdmi->base + 
>> >> >> SUN4I_HDMI_DDC_INT_STATUS_REG,
>> >> >> +  int_status,
>> >> >> +  is_err_status(int_status) ||
>> >> >> +  is_fifo_flag_unset(hdmi, _status, 
>> >> >> flag),
>> >> >> +  min(len, SUN4I_HDMI_DDC_FIFO_SIZE) * 
>> >> >> byte_time,
>> >> >> +  10);
>> >> >> +
>> >> >> + if (is_err_status(int_status))
>> >> >> + return -EIO;
>> >> >> + if (ret)
>> >> >> + return -ETIMEDOUT;
>> >> >
>> >> > Why not just have
>> >> > ret = readl_poll_timeout(hdmi->base + SUN4I_HDMI_DDC_FIFO_STATUS_REG, 
>> >> > reg,
>> >> >  !(reg & flag), 100, 10);
>> >> >
>> >> > if (ret < 0)
>> >> > if (is_err_status())
>> >> > return -EIO;
>> >> > return ret;
>> >> >
>> >> >
>> >>
>> >> If I check error status after readl_poll_timeout and there is an error
>> >> (e.g. the I2C address does not have a corresponding device connected
>> >> or nothing connected to HDMI port) it will keep checking the fifo
>> >> status even though error bit is set in the int status and then timeout
>> >> after 100 ms. If it checks the int status register at the same time,
>> >> it will error after 100 nanoseconds. I don't want to introduce
>> >> unnecessary delays considering part of the reason for adding this
>> >> driver to make it more usable for non-standard use cases.
>> >
>> > Well, polling for 100ms doesn't seem great either. What was the
>> > rationale behind that timeout?
>> >
>>
>> When an error occurs one of the error bits will be set in the
>> INT_STATUS register so this is detected very quickly if I check the
>> INT_STATUS and FIFO_STATUS at the same time. The 100 ms timeout is in
>> case the I2C slave does clock stretching in which case the transfer
>> may take longer than the predicted time.
>
> 100ms isn't stretching anymore, it's worse than that.
>

What would you suggest?

>> > And we can also reverse the check and look at the INT_STATUS
>> > register. The errors will be there, and we can program the threshold
>> > we want in both directions and use the
>> > DDC_FIFO_Request_Interrupt_Status bit.
>> >
>>
>> I did try that when I was doing the v3 patch but I couldn't get it to
>> work as mentioned previously in the v3 patch discussion. I programmed
>> the FIFO_RX_TRIGGER_THRES and FIFO_TX_TRIGGER_THRES in DDC_FIFO_Ctrl
>> register at the same time as setting FIFO_Address_Clear but the
>> request interrupt status bit did not get updated to the appropriate
>> state that is consistent with the FIFO level and the thresholds. I did
>> try this several times for subsequent patch versions without success.
>
> What values did you set it to?
>

FIFO_RX_TRIGGER_THRES: 0
FIFO_TX_TRIGGER_THRES: 15

> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com

Regards,
Jonathan

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[linux-sunxi] Re: [PATCH v5] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

Hi Maxime,

On 30 June 2017 at 01:56, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Wed, Jun 28, 2017 at 08:39:33PM +1000, Jonathan Liu wrote:
>> >> + u32 int_status;
>> >> + u32 fifo_status;
>> >> + /* Read needs empty flag unset, write needs full flag unset */
>> >> + u32 flag = read ? SUN4I_HDMI_DDC_FIFO_STATUS_EMPTY :
>> >> +   SUN4I_HDMI_DDC_FIFO_STATUS_FULL;
>> >> + int ret;
>> >> +
>> >> + /* Wait until error or FIFO ready */
>> >> + ret = readl_poll_timeout(hdmi->base + SUN4I_HDMI_DDC_INT_STATUS_REG,
>> >> +  int_status,
>> >> +  is_err_status(int_status) ||
>> >> +  is_fifo_flag_unset(hdmi, _status, 
>> >> flag),
>> >> +  min(len, SUN4I_HDMI_DDC_FIFO_SIZE) * 
>> >> byte_time,
>> >> +  10);
>> >> +
>> >> + if (is_err_status(int_status))
>> >> + return -EIO;
>> >> + if (ret)
>> >> + return -ETIMEDOUT;
>> >
>> > Why not just have
>> > ret = readl_poll_timeout(hdmi->base + SUN4I_HDMI_DDC_FIFO_STATUS_REG, reg,
>> >  !(reg & flag), 100, 10);
>> >
>> > if (ret < 0)
>> > if (is_err_status())
>> > return -EIO;
>> > return ret;
>> >
>> >
>>
>> If I check error status after readl_poll_timeout and there is an error
>> (e.g. the I2C address does not have a corresponding device connected
>> or nothing connected to HDMI port) it will keep checking the fifo
>> status even though error bit is set in the int status and then timeout
>> after 100 ms. If it checks the int status register at the same time,
>> it will error after 100 nanoseconds. I don't want to introduce
>> unnecessary delays considering part of the reason for adding this
>> driver to make it more usable for non-standard use cases.
>
> Well, polling for 100ms doesn't seem great either. What was the
> rationale behind that timeout?
>

When an error occurs one of the error bits will be set in the
INT_STATUS register so this is detected very quickly if I check the
INT_STATUS and FIFO_STATUS at the same time. The 100 ms timeout is in
case the I2C slave does clock stretching in which case the transfer
may take longer than the predicted time.

> And we can also reverse the check and look at the INT_STATUS
> register. The errors will be there, and we can program the threshold
> we want in both directions and use the
> DDC_FIFO_Request_Interrupt_Status bit.
>

I did try that when I was doing the v3 patch but I couldn't get it to
work as mentioned previously in the v3 patch discussion. I programmed
the FIFO_RX_TRIGGER_THRES and FIFO_TX_TRIGGER_THRES in DDC_FIFO_Ctrl
register at the same time as setting FIFO_Address_Clear but the
request interrupt status bit did not get updated to the appropriate
state that is consistent with the FIFO level and the thresholds. I did
try this several times for subsequent patch versions without success.

> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com

Regards,
Jonathan

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[linux-sunxi] Re: [PATCH v7] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

Hi Chen-Yu,

On 29 June 2017 at 12:47, Chen-Yu Tsai <w...@csie.org> wrote:
> Hi,
>
> On Wed, Jun 28, 2017 at 6:52 PM, Jonathan Liu <net...@gmail.com> wrote:
>> The documentation for drm_do_get_edid in drivers/gpu/drm/drm_edid.c states:
>> "As in the general case the DDC bus is accessible by the kernel at the I2C
>> level, drivers must make all reasonable efforts to expose it as an I2C
>> adapter and use drm_get_edid() instead of abusing this function."
>>
>> Exposing the DDC bus as an I2C adapter is more beneficial as it can be used
>> for purposes other than reading the EDID such as modifying the EDID or
>> using the HDMI DDC pins as an I2C bus through the I2C dev interface from
>> userspace (e.g. i2c-tools).
>>
>> Implement this for A10s.
>>
>> Signed-off-by: Jonathan Liu <net...@gmail.com>
>> ---
>> Changes for v7:
>>  - Fix mixed declarations and code compiler warning for level variable
>>
>> Changes for v6:
>>  - Use fixed byte time of 100 us instead of dynamically calculating from DDC
>>clock that is set to a fixed 100 MHz rate anyway
>>  - Change is_fifo_flag_unset to not read the status register as well to be
>>more consistent with is_err_status
>>
>> Changes for v5:
>>  - Use devm_kzalloc instead of devm_kmemdup and remove const struct 
>> i2c_adapter
>>  - Rework to use readl_poll_timeout for checking FIFO status
>>
>> Changes for v4:
>>  - Carry over copyright from initial I2C code into sun4i_hdmi_i2c.c
>>  - Clean up indentation in sun4i_hdmi.h
>>  - Rename SUN4I_HDMI_DDC_MAX_TRANSFER_SIZE to SUN4I_HDMI_DDC_BYTE_COUNT_MAX
>>and group it under the SUN4I_HDMI_DDC_BYTE_COUNT_REG define, changing the
>>value to use the GENMASK macro to make it clear that it is derived from
>>the width of the field in the register
>>  - Fix SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_UNDERFLOW typo which should be
>>SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_OVERFLOW
>>  - Remove redundant rewriting of SUN4I_HDMI_DDC_INT_STATUS_REG register
>>  - Change struct i2c_adapter to be const by using devm_kmemdup on creation
>>  - Return -ETIMEDOUT instead of -EIO if there is timeout while transferring 
>> an
>>I2C message
>>  - Instead of waiting for 1-2 bytes to transfer, wait for the time it would
>>take for remaining bytes to transfer (limited by FIFO size)
>>  - Add additional comments
>>
>> Changes for v3:
>>  - Explain why drm_do_get_edid should be used and why it's better to expose 
>> it
>>as an I2C adapter in commit message
>>  - Reorder bit defines in descending order for consistency
>>  - Keep old unused macros instead of removing them
>>  - The v2 algorithm split large transfers into 16 byte transfers but this may
>>cause a large single write to be treated as multiple writes causing data
>>corruption. The algorithm has been reworked to not split larger transfers
>>and make more use of the FIFO to avoid this.
>>  - Moved the creation of the DDC clock from sun4i_hdmi_enc.c to
>>sun4i_hdmi_i2c.c
>>  - Reformatted code
>>  - Instead of masking bits that we don't want to check for errors, explicitly
>>check the error bits
>>  - Clear error bits at start of transfer in case of error from previous 
>> transfer
>>  - Poll for completion of FIFO clear after setting FIFO clear bit
>>
>> Changes for v2:
>>  - Rebased against Maxime's sunxi-drm/for-next branch
>>  - Fix up error paths in sun4i_hdmi_bind so that the I2C adapter is deleted 
>> if
>>any of the calls after the I2C adapter is created fails
>>  - Remove unnecessary includes in sun4i_hdmi_i2c.c
>>
>>  drivers/gpu/drm/sun4i/Makefile |   1 +
>>  drivers/gpu/drm/sun4i/sun4i_hdmi.h |  23 
>>  drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 101 ++
>>  drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c | 234 
>> +
>>  4 files changed, 269 insertions(+), 90 deletions(-)
>>  create mode 100644 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
>>
>
> [...]
>
>> diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 
>> b/drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
>> new file mode 100644
>> index ..ce954ee25ae4
>> --- /dev/null
>> +++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
>> @@ -0,0 +1,234 @@
>
> [...]
>
>> +static int fifo_transfer(struct sun4i_hdmi *hdmi, u8 *buf, int len, bool 
>> read)
>> +{
>> +   /*
>> +* 1 byte takes 9 clock cycles (8 bits + 1 ACK) = 90 us for 100 MHz
>

[linux-sunxi] [PATCH v7] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

The documentation for drm_do_get_edid in drivers/gpu/drm/drm_edid.c states:
"As in the general case the DDC bus is accessible by the kernel at the I2C
level, drivers must make all reasonable efforts to expose it as an I2C
adapter and use drm_get_edid() instead of abusing this function."

Exposing the DDC bus as an I2C adapter is more beneficial as it can be used
for purposes other than reading the EDID such as modifying the EDID or
using the HDMI DDC pins as an I2C bus through the I2C dev interface from
userspace (e.g. i2c-tools).

Implement this for A10s.

Signed-off-by: Jonathan Liu <net...@gmail.com>
---
Changes for v7:
 - Fix mixed declarations and code compiler warning for level variable

Changes for v6:
 - Use fixed byte time of 100 us instead of dynamically calculating from DDC
   clock that is set to a fixed 100 MHz rate anyway
 - Change is_fifo_flag_unset to not read the status register as well to be
   more consistent with is_err_status

Changes for v5:
 - Use devm_kzalloc instead of devm_kmemdup and remove const struct i2c_adapter
 - Rework to use readl_poll_timeout for checking FIFO status

Changes for v4:
 - Carry over copyright from initial I2C code into sun4i_hdmi_i2c.c
 - Clean up indentation in sun4i_hdmi.h
 - Rename SUN4I_HDMI_DDC_MAX_TRANSFER_SIZE to SUN4I_HDMI_DDC_BYTE_COUNT_MAX
   and group it under the SUN4I_HDMI_DDC_BYTE_COUNT_REG define, changing the
   value to use the GENMASK macro to make it clear that it is derived from
   the width of the field in the register
 - Fix SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_UNDERFLOW typo which should be
   SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_OVERFLOW
 - Remove redundant rewriting of SUN4I_HDMI_DDC_INT_STATUS_REG register
 - Change struct i2c_adapter to be const by using devm_kmemdup on creation
 - Return -ETIMEDOUT instead of -EIO if there is timeout while transferring an
   I2C message
 - Instead of waiting for 1-2 bytes to transfer, wait for the time it would
   take for remaining bytes to transfer (limited by FIFO size)
 - Add additional comments

Changes for v3:
 - Explain why drm_do_get_edid should be used and why it's better to expose it
   as an I2C adapter in commit message
 - Reorder bit defines in descending order for consistency
 - Keep old unused macros instead of removing them
 - The v2 algorithm split large transfers into 16 byte transfers but this may
   cause a large single write to be treated as multiple writes causing data
   corruption. The algorithm has been reworked to not split larger transfers
   and make more use of the FIFO to avoid this.
 - Moved the creation of the DDC clock from sun4i_hdmi_enc.c to
   sun4i_hdmi_i2c.c
 - Reformatted code
 - Instead of masking bits that we don't want to check for errors, explicitly
   check the error bits
 - Clear error bits at start of transfer in case of error from previous transfer
 - Poll for completion of FIFO clear after setting FIFO clear bit

Changes for v2:
 - Rebased against Maxime's sunxi-drm/for-next branch
 - Fix up error paths in sun4i_hdmi_bind so that the I2C adapter is deleted if
   any of the calls after the I2C adapter is created fails
 - Remove unnecessary includes in sun4i_hdmi_i2c.c

 drivers/gpu/drm/sun4i/Makefile |   1 +
 drivers/gpu/drm/sun4i/sun4i_hdmi.h |  23 
 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 101 ++
 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c | 234 +
 4 files changed, 269 insertions(+), 90 deletions(-)
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c

diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index e29fd3a2ba9c..43c753cafc88 100644
--- a/drivers/gpu/drm/sun4i/Makefile
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -2,6 +2,7 @@ sun4i-drm-y += sun4i_drv.o
 sun4i-drm-y += sun4i_framebuffer.o
 
 sun4i-drm-hdmi-y += sun4i_hdmi_enc.o
+sun4i-drm-hdmi-y += sun4i_hdmi_i2c.o
 sun4i-drm-hdmi-y += sun4i_hdmi_ddc_clk.o
 sun4i-drm-hdmi-y += sun4i_hdmi_tmds_clk.o
 
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi.h 
b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
index 2f2f2ff1ea63..eaff92fe236c 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi.h
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
@@ -96,6 +96,7 @@
 #define SUN4I_HDMI_DDC_CTRL_ENABLE BIT(31)
 #define SUN4I_HDMI_DDC_CTRL_START_CMD  BIT(30)
 #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_MASK  BIT(8)
+#define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_WRITE (1 << 8)
 #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_READ  (0 << 8)
 #define SUN4I_HDMI_DDC_CTRL_RESET  BIT(0)
 
@@ -105,14 +106,33 @@
 #define SUN4I_HDMI_DDC_ADDR_OFFSET(off)(((off) & 0xff) << 8)
 #define SUN4I_HDMI_DDC_ADDR_SLAVE(addr)((addr) & 0xff)
 
+#define SUN4I_HDMI_DDC_INT_STATUS_REG  0x50c
+#define SUN4I_HDMI_DDC_INT_STATUS_ILLEGAL_FIFO_OPERATION   BIT(7)
+#define SUN4I_HDMI_DDC_INT_STATUS_DDC_RX_FIFO_UNDERFLOWBIT(6)
+#define SUN4I_HDMI_DDC_INT_STATUS_DD

[linux-sunxi] [PATCH v6] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

The documentation for drm_do_get_edid in drivers/gpu/drm/drm_edid.c states:
"As in the general case the DDC bus is accessible by the kernel at the I2C
level, drivers must make all reasonable efforts to expose it as an I2C
adapter and use drm_get_edid() instead of abusing this function."

Exposing the DDC bus as an I2C adapter is more beneficial as it can be used
for purposes other than reading the EDID such as modifying the EDID or
using the HDMI DDC pins as an I2C bus through the I2C dev interface from
userspace (e.g. i2c-tools).

Implement this for A10s.

Signed-off-by: Jonathan Liu <net...@gmail.com>
---
Changes for v6:
 - Use fixed byte time of 100 us instead of dynamically calculating from DDC
   clock that is set to a fixed 100 MHz rate anyway
 - Change is_fifo_flag_unset to not read the status register as well to be
   more consistent with is_err_status

Changes for v5:
 - Use devm_kzalloc instead of devm_kmemdup and remove const struct i2c_adapter
 - Rework to use readl_poll_timeout for checking FIFO status

Changes for v4:
 - Carry over copyright from initial I2C code into sun4i_hdmi_i2c.c
 - Clean up indentation in sun4i_hdmi.h
 - Rename SUN4I_HDMI_DDC_MAX_TRANSFER_SIZE to SUN4I_HDMI_DDC_BYTE_COUNT_MAX
   and group it under the SUN4I_HDMI_DDC_BYTE_COUNT_REG define, changing the
   value to use the GENMASK macro to make it clear that it is derived from
   the width of the field in the register
 - Fix SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_UNDERFLOW typo which should be
   SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_OVERFLOW
 - Remove redundant rewriting of SUN4I_HDMI_DDC_INT_STATUS_REG register
 - Change struct i2c_adapter to be const by using devm_kmemdup on creation
 - Return -ETIMEDOUT instead of -EIO if there is timeout while transferring an
   I2C message
 - Instead of waiting for 1-2 bytes to transfer, wait for the time it would
   take for remaining bytes to transfer (limited by FIFO size)
 - Add additional comments

Changes for v3:
 - Explain why drm_do_get_edid should be used and why it's better to expose it
   as an I2C adapter in commit message
 - Reorder bit defines in descending order for consistency
 - Keep old unused macros instead of removing them
 - The v2 algorithm split large transfers into 16 byte transfers but this may
   cause a large single write to be treated as multiple writes causing data
   corruption. The algorithm has been reworked to not split larger transfers
   and make more use of the FIFO to avoid this.
 - Moved the creation of the DDC clock from sun4i_hdmi_enc.c to
   sun4i_hdmi_i2c.c
 - Reformatted code
 - Instead of masking bits that we don't want to check for errors, explicitly
   check the error bits
 - Clear error bits at start of transfer in case of error from previous transfer
 - Poll for completion of FIFO clear after setting FIFO clear bit

Changes for v2:
 - Rebased against Maxime's sunxi-drm/for-next branch
 - Fix up error paths in sun4i_hdmi_bind so that the I2C adapter is deleted if
   any of the calls after the I2C adapter is created fails
 - Remove unnecessary includes in sun4i_hdmi_i2c.c

 drivers/gpu/drm/sun4i/Makefile |   1 +
 drivers/gpu/drm/sun4i/sun4i_hdmi.h |  23 
 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 101 ++
 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c | 233 +
 4 files changed, 268 insertions(+), 90 deletions(-)
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c

diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index e29fd3a2ba9c..43c753cafc88 100644
--- a/drivers/gpu/drm/sun4i/Makefile
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -2,6 +2,7 @@ sun4i-drm-y += sun4i_drv.o
 sun4i-drm-y += sun4i_framebuffer.o
 
 sun4i-drm-hdmi-y += sun4i_hdmi_enc.o
+sun4i-drm-hdmi-y += sun4i_hdmi_i2c.o
 sun4i-drm-hdmi-y += sun4i_hdmi_ddc_clk.o
 sun4i-drm-hdmi-y += sun4i_hdmi_tmds_clk.o
 
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi.h 
b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
index 2f2f2ff1ea63..eaff92fe236c 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi.h
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
@@ -96,6 +96,7 @@
 #define SUN4I_HDMI_DDC_CTRL_ENABLE BIT(31)
 #define SUN4I_HDMI_DDC_CTRL_START_CMD  BIT(30)
 #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_MASK  BIT(8)
+#define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_WRITE (1 << 8)
 #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_READ  (0 << 8)
 #define SUN4I_HDMI_DDC_CTRL_RESET  BIT(0)
 
@@ -105,14 +106,33 @@
 #define SUN4I_HDMI_DDC_ADDR_OFFSET(off)(((off) & 0xff) << 8)
 #define SUN4I_HDMI_DDC_ADDR_SLAVE(addr)((addr) & 0xff)
 
+#define SUN4I_HDMI_DDC_INT_STATUS_REG  0x50c
+#define SUN4I_HDMI_DDC_INT_STATUS_ILLEGAL_FIFO_OPERATION   BIT(7)
+#define SUN4I_HDMI_DDC_INT_STATUS_DDC_RX_FIFO_UNDERFLOWBIT(6)
+#define SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_OVERFLOW BIT(5)
+#define SUN4I_HDMI_DDC_INT_STATUS_FI

[linux-sunxi] Re: [PATCH v5] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

Hi Maxime,

On 28 June 2017 at 19:20, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Wed, Jun 28, 2017 at 12:36:52AM +1000, Jonathan Liu wrote:
>> +#define SUN4I_HDMI_DDC_INT_STATUS_ERROR_MASK ( \
>> + SUN4I_HDMI_DDC_INT_STATUS_ILLEGAL_FIFO_OPERATION | \
>> + SUN4I_HDMI_DDC_INT_STATUS_DDC_RX_FIFO_UNDERFLOW | \
>> + SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_OVERFLOW | \
>> + SUN4I_HDMI_DDC_INT_STATUS_ARBITRATION_ERROR | \
>> + SUN4I_HDMI_DDC_INT_STATUS_ACK_ERROR | \
>> + SUN4I_HDMI_DDC_INT_STATUS_BUS_ERROR \
>> +)
>> +
>> +static bool is_err_status(u32 int_status)
>> +{
>> + return !!(int_status & SUN4I_HDMI_DDC_INT_STATUS_ERROR_MASK);
>> +}
>> +
>> +static bool is_fifo_flag_unset(struct sun4i_hdmi *hdmi, u32 *fifo_status,
>> +u32 flag)
>> +{
>> + *fifo_status = readl(hdmi->base + SUN4I_HDMI_DDC_FIFO_STATUS_REG);
>> + return !(*fifo_status & flag);
>> +}
>> +
>> +static int fifo_transfer(struct sun4i_hdmi *hdmi, u8 *buf, int len, bool 
>> read)
>> +{
>> + /* 1 byte takes 9 clock cycles (8 bits + 1 ACK) */
>> + unsigned long byte_time = DIV_ROUND_UP(USEC_PER_SEC,
>> +clk_get_rate(hdmi->ddc_clk)) * 
>> 9;
>
> There's no real need for it to be dynamic. The clock rate will not
> change, and the order of magnitude is roughly 100us, so let's just use
> that (and make a comment).
>

Ok.

>> + u32 int_status;
>> + u32 fifo_status;
>> + /* Read needs empty flag unset, write needs full flag unset */
>> + u32 flag = read ? SUN4I_HDMI_DDC_FIFO_STATUS_EMPTY :
>> +   SUN4I_HDMI_DDC_FIFO_STATUS_FULL;
>> + int ret;
>> +
>> + /* Wait until error or FIFO ready */
>> + ret = readl_poll_timeout(hdmi->base + SUN4I_HDMI_DDC_INT_STATUS_REG,
>> +  int_status,
>> +  is_err_status(int_status) ||
>> +  is_fifo_flag_unset(hdmi, _status, flag),
>> +  min(len, SUN4I_HDMI_DDC_FIFO_SIZE) * 
>> byte_time,
>> +  10);
>> +
>> + if (is_err_status(int_status))
>> + return -EIO;
>> + if (ret)
>> + return -ETIMEDOUT;
>
> Why not just have
> ret = readl_poll_timeout(hdmi->base + SUN4I_HDMI_DDC_FIFO_STATUS_REG, reg,
>  !(reg & flag), 100, 10);
>
> if (ret < 0)
> if (is_err_status())
> return -EIO;
> return ret;
>
>

If I check error status after readl_poll_timeout and there is an error
(e.g. the I2C address does not have a corresponding device connected
or nothing connected to HDMI port) it will keep checking the fifo
status even though error bit is set in the int status and then timeout
after 100 ms. If it checks the int status register at the same time,
it will error after 100 nanoseconds. I don't want to introduce
unnecessary delays considering part of the reason for adding this
driver to make it more usable for non-standard use cases.

>> +
>> + /* Read FIFO level */
>> + int level = (int)(fifo_status & SUN4I_HDMI_DDC_FIFO_STATUS_LEVEL_MASK);
>
> and explicitly read the fifo status here. That will make you remove
> that function that does two things while claiming that it does only
> one, and it will be more obvious.
>

I will fix the is_fifo_flag_unset function so it only does one thing.

> You can also just use reg at this point, instead of reading it once
> again.
>
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com

Regards,
Jonathan

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[linux-sunxi] [PATCH v5] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

The documentation for drm_do_get_edid in drivers/gpu/drm/drm_edid.c states:
"As in the general case the DDC bus is accessible by the kernel at the I2C
level, drivers must make all reasonable efforts to expose it as an I2C
adapter and use drm_get_edid() instead of abusing this function."

Exposing the DDC bus as an I2C adapter is more beneficial as it can be used
for purposes other than reading the EDID such as modifying the EDID or
using the HDMI DDC pins as an I2C bus through the I2C dev interface from
userspace (e.g. i2c-tools).

Implement this for A10s.

Signed-off-by: Jonathan Liu <net...@gmail.com>
---
Changes for v5:
 - Use devm_kzalloc instead of devm_kmemdup and remove const struct i2c_adapter
 - Rework to use readl_poll_timeout for checking FIFO status

Changes for v4:
 - Carry over copyright from initial I2C code into sun4i_hdmi_i2c.c
 - Clean up indentation in sun4i_hdmi.h
 - Rename SUN4I_HDMI_DDC_MAX_TRANSFER_SIZE to SUN4I_HDMI_DDC_BYTE_COUNT_MAX
   and group it under the SUN4I_HDMI_DDC_BYTE_COUNT_REG define, changing the
   value to use the GENMASK macro to make it clear that it is derived from
   the width of the field in the register
 - Fix SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_UNDERFLOW typo which should be
   SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_OVERFLOW
 - Remove redundant rewriting of SUN4I_HDMI_DDC_INT_STATUS_REG register
 - Change struct i2c_adapter to be const by using devm_kmemdup on creation
 - Return -ETIMEDOUT instead of -EIO if there is timeout while transferring an
   I2C message
 - Instead of waiting for 1-2 bytes to transfer, wait for the time it would
   take for remaining bytes to transfer (limited by FIFO size)
 - Add additional comments

Changes for v3:
 - Explain why drm_do_get_edid should be used and why it's better to expose it
   as an I2C adapter in commit message
 - Reorder bit defines in descending order for consistency
 - Keep old unused macros instead of removing them
 - The v2 algorithm split large transfers into 16 byte transfers but this may
   cause a large single write to be treated as multiple writes causing data
   corruption. The algorithm has been reworked to not split larger transfers
   and make more use of the FIFO to avoid this.
 - Moved the creation of the DDC clock from sun4i_hdmi_enc.c to
   sun4i_hdmi_i2c.c
 - Reformatted code
 - Instead of masking bits that we don't want to check for errors, explicitly
   check the error bits
 - Clear error bits at start of transfer in case of error from previous transfer
 - Poll for completion of FIFO clear after setting FIFO clear bit

Changes for v2:
 - Rebased against Maxime's sunxi-drm/for-next branch
 - Fix up error paths in sun4i_hdmi_bind so that the I2C adapter is deleted if
   any of the calls after the I2C adapter is created fails
 - Remove unnecessary includes in sun4i_hdmi_i2c.c

 drivers/gpu/drm/sun4i/Makefile |   1 +
 drivers/gpu/drm/sun4i/sun4i_hdmi.h |  23 
 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 101 ++-
 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c | 226 +
 4 files changed, 261 insertions(+), 90 deletions(-)
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c

diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index e29fd3a2ba9c..43c753cafc88 100644
--- a/drivers/gpu/drm/sun4i/Makefile
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -2,6 +2,7 @@ sun4i-drm-y += sun4i_drv.o
 sun4i-drm-y += sun4i_framebuffer.o
 
 sun4i-drm-hdmi-y += sun4i_hdmi_enc.o
+sun4i-drm-hdmi-y += sun4i_hdmi_i2c.o
 sun4i-drm-hdmi-y += sun4i_hdmi_ddc_clk.o
 sun4i-drm-hdmi-y += sun4i_hdmi_tmds_clk.o
 
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi.h 
b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
index 2f2f2ff1ea63..eaff92fe236c 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi.h
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
@@ -96,6 +96,7 @@
 #define SUN4I_HDMI_DDC_CTRL_ENABLE BIT(31)
 #define SUN4I_HDMI_DDC_CTRL_START_CMD  BIT(30)
 #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_MASK  BIT(8)
+#define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_WRITE (1 << 8)
 #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_READ  (0 << 8)
 #define SUN4I_HDMI_DDC_CTRL_RESET  BIT(0)
 
@@ -105,14 +106,33 @@
 #define SUN4I_HDMI_DDC_ADDR_OFFSET(off)(((off) & 0xff) << 8)
 #define SUN4I_HDMI_DDC_ADDR_SLAVE(addr)((addr) & 0xff)
 
+#define SUN4I_HDMI_DDC_INT_STATUS_REG  0x50c
+#define SUN4I_HDMI_DDC_INT_STATUS_ILLEGAL_FIFO_OPERATION   BIT(7)
+#define SUN4I_HDMI_DDC_INT_STATUS_DDC_RX_FIFO_UNDERFLOWBIT(6)
+#define SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_OVERFLOW BIT(5)
+#define SUN4I_HDMI_DDC_INT_STATUS_FIFO_REQUEST BIT(4)
+#define SUN4I_HDMI_DDC_INT_STATUS_ARBITRATION_ERRORBIT(3)
+#define SUN4I_HDMI_DDC_INT_STATUS_ACK_ERRORBIT(2)
+#define SUN4I_HDMI_DDC_INT_STATUS_BUS_ERRORBIT(1)
+#define SUN4I_HDMI_DDC_INT

[linux-sunxi] Re: [PATCH v4] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

Hi Maxime,

On 27 June 2017 at 05:05, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Sat, Jun 24, 2017 at 04:10:54PM +1000, Jonathan Liu wrote:
>> The documentation for drm_do_get_edid in drivers/gpu/drm/drm_edid.c states:
>> "As in the general case the DDC bus is accessible by the kernel at the I2C
>> level, drivers must make all reasonable efforts to expose it as an I2C
>> adapter and use drm_get_edid() instead of abusing this function."
>>
>> Exposing the DDC bus as an I2C adapter is more beneficial as it can be used
>> for purposes other than reading the EDID such as modifying the EDID or
>> using the HDMI DDC pins as an I2C bus through the I2C dev interface from
>> userspace (e.g. i2c-tools).
>>
>> Implement this for A10s.
>>
>> Signed-off-by: Jonathan Liu <net...@gmail.com>
>> ---
>> Changes for v4:
>>  - Carry over copyright from initial I2C code into sun4i_hdmi_i2c.c
>>  - Clean up indentation in sun4i_hdmi.h
>>  - Rename SUN4I_HDMI_DDC_MAX_TRANSFER_SIZE to SUN4I_HDMI_DDC_BYTE_COUNT_MAX
>>and group it under the SUN4I_HDMI_DDC_BYTE_COUNT_REG define, changing the
>>value to use the GENMASK macro to make it clear that it is derived from
>>the width of the field in the register
>>  - Fix SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_UNDERFLOW typo which should be
>>SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_OVERFLOW
>>  - Remove redundant rewriting of SUN4I_HDMI_DDC_INT_STATUS_REG register
>>  - Change struct i2c_adapter to be const by using devm_kmemdup on creation
>>  - Return -ETIMEDOUT instead of -EIO if there is timeout while transferring 
>> an
>>I2C message
>>  - Instead of waiting for 1-2 bytes to transfer, wait for the time it would
>>take for remaining bytes to transfer (limited by FIFO size)
>>  - Add additional comments
>>
>> Changes for v3:
>>  - Explain why drm_do_get_edid should be used and why it's better to expose 
>> it
>>as an I2C adapter in commit message
>>  - Reorder bit defines in descending order for consistency
>>  - Keep old unused macros instead of removing them
>>  - The v2 algorithm split large transfers into 16 byte transfers but this may
>>cause a large single write to be treated as multiple writes causing data
>>corruption. The algorithm has been reworked to not split larger transfers
>>and make more use of the FIFO to avoid this.
>>  - Moved the creation of the DDC clock from sun4i_hdmi_enc.c to
>>sun4i_hdmi_i2c.c
>>  - Reformatted code
>>  - Instead of masking bits that we don't want to check for errors, explicitly
>>check the error bits
>>  - Clear error bits at start of transfer in case of error from previous 
>> transfer
>>  - Poll for completion of FIFO clear after setting FIFO clear bit
>>
>> Changes for v2:
>>  - Rebased against Maxime's sunxi-drm/for-next branch
>>  - Fix up error paths in sun4i_hdmi_bind so that the I2C adapter is deleted 
>> if
>>any of the calls after the I2C adapter is created fails
>>  - Remove unnecessary includes in sun4i_hdmi_i2c.c
>>
>>  drivers/gpu/drm/sun4i/Makefile |   1 +
>>  drivers/gpu/drm/sun4i/sun4i_hdmi.h |  23 
>>  drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 101 ++
>>  drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c | 242 
>> +
>>  4 files changed, 277 insertions(+), 90 deletions(-)
>>  create mode 100644 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
>>
>> diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
>> index e29fd3a2ba9c..43c753cafc88 100644
>> --- a/drivers/gpu/drm/sun4i/Makefile
>> +++ b/drivers/gpu/drm/sun4i/Makefile
>> @@ -2,6 +2,7 @@ sun4i-drm-y += sun4i_drv.o
>>  sun4i-drm-y += sun4i_framebuffer.o
>>
>>  sun4i-drm-hdmi-y += sun4i_hdmi_enc.o
>> +sun4i-drm-hdmi-y += sun4i_hdmi_i2c.o
>>  sun4i-drm-hdmi-y += sun4i_hdmi_ddc_clk.o
>>  sun4i-drm-hdmi-y += sun4i_hdmi_tmds_clk.o
>>
>> diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi.h 
>> b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
>> index 2f2f2ff1ea63..eaff92fe236c 100644
>> --- a/drivers/gpu/drm/sun4i/sun4i_hdmi.h
>> +++ b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
>> @@ -96,6 +96,7 @@
>>  #define SUN4I_HDMI_DDC_CTRL_ENABLE   BIT(31)
>>  #define SUN4I_HDMI_DDC_CTRL_START_CMDBIT(30)
>>  #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_MASKBIT(8)
>> +#define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_WRITE   (1 << 8)
>>  #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_READ(0 << 8)
>>  #de

[linux-sunxi] [PATCH] ARM: dts: sun4i: Add A10 LCD0 RGB888 pins

[Jonathan Liu]

The LCD0 controller on the A10 can do RGB output up to 8 bits per
channel. Add the pins for RGB888 output.

Signed-off-by: Jonathan Liu <net...@gmail.com>
---
 arch/arm/boot/dts/sun4i-a10.dtsi | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index b63668ece151..6fa2622a78c2 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -1022,6 +1022,17 @@
function = "ir1";
};
 
+   lcd0_rgb888_pins: lcd0_rgb888@0 {
+   pins = "PD0", "PD1", "PD2", "PD3",
+  "PD4", "PD5", "PD6", "PD7",
+  "PD8", "PD9", "PD10", "PD11",
+  "PD12", "PD13", "PD14", "PD15",
+  "PD16", "PD17", "PD18", "PD19",
+  "PD20", "PD21", "PD22", "PD23",
+  "PD24", "PD25", "PD26", "PD27";
+   function = "lcd0";
+   };
+
mmc0_pins_a: mmc0@0 {
pins = "PF0", "PF1", "PF2",
   "PF3", "PF4", "PF5";
-- 
2.13.1

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[linux-sunxi] [PATCH v2] ARM: dts: sun7i: Add A20 LCD0 RGB888 pins

[Jonathan Liu]

The LCD0 controller on the A20 can do RGB output up to 8 bits per
channel. Add the pins for RGB888 output.

Signed-off-by: Jonathan Liu <net...@gmail.com>
---
Changes for v2:
 - Remove "allwinner," prefix from pins and function

 arch/arm/boot/dts/sun7i-a20.dtsi | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 96bee776e145..ac025d1fb348 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -1183,6 +1183,17 @@
function = "ir1";
};
 
+   lcd0_rgb888_pins: lcd0_rgb888@0 {
+   pins = "PD0", "PD1", "PD2", "PD3",
+  "PD4", "PD5", "PD6", "PD7",
+  "PD8", "PD9", "PD10", "PD11",
+  "PD12", "PD13", "PD14", "PD15",
+  "PD16", "PD17", "PD18", "PD19",
+  "PD20", "PD21", "PD22", "PD23",
+  "PD24", "PD25", "PD26", "PD27";
+   function = "lcd0";
+   };
+
mmc0_pins_a: mmc0@0 {
pins = "PF0", "PF1", "PF2",
   "PF3", "PF4", "PF5";
-- 
2.13.1

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[linux-sunxi] Re: [PATCH] ARM: dts: sun7i: Add A20 LCD0 RGB888 pins

[Jonathan Liu]

Hi Emmanuel,

On 26 June 2017 at 22:45, Emmanuel Vadot <m...@bidouilliste.com> wrote:
> On Mon, 26 Jun 2017 22:42:49 +1000
> Jonathan Liu <net...@gmail.com> wrote:
>
>> The LCD0 controller on the A20 can do RGB output up to 8 bits per
>> channel. Add the pins for RGB888 output.
>>
>> Signed-off-by: Jonathan Liu <net...@gmail.com>
>> ---
>>  arch/arm/boot/dts/sun7i-a20.dtsi | 11 +++
>>  1 file changed, 11 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi 
>> b/arch/arm/boot/dts/sun7i-a20.dtsi
>> index 96bee776e145..09a0e89bed11 100644
>> --- a/arch/arm/boot/dts/sun7i-a20.dtsi
>> +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
>> @@ -1183,6 +1183,17 @@
>>   function = "ir1";
>>   };
>>
>> + lcd0_rgb888_pins: lcd0_rgb888@0 {
>> + allwinner,pins = "PD0", "PD1", "PD2", "PD3",
>> +  "PD4", "PD5", "PD6", "PD7",
>> +  "PD8", "PD9", "PD10", "PD11",
>> +  "PD12", "PD13", "PD14", 
>> "PD15",
>> +  "PD16", "PD17", "PD18", 
>> "PD19",
>> +  "PD20", "PD21", "PD22", 
>> "PD23",
>> +  "PD24", "PD25", "PD26", 
>> "PD27";
>> + allwinner,function = "lcd0";
>> + };
>> +
>
>  We switch to standard pinctrl bindings so you need to use 'pins' and
> 'function' (i.e. without the 'allwinner,' prefix).
>

Thanks, I will change it for V2.

>>   mmc0_pins_a: mmc0@0 {
>>   pins = "PF0", "PF1", "PF2",
>>  "PF3", "PF4", "PF5";
>> --
>> 2.13.1
>>
>>
>> ___
>> linux-arm-kernel mailing list
>> linux-arm-ker...@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
>
> --
> Emmanuel Vadot <m...@bidouilliste.com> <m...@freebsd.org>

Regards,
Jonathan

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[linux-sunxi] [PATCH] ARM: dts: sun7i: Add A20 LCD0 RGB888 pins

[Jonathan Liu]

The LCD0 controller on the A20 can do RGB output up to 8 bits per
channel. Add the pins for RGB888 output.

Signed-off-by: Jonathan Liu <net...@gmail.com>
---
 arch/arm/boot/dts/sun7i-a20.dtsi | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 96bee776e145..09a0e89bed11 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -1183,6 +1183,17 @@
function = "ir1";
};
 
+   lcd0_rgb888_pins: lcd0_rgb888@0 {
+   allwinner,pins = "PD0", "PD1", "PD2", "PD3",
+"PD4", "PD5", "PD6", "PD7",
+"PD8", "PD9", "PD10", "PD11",
+"PD12", "PD13", "PD14", "PD15",
+"PD16", "PD17", "PD18", "PD19",
+"PD20", "PD21", "PD22", "PD23",
+"PD24", "PD25", "PD26", "PD27";
+   allwinner,function = "lcd0";
+   };
+
mmc0_pins_a: mmc0@0 {
pins = "PF0", "PF1", "PF2",
   "PF3", "PF4", "PF5";
-- 
2.13.1

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Re: [linux-sunxi] [PATCH v4 1/6] clk: sunxi-ng: div: Add support for fixed post-divider

[Jonathan Liu]

Hi Priit,

On 26 June 2017 at 15:53, Priit Laes <pl...@plaes.org> wrote:
> On Mon, Jun 26, 2017 at 08:05:16AM +1000, Jonathan Liu wrote:
>> Hi Priit,
>>
>> This is showing from clock rate of 171428572 in the output of "cat
>> /sys/kernel/debug/clk/clk_summary" for pll-periph-sata.
>> The clock rate should be 1 (100 MHz) when read from the hardware.
>
> This is what I see on Cubietruck. Can you check with sunxi-ccu-wip branch?
>
> $ cat /sys/kernel/debug/clk/clk_summary  |grep -i sata
>   pll-periph-sata 11   1  
> 0 0
>  sata 11   1  
> 0 0
> ahb-sata  11   3  
> 0 0
>

I checked with your sunxi-ccu-wip branch and I get the same results as
you. My branch seems out of date.

>>
>> On 26 June 2017 at 06:45, Priit Laes <pl...@plaes.org> wrote:
>> > SATA clock on sun4i/sun7i is of type (parent) / M / 6 where
>> > 6 is fixed post-divider.
>> >
>> > Signed-off-by: Priit Laes <pl...@plaes.org>
>> > ---
>> >  drivers/clk/sunxi-ng/ccu_div.c | 12 ++--
>> >  drivers/clk/sunxi-ng/ccu_div.h |  3 ++-
>> >  2 files changed, 12 insertions(+), 3 deletions(-)
>> >
>> > diff --git a/drivers/clk/sunxi-ng/ccu_div.c 
>> > b/drivers/clk/sunxi-ng/ccu_div.c
>> > index c0e5c10..de30e15 100644
>> > --- a/drivers/clk/sunxi-ng/ccu_div.c
>> > +++ b/drivers/clk/sunxi-ng/ccu_div.c
>>
>> Missing handling of fixed_post_div in ccu_div_round_rate.
>> ccu_div_round_rate should multiply the rate by the postdiv before
>> looking up the divider using divider_get_val and divide val by postdiv
>> just before returning.
>>

Ignore the above comment, my branch is out of date.

>> > @@ -62,8 +62,13 @@ static unsigned long ccu_div_recalc_rate(struct clk_hw 
>> > *hw,
>> > parent_rate = ccu_mux_helper_apply_prediv(>common, >mux, 
>> > -1,
>> >   parent_rate);
>> >
>> > -   return divider_recalc_rate(hw, parent_rate, val, cd->div.table,
>> > -  cd->div.flags);
>> > +   val = divider_recalc_rate(hw, parent_rate, val, cd->div.table,
>> > + cd->div.flags);
>> > +
>> > +   if (cd->common.features & CCU_FEATURE_FIXED_POSTDIV)
>> > +   val /= cd->fixed_post_div;
>> > +
>> > +   return val;
>> >  }
>> >
>> >  static int ccu_div_determine_rate(struct clk_hw *hw,
>>
>> > @@ -89,6 +94,9 @@ static int ccu_div_set_rate(struct clk_hw *hw, unsigned 
>> > long rate,
>> > val = divider_get_val(rate, parent_rate, cd->div.table, 
>> > cd->div.width,
>> >   cd->div.flags);
>> >
>> > +   if (cd->common.features & CCU_FEATURE_FIXED_POSTDIV)
>> > +   val *= cd->fixed_post_div;
>> > +
>> > spin_lock_irqsave(cd->common.lock, flags);
>> >
>> > reg = readl(cd->common.base + cd->common.reg);
>>
>> val here is the divider value that is stored in the clock register
>> field not the actual rate so this is incorrect. Instead the rate needs
>> to be multiplied by postdiv just before divider_get_val.
>
> OK, thanks, this one I wasn't really sure about.
>

Please do fix setting the rate though.

>>
>> > diff --git a/drivers/clk/sunxi-ng/ccu_div.h 
>> > b/drivers/clk/sunxi-ng/ccu_div.h
>> > index 08d0744..f3a5028 100644
>> > --- a/drivers/clk/sunxi-ng/ccu_div.h
>> > +++ b/drivers/clk/sunxi-ng/ccu_div.h
>> > @@ -86,9 +86,10 @@ struct ccu_div_internal {
>> >  struct ccu_div {
>> > u32 enable;
>> >
>> > -   struct ccu_div_internal div;
>> > +   struct ccu_div_internal div;
>> > struct ccu_mux_internal mux;
>> > struct ccu_common   common;
>> > +   unsigned intfixed_post_div;
>> >  };
>> >
>> >  #define SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg,   \
>> > --
>> > git-series 0.9.1
>>
>> Thanks.
>>
>> Regards,
>> Jonathan

Regards,
Jonathan

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Re: [linux-sunxi] [PATCH v4 1/6] clk: sunxi-ng: div: Add support for fixed post-divider

[Jonathan Liu]

Hi Priit,

This is showing from clock rate of 171428572 in the output of "cat
/sys/kernel/debug/clk/clk_summary" for pll-periph-sata.
The clock rate should be 1 (100 MHz) when read from the hardware.

On 26 June 2017 at 06:45, Priit Laes  wrote:
> SATA clock on sun4i/sun7i is of type (parent) / M / 6 where
> 6 is fixed post-divider.
>
> Signed-off-by: Priit Laes 
> ---
>  drivers/clk/sunxi-ng/ccu_div.c | 12 ++--
>  drivers/clk/sunxi-ng/ccu_div.h |  3 ++-
>  2 files changed, 12 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/sunxi-ng/ccu_div.c b/drivers/clk/sunxi-ng/ccu_div.c
> index c0e5c10..de30e15 100644
> --- a/drivers/clk/sunxi-ng/ccu_div.c
> +++ b/drivers/clk/sunxi-ng/ccu_div.c

Missing handling of fixed_post_div in ccu_div_round_rate.
ccu_div_round_rate should multiply the rate by the postdiv before
looking up the divider using divider_get_val and divide val by postdiv
just before returning.

> @@ -62,8 +62,13 @@ static unsigned long ccu_div_recalc_rate(struct clk_hw *hw,
> parent_rate = ccu_mux_helper_apply_prediv(>common, >mux, -1,
>   parent_rate);
>
> -   return divider_recalc_rate(hw, parent_rate, val, cd->div.table,
> -  cd->div.flags);
> +   val = divider_recalc_rate(hw, parent_rate, val, cd->div.table,
> + cd->div.flags);
> +
> +   if (cd->common.features & CCU_FEATURE_FIXED_POSTDIV)
> +   val /= cd->fixed_post_div;
> +
> +   return val;
>  }
>
>  static int ccu_div_determine_rate(struct clk_hw *hw,

> @@ -89,6 +94,9 @@ static int ccu_div_set_rate(struct clk_hw *hw, unsigned 
> long rate,
> val = divider_get_val(rate, parent_rate, cd->div.table, cd->div.width,
>   cd->div.flags);
>
> +   if (cd->common.features & CCU_FEATURE_FIXED_POSTDIV)
> +   val *= cd->fixed_post_div;
> +
> spin_lock_irqsave(cd->common.lock, flags);
>
> reg = readl(cd->common.base + cd->common.reg);

val here is the divider value that is stored in the clock register
field not the actual rate so this is incorrect. Instead the rate needs
to be multiplied by postdiv just before divider_get_val.

> diff --git a/drivers/clk/sunxi-ng/ccu_div.h b/drivers/clk/sunxi-ng/ccu_div.h
> index 08d0744..f3a5028 100644
> --- a/drivers/clk/sunxi-ng/ccu_div.h
> +++ b/drivers/clk/sunxi-ng/ccu_div.h
> @@ -86,9 +86,10 @@ struct ccu_div_internal {
>  struct ccu_div {
> u32 enable;
>
> -   struct ccu_div_internal div;
> +   struct ccu_div_internal div;
> struct ccu_mux_internal mux;
> struct ccu_common   common;
> +   unsigned intfixed_post_div;
>  };
>
>  #define SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg,   \
> --
> git-series 0.9.1

Thanks.

Regards,
Jonathan

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[linux-sunxi] [PATCH v4] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

The documentation for drm_do_get_edid in drivers/gpu/drm/drm_edid.c states:
"As in the general case the DDC bus is accessible by the kernel at the I2C
level, drivers must make all reasonable efforts to expose it as an I2C
adapter and use drm_get_edid() instead of abusing this function."

Exposing the DDC bus as an I2C adapter is more beneficial as it can be used
for purposes other than reading the EDID such as modifying the EDID or
using the HDMI DDC pins as an I2C bus through the I2C dev interface from
userspace (e.g. i2c-tools).

Implement this for A10s.

Signed-off-by: Jonathan Liu <net...@gmail.com>
---
Changes for v4:
 - Carry over copyright from initial I2C code into sun4i_hdmi_i2c.c
 - Clean up indentation in sun4i_hdmi.h
 - Rename SUN4I_HDMI_DDC_MAX_TRANSFER_SIZE to SUN4I_HDMI_DDC_BYTE_COUNT_MAX
   and group it under the SUN4I_HDMI_DDC_BYTE_COUNT_REG define, changing the
   value to use the GENMASK macro to make it clear that it is derived from
   the width of the field in the register
 - Fix SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_UNDERFLOW typo which should be
   SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_OVERFLOW
 - Remove redundant rewriting of SUN4I_HDMI_DDC_INT_STATUS_REG register
 - Change struct i2c_adapter to be const by using devm_kmemdup on creation
 - Return -ETIMEDOUT instead of -EIO if there is timeout while transferring an
   I2C message
 - Instead of waiting for 1-2 bytes to transfer, wait for the time it would
   take for remaining bytes to transfer (limited by FIFO size)
 - Add additional comments

Changes for v3:
 - Explain why drm_do_get_edid should be used and why it's better to expose it
   as an I2C adapter in commit message
 - Reorder bit defines in descending order for consistency
 - Keep old unused macros instead of removing them
 - The v2 algorithm split large transfers into 16 byte transfers but this may
   cause a large single write to be treated as multiple writes causing data
   corruption. The algorithm has been reworked to not split larger transfers
   and make more use of the FIFO to avoid this.
 - Moved the creation of the DDC clock from sun4i_hdmi_enc.c to
   sun4i_hdmi_i2c.c
 - Reformatted code
 - Instead of masking bits that we don't want to check for errors, explicitly
   check the error bits
 - Clear error bits at start of transfer in case of error from previous transfer
 - Poll for completion of FIFO clear after setting FIFO clear bit

Changes for v2:
 - Rebased against Maxime's sunxi-drm/for-next branch
 - Fix up error paths in sun4i_hdmi_bind so that the I2C adapter is deleted if
   any of the calls after the I2C adapter is created fails
 - Remove unnecessary includes in sun4i_hdmi_i2c.c

 drivers/gpu/drm/sun4i/Makefile |   1 +
 drivers/gpu/drm/sun4i/sun4i_hdmi.h |  23 
 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 101 ++
 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c | 242 +
 4 files changed, 277 insertions(+), 90 deletions(-)
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c

diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index e29fd3a2ba9c..43c753cafc88 100644
--- a/drivers/gpu/drm/sun4i/Makefile
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -2,6 +2,7 @@ sun4i-drm-y += sun4i_drv.o
 sun4i-drm-y += sun4i_framebuffer.o
 
 sun4i-drm-hdmi-y += sun4i_hdmi_enc.o
+sun4i-drm-hdmi-y += sun4i_hdmi_i2c.o
 sun4i-drm-hdmi-y += sun4i_hdmi_ddc_clk.o
 sun4i-drm-hdmi-y += sun4i_hdmi_tmds_clk.o
 
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi.h 
b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
index 2f2f2ff1ea63..eaff92fe236c 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi.h
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
@@ -96,6 +96,7 @@
 #define SUN4I_HDMI_DDC_CTRL_ENABLE BIT(31)
 #define SUN4I_HDMI_DDC_CTRL_START_CMD  BIT(30)
 #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_MASK  BIT(8)
+#define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_WRITE (1 << 8)
 #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_READ  (0 << 8)
 #define SUN4I_HDMI_DDC_CTRL_RESET  BIT(0)
 
@@ -105,14 +106,33 @@
 #define SUN4I_HDMI_DDC_ADDR_OFFSET(off)(((off) & 0xff) << 8)
 #define SUN4I_HDMI_DDC_ADDR_SLAVE(addr)((addr) & 0xff)
 
+#define SUN4I_HDMI_DDC_INT_STATUS_REG  0x50c
+#define SUN4I_HDMI_DDC_INT_STATUS_ILLEGAL_FIFO_OPERATION   BIT(7)
+#define SUN4I_HDMI_DDC_INT_STATUS_DDC_RX_FIFO_UNDERFLOWBIT(6)
+#define SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_OVERFLOW BIT(5)
+#define SUN4I_HDMI_DDC_INT_STATUS_FIFO_REQUEST BIT(4)
+#define SUN4I_HDMI_DDC_INT_STATUS_ARBITRATION_ERRORBIT(3)
+#define SUN4I_HDMI_DDC_INT_STATUS_ACK_ERRORBIT(2)
+#define SUN4I_HDMI_DDC_INT_STATUS_BUS_ERRORBIT(1)
+#define SUN4I_HDMI_DDC_INT_STATUS_TRANSFER_COMPLETEBIT(0)
+
 #define SUN4I_HDMI_DDC_FIFO_CTRL_REG   0x510
 #define SUN4I_HDMI_DDC_FIFO_CTRL_CLEAR BIT(31)
 
+#define SUN

[linux-sunxi] Re: [PATCH v3] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

Hi Maxime,

On 22 June 2017 at 07:26, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Wed, Jun 21, 2017 at 07:42:47PM +1000, Jonathan Liu wrote:
>> >> +static int wait_fifo_flag_unset(struct sun4i_hdmi *hdmi, u32 flag)
>> >> +{
>> >> + /* 1 byte takes 9 clock cycles (8 bits + 1 ack) */
>> >> + unsigned long byte_time = DIV_ROUND_UP(USEC_PER_SEC,
>> >> +clk_get_rate(hdmi->ddc_clk)) 
>> >> * 9;
>> >> + ktime_t wait_timeout = ktime_add_us(ktime_get(), 10);
>> >> + u32 reg;
>> >> +
>> >> + for (;;) {
>> >> + /* Check for errors */
>> >> + reg = readl(hdmi->base + SUN4I_HDMI_DDC_INT_STATUS_REG);
>> >> + if (reg & SUN4I_HDMI_DDC_INT_STATUS_ERROR_MASK) {
>> >> + writel(reg, hdmi->base + 
>> >> SUN4I_HDMI_DDC_INT_STATUS_REG);
>> >> + return -EIO;
>> >> + }
>> >> +
>> >> + /* Check if requested FIFO flag is unset */
>> >> + reg = readl(hdmi->base + SUN4I_HDMI_DDC_FIFO_STATUS_REG);
>> >> + if (!(reg & flag))
>> >> + return 0;
>> >> +
>> >> + /* Timeout */
>> >> + if (ktime_compare(ktime_get(), wait_timeout) > 0)
>> >> + return -EIO;
>> >> +
>> >> + /* Wait for 1-2 bytes to transfer */
>> >> + usleep_range(byte_time, 2 * byte_time);
>> >> + }
>> >> +
>> >> + return -EIO;
>> >> +}
>> >> +
>> >> +static int wait_fifo_read_ready(struct sun4i_hdmi *hdmi)
>> >> +{
>> >> + return wait_fifo_flag_unset(hdmi, SUN4I_HDMI_DDC_FIFO_STATUS_EMPTY);
>> >> +}
>> >> +
>> >> +static int wait_fifo_write_ready(struct sun4i_hdmi *hdmi)
>> >> +{
>> >> + return wait_fifo_flag_unset(hdmi, SUN4I_HDMI_DDC_FIFO_STATUS_FULL);
>> >> +}
>> >
>> > Both of these can use readl_poll_timeout, and I'm not sure you need to
>> > be that aggressive in your timings.
>> >
>> I have set my timings to minimize communication delays - e.g. when
>> userspace is reading from I2C one byte at a time (like i2cdump from
>> i2c-tools).
>
> I wouldn't try to optimise that too much. There's already a lot of
> overhead, it's way inefficient, and it's not really a significant use
> case anyway.
>

Ok.

>> readl_poll_timeout can't be used to check 2 registers at
>> once and I couldn't get DDC_FIFO_Request_Interrupt_Status_Bit in
>> DDC_Int_Status register to behave properly.
>
> Can't you just use readl_poll_timeout, and then if it timed out check
> for errors?
>

I think it is more flexible this way as I can adjust the usleep_range min.

>> I also wanted to minimize the chance of FIFO underrun/overrun.
>>
>> >> +
>> >> +static int xfer_msg(struct sun4i_hdmi *hdmi, struct i2c_msg *msg)
>> >> +{
>> >> + u32 reg;
>> >> + int i;
>> >> +
>> >> + reg = readl(hdmi->base + SUN4I_HDMI_DDC_INT_STATUS_REG);
>> >> + reg &= ~SUN4I_HDMI_DDC_INT_STATUS_ERROR_MASK;
>> >> + writel(reg, hdmi->base + SUN4I_HDMI_DDC_INT_STATUS_REG);
>> >> +
>> >> + reg = readl(hdmi->base + SUN4I_HDMI_DDC_CTRL_REG);
>> >> + reg &= ~SUN4I_HDMI_DDC_CTRL_FIFO_DIR_MASK;
>> >> + reg |= (msg->flags & I2C_M_RD) ?
>> >> +SUN4I_HDMI_DDC_CTRL_FIFO_DIR_READ :
>> >> +SUN4I_HDMI_DDC_CTRL_FIFO_DIR_WRITE;
>> >> + writel(reg, hdmi->base + SUN4I_HDMI_DDC_CTRL_REG);
>> >> +
>> >> + writel(SUN4I_HDMI_DDC_ADDR_SLAVE(msg->addr),
>> >> +hdmi->base + SUN4I_HDMI_DDC_ADDR_REG);
>> >> +
>> >> + reg = readl(hdmi->base + SUN4I_HDMI_DDC_FIFO_CTRL_REG);
>> >> + writel(reg | SUN4I_HDMI_DDC_FIFO_CTRL_CLEAR,
>> >> +hdmi->base + SUN4I_HDMI_DDC_FIFO_CTRL_REG);
>> >> +
>> >> + if (readl_poll_timeout(hdmi->base + SUN4I_HDMI_DDC_FIFO_CTRL_REG,
>> >> +reg,
>> >> +!(reg & SUN4I_HDMI_DDC_FIFO_CTRL_CLEAR),
>> >> +100, 10))
>> >

[linux-sunxi] Re: [PATCH v3] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

Hi Maxime,

On 21 June 2017 at 18:51, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Thu, Jun 15, 2017 at 01:29:33AM +1000, Jonathan Liu wrote:
>> The documentation for drm_do_get_edid in drivers/gpu/drm/drm_edid.c states:
>> "As in the general case the DDC bus is accessible by the kernel at the I2C
>> level, drivers must make all reasonable efforts to expose it as an I2C
>> adapter and use drm_get_edid() instead of abusing this function."
>>
>> Exposing the DDC bus as an I2C adapter is more beneficial as it can be used
>> for purposes other than reading the EDID such as modifying the EDID or
>> using the HDMI DDC pins as an I2C bus through the I2C dev interface from
>> userspace (e.g. i2c-tools).
>>
>> Implement this for A10s.
>>
>> Signed-off-by: Jonathan Liu <net...@gmail.com>
>> ---
>> Changes for v3:
>>  - Explain why drm_do_get_edid should be used and why it's better to expose 
>> it
>>as an I2C adapter in commit message
>>  - Reorder bit defines in descending order for consistency
>>  - Keep old unused macros instead of removing them
>>  - The v2 algorithm split large transfers into 16 byte transfers but this may
>>cause a large single write to be treated as multiple writes causing data
>>corruption. The algorithm has been reworked to not split larger transfers
>>and make more use of the FIFO to avoid this.
>>  - Moved the creation of the DDC clock from sun4i_hdmi_enc.c to
>>sun4i_hdmi_i2c.c
>>  - Reformatted code
>>  - Instead of masking bits that we don't want to check for errors, explicitly
>>check the error bits
>>  - Clear error bits at start of transfer in case of error from previous 
>> transfer
>>  - Poll for completion of FIFO clear after setting FIFO clear bit
>>
>> Changes for v2:
>>  - Rebased against Maxime's sunxi-drm/for-next branch
>>  - Fix up error paths in sun4i_hdmi_bind so that the I2C adapter is deleted 
>> if
>>any of the calls after the I2C adapter is created fails
>>  - Remove unnecessary includes in sun4i_hdmi_i2c.c
>>
>>  drivers/gpu/drm/sun4i/Makefile |   1 +
>>  drivers/gpu/drm/sun4i/sun4i_hdmi.h |  21 
>>  drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 101 ++-
>>  drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c | 220 
>> +
>>  4 files changed, 253 insertions(+), 90 deletions(-)
>>  create mode 100644 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
>>
>> diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
>> index e29fd3a2ba9c..43c753cafc88 100644
>> --- a/drivers/gpu/drm/sun4i/Makefile
>> +++ b/drivers/gpu/drm/sun4i/Makefile
>> @@ -2,6 +2,7 @@ sun4i-drm-y += sun4i_drv.o
>>  sun4i-drm-y += sun4i_framebuffer.o
>>
>>  sun4i-drm-hdmi-y += sun4i_hdmi_enc.o
>> +sun4i-drm-hdmi-y += sun4i_hdmi_i2c.o
>>  sun4i-drm-hdmi-y += sun4i_hdmi_ddc_clk.o
>>  sun4i-drm-hdmi-y += sun4i_hdmi_tmds_clk.o
>>
>> diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi.h 
>> b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
>> index 2f2f2ff1ea63..018af9cbb593 100644
>> --- a/drivers/gpu/drm/sun4i/sun4i_hdmi.h
>> +++ b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
>> @@ -96,6 +96,7 @@
>>  #define SUN4I_HDMI_DDC_CTRL_ENABLE   BIT(31)
>>  #define SUN4I_HDMI_DDC_CTRL_START_CMDBIT(30)
>>  #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_MASKBIT(8)
>> +#define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_WRITE   (1 << 8)
>>  #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_READ(0 << 8)
>>  #define SUN4I_HDMI_DDC_CTRL_RESETBIT(0)
>>
>> @@ -105,14 +106,30 @@
>>  #define SUN4I_HDMI_DDC_ADDR_OFFSET(off)  (((off) & 0xff) << 8)
>>  #define SUN4I_HDMI_DDC_ADDR_SLAVE(addr)  ((addr) & 0xff)
>>
>> +#define SUN4I_HDMI_DDC_INT_STATUS_REG0x50c
>> +#define SUN4I_HDMI_DDC_INT_STATUS_ILLEGAL_FIFO_OPERATION BIT(7)
>> +#define SUN4I_HDMI_DDC_INT_STATUS_DDC_RX_FIFO_UNDERFLOW  BIT(6)
>> +#define SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_UNDERFLOW  BIT(5)
>> +#define SUN4I_HDMI_DDC_INT_STATUS_FIFO_REQUEST   BIT(4)
>> +#define SUN4I_HDMI_DDC_INT_STATUS_ARBITRATION_ERROR  BIT(3)
>> +#define SUN4I_HDMI_DDC_INT_STATUS_ACK_ERROR  BIT(2)
>> +#define SUN4I_HDMI_DDC_INT_STATUS_BUS_ERROR  BIT(1)
>> +#define SUN4I_HDMI_DDC_INT_STATUS_TRANSFER_COMPLETE  BIT(0)
>> +
>>  #define SUN4I_HDMI_DDC_FIFO_CTRL_REG 0x510
>>  #define SUN4I_HDMI_DDC_FIFO_CTRL_CLEAR   BIT(31)
>>
>> +#define SUN4I_HDMI_DDC

[linux-sunxi] Re: [PATCH v2] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

Hi Maxime,

On 21 June 2017 at 18:41, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Tue, Jun 13, 2017 at 09:53:31PM +1000, Jonathan Liu wrote:
>> >> --- /dev/null
>> >> +++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
>> >> @@ -0,0 +1,163 @@
>> >> +/*
>> >> + * Copyright (C) 2017 Jonathan Liu
>> >> + *
>> >> + * Jonathan Liu <net...@gmail.com>
>> >
>> > Is it?
>>
>> I could add you to the copyright since you did the old one. But the
>> implementation is different.
>> I intend to rework this I2C driver to use the FIFO more to avoid
>> splitting larger transfers > 16 bytes and do the transfer in a single
>> command. Would you like to be added to the copyright?
>
> You took some code that you didn't create, and added some more
> stuff. The copyright on the initial code remains, and it has nothing
> to do with whether the author wants it or not, (s)he should be
> mentionned, along with you of course.
>
I will update the copyright header accordingly.

>> >> +? SUN4I_HDMI_DDC_CMD_IMPLICIT_READ
>> >> +: SUN4I_HDMI_DDC_CMD_IMPLICIT_WRITE,
>> >> +hdmi->base + SUN4I_HDMI_DDC_CMD_REG);
>> >> +
>> >> + reg = readl(hdmi->base + SUN4I_HDMI_DDC_CTRL_REG);
>> >> + writel(reg | SUN4I_HDMI_DDC_CTRL_START_CMD,
>> >> +hdmi->base + SUN4I_HDMI_DDC_CTRL_REG);
>> >> +
>> >> + if (!(msg->flags & I2C_M_RD)) {
>> >> + for (i = 0; i < count; i++) {
>> >> + writeb(*msg->buf++, hdmi->base
>> >> ++ SUN4I_HDMI_DDC_FIFO_DATA_REG);
>> >
>> > writesb?
>> I intend to rework the FIFO handling so will need to continue using writeb.
>
> Then you'll change it when you'll rework it. Before then, you can use
> writesb.
>
I have already reworked it in V3.

>> >
>> >> + --msg->len;
>> >> + }
>> >> + }
>> >> +
>> >> + if (readl_poll_timeout(hdmi->base + SUN4I_HDMI_DDC_CTRL_REG,
>> >> +reg,
>> >> +!(reg & SUN4I_HDMI_DDC_CTRL_START_CMD),
>> >> +100, 10))
>> >> + return -EIO;
>> >> +
>> >> + reg = readl(hdmi->base + SUN4I_HDMI_DDC_INTERRUPT_STATUS_REG);
>> >> + reg &= ~SUN4I_HDMI_DDC_INTERRUPT_STATUS_FIFO_REQUEST;
>> I want to check all the other bits that are set if there are errors.
>
> Same thing here: you'll change it when that happens.
I have already reworked it in V3.

>
>> >
>> > You don't need to use that mask.
>> >
>> >> + if (reg != SUN4I_HDMI_DDC_INTERRUPT_STATUS_TRANSFER_COMPLETE)
>> >> + return -EIO;
>> >
>> > !(reg & SUN4I_HDMI_DDC_INTERRUPT_STATUS_TRANSFER_COMPLETE) would be enough.
>> I want to check all the other bits that are set if there are errors.
>
> Same thing here.
I have already reworked it in V3.

>
>> >
>> >> +
>> >> + if (msg->flags & I2C_M_RD) {
>> >> + for (i = 0; i < count; i++) {
>> >> + *msg->buf++ = readb(hdmi->base
>> >> + + SUN4I_HDMI_DDC_FIFO_DATA_REG);
>> >
>> > readsb ?
>> I am reworking the FIFO handling so I will need to continue to use readb.
>
> Same thing here.
I have already reworked it in V3.

>
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com

Regards,
Jonathan

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[linux-sunxi] [PATCH v3] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

The documentation for drm_do_get_edid in drivers/gpu/drm/drm_edid.c states:
"As in the general case the DDC bus is accessible by the kernel at the I2C
level, drivers must make all reasonable efforts to expose it as an I2C
adapter and use drm_get_edid() instead of abusing this function."

Exposing the DDC bus as an I2C adapter is more beneficial as it can be used
for purposes other than reading the EDID such as modifying the EDID or
using the HDMI DDC pins as an I2C bus through the I2C dev interface from
userspace (e.g. i2c-tools).

Implement this for A10s.

Signed-off-by: Jonathan Liu <net...@gmail.com>
---
Changes for v3:
 - Explain why drm_do_get_edid should be used and why it's better to expose it
   as an I2C adapter in commit message
 - Reorder bit defines in descending order for consistency
 - Keep old unused macros instead of removing them
 - The v2 algorithm split large transfers into 16 byte transfers but this may
   cause a large single write to be treated as multiple writes causing data
   corruption. The algorithm has been reworked to not split larger transfers
   and make more use of the FIFO to avoid this.
 - Moved the creation of the DDC clock from sun4i_hdmi_enc.c to
   sun4i_hdmi_i2c.c
 - Reformatted code
 - Instead of masking bits that we don't want to check for errors, explicitly
   check the error bits
 - Clear error bits at start of transfer in case of error from previous transfer
 - Poll for completion of FIFO clear after setting FIFO clear bit

Changes for v2:
 - Rebased against Maxime's sunxi-drm/for-next branch
 - Fix up error paths in sun4i_hdmi_bind so that the I2C adapter is deleted if
   any of the calls after the I2C adapter is created fails
 - Remove unnecessary includes in sun4i_hdmi_i2c.c

 drivers/gpu/drm/sun4i/Makefile |   1 +
 drivers/gpu/drm/sun4i/sun4i_hdmi.h |  21 
 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 101 ++-
 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c | 220 +
 4 files changed, 253 insertions(+), 90 deletions(-)
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c

diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index e29fd3a2ba9c..43c753cafc88 100644
--- a/drivers/gpu/drm/sun4i/Makefile
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -2,6 +2,7 @@ sun4i-drm-y += sun4i_drv.o
 sun4i-drm-y += sun4i_framebuffer.o
 
 sun4i-drm-hdmi-y += sun4i_hdmi_enc.o
+sun4i-drm-hdmi-y += sun4i_hdmi_i2c.o
 sun4i-drm-hdmi-y += sun4i_hdmi_ddc_clk.o
 sun4i-drm-hdmi-y += sun4i_hdmi_tmds_clk.o
 
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi.h 
b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
index 2f2f2ff1ea63..018af9cbb593 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi.h
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
@@ -96,6 +96,7 @@
 #define SUN4I_HDMI_DDC_CTRL_ENABLE BIT(31)
 #define SUN4I_HDMI_DDC_CTRL_START_CMD  BIT(30)
 #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_MASK  BIT(8)
+#define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_WRITE (1 << 8)
 #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_READ  (0 << 8)
 #define SUN4I_HDMI_DDC_CTRL_RESET  BIT(0)
 
@@ -105,14 +106,30 @@
 #define SUN4I_HDMI_DDC_ADDR_OFFSET(off)(((off) & 0xff) << 8)
 #define SUN4I_HDMI_DDC_ADDR_SLAVE(addr)((addr) & 0xff)
 
+#define SUN4I_HDMI_DDC_INT_STATUS_REG  0x50c
+#define SUN4I_HDMI_DDC_INT_STATUS_ILLEGAL_FIFO_OPERATION   BIT(7)
+#define SUN4I_HDMI_DDC_INT_STATUS_DDC_RX_FIFO_UNDERFLOWBIT(6)
+#define SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_UNDERFLOWBIT(5)
+#define SUN4I_HDMI_DDC_INT_STATUS_FIFO_REQUEST BIT(4)
+#define SUN4I_HDMI_DDC_INT_STATUS_ARBITRATION_ERRORBIT(3)
+#define SUN4I_HDMI_DDC_INT_STATUS_ACK_ERRORBIT(2)
+#define SUN4I_HDMI_DDC_INT_STATUS_BUS_ERRORBIT(1)
+#define SUN4I_HDMI_DDC_INT_STATUS_TRANSFER_COMPLETEBIT(0)
+
 #define SUN4I_HDMI_DDC_FIFO_CTRL_REG   0x510
 #define SUN4I_HDMI_DDC_FIFO_CTRL_CLEAR BIT(31)
 
+#define SUN4I_HDMI_DDC_FIFO_STATUS_REG 0x514
+#define SUN4I_HDMI_DDC_FIFO_STATUS_FULLBIT(6)
+#define SUN4I_HDMI_DDC_FIFO_STATUS_EMPTY   BIT(5)
+
 #define SUN4I_HDMI_DDC_FIFO_DATA_REG   0x518
 #define SUN4I_HDMI_DDC_BYTE_COUNT_REG  0x51c
 
 #define SUN4I_HDMI_DDC_CMD_REG 0x520
 #define SUN4I_HDMI_DDC_CMD_EXPLICIT_EDDC_READ  6
+#define SUN4I_HDMI_DDC_CMD_IMPLICIT_READ   5
+#define SUN4I_HDMI_DDC_CMD_IMPLICIT_WRITE  3
 
 #define SUN4I_HDMI_DDC_CLK_REG 0x528
 #define SUN4I_HDMI_DDC_CLK_M(m)(((m) & 0x7) << 3)
@@ -123,6 +140,7 @@
 #define SUN4I_HDMI_DDC_LINE_CTRL_SCL_ENABLEBIT(8)
 
 #define SUN4I_HDMI_DDC_FIFO_SIZE   16
+#define SUN4I_HDMI_DDC_MAX_TRANSFER_SIZE   1023
 
 enum sun4i_hdmi_pkt_type {
SUN4I_HDMI_PKT_AVI = 2,
@@ -146,6 +164,8 @@ struct sun4i_hdmi {
struct clk  *ddc_clk;
struct clk  *tmds_clk;
 
+   struct i2c_adapter  *i2c;
+
struct sun4i_drv

[linux-sunxi] [PATCH] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

The documentation for drm_do_get_edid in drivers/gpu/drm/drm_edid.c states:
"As in the general case the DDC bus is accessible by the kernel at the I2C
level, drivers must make all reasonable efforts to expose it as an I2C
adapter and use drm_get_edid() instead of abusing this function."

Exposing the DDC bus as an I2C adapter is more beneficial as it can be used
for purposes other than reading the EDID such as modifying the EDID or
using the HDMI DDC pins as an I2C bus through the I2C dev interface from
userspace (e.g. i2c-tools).

Implement this for A10s.

Signed-off-by: Jonathan Liu <net...@gmail.com>
---
Changes for v3:
 - Explain why drm_do_get_edid should be used and why it's better to expose it
   as an I2C adapter in commit message
 - Reorder bit defines in descending order for consistency
 - Keep old unused macros instead of removing them
 - The v2 algorithm split large transfers into 16 byte transfers but this may
   cause a large single write to be treated as multiple writes causing data
   corruption. The algorithm has been reworked to not split larger transfers
   and make more use of the FIFO to avoid this.
 - Moved the creation of the DDC clock from sun4i_hdmi_enc.c to
   sun4i_hdmi_i2c.c
 - Reformatted code
 - Instead of masking bits that we don't want to check for errors, explicitly
   check the error bits
 - Clear error bits at start of transfer in case of error from previous transfer
 - Poll for completion of FIFO clear after setting FIFO clear bit

Changes for v2:
 - Rebased against Maxime's sunxi-drm/for-next branch
 - Fix up error paths in sun4i_hdmi_bind so that the I2C adapter is deleted if
   any of the calls after the I2C adapter is created fails
 - Remove unnecessary includes in sun4i_hdmi_i2c.c

 drivers/gpu/drm/sun4i/Makefile |   1 +
 drivers/gpu/drm/sun4i/sun4i_hdmi.h |  21 
 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 101 ++-
 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c | 220 +
 4 files changed, 253 insertions(+), 90 deletions(-)
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c

diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index e29fd3a2ba9c..43c753cafc88 100644
--- a/drivers/gpu/drm/sun4i/Makefile
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -2,6 +2,7 @@ sun4i-drm-y += sun4i_drv.o
 sun4i-drm-y += sun4i_framebuffer.o
 
 sun4i-drm-hdmi-y += sun4i_hdmi_enc.o
+sun4i-drm-hdmi-y += sun4i_hdmi_i2c.o
 sun4i-drm-hdmi-y += sun4i_hdmi_ddc_clk.o
 sun4i-drm-hdmi-y += sun4i_hdmi_tmds_clk.o
 
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi.h 
b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
index 2f2f2ff1ea63..018af9cbb593 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi.h
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
@@ -96,6 +96,7 @@
 #define SUN4I_HDMI_DDC_CTRL_ENABLE BIT(31)
 #define SUN4I_HDMI_DDC_CTRL_START_CMD  BIT(30)
 #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_MASK  BIT(8)
+#define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_WRITE (1 << 8)
 #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_READ  (0 << 8)
 #define SUN4I_HDMI_DDC_CTRL_RESET  BIT(0)
 
@@ -105,14 +106,30 @@
 #define SUN4I_HDMI_DDC_ADDR_OFFSET(off)(((off) & 0xff) << 8)
 #define SUN4I_HDMI_DDC_ADDR_SLAVE(addr)((addr) & 0xff)
 
+#define SUN4I_HDMI_DDC_INT_STATUS_REG  0x50c
+#define SUN4I_HDMI_DDC_INT_STATUS_ILLEGAL_FIFO_OPERATION   BIT(7)
+#define SUN4I_HDMI_DDC_INT_STATUS_DDC_RX_FIFO_UNDERFLOWBIT(6)
+#define SUN4I_HDMI_DDC_INT_STATUS_DDC_TX_FIFO_UNDERFLOWBIT(5)
+#define SUN4I_HDMI_DDC_INT_STATUS_FIFO_REQUEST BIT(4)
+#define SUN4I_HDMI_DDC_INT_STATUS_ARBITRATION_ERRORBIT(3)
+#define SUN4I_HDMI_DDC_INT_STATUS_ACK_ERRORBIT(2)
+#define SUN4I_HDMI_DDC_INT_STATUS_BUS_ERRORBIT(1)
+#define SUN4I_HDMI_DDC_INT_STATUS_TRANSFER_COMPLETEBIT(0)
+
 #define SUN4I_HDMI_DDC_FIFO_CTRL_REG   0x510
 #define SUN4I_HDMI_DDC_FIFO_CTRL_CLEAR BIT(31)
 
+#define SUN4I_HDMI_DDC_FIFO_STATUS_REG 0x514
+#define SUN4I_HDMI_DDC_FIFO_STATUS_FULLBIT(6)
+#define SUN4I_HDMI_DDC_FIFO_STATUS_EMPTY   BIT(5)
+
 #define SUN4I_HDMI_DDC_FIFO_DATA_REG   0x518
 #define SUN4I_HDMI_DDC_BYTE_COUNT_REG  0x51c
 
 #define SUN4I_HDMI_DDC_CMD_REG 0x520
 #define SUN4I_HDMI_DDC_CMD_EXPLICIT_EDDC_READ  6
+#define SUN4I_HDMI_DDC_CMD_IMPLICIT_READ   5
+#define SUN4I_HDMI_DDC_CMD_IMPLICIT_WRITE  3
 
 #define SUN4I_HDMI_DDC_CLK_REG 0x528
 #define SUN4I_HDMI_DDC_CLK_M(m)(((m) & 0x7) << 3)
@@ -123,6 +140,7 @@
 #define SUN4I_HDMI_DDC_LINE_CTRL_SCL_ENABLEBIT(8)
 
 #define SUN4I_HDMI_DDC_FIFO_SIZE   16
+#define SUN4I_HDMI_DDC_MAX_TRANSFER_SIZE   1023
 
 enum sun4i_hdmi_pkt_type {
SUN4I_HDMI_PKT_AVI = 2,
@@ -146,6 +164,8 @@ struct sun4i_hdmi {
struct clk  *ddc_clk;
struct clk  *tmds_clk;
 
+   struct i2c_adapter  *i2c;
+
struct sun4i_drv

[linux-sunxi] Re: [PATCH v2] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

Hi Maxime,

On 13 June 2017 at 21:15, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Mon, Jun 12, 2017 at 03:52:35PM +1000, Jonathan Liu wrote:
>> The drm_get_edid function should be used instead of drm_do_get_edid by
>> exposing the DDC bus as an I2C adapter. Implement this for A10s.
>>
>> Signed-off-by: Jonathan Liu <net...@gmail.com>
>
> Your commit log should explain *why* that function should be used
> instead, and why it's better to expose it as an i2c adadpter.
Ok.

>
>> ---
>> Changes for v2:
>>  - Rebased against Maxime's sunxi-drm/for-next branch
>>  - Fix up error paths in sun4i_hdmi_bind so that the I2C adapter is deleted 
>> if
>>any of the calls after the I2C adapter is created fails
>>  - Remove unnecessary includes in sun4i_hdmi_i2c.c
>>
>>  drivers/gpu/drm/sun4i/Makefile |   1 +
>>  drivers/gpu/drm/sun4i/sun4i_hdmi.h |  11 ++-
>>  drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 103 +++--
>>  drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c | 163 
>> +
>>  4 files changed, 189 insertions(+), 89 deletions(-)
>>  create mode 100644 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
>>
>> diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
>> index e29fd3a2ba9c..43c753cafc88 100644
>> --- a/drivers/gpu/drm/sun4i/Makefile
>> +++ b/drivers/gpu/drm/sun4i/Makefile
>> @@ -2,6 +2,7 @@ sun4i-drm-y += sun4i_drv.o
>>  sun4i-drm-y += sun4i_framebuffer.o
>>
>>  sun4i-drm-hdmi-y += sun4i_hdmi_enc.o
>> +sun4i-drm-hdmi-y += sun4i_hdmi_i2c.o
>>  sun4i-drm-hdmi-y += sun4i_hdmi_ddc_clk.o
>>  sun4i-drm-hdmi-y += sun4i_hdmi_tmds_clk.o
>
> You probably also need to depend on the I2C framework in order to
> work, right?
In Kconfig, DRM_SUN4I depends on DRM which depends on I2C already.
Is there anything else I need to do here?

>
>>
>> diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi.h 
>> b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
>> index 2f2f2ff1ea63..4c01dbe89cd9 100644
>> --- a/drivers/gpu/drm/sun4i/sun4i_hdmi.h
>> +++ b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
>> @@ -97,6 +97,7 @@
>>  #define SUN4I_HDMI_DDC_CTRL_START_CMDBIT(30)
>>  #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_MASKBIT(8)
>>  #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_READ(0 << 8)
>> +#define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_WRITE   (1 << 8)
>
> All the other bit defines are ordered by descending orders, please
> keep it consistent.
Ok.

>
>>  #define SUN4I_HDMI_DDC_CTRL_RESETBIT(0)
>>
>>  #define SUN4I_HDMI_DDC_ADDR_REG  0x504
>> @@ -105,6 +106,10 @@
>>  #define SUN4I_HDMI_DDC_ADDR_OFFSET(off)  (((off) & 0xff) << 8)
>>  #define SUN4I_HDMI_DDC_ADDR_SLAVE(addr)  ((addr) & 0xff)
>>
>> +#define SUN4I_HDMI_DDC_INTERRUPT_STATUS_REG  0x50c
>
> It is called INT_STATUS in the datasheet
>
>> +#define SUN4I_HDMI_DDC_INTERRUPT_STATUS_FIFO_REQUEST BIT(4)
>> +#define SUN4I_HDMI_DDC_INTERRUPT_STATUS_TRANSFER_COMPLETEBIT(0)
>> +
>>  #define SUN4I_HDMI_DDC_FIFO_CTRL_REG 0x510
>>  #define SUN4I_HDMI_DDC_FIFO_CTRL_CLEAR   BIT(31)
>>
>> @@ -112,7 +117,8 @@
>>  #define SUN4I_HDMI_DDC_BYTE_COUNT_REG0x51c
>>
>>  #define SUN4I_HDMI_DDC_CMD_REG   0x520
>> -#define SUN4I_HDMI_DDC_CMD_EXPLICIT_EDDC_READ6
>> +#define SUN4I_HDMI_DDC_CMD_IMPLICIT_WRITE3
>> +#define SUN4I_HDMI_DDC_CMD_IMPLICIT_READ 5
>
> Same remark here, and why do you remove the old one?
Ok, I will not remove any old macros.

>
>>
>>  #define SUN4I_HDMI_DDC_CLK_REG   0x528
>>  #define SUN4I_HDMI_DDC_CLK_M(m)  (((m) & 0x7) << 3)
>> @@ -146,6 +152,8 @@ struct sun4i_hdmi {
>>   struct clk  *ddc_clk;
>>   struct clk  *tmds_clk;
>>
>> + struct i2c_adapter  *i2c;
>> +
>>   struct sun4i_drv*drv;
>>
>>   boolhdmi_monitor;
>> @@ -153,5 +161,6 @@ struct sun4i_hdmi {
>>
>>  int sun4i_ddc_create(struct sun4i_hdmi *hdmi, struct clk *clk);
>>  int sun4i_tmds_create(struct sun4i_hdmi *hdmi);
>> +int sun4i_hdmi_i2c_create(struct sun4i_hdmi *hdmi);
>>
>>  #endif /* _SUN4I_HDMI_H_ */
>> diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 
>> b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
>> index d3398f6250ef..2a8c0b14eabc 100644
>> --- a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
>> +++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
>

[linux-sunxi] Re: [PATCH] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

Hi Chen-Yu,

On 12 June 2017 at 13:28, Chen-Yu Tsai <w...@csie.org> wrote:
> On Mon, Jun 12, 2017 at 10:12 AM, Jonathan Liu <net...@gmail.com> wrote:
>> The drm_get_edid function should be used instead of drm_do_get_edid by
>> exposing the DDC bus as an I2C adapter. Implement this for A10s.
>
> Nice!

It is my first Linux kernel driver so there may be other things I have
overlooked. I am not sure about the behaviour of I2C writes larger
than 16 bytes but the EEPROMs I have tested only have a write buffer
of 8 bytes so writes are limited to a maximum of 8 bytes at a time
anyway.

>
>>
>> Signed-off-by: Jonathan Liu <net...@gmail.com>
>> ---
>>  drivers/gpu/drm/sun4i/Makefile |   1 +
>>  drivers/gpu/drm/sun4i/sun4i_hdmi.h |  11 ++-
>>  drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c |  96 +++
>>  drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c | 166 
>> +
>>  4 files changed, 190 insertions(+), 84 deletions(-)
>>  create mode 100644 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
>>
>> diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
>> index e29fd3a2ba9c..43c753cafc88 100644
>> --- a/drivers/gpu/drm/sun4i/Makefile
>> +++ b/drivers/gpu/drm/sun4i/Makefile
>> @@ -2,6 +2,7 @@ sun4i-drm-y += sun4i_drv.o
>>  sun4i-drm-y += sun4i_framebuffer.o
>>
>>  sun4i-drm-hdmi-y += sun4i_hdmi_enc.o
>> +sun4i-drm-hdmi-y += sun4i_hdmi_i2c.o
>>  sun4i-drm-hdmi-y += sun4i_hdmi_ddc_clk.o
>>  sun4i-drm-hdmi-y += sun4i_hdmi_tmds_clk.o
>>
>> diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi.h 
>> b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
>> index 2589bc92be59..8e7a70f67f04 100644
>> --- a/drivers/gpu/drm/sun4i/sun4i_hdmi.h
>> +++ b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
>> @@ -100,6 +100,7 @@
>>  #define SUN4I_HDMI_DDC_CTRL_START_CMD  BIT(30)
>>  #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_MASK  BIT(8)
>>  #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_READ  (0 << 8)
>> +#define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_WRITE (1 << 8)
>>  #define SUN4I_HDMI_DDC_CTRL_RESET  BIT(0)
>>
>>  #define SUN4I_HDMI_DDC_ADDR_REG0x504
>> @@ -108,6 +109,10 @@
>>  #define SUN4I_HDMI_DDC_ADDR_OFFSET(off)(((off) & 0xff) << 8)
>>  #define SUN4I_HDMI_DDC_ADDR_SLAVE(addr)((addr) & 0xff)
>>
>> +#define SUN4I_HDMI_DDC_INTERRUPT_STATUS_REG0x50c
>> +#define SUN4I_HDMI_DDC_INTERRUPT_STATUS_FIFO_REQUEST   BIT(4)
>> +#define SUN4I_HDMI_DDC_INTERRUPT_STATUS_TRANSFER_COMPLETE  BIT(0)
>> +
>>  #define SUN4I_HDMI_DDC_FIFO_CTRL_REG   0x510
>>  #define SUN4I_HDMI_DDC_FIFO_CTRL_CLEAR BIT(31)
>>
>> @@ -115,7 +120,8 @@
>>  #define SUN4I_HDMI_DDC_BYTE_COUNT_REG  0x51c
>>
>>  #define SUN4I_HDMI_DDC_CMD_REG 0x520
>> -#define SUN4I_HDMI_DDC_CMD_EXPLICIT_EDDC_READ  6
>> +#define SUN4I_HDMI_DDC_CMD_IMPLICIT_WRITE  3
>> +#define SUN4I_HDMI_DDC_CMD_IMPLICIT_READ   5
>>
>>  #define SUN4I_HDMI_DDC_CLK_REG 0x528
>>  #define SUN4I_HDMI_DDC_CLK_M(m)(((m) & 0x7) << 3)
>> @@ -181,6 +187,8 @@ struct sun4i_hdmi {
>> struct clk  *ddc_clk;
>> struct clk  *tmds_clk;
>>
>> +   struct i2c_adapter  *i2c;
>> +
>> struct sun4i_drv*drv;
>>
>> boolhdmi_monitor;
>> @@ -192,5 +200,6 @@ int sun4i_ddc_create(struct sun4i_hdmi *hdmi, struct clk 
>> *clk);
>>  int sun6i_ddc_create(struct sun4i_hdmi *hdmi, struct clk *clk);
>>  int sun4i_tmds_create(struct sun4i_hdmi *hdmi);
>>  int sun6i_tmds_create(struct sun4i_hdmi *hdmi);
>> +int sun4i_hdmi_i2c_create(struct sun4i_hdmi *hdmi);
>
> However you seem to have based it on the wrong branch/patches.
> You based them on my A31 HDMI patches, instead of what Maxime has
> in his sunxi-drm/for-next branch.
>
> I could add this to my A31 patches, though it probably won't make
> 4.13. Alternatively you could rebase them on top of Maxime's branch.

Yes, I forgot about that. I will rebase against sunxi-drm/for-next for V2.

>
>>
>>  #endif /* _SUN4I_HDMI_H_ */
>> diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 
>> b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
>> index e9abf93eb41c..6c9b11c4cf68 100644
>> --- a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
>> +++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
>> @@ -186,93 +186,13 @@ static const struct drm_encoder_funcs sun4i_hdmi_funcs 
>> = {
>> .destroy= drm_

[linux-sunxi] [PATCH] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

[Jonathan Liu]

The drm_get_edid function should be used instead of drm_do_get_edid by
exposing the DDC bus as an I2C adapter. Implement this for A10s.

Signed-off-by: Jonathan Liu <net...@gmail.com>
---
 drivers/gpu/drm/sun4i/Makefile |   1 +
 drivers/gpu/drm/sun4i/sun4i_hdmi.h |  11 ++-
 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c |  96 +++
 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c | 166 +
 4 files changed, 190 insertions(+), 84 deletions(-)
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c

diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index e29fd3a2ba9c..43c753cafc88 100644
--- a/drivers/gpu/drm/sun4i/Makefile
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -2,6 +2,7 @@ sun4i-drm-y += sun4i_drv.o
 sun4i-drm-y += sun4i_framebuffer.o
 
 sun4i-drm-hdmi-y += sun4i_hdmi_enc.o
+sun4i-drm-hdmi-y += sun4i_hdmi_i2c.o
 sun4i-drm-hdmi-y += sun4i_hdmi_ddc_clk.o
 sun4i-drm-hdmi-y += sun4i_hdmi_tmds_clk.o
 
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi.h 
b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
index 2589bc92be59..8e7a70f67f04 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi.h
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
@@ -100,6 +100,7 @@
 #define SUN4I_HDMI_DDC_CTRL_START_CMD  BIT(30)
 #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_MASK  BIT(8)
 #define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_READ  (0 << 8)
+#define SUN4I_HDMI_DDC_CTRL_FIFO_DIR_WRITE (1 << 8)
 #define SUN4I_HDMI_DDC_CTRL_RESET  BIT(0)
 
 #define SUN4I_HDMI_DDC_ADDR_REG0x504
@@ -108,6 +109,10 @@
 #define SUN4I_HDMI_DDC_ADDR_OFFSET(off)(((off) & 0xff) << 8)
 #define SUN4I_HDMI_DDC_ADDR_SLAVE(addr)((addr) & 0xff)
 
+#define SUN4I_HDMI_DDC_INTERRUPT_STATUS_REG0x50c
+#define SUN4I_HDMI_DDC_INTERRUPT_STATUS_FIFO_REQUEST   BIT(4)
+#define SUN4I_HDMI_DDC_INTERRUPT_STATUS_TRANSFER_COMPLETE  BIT(0)
+
 #define SUN4I_HDMI_DDC_FIFO_CTRL_REG   0x510
 #define SUN4I_HDMI_DDC_FIFO_CTRL_CLEAR BIT(31)
 
@@ -115,7 +120,8 @@
 #define SUN4I_HDMI_DDC_BYTE_COUNT_REG  0x51c
 
 #define SUN4I_HDMI_DDC_CMD_REG 0x520
-#define SUN4I_HDMI_DDC_CMD_EXPLICIT_EDDC_READ  6
+#define SUN4I_HDMI_DDC_CMD_IMPLICIT_WRITE  3
+#define SUN4I_HDMI_DDC_CMD_IMPLICIT_READ   5
 
 #define SUN4I_HDMI_DDC_CLK_REG 0x528
 #define SUN4I_HDMI_DDC_CLK_M(m)(((m) & 0x7) << 3)
@@ -181,6 +187,8 @@ struct sun4i_hdmi {
struct clk  *ddc_clk;
struct clk  *tmds_clk;
 
+   struct i2c_adapter  *i2c;
+
struct sun4i_drv*drv;
 
boolhdmi_monitor;
@@ -192,5 +200,6 @@ int sun4i_ddc_create(struct sun4i_hdmi *hdmi, struct clk 
*clk);
 int sun6i_ddc_create(struct sun4i_hdmi *hdmi, struct clk *clk);
 int sun4i_tmds_create(struct sun4i_hdmi *hdmi);
 int sun6i_tmds_create(struct sun4i_hdmi *hdmi);
+int sun4i_hdmi_i2c_create(struct sun4i_hdmi *hdmi);
 
 #endif /* _SUN4I_HDMI_H_ */
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 
b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
index e9abf93eb41c..6c9b11c4cf68 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
@@ -186,93 +186,13 @@ static const struct drm_encoder_funcs sun4i_hdmi_funcs = {
.destroy= drm_encoder_cleanup,
 };
 
-static int sun4i_hdmi_read_sub_block(struct sun4i_hdmi *hdmi,
-unsigned int blk, unsigned int offset,
-u8 *buf, unsigned int count)
-{
-   unsigned long reg;
-   int i;
-
-   reg = readl(hdmi->base + SUN4I_HDMI_DDC_CTRL_REG);
-   reg &= ~SUN4I_HDMI_DDC_CTRL_FIFO_DIR_MASK;
-   writel(reg | SUN4I_HDMI_DDC_CTRL_FIFO_DIR_READ,
-  hdmi->base + SUN4I_HDMI_DDC_CTRL_REG);
-
-   writel(SUN4I_HDMI_DDC_ADDR_SEGMENT(offset >> 8) |
-  SUN4I_HDMI_DDC_ADDR_EDDC(DDC_SEGMENT_ADDR << 1) |
-  SUN4I_HDMI_DDC_ADDR_OFFSET(offset) |
-  SUN4I_HDMI_DDC_ADDR_SLAVE(DDC_ADDR),
-  hdmi->base + SUN4I_HDMI_DDC_ADDR_REG);
-
-   reg = readl(hdmi->base + SUN4I_HDMI_DDC_FIFO_CTRL_REG);
-   writel(reg | SUN4I_HDMI_DDC_FIFO_CTRL_CLEAR,
-  hdmi->base + SUN4I_HDMI_DDC_FIFO_CTRL_REG);
-
-   writel(count, hdmi->base + SUN4I_HDMI_DDC_BYTE_COUNT_REG);
-   writel(SUN4I_HDMI_DDC_CMD_EXPLICIT_EDDC_READ,
-  hdmi->base + SUN4I_HDMI_DDC_CMD_REG);
-
-   reg = readl(hdmi->base + SUN4I_HDMI_DDC_CTRL_REG);
-   writel(reg | SUN4I_HDMI_DDC_CTRL_START_CMD,
-  hdmi->base + SUN4I_HDMI_DDC_CTRL_REG);
-
-   if (readl_poll_timeout(hdmi->base + SUN4I_HDMI_DDC_CTRL_REG, reg,
-  !(reg & SUN4I_HDMI_DDC_CTRL_START_CMD),
-  100, 10))
-   return -EIO;
-
-   for (i = 0; i < count; i++)
-   

Re: [linux-sunxi] [PATCH v2 1/6] clk: sunxi-ng: Add sun4i/sun7i CCU driver

[Jonathan Liu]

Hi Priit,

On 27 March 2017 at 04:20, Priit Laes  wrote:
> +static struct ccu_nkmp pll_ve_clk = {
> +   .enable = BIT(31),
> +   .n  = _SUNXI_CCU_MULT_OFFSET(8, 5, 0),
> +   .k  = _SUNXI_CCU_MULT(4, 2),
> +   .m  = _SUNXI_CCU_DIV(0, 2),
> +   .p  = _SUNXI_CCU_DIV(16, 2),
> +   .common = {
> +   .reg= 0x018,
> +   .hw.init= CLK_HW_INIT("pll-ve",
> + "hosc",
> + _nkmp_ops,
> + 0),
> +   },
> +};

pll-ve is a NKMP clock in A10 but a NK clock in A20.

> +static const char *const hdmi_parents[] = { "pll-video0", "pll-video0-2x",
> +   "pll-vide01", "pll-video1-2x" };

"pll-vide01" should be "pll-video1".

Regards,
Jonathan

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Re: [linux-sunxi] [PATCH v2 1/6] clk: sunxi-ng: Add sun4i/sun7i CCU driver

[Jonathan Liu]

Hi Priit,

On 27 March 2017 at 04:20, Priit Laes  wrote:
> Introduce a clock controller driver for sun4i A10 and sun7i A20
> series SoCs.
>
> Signed-off-by: Priit Laes 
> ---
>  drivers/clk/sunxi-ng/Kconfig  |   13 +-
>  drivers/clk/sunxi-ng/Makefile |1 +-
>  drivers/clk/sunxi-ng/ccu-sunxi-a10-a20.c  | 1532 ++-
>  drivers/clk/sunxi-ng/ccu-sunxi-a10-a20.h  |   59 +-
>  include/dt-bindings/clock/sunxi-a10-a20-ccu.h |  208 ++-
>  include/dt-bindings/reset/sunxi-a10-a20-ccu.h |   66 +-
>  6 files changed, 1879 insertions(+)
>  create mode 100644 drivers/clk/sunxi-ng/ccu-sunxi-a10-a20.c
>  create mode 100644 drivers/clk/sunxi-ng/ccu-sunxi-a10-a20.h
>  create mode 100644 include/dt-bindings/clock/sunxi-a10-a20-ccu.h
>  create mode 100644 include/dt-bindings/reset/sunxi-a10-a20-ccu.h
>
> diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig
> index 213cf64..abed614 100644
> --- a/drivers/clk/sunxi-ng/Kconfig
> +++ b/drivers/clk/sunxi-ng/Kconfig
> @@ -65,6 +65,19 @@ config SUN50I_A64_CCU
> default ARM64 && ARCH_SUNXI
> depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
>
> +config SUNXI_A10_A20_CCU
> +   bool "Support for the Allwinner A10/A20 CCU"
> +   select SUNXI_CCU_DIV
> +   select SUNXI_CCU_MULT
> +   select SUNXI_CCU_NK
> +   select SUNXI_CCU_NKM
> +   select SUNXI_CCU_NM
> +   select SUNXI_CCU_MP
> +   select SUNXI_CCU_PHASE
> +   default MACH_SUN4I
> +   default MACH_SUN7I
> +   depends on MACH_SUN4I || MACH_SUN7I || COMPILE_TEST
> +
>  config SUN5I_CCU
> bool "Support for the Allwinner sun5i family CCM"
> select SUNXI_CCU_DIV
> diff --git a/drivers/clk/sunxi-ng/Makefile b/drivers/clk/sunxi-ng/Makefile
> index 6feaac0..90bab0e 100644
> --- a/drivers/clk/sunxi-ng/Makefile
> +++ b/drivers/clk/sunxi-ng/Makefile
> @@ -21,6 +21,7 @@ obj-$(CONFIG_SUNXI_CCU_MP)+= ccu_mp.o
>  obj-$(CONFIG_SUN50I_A64_CCU)   += ccu-sun50i-a64.o
>  obj-$(CONFIG_SUN5I_CCU)+= ccu-sun5i.o
>  obj-$(CONFIG_SUN6I_A31_CCU)+= ccu-sun6i-a31.o
> +obj-$(CONFIG_SUNXI_A10_A20_CCU)+= ccu-sunxi-a10-a20.o
>  obj-$(CONFIG_SUN8I_A23_CCU)+= ccu-sun8i-a23.o
>  obj-$(CONFIG_SUN8I_A33_CCU)+= ccu-sun8i-a33.o
>  obj-$(CONFIG_SUN8I_H3_CCU) += ccu-sun8i-h3.o
> diff --git a/drivers/clk/sunxi-ng/ccu-sunxi-a10-a20.c 
> b/drivers/clk/sunxi-ng/ccu-sunxi-a10-a20.c
> new file mode 100644
> index 000..1884f5f
> --- /dev/null
> +++ b/drivers/clk/sunxi-ng/ccu-sunxi-a10-a20.c
> @@ -0,0 +1,1532 @@
> +/*
> + * Copyright (c) 2017 Priit Laes. All rights reserved.
> + *
> + * This software is licensed under the terms of the GNU General Public
> + * License version 2, as published by the Free Software Foundation, and
> + * may be copied, distributed, and modified under those terms.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include 
> +#include 
> +
> +#include "ccu_common.h"
> +#include "ccu_reset.h"
> +
> +#include "ccu_div.h"
> +#include "ccu_gate.h"
> +#include "ccu_mp.h"
> +#include "ccu_mult.h"
> +#include "ccu_nk.h"
> +#include "ccu_nkm.h"
> +#include "ccu_nkmp.h"
> +#include "ccu_nm.h"
> +#include "ccu_phase.h"
> +
> +#include "ccu-sunxi-a10-a20.h"
> +
> +static struct ccu_nkmp pll_core_clk = {
> +   .enable = BIT(31),
> +   .n  = _SUNXI_CCU_MULT_OFFSET(8, 5, 0),
> +   .k  = _SUNXI_CCU_MULT(4, 2),
> +   .m  = _SUNXI_CCU_DIV(0, 2),
> +   .p  = _SUNXI_CCU_DIV(16, 2),
> +   .common = {
> +   .reg= 0x000,
> +   .hw.init= CLK_HW_INIT("pll-core",
> + "hosc",
> + _nkmp_ops,
> + 0),
> +   },
> +};
> +
> +/*
> + * The Audio PLL is supposed to have 4 outputs: 3 fixed factors from
> + * the base (2x, 4x and 8x), and one variable divider (the one true
> + * pll audio).
> + *
> + * We don't have any need for the variable divider for now, so we just
> + * hardcode it to match with the clock names.
> + */
> +#define SUN4I_PLL_AUDIO_REG0x008
> +static struct ccu_nm pll_audio_base_clk = {
> +   .enable = BIT(31),
> +   .n  = _SUNXI_CCU_MULT_OFFSET(8, 7, 0),
> +   .m  = _SUNXI_CCU_DIV_OFFSET(0, 5, 0),
> +   .common = {
> +   .reg= 0x008,
> +   .hw.init= CLK_HW_INIT("pll-audio-base",
> + "hosc",
> + _nm_ops,
> + 0),
> +   

[linux-sunxi] [PATCH] ARM: sun7i: Enable audio codec on A20-OLinuXino-Micro

[Jonathan Liu]

The A20-OLinuXino-Micro has 3.5 mm sockets for headphone output and
microphone input.

Signed-off-by: Jonathan Liu <net...@gmail.com>
---
 arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts 
b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
index 223fbd9f7c62..3c1680c340b1 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
@@ -85,6 +85,10 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+};
+
  {
status = "okay";
 };
-- 
2.11.1

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Re: [linux-sunxi] Olimex A20 SOM EVB + DRM + LCD panel, a (someway working) experience..

[Jonathan Liu]

Hi Andrea,

On 13 December 2016 at 09:15, Andrea Venturi <ennesimamail...@gmail.com>
wrote:

>
>
> Il giorno lunedì 12 dicembre 2016 03:20:56 UTC+1, Jonathan Liu ha scritto:
>>
>> Hi Andrea,
>>
>> On 11 December 2016 at 22:48, Andrea Venturi <ennesim...@gmail.com>
>> wrote:
>>
>>> hello,
>>> 
>>> the only issue is that, after few minutes (10 or so), the display switch
>>> to this kind of rendering:
>>>
>>>  https://drive.google.com/open?id=0B9QRW6Oy0GmeOGdvM3YyYUtqZHM
>>>
>>> no messages on syslog or console. i'm wondering which kind of "glitch"
>>> could bring to this (i suppose some kind of "clock power down"?).
>>>
>> Console blank is 600 seconds by default - kernel will turn off the
>> console after 10 minutes of inactivity.
>> Try adding consoleblank=0 to your kernel command line.
>>
>> It is powering down the display engine without powering off the LCD.
>>
>>
>
> thanx. indeed it was it. adding 'consoleblank=0'  has made the LCD
> rendering stable.
>
> BTW i'm wondering if there's eventually a way to turn back on the console.
>

Maybe something like this as root?
setterm --blank poke --term linux < /dev/tty1 > /dev/tty1


>
> i tried to type something on the serial console /dev/ttyS0 but that wasn't
>  enoguh for bringing the display back to life.
>
> on the other hand, this setup is unable to power down the display
> completely because the backlight is not driven by a GPIO pin but always on.
>
> Andrea
>

Regards,
Jonathan

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Re: [linux-sunxi] Olimex A20 SOM EVB + DRM + LCD panel, a (someway working) experience..

[Jonathan Liu]

Hi Andrea,

On 11 December 2016 at 22:48, Andrea Venturi 
wrote:

> hello,
>
> this mail just to report an experience about using the DRM driver on sun7i
> (Olimex A20 SOM EVB). let me start thanking all the guys doing the
> "heavylifting" for this feature/driver.
>
> *TL;DR* i'll be very synthetic, it starts to work (you can see a picture,
> then some minutes later screen shuts off) albeit it's still a  hard to gain
> feature as lot's of info is scattered here and there or implicit, that's
> why i try to recap here the simpler recipe to "see the light"..
>
> first i've got the* 4.9rc7 kernel* runnng from sunxi-next git tree:
>
>  https://github.com/linux-sunxi/linux-sunxi/commits/sunxi-next
>
> i compiled with the default defconfig for this Olimex A20 SOM EVB board
> and booted.
>
> i've got *simplefb* working; as the FB was working since uboot phase,
> thanx to this "modeline":
>
>  CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,
> le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"
>
> then i added in DTS the extended lines as from this commit by "net147"
> (thanx):
>
>  https://github.com/net147/linux/commit/cd93810d8a565d2348e27756f4bb27
> 62dc6cc79d
>
> BTW i added in *drivers/gpu/drm/panel/panel-simple.c* the setup of my
> panel (a noname 800x480 7inch working in uboot), and put accordingly the
> panel's compatible entry in place of the *lcd-olinuxino-43-ts* in DTS:
>  ...
>  panel: panel {
>   compatible = "olimex,lcd-olinuxino-43-ts";
>  ...
>
> then i had to patch kernel for "relaxing" the panel *clock validation
> step*  with this very recent "hack" for the clock matching:
>
>  http://www.spinics.net/lists/kernel/msg2390747.html
>
> and this is more or less everything to see the DRM LCD working on A20
>
> in *dmesg* the relevant lines are:
>
> ---
> [1.082842] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>
> [1.082846] [drm] No driver support for vblank timestamp query.
>
> [1.083328] sun4i-drm display-engine: bound 1e6.display-backend
> (ops 0xc063d87c)
> [1.083841] sun4i-drm display-engine: bound 1c0c000.lcd-controller (ops
> 0xc063d410)
> [1.083886] checking generic (7fe89000 177000) vs hw (0 )
>
> [1.083890] fb: switching to sun4i-drm-fb from simple
>
> [1.137201 <13%2072%2001>] Console: switching to colour dummy device
> 80x30
>
> and this is all fantastic. i could display fancy images with *fbv* (i'm
> working on straight framebuffer, no X), thanks to all those involved.
>
> the only issue is that, after few minutes (10 or so), the display switch
> to this kind of rendering:
>
>  https://drive.google.com/open?id=0B9QRW6Oy0GmeOGdvM3YyYUtqZHM
>
> no messages on syslog or console. i'm wondering which kind of "glitch"
> could bring to this (i suppose some kind of "clock power down"?).
>
Console blank is 600 seconds by default - kernel will turn off the console
after 10 minutes of inactivity.
Try adding consoleblank=0 to your kernel command line.

It is powering down the display engine without powering off the LCD.


> maybe setting up some *DRM debug level,* could bring to helpful messages.
> i'll check how to enable those, if any has suggestions, are welcome.
>
> later, i'd like to test the  mali binary libraries as net147 tells they
> works too (i'll test ES GL on plain framebuffer and not X) .
>
> i see this kernel open sorce low level driver compiles (adding some setup
> on *build.sh*):
>  https://github.com/mripard/sunxi-mali
> but i'm stopping on adding the relevant entry in the DTS. and this is the
> topic for another report, eventually.
>
> Andrea
>
>
Regards,
Jonathan

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Re: [linux-sunxi] [PATCH v5 3/4] Documentation: devicetree: add vendor prefix for Pine64

[Jonathan Liu]

On 21 October 2016 at 05:00, Maxime Ripard
 wrote:
> From: Andre Przywara 
>
> Signed-off-by: Andre Przywara 
> Acked-by: Rob Herring 
> Acked-by: Chen-Yu Tsai 
> [Maxime: Change title prefix to match the usual style]
> Signed-off-by: Maxime Ripard 
> ---
>  Documentation/devicetree/bindings/vendor-prefixes.txt | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt 
> b/Documentation/devicetree/bindings/vendor-prefixes.txt
> index f0a48ea78659..4eefd1c3ff16 100644
> --- a/Documentation/devicetree/bindings/vendor-prefixes.txt
> +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
> @@ -208,7 +208,7 @@ parade  Parade Technologies Inc.
>  pericomPericom Technology Inc.
>  phytec PHYTEC Messtechnik GmbH
>  picochip   Picochip Ltd
> -pixcir  PIXCIR MICROELECTRONICS Co., Ltd

Why is "pixcir  PIXCIR MICROELECTRONICS Co., Ltd" removed?

> +pine64 Pine64
>  plathome   Plat'Home Co., Ltd.
>  plda   PLDA
>  powervrPowerVR (deprecated, use img)
> --
> git-series 0.8.10

Regards,
Jonathan

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[linux-sunxi] [PATCH] drm/sun4i: rgb: add missing calls to drm_panel_{prepare,unprepare}

[Jonathan Liu]

If the enable-gpios property of a simple panel in device tree is set,
the GPIO is not toggled on/off because of missing calls to
drm_panel_prepare and drm_panel_unprepare.

Signed-off-by: Jonathan Liu <net...@gmail.com>
---
 drivers/gpu/drm/sun4i/sun4i_rgb.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun4i_rgb.c 
b/drivers/gpu/drm/sun4i/sun4i_rgb.c
index f5bbac6..d6943e9 100644
--- a/drivers/gpu/drm/sun4i/sun4i_rgb.c
+++ b/drivers/gpu/drm/sun4i/sun4i_rgb.c
@@ -151,6 +151,7 @@ static void sun4i_rgb_encoder_enable(struct drm_encoder 
*encoder)
 
DRM_DEBUG_DRIVER("Enabling RGB output\n");
 
+   drm_panel_prepare(tcon->panel);
drm_panel_enable(tcon->panel);
sun4i_tcon_channel_enable(tcon, 0);
 }
@@ -165,6 +166,7 @@ static void sun4i_rgb_encoder_disable(struct drm_encoder 
*encoder)
 
sun4i_tcon_channel_disable(tcon, 0);
drm_panel_disable(tcon->panel);
+   drm_panel_unprepare(tcon->panel);
 }
 
 static void sun4i_rgb_encoder_mode_set(struct drm_encoder *encoder,
-- 
2.9.3

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Re: [linux-sunxi] [PATCH 11/19] drm: sun4i: Add composite output

[Jonathan Liu]

On 31 October 2015 at 01:20, Maxime Ripard
 wrote:
> Some Allwinner SoCs have an IP called the TV encoder that is used to output
> composite and VGA signals. In such a case, we need to use the second TCON
> channel.
>
> Add support for that TV encoder.
>
> Signed-off-by: Maxime Ripard 
> ---
>  drivers/gpu/drm/sun4i/Makefile|   1 +
>  drivers/gpu/drm/sun4i/sun4i_drv.c |  10 +-
>  drivers/gpu/drm/sun4i/sun4i_tv.c  | 532 
> ++
>  drivers/gpu/drm/sun4i/sun4i_tv.h  |  18 ++
>  4 files changed, 560 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/gpu/drm/sun4i/sun4i_tv.c
>  create mode 100644 drivers/gpu/drm/sun4i/sun4i_tv.h
>
> diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
> index 4d230b658a05..fc0dc8be82d9 100644
> --- a/drivers/gpu/drm/sun4i/Makefile
> +++ b/drivers/gpu/drm/sun4i/Makefile
> @@ -6,5 +6,6 @@ sun4i-drm-y += sun4i_layer.o
>  sun4i-drm-y += sun4i_tcon.o
>
>  sun4i-drm-y += sun4i_rgb.o
> +sun4i-drm-y += sun4i_tv.o
>
>  obj-$(CONFIG_DRM_SUN4I)+= sun4i-drm.o
> diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c 
> b/drivers/gpu/drm/sun4i/sun4i_drv.c
> index f2c9c8a2eb75..3cf7a9e89afa 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_drv.c
> +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
> @@ -22,6 +22,7 @@
>  #include "sun4i_layer.h"
>  #include "sun4i_rgb.h"
>  #include "sun4i_tcon.h"
> +#include "sun4i_tv.h"
>
>  static void sun4i_drv_preclose(struct drm_device *drm,
>struct drm_file *file_priv)
> @@ -134,12 +135,18 @@ static int sun4i_drv_load(struct drm_device *drm, 
> unsigned long flags)
> goto err_free_crtc;
> }
>
> +   ret = sun4i_tv_init(drm);
> +   if (ret) {
> +   dev_err(drm->dev, "Couldn't create our RGB output\n");

RGB should be composite. Seems like a copy-paste error.

> +   goto err_free_rgb;
> +   }
> +
> /* Create our framebuffer */
> drv->fbdev = sun4i_framebuffer_init(drm);
> if (IS_ERR(drv->fbdev)) {
> dev_err(drm->dev, "Couldn't create our framebuffer\n");
> ret = PTR_ERR(drv->fbdev);
> -   goto err_free_rgb;
> +   goto err_free_tv;
> }
>
> /* Enable connectors polling */

Regards,
Jonathan

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[linux-sunxi] [PATCH] ARM: sunxi_defconfig: enable MODULE_UNLOAD

[Jonathan Liu]

Loadable module support is enabled so we should allow unloading
modules too. This also allows lsmod to show values other than "-2" in
the "Used by" column.

Signed-off-by: Jonathan Liu <net...@gmail.com>
---
 arch/arm/configs/sunxi_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index 51eea22..517df2e 100644
--- a/arch/arm/configs/sunxi_defconfig
+++ b/arch/arm/configs/sunxi_defconfig
@@ -5,6 +5,7 @@ CONFIG_CGROUPS=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_PERF_EVENTS=y
 CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
 CONFIG_ARCH_SUNXI=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=8
-- 
2.5.0

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[linux-sunxi] Re: [PATCH u-boot-sunxi] sunxi: use random parts of SID to set ethaddr

[Jonathan Liu]

On 27/05/2014 8:54 PM, Jonathan Liu wrote:

Signed-off-by: Jonathan Liu net...@gmail.com
---
  board/sunxi/board.c| 28 
  include/configs/sunxi-common.h |  2 ++
  2 files changed, 30 insertions(+)

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 6c362a3..0db46b0 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -22,9 +22,12 @@
  #include axp221.h
  #endif
  #include asm/arch/clock.h
+#include asm/arch/cpu.h
  #include asm/arch/dram.h
  #include asm/arch/gpio.h
  #include asm/arch/mmc.h
+#include asm/io.h
+#include net.h
  
  DECLARE_GLOBAL_DATA_PTR;
  
@@ -213,3 +216,28 @@ void spl_display_print(void)

printf(Board: %s\n, CONFIG_SYS_BOARD_NAME);
  }
  #endif
+
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
+{
+   if (!getenv(ethaddr)) {
+   uint32_t reg_val = readl(SUNXI_SID_BASE);
+
+   if (reg_val) {
+   uint8_t mac_addr[6];
+
+   mac_addr[0] = 0x02; /* Non OUI / registered MAC address 
*/
+   mac_addr[1] = (reg_val   0)  0xff;
+   reg_val = readl(SUNXI_SID_BASE + 0x0c);
+   mac_addr[2] = (reg_val  24)  0xff;
+   mac_addr[3] = (reg_val  16)  0xff;
+   mac_addr[4] = (reg_val   8)  0xff;
+   mac_addr[5] = (reg_val   0)  0xff;
+
+   eth_setenv_enetaddr(ethaddr, mac_addr);
+   }
+   }
+
+   return 0;
+}
+#endif
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index e11c4ee..948a49d 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -419,6 +419,8 @@
  #define CONFIG_ENV_IS_NOWHERE
  #endif
  
+#define CONFIG_MISC_INIT_R

+
  #ifndef CONFIG_SPL_BUILD
  #include config_distro_defaults.h
  #endif

Bump. Any comments or suggestions?

Regards,
Jonathan

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[linux-sunxi] [PATCH u-boot-sunxi] sunxi: use random parts of SID to set ethaddr

[Jonathan Liu]

Signed-off-by: Jonathan Liu net...@gmail.com
---
 board/sunxi/board.c| 28 
 include/configs/sunxi-common.h |  2 ++
 2 files changed, 30 insertions(+)

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 6c362a3..0db46b0 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -22,9 +22,12 @@
 #include axp221.h
 #endif
 #include asm/arch/clock.h
+#include asm/arch/cpu.h
 #include asm/arch/dram.h
 #include asm/arch/gpio.h
 #include asm/arch/mmc.h
+#include asm/io.h
+#include net.h
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -213,3 +216,28 @@ void spl_display_print(void)
printf(Board: %s\n, CONFIG_SYS_BOARD_NAME);
 }
 #endif
+
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
+{
+   if (!getenv(ethaddr)) {
+   uint32_t reg_val = readl(SUNXI_SID_BASE);
+
+   if (reg_val) {
+   uint8_t mac_addr[6];
+
+   mac_addr[0] = 0x02; /* Non OUI / registered MAC address 
*/
+   mac_addr[1] = (reg_val   0)  0xff;
+   reg_val = readl(SUNXI_SID_BASE + 0x0c);
+   mac_addr[2] = (reg_val  24)  0xff;
+   mac_addr[3] = (reg_val  16)  0xff;
+   mac_addr[4] = (reg_val   8)  0xff;
+   mac_addr[5] = (reg_val   0)  0xff;
+
+   eth_setenv_enetaddr(ethaddr, mac_addr);
+   }
+   }
+
+   return 0;
+}
+#endif
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index e11c4ee..948a49d 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -419,6 +419,8 @@
 #define CONFIG_ENV_IS_NOWHERE
 #endif
 
+#define CONFIG_MISC_INIT_R
+
 #ifndef CONFIG_SPL_BUILD
 #include config_distro_defaults.h
 #endif
-- 
1.9.3

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Re: [linux-sunxi] [RFC PATCH u-boot-sunxi] sunxi: use TWI1 for I2C outside of SPL for EEPROM access

[Jonathan Liu]

On 17/05/2014 12:01 AM, Hans de Goede wrote:

Hi,

On 05/16/2014 01:32 PM, Jonathan Liu wrote:

This allows accessing the EEPROM on the Olimex A20-OLinuXino-MICRO
using the i2c command.

Signed-off-by: Jonathan Liu net...@gmail.com

p.s.

I don't know what you want this for, but if it is for the purpose of
getting fixed MAC addresses for the NIC, please consider implementing
this: https://github.com/linux-sunxi/linux-sunxi/commit/e7d46d2c

Instead (I've this on my todo for u-boot, so that the kernel and u-boot
behave the same).

This way you will not only help getting a fixed MAC address on the
A20-OLinuXino-MICRO, but everywhere.

Thanks,

Hans

setenv macaddr 02:
setexpr.l sid *0x01c23800
setexpr c \${sid} / 10; setexpr c \${c} % 10; setenv macaddr 
\${macaddr}\${c}

setexpr c \${sid} % 10; setenv macaddr \${macaddr}\${c}
setexpr.l sid *0x01c2380c
setexpr c \${sid} / 1000; setenv macaddr \${macaddr}:\${c}
setexpr c \${sid} / 100; setexpr c \${c} % 10; setenv macaddr 
\${macaddr}\${c}
setexpr c \${sid} / 10; setexpr c \${c} % 10; setenv macaddr 
\${macaddr}:\${c}
setexpr c \${sid} / 1; setexpr c \${c} % 10; setenv macaddr 
\${macaddr}\${c}
setexpr c \${sid} / 1000; setexpr c \${c} % 10; setenv macaddr 
\${macaddr}:\${c}
setexpr c \${sid} / 100; setexpr c \${c} % 10; setenv macaddr 
\${macaddr}\${c}
setexpr c \${sid} / 10; setexpr c \${c} % 10; setenv macaddr 
\${macaddr}:\${c}

setexpr c \${sid} % 10; setenv macaddr \${macaddr}\${c}
setenv ethaddr \${macaddr}

Regards,
Jonathan





---
  arch/arm/include/asm/arch-sunxi/gpio.h | 2 ++
  arch/arm/include/asm/arch-sunxi/i2c.h  | 4 
  board/sunxi/board.c| 6 ++
  include/configs/sunxi-common.h | 4 
  4 files changed, 16 insertions(+)

diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h 
b/arch/arm/include/asm/arch-sunxi/gpio.h
index 46a111e..7a866b4 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -123,6 +123,8 @@ enum sunxi_gpio_number {
  #define SUN7I_GPA0_GMAC   5
  
  #define SUNXI_GPB0_TWI0		2

+#define SUNXI_GPB0_TWI12
+#define SUNXI_GPB0_TWI22
  
  #define SUN4I_GPB22_UART0_TX	2

  #define SUN4I_GPB23_UART0_RX  2
diff --git a/arch/arm/include/asm/arch-sunxi/i2c.h 
b/arch/arm/include/asm/arch-sunxi/i2c.h
index dc5406b..d1708d1 100644
--- a/arch/arm/include/asm/arch-sunxi/i2c.h
+++ b/arch/arm/include/asm/arch-sunxi/i2c.h
@@ -8,7 +8,11 @@
  
  #include asm/arch/cpu.h
  
+#ifdef CONFIG_SPL_BUILD

  #define CONFIG_I2C_MVTWSI_BASESUNXI_TWI0_BASE
+#else
+#define CONFIG_I2C_MVTWSI_BASE SUNXI_TWI1_BASE
+#endif
  /* This is abp0-clk on sun4i/5i/7i / abp1-clk on sun6i/sun8i which is 24MHz */
  #define CONFIG_SYS_TCLK   2400
  
diff --git a/board/sunxi/board.c b/board/sunxi/board.c

index 6c362a3..c9035ba 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -129,9 +129,15 @@ int board_mmc_init(bd_t *bis)
  
  void i2c_init_board(void)

  {
+#ifdef CONFIG_SPL_BUILD
sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUNXI_GPB0_TWI0);
sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUNXI_GPB0_TWI0);
clock_twi_onoff(0, 1);
+#else
+   sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUNXI_GPB0_TWI1);
+   sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUNXI_GPB0_TWI1);
+   clock_twi_onoff(1, 1);
+#endif
  }
  
  #if defined(CONFIG_SPL_BUILD) || defined(CONFIG_SUN6I) || defined(CONFIG_SUN8I)

diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index e11c4ee..19ae9c9 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -320,7 +320,11 @@
  /* No CONFIG_SYS_I2C as we use the non converted mvtwsi driver */
  #define CONFIG_HARD_I2C
  #define CONFIG_SYS_I2C_SUNXI
+#ifdef CONFIG_SPL_BUILD
  #define CONFIG_SYS_I2C_SPEED  40
+#else
+#define CONFIG_SYS_I2C_SPEED   10
+#endif
  #define CONFIG_SYS_I2C_SLAVE  0x7f
  #define CONFIG_CMD_I2C
  



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[linux-sunxi] Re: [PATCH] i2c-sunxi: use standard mode I2C speed of 100 kbit/s for I2C[1-4]

[Jonathan Liu]

On 20 March 2014 23:53, Jonathan Liu net...@gmail.com wrote:
 Standard mode I2C speed is 100 kbit/s and should be used instead of
 200 kbit/s which is non-standard.

 Signed-off-by: Jonathan Liu net...@gmail.com
 ---
  arch/arm/plat-sunxi/include/plat/i2c.h | 8 
  1 file changed, 4 insertions(+), 4 deletions(-)

 diff --git a/arch/arm/plat-sunxi/include/plat/i2c.h 
 b/arch/arm/plat-sunxi/include/plat/i2c.h
 index be8fe41..d75347b 100644
 --- a/arch/arm/plat-sunxi/include/plat/i2c.h
 +++ b/arch/arm/plat-sunxi/include/plat/i2c.h
 @@ -194,10 +194,10 @@ Foscl is clock SCL;standard mode:100KHz or fast 
 mode:400KHz
  #define TWI4_BASE_ADDR_END(TWI4_BASE_ADDR_START + AW_TWI_ADDR_SIZE)

  #define I2C0_TRANSFER_SPEED (40)
 -#define I2C1_TRANSFER_SPEED (20)
 -#define I2C2_TRANSFER_SPEED (20)
 -#define I2C3_TRANSFER_SPEED (20)
 -#define I2C4_TRANSFER_SPEED (20)
 +#define I2C1_TRANSFER_SPEED (10)
 +#define I2C2_TRANSFER_SPEED (10)
 +#define I2C3_TRANSFER_SPEED (10)
 +#define I2C4_TRANSFER_SPEED (10)

  struct sunxi_i2c_platform_data {
 int  bus_num;
 --
 1.9.0


Bump. This is for sunxi-3.4 branch.
Any takers for landing this fix?

Regards,
Jonathan

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[linux-sunxi] [PATCH] i2c-sunxi: use standard mode I2C speed of 100 kbit/s for I2C[1-4]

[Jonathan Liu]

Standard mode I2C speed is 100 kbit/s and should be used instead of
200 kbit/s which is non-standard.

Signed-off-by: Jonathan Liu net...@gmail.com
---
 arch/arm/plat-sunxi/include/plat/i2c.h | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/plat-sunxi/include/plat/i2c.h 
b/arch/arm/plat-sunxi/include/plat/i2c.h
index be8fe41..d75347b 100644
--- a/arch/arm/plat-sunxi/include/plat/i2c.h
+++ b/arch/arm/plat-sunxi/include/plat/i2c.h
@@ -194,10 +194,10 @@ Foscl is clock SCL;standard mode:100KHz or fast 
mode:400KHz
 #define TWI4_BASE_ADDR_END(TWI4_BASE_ADDR_START + AW_TWI_ADDR_SIZE)
 
 #define I2C0_TRANSFER_SPEED (40)
-#define I2C1_TRANSFER_SPEED (20)
-#define I2C2_TRANSFER_SPEED (20)
-#define I2C3_TRANSFER_SPEED (20)
-#define I2C4_TRANSFER_SPEED (20)
+#define I2C1_TRANSFER_SPEED (10)
+#define I2C2_TRANSFER_SPEED (10)
+#define I2C3_TRANSFER_SPEED (10)
+#define I2C4_TRANSFER_SPEED (10)
 
 struct sunxi_i2c_platform_data {
int  bus_num;
-- 
1.9.0

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[linux-sunxi] Re: [PATCH 3.4 v2] sunxi-hdmi: Add 2 pixelclock overrides for 1280x800 hdmi projectors

[Jonathan Liu]

On 24 February 2014 09:29, Hans de Goede hdego...@redhat.com wrote:
 The sunxi video PLL-s can unfortunately not make any random clock encountered
 in EDID info. So hdmi_edid.c has a table to override the pixelclocks in some
 EDID provided modes to a value which the PLL-s can actually make close to the
 real value.

 This commit adds the preferred EDID mode from 2 hdmi projectors to this
 table, so that sunxi-hdmi will work properly with these projectors.

 Reported-by: Jonathan Liu net...@gmail.com
 Tested-by: Jonathan Liu net...@gmail.com
 Signed-off-by: Hans de Goede hdego...@redhat.com
 ---
  drivers/video/sunxi/hdmi/hdmi_edid.c | 4 +++-
  1 file changed, 3 insertions(+), 1 deletion(-)

 diff --git a/drivers/video/sunxi/hdmi/hdmi_edid.c 
 b/drivers/video/sunxi/hdmi/hdmi_edid.c
 index 226db0b..00cf50d 100644
 --- a/drivers/video/sunxi/hdmi/hdmi_edid.c
 +++ b/drivers/video/sunxi/hdmi/hdmi_edid.c
 @@ -77,8 +77,10 @@ struct pclk_override {
  };

  struct pclk_override pclk_override[] = {
 -   /* VIC PCLK  AVI_PR INPUTX INPUTY HT   HBP  HFP  HPSW VT   VBP VFP 
 VPSW I  HS VS   override */
 +   /*  VICPCLK  AVI_PR INPUTX INPUTY HT   HBP  HFP  HPSW  VT  
 VBP VFP VPSW I  HS VS   override */
 { { HDMI_EDID, 14625, 0, 1680, 1050, 2240, 456, 104, 176, 1089, 
 36,  3, 6,  0, 0, 1 }, 14600 },
 +   { { HDMI_EDID,  8350, 0, 1280,  800, 1680, 328,  72, 128,  831, 
 28,  3, 6,  0, 0, 1 },  8325 },
 +   { { HDMI_EDID,  8350, 0, 1280,  800, 1680, 328,  72, 128,  831, 
 21, 10, 6,  0, 1, 1 },  8325 },

Looks good to me.

Regards,
Jonathan

 { { 0, }, -1 }
  };

 --
 1.9.0


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