[PATCH v4 0/2] Kesytone II USB host and PHY drivers

2013-12-12 Thread WingMan Kwok
Resending the series with suggested minor updates from v3 [1].

Series adds USB host support for Keystone SOCs. Keystone SOCs
uses dwc3 hardware IP implementation.  On Keystone II platforms,
we use no-op phy driver.

Patchset are tested on Keystone II EVM with USB2.0 and USB3.0
flash drives along with dts changes.

Cc: Felipe Balbi ba...@ti.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com

WingMan Kwok (2):
  usb: dwc3: Add Keystone specific glue layer
  usb: phy: Add keystone usb phy driver

 drivers/usb/dwc3/Kconfig |7 ++
 drivers/usb/dwc3/Makefile|1 +
 drivers/usb/dwc3/dwc3-keystone.c |  201 ++
 drivers/usb/phy/Kconfig  |9 ++
 drivers/usb/phy/Makefile |1 +
 drivers/usb/phy/phy-keystone.c   |  142 +++
 6 files changed, 361 insertions(+)
 create mode 100644 drivers/usb/dwc3/dwc3-keystone.c
 create mode 100644 drivers/usb/phy/phy-keystone.c

[1] http://www.spinics.net/lists/linux-usb/msg99178.html
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[PATCH v4 2/2] usb: phy: Add keystone usb phy driver

2013-12-12 Thread WingMan Kwok
Add Keystone platform USB PHY driver support. Current main purpose
of this driver is to enable the PHY reference clock gate on the
Keystone SoC. Otherwise it is a nop PHY.

Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Felipe Balbi ba...@ti.com
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: WingMan Kwok w-kw...@ti.com
---
 drivers/usb/phy/Kconfig|9 +++
 drivers/usb/phy/Makefile   |1 +
 drivers/usb/phy/phy-keystone.c |  142 
 3 files changed, 152 insertions(+)
 create mode 100644 drivers/usb/phy/phy-keystone.c

diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 08e2f39..3f2e829 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -40,6 +40,15 @@ config ISP1301_OMAP
  This driver can also be built as a module.  If so, the module
  will be called isp1301_omap.
 
+config KEYSTONE_USB_PHY
+   tristate Keystone USB PHY Driver
+   depends on ARCH_KEYSTONE
+   select NOP_USB_XCEIV
+   help
+ Enable this to support Keystone USB phy. This driver provides
+ interface to interact with USB 2.0 and USB 3.0 PHY that is part
+ of the Keystone SOC.
+
 config MV_U3D_PHY
bool Marvell USB 3.0 PHY controller Driver
depends on CPU_MMP3
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index 022c1da..311b47b 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -30,3 +30,4 @@ obj-$(CONFIG_USB_RCAR_PHY)+= phy-rcar-usb.o
 obj-$(CONFIG_USB_RCAR_GEN2_PHY)+= phy-rcar-gen2-usb.o
 obj-$(CONFIG_USB_ULPI) += phy-ulpi.o
 obj-$(CONFIG_USB_ULPI_VIEWPORT)+= phy-ulpi-viewport.o
+obj-$(CONFIG_KEYSTONE_USB_PHY) += phy-keystone.o
diff --git a/drivers/usb/phy/phy-keystone.c b/drivers/usb/phy/phy-keystone.c
new file mode 100644
index 000..f848ab6
--- /dev/null
+++ b/drivers/usb/phy/phy-keystone.c
@@ -0,0 +1,142 @@
+/*
+ * phy-keystone - USB PHY, talking to dwc3 controller in Keystone.
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * Author: WingMan Kwok w-kw...@ti.com
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/usb/usb_phy_gen_xceiv.h
+#include linux/io.h
+#include linux/of.h
+
+#include phy-generic.h
+
+/* USB PHY control register offsets */
+#define USB_PHY_CTL_UTMI   0x
+#define USB_PHY_CTL_PIPE   0x0004
+#define USB_PHY_CTL_PARAM_10x0008
+#define USB_PHY_CTL_PARAM_20x000c
+#define USB_PHY_CTL_CLOCK  0x0010
+#define USB_PHY_CTL_PLL0x0014
+
+#define PHY_REF_SSP_EN BIT(29)
+
+struct keystone_usbphy {
+   struct usb_phy_gen_xceivusb_phy_gen;
+   void __iomem*phy_ctrl;
+};
+
+static inline u32 keystone_usbphy_readl(void __iomem *base, u32 offset)
+{
+   return readl(base + offset);
+}
+
+static inline void keystone_usbphy_writel(void __iomem *base,
+ u32 offset, u32 value)
+{
+   writel(value, base + offset);
+}
+
+static int keystone_usbphy_init(struct usb_phy *phy)
+{
+   struct keystone_usbphy *k_phy = dev_get_drvdata(phy-dev);
+   u32 val;
+
+   val  = keystone_usbphy_readl(k_phy-phy_ctrl, USB_PHY_CTL_CLOCK);
+   keystone_usbphy_writel(k_phy-phy_ctrl, USB_PHY_CTL_CLOCK,
+   val | PHY_REF_SSP_EN);
+   return 0;
+}
+
+static void keystone_usbphy_shutdown(struct usb_phy *phy)
+{
+   struct keystone_usbphy *k_phy = dev_get_drvdata(phy-dev);
+   u32 val;
+
+   val  = keystone_usbphy_readl(k_phy-phy_ctrl, USB_PHY_CTL_CLOCK);
+   keystone_usbphy_writel(k_phy-phy_ctrl, USB_PHY_CTL_CLOCK,
+   val = ~PHY_REF_SSP_EN);
+}
+
+static int keystone_usbphy_probe(struct platform_device *pdev)
+{
+   struct device   *dev = pdev-dev;
+   struct keystone_usbphy  *k_phy;
+   struct resource *res;
+   int ret;
+
+   k_phy = devm_kzalloc(dev, sizeof(*k_phy), GFP_KERNEL);
+   if (!k_phy)
+   return -ENOMEM;
+
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+   if (!res) {
+   dev_err(dev, missing usb phy resource\n);
+   return -EINVAL;
+   }
+
+   k_phy-phy_ctrl

[PATCH v5 1/2] usb: dwc3: Add Keystone specific glue layer

2013-12-12 Thread WingMan Kwok
Add Keystone platform specific glue layer to support
USB3 Host mode.

Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Felipe Balbi ba...@ti.com
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: WingMan Kwok w-kw...@ti.com
---
 v4-v5: Moved clk_disable after removing core.

 drivers/usb/dwc3/Kconfig |7 ++
 drivers/usb/dwc3/Makefile|1 +
 drivers/usb/dwc3/dwc3-keystone.c |  201 ++
 3 files changed, 209 insertions(+)
 create mode 100644 drivers/usb/dwc3/dwc3-keystone.c

diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index 70fc430..e2c730f 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -70,6 +70,13 @@ config USB_DWC3_PCI
  One such PCIe-based platform is Synopsys' PCIe HAPS model of
  this IP.
 
+config USB_DWC3_KEYSTONE
+   tristate Texas Instruments Keystone2 Platforms
+   default USB_DWC3
+   help
+ Support of USB2/3 functionality in TI Keystone2 platforms.
+ Say 'Y' or 'M' here if you have one such device
+
 comment Debugging features
 
 config USB_DWC3_DEBUG
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index dd17601..10ac3e7 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -32,3 +32,4 @@ endif
 obj-$(CONFIG_USB_DWC3_OMAP)+= dwc3-omap.o
 obj-$(CONFIG_USB_DWC3_EXYNOS)  += dwc3-exynos.o
 obj-$(CONFIG_USB_DWC3_PCI) += dwc3-pci.o
+obj-$(CONFIG_USB_DWC3_KEYSTONE)+= dwc3-keystone.o
diff --git a/drivers/usb/dwc3/dwc3-keystone.c b/drivers/usb/dwc3/dwc3-keystone.c
new file mode 100644
index 000..e3e34eb
--- /dev/null
+++ b/drivers/usb/dwc3/dwc3-keystone.c
@@ -0,0 +1,201 @@
+/**
+ * dwc3-keystone.c - Keystone Specific Glue layer
+ *
+ * Copyright (C) 2010-2013 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Author: WingMan Kwok w-kw...@ti.com
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2  of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/clk.h
+#include linux/module.h
+#include linux/kernel.h
+#include linux/interrupt.h
+#include linux/platform_device.h
+#include linux/dma-mapping.h
+#include linux/io.h
+#include linux/of_platform.h
+
+/* USBSS register offsets */
+#define USBSS_REVISION 0x
+#define USBSS_SYSCONFIG0x0010
+#define USBSS_IRQ_EOI  0x0018
+#define USBSS_IRQSTATUS_RAW_0  0x0020
+#define USBSS_IRQSTATUS_0  0x0024
+#define USBSS_IRQENABLE_SET_0  0x0028
+#define USBSS_IRQENABLE_CLR_0  0x002c
+
+/* IRQ register bits */
+#define USBSS_IRQ_EOI_LINE(n)  BIT(n)
+#define USBSS_IRQ_EVENT_ST BIT(0)
+#define USBSS_IRQ_COREIRQ_EN   BIT(0)
+#define USBSS_IRQ_COREIRQ_CLR  BIT(0)
+
+static u64 kdwc3_dma_mask;
+
+struct dwc3_keystone {
+   struct device   *dev;
+   struct clk  *clk;
+   void __iomem*usbss;
+};
+
+static inline u32 kdwc3_readl(void __iomem *base, u32 offset)
+{
+   return readl(base + offset);
+}
+
+static inline void kdwc3_writel(void __iomem *base, u32 offset, u32 value)
+{
+   writel(value, base + offset);
+}
+
+static void kdwc3_enable_irqs(struct dwc3_keystone *kdwc)
+{
+   u32 val;
+
+   val = kdwc3_readl(kdwc-usbss, USBSS_IRQENABLE_SET_0);
+   val |= USBSS_IRQ_COREIRQ_EN;
+   kdwc3_writel(kdwc-usbss, USBSS_IRQENABLE_SET_0, val);
+}
+
+static void kdwc3_disable_irqs(struct dwc3_keystone *kdwc)
+{
+   u32 val;
+
+   val = kdwc3_readl(kdwc-usbss, USBSS_IRQENABLE_SET_0);
+   val = ~USBSS_IRQ_COREIRQ_EN;
+   kdwc3_writel(kdwc-usbss, USBSS_IRQENABLE_SET_0, val);
+}
+
+static irqreturn_t dwc3_keystone_interrupt(int irq, void *_kdwc)
+{
+   struct dwc3_keystone*kdwc = _kdwc;
+
+   kdwc3_writel(kdwc-usbss, USBSS_IRQENABLE_CLR_0, USBSS_IRQ_COREIRQ_CLR);
+   kdwc3_writel(kdwc-usbss, USBSS_IRQSTATUS_0, USBSS_IRQ_EVENT_ST);
+   kdwc3_writel(kdwc-usbss, USBSS_IRQENABLE_SET_0, USBSS_IRQ_COREIRQ_EN);
+   kdwc3_writel(kdwc-usbss, USBSS_IRQ_EOI, USBSS_IRQ_EOI_LINE(0));
+
+   return IRQ_HANDLED;
+}
+
+static int kdwc3_probe(struct platform_device *pdev)
+{
+   struct device   *dev = pdev-dev;
+   struct device_node  *node = pdev-dev.of_node;
+   struct dwc3_keystone*kdwc;
+   struct resource *res;
+   int error, irq;
+
+   kdwc = devm_kzalloc(dev, sizeof(*kdwc), GFP_KERNEL);
+   if (!kdwc)
+   return -ENOMEM;
+
+   platform_set_drvdata(pdev, kdwc

[PATCH v3 2/2] usb: phy: Add keystone usb phy driver

2013-12-09 Thread WingMan Kwok
Add Keystone platform USB PHY driver support. Current main purpose
of this driver is to enable the PHY reference clock gate on the
Keystone SoC. Otherwise it is a nop PHY.

Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Felipe Balbi ba...@ti.com
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: WingMan Kwok w-kw...@ti.com
---
 drivers/usb/phy/Kconfig|   10 +++
 drivers/usb/phy/Makefile   |1 +
 drivers/usb/phy/phy-keystone.c |  142 
 3 files changed, 153 insertions(+)
 create mode 100644 drivers/usb/phy/phy-keystone.c

diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 08e2f39..c6792f43 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -40,6 +40,16 @@ config ISP1301_OMAP
  This driver can also be built as a module.  If so, the module
  will be called isp1301_omap.
 
+config KEYSTONE_USB_PHY
+   tristate Keystone USB PHY Driver
+   depends on ARCH_KEYSTONE
+   select USB_PHY
+   select NOP_USB_XCEIV
+   help
+ Enable this to support Keystone USB phy. This driver provides
+ interface to interact with USB 2.0 and USB 3.0 PHY that is part
+ of the Keystone SOC.
+
 config MV_U3D_PHY
bool Marvell USB 3.0 PHY controller Driver
depends on CPU_MMP3
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index 022c1da..311b47b 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -30,3 +30,4 @@ obj-$(CONFIG_USB_RCAR_PHY)+= phy-rcar-usb.o
 obj-$(CONFIG_USB_RCAR_GEN2_PHY)+= phy-rcar-gen2-usb.o
 obj-$(CONFIG_USB_ULPI) += phy-ulpi.o
 obj-$(CONFIG_USB_ULPI_VIEWPORT)+= phy-ulpi-viewport.o
+obj-$(CONFIG_KEYSTONE_USB_PHY) += phy-keystone.o
diff --git a/drivers/usb/phy/phy-keystone.c b/drivers/usb/phy/phy-keystone.c
new file mode 100644
index 000..e025eb2
--- /dev/null
+++ b/drivers/usb/phy/phy-keystone.c
@@ -0,0 +1,142 @@
+/*
+ * phy-keystone - USB PHY, talking to dwc3 controller in Keystone.
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * Author: WingMan Kwok w-kw...@ti.com
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/usb/usb_phy_gen_xceiv.h
+#include linux/io.h
+#include linux/of.h
+
+#include phy-generic.h
+
+/* USB PHY control register offsets */
+#define USB_PHY_CTL_UTMI   0x
+#define USB_PHY_CTL_PIPE   0x0004
+#define USB_PHY_CTL_PARAM_10x0008
+#define USB_PHY_CTL_PARAM_20x000c
+#define USB_PHY_CTL_CLOCK  0x0010
+#define USB_PHY_CTL_PLL0x0014
+
+#define PHY_REF_SSP_EN BIT(29)
+
+struct keystone_usbphy {
+   struct usb_phy_gen_xceivusb_phy_gen;
+   void __iomem*phy_ctrl;
+};
+
+static inline u32 keystone_usbphy_readl(void __iomem *base, u32 offset)
+{
+   return readl(base + offset);
+}
+
+static inline void keystone_usbphy_writel(void __iomem *base,
+ u32 offset, u32 value)
+{
+   writel(value, base + offset);
+}
+
+static int keystone_usbphy_init(struct usb_phy *phy)
+{
+   struct keystone_usbphy *k_phy = dev_get_drvdata(phy-dev);
+   u32 val;
+
+   val  = keystone_usbphy_readl(k_phy-phy_ctrl, USB_PHY_CTL_CLOCK);
+   keystone_usbphy_writel(k_phy-phy_ctrl, USB_PHY_CTL_CLOCK,
+   val | PHY_REF_SSP_EN);
+   udelay(20);
+   return 0;
+}
+
+static void keystone_usbphy_shutdown(struct usb_phy *phy)
+{
+   struct keystone_usbphy *k_phy = dev_get_drvdata(phy-dev);
+   u32 val;
+
+   val  = keystone_usbphy_readl(k_phy-phy_ctrl, USB_PHY_CTL_CLOCK);
+   keystone_usbphy_writel(k_phy-phy_ctrl, USB_PHY_CTL_CLOCK,
+   val = ~PHY_REF_SSP_EN);
+}
+
+static int keystone_usbphy_probe(struct platform_device *pdev)
+{
+   struct device   *dev = pdev-dev;
+   struct keystone_usbphy  *k_phy;
+   struct resource *res;
+   int ret;
+
+   k_phy = devm_kzalloc(dev, sizeof(*k_phy), GFP_KERNEL);
+   if (!k_phy)
+   return -ENOMEM;
+
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+   if (!res) {
+   dev_err(dev, missing usb phy resource\n);
+   return -EINVAL

[PATCH v3 1/2] usb: dwc3: Add Keystone specific glue layer

2013-12-09 Thread WingMan Kwok
Add Keystone platform specific glue layer to support
USB3 Host mode.

Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Felipe Balbi ba...@ti.com
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: WingMan Kwok w-kw...@ti.com
---
 drivers/usb/dwc3/Kconfig |7 ++
 drivers/usb/dwc3/Makefile|1 +
 drivers/usb/dwc3/dwc3-keystone.c |  205 ++
 3 files changed, 213 insertions(+)
 create mode 100644 drivers/usb/dwc3/dwc3-keystone.c

diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index 70fc430..e2c730f 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -70,6 +70,13 @@ config USB_DWC3_PCI
  One such PCIe-based platform is Synopsys' PCIe HAPS model of
  this IP.
 
+config USB_DWC3_KEYSTONE
+   tristate Texas Instruments Keystone2 Platforms
+   default USB_DWC3
+   help
+ Support of USB2/3 functionality in TI Keystone2 platforms.
+ Say 'Y' or 'M' here if you have one such device
+
 comment Debugging features
 
 config USB_DWC3_DEBUG
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index dd17601..10ac3e7 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -32,3 +32,4 @@ endif
 obj-$(CONFIG_USB_DWC3_OMAP)+= dwc3-omap.o
 obj-$(CONFIG_USB_DWC3_EXYNOS)  += dwc3-exynos.o
 obj-$(CONFIG_USB_DWC3_PCI) += dwc3-pci.o
+obj-$(CONFIG_USB_DWC3_KEYSTONE)+= dwc3-keystone.o
diff --git a/drivers/usb/dwc3/dwc3-keystone.c b/drivers/usb/dwc3/dwc3-keystone.c
new file mode 100644
index 000..33f71330b
--- /dev/null
+++ b/drivers/usb/dwc3/dwc3-keystone.c
@@ -0,0 +1,205 @@
+/**
+ * dwc3-keystone.c - Keystone Specific Glue layer
+ *
+ * Copyright (C) 2010-2013 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Author: WingMan Kwok w-kw...@ti.com
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2  of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/clk.h
+#include linux/module.h
+#include linux/kernel.h
+#include linux/interrupt.h
+#include linux/platform_device.h
+#include linux/dma-mapping.h
+#include linux/io.h
+#include linux/of_platform.h
+
+/* USBSS register offsets */
+#define USBSS_REVISION 0x
+#define USBSS_SYSCONFIG0x0010
+#define USBSS_IRQ_EOI  0x0018
+#define USBSS_IRQSTATUS_RAW_0  0x0020
+#define USBSS_IRQSTATUS_0  0x0024
+#define USBSS_IRQENABLE_SET_0  0x0028
+#define USBSS_IRQENABLE_CLR_0  0x002c
+
+/* IRQ register bits */
+#define USBSS_IRQ_EOI_LINE(n)  BIT(n)
+#define USBSS_IRQ_EVENT_ST BIT(0)
+#define USBSS_IRQ_COREIRQ_EN   BIT(0)
+#define USBSS_IRQ_COREIRQ_CLR  BIT(0)
+
+static u64 kdwc3_dma_mask;
+
+struct dwc3_keystone {
+   struct device   *dev;
+   struct clk  *clk;
+   void __iomem*usbss;
+};
+
+static inline u32 kdwc3_readl(void __iomem *base, u32 offset)
+{
+   return readl(base + offset);
+}
+
+static inline void kdwc3_writel(void __iomem *base, u32 offset, u32 value)
+{
+   writel(value, base + offset);
+}
+
+static void kdwc3_enable_irqs(struct dwc3_keystone *kdwc)
+{
+   u32 val;
+
+   val = kdwc3_readl(kdwc-usbss, USBSS_IRQENABLE_SET_0);
+   val = USBSS_IRQ_COREIRQ_EN;
+   kdwc3_writel(kdwc-usbss, USBSS_IRQENABLE_SET_0, val);
+}
+
+static void kdwc3_disable_irqs(struct dwc3_keystone *kdwc)
+{
+   u32 val;
+
+   val = kdwc3_readl(kdwc-usbss, USBSS_IRQENABLE_SET_0);
+   val = ~USBSS_IRQ_COREIRQ_EN;
+   kdwc3_writel(kdwc-usbss, USBSS_IRQENABLE_SET_0, val);
+}
+
+static irqreturn_t dwc3_keystone_interrupt(int irq, void *_kdwc)
+{
+   struct dwc3_keystone*kdwc = _kdwc;
+
+   kdwc3_writel(kdwc-usbss, USBSS_IRQENABLE_CLR_0, USBSS_IRQ_COREIRQ_CLR);
+   kdwc3_writel(kdwc-usbss, USBSS_IRQSTATUS_0, USBSS_IRQ_EVENT_ST);
+   kdwc3_writel(kdwc-usbss, USBSS_IRQENABLE_SET_0, USBSS_IRQ_COREIRQ_EN);
+   kdwc3_writel(kdwc-usbss, USBSS_IRQ_EOI, USBSS_IRQ_EOI_LINE(0));
+
+   return IRQ_HANDLED;
+}
+
+static int kdwc3_probe(struct platform_device *pdev)
+{
+   struct device   *dev = pdev-dev;
+   struct device_node  *node = pdev-dev.of_node;
+   struct dwc3_keystone*kdwc;
+   struct resource *res;
+   int error, irq;
+
+   kdwc = devm_kzalloc(dev, sizeof(*kdwc), GFP_KERNEL);
+   if (!kdwc)
+   return -ENOMEM;
+
+   platform_set_drvdata(pdev, kdwc);
+
+   kdwc-dev = dev;
+
+   res

[PATCH v3 0/2] Kesytone II USB host and PHY drivers

2013-12-09 Thread WingMan Kwok
Here is the updated version of the series which addresses comments from
earlier version [1]. The lock in the isr is removed as per the discussion.

Series adds USB host support for Keystone SOCs. Keystone SOCs uses dwc3
hardware IP implementation.  On Keystone II platforms, we use no-op phy driver.

Patchset are tested on Keystone II EVM with USB2.0 and USB3.0 flash drives
along with dts changes.

Cc: Felipe Balbi ba...@ti.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com

WingMan Kwok (2):
  usb: dwc3: Add Keystone specific glue layer
  usb: phy: Add keystone usb phy driver

 drivers/usb/dwc3/Kconfig |7 ++
 drivers/usb/dwc3/Makefile|1 +
 drivers/usb/dwc3/dwc3-keystone.c |  205 ++
 drivers/usb/phy/Kconfig  |   10 ++
 drivers/usb/phy/Makefile |1 +
 drivers/usb/phy/phy-keystone.c   |  142 ++
 6 files changed, 366 insertions(+)
 create mode 100644 drivers/usb/dwc3/dwc3-keystone.c
 create mode 100644 drivers/usb/phy/phy-keystone.c

[1] http://www.spinics.net/lists/linux-usb/msg98861.html
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[PATCH v2 2/5] usb: phy: Add keystone usb phy driver

2013-12-04 Thread WingMan Kwok
Add Keystone platform USB PHY driver support. Current main purpose
of this driver is to enable the PHY reference clock gate on the
Keystone SoC. Otherwise it is a nop PHY.

Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Felipe Balbi ba...@ti.com
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Signed-off-by: WingMan Kwok w-kw...@ti.com
---
 drivers/usb/phy/Kconfig|   10 +++
 drivers/usb/phy/Makefile   |1 +
 drivers/usb/phy/phy-keystone.c |  142 
 3 files changed, 153 insertions(+)
 create mode 100644 drivers/usb/phy/phy-keystone.c

diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 08e2f39..c6792f43 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -40,6 +40,16 @@ config ISP1301_OMAP
  This driver can also be built as a module.  If so, the module
  will be called isp1301_omap.
 
+config KEYSTONE_USB_PHY
+   tristate Keystone USB PHY Driver
+   depends on ARCH_KEYSTONE
+   select USB_PHY
+   select NOP_USB_XCEIV
+   help
+ Enable this to support Keystone USB phy. This driver provides
+ interface to interact with USB 2.0 and USB 3.0 PHY that is part
+ of the Keystone SOC.
+
 config MV_U3D_PHY
bool Marvell USB 3.0 PHY controller Driver
depends on CPU_MMP3
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index 022c1da..311b47b 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -30,3 +30,4 @@ obj-$(CONFIG_USB_RCAR_PHY)+= phy-rcar-usb.o
 obj-$(CONFIG_USB_RCAR_GEN2_PHY)+= phy-rcar-gen2-usb.o
 obj-$(CONFIG_USB_ULPI) += phy-ulpi.o
 obj-$(CONFIG_USB_ULPI_VIEWPORT)+= phy-ulpi-viewport.o
+obj-$(CONFIG_KEYSTONE_USB_PHY) += phy-keystone.o
diff --git a/drivers/usb/phy/phy-keystone.c b/drivers/usb/phy/phy-keystone.c
new file mode 100644
index 000..e025eb2
--- /dev/null
+++ b/drivers/usb/phy/phy-keystone.c
@@ -0,0 +1,142 @@
+/*
+ * phy-keystone - USB PHY, talking to dwc3 controller in Keystone.
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * Author: WingMan Kwok w-kw...@ti.com
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/usb/usb_phy_gen_xceiv.h
+#include linux/io.h
+#include linux/of.h
+
+#include phy-generic.h
+
+/* USB PHY control register offsets */
+#define USB_PHY_CTL_UTMI   0x
+#define USB_PHY_CTL_PIPE   0x0004
+#define USB_PHY_CTL_PARAM_10x0008
+#define USB_PHY_CTL_PARAM_20x000c
+#define USB_PHY_CTL_CLOCK  0x0010
+#define USB_PHY_CTL_PLL0x0014
+
+#define PHY_REF_SSP_EN BIT(29)
+
+struct keystone_usbphy {
+   struct usb_phy_gen_xceivusb_phy_gen;
+   void __iomem*phy_ctrl;
+};
+
+static inline u32 keystone_usbphy_readl(void __iomem *base, u32 offset)
+{
+   return readl(base + offset);
+}
+
+static inline void keystone_usbphy_writel(void __iomem *base,
+ u32 offset, u32 value)
+{
+   writel(value, base + offset);
+}
+
+static int keystone_usbphy_init(struct usb_phy *phy)
+{
+   struct keystone_usbphy *k_phy = dev_get_drvdata(phy-dev);
+   u32 val;
+
+   val  = keystone_usbphy_readl(k_phy-phy_ctrl, USB_PHY_CTL_CLOCK);
+   keystone_usbphy_writel(k_phy-phy_ctrl, USB_PHY_CTL_CLOCK,
+   val | PHY_REF_SSP_EN);
+   udelay(20);
+   return 0;
+}
+
+static void keystone_usbphy_shutdown(struct usb_phy *phy)
+{
+   struct keystone_usbphy *k_phy = dev_get_drvdata(phy-dev);
+   u32 val;
+
+   val  = keystone_usbphy_readl(k_phy-phy_ctrl, USB_PHY_CTL_CLOCK);
+   keystone_usbphy_writel(k_phy-phy_ctrl, USB_PHY_CTL_CLOCK,
+   val = ~PHY_REF_SSP_EN);
+}
+
+static int keystone_usbphy_probe(struct platform_device *pdev)
+{
+   struct device   *dev = pdev-dev;
+   struct keystone_usbphy  *k_phy;
+   struct resource *res;
+   int ret;
+
+   k_phy = devm_kzalloc(dev, sizeof(*k_phy), GFP_KERNEL);
+   if (!k_phy)
+   return -ENOMEM;
+
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+   if (!res) {
+   dev_err(dev, missing usb phy resource\n);
+   return -EINVAL;
+   }
+
+   k_phy-phy_ctrl

[PATCH v2 3/5] ARM: dts: keystone: Add usb phy devicetree bindings

2013-12-04 Thread WingMan Kwok
Added device tree support for TI's Keystone USB PHY driver and updated the
Documentation with device tree binding information.

Cc: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: WingMan Kwok w-kw...@ti.com
---
 .../devicetree/bindings/usb/keystone-phy.txt   |   19 +++
 arch/arm/boot/dts/keystone.dtsi|7 +++
 2 files changed, 26 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/keystone-phy.txt

diff --git a/Documentation/devicetree/bindings/usb/keystone-phy.txt 
b/Documentation/devicetree/bindings/usb/keystone-phy.txt
new file mode 100644
index 000..300830d
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/keystone-phy.txt
@@ -0,0 +1,19 @@
+TI Keystone USB PHY
+
+Required properties:
+ - compatible: should be ti,keystone-usbphy.
+ - #address-cells, #size-cells : should be '1' if the device has sub-nodes
+   with 'reg' property.
+ - reg : Address and length of the usb phy control register set.
+
+The main purpose of this PHY driver is to enable the USB PHY reference clock
+gate on the Keystone SOC for both the USB2 and USB3 PHY. Otherwise it is just
+an NOP PHY driver.  Hence this node is referenced as both the usb2 and usb3
+phy node in the USB Glue layer driver node.
+
+usb_phy: usb_phy@2620738 {
+   compatible = ti,keystone-usbphy;
+   #address-cells = 1;
+   #size-cells = 1;
+   reg = 0x2620738 32;
+};
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index f6d6d9e..d497d9e 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -181,5 +181,12 @@
interrupts = GIC_SPI 300 IRQ_TYPE_EDGE_RISING;
clocks = clkspi;
};
+
+   usb_phy: usb_phy@2620738 {
+   compatible = ti,keystone-usbphy;
+   #address-cells = 1;
+   #size-cells = 1;
+   reg = 0x2620738 32;
+   };
};
 };
-- 
1.7.9.5

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[PATCH v2 5/5] ARM: keystone: defconfig: enable USB support

2013-12-04 Thread WingMan Kwok
Enable the USB support (Host mode only) on TI's Keystone platform.
It also enables the support of usb mass storage, FAT and Ext4
filesystems to test rootfs mount over an USB disk.

Cc: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: WingMan Kwok w-kw...@ti.com
---
 arch/arm/configs/keystone_defconfig |   20 +++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/arch/arm/configs/keystone_defconfig 
b/arch/arm/configs/keystone_defconfig
index 9943e5d..a018244 100644
--- a/arch/arm/configs/keystone_defconfig
+++ b/arch/arm/configs/keystone_defconfig
@@ -115,6 +115,8 @@ CONFIG_MTD_UBI=y
 CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_EEPROM_AT24=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
 CONFIG_NETDEVICES=y
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
@@ -129,10 +131,24 @@ CONFIG_SPI_DAVINCI=y
 CONFIG_SPI_SPIDEV=y
 # CONFIG_HWMON is not set
 CONFIG_WATCHDOG=y
-# CONFIG_USB_SUPPORT is not set
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_MON=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_DEBUG=y
+CONFIG_USB_DWC3_VERBOSE=y
+CONFIG_KEYSTONE_USB_PHY=y
 CONFIG_DMADEVICES=y
 CONFIG_COMMON_CLK_DEBUG=y
 CONFIG_MEMORY=y
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_NTFS_FS=y
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_JFFS2_FS_WBUF_VERIFY=y
@@ -144,6 +160,8 @@ CONFIG_ROOT_NFS=y
 CONFIG_NFSD=y
 CONFIG_NFSD_V3=y
 CONFIG_NFSD_V3_ACL=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
 CONFIG_PRINTK_TIME=y
 CONFIG_DEBUG_SHIRQ=y
 CONFIG_DEBUG_INFO=y
-- 
1.7.9.5

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[PATCH v2 1/5] usb: dwc3: Add Keystone specific glue layer

2013-12-04 Thread WingMan Kwok
Add Keystone platform specific glue layer to support
USB3 Host mode.

Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Felipe Balbi ba...@ti.com
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Signed-off-by: WingMan Kwok w-kw...@ti.com
---
 drivers/usb/dwc3/Kconfig |7 ++
 drivers/usb/dwc3/Makefile|1 +
 drivers/usb/dwc3/dwc3-keystone.c |  210 ++
 3 files changed, 218 insertions(+)
 create mode 100644 drivers/usb/dwc3/dwc3-keystone.c

diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index 70fc430..e2c730f 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -70,6 +70,13 @@ config USB_DWC3_PCI
  One such PCIe-based platform is Synopsys' PCIe HAPS model of
  this IP.
 
+config USB_DWC3_KEYSTONE
+   tristate Texas Instruments Keystone2 Platforms
+   default USB_DWC3
+   help
+ Support of USB2/3 functionality in TI Keystone2 platforms.
+ Say 'Y' or 'M' here if you have one such device
+
 comment Debugging features
 
 config USB_DWC3_DEBUG
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index dd17601..10ac3e7 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -32,3 +32,4 @@ endif
 obj-$(CONFIG_USB_DWC3_OMAP)+= dwc3-omap.o
 obj-$(CONFIG_USB_DWC3_EXYNOS)  += dwc3-exynos.o
 obj-$(CONFIG_USB_DWC3_PCI) += dwc3-pci.o
+obj-$(CONFIG_USB_DWC3_KEYSTONE)+= dwc3-keystone.o
diff --git a/drivers/usb/dwc3/dwc3-keystone.c b/drivers/usb/dwc3/dwc3-keystone.c
new file mode 100644
index 000..d3c0dc5
--- /dev/null
+++ b/drivers/usb/dwc3/dwc3-keystone.c
@@ -0,0 +1,210 @@
+/**
+ * dwc3-keystone.c - Keystone Specific Glue layer
+ *
+ * Copyright (C) 2010-2013 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Author: WingMan Kwok w-kw...@ti.com
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2  of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/clk.h
+#include linux/module.h
+#include linux/kernel.h
+#include linux/interrupt.h
+#include linux/spinlock.h
+#include linux/platform_device.h
+#include linux/dma-mapping.h
+#include linux/io.h
+#include linux/of_platform.h
+
+/* USBSS register offsets */
+#define USBSS_REVISION 0x
+#define USBSS_SYSCONFIG0x0010
+#define USBSS_IRQ_EOI  0x0018
+#define USBSS_IRQSTATUS_RAW_0  0x0020
+#define USBSS_IRQSTATUS_0  0x0024
+#define USBSS_IRQENABLE_SET_0  0x0028
+#define USBSS_IRQENABLE_CLR_0  0x002c
+
+/* IRQ register bits */
+#define USBSS_IRQ_EOI_LINE(n)  BIT(n)
+#define USBSS_IRQ_EVENT_ST BIT(0)
+#define USBSS_IRQ_COREIRQ_EN   BIT(0)
+#define USBSS_IRQ_COREIRQ_CLR  BIT(0)
+
+static u64 kdwc3_dma_mask;
+
+struct dwc3_keystone {
+   spinlock_t  lock;
+   struct device   *dev;
+   struct clk  *clk;
+   void __iomem*usbss;
+};
+
+static inline u32 kdwc3_readl(void __iomem *base, u32 offset)
+{
+   return readl(base + offset);
+}
+
+static inline void kdwc3_writel(void __iomem *base, u32 offset, u32 value)
+{
+   writel(value, base + offset);
+}
+
+static void kdwc3_enable_irqs(struct dwc3_keystone *kdwc)
+{
+   u32 val;
+
+   val = kdwc3_readl(kdwc-usbss, USBSS_IRQENABLE_SET_0);
+   val = USBSS_IRQ_COREIRQ_EN;
+   kdwc3_writel(kdwc-usbss, USBSS_IRQENABLE_SET_0, val);
+}
+
+static void kdwc3_disable_irqs(struct dwc3_keystone *kdwc)
+{
+   u32 val;
+
+   val = kdwc3_readl(kdwc-usbss, USBSS_IRQENABLE_SET_0);
+   val = ~USBSS_IRQ_COREIRQ_EN;
+   kdwc3_writel(kdwc-usbss, USBSS_IRQENABLE_SET_0, val);
+}
+
+static irqreturn_t dwc3_keystone_interrupt(int irq, void *_kdwc)
+{
+   struct dwc3_keystone*kdwc = _kdwc;
+
+   spin_lock(kdwc-lock);
+   kdwc3_writel(kdwc-usbss, USBSS_IRQENABLE_CLR_0, USBSS_IRQ_COREIRQ_CLR);
+   kdwc3_writel(kdwc-usbss, USBSS_IRQSTATUS_0, USBSS_IRQ_EVENT_ST);
+   kdwc3_writel(kdwc-usbss, USBSS_IRQENABLE_SET_0, USBSS_IRQ_COREIRQ_EN);
+   kdwc3_writel(kdwc-usbss, USBSS_IRQ_EOI, USBSS_IRQ_EOI_LINE(0));
+   spin_unlock(kdwc-lock);
+
+   return IRQ_HANDLED;
+}
+
+static int kdwc3_probe(struct platform_device *pdev)
+{
+   struct device_node  *node = pdev-dev.of_node;
+   struct device   *dev = pdev-dev;
+   struct dwc3_keystone*kdwc;
+   struct resource *res;
+   int error, irq;
+
+   kdwc = devm_kzalloc(dev, sizeof(*kdwc), GFP_KERNEL);
+   if (!kdwc)
+   return -ENOMEM

[PATCH v2 4/5] ARM: dts: keystone: Add usb devicetree bindings

2013-12-04 Thread WingMan Kwok
Added device tree support for TI's Keystone USB driver and updated the
Documentation with device tree binding information.

Cc: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: WingMan Kwok w-kw...@ti.com
---
 .../devicetree/bindings/usb/keystone-usb.txt   |   41 
 arch/arm/boot/dts/keystone.dtsi|   18 +
 2 files changed, 59 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/keystone-usb.txt

diff --git a/Documentation/devicetree/bindings/usb/keystone-usb.txt 
b/Documentation/devicetree/bindings/usb/keystone-usb.txt
new file mode 100644
index 000..ac2c7cc
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/keystone-usb.txt
@@ -0,0 +1,41 @@
+TI Keystone Soc USB Controller
+
+DWC3 GLUE
+
+Required properties:
+ - compatible: should be ti,keystone-dwc3.
+ - #address-cells, #size-cells : should be '1' if the device has sub-nodes
+   with 'reg' property.
+ - reg : Address and length of the register set for the USB subsystem on
+   the SOC.
+ - interrupts : The irq number of this device that is used to interrupt the
+   MPU.
+ - ranges: allows valid 1:1 translation between child's address space and
+   parent's address space.
+ - clocks: Clock IDs array as required by the controller.
+ - clock-names: names of clocks correseponding to IDs in the clock property.
+
+Sub-nodes:
+The dwc3 core should be added as subnode to Keystone DWC3 glue.
+- dwc3 :
+   The binding details of dwc3 can be found in:
+   Documentation/devicetree/bindings/usb/dwc3.txt
+
+Example:
+   usb: usb@268 {
+   compatible = ti,keystone-dwc3;
+   #address-cells = 1;
+   #size-cells = 1;
+   reg = 0x268 0x1;
+   clocks = clkusb;
+   clock-names = usb;
+   interrupts = GIC_SPI 393 IRQ_TYPE_EDGE_RISING;
+   ranges;
+
+   dwc3@269 {
+   compatible = synopsys,dwc3;
+   reg = 0x269 0x7;
+   interrupts = GIC_SPI 393 IRQ_TYPE_EDGE_RISING;
+   usb-phy = usb_phy, usb_phy;
+   };
+   };
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index d497d9e..0911bb7 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -188,5 +188,23 @@
#size-cells = 1;
reg = 0x2620738 32;
};
+
+   usb: usb@268 {
+   compatible = ti,keystone-dwc3;
+   #address-cells = 1;
+   #size-cells = 1;
+   reg = 0x268 0x1;
+   clocks = clkusb;
+   clock-names = usb;
+   interrupts = GIC_SPI 393 IRQ_TYPE_EDGE_RISING;
+   ranges;
+
+   dwc3@269 {
+   compatible = synopsys,dwc3;
+   reg = 0x269 0x7;
+   interrupts = GIC_SPI 393 IRQ_TYPE_EDGE_RISING;
+   usb-phy = usb_phy, usb_phy;
+   };
+   };
};
 };
-- 
1.7.9.5

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[PATCH v2 0/5] Kesytone II USB support

2013-12-04 Thread WingMan Kwok
Here is the updated version of the series which addresses comments from
earlier version [1].  The PHY register programming is moved to a separate
PHY driver.

Series adds USB host support for Keystone SOCs. Keystone SOCs uses dwc3
hardware IP implementation.  On Keystone II platforms, we use no-op phy driver.

All three patches are posted together just for completeness. Only first patch
is expected to go via usb tree and other two via linux-keystone tree.

Patchset are tested on Keystone II EVM with USB2.0 and USB3.0 flash drives.

Cc: Santosh Shilimkar santosh.shilim...@ti.com

WingMan Kwok (5):
  usb: dwc3: Add Keystone specific glue layer
  usb: phy: Add keystone usb phy driver
  ARM: dts: keystone: Add usb phy devicetree bindings
  ARM: dts: keystone: Add usb devicetree bindings
  ARM: keystone: defconfig: enable USB support

 .../devicetree/bindings/usb/keystone-phy.txt   |   19 ++
 .../devicetree/bindings/usb/keystone-usb.txt   |   41 
 arch/arm/boot/dts/keystone.dtsi|   25 +++
 arch/arm/configs/keystone_defconfig|   20 +-
 drivers/usb/dwc3/Kconfig   |7 +
 drivers/usb/dwc3/Makefile  |1 +
 drivers/usb/dwc3/dwc3-keystone.c   |  210 
 drivers/usb/phy/Kconfig|   10 +
 drivers/usb/phy/Makefile   |1 +
 drivers/usb/phy/phy-keystone.c |  142 +
 10 files changed, 475 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/usb/keystone-phy.txt
 create mode 100644 Documentation/devicetree/bindings/usb/keystone-usb.txt
 create mode 100644 drivers/usb/dwc3/dwc3-keystone.c
 create mode 100644 drivers/usb/phy/phy-keystone.c

[1] http://www.spinics.net/lists/linux-usb/msg98166.html
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[PATCH 0/3] Kesytone II USB support

2013-11-25 Thread WingMan Kwok
Series adds USB host support for Keystone SOCs. Keystone SOCs uses dwc3
hardware IP implementation.  On Keystone II platforms, we use no-op phy
driver.

All three patches are posted together just for completeness. Only first patch
is expected to go via usb tree and other two via linux-keystone tree.

Patchset are tested on Keystone II EVM with USB2.0 and USB3.0 flash drives.

Cc: Santosh Shilimkar santosh.shilim...@ti.com

WingMan Kwok (3):
  usb: dwc3: Add Keystone specific glue layer
  ARM: dts: keystone: Add usb devicetree bindings
  ARM: keystone: defconfig: enable USB host mode support

 .../devicetree/bindings/usb/keystone-usb.txt   |   43 
 arch/arm/boot/dts/keystone.dtsi|   27 ++
 arch/arm/configs/keystone_defconfig|   20 +-
 drivers/usb/dwc3/Kconfig   |7 +
 drivers/usb/dwc3/Makefile  |1 +
 drivers/usb/dwc3/dwc3-keystone.c   |  272 
 6 files changed, 369 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/usb/keystone-usb.txt
 create mode 100644 drivers/usb/dwc3/dwc3-keystone.c

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[PATCH 2/3] ARM: dts: keystone: Add usb devicetree bindings

2013-11-25 Thread WingMan Kwok
Added device tree support for TI's Keystone USB driver and updated the
Documentation with device tree binding information.

On Keystone II platforms, we use no-op phy driver.

Cc: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: WingMan Kwok w-kw...@ti.com
---
 .../devicetree/bindings/usb/keystone-usb.txt   |   43 
 arch/arm/boot/dts/keystone.dtsi|   27 
 2 files changed, 70 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/keystone-usb.txt

diff --git a/Documentation/devicetree/bindings/usb/keystone-usb.txt 
b/Documentation/devicetree/bindings/usb/keystone-usb.txt
new file mode 100644
index 000..a67de8f
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/keystone-usb.txt
@@ -0,0 +1,43 @@
+TI Keystone Soc USB Controller
+
+DWC3 GLUE
+
+Required properties:
+ - compatible: should be ti,keystone-dwc3.
+ - #address-cells, #size-cells : should be '1' if the device has sub-nodes
+   with 'reg' property.
+ - reg : Address and length of the register set for the device. First pair
+   is the USB subsystem specific register set.  Second pair is the
+   USB subsystem PHY control register set.
+ - interrupts : The irq number of this device that is used to interrupt the
+   MPU.
+ - ranges: allows valid 1:1 translation between child's address space and
+   parent's address space.
+ - clocks: Clock IDs array as required by the controller.
+ - clock-names: names of clocks correseponding to IDs in the clock property.
+
+Sub-nodes:
+The dwc3 core should be added as subnode to Keystone DWC3 glue.
+- dwc3 :
+   The binding details of dwc3 can be found in:
+   Documentation/devicetree/bindings/usb/dwc3.txt
+
+Example:
+   usb: usb@268 {
+   compatible = ti,keystone-dwc3;
+   #address-cells = 1;
+   #size-cells = 1;
+   reg = 0x268 0x1
+  0x2620738 32;
+   clocks = clkusb;
+   clock-names = usb;
+   interrupts = GIC_SPI 393 IRQ_TYPE_EDGE_RISING;
+   ranges;
+
+   dwc3@269 {
+   compatible = synopsys,dwc3;
+   reg = 0x269 0x7;
+   interrupts = GIC_SPI 393 IRQ_TYPE_EDGE_RISING;
+   usb-phy = usb2_phy, usb3_phy;
+   };
+   };
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index f6d6d9e..1e1049c 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -181,5 +181,32 @@
interrupts = GIC_SPI 300 IRQ_TYPE_EDGE_RISING;
clocks = clkspi;
};
+
+   usb2_phy: usb2_phy {
+   compatible = usb-nop-xceiv;
+   };
+
+   usb3_phy: usb3_phy {
+   compatible = usb-nop-xceiv;
+   };
+
+   usb: usb@268 {
+   compatible = ti,keystone-dwc3;
+   #address-cells = 1;
+   #size-cells = 1;
+   reg = 0x268 0x1
+  0x2620738 32;
+   clocks = clkusb;
+   clock-names = usb;
+   interrupts = GIC_SPI 393 IRQ_TYPE_EDGE_RISING;
+   ranges;
+
+   dwc3@269 {
+   compatible = synopsys,dwc3;
+   reg = 0x269 0x7;
+   interrupts = GIC_SPI 393 IRQ_TYPE_EDGE_RISING;
+   usb-phy = usb2_phy, usb3_phy;
+   };
+   };
};
 };
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[PATCH 1/3] usb: dwc3: Add Keystone specific glue layer

2013-11-25 Thread WingMan Kwok
Add Keystone platform specific glue layer to support
USB3 Host mode.

Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Felipe Balbi ba...@ti.com
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Signed-off-by: WingMan Kwok w-kw...@ti.com
---
 drivers/usb/dwc3/Kconfig |7 +
 drivers/usb/dwc3/Makefile|1 +
 drivers/usb/dwc3/dwc3-keystone.c |  272 ++
 3 files changed, 280 insertions(+)
 create mode 100644 drivers/usb/dwc3/dwc3-keystone.c

diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index 70fc430..e2c730f 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -70,6 +70,13 @@ config USB_DWC3_PCI
  One such PCIe-based platform is Synopsys' PCIe HAPS model of
  this IP.
 
+config USB_DWC3_KEYSTONE
+   tristate Texas Instruments Keystone2 Platforms
+   default USB_DWC3
+   help
+ Support of USB2/3 functionality in TI Keystone2 platforms.
+ Say 'Y' or 'M' here if you have one such device
+
 comment Debugging features
 
 config USB_DWC3_DEBUG
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index dd17601..10ac3e7 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -32,3 +32,4 @@ endif
 obj-$(CONFIG_USB_DWC3_OMAP)+= dwc3-omap.o
 obj-$(CONFIG_USB_DWC3_EXYNOS)  += dwc3-exynos.o
 obj-$(CONFIG_USB_DWC3_PCI) += dwc3-pci.o
+obj-$(CONFIG_USB_DWC3_KEYSTONE)+= dwc3-keystone.o
diff --git a/drivers/usb/dwc3/dwc3-keystone.c b/drivers/usb/dwc3/dwc3-keystone.c
new file mode 100644
index 000..a4c9cbc
--- /dev/null
+++ b/drivers/usb/dwc3/dwc3-keystone.c
@@ -0,0 +1,272 @@
+/**
+ * dwc3-keystone.c - Keystone Specific Glue layer
+ *
+ * Copyright (C) 2010-2013 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Authors: WingMan Kwok w-kw...@ti.com
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2  of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/clk.h
+#include linux/module.h
+#include linux/kernel.h
+#include linux/slab.h
+#include linux/interrupt.h
+#include linux/spinlock.h
+#include linux/platform_device.h
+#include linux/dma-mapping.h
+#include linux/ioport.h
+#include linux/io.h
+#include linux/of.h
+#include linux/of_platform.h
+#include linux/usb/usb_phy_gen_xceiv.h
+
+
+#define BITS(n)(BIT(n) - 1)
+#define BITFIELD(x, s, n)  (((x)  BITS(n))  (s))
+#define MASK   0x
+#define PHY_REF_SSP_EN(x)  BITFIELD(x, 29, 1)
+
+static u64 kdwc3_dma_mask;
+
+struct kdwc3_phy_ctrl_regs {
+   u32 phy_utmi;
+   u32 phy_pipe;
+   u32 phy_param_ctrl_1;
+   u32 phy_param_ctrl_2;
+   u32 phy_clock;
+   u32 phy_pll;
+};
+
+struct kdwc3_irq_regs {
+   u32 revision;
+   u32 _rsvd0[3];
+   u32 sysconfig;
+   u32 _rsvd1[1];
+   u32 irq_eoi;
+   u32 _rsvd2[1];
+   struct {
+   u32 raw_status;
+   u32 status;
+   u32 enable_set;
+   u32 enable_clr;
+   } irqs[16];
+};
+
+struct dwc3_keystone {
+   spinlock_t  lock;
+   struct device   *dev;
+   struct clk  *clk;
+   int irqn;
+
+   struct kdwc3_phy_ctrl_regs __iomem  *phy_ctrl;
+   struct kdwc3_irq_regs __iomem   *usbss;
+};
+
+static void kdwc3_enable_irqs(struct dwc3_keystone *kdwc)
+{
+   writel(1, kdwc-usbss-irqs[kdwc-irqn].enable_set);
+}
+
+static void kdwc3_disable_irqs(struct dwc3_keystone *kdwc)
+{
+   writel(0, kdwc-usbss-irqs[kdwc-irqn].enable_set);
+}
+
+static int kdwc3_enable(struct dwc3_keystone *kdwc)
+{
+   int error;
+   u32 val;
+
+   kdwc-clk = devm_clk_get(kdwc-dev, usb);
+   if (IS_ERR_OR_NULL(kdwc-clk)) {
+   dev_err(kdwc-dev, unable to get kdwc usb clock\n);
+   return -ENODEV;
+   }
+
+   val  = readl(kdwc-phy_ctrl-phy_clock);
+   writel(val | PHY_REF_SSP_EN(1), kdwc-phy_ctrl-phy_clock);
+   udelay(20);
+
+   error = clk_prepare_enable(kdwc-clk);
+   if (error  0) {
+   dev_dbg(kdwc-dev, unable to enable usb clock, err %d\n,
+   error);
+   writel(val, kdwc-phy_ctrl-phy_clock);
+   return error;
+   }
+
+   /* soft reset usbss */
+   writel(1, kdwc-usbss-sysconfig);
+   while (readl(kdwc-usbss-sysconfig)  1

[PATCH 3/3] ARM: keystone: defconfig: enable USB host mode support

2013-11-25 Thread WingMan Kwok
Enable the USB host mode support on TI's Keystone platform.
It also enables the support of usb mass storage, FAT and Ext4
filesystems to test rootfs mount over an USB disk.

Cc: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: WingMan Kwok w-kw...@ti.com
---
 arch/arm/configs/keystone_defconfig |   20 +++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/arch/arm/configs/keystone_defconfig 
b/arch/arm/configs/keystone_defconfig
index 9943e5d..686f612 100644
--- a/arch/arm/configs/keystone_defconfig
+++ b/arch/arm/configs/keystone_defconfig
@@ -115,6 +115,8 @@ CONFIG_MTD_UBI=y
 CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_EEPROM_AT24=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
 CONFIG_NETDEVICES=y
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
@@ -129,10 +131,24 @@ CONFIG_SPI_DAVINCI=y
 CONFIG_SPI_SPIDEV=y
 # CONFIG_HWMON is not set
 CONFIG_WATCHDOG=y
-# CONFIG_USB_SUPPORT is not set
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_MON=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_DEBUG=y
+CONFIG_USB_DWC3_VERBOSE=y
+CONFIG_NOP_USB_XCEIV=y
 CONFIG_DMADEVICES=y
 CONFIG_COMMON_CLK_DEBUG=y
 CONFIG_MEMORY=y
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_NTFS_FS=y
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_JFFS2_FS_WBUF_VERIFY=y
@@ -144,6 +160,8 @@ CONFIG_ROOT_NFS=y
 CONFIG_NFSD=y
 CONFIG_NFSD_V3=y
 CONFIG_NFSD_V3_ACL=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
 CONFIG_PRINTK_TIME=y
 CONFIG_DEBUG_SHIRQ=y
 CONFIG_DEBUG_INFO=y
-- 
1.7.9.5

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