Re: [RFC PATCH v2 10/11] powerpc: Support to replay PMIs
On Mon, 2016-08-01 at 18:07 +1000, Nicholas Piggin wrote:
> > +static inline unsigned long soft_irq_set_level(int value)
> > +{
> > + unsigned long flags, zero;
> > +
> > + asm volatile(
> > + "li %1,%3; lbz %0,%2(13); stb %1,%2(13)"
> > + : "=r" (flags), "=&r" (zero)
> > + : "i" (offsetof(struct paca_struct, soft_enabled)),\
> > + "i" (value)
> > + : "memory");
> > +
> > + return flags;
> > +}
I would add a WARN_ON (possibly under control
of CONFIG_TRACE_IRQFLAGS(*) to verify we only ever use this to make
interrupts "less enabled".
(*) Or check if distros use CONFIG_TRACE_IRQFLAGS these days, then
create a new CONFIG_DEBUG_IRQ or something like that, and also move
the other use of CONFIG_TRACE_IRQFLAGS in local_irq_restore that
checks the msr as we really don't want that in production kernels.
Cheers,
Ben.
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Re: [RFC PATCH v2 10/11] powerpc: Support to replay PMIs
On Mon, 2016-08-01 at 18:07 +1000, Nicholas Piggin wrote: > This will replay hardware_interrupt_common in the case we got a PMI > interrupt but no EE. > > Should we just follow the normal pattern here, return 0xf00 for PMI, > and replay the same as the other cases? Agreed. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v3 12/21] powerpc/mm: Convert early cpu/mmu feature check to use the new helpers
On Thu, 2016-07-28 at 00:18 +1000, Michael Ellerman wrote:
> --- a/arch/powerpc/mm/hash_utils_64.c
> +++ b/arch/powerpc/mm/hash_utils_64.c
> @@ -530,7 +530,7 @@ static bool might_have_hea(void)
> * we will never see an HEA ethernet device.
> */
> #ifdef CONFIG_IBMEBUS
> - return !cpu_has_feature(CPU_FTR_ARCH_207S) &&
> + return !__cpu_has_feature(CPU_FTR_ARCH_207S) &&
> !firmware_has_feature(FW_FEATURE_SPLPAR);
> #else
All these could go if that function was split. The part that reads the
DT stays in early_init_mmu_devtree (bastically up to "found:" and then
the bit at the end that scans the huge pages).
The rest, which just assigns the various mmu_*_psize can go into
eary_init_mmu(). That means the only conversion needed is the one
below:
> return false;
> @@ -561,7 +561,7 @@ static void __init htab_init_page_sizes(void)
> * Not in the device-tree, let's fallback on known size
> * list for 16M capable GP & GR
> */
> - if (mmu_has_feature(MMU_FTR_16M_PAGE))
> + if (__mmu_has_feature(MMU_FTR_16M_PAGE))
> memcpy(mmu_psize_defs, mmu_psize_defaults_gp,
> sizeof(mmu_psize_defaults_gp));
> found:
And the rest can remain.
> @@ -591,7 +591,7 @@ found:
> mmu_vmalloc_psize = MMU_PAGE_64K;
> if (mmu_linear_psize == MMU_PAGE_4K)
> mmu_linear_psize = MMU_PAGE_64K;
> - if (mmu_has_feature(MMU_FTR_CI_LARGE_PAGE)) {
> + if (__mmu_has_feature(MMU_FTR_CI_LARGE_PAGE)) {
> /*
> * When running on pSeries using 64k pages
> for ioremap
> * would stop us accessing the HEA ethernet.
> So if we
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Re: [PATCH v3 12/21] powerpc/mm: Convert early cpu/mmu feature check to use the new helpers
On Thu, 2016-07-28 at 00:18 +1000, Michael Ellerman wrote:
>
> diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h
> b/arch/powerpc/include/asm/book3s/64/mmu.h
> index 70c995870297..6deda6ecc4f7 100644
> --- a/arch/powerpc/include/asm/book3s/64/mmu.h
> +++ b/arch/powerpc/include/asm/book3s/64/mmu.h
> @@ -116,7 +116,7 @@ extern void hash__early_init_mmu_secondary(void);
> extern void radix__early_init_mmu_secondary(void);
> static inline void early_init_mmu_secondary(void)
> {
> - if (radix_enabled())
> + if (__radix_enabled())
> return radix__early_init_mmu_secondary();
> return hash__early_init_mmu_secondary();
> }
This one can go, no ?
Cheers,
Ben.
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Re: _PAGE_PRESENT and _PAGE_ACCESSED
On Tue, 2016-07-26 at 19:52 +0200, LEROY Christophe wrote: > In ppc8xx tlbmiss handler, we consider a page valid if both > _PAGE_PRESENT and _PAGE_ACCESSED are set. > Is there any chance to have _PAGE_ACCESSED set and not _PAGE_PRESENT ? > Otherwise we could simplify the handler by considering the page valid > only when _PAGE_ACCESSED is set When _PAGE_PRESENT is not set, the PTE becomes a swap PTE and a pile of the other bits can be repurposed, you may want to verify if _PAGE_ACCESSED is one of them. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] Make system_reset_pSeries relocatable
On Wed, 2016-07-27 at 17:32 +1000, Balbir Singh wrote: > From: Balbir Singh > > Currently the power management bits are broken w.r.t. relocation. > There are direct branches from system_reset_pSeries to > power7_wakeup_*. Side track: we should really get rid of the _pSeries suffix for these things :-) > The correct way to do it is to do what > the slb miss handler does, which is jump to a small stub within > the first 64k of the relocated address and then jump to the > actual location. > > The code has been lightly tested (not the kvm bits), I would highly > appreciate a review of the code. I suspect there might be easy > to find bugs :) > > Cc: b...@kernel.crashing.org > Cc: m...@ellerman.id.au > Cc: pau...@samba.org > Cc: npig...@gmail.com > Cc: sva...@linux.vnet.ibm.com > > Signed-off-by: Balbir Singh > --- > arch/powerpc/kernel/exceptions-64s.S | 82 ++-- > > 1 file changed, 51 insertions(+), 31 deletions(-) > > diff --git a/arch/powerpc/kernel/exceptions-64s.S > b/arch/powerpc/kernel/exceptions-64s.S > index 8bcc1b4..64f9650 100644 > --- a/arch/powerpc/kernel/exceptions-64s.S > +++ b/arch/powerpc/kernel/exceptions-64s.S > @@ -118,39 +118,21 @@ BEGIN_FTR_SECTION > cmpwi cr4,r5,1 > mtspr SPRN_HSPRG0,r13 > > - lbz r0,PACA_THREAD_IDLE_STATE(r13) > - cmpwi cr2,r0,PNV_THREAD_NAP > - bgt cr2,8f /* Either > sleep or Winkle */ > - > - /* Waking up from nap should not cause hypervisor state loss > */ > - bgt cr3,. > - > - /* Waking up from nap */ > - li r0,PNV_THREAD_RUNNING > - stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear > thread state */ > - > -#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE > - li r0,KVM_HWTHREAD_IN_KERNEL > - stb r0,HSTATE_HWTHREAD_STATE(r13) > - /* Order setting hwthread_state vs. testing hwthread_req */ > - sync > - lbz r0,HSTATE_HWTHREAD_REQ(r13) > - cmpwi r0,0 > - beq 1f > - b kvm_start_guest > -1: > +#ifndef CONFIG_RELOCATABLE > + b power7_wakeup_common > +#else > + /* > + * We can't just use a direct branch to power7_wakeup_common > + * because the distance from here to there depends on where > + * the kernel ends up being put. > + */ > + mfctr r11 > + ld r10, PACAKBASE(r13) > + LOAD_HANDLER(r10, power7_wakeup_common) > + mtctr r10 > + bctr > #endif > > - /* Return SRR1 from power7_nap() */ > - mfspr r3,SPRN_SRR1 > - beq cr3,2f > - b power7_wakeup_noloss > -2: b power7_wakeup_loss > - > - /* Fast Sleep wakeup on PowerNV */ > -8: GET_PACA(r13) > - b power7_wakeup_tb_loss > - > 9: > END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) > #endif /* CONFIG_PPC_P7_NAP */ > @@ -1448,6 +1430,44 @@ power4_fixup_nap: > blr > #endif > > + .align 7 > +_GLOBAL(power7_wakeup_common) > +#ifdef CONFIG_RELOCATABLE > + mtctr r11 > +#endif > + lbz r0,PACA_THREAD_IDLE_STATE(r13) > + cmpwi cr2,r0,PNV_THREAD_NAP > + bgt cr2,8f /* Either > sleep or Winkle */ > + > + /* Waking up from nap should not cause hypervisor state loss > */ > + bgt cr3,. > + > + /* Waking up from nap */ > + li r0,PNV_THREAD_RUNNING > + stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear > thread state */ > + > +#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE > + li r0,KVM_HWTHREAD_IN_KERNEL > + stb r0,HSTATE_HWTHREAD_STATE(r13) > + /* Order setting hwthread_state vs. testing hwthread_req */ > + sync > + lbz r0,HSTATE_HWTHREAD_REQ(r13) > + cmpwi r0,0 > + beq 1f > + b kvm_start_guest > +1: > +#endif > + > + /* Return SRR1 from power7_nap() */ > + mfspr r3,SPRN_SRR1 > + beq cr3,2f > + b power7_wakeup_noloss > +2: b power7_wakeup_loss > + > + /* Fast Sleep wakeup on PowerNV */ > +8: GET_PACA(r13) > + b power7_wakeup_tb_loss > + > /* > * Hash table stuff > */ ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [RFC PATCH 0/9]powerpc: "paca->soft_enabled" based local atomic operation implementation
On Mon, 2016-07-25 at 20:22 +0530, Madhavan Srinivasan wrote: > But this patchset uses Benjamin Herrenschmidt suggestion of using > arch_local_irq_disable_var() to soft_disable interrupts (including PMIs). > After finishing the "op", arch_local_irq_restore() called and correspondingly > interrupts are replayed if any occured. I am not fan of "var", we probably want "level". Also be careful, you might be already soft-disabled at level 1, you must restore to level 1, not level 0 in that case. Might want to actually return the level in "flags" and restore that. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 2/3] powerpc/mm: Rename hpte_init_lpar() & put fallback in a header
On Mon, 2016-07-25 at 20:36 +1000, Michael Ellerman wrote:
> That would be nice, but these look fishy at least:
>
> arch/powerpc/platforms/cell/spu_manage.c: if
> (!firmware_has_feature(FW_FEATURE_LPAR))
> arch/powerpc/platforms/cell/spu_manage.c: if
> (!firmware_has_feature(FW_FEATURE_LPAR)) {
> > arch/powerpc/platforms/cell/spu_manage.c: if
> > (!firmware_has_feature(FW_FEATURE_LPAR))
Those can just be checks for LV1, I think ..
> > arch/powerpc/platforms/pasemi/iommu.c:
> > !firmware_has_feature(FW_FEATURE_LPAR)) {
> drivers/net/ethernet/pasemi/pasemi_mac.c: return
> firmware_has_feature(FW_FEATURE_LPAR);
And that was some experiemtal PAPR'ish thing wasn't it ?
Cheers,
Ben.
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Re: [PATCH 2/3] powerpc/mm: Rename hpte_init_lpar() & put fallback in a header
On Mon, 2016-07-25 at 15:33 +1000, Michael Ellerman wrote: > When we detect a PS3 we set both PS3_LV1 and LPAR at the same time, > so > there should be no way they can get out of sync, other than due to a > bug in the code. I thought I had changed PS3 to no longer set LPAR ? I like having a flag that basically says PAPR and that's pretty much what LPAR is, in fact I think I've been using it elsewhere with that meaning Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 2/3] powerpc/mm: Rename hpte_init_lpar() & put fallback in a header
On Mon, 2016-07-25 at 14:13 +1000, Stephen Rothwell wrote: > Hi Michael, > > On Mon, 25 Jul 2016 12:57:50 +1000 Michael Ellerman > wrote: > > > > hpte_init_lpar() is part of the pseries platform, so name it as such. > > Provide the fallback implementation in a header, rather than using a > > weak function. > > firmware_has_feature(FW_FEATURE_LPAR) can also be true for > CONFIG_PPC_PS3. Is this a problem? Shouldn't be with my latest series Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc/64: implement a slice mask cache
On Sat, 2016-07-23 at 17:10 +1000, Nicholas Piggin wrote: > I wanted to avoid doing more work under slice_convert_lock, but > we should just make that a per-mm lock anyway shouldn't we? Aren't the readers under the mm sem taken for writing or has this changed ? Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [for-4.8, 1/2] powerpc/mm: Switch user slb fault handling to translation enabled
On Fri, 2016-07-22 at 22:37 +1000, Nicholas Piggin wrote: > > We also handle fault with proper stack initialized. This enable us > to > > callout to C in fault handling routines. We don't do this for > kernel > > mapping, because of the possibility of taking recursive fault if > > kernel stack in not yet mapped by an slb entry. > > > > This enable us to handle Power9 slb fault better. We will add > bolted > > entries for the entire kernel mapping in segment table and user slb > > entries we take fault and insert on demand. With translation on, we > > should be able to access segment table from fault handler. > > What does this cost on P8? Is that a problem? Might need to do > feature bits. Also what is the need ? The segment table is only for Nest MMU clients, we should probably handle it separately. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] powerpc/book64s: Move a few exception common handlers to make room
This moves the CBE RAS and facility unavailable "common" handlers down to after the FWNMI page. This frees up some space in the very demanded spaces before the relocation-on vectors and before the FWNMI page. They are still within 64K of __start, so CONFIG_RELOCATABLE should still work. Signed-off-by: Benjamin Herrenschmidt --- Written in an airline lounge after about 30h spent in planes and airports, so I apologize in advance if something is just plain wrong here, but it seems to compile ;-) arch/powerpc/kernel/exceptions-64s.S | 17 + 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 4c94406..92bab94 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -762,11 +762,6 @@ kvmppc_skip_Hinterrupt: #else STD_EXCEPTION_COMMON(0x1700, altivec_assist, unknown_exception) #endif -#ifdef CONFIG_CBE_RAS - STD_EXCEPTION_COMMON(0x1200, cbe_system_error, cbe_system_error_exception) - STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, cbe_maintenance_exception) - STD_EXCEPTION_COMMON(0x1800, cbe_thermal, cbe_thermal_exception) -#endif /* CONFIG_CBE_RAS */ /* * Relocation-on interrupts: A subset of the interrupts can be delivered @@ -1131,9 +1126,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX) bl vsx_unavailable_exception b ret_from_except - STD_EXCEPTION_COMMON(0xf60, facility_unavailable, facility_unavailable_exception) - STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, facility_unavailable_exception) - /* Equivalents to the above handlers for relocation-on interrupt vectors */ STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist) MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell) @@ -1170,6 +1162,15 @@ fwnmi_data_area: . = 0x8000 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */ + STD_EXCEPTION_COMMON(0xf60, facility_unavailable, facility_unavailable_exception) + STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, facility_unavailable_exception) + +#ifdef CONFIG_CBE_RAS + STD_EXCEPTION_COMMON(0x1200, cbe_system_error, cbe_system_error_exception) + STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, cbe_maintenance_exception) + STD_EXCEPTION_COMMON(0x1800, cbe_thermal, cbe_thermal_exception) +#endif /* CONFIG_CBE_RAS */ + .globl hmi_exception_early hmi_exception_early: EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0xe60) ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 02/14] powerpc/irq: Add support for HV virtualization interrupts
On Sat, 2016-07-16 at 16:33 -0500, Benjamin Herrenschmidt wrote: > On Sat, 2016-07-16 at 20:40 +1000, Michael Ellerman wrote:s > > This is breaking allmodconfig with: > > > > arch/powerpc/kernel/exceptions-64s.S:778: Error: attempt to move > > .org backwards > > arch/powerpc/kernel/exceptions-64s.S:779: Error: attempt to move > > .org backwards > > arch/powerpc/kernel/exceptions-64s.S:803: Error: attempt to move > > .org backwards > > arch/powerpc/kernel/exceptions-64s.S:804: Error: attempt to move > > .org backwards > > arch/powerpc/kernel/exceptions-64s.S:823: Error: attempt to move > > .org backwards > > arch/powerpc/kernel/exceptions-64s.S:833: Error: attempt to move > > .org backwards > > > > http://kisskb.ozlabs.ibm.com/kisskb/buildresult/12746513/ > > Yuck. Is that even fixable without completely shuffling all the > IRQ stuff ? We really need to find a way to sort that shit once > and for all... I reproduced... We need to move more of the "common" ones out of the way, without making the conditional branches lose it. Ugh Another quick and easy option: Get rid of Cell :-) There is 3 cell ones right there we could get rid of ;-) ... except that's not enough. Now the OOL handlers are bumping into the FWNMI page. Argh. Moved a couple more, seems to work, I'm sending you a patch in the next few monites to test that needs to be added *before* the HV virtualization interrupts one. It works with the few variants of allmodconfigs I managed to try on the laptop (basically with and without RELOCATABLE). Let me know how it goes in kisskb. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 02/14] powerpc/irq: Add support for HV virtualization interrupts
On Sat, 2016-07-16 at 20:40 +1000, Michael Ellerman wrote: > This is breaking allmodconfig with: > > arch/powerpc/kernel/exceptions-64s.S:778: Error: attempt to move .org > backwards > arch/powerpc/kernel/exceptions-64s.S:779: Error: attempt to move .org > backwards > arch/powerpc/kernel/exceptions-64s.S:803: Error: attempt to move .org > backwards > arch/powerpc/kernel/exceptions-64s.S:804: Error: attempt to move .org > backwards > arch/powerpc/kernel/exceptions-64s.S:823: Error: attempt to move .org > backwards > arch/powerpc/kernel/exceptions-64s.S:833: Error: attempt to move .org > backwards > > http://kisskb.ozlabs.ibm.com/kisskb/buildresult/12746513/ Yuck. Is that even fixable without completely shuffling all the IRQ stuff ? We really need to find a way to sort that shit once and for all... Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [patch] ide: missing break statement in set_timings_mdma()
On Thu, 2016-07-14 at 13:48 +0300, Dan Carpenter wrote:
> There was clearly supposed to be a break statement here. Currently we
> use the k2 ata timings instead of sh ata ones we intended. Probably no
> one has this hardware anymore so it likely doesn't make a difference
> beyond the static checker warning.
>
> Signed-off-by: Dan Carpenter
Acked-by: Benjamin Herrenschmidt
Should probably also:
CC: sta...@vger.kernel.org
> diff --git a/drivers/ide/pmac.c b/drivers/ide/pmac.c
> index 7f0434f..0c5d3a9 100644
> --- a/drivers/ide/pmac.c
> +++ b/drivers/ide/pmac.c
> @@ -707,6 +707,7 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32
> *timings, u32 *timings2,
> *timings = ((*timings) & ~TR_133_PIOREG_MDMA_MASK) | tr;
> *timings2 = (*timings2) & ~TR_133_UDMAREG_UDMA_EN;
> }
> + break;
> case controller_un_ata6:
> case controller_k2_ata6: {
> /* 100Mhz cell */
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Re: [bug report] [PATCH] powerpc: Thermal control for dual core G5s
On Wed, 2016-07-13 at 13:15 +0300, Dan Carpenter wrote:
> Hello Benjamin Herrenschmidt,
>
> The patch ac171c46667c: "[PATCH] powerpc: Thermal control for dual
> core G5s" from Feb 8, 2006, leads to the following static checker
> warning:
>
> drivers/macintosh/windfarm_smu_controls.c:83 smu_set_fan()
> warn: buffer overflow 'buffer' 16 <= 16
Thanks. I had a look at it seems like id is actually always
smaller than 6. So it's just the check id > 7 that needs
to be id > 5 I think and unless some of these machines have a bad
device-tree I think we don't actually corrupt memory.
> drivers/macintosh/windfarm_smu_controls.c
> 54 static int smu_set_fan(int pwm, u8 id, u16 value)
> 55 {
> 56 struct smu_cmd cmd;
> 57 u8 buffer[16];
> ^^
> 16 bytes.
>
> 58 DECLARE_COMPLETION_ONSTACK(comp);
> 59 int rc;
> 60
> 61 /* Fill SMU command structure */
> 62 cmd.cmd = SMU_CMD_FAN_COMMAND;
> 63
> 64 /* The SMU has an "old" and a "new" way of setting
> the fan speed
> 65 * Unfortunately, I found no reliable way to know
> which one works
> 66 * on a given machine model. After some
> investigations it appears
> 67 * that MacOS X just tries the new one, and if it
> fails fallbacks
> 68 * to the old ones ... Ugh.
> 69 */
> 70 retry:
> 71 if (smu_supports_new_fans_ops) {
> 72 buffer[0] = 0x30;
> 73 buffer[1] = id;
> 74 *((u16 *)(&buffer[2])) = value;
> 75 cmd.data_len = 4;
> 76 } else {
> 77 if (id > 7)
> ^^
> Assume id is 7.
>
> 78 return -EINVAL;
> 79 /* Fill argument buffer */
> 80 memset(buffer, 0, 16);
> 81 buffer[0] = pwm ? 0x10 : 0x00;
> 82 buffer[1] = 0x01 << id;
> 83 *((u16 *)&buffer[2 + id * 2]) = value;
> ^^
> 2 + 7 * 2 = 16. We're write two bytes beyond the end of the array.
>
> 84 cmd.data_len = 14;
> 85 }
> 86
>
>
> regards,
> dan carpenter
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Re: [PATCH for-4.8 02/10] powerpc/mm: Convert early cpu/mmu feature check to use the new helpers
On Wed, 2016-07-13 at 19:36 +0530, Aneesh Kumar K.V wrote: > > I'm not sure about that. This is converting way way way way more > > functions than is needed. Especially if Michael applies my series > > there will be very little code run before the patching, really only > the > > MMU initialization > > > Michael is also running into boot issues with the early init rewrite > patch series on G5. That is why I didn't rebase my patches on top of > that changes. Well that shouldn't be too hard to fix when I'm back next week. It's working fine on my quad G5 ;-) Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH for-4.8 02/10] powerpc/mm: Convert early cpu/mmu feature check to use the new helpers
On Wed, 2016-07-13 at 15:08 +0530, Aneesh Kumar K.V wrote:
> This switch most of the early feature check to use the non static key
> variant of the function. In later patches we will be switching
> cpu_has_feature and mmu_has_feature to use static keys and we can use
> them only after static key/jump label is initialized. Any check for
> feature before jump label init should be done using this new helper.
I'm not sure about that. This is converting way way way way more
functions than is needed. Especially if Michael applies my series
there will be very little code run before the patching, really only the
MMU initialization
> Signed-off-by: Aneesh Kumar K.V
> ---
> arch/powerpc/include/asm/book3s/64/mmu-hash.h | 4 ++--
> arch/powerpc/include/asm/book3s/64/pgtable.h | 2 +-
> arch/powerpc/kernel/paca.c| 2 +-
> arch/powerpc/kernel/setup-common.c| 6 +++---
> arch/powerpc/kernel/setup_32.c| 14 +++---
> arch/powerpc/kernel/setup_64.c| 12 ++--
> arch/powerpc/kernel/smp.c | 2 +-
> arch/powerpc/kvm/book3s_hv_builtin.c | 2 +-
> arch/powerpc/mm/44x_mmu.c | 6 +++---
> arch/powerpc/mm/hash_native_64.c | 2 +-
> arch/powerpc/mm/hash_utils_64.c | 12 ++--
> arch/powerpc/mm/hugetlbpage.c | 2 +-
> arch/powerpc/mm/mmu_context_nohash.c | 4 ++--
> arch/powerpc/mm/pgtable-hash64.c | 2 +-
> arch/powerpc/mm/ppc_mmu_32.c | 2 +-
> arch/powerpc/platforms/44x/iss4xx.c | 2 +-
> arch/powerpc/platforms/44x/ppc476.c | 2 +-
> arch/powerpc/platforms/85xx/smp.c | 6 +++---
> arch/powerpc/platforms/cell/pervasive.c | 2 +-
> arch/powerpc/platforms/cell/smp.c | 2 +-
> arch/powerpc/platforms/powermac/setup.c | 2 +-
> arch/powerpc/platforms/powermac/smp.c | 4 ++--
> arch/powerpc/platforms/powernv/setup.c| 2 +-
> arch/powerpc/platforms/powernv/smp.c | 4 ++--
> arch/powerpc/platforms/powernv/subcore.c | 2 +-
> arch/powerpc/platforms/pseries/lpar.c | 4 ++--
> arch/powerpc/platforms/pseries/smp.c | 6 +++---
> 27 files changed, 56 insertions(+), 56 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h
> b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
> index 6ec21aad8ccc..e908a8cc1942 100644
> --- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h
> +++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
> @@ -239,7 +239,7 @@ static inline unsigned long
> hpte_encode_avpn(unsigned long vpn, int psize,
> */
> v = (vpn >> (23 - VPN_SHIFT)) &
> ~(mmu_psize_defs[psize].avpnm);
> v <<= HPTE_V_AVPN_SHIFT;
> - if (!cpu_has_feature(CPU_FTR_ARCH_300))
> + if (!__cpu_has_feature(CPU_FTR_ARCH_300))
> v |= ((unsigned long) ssize) << HPTE_V_SSIZE_SHIFT;
> return v;
> }
> @@ -267,7 +267,7 @@ static inline unsigned long
> hpte_encode_r(unsigned long pa, int base_psize,
> int actual_psize, int
> ssize)
> {
>
> - if (cpu_has_feature(CPU_FTR_ARCH_300))
> + if (__cpu_has_feature(CPU_FTR_ARCH_300))
> pa |= ((unsigned long) ssize) <<
> HPTE_R_3_0_SSIZE_SHIFT;
>
> /* A 4K page needs no special encoding */
> diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h
> b/arch/powerpc/include/asm/book3s/64/pgtable.h
> index d3ab97e3c744..bf3452fbfad6 100644
> --- a/arch/powerpc/include/asm/book3s/64/pgtable.h
> +++ b/arch/powerpc/include/asm/book3s/64/pgtable.h
> @@ -805,7 +805,7 @@ static inline int __meminit
> vmemmap_create_mapping(unsigned long start,
> unsigned long
> page_size,
> unsigned long
> phys)
> {
> - if (radix_enabled())
> + if (__radix_enabled())
> return radix__vmemmap_create_mapping(start,
> page_size, phys);
> return hash__vmemmap_create_mapping(start, page_size, phys);
> }
> diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
> index 93dae296b6be..1b0b89e80824 100644
> --- a/arch/powerpc/kernel/paca.c
> +++ b/arch/powerpc/kernel/paca.c
> @@ -184,7 +184,7 @@ void setup_paca(struct paca_struct *new_paca)
> * if we do a GET_PACA() before the feature fixups have been
> * applied
> */
> - if (cpu_has_feature(CPU_FTR_HVMODE))
> + if (__cpu_has_feature(CPU_FTR_HVMODE))
> mtspr(SPRN_SPRG_HPACA, local_paca);
> #endif
> mtspr(SPRN_SPRG_PACA, local_paca);
> diff --git a/arch/powerpc/kernel/setup-common.c
> b/arch/powerpc/kernel/setup-common.c
> index 8ca79b7503d8..f43d2d76d81f 100644
> --- a/arch/powerpc/kernel/setup-common.c
> +++ b/arch/powerpc/kernel/setup-common.c
> @@ -236,7 +236,7 @@ static int show_cpuinfo(struct seq_file *m, void
> *v)
> seq_printf
Re: [PATCH for-4.8_set4 0/2] Segment table support
On Wed, 2016-07-13 at 15:10 +0530, Aneesh Kumar K.V wrote: > Hi, > > This series add support for ISA 3.0 memory segment table. > > Aneesh Kumar K.V (2): > powerpc/mm: Switch user slb fault handling to translation enabled > powerpc/mm: Support segment table for Power9 The segment table will only be used for the nest MMU, shouldn't we keep that a separate path that we call explictly from fault interrupts coming from NestMMU agents instead ? > Documentation/kernel-parameters.txt | 3 + > arch/powerpc/include/asm/book3s/64/hash.h | 10 + > arch/powerpc/include/asm/book3s/64/mmu-hash.h | 17 ++ > arch/powerpc/include/asm/book3s/64/mmu.h | 4 + > arch/powerpc/include/asm/mmu.h| 6 +- > arch/powerpc/include/asm/mmu_context.h| 5 +- > arch/powerpc/kernel/exceptions-64s.S | 55 +++- > arch/powerpc/kernel/prom.c| 13 +- > arch/powerpc/mm/hash_utils_64.c | 83 +- > arch/powerpc/mm/mmu_context_book3s64.c| 32 ++- > arch/powerpc/mm/slb.c | 359 > ++ > 11 files changed, 564 insertions(+), 23 deletions(-) > ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 11/14] powerpc/powernv/pci: Fallback to OPAL for TCE invalidations
If we don't find registers for the PHB or don't know the model
specific invalidation method, use OPAL calls instead.
Signed-off-by: Benjamin Herrenschmidt
---
v2. Missed some new invalidation calls that went upstream since I
wrote the original patch.
arch/powerpc/platforms/powernv/pci-ioda.c | 37 ++-
1 file changed, 31 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index ac4a432..4e9b000 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1867,6 +1867,17 @@ static void pnv_pci_phb3_tce_invalidate(struct
pnv_ioda_pe *pe, bool rm,
}
}
+static inline void pnv_pci_ioda2_tce_invalidate_pe(struct pnv_ioda_pe *pe)
+{
+ struct pnv_phb *phb = pe->phb;
+
+ if (phb->model == PNV_PHB_MODEL_PHB3 && phb->regs)
+ pnv_pci_phb3_tce_invalidate_pe(pe);
+ else
+ opal_pci_tce_kill(phb->opal_id, OPAL_PCI_TCE_KILL_PE,
+ pe->pe_number, 0, 0, 0);
+}
+
static void pnv_pci_ioda2_tce_invalidate(struct iommu_table *tbl,
unsigned long index, unsigned long npages, bool rm)
{
@@ -1875,17 +1886,31 @@ static void pnv_pci_ioda2_tce_invalidate(struct
iommu_table *tbl,
list_for_each_entry_rcu(tgl, &tbl->it_group_list, next) {
struct pnv_ioda_pe *pe = container_of(tgl->table_group,
struct pnv_ioda_pe, table_group);
- if (pe->phb->type == PNV_PHB_NPU) {
+ struct pnv_phb *phb = pe->phb;
+ unsigned int shift = tbl->it_page_shift;
+
+ if (phb->type == PNV_PHB_NPU) {
/*
* The NVLink hardware does not support TCE kill
* per TCE entry so we have to invalidate
* the entire cache for it.
*/
- pnv_pci_phb3_tce_invalidate_entire(pe->phb, rm);
+ pnv_pci_phb3_tce_invalidate_entire(phb, rm);
continue;
}
- pnv_pci_phb3_tce_invalidate(pe, rm, tbl->it_page_shift,
- index, npages);
+ if (phb->model == PNV_PHB_MODEL_PHB3 && phb->regs)
+ pnv_pci_phb3_tce_invalidate(pe, rm, shift,
+ index, npages);
+ else if (rm)
+ opal_rm_pci_tce_kill(phb->opal_id,
+OPAL_PCI_TCE_KILL_PAGES,
+pe->pe_number, 1u << shift,
+index << shift, npages);
+ else
+ opal_pci_tce_kill(phb->opal_id,
+ OPAL_PCI_TCE_KILL_PAGES,
+ pe->pe_number, 1u << shift,
+ index << shift, npages);
}
}
@@ -2151,7 +2176,7 @@ static long pnv_pci_ioda2_set_window(struct
iommu_table_group *table_group,
pnv_pci_link_table_and_group(phb->hose->node, num,
tbl, &pe->table_group);
- pnv_pci_phb3_tce_invalidate_pe(pe);
+ pnv_pci_ioda2_tce_invalidate_pe(pe);
return 0;
}
@@ -2289,7 +2314,7 @@ static long pnv_pci_ioda2_unset_window(struct
iommu_table_group *table_group,
if (ret)
pe_warn(pe, "Unmapping failed, ret = %ld\n", ret);
else
- pnv_pci_phb3_tce_invalidate_pe(pe);
+ pnv_pci_ioda2_tce_invalidate_pe(pe);
pnv_pci_unlink_table_and_group(table_group->tables[num], table_group);
___
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[PATCH 14/14] powerpc/pci: Don't try to allocate resources that will be reassigned
When we know we will reassign all resources, trying (and failing)
to allocate them initially is fairly pointless and leads to a lot
of scary messages in the kernel log
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/pci-common.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index d1f91e1..fb32db4 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1370,8 +1370,10 @@ void __init pcibios_resource_survey(void)
/* Allocate and assign resources */
list_for_each_entry(b, &pci_root_buses, node)
pcibios_allocate_bus_resources(b);
- pcibios_allocate_resources(0);
- pcibios_allocate_resources(1);
+ if (!pci_has_flag(PCI_REASSIGN_ALL_RSRC)) {
+ pcibios_allocate_resources(0);
+ pcibios_allocate_resources(1);
+ }
/* Before we start assigning unassigned resource, we try to reserve
* the low IO area and the VGA memory area if they intersect the
--
2.7.4
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[PATCH 13/14] powerpc/powernv/pci: Check status of a PHB before using it
If the firmware encounters an error (internal or HW) during initialization
of a PHB, it might leave the device-node in the tree but mark it disabled
using the "status" property. We should check it.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/platforms/powernv/pci-ioda.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index b48c130..f975d19 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -3655,6 +3655,9 @@ static void __init pnv_pci_init_ioda_phb(struct
device_node *np,
void *aux;
long rc;
+ if (!of_device_is_available(np))
+ return;
+
pr_info("Initializing %s PHB (%s)\n",
pnv_phb_names[ioda_type], of_node_full_name(np));
--
2.7.4
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[PATCH 12/14] powerpc/powernv/pci: Use the device-tree to get available range of M64's
M64's are the configurable 64-bit windows that cover the 64-bit MMIO
space. We used to hard code 16 windows. Newer chips might have a
variable number and might need to reserve some as well (for example
on PHB4/POWER9, M32 and M64 are actually unified and we use M64#0
to map the 32-bit space).
So newer OPALs will provide a property we can use to know what range
of windows is available. The property is named so that it can
eventually support multiple ranges but we only use the first one for
now.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/platforms/powernv/pci-ioda.c | 49 +++
1 file changed, 43 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index 32c7e1e..b48c130 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -197,9 +197,6 @@ static int pnv_ioda2_init_m64(struct pnv_phb *phb)
goto fail;
}
- /* Mark the M64 BAR assigned */
- set_bit(phb->ioda.m64_bar_idx, &phb->ioda.m64_bar_alloc);
-
/*
* Exclude the segments for reserved and root bus PE, which
* are first or last two PEs.
@@ -410,6 +407,7 @@ static void __init pnv_ioda_parse_m64_window(struct pnv_phb
*phb)
struct pci_controller *hose = phb->hose;
struct device_node *dn = hose->dn;
struct resource *res;
+ u32 m64_range[2], i;
const u32 *r;
u64 pci_addr;
@@ -430,6 +428,29 @@ static void __init pnv_ioda_parse_m64_window(struct
pnv_phb *phb)
return;
}
+ /* Find the available M64 BAR range and pickup the last one for
+* covering the whole 64-bits space. We support only one range.
+*/
+ if (of_property_read_u32_array(dn, "ibm,opal-available-m64-ranges",
+ m64_range, 2)) {
+ /* In absence of the property, assume 0..15 */
+ m64_range[0] = 0;
+ m64_range[1] = 16;
+ }
+ /* We only support 64 bits in our allocator */
+ if (m64_range[1] > 63) {
+ pr_warn("%s: Limiting M64 range to 63 (from %d) on PHB#%x\n",
+ __func__, m64_range[1], phb->hose->global_number);
+ m64_range[1] = 63;
+ }
+ /* Empty range, no m64 */
+ if (m64_range[1] <= m64_range[0]) {
+ pr_warn("%s: M64 empty, disabling M64 usage on PHB#%x\n",
+ __func__, phb->hose->global_number);
+ return;
+ }
+
+ /* Configure M64 informations */
res = &hose->mem_resources[1];
res->name = dn->full_name;
res->start = of_translate_address(dn, r + 2);
@@ -442,11 +463,27 @@ static void __init pnv_ioda_parse_m64_window(struct
pnv_phb *phb)
phb->ioda.m64_segsize = phb->ioda.m64_size / phb->ioda.total_pe_num;
phb->ioda.m64_base = pci_addr;
- pr_info(" MEM64 0x%016llx..0x%016llx -> 0x%016llx\n",
- res->start, res->end, pci_addr);
+ /* This lines up nicely with the display from processing OF ranges */
+ pr_info(" MEM 0x%016llx..0x%016llx -> 0x%016llx (M64 #%d..%d)\n",
+ res->start, res->end, pci_addr, m64_range[0],
+ m64_range[0] + m64_range[1] - 1);
+
+ /* Mark all M64 used up by default */
+ phb->ioda.m64_bar_alloc = (unsigned long)-1;
/* Use last M64 BAR to cover M64 window */
- phb->ioda.m64_bar_idx = 15;
+ m64_range[1]--;
+ phb->ioda.m64_bar_idx = m64_range[0] + m64_range[1];
+
+ pr_info(" Using M64 #%d as default window\n", phb->ioda.m64_bar_idx);
+
+ /* Mark remaining ones free */
+ for (i = m64_range[0]; i < m64_range[1]; i++)
+ clear_bit(i, &phb->ioda.m64_bar_alloc);
+
+ /* Setup init functions for M64 based on IODA version, IODA3 uses
+* the IODA2 code
+*/
if (phb->type == PNV_PHB_IODA1)
phb->init_m64 = pnv_ioda1_init_m64;
else
--
2.7.4
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[PATCH 11/14] powerpc/powernv/pci: Fallback to OPAL for TCE invalidations
If we don't find registers for the PHB or don't know the model
specific invalidation method, use OPAL calls instead.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/platforms/powernv/pci-ioda.c | 33 +++
1 file changed, 29 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index ac4a432..32c7e1e 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1867,6 +1867,17 @@ static void pnv_pci_phb3_tce_invalidate(struct
pnv_ioda_pe *pe, bool rm,
}
}
+static inline void pnv_pci_ioda2_tce_invalidate_pe(struct pnv_ioda_pe *pe)
+{
+ struct pnv_phb *phb = pe->phb;
+
+ if (phb->model == PNV_PHB_MODEL_PHB3 && phb->regs)
+ pnv_pci_phb3_tce_invalidate_pe(pe);
+ else
+ opal_pci_tce_kill(phb->opal_id, OPAL_PCI_TCE_KILL_PE,
+ pe->pe_number, 0, 0, 0);
+}
+
static void pnv_pci_ioda2_tce_invalidate(struct iommu_table *tbl,
unsigned long index, unsigned long npages, bool rm)
{
@@ -1875,17 +1886,31 @@ static void pnv_pci_ioda2_tce_invalidate(struct
iommu_table *tbl,
list_for_each_entry_rcu(tgl, &tbl->it_group_list, next) {
struct pnv_ioda_pe *pe = container_of(tgl->table_group,
struct pnv_ioda_pe, table_group);
- if (pe->phb->type == PNV_PHB_NPU) {
+ struct pnv_phb *phb = pe->phb;
+ unsigned int shift = tbl->it_page_shift;
+
+ if (phb->type == PNV_PHB_NPU) {
/*
* The NVLink hardware does not support TCE kill
* per TCE entry so we have to invalidate
* the entire cache for it.
*/
- pnv_pci_phb3_tce_invalidate_entire(pe->phb, rm);
+ pnv_pci_phb3_tce_invalidate_entire(phb, rm);
continue;
}
- pnv_pci_phb3_tce_invalidate(pe, rm, tbl->it_page_shift,
- index, npages);
+ if (phb->model == PNV_PHB_MODEL_PHB3 && phb->regs)
+ pnv_pci_phb3_tce_invalidate(pe, rm, shift,
+ index, npages);
+ else if (rm)
+ opal_rm_pci_tce_kill(phb->opal_id,
+OPAL_PCI_TCE_KILL_PAGES,
+pe->pe_number, 1u << shift,
+index << shift, npages);
+ else
+ opal_pci_tce_kill(phb->opal_id,
+ OPAL_PCI_TCE_KILL_PAGES,
+ pe->pe_number, 1u << shift,
+ index << shift, npages);
}
}
--
2.7.4
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[PATCH 10/14] powerpc/powernv/pci: Rework accessing the TCE invalidate register
It's architected, always in a known place, so there is no need
to keep a separate pointer to it, we use the existing "regs",
and we complement it with a real mode variant.
Signed-off-by: Benjamin Herrenschmidt
# Conflicts:
# arch/powerpc/platforms/powernv/pci-ioda.c
# arch/powerpc/platforms/powernv/pci.h
---
arch/powerpc/platforms/powernv/pci-ioda.c | 69 ---
arch/powerpc/platforms/powernv/pci.h | 7 +---
2 files changed, 28 insertions(+), 48 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index dc13c14..ac4a432 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1727,6 +1727,13 @@ static void pnv_ioda_setup_bus_dma(struct pnv_ioda_pe
*pe,
}
}
+static inline __be64 __iomem *pnv_ioda_get_inval_reg(struct pnv_phb *phb,
+bool real_mode)
+{
+ return real_mode ? (__be64 __iomem *)(phb->regs_phys + 0x210) :
+ (phb->regs + 0x210);
+}
+
static void pnv_pci_p7ioc_tce_invalidate(struct iommu_table *tbl,
unsigned long index, unsigned long npages, bool rm)
{
@@ -1735,9 +1742,7 @@ static void pnv_pci_p7ioc_tce_invalidate(struct
iommu_table *tbl,
next);
struct pnv_ioda_pe *pe = container_of(tgl->table_group,
struct pnv_ioda_pe, table_group);
- __be64 __iomem *invalidate = rm ?
- (__be64 __iomem *)pe->phb->ioda.tce_inval_reg_phys :
- pe->phb->ioda.tce_inval_reg;
+ __be64 __iomem *invalidate = pnv_ioda_get_inval_reg(pe->phb, rm);
unsigned long start, end, inc;
start = __pa(((__be64 *)tbl->it_base) + index - tbl->it_offset);
@@ -1815,39 +1820,36 @@ static struct iommu_table_ops pnv_ioda1_iommu_ops = {
void pnv_pci_phb3_tce_invalidate_entire(struct pnv_phb *phb, bool rm)
{
+ __be64 __iomem *invalidate = pnv_ioda_get_inval_reg(phb, rm);
const unsigned long val = PHB3_TCE_KILL_INVAL_ALL;
mb(); /* Ensure previous TCE table stores are visible */
if (rm)
- __raw_rm_writeq(cpu_to_be64(val),
- (__be64 __iomem *)
- phb->ioda.tce_inval_reg_phys);
+ __raw_rm_writeq(cpu_to_be64(val), invalidate);
else
- __raw_writeq(cpu_to_be64(val), phb->ioda.tce_inval_reg);
+ __raw_writeq(cpu_to_be64(val), invalidate);
}
static inline void pnv_pci_phb3_tce_invalidate_pe(struct pnv_ioda_pe *pe)
{
/* 01xb - invalidate TCEs that match the specified PE# */
+ __be64 __iomem *invalidate = pnv_ioda_get_inval_reg(pe->phb, false);
unsigned long val = PHB3_TCE_KILL_INVAL_PE | (pe->pe_number & 0xFF);
- struct pnv_phb *phb = pe->phb;
-
- if (!phb->ioda.tce_inval_reg)
- return;
mb(); /* Ensure above stores are visible */
- __raw_writeq(cpu_to_be64(val), phb->ioda.tce_inval_reg);
+ __raw_writeq(cpu_to_be64(val), invalidate);
}
-static void pnv_pci_phb3_tce_invalidate(unsigned pe_number, bool rm,
- __be64 __iomem *invalidate, unsigned shift,
- unsigned long index, unsigned long npages)
+static void pnv_pci_phb3_tce_invalidate(struct pnv_ioda_pe *pe, bool rm,
+ unsigned shift, unsigned long index,
+ unsigned long npages)
{
+ __be64 __iomem *invalidate = pnv_ioda_get_inval_reg(pe->phb, false);
unsigned long start, end, inc;
/* We'll invalidate DMA address in PE scope */
start = PHB3_TCE_KILL_INVAL_ONE;
- start |= (pe_number & 0xFF);
+ start |= (pe->pe_number & 0xFF);
end = start;
/* Figure out the start, end and step */
@@ -1873,10 +1875,6 @@ static void pnv_pci_ioda2_tce_invalidate(struct
iommu_table *tbl,
list_for_each_entry_rcu(tgl, &tbl->it_group_list, next) {
struct pnv_ioda_pe *pe = container_of(tgl->table_group,
struct pnv_ioda_pe, table_group);
- __be64 __iomem *invalidate = rm ?
- (__be64 __iomem *)pe->phb->ioda.tce_inval_reg_phys :
- pe->phb->ioda.tce_inval_reg;
-
if (pe->phb->type == PNV_PHB_NPU) {
/*
* The NVLink hardware does not support TCE kill
@@ -1886,9 +1884,8 @@ static void pnv_pci_ioda2_tce_invalidate(struct
iommu_table *tbl,
pnv_pci_phb3_tce_invalidate_entire(pe->phb, rm);
continue;
}
- pnv_pci_phb3_tce_invalidate(pe->pe_number, rm,
- invalidate, tbl->
[PATCH 09/14] powerpc/powernv/pci: Remove SWINV constants and obsolete TCE code
We have some obsolete code in pnv_pci_p7ioc_tce_invalidate()
to handle some internal lab tools that have stopped being
useful a long time ago. Remove that along with the definition
and test for the TCE_PCI_SWINV_* flags whose value is basically
always the same.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/include/asm/tce.h| 3 --
arch/powerpc/platforms/powernv/pci-ioda.c | 50 +++
2 files changed, 10 insertions(+), 43 deletions(-)
diff --git a/arch/powerpc/include/asm/tce.h b/arch/powerpc/include/asm/tce.h
index 743f36b..12e3629 100644
--- a/arch/powerpc/include/asm/tce.h
+++ b/arch/powerpc/include/asm/tce.h
@@ -31,9 +31,6 @@
*/
#define TCE_VB 0
#define TCE_PCI1
-#define TCE_PCI_SWINV_CREATE 2
-#define TCE_PCI_SWINV_FREE 4
-#define TCE_PCI_SWINV_PAIR 8
/* TCE page size is 4096 bytes (1 << 12) */
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index afb1c5e..dc13c14 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1739,29 +1739,15 @@ static void pnv_pci_p7ioc_tce_invalidate(struct
iommu_table *tbl,
(__be64 __iomem *)pe->phb->ioda.tce_inval_reg_phys :
pe->phb->ioda.tce_inval_reg;
unsigned long start, end, inc;
- const unsigned shift = tbl->it_page_shift;
start = __pa(((__be64 *)tbl->it_base) + index - tbl->it_offset);
end = __pa(((__be64 *)tbl->it_base) + index - tbl->it_offset +
npages - 1);
- /* BML uses this case for p6/p7/galaxy2: Shift addr and put in node */
- if (tbl->it_busno) {
- start <<= shift;
- end <<= shift;
- inc = 128ull << shift;
- start |= tbl->it_busno;
- end |= tbl->it_busno;
- } else if (tbl->it_type & TCE_PCI_SWINV_PAIR) {
- /* p7ioc-style invalidation, 2 TCEs per write */
- start |= (1ull << 63);
- end |= (1ull << 63);
- inc = 16;
-} else {
- /* Default (older HW) */
-inc = 128;
- }
-
+ /* p7ioc-style invalidation, 2 TCEs per write */
+ start |= (1ull << 63);
+ end |= (1ull << 63);
+ inc = 16;
end |= inc - 1;/* round up end to be different than start */
mb(); /* Ensure above stores are visible */
@@ -1787,7 +1773,7 @@ static int pnv_ioda1_tce_build(struct iommu_table *tbl,
long index,
int ret = pnv_tce_build(tbl, index, npages, uaddr, direction,
attrs);
- if (!ret && (tbl->it_type & TCE_PCI_SWINV_CREATE))
+ if (!ret)
pnv_pci_p7ioc_tce_invalidate(tbl, index, npages, false);
return ret;
@@ -1799,8 +1785,7 @@ static int pnv_ioda1_tce_xchg(struct iommu_table *tbl,
long index,
{
long ret = pnv_tce_xchg(tbl, index, hpa, direction);
- if (!ret && (tbl->it_type &
- (TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE)))
+ if (!ret)
pnv_pci_p7ioc_tce_invalidate(tbl, index, 1, false);
return ret;
@@ -1812,8 +1797,7 @@ static void pnv_ioda1_tce_free(struct iommu_table *tbl,
long index,
{
pnv_tce_free(tbl, index, npages);
- if (tbl->it_type & TCE_PCI_SWINV_FREE)
- pnv_pci_p7ioc_tce_invalidate(tbl, index, npages, false);
+ pnv_pci_p7ioc_tce_invalidate(tbl, index, npages, false);
}
static struct iommu_table_ops pnv_ioda1_iommu_ops = {
@@ -1916,7 +1900,7 @@ static int pnv_ioda2_tce_build(struct iommu_table *tbl,
long index,
int ret = pnv_tce_build(tbl, index, npages, uaddr, direction,
attrs);
- if (!ret && (tbl->it_type & TCE_PCI_SWINV_CREATE))
+ if (!ret)
pnv_pci_ioda2_tce_invalidate(tbl, index, npages, false);
return ret;
@@ -1928,8 +1912,7 @@ static int pnv_ioda2_tce_xchg(struct iommu_table *tbl,
long index,
{
long ret = pnv_tce_xchg(tbl, index, hpa, direction);
- if (!ret && (tbl->it_type &
- (TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE)))
+ if (!ret)
pnv_pci_ioda2_tce_invalidate(tbl, index, 1, false);
return ret;
@@ -1941,8 +1924,7 @@ static void pnv_ioda2_tce_free(struct iommu_table *tbl,
long index,
{
pnv_tce_free(tbl, index, npages);
- if (tbl->it_type & TCE_PCI_SWINV_FREE)
- pnv_pci_ioda2_tce_invalidate(tbl, index, npages, false);
+ pnv_pci_ioda2_tce_invalidate(tbl, index, npages, false);
}
static void pnv_ioda2_table_free(struct iommu_table *tbl)
@@ -2111,12 +2093,6 @@ found:
base * PNV_IODA1
[PATCH 08/14] powerpc/powernv/pci: Rename TCE invalidation calls
The TCE invalidation functions are fairly implementation specific,
and while the IODA specs more/less describe the register, in practice
various implementation workarounds may be required. So name the
functions after the target PHB.
Note today and for the foreseeable future, there's a 1:1 relationship
between an IODA version and a PHB implementation. There exist another
variant of IODA1 (Torrent) but we never supported in with OPAL and
never will.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/platforms/powernv/npu-dma.c | 8 +++
arch/powerpc/platforms/powernv/pci-ioda.c | 36 +++
arch/powerpc/platforms/powernv/pci.h | 4 +---
3 files changed, 23 insertions(+), 25 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/npu-dma.c
b/arch/powerpc/platforms/powernv/npu-dma.c
index 0459e10..4383a5f 100644
--- a/arch/powerpc/platforms/powernv/npu-dma.c
+++ b/arch/powerpc/platforms/powernv/npu-dma.c
@@ -180,7 +180,7 @@ long pnv_npu_set_window(struct pnv_ioda_pe *npe, int num,
pe_err(npe, "Failed to configure TCE table, err %lld\n", rc);
return rc;
}
- pnv_pci_ioda2_tce_invalidate_entire(phb, false);
+ pnv_pci_phb3_tce_invalidate_entire(phb, false);
/* Add the table to the list so its TCE cache will get invalidated */
pnv_pci_link_table_and_group(phb->hose->node, num,
@@ -204,7 +204,7 @@ long pnv_npu_unset_window(struct pnv_ioda_pe *npe, int num)
pe_err(npe, "Unmapping failed, ret = %lld\n", rc);
return rc;
}
- pnv_pci_ioda2_tce_invalidate_entire(phb, false);
+ pnv_pci_phb3_tce_invalidate_entire(phb, false);
pnv_pci_unlink_table_and_group(npe->table_group.tables[num],
&npe->table_group);
@@ -270,7 +270,7 @@ static int pnv_npu_dma_set_bypass(struct pnv_ioda_pe *npe)
0 /* bypass base */, top);
if (rc == OPAL_SUCCESS)
- pnv_pci_ioda2_tce_invalidate_entire(phb, false);
+ pnv_pci_phb3_tce_invalidate_entire(phb, false);
return rc;
}
@@ -334,7 +334,7 @@ void pnv_npu_take_ownership(struct pnv_ioda_pe *npe)
pe_err(npe, "Failed to disable bypass, err %lld\n", rc);
return;
}
- pnv_pci_ioda2_tce_invalidate_entire(npe->phb, false);
+ pnv_pci_phb3_tce_invalidate_entire(npe->phb, false);
}
struct pnv_ioda_pe *pnv_pci_npu_setup_iommu(struct pnv_ioda_pe *npe)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index 092b2e6..afb1c5e 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1727,7 +1727,7 @@ static void pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe,
}
}
-static void pnv_pci_ioda1_tce_invalidate(struct iommu_table *tbl,
+static void pnv_pci_p7ioc_tce_invalidate(struct iommu_table *tbl,
unsigned long index, unsigned long npages, bool rm)
{
struct iommu_table_group_link *tgl = list_first_entry_or_null(
@@ -1788,7 +1788,7 @@ static int pnv_ioda1_tce_build(struct iommu_table *tbl,
long index,
attrs);
if (!ret && (tbl->it_type & TCE_PCI_SWINV_CREATE))
- pnv_pci_ioda1_tce_invalidate(tbl, index, npages, false);
+ pnv_pci_p7ioc_tce_invalidate(tbl, index, npages, false);
return ret;
}
@@ -1801,7 +1801,7 @@ static int pnv_ioda1_tce_xchg(struct iommu_table *tbl,
long index,
if (!ret && (tbl->it_type &
(TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE)))
- pnv_pci_ioda1_tce_invalidate(tbl, index, 1, false);
+ pnv_pci_p7ioc_tce_invalidate(tbl, index, 1, false);
return ret;
}
@@ -1813,7 +1813,7 @@ static void pnv_ioda1_tce_free(struct iommu_table *tbl,
long index,
pnv_tce_free(tbl, index, npages);
if (tbl->it_type & TCE_PCI_SWINV_FREE)
- pnv_pci_ioda1_tce_invalidate(tbl, index, npages, false);
+ pnv_pci_p7ioc_tce_invalidate(tbl, index, npages, false);
}
static struct iommu_table_ops pnv_ioda1_iommu_ops = {
@@ -1825,13 +1825,13 @@ static struct iommu_table_ops pnv_ioda1_iommu_ops = {
.get = pnv_tce_get,
};
-#define TCE_KILL_INVAL_ALL PPC_BIT(0)
-#define TCE_KILL_INVAL_PE PPC_BIT(1)
-#define TCE_KILL_INVAL_TCE PPC_BIT(2)
+#define PHB3_TCE_KILL_INVAL_ALLPPC_BIT(0)
+#define PHB3_TCE_KILL_INVAL_PE PPC_BIT(1)
+#define PHB3_TCE_KILL_INVAL_ONEPPC_BIT(2)
-void pnv_pci_ioda2_tce_invalidate_entire(struct pnv_phb *phb, bool rm)
+void pnv_pci_phb3_tce_invalidate_entire(struct pnv_phb *phb, bool rm)
{
- const unsigned long val = TCE_KILL_INVAL_ALL;
+ const unsigned long val = PHB3_TCE_KILL_INVAL_ALL;
mb(); /
[PATCH 07/14] powerpc/opal: Add real mode call wrappers
Replace the old generic opal_call_realmode() with proper per-call
wrappers similar to the normal ones and convert callers.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/include/asm/opal-api.h| 10 +++-
arch/powerpc/include/asm/opal.h| 6 +++
arch/powerpc/kernel/idle_power7.S | 16 ++-
arch/powerpc/platforms/powernv/opal-wrappers.S | 63 +-
4 files changed, 51 insertions(+), 44 deletions(-)
diff --git a/arch/powerpc/include/asm/opal-api.h
b/arch/powerpc/include/asm/opal-api.h
index 170ba0c..273f7b3 100644
--- a/arch/powerpc/include/asm/opal-api.h
+++ b/arch/powerpc/include/asm/opal-api.h
@@ -166,7 +166,8 @@
#defineOPAL_INT_SET_CPPR 123
#define OPAL_INT_EOI 124
#define OPAL_INT_SET_MFRR 125
-#define OPAL_LAST 125
+#define OPAL_PCI_TCE_KILL 126
+#define OPAL_LAST 126
/* Device tree flags */
@@ -912,6 +913,13 @@ enum {
OPAL_REBOOT_PLATFORM_ERROR = 1,
};
+/* Argument to OPAL_PCI_TCE_KILL */
+enum {
+ OPAL_PCI_TCE_KILL_PAGES,
+ OPAL_PCI_TCE_KILL_PE,
+ OPAL_PCI_TCE_KILL_ALL,
+};
+
#endif /* __ASSEMBLY__ */
#endif /* __OPAL_API_H */
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 42f0c95..8edf8d4 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -222,6 +222,12 @@ int64_t opal_int_get_xirr(uint32_t *out_xirr, bool
just_poll);
int64_t opal_int_set_cppr(uint8_t cppr);
int64_t opal_int_eoi(uint32_t xirr);
int64_t opal_int_set_mfrr(uint32_t cpu, uint8_t mfrr);
+int64_t opal_pci_tce_kill(uint64_t phb_id, uint32_t kill_type,
+ uint32_t pe_num, uint32_t tce_size,
+ uint64_t dma_addr, uint32_t npages);
+int64_t opal_rm_pci_tce_kill(uint64_t phb_id, uint32_t kill_type,
+uint32_t pe_num, uint32_t tce_size,
+uint64_t dma_addr, uint32_t npages);
/* Internal functions */
extern int early_init_dt_scan_opal(unsigned long node, const char *uname,
diff --git a/arch/powerpc/kernel/idle_power7.S
b/arch/powerpc/kernel/idle_power7.S
index 470ceeb..c93f825 100644
--- a/arch/powerpc/kernel/idle_power7.S
+++ b/arch/powerpc/kernel/idle_power7.S
@@ -196,8 +196,7 @@ fastsleep_workaround_at_entry:
/* Fast sleep workaround */
li r3,1
li r4,1
- li r0,OPAL_CONFIG_CPU_IDLE_STATE
- bl opal_call_realmode
+ bl opal_rm_config_cpu_idle_state
/* Clear Lock bit */
li r0,0
@@ -270,8 +269,7 @@ ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_ARCH_207S, 66);
\
ld r2,PACATOC(r13);\
ld r1,PACAR1(r13); \
std r3,ORIG_GPR3(r1); /* Save original r3 */ \
- li r0,OPAL_HANDLE_HMI; /* Pass opal token argument*/ \
- bl opal_call_realmode; \
+ bl opal_rm_handle_hmi; \
ld r3,ORIG_GPR3(r1); /* Restore original r3 */ \
20:nop;
@@ -284,7 +282,7 @@ _GLOBAL(power7_wakeup_tb_loss)
* and they are restored before switching to the process context. Hence
* until they are restored, they are free to be used.
*
-* Save SRR1 in a NVGPR as it might be clobbered in opal_call_realmode
+* Save SRR1 in a NVGPR as it might be clobbered in opal call
* (called in CHECK_HMI_INTERRUPT). SRR1 is required to determine the
* wakeup reason if we branch to kvm_start_guest.
*/
@@ -378,10 +376,7 @@ timebase_resync:
* set in exceptions-64s.S */
ble cr3,clear_lock
/* Time base re-sync */
- li r0,OPAL_RESYNC_TIMEBASE
- bl opal_call_realmode;
- /* TODO: Check r3 for failure */
-
+ bl opal_rm_resync_timebase;
/*
* If waking up from sleep, per core state is not lost, skip to
* clear_lock.
@@ -469,8 +464,7 @@ hypervisor_state_restored:
fastsleep_workaround_at_exit:
li r3,1
li r4,0
- li r0,OPAL_CONFIG_CPU_IDLE_STATE
- bl opal_call_realmode
+ bl opal_rm_config_cpu_idle_state
b timebase_resync
/*
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S
b/arch/powerpc/platforms/powernv/opal-wrappers.S
index c7764f9..cf928bb 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -59,7 +59,7 @@ END_FTR_SECTION(0, 1);
\
#define OPAL_CALL(name, token) \
_GLOBAL_TOC(name);\
mflrr0
[PATCH 06/14] powerpc/pseries/pci: Remove obsolete SW invalidate
That was used by some old IBM internal bringup tools and is
no longer relevant.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/platforms/pseries/iommu.c | 53 +-
1 file changed, 1 insertion(+), 52 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/iommu.c
b/arch/powerpc/platforms/pseries/iommu.c
index 3e8865b..770a753 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -120,35 +120,6 @@ static void iommu_pseries_free_group(struct
iommu_table_group *table_group,
kfree(table_group);
}
-static void tce_invalidate_pSeries_sw(struct iommu_table *tbl,
- __be64 *startp, __be64 *endp)
-{
- u64 __iomem *invalidate = (u64 __iomem *)tbl->it_index;
- unsigned long start, end, inc;
-
- start = __pa(startp);
- end = __pa(endp);
- inc = L1_CACHE_BYTES; /* invalidate a cacheline of TCEs at a time */
-
- /* If this is non-zero, change the format. We shift the
-* address and or in the magic from the device tree. */
- if (tbl->it_busno) {
- start <<= 12;
- end <<= 12;
- inc <<= 12;
- start |= tbl->it_busno;
- end |= tbl->it_busno;
- }
-
- end |= inc - 1; /* round up end to be different than start */
-
- mb(); /* Make sure TCEs in memory are written */
- while (start <= end) {
- out_be64(invalidate, start);
- start += inc;
- }
-}
-
static int tce_build_pSeries(struct iommu_table *tbl, long index,
long npages, unsigned long uaddr,
enum dma_data_direction direction,
@@ -173,9 +144,6 @@ static int tce_build_pSeries(struct iommu_table *tbl, long
index,
uaddr += TCE_PAGE_SIZE;
tcep++;
}
-
- if (tbl->it_type & TCE_PCI_SWINV_CREATE)
- tce_invalidate_pSeries_sw(tbl, tces, tcep - 1);
return 0;
}
@@ -188,9 +156,6 @@ static void tce_free_pSeries(struct iommu_table *tbl, long
index, long npages)
while (npages--)
*(tcep++) = 0;
-
- if (tbl->it_type & TCE_PCI_SWINV_FREE)
- tce_invalidate_pSeries_sw(tbl, tces, tcep - 1);
}
static unsigned long tce_get_pseries(struct iommu_table *tbl, long index)
@@ -537,7 +502,7 @@ static void iommu_table_setparms(struct pci_controller *phb,
struct iommu_table *tbl)
{
struct device_node *node;
- const unsigned long *basep, *sw_inval;
+ const unsigned long *basep;
const u32 *sizep;
node = phb->dn;
@@ -575,22 +540,6 @@ static void iommu_table_setparms(struct pci_controller
*phb,
tbl->it_index = 0;
tbl->it_blocksize = 16;
tbl->it_type = TCE_PCI;
-
- sw_inval = of_get_property(node, "linux,tce-sw-invalidate-info", NULL);
- if (sw_inval) {
- /*
-* This property contains information on how to
-* invalidate the TCE entry. The first property is
-* the base MMIO address used to invalidate entries.
-* The second property tells us the format of the TCE
-* invalidate (whether it needs to be shifted) and
-* some magic routing info to add to our invalidate
-* command.
-*/
- tbl->it_index = (unsigned long) ioremap(sw_inval[0], 8);
- tbl->it_busno = sw_inval[1]; /* overload this with magic */
- tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE;
- }
}
/*
--
2.7.4
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[PATCH 05/14] powerpc/powernv: Discover IODA3 PHBs
We instanciate them as IODA2. We also change the MSI EOI hack
to only kick on PHB3 since it will not be needed on any new
implementation.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/platforms/powernv/pci-ioda.c | 3 ++-
arch/powerpc/platforms/powernv/pci.c | 4
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index 0be6f2b..092b2e6 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -2711,7 +2711,8 @@ static void set_msi_irq_chip(struct pnv_phb *phb,
unsigned int virq)
struct irq_data *idata;
struct irq_chip *ichip;
- if (phb->type != PNV_PHB_IODA2)
+ /* The MSI EOI OPAL call is only needed on PHB3 */
+ if (phb->model != PNV_PHB_MODEL_PHB3)
return;
if (!phb->ioda.irq_chip_init) {
diff --git a/arch/powerpc/platforms/powernv/pci.c
b/arch/powerpc/platforms/powernv/pci.c
index 62c7637..4617ea2 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -932,6 +932,10 @@ void __init pnv_pci_init(void)
for_each_compatible_node(np, NULL, "ibm,ioda2-phb")
pnv_pci_init_ioda2_phb(np);
+ /* Look for ioda3 built-in PHB4's, we treat them as IODA2 */
+ for_each_compatible_node(np, NULL, "ibm,ioda3-phb")
+ pnv_pci_init_ioda2_phb(np);
+
/* Look for NPU PHBs */
for_each_compatible_node(np, NULL, "ibm,ioda2-npu-phb")
pnv_pci_init_npu_phb(np);
--
2.7.4
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[PATCH 04/14] powerpc/xics: Add ICP OPAL backend
This adds a new XICS backend that uses OPAL calls, which can be
used when we don't have native support for the platform interrupt
controller.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/include/asm/xics.h| 8 +-
arch/powerpc/sysdev/xics/Makefile | 2 +-
arch/powerpc/sysdev/xics/icp-opal.c| 144 +
arch/powerpc/sysdev/xics/xics-common.c | 5 +-
4 files changed, 156 insertions(+), 3 deletions(-)
create mode 100644 arch/powerpc/sysdev/xics/icp-opal.c
diff --git a/arch/powerpc/include/asm/xics.h b/arch/powerpc/include/asm/xics.h
index 04ef3ae..a30d845 100644
--- a/arch/powerpc/include/asm/xics.h
+++ b/arch/powerpc/include/asm/xics.h
@@ -42,6 +42,12 @@ extern int icp_hv_init(void);
static inline int icp_hv_init(void) { return -ENODEV; }
#endif
+#ifdef CONFIG_PPC_POWERNV
+extern int icp_opal_init(void);
+#else
+static inline int icp_opal_init(void) { return -ENODEV; }
+#endif
+
/* ICP ops */
struct icp_ops {
unsigned int (*get_irq)(void);
@@ -135,7 +141,7 @@ static inline void xics_set_base_cppr(unsigned char cppr)
static inline unsigned char xics_cppr_top(void)
{
struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
-
+
return os_cppr->stack[os_cppr->index];
}
diff --git a/arch/powerpc/sysdev/xics/Makefile
b/arch/powerpc/sysdev/xics/Makefile
index c606aa8..5d7f5a6 100644
--- a/arch/powerpc/sysdev/xics/Makefile
+++ b/arch/powerpc/sysdev/xics/Makefile
@@ -4,4 +4,4 @@ obj-y += xics-common.o
obj-$(CONFIG_PPC_ICP_NATIVE) += icp-native.o
obj-$(CONFIG_PPC_ICP_HV) += icp-hv.o
obj-$(CONFIG_PPC_ICS_RTAS) += ics-rtas.o
-obj-$(CONFIG_PPC_POWERNV) += ics-opal.o
+obj-$(CONFIG_PPC_POWERNV) += ics-opal.o icp-opal.o
diff --git a/arch/powerpc/sysdev/xics/icp-opal.c
b/arch/powerpc/sysdev/xics/icp-opal.c
new file mode 100644
index 000..eb484e9
--- /dev/null
+++ b/arch/powerpc/sysdev/xics/icp-opal.c
@@ -0,0 +1,144 @@
+/*
+ * Copyright 2011 IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+static void icp_opal_teardown_cpu(void)
+{
+ int cpu = smp_processor_id();
+
+ /* Clear any pending IPI */
+ opal_int_set_mfrr(cpu, 0xff);
+}
+
+static void icp_opal_flush_ipi(void)
+{
+ /* We take the ipi irq but and never return so we
+* need to EOI the IPI, but want to leave our priority 0
+*
+* should we check all the other interrupts too?
+* should we be flagging idle loop instead?
+* or creating some task to be scheduled?
+*/
+
+ opal_int_eoi((0x00 << 24) | XICS_IPI);
+}
+
+static unsigned int icp_opal_get_irq(void)
+{
+ unsigned int xirr;
+ unsigned int vec;
+ unsigned int irq;
+ int64_t rc;
+
+ rc = opal_int_get_xirr(&xirr, false);
+ if (rc < 0)
+ return NO_IRQ;
+ xirr = be32_to_cpu(xirr);
+ vec = xirr & 0x00ff;
+ if (vec == XICS_IRQ_SPURIOUS)
+ return NO_IRQ;
+
+ irq = irq_find_mapping(xics_host, vec);
+ if (likely(irq != NO_IRQ)) {
+ xics_push_cppr(vec);
+ return irq;
+ }
+
+ /* We don't have a linux mapping, so have rtas mask it. */
+ xics_mask_unknown_vec(vec);
+
+ /* We might learn about it later, so EOI it */
+ opal_int_eoi(xirr);
+
+ return NO_IRQ;
+}
+
+static void icp_opal_set_cpu_priority(unsigned char cppr)
+{
+ xics_set_base_cppr(cppr);
+ opal_int_set_cppr(cppr);
+ iosync();
+}
+
+static void icp_opal_eoi(struct irq_data *d)
+{
+ unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
+ int64_t rc;
+
+ iosync();
+ rc = opal_int_eoi((xics_pop_cppr() << 24) | hw_irq);
+
+ /* EOI tells us whether there are more interrupts to fetch.
+*
+* Some HW implementations might not be able to send us another
+* external interrupt in that case, so we force a replay.
+*/
+ if (rc > 0)
+ force_external_irq_replay();
+}
+
+#ifdef CONFIG_SMP
+
+static void icp_opal_cause_ipi(int cpu, unsigned long data)
+{
+ opal_int_set_mfrr(cpu, IPI_PRIORITY);
+}
+
+static irqreturn_t icp_opal_ipi_action(int irq, void *dev_id)
+{
+ int cpu = smp_processor_id();
+
+ opal_int_set_mfrr(cpu, 0xff);
+
+ return smp_ipi_demux();
+}
+
+#endif /* CONFIG_SMP */
+
+static const struct icp_ops icp_opal_ops = {
+ .get_irq= icp_opal_get_irq,
+ .eoi= icp_opal_eoi,
+ .set_priority = ic
[PATCH 03/14] powerpc/irq: Add mechanism to force a replay of interrupts
Calling this function with interrupts soft-disabled will cause
a replay of the external interrupt vector when they are re-enabled.
This will be used by the OPAL XICS backend (and latter by the native
XIVE code) to handle EOI signaling that there are more interrupts to
fetch from the hardware since the hardware won't issue another HW
interrupt in that case.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/include/asm/hw_irq.h | 2 ++
arch/powerpc/kernel/irq.c | 14 ++
2 files changed, 16 insertions(+)
diff --git a/arch/powerpc/include/asm/hw_irq.h
b/arch/powerpc/include/asm/hw_irq.h
index b59ac27..c7d82ff 100644
--- a/arch/powerpc/include/asm/hw_irq.h
+++ b/arch/powerpc/include/asm/hw_irq.h
@@ -130,6 +130,8 @@ static inline bool arch_irq_disabled_regs(struct pt_regs
*regs)
extern bool prep_irq_for_idle(void);
+extern void force_external_irq_replay(void);
+
#else /* CONFIG_PPC64 */
#define SET_MSR_EE(x) mtmsr(x)
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 3cb46a3..604e3dd 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -342,6 +342,20 @@ bool prep_irq_for_idle(void)
return true;
}
+/* Force a replay of the external interrupt handler on this
+ * CPU.
+ */
+void force_external_irq_replay(void)
+{
+ /* This must only be called with interrupts soft-disabled,
+* the replay will happen when re-enabling
+*/
+ WARN_ON(!arch_irqs_disabled());
+
+ /* Indicate in the PACA that we have an interrupt to replay */
+ local_paca->irq_happened |= PACA_IRQ_EE;
+}
+
#endif /* CONFIG_PPC64 */
int arch_show_interrupts(struct seq_file *p, int prec)
--
2.7.4
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[PATCH 02/14] powerpc/irq: Add support for HV virtualization interrupts
This will be delivering external interrupts from the XIVE to the Hypervisor. We treat it as a normal external interrupt for the lazy irq disable code (so it will be replayed as a 0x500) and route it to do_IRQ. Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/include/asm/exception-64s.h | 2 ++ arch/powerpc/include/asm/reg.h | 1 + arch/powerpc/kernel/cpu_setup_power.S| 2 ++ arch/powerpc/kernel/exceptions-64s.S | 19 +++ 4 files changed, 24 insertions(+) diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h index 93ae809..c7d2773 100644 --- a/arch/powerpc/include/asm/exception-64s.h +++ b/arch/powerpc/include/asm/exception-64s.h @@ -403,6 +403,8 @@ label##_relon_hv: \ #define SOFTEN_VALUE_0xe82 PACA_IRQ_DBELL #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI #define SOFTEN_VALUE_0xe62 PACA_IRQ_HMI +#define SOFTEN_VALUE_0xea0 PACA_IRQ_EE +#define SOFTEN_VALUE_0xea2 PACA_IRQ_EE #define __SOFTEN_TEST(h, vec) \ lbz r10,PACASOFTIRQEN(r13); \ diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index 320136f..3c60a40 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -352,6 +352,7 @@ #define LPCR_LPES1 0x0004 /* LPAR Env selector 1 */ #define LPCR_LPES_SH 2 #define LPCR_RMI 0x0002 /* real mode is cache inhibit */ +#define LPCR_HVICE 0x0002 /* P9: HV interrupt enable */ #define LPCR_HDICE 0x0001 /* Hyp Decr enable (HV,PR,EE) */ #define LPCR_UPRT0x0040 /* Use Process Table (ISA 3) */ #ifndef SPRN_LPID diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S index ec8a228..52ff3f0 100644 --- a/arch/powerpc/kernel/cpu_setup_power.S +++ b/arch/powerpc/kernel/cpu_setup_power.S @@ -99,6 +99,7 @@ _GLOBAL(__setup_cpu_power9) mtspr SPRN_LPID,r0 mfspr r3,SPRN_LPCR ori r3, r3, LPCR_PECEDH + ori r3, r3, LPCR_HVICE bl __init_LPCR bl __init_HFSCR bl __init_tlb_power9 @@ -118,6 +119,7 @@ _GLOBAL(__restore_cpu_power9) mtspr SPRN_LPID,r0 mfspr r3,SPRN_LPCR ori r3, r3, LPCR_PECEDH + ori r3, r3, LPCR_HVICE bl __init_LPCR bl __init_HFSCR bl __init_tlb_power9 diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 4c94406..5726d84 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -351,6 +351,12 @@ hv_doorbell_trampoline: EXCEPTION_PROLOG_0(PACA_EXGEN) b h_doorbell_hv + . = 0xea0 +hv_virt_irq_trampoline: + SET_SCRATCH0(r13) + EXCEPTION_PROLOG_0(PACA_EXGEN) + b h_virt_irq_hv + /* We need to deal with the Altivec unavailable exception * here which is at 0xf20, thus in the middle of the * prolog code of the PerformanceMonitor one. A little @@ -601,6 +607,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_CFAR) MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell) KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82) + MASKABLE_EXCEPTION_HV_OOL(0xea2, h_virt_irq) + KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xea2) + /* moved from 0xf00 */ STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf00) @@ -680,6 +689,8 @@ _GLOBAL(__replay_interrupt) BEGIN_FTR_SECTION cmpwi r3,0xe80 beq h_doorbell_common + cmpwi r3,0xea0 + beq h_virt_irq_common FTR_SECTION_ELSE cmpwi r3,0xa00 beq doorbell_super_common @@ -754,6 +765,7 @@ kvmppc_skip_Hinterrupt: #else STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, unknown_exception) #endif + STD_EXCEPTION_COMMON_ASYNC(0xea0, h_virt_irq, do_IRQ) STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, performance_monitor_exception) STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, instruction_breakpoint_exception) STD_EXCEPTION_COMMON(0x1502, denorm, unknown_exception) @@ -877,6 +889,12 @@ h_doorbell_relon_trampoline: EXCEPTION_PROLOG_0(PACA_EXGEN) b h_doorbell_relon_hv + . = 0x4ea0 +h_virt_irq_relon_trampoline: + SET_SCRATCH0(r13) + EXCEPTION_PROLOG_0(PACA_EXGEN) + b h_virt_irq_relon_hv + . = 0x4f00 performance_monitor_relon_pseries_trampoline: SET_SCRATCH0(r13) @@ -1137,6 +1155,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX) /* Equivalents to the above handlers for relocation-on interrupt vectors */ STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist) MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell) + MASKABLE_RELON_EXCEPTION_HV_OOL(0xea0, h_virt_irq
[PATCH 01/14] powerpc/powernv: Add XICS emulation APIs
OPAL provides an emulated XICS interrupt controller to use as a fallback on newer processors that don't have a XICS. It's meant as a way to provide backward compatibility with future processors. Add the corresponding interfaces. Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/include/asm/opal-api.h| 6 +- arch/powerpc/include/asm/opal.h| 5 + arch/powerpc/platforms/powernv/opal-wrappers.S | 4 3 files changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/opal-api.h b/arch/powerpc/include/asm/opal-api.h index 72b5f27..170ba0c 100644 --- a/arch/powerpc/include/asm/opal-api.h +++ b/arch/powerpc/include/asm/opal-api.h @@ -162,7 +162,11 @@ #define OPAL_PCI_GET_PRESENCE_STATE119 #define OPAL_PCI_GET_POWER_STATE 120 #define OPAL_PCI_SET_POWER_STATE 121 -#define OPAL_LAST 121 +#define OPAL_INT_GET_XIRR 122 +#defineOPAL_INT_SET_CPPR 123 +#define OPAL_INT_EOI 124 +#define OPAL_INT_SET_MFRR 125 +#define OPAL_LAST 125 /* Device tree flags */ diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h index 3b369e9..42f0c95 100644 --- a/arch/powerpc/include/asm/opal.h +++ b/arch/powerpc/include/asm/opal.h @@ -218,6 +218,11 @@ int64_t opal_pci_set_power_state(uint64_t async_token, uint64_t id, uint64_t data); int64_t opal_pci_poll2(uint64_t id, uint64_t data); +int64_t opal_int_get_xirr(uint32_t *out_xirr, bool just_poll); +int64_t opal_int_set_cppr(uint8_t cppr); +int64_t opal_int_eoi(uint32_t xirr); +int64_t opal_int_set_mfrr(uint32_t cpu, uint8_t mfrr); + /* Internal functions */ extern int early_init_dt_scan_opal(unsigned long node, const char *uname, int depth, void *data); diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S index 7979d6d..c7764f9 100644 --- a/arch/powerpc/platforms/powernv/opal-wrappers.S +++ b/arch/powerpc/platforms/powernv/opal-wrappers.S @@ -307,3 +307,7 @@ OPAL_CALL(opal_get_device_tree, OPAL_GET_DEVICE_TREE); OPAL_CALL(opal_pci_get_presence_state, OPAL_PCI_GET_PRESENCE_STATE); OPAL_CALL(opal_pci_get_power_state,OPAL_PCI_GET_POWER_STATE); OPAL_CALL(opal_pci_set_power_state,OPAL_PCI_SET_POWER_STATE); +OPAL_CALL(opal_int_get_xirr, OPAL_INT_GET_XIRR); +OPAL_CALL(opal_int_set_cppr, OPAL_INT_SET_CPPR); +OPAL_CALL(opal_int_eoi,OPAL_INT_EOI); +OPAL_CALL(opal_int_set_mfrr, OPAL_INT_SET_MFRR); -- 2.7.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2] powerpc/pnv/pci: Fix incorrect PE reservation attempt on some 64-bit BARs
The generic allocation code may sometimes decide to assign a prefetchable
64-bit BAR to the M32 window. In fact it may also decide to allocate
a 64-bit non-prefetchable BAR to the M64 one ! So using the resource
flags as a test to decide which window was used for PE allocation is
just wrong and leads to insane PE numbers.
Instead, compare the addresses to figure it out.
Signed-off-by: Benjamin Herrenschmidt
CC: sta...@vger.kernel.org
---
v2. Rebased to powerpc/next
arch/powerpc/platforms/powernv/pci-ioda.c | 28 ++--
1 file changed, 18 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index d7477b9..f975d19 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -111,10 +111,16 @@ static int __init iommu_setup(char *str)
}
early_param("iommu", iommu_setup);
-static inline bool pnv_pci_is_mem_pref_64(unsigned long flags)
+static inline bool pnv_pci_is_mem_pref_64(struct pnv_phb *phb, struct resource
*r)
{
- return ((flags & (IORESOURCE_MEM_64 | IORESOURCE_PREFETCH)) ==
- (IORESOURCE_MEM_64 | IORESOURCE_PREFETCH));
+ /* WARNING: We cannot rely on the resource flags. The Linux PCI
+* allocation code sometimes decides to put a 64-bit prefetchable
+* BAR in the 32-bit window, so we have to compare the addresses.
+*
+* For simplicity we only test resource start.
+*/
+ return (r->start >= phb->ioda.m64_base &&
+ r->start < (phb->ioda.m64_base + phb->ioda.m64_size));
}
static struct pnv_ioda_pe *pnv_ioda_init_pe(struct pnv_phb *phb, int pe_no)
@@ -229,7 +235,7 @@ static void pnv_ioda_reserve_dev_m64_pe(struct pci_dev
*pdev,
sgsz = phb->ioda.m64_segsize;
for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
r = &pdev->resource[i];
- if (!r->parent || !pnv_pci_is_mem_pref_64(r->flags))
+ if (!r->parent || !pnv_pci_is_mem_pref_64(phb, r))
continue;
start = _ALIGN_DOWN(r->start - base, sgsz);
@@ -3014,7 +3020,7 @@ static void pnv_pci_ioda_fixup_iov_resources(struct
pci_dev *pdev)
res = &pdev->resource[i + PCI_IOV_RESOURCES];
if (!res->flags || res->parent)
continue;
- if (!pnv_pci_is_mem_pref_64(res->flags)) {
+ if (!pnv_pci_is_mem_pref_64(phb, res)) {
dev_warn(&pdev->dev, "Don't support SR-IOV with"
" non M64 VF BAR%d: %pR. \n",
i, res);
@@ -3109,7 +3115,7 @@ static void pnv_ioda_setup_pe_res(struct pnv_ioda_pe *pe,
index++;
}
} else if ((res->flags & IORESOURCE_MEM) &&
- !pnv_pci_is_mem_pref_64(res->flags)) {
+ !pnv_pci_is_mem_pref_64(phb, res)) {
region.start = res->start -
phb->hose->mem_offset[0] -
phb->ioda.m32_pci_base;
@@ -3234,9 +3240,11 @@ static resource_size_t pnv_pci_window_alignment(struct
pci_bus *bus,
bridge = bridge->bus->self;
}
- /* We fail back to M32 if M64 isn't supported */
- if (phb->ioda.m64_segsize &&
- pnv_pci_is_mem_pref_64(type))
+ /* We fail back to M32 if M64 isn't supported. We enforce the M64
+* alignment for any 64-bit resource, PCIe doesn't care and
+* bridges only do 64-bit prefetchable anyway
+*/
+ if (phb->ioda.m64_segsize && (type & IORESOURCE_MEM_64))
return phb->ioda.m64_segsize;
if (type & IORESOURCE_MEM)
return phb->ioda.m32_segsize;
@@ -3276,7 +3284,7 @@ static void pnv_pci_fixup_bridge_resources(struct pci_bus
*bus,
w = NULL;
if (r->flags & type & IORESOURCE_IO)
w = &hose->io_resource;
- else if (pnv_pci_is_mem_pref_64(r->flags) &&
+ else if (pnv_pci_is_mem_pref_64(phb, r) &&
(type & IORESOURCE_PREFETCH) &&
phb->ioda.m64_segsize)
w = &hose->mem_resources[1];
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Re: [RFC/PATCH 2/4] powerpc/64/kexec: Fix MMU cleanup on radix
On Fri, 2016-07-08 at 12:55 +1000, Balbir Singh wrote:
> +
> > +/* For use by kexec */
> > +void mmu_cleanup_all(void)
> > +{
> > + if (radix_enabled())
> > + radix__mmu_cleanup_all();
>
>
> Should this be more than just radix -- cpu_has_feature(CPU_FTR_ARCH_300)?
I don't understand... We need to cleanup the radix if we use a radix, otherwise
we cleanup the hash ...
Basically this will switch back to hash mode before kexec.
> > + else if (mmu_hash_ops.hpte_clear_all)
> > + mmu_hash_ops.hpte_clear_all();
> > +}
> > diff --git a/arch/powerpc/mm/pgtable-radix.c
> > b/arch/powerpc/mm/pgtable-radix.c
> > index 3ababda..f127baa 100644
> > --- a/arch/powerpc/mm/pgtable-radix.c
> > +++ b/arch/powerpc/mm/pgtable-radix.c
> > @@ -366,6 +366,16 @@ void radix__early_init_mmu_secondary(void)
> > }
> > }
> >
> > +void radix__mmu_cleanup_all(void)
> > +{
> > + unsigned long lpcr;
> > + if (!firmware_has_feature(FW_FEATURE_LPAR)) {
> > + lpcr = mfspr(SPRN_LPCR);
> > + mtspr(SPRN_LPCR, lpcr & ~LPCR_UPRT);
> > + mtspr(SPRN_PTCR, 0);
>
> Free up the patb data structure here?
Why do we care freeing it ? We're about to kexec.
> We also need tlbie's to invalidate any caches pointing to the patb entries
Yes, that would be definitely a useful addition, I shuld have mentioned this
is a stub so we don't crash due to a NULL pointer, but more work is needed
to properly support kexec, which I'll let Aneesh do.
On the other hand for safety, the new kernel should also flush its TLB on
entry I reckon. Especially since I don't think we do the cleanup on crashdump.
Cheers,
Ben.
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Re: [v4] powerpc: Export thread_struct.used_vr/used_vsr to user space
On Thu, 2016-07-07 at 23:21 +1000, Benjamin Herrenschmidt wrote:
>
> I think the right fix is that if a restore_sigcontext() has the MSR
> bits set,
> it should set the corresponding used_* flag.
Something like this:
(totally untested)
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index b6aa378..1bf074e 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -698,6 +698,7 @@ static long restore_user_regs(struct pt_regs *regs,
if (__copy_from_user(¤t->thread.vr_state, &sr->mc_vregs,
sizeof(sr->mc_vregs)))
return 1;
+ current->thread.used_vr = true;
} else if (current->thread.used_vr)
memset(¤t->thread.vr_state, 0,
ELF_NVRREG * sizeof(vector128));
@@ -724,6 +725,7 @@ static long restore_user_regs(struct pt_regs *regs,
*/
if (copy_vsx_from_user(current, &sr->mc_vsregs))
return 1;
+ current->thread.used_vsr = true;
} else if (current->thread.used_vsr)
for (i = 0; i < 32 ; i++)
current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
@@ -743,6 +745,7 @@ static long restore_user_regs(struct pt_regs *regs,
if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
ELF_NEVRREG * sizeof(u32)))
return 1;
+ current->thread.used_spe = true;
} else if (current->thread.used_spe)
memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
@@ -799,6 +802,7 @@ static long restore_tm_user_regs(struct pt_regs *regs,
&tm_sr->mc_vregs,
sizeof(sr->mc_vregs)))
return 1;
+ current->thread.used_vr = true;
} else if (current->thread.used_vr) {
memset(¤t->thread.vr_state, 0,
ELF_NVRREG * sizeof(vector128));
@@ -832,6 +836,7 @@ static long restore_tm_user_regs(struct pt_regs *regs,
if (copy_vsx_from_user(current, &sr->mc_vsregs) ||
copy_transact_vsx_from_user(current, &tm_sr->mc_vsregs))
return 1;
+ current->thread.used_vsr = true;
} else if (current->thread.used_vsr)
for (i = 0; i < 32 ; i++) {
current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
@@ -848,6 +853,7 @@ static long restore_tm_user_regs(struct pt_regs *regs,
if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
ELF_NEVRREG * sizeof(u32)))
return 1;
+ current->thread.used_spe = true;
} else if (current->thread.used_spe)
memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index 2552079..8704269 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -363,9 +363,11 @@ static long restore_sigcontext(struct pt_regs *regs,
sigset_t *set, int sig,
if (v_regs && !access_ok(VERIFY_READ, v_regs, 34 * sizeof(vector128)))
return -EFAULT;
/* Copy 33 vec registers (vr0..31 and vscr) from the stack */
- if (v_regs != NULL && (msr & MSR_VEC) != 0)
+ if (v_regs != NULL && (msr & MSR_VEC) != 0) {
err |= __copy_from_user(¤t->thread.vr_state, v_regs,
33 * sizeof(vector128));
+ current->thread.used_vr = true;
+ }
else if (current->thread.used_vr)
memset(¤t->thread.vr_state, 0, 33 * sizeof(vector128));
/* Always get VRSAVE back */
@@ -385,9 +387,10 @@ static long restore_sigcontext(struct pt_regs *regs,
sigset_t *set, int sig,
* buffer for formatting, then into the taskstruct.
*/
v_regs += ELF_NVRREG;
- if ((msr & MSR_VSX) != 0)
+ if ((msr & MSR_VSX) != 0) {
err |= copy_vsx_from_user(current, v_regs);
- else
+ current->thread.used_vsr = true;
+ } else
for (i = 0; i < 32 ; i++)
current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
#endif
@@ -482,6 +485,7 @@ static long restore_tm_sigcontexts(struct pt_regs *regs,
33 * sizeof(vector128));
err |= __copy_from_user(¤t->thread.transact_vr, tm_v_regs,
33 * sizeof(vector128));
+ current->thread.used_vr = true;
}
else if
Re: [v4] powerpc: Export thread_struct.used_vr/used_vsr to user space
On Thu, 2016-07-07 at 15:12 +0200, Laurent Dufour wrote:
>
> Basically, CRIU checkpoints the process register's state through the
> ptrace API, and it restores it through a signal frame at restart time.
> This is quite odd but that the way it works on all the CRIU's supported
> architectures.
>
> Obviously everything is done from/in user space, so the sigframe
> building too.
> Since we can't know from user space if the thread has used or not the
> Altivec/VSX registers, since we can't rely on the MSR bits, we always
> dump these registers.
Right, however is that an issue ? These days with glibc using V{M,S}X
for things like memcpy I would think there is little to gain in trying
to avoid dumping them.
> > Alternately, when restoring, can you setup the sigframe with the Altivec/VSX
> > fields populated, and the kernel will then load them, regardless of whether
> > they were actually used or not prior to the checkpoint?
>
> In the case of Altivec/VSX fields, we currently force the kernel to
> retrieve them from the signal frame by setting MSR_VEC/MSR_VSX so
> restore_sigcontext() will copy them to the kernel thread's state.
Yup, that's the way to go.
> However this doesn't touch to used_vsr and used_vr which may remain at 0.
That would be a kernel bug.
> Most of the time this is fine, but in the case a thread which has really
> used those registers is catching a signal just after the restore and
> before it has touched to these registers again (and so set used_vsr/vr),
> these registers will not be pushed in the newly built signal frame since
> setup_sigcontext() check for used_vsr/vr before pushing the registers on
> the stack.
> This may be an issue in the case the thread wants to changed those
> registers (don't ask me why :)) in the stacked signal frame from the
> signal handler since they will not be there...
>
> Being able to get and set the used_vr and used_vsr thread's variables,
> fixes this issue.
I think the right fix is that if a restore_sigcontext() has the MSR bits set,
it should set the corresponding used_* flag.
Or is there a reason why that won't work ?
Cheers,
Ben.
> Cheers,
> Laurent.
>
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Re: [PATCH 02/41] drm: Fix broken use of _PAGE_NO_CACHE on powerpc
On Thu, 2016-07-07 at 22:38 +1000, Michael Ellerman wrote: > Benjamin Herrenschmidt writes: > > > That constant no longer exist. Use the proper accessor instead > > I still see it? Hrm, right, it does, I think it's just not always accessible or the wrong type. That stuff wasn't building anymore. In any case, it shouldn't be used outside of the arch, the accessors are better. > arch/powerpc/include/asm/book3s/32/hash.h:#define _PAGE_NO_CACHE0x020 > /* I: cache inhibit */ > arch/powerpc/include/asm/book3s/64/pgtable.h:#define _PAGE_NO_CACHE > _PAGE_TOLERANT > arch/powerpc/include/asm/nohash/32/pte-44x.h:#define _PAGE_NO_CACHE > 0x0400 /* H: I bit */ > arch/powerpc/include/asm/nohash/32/pte-8xx.h:#define _PAGE_NO_CACHE 0x0002 > /* I: cache inhibit */ > arch/powerpc/include/asm/nohash/32/pte-fsl-booke.h:#define _PAGE_NO_CACHE > 0x00200 /* H: I bit */ > arch/powerpc/include/asm/nohash/pte-book3e.h:#define _PAGE_NO_CACHE > 0x40 /* I: cache inhibit */ > > Do you mean it doesn't exist in some cases? Or pgprot_noncached_wc() is > just better? > > Also this should probably at least get Cc'ed to the DRM folks. Ah yes :-) Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[RFC/PATCH 4/4] powerpc/64/kexec: Remove BookE special default_machine_kexec_prepare()
The only difference is now the TCE table check which doesn't need
to be ifdef'ed out, it will basically do nothing on BookE (it is
only useful for ancient IBM machines).
Signed-off-by: Benjamin Herrenschmidt
---
Currently only compile tested
arch/powerpc/kernel/machine_kexec_64.c | 16
1 file changed, 16 deletions(-)
diff --git a/arch/powerpc/kernel/machine_kexec_64.c
b/arch/powerpc/kernel/machine_kexec_64.c
index 77fcc34..a44ffe5 100644
--- a/arch/powerpc/kernel/machine_kexec_64.c
+++ b/arch/powerpc/kernel/machine_kexec_64.c
@@ -31,21 +31,6 @@
#include
#include
-#ifdef CONFIG_PPC_BOOK3E
-int default_machine_kexec_prepare(struct kimage *image)
-{
- int i;
- /*
-* Since we use the kernel fault handlers and paging code to
-* handle the virtual mode, we must make sure no destination
-* overlaps kernel static data or bss.
-*/
- for (i = 0; i < image->nr_segments; i++)
- if (image->segment[i].mem < __pa(_end))
- return -ETXTBSY;
- return 0;
-}
-#else
int default_machine_kexec_prepare(struct kimage *image)
{
int i;
@@ -85,7 +70,6 @@ int default_machine_kexec_prepare(struct kimage *image)
return 0;
}
-#endif /* !CONFIG_PPC_BOOK3E */
static void copy_segments(unsigned long ind)
{
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[RFC/PATCH 3/4] powerpc/64/kexec: Copy image with MMU off when possible
Currently we turn the MMU off after copying the image, and we make
sure there is no overlap between the hash table and the target pages
in that case.
That doesn't work for Radix however. In that case, the page tables
are scattered and we can't really enforce that the target of the
image isn't overlapping one of them.
So instead, let's turn the MMU off before copying the image in radix
mode. Thankfully, in radix mode, even under a hypervisor, we know we
don't have the same kind of RMA limitations that hash mode has.
While at it, also turn the MMU off early when using hash in non-LPAR
mode, that way we can get rid of the collision check completely.
Signed-off-by: Benjamin Herrenschmidt
---
Currently only compile tested
arch/powerpc/kernel/machine_kexec_64.c | 50 +++---
arch/powerpc/kernel/misc_64.S | 18 +---
2 files changed, 36 insertions(+), 32 deletions(-)
diff --git a/arch/powerpc/kernel/machine_kexec_64.c
b/arch/powerpc/kernel/machine_kexec_64.c
index 0595ede..77fcc34 100644
--- a/arch/powerpc/kernel/machine_kexec_64.c
+++ b/arch/powerpc/kernel/machine_kexec_64.c
@@ -29,6 +29,7 @@
#include
#include
#include
+#include
#ifdef CONFIG_PPC_BOOK3E
int default_machine_kexec_prepare(struct kimage *image)
@@ -63,31 +64,6 @@ int default_machine_kexec_prepare(struct kimage *image)
if (image->segment[i].mem < __pa(_end))
return -ETXTBSY;
- /*
-* For non-LPAR, we absolutely can not overwrite the mmu hash
-* table, since we are still using the bolted entries in it to
-* do the copy. Check that here.
-*
-* It is safe if the end is below the start of the blocked
-* region (end <= low), or if the beginning is after the
-* end of the blocked region (begin >= high). Use the
-* boolean identity !(a || b) === (!a && !b).
-*/
-#ifdef CONFIG_PPC_STD_MMU_64
- if (htab_address) {
- low = __pa(htab_address);
- high = low + htab_size_bytes;
-
- for (i = 0; i < image->nr_segments; i++) {
- begin = image->segment[i].mem;
- end = begin + image->segment[i].memsz;
-
- if ((begin < high) && (end > low))
- return -ETXTBSY;
- }
- }
-#endif /* CONFIG_PPC_STD_MMU_64 */
-
/* We also should not overwrite the tce tables */
for_each_node_by_type(node, "pci") {
basep = of_get_property(node, "linux,tce-base", NULL);
@@ -328,11 +304,14 @@ struct paca_struct kexec_paca;
/* Our assembly helper, in misc_64.S */
extern void kexec_sequence(void *newstack, unsigned long start,
void *image, void *control,
- void (*clear_all)(void)) __noreturn;
+ void (*clear_all)(void),
+ bool copy_with_mmu_off) __noreturn;
/* too late to fail here */
void default_machine_kexec(struct kimage *image)
{
+ bool copy_with_mmu_off;
+
/* prepare control code if any */
/*
@@ -371,12 +350,27 @@ void default_machine_kexec(struct kimage *image)
* switched to a static version!
*/
+ /* On Book3S, the copy must happen with the MMU off if we are either
+* using Radix page tables or we are not in an LPAR since we can
+* overwrite the page tables while copying.
+*
+* In an LPAR, we keep the MMU on otherwise we can't access beyond
+* the RMA. On BookE there is no real MMU off mode, so we have to
+* keep it enabled as well (but then we have bolted TLB entries).
+*/
+#ifdef CONFIG_PPC_BOOK3E
+ copy_with_mmu_off = false;
+#else
+ copy_with_mmu_off = radix_enabled() ||
+ !(firmware_has_feature(FW_FEATURE_LPAR) ||
+ firmware_has_feature(FW_FEATURE_PS3_LV1));
+#endif
/* Some things are best done in assembly. Finding globals with
* a toc is easier in C, so pass in what we can.
*/
kexec_sequence(&kexec_stack, image->start, image,
- page_address(image->control_code_page),
- mmu_cleanup_all);
+ page_address(image->control_code_page),
+ mmu_cleanup_all, copy_with_mmu_off);
/* NOTREACHED */
}
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index 5ae00fd..9c53234 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -591,7 +591,8 @@ real_mode: /* assume normal blr return */
#endif
/*
- * kexec_sequence(newstack, start, image, control, clear_all())
+ * kexec_sequence(newstack, start, image, control, clear_all(),
+ copy_with_mmu_off)
*
* does the grun
[RFC/PATCH 2/4] powerpc/64/kexec: Fix MMU cleanup on radix
Just using the hash ops won't work anymore since radix will have
NULL in there. Instead create an mmu_cleanup_all() function which
will do the right thing based on the MMU mode.
For Radix, for now I clear UPRT and the PTCR, effectively switching
back to Radix with no partition table setup.
Currently set it to NULL on BookE thought it might be a good idea
to wipe the TLB there (Scott ?)
Signed-off-by: Benjamin Herrenschmidt
---
Currently only compile tested
arch/powerpc/include/asm/book3s/64/mmu.h | 3 +++
arch/powerpc/include/asm/mmu-book3e.h| 3 +++
arch/powerpc/include/asm/mmu.h | 3 +++
arch/powerpc/kernel/machine_kexec_64.c | 10 +-
arch/powerpc/mm/pgtable-book3s64.c | 9 +
arch/powerpc/mm/pgtable-radix.c | 10 ++
6 files changed, 29 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h
b/arch/powerpc/include/asm/book3s/64/mmu.h
index 6a90efe..b5c97c1 100644
--- a/arch/powerpc/include/asm/book3s/64/mmu.h
+++ b/arch/powerpc/include/asm/book3s/64/mmu.h
@@ -135,5 +135,8 @@ static inline void setup_initial_memory_limit(phys_addr_t
first_memblock_base,
return hash__setup_initial_memory_limit(first_memblock_base,
first_memblock_size);
}
+
+extern void radix__mmu_cleanup_all(void);
+
#endif /* __ASSEMBLY__ */
#endif /* _ASM_POWERPC_BOOK3S_64_MMU_H_ */
diff --git a/arch/powerpc/include/asm/mmu-book3e.h
b/arch/powerpc/include/asm/mmu-book3e.h
index cd4f04a..b62a8d4 100644
--- a/arch/powerpc/include/asm/mmu-book3e.h
+++ b/arch/powerpc/include/asm/mmu-book3e.h
@@ -313,6 +313,9 @@ extern int book3e_htw_mode;
* return 1, indicating that the tlb requires preloading.
*/
#define HUGETLB_NEED_PRELOAD
+
+#define mmu_cleanup_all NULL
+
#endif
#endif /* !__ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index e53ebeb..50f9aac 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -148,6 +148,9 @@ extern unsigned int __start___mmu_ftr_fixup,
__stop___mmu_ftr_fixup;
* make it match the size our of bolted TLB area
*/
extern u64 ppc64_rma_size;
+
+/* Cleanup function used by kexec */
+extern void mmu_cleanup_all(void);
#endif /* CONFIG_PPC64 */
struct mm_struct;
diff --git a/arch/powerpc/kernel/machine_kexec_64.c
b/arch/powerpc/kernel/machine_kexec_64.c
index 833a79d..0595ede 100644
--- a/arch/powerpc/kernel/machine_kexec_64.c
+++ b/arch/powerpc/kernel/machine_kexec_64.c
@@ -54,9 +54,6 @@ int default_machine_kexec_prepare(struct kimage *image)
const unsigned long *basep;
const unsigned int *sizep;
- if (!mmu_hash_ops.hpte_clear_all)
- return -ENOENT;
-
/*
* Since we use the kernel fault handlers and paging code to
* handle the virtual mode, we must make sure no destination
@@ -379,12 +376,7 @@ void default_machine_kexec(struct kimage *image)
*/
kexec_sequence(&kexec_stack, image->start, image,
page_address(image->control_code_page),
-#ifdef CONFIG_PPC_BOOK3E
- NULL
-#else
- mmu_hash_ops.hpte_clear_all
-#endif
- );
+ mmu_cleanup_all);
/* NOTREACHED */
}
diff --git a/arch/powerpc/mm/pgtable-book3s64.c
b/arch/powerpc/mm/pgtable-book3s64.c
index 85c6070..b654e3c 100644
--- a/arch/powerpc/mm/pgtable-book3s64.c
+++ b/arch/powerpc/mm/pgtable-book3s64.c
@@ -115,3 +115,12 @@ void update_mmu_cache_pmd(struct vm_area_struct *vma,
unsigned long addr,
return;
}
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
+
+/* For use by kexec */
+void mmu_cleanup_all(void)
+{
+ if (radix_enabled())
+ radix__mmu_cleanup_all();
+ else if (mmu_hash_ops.hpte_clear_all)
+ mmu_hash_ops.hpte_clear_all();
+}
diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
index 3ababda..f127baa 100644
--- a/arch/powerpc/mm/pgtable-radix.c
+++ b/arch/powerpc/mm/pgtable-radix.c
@@ -366,6 +366,16 @@ void radix__early_init_mmu_secondary(void)
}
}
+void radix__mmu_cleanup_all(void)
+{
+ unsigned long lpcr;
+ if (!firmware_has_feature(FW_FEATURE_LPAR)) {
+ lpcr = mfspr(SPRN_LPCR);
+ mtspr(SPRN_LPCR, lpcr & ~LPCR_UPRT);
+ mtspr(SPRN_PTCR, 0);
+ }
+}
+
void radix__setup_initial_memory_limit(phys_addr_t first_memblock_base,
phys_addr_t first_memblock_size)
{
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[RFC/PATCH 1/4] powerpc/64/kexec: NULL check "clear_all" in kexec_sequence
With Radix, it can be NULL even on !BOOKE these days so replace the ifdef with a NULL check which is cleaner anyway. Signed-off-by: Benjamin Herrenschmidt --- Currently only compile tested arch/powerpc/kernel/misc_64.S | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S index 5974837..5ae00fd 100644 --- a/arch/powerpc/kernel/misc_64.S +++ b/arch/powerpc/kernel/misc_64.S @@ -659,7 +659,9 @@ _GLOBAL(kexec_sequence) li r6,1 stw r6,kexec_flag-1b(5) -#ifndef CONFIG_PPC_BOOK3E + cmpdi r27,0 + beq 1f + /* clear out hardware hash page table and tlb */ #if !defined(_CALL_ELF) || _CALL_ELF != 2 ld r12,0(r27) /* deref function descriptor */ @@ -668,7 +670,6 @@ _GLOBAL(kexec_sequence) #endif mtctr r12 bctrl /* mmu_hash_ops.hpte_clear_all(void); */ -#endif /* !CONFIG_PPC_BOOK3E */ /* * kexec image calling is: @@ -695,7 +696,7 @@ _GLOBAL(kexec_sequence) *are the boot cpu ? *other device tree differences (prop sizes, va vs pa, etc)... */ - mr r3,r25 # my phys cpu +1: mr r3,r25 # my phys cpu mr r4,r30 # start, aka phys mem offset mtlr4 li r5,0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 22/41] powerpc/mm: Move hash table ops to a separate structure
Moving probe_machine() to after mmu init will cause the ppc_md
fields relative to the hash table management to be overwritten.
Since we have essentially disconnected the machine type from
the hash backend ops, finish the job by moving them to a different
structure.
The only callback that didn't quite fix is update_partition_table
since this is not specific to hash, so I moved it to a standalone
variable for now. We can revisit later if needed.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/include/asm/book3s/64/mmu-hash.h | 39
arch/powerpc/include/asm/book3s/64/mmu.h | 2 ++
arch/powerpc/include/asm/machdep.h| 37 ---
arch/powerpc/kernel/machine_kexec_64.c| 4 +--
arch/powerpc/kernel/misc_64.S | 2 +-
arch/powerpc/kvm/book3s_64_mmu_host.c | 18 +-
arch/powerpc/mm/hash64_4k.c | 18 +-
arch/powerpc/mm/hash64_64k.c | 39 +++-
arch/powerpc/mm/hash_native_64.c | 18 +-
arch/powerpc/mm/hash_utils_64.c | 51 +++
arch/powerpc/mm/hugepage-hash64.c | 17 -
arch/powerpc/mm/hugetlbpage-hash64.c | 4 +--
arch/powerpc/mm/pgtable-book3s64.c| 2 ++
arch/powerpc/mm/pgtable-radix.c | 7 ++--
arch/powerpc/platforms/ps3/htab.c | 12 +++
arch/powerpc/platforms/pseries/lpar.c | 18 +-
16 files changed, 156 insertions(+), 132 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h
b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
index 290157e..c2baabe 100644
--- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h
+++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
@@ -123,6 +123,45 @@
#ifndef __ASSEMBLY__
+struct mmu_hash_ops {
+ void(*hpte_invalidate)(unsigned long slot,
+ unsigned long vpn,
+ int bpsize, int apsize,
+ int ssize, int local);
+ long(*hpte_updatepp)(unsigned long slot,
+unsigned long newpp,
+unsigned long vpn,
+int bpsize, int apsize,
+int ssize, unsigned long flags);
+ void(*hpte_updateboltedpp)(unsigned long newpp,
+ unsigned long ea,
+ int psize, int ssize);
+ long(*hpte_insert)(unsigned long hpte_group,
+ unsigned long vpn,
+ unsigned long prpn,
+ unsigned long rflags,
+ unsigned long vflags,
+ int psize, int apsize,
+ int ssize);
+ long(*hpte_remove)(unsigned long hpte_group);
+ int (*hpte_removebolted)(unsigned long ea,
+int psize, int ssize);
+ void(*flush_hash_range)(unsigned long number, int local);
+ void(*hugepage_invalidate)(unsigned long vsid,
+ unsigned long addr,
+ unsigned char *hpte_slot_array,
+ int psize, int ssize, int local);
+ /*
+* Special for kexec.
+* To be called in real mode with interrupts disabled. No locks are
+* taken as such, concurrent access on pre POWER5 hardware could result
+* in a deadlock.
+* The linear mapping is destroyed as well.
+*/
+ void(*hpte_clear_all)(void);
+};
+extern struct mmu_hash_ops mmu_hash_ops;
+
struct hash_pte {
__be64 v;
__be64 r;
diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h
b/arch/powerpc/include/asm/book3s/64/mmu.h
index 5854263..6a90efe 100644
--- a/arch/powerpc/include/asm/book3s/64/mmu.h
+++ b/arch/powerpc/include/asm/book3s/64/mmu.h
@@ -25,6 +25,8 @@ extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
#define radix_enabled() mmu_has_feature(MMU_FTR_RADIX)
+extern int (*ppc64_update_partition_table)(u64);
+
#endif /* __ASSEMBLY__ */
/* 64-bit classic hash table MMU */
diff --git a/arch/powerpc/include/asm/machdep.h
b/arch/powerpc/include/asm/machdep.h
index 6bdcd0d..62b1461 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -34,42 +34,6 @@ struct pci_host_bridge;
struct machdep_calls {
char*name;
#ifdef CONFIG_PPC64
- void(*hpte_invalidate)(unsigned long slot,
- unsigned lon
[PATCH 11/41] powerpc/dart: Use a cachable DART
Instead of punching a hole in the linear mapping, just use normal
cachable memory, and apply the flush sequence documented in the
CPC625 (aka U3) user manual.
This allows us to remove quite a bit of code related to the early
allocation of the DART and the hole in the linear mapping. We can
also get rid of the copy of the DART for suspend/resume as the
original memory can just be saved/restored now, as long as we
properly sync the caches.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/include/asm/iommu.h| 1 -
arch/powerpc/mm/hash_utils_64.c | 32 --
arch/powerpc/platforms/maple/setup.c| 7 --
arch/powerpc/platforms/powermac/setup.c | 8 --
arch/powerpc/sysdev/dart_iommu.c| 180 +++-
5 files changed, 84 insertions(+), 144 deletions(-)
diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h
index 7b87bab..f49a72a 100644
--- a/arch/powerpc/include/asm/iommu.h
+++ b/arch/powerpc/include/asm/iommu.h
@@ -273,7 +273,6 @@ extern void iommu_init_early_pSeries(void);
extern void iommu_init_early_dart(struct pci_controller_ops *controller_ops);
extern void iommu_init_early_pasemi(void);
-extern void alloc_dart_table(void);
#if defined(CONFIG_PPC64) && defined(CONFIG_PM)
static inline void iommu_save(void)
{
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index b2740c6..2bea864 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -87,10 +87,6 @@
*
*/
-#ifdef CONFIG_U3_DART
-extern unsigned long dart_tablebase;
-#endif /* CONFIG_U3_DART */
-
static unsigned long _SDR1;
struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
EXPORT_SYMBOL_GPL(mmu_psize_defs);
@@ -828,34 +824,6 @@ static void __init htab_initialize(void)
DBG("creating mapping for region: %lx..%lx (prot: %lx)\n",
base, size, prot);
-#ifdef CONFIG_U3_DART
- /* Do not map the DART space. Fortunately, it will be aligned
-* in such a way that it will not cross two memblock regions and
-* will fit within a single 16Mb page.
-* The DART space is assumed to be a full 16Mb region even if
-* we only use 2Mb of that space. We will use more of it later
-* for AGP GART. We have to use a full 16Mb large page.
-*/
- DBG("DART base: %lx\n", dart_tablebase);
-
- if (dart_tablebase != 0 && dart_tablebase >= base
- && dart_tablebase < (base + size)) {
- unsigned long dart_table_end = dart_tablebase + 16 * MB;
- if (base != dart_tablebase)
- BUG_ON(htab_bolt_mapping(base, dart_tablebase,
- __pa(base), prot,
- mmu_linear_psize,
- mmu_kernel_ssize));
- if ((base + size) > dart_table_end)
- BUG_ON(htab_bolt_mapping(dart_tablebase+16*MB,
- base + size,
- __pa(dart_table_end),
-prot,
-mmu_linear_psize,
-mmu_kernel_ssize));
- continue;
- }
-#endif /* CONFIG_U3_DART */
BUG_ON(htab_bolt_mapping(base, base + size, __pa(base),
prot, mmu_linear_psize, mmu_kernel_ssize));
}
diff --git a/arch/powerpc/platforms/maple/setup.c
b/arch/powerpc/platforms/maple/setup.c
index a837188..3cd625d 100644
--- a/arch/powerpc/platforms/maple/setup.c
+++ b/arch/powerpc/platforms/maple/setup.c
@@ -303,13 +303,6 @@ static int __init maple_probe(void)
if (!of_flat_dt_is_compatible(root, "Momentum,Maple") &&
!of_flat_dt_is_compatible(root, "Momentum,Apache"))
return 0;
- /*
-* On U3, the DART (iommu) must be allocated now since it
-* has an impact on htab_initialize (due to the large page it
-* occupies having to be broken up so the DART itself is not
-* part of the cacheable linar mapping
-*/
- alloc_dart_table();
hpte_init_native();
pm_power_off = maple_power_off;
diff --git a/arch/powerpc/platforms/powermac/setup.c
b/arch/powerpc/platforms/powermac/setup.c
index 8dd78f4..19de197 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -605,14 +605,6 @@ static int __init pmac_probe(void)
return 0;
#ifdef CONFIG_PPC64
- /*
-* O
[PATCH 12/41] powerpc: Move FW feature probing out of pseries probe()
We move the function itself to pseries/firmware.c and call it along
with almost all other flat device-tree parsers from early_init_devtree()
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/include/asm/firmware.h | 4 +++
arch/powerpc/kernel/prom.c| 6 +
arch/powerpc/platforms/pseries/firmware.c | 44 +--
arch/powerpc/platforms/pseries/pseries.h | 5
arch/powerpc/platforms/pseries/setup.c| 41
5 files changed, 52 insertions(+), 48 deletions(-)
diff --git a/arch/powerpc/include/asm/firmware.h
b/arch/powerpc/include/asm/firmware.h
index b062924..ae0d457 100644
--- a/arch/powerpc/include/asm/firmware.h
+++ b/arch/powerpc/include/asm/firmware.h
@@ -126,6 +126,10 @@ extern int fwnmi_active;
extern unsigned int __start___fw_ftr_fixup, __stop___fw_ftr_fixup;
+int pseries_probe_fw_features(unsigned long node,
+ const char *uname, int depth,
+ void *data);
+
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */
#endif /* __ASM_POWERPC_FIRMWARE_H */
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 48434be..d10e786 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -57,6 +57,7 @@
#include
#include
#include
+#include
#include
@@ -740,8 +741,13 @@ void __init early_init_devtree(void *params)
/* Scan and build the list of machine check recoverable ranges */
of_scan_flat_dt(early_init_dt_scan_recoverable_ranges, NULL);
#endif
+
epapr_paravirt_early_init();
+#ifdef CONFIG_PPC_PSERIES
+ /* Now try to figure out if we are running on LPAR */
+ of_scan_flat_dt(pseries_probe_fw_features, NULL);
+#endif
DBG(" <- early_init_devtree()\n");
}
diff --git a/arch/powerpc/platforms/pseries/firmware.c
b/arch/powerpc/platforms/pseries/firmware.c
index 8c80588..d9a7f62 100644
--- a/arch/powerpc/platforms/pseries/firmware.c
+++ b/arch/powerpc/platforms/pseries/firmware.c
@@ -69,7 +69,8 @@ hypertas_fw_features_table[] = {
* device-tree/ibm,hypertas-functions. Ultimately this functionality may
* be moved into prom.c prom_init().
*/
-void __init fw_hypertas_feature_init(const char *hypertas, unsigned long len)
+static void __init fw_hypertas_feature_init(const char *hypertas,
+ unsigned long len)
{
const char *s;
int i;
@@ -113,7 +114,7 @@ vec5_fw_features_table[] = {
{FW_FEATURE_PRRN, OV5_PRRN},
};
-void __init fw_vec5_feature_init(const char *vec5, unsigned long len)
+static void __init fw_vec5_feature_init(const char *vec5, unsigned long len)
{
unsigned int index, feat;
int i;
@@ -131,3 +132,42 @@ void __init fw_vec5_feature_init(const char *vec5,
unsigned long len)
pr_debug(" <- fw_vec5_feature_init()\n");
}
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+
+int __init pseries_probe_fw_features(unsigned long node,
+const char *uname, int depth,
+void *data)
+{
+ const char *prop;
+ int len;
+ static int hypertas_found;
+ static int vec5_found;
+
+ if (depth != 1)
+ return 0;
+
+ if (!strcmp(uname, "rtas") || !strcmp(uname, "rtas@0")) {
+ prop = of_get_flat_dt_prop(node, "ibm,hypertas-functions",
+ &len);
+ if (prop) {
+ powerpc_firmware_features |= FW_FEATURE_LPAR;
+ fw_hypertas_feature_init(prop, len);
+ }
+
+ hypertas_found = 1;
+ }
+
+ if (!strcmp(uname, "chosen")) {
+ prop = of_get_flat_dt_prop(node, "ibm,architecture-vec-5",
+ &len);
+ if (prop)
+ fw_vec5_feature_init(prop, len);
+
+ vec5_found = 1;
+ }
+
+ return hypertas_found && vec5_found;
+}
diff --git a/arch/powerpc/platforms/pseries/pseries.h
b/arch/powerpc/platforms/pseries/pseries.h
index 7aa83f0..58a89f9 100644
--- a/arch/powerpc/platforms/pseries/pseries.h
+++ b/arch/powerpc/platforms/pseries/pseries.h
@@ -20,11 +20,6 @@ extern void request_event_sources_irqs(struct device_node
*np,
#include
-extern void __init fw_hypertas_feature_init(const char *hypertas,
- unsigned long len);
-extern void __init fw_vec5_feature_init(const char *hypertas,
- unsigned long len);
-
struct pt_regs;
extern int pSeries_system_reset_exception(struct pt_regs *regs);
diff --git a/arch/powerpc/platforms/pseries/setup.c
b/arch/powerpc/platforms/pseries/setup.c
index 9883bc7..f1fe7aa 100644
--- a/arch
[PATCH 33/41] powerpc/64: Move the content of setup_system() to setup_arch()
And kill setup_system()
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/head_64.S | 5 +-
arch/powerpc/kernel/setup_64.c | 137 +++--
2 files changed, 64 insertions(+), 78 deletions(-)
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 2d14774..3109d0c 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -941,7 +941,7 @@ start_here_multiplatform:
mtspr SPRN_SRR1,r4
RFI
b . /* prevent speculative execution */
-
+
/* This is where all platforms converge execution */
start_here_common:
@@ -951,9 +951,6 @@ start_here_common:
/* Load the TOC (virtual address) */
ld r2,PACATOC(r13)
- /* Do more system initializations in virtual mode */
- bl setup_system
-
/* Mark interrupts soft and hard disabled (they might be enabled
* in the PACA when doing hotplug)
*/
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 16e9ce7..8ee24dc 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -510,80 +510,6 @@ static __init void print_system_info(void)
pr_info("-\n");
}
-/*
- * Do some initial setup of the system. The parameters are those which
- * were passed in from the bootloader.
- */
-void __init setup_system(void)
-{
- DBG(" -> setup_system()\n");
-
- /*
-* Unflatten the device-tree passed by prom_init or kexec
-*/
- unflatten_device_tree();
-
- /*
-* Fill the ppc64_caches & systemcfg structures with informations
-* retrieved from the device-tree.
-*/
- initialize_cache_info();
-
-#ifdef CONFIG_PPC_RTAS
- /*
-* Initialize RTAS if available
-*/
- rtas_initialize();
-#endif /* CONFIG_PPC_RTAS */
-
- /*
-* Check if we have an initrd provided via the device-tree
-*/
- check_for_initrd();
-
- /* Probe the machine type */
- probe_machine();
-
- /*
-* We can discover serial ports now since the above did setup the
-* hash table management for us, thus ioremap works. We do that early
-* so that further code can be debugged
-*/
- find_legacy_serial_ports();
-
- /*
-* Register early console
-*/
- register_early_udbg_console();
-
- /*
-* Initialize xmon
-*/
- xmon_setup();
-
- smp_setup_cpu_maps();
- check_smt_enabled();
- setup_tlb_core_data();
-
- /*
-* Freescale Book3e parts spin in a loop provided by firmware,
-* so smp_release_cpus() does nothing for them
-*/
-#if defined(CONFIG_SMP)
- /* Release secondary cpus out of their spinloops at 0x60 now that
-* we can map physical -> logical CPU ids
-*/
- smp_release_cpus();
-#endif
-
- /* Print various info about the machine that gave been gathered
-* so far
-*/
- print_system_info();
-
- DBG(" <- setup_system()\n");
-}
-
/* This returns the limit below which memory accesses to the linear
* mapping are guarnateed not to cause a TLB or SLB miss. This is
* used to allocate interrupt or emergency stacks for which our
@@ -695,6 +621,69 @@ void __init setup_arch(char **cmdline_p)
{
*cmdline_p = boot_command_line;
+ /*
+* Unflatten the device-tree passed by prom_init or kexec
+*/
+ unflatten_device_tree();
+
+ /*
+* Fill the ppc64_caches & systemcfg structures with informations
+* retrieved from the device-tree.
+*/
+ initialize_cache_info();
+
+#ifdef CONFIG_PPC_RTAS
+ /*
+* Initialize RTAS if available
+*/
+ rtas_initialize();
+#endif /* CONFIG_PPC_RTAS */
+
+ /*
+* Check if we have an initrd provided via the device-tree
+*/
+ check_for_initrd();
+
+ /* Probe the machine type */
+ probe_machine();
+
+ /*
+* We can discover serial ports now since the above did setup the
+* hash table management for us, thus ioremap works. We do that early
+* so that further code can be debugged
+*/
+ find_legacy_serial_ports();
+
+ /*
+* Register early console
+*/
+ register_early_udbg_console();
+
+ /*
+* Initialize xmon
+*/
+ xmon_setup();
+
+ smp_setup_cpu_maps();
+ check_smt_enabled();
+ setup_tlb_core_data();
+
+ /*
+* Freescale Book3e parts spin in a loop provided by firmware,
+* so smp_release_cpus() does nothing for them
+*/
+#if defined(CONFIG_SMP)
+ /* Release secondary cpus out of their spinloops at 0x60 now that
+* we can map physical -> lo
[PATCH 14/41] powerpc/pmac: Remove early allocation of the SMU command buffer
The SMU command buffer needs to be allocated below 2G using memblock.
In the past, this had to be done very early from the arch code as
memblock wasn't available past that point. That is no longer the
case though, smu_init() is called from setup_arch() when memblock
is still functional these days. So move the allocation to the
SMU driver itself.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/include/asm/smu.h | 7 ---
arch/powerpc/platforms/powermac/setup.c | 16
drivers/macintosh/smu.c | 9 -
3 files changed, 8 insertions(+), 24 deletions(-)
diff --git a/arch/powerpc/include/asm/smu.h b/arch/powerpc/include/asm/smu.h
index f280dd1..ddee470 100644
--- a/arch/powerpc/include/asm/smu.h
+++ b/arch/powerpc/include/asm/smu.h
@@ -471,13 +471,6 @@ extern int smu_get_rtc_time(struct rtc_time *time, int
spinwait);
extern int smu_set_rtc_time(struct rtc_time *time, int spinwait);
/*
- * SMU command buffer absolute address, exported by pmac_setup,
- * this is allocated very early during boot.
- */
-extern unsigned long smu_cmdbuf_abs;
-
-
-/*
* Kernel asynchronous i2c interface
*/
diff --git a/arch/powerpc/platforms/powermac/setup.c
b/arch/powerpc/platforms/powermac/setup.c
index 19de197..43d02c2 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -52,7 +52,6 @@
#include
#include
#include
-#include
#include
#include
@@ -97,11 +96,6 @@ int sccdbg;
sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN;
EXPORT_SYMBOL(sys_ctrler);
-#ifdef CONFIG_PMAC_SMU
-unsigned long smu_cmdbuf_abs;
-EXPORT_SYMBOL(smu_cmdbuf_abs);
-#endif
-
static void pmac_show_cpuinfo(struct seq_file *m)
{
struct device_node *np;
@@ -325,7 +319,6 @@ static void __init pmac_setup_arch(void)
defined(CONFIG_PPC64)
pmac_nvram_init();
#endif
-
#ifdef CONFIG_PPC32
#ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start)
@@ -615,15 +608,6 @@ static int __init pmac_probe(void)
DMA_MODE_WRITE = 2;
#endif /* CONFIG_PPC32 */
-#ifdef CONFIG_PMAC_SMU
- /*
-* SMU based G5s need some memory below 2Gb, at least the current
-* driver needs that. We have to allocate it now. We allocate 4k
-* (1 small page) for now.
-*/
- smu_cmdbuf_abs = memblock_alloc_base(4096, 4096, 0x8000UL);
-#endif /* CONFIG_PMAC_SMU */
-
pm_power_off = pmac_power_off;
return 1;
diff --git a/drivers/macintosh/smu.c b/drivers/macintosh/smu.c
index d531f80..d6f72c8 100644
--- a/drivers/macintosh/smu.c
+++ b/drivers/macintosh/smu.c
@@ -38,6 +38,7 @@
#include
#include
#include
+#include
#include
#include
@@ -99,6 +100,7 @@ static DEFINE_MUTEX(smu_mutex);
static struct smu_device *smu;
static DEFINE_MUTEX(smu_part_access);
static int smu_irq_inited;
+static unsigned long smu_cmdbuf_abs;
static void smu_i2c_retry(unsigned long data);
@@ -479,8 +481,13 @@ int __init smu_init (void)
printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR);
+ /*
+* SMU based G5s need some memory below 2Gb. Thankfully this is
+* called at a time where memblock is still available.
+*/
+ smu_cmdbuf_abs = memblock_alloc_base(4096, 4096, 0x8000UL);
if (smu_cmdbuf_abs == 0) {
- printk(KERN_ERR "SMU: Command buffer not allocated !\n");
+ printk(KERN_ERR "SMU: Command buffer allocation failed !\n");
ret = -EINVAL;
goto fail_np;
}
--
2.7.4
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[PATCH 31/41] powerpc/64: Move the boot time info banner to a separate function
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/setup_64.c | 66 ++
1 file changed, 35 insertions(+), 31 deletions(-)
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index a49cb17..d8f5f48 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -474,6 +474,37 @@ static void __init initialize_cache_info(void)
DBG(" <- initialize_cache_info()\n");
}
+static __init void print_system_info(void)
+{
+ pr_info("-\n");
+ pr_info("ppc64_pft_size= 0x%llx\n", ppc64_pft_size);
+ pr_info("phys_mem_size = 0x%llx\n", memblock_phys_mem_size());
+
+ if (ppc64_caches.dline_size != 0x80)
+ pr_info("dcache_line_size = 0x%x\n", ppc64_caches.dline_size);
+ if (ppc64_caches.iline_size != 0x80)
+ pr_info("icache_line_size = 0x%x\n", ppc64_caches.iline_size);
+
+ pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features);
+ pr_info(" possible= 0x%016lx\n", CPU_FTRS_POSSIBLE);
+ pr_info(" always = 0x%016lx\n", CPU_FTRS_ALWAYS);
+ pr_info("cpu_user_features = 0x%08x 0x%08x\n",
cur_cpu_spec->cpu_user_features,
+ cur_cpu_spec->cpu_user_features2);
+ pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features);
+ pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
+
+#ifdef CONFIG_PPC_STD_MMU_64
+ if (htab_address)
+ pr_info("htab_address = 0x%p\n", htab_address);
+
+ pr_info("htab_hash_mask= 0x%lx\n", htab_hash_mask);
+#endif
+
+ if (PHYSICAL_START > 0)
+ pr_info("physical_start= 0x%llx\n",
+ (unsigned long long)PHYSICAL_START);
+ pr_info("-\n");
+}
/*
* Do some initial setup of the system. The parameters are those which
@@ -541,37 +572,10 @@ void __init setup_system(void)
smp_release_cpus();
#endif
- pr_info("Starting Linux %s %s\n", init_utsname()->machine,
-init_utsname()->version);
-
- pr_info("-\n");
- pr_info("ppc64_pft_size= 0x%llx\n", ppc64_pft_size);
- pr_info("phys_mem_size = 0x%llx\n", memblock_phys_mem_size());
-
- if (ppc64_caches.dline_size != 0x80)
- pr_info("dcache_line_size = 0x%x\n", ppc64_caches.dline_size);
- if (ppc64_caches.iline_size != 0x80)
- pr_info("icache_line_size = 0x%x\n", ppc64_caches.iline_size);
-
- pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features);
- pr_info(" possible= 0x%016lx\n", CPU_FTRS_POSSIBLE);
- pr_info(" always = 0x%016lx\n", CPU_FTRS_ALWAYS);
- pr_info("cpu_user_features = 0x%08x 0x%08x\n",
cur_cpu_spec->cpu_user_features,
- cur_cpu_spec->cpu_user_features2);
- pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features);
- pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
-
-#ifdef CONFIG_PPC_STD_MMU_64
- if (htab_address)
- pr_info("htab_address = 0x%p\n", htab_address);
-
- pr_info("htab_hash_mask= 0x%lx\n", htab_hash_mask);
-#endif
-
- if (PHYSICAL_START > 0)
- pr_info("physical_start= 0x%llx\n",
- (unsigned long long)PHYSICAL_START);
- pr_info("-\n");
+ /* Print various info about the machine that gave been gathered
+* so far
+*/
+ print_system_info();
DBG(" <- setup_system()\n");
}
--
2.7.4
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[PATCH 16/41] powerpc/pasemi: Remove IOBMAP allocation from platform probe()
These days, memblocks is available later, so we can just allocate it
as part of iob_init.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/platforms/pasemi/iommu.c | 15 +--
arch/powerpc/platforms/pasemi/pasemi.h | 1 -
arch/powerpc/platforms/pasemi/setup.c | 2 --
3 files changed, 5 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/platforms/pasemi/iommu.c
b/arch/powerpc/platforms/pasemi/iommu.c
index c929644..43dd3fb 100644
--- a/arch/powerpc/platforms/pasemi/iommu.c
+++ b/arch/powerpc/platforms/pasemi/iommu.c
@@ -202,6 +202,11 @@ int __init iob_init(struct device_node *dn)
pr_debug(" -> %s\n", __func__);
+ /* For 2G space, 8x64 pages (2^21 bytes) is max total l2 size */
+ iob_l2_base = (u32 *)__va(memblock_alloc_base(1UL<<21, 1UL<<21,
0x8000));
+
+ printk(KERN_INFO "IOBMAP L2 allocated at: %p\n", iob_l2_base);
+
/* Allocate a spare page to map all invalid IOTLB pages. */
tmp = memblock_alloc(IOBMAP_PAGE_SIZE, IOBMAP_PAGE_SIZE);
if (!tmp)
@@ -260,13 +265,3 @@ void __init iommu_init_early_pasemi(void)
set_pci_dma_ops(&dma_iommu_ops);
}
-void __init alloc_iobmap_l2(void)
-{
-#ifndef CONFIG_PPC_PASEMI_IOMMU
- return;
-#endif
- /* For 2G space, 8x64 pages (2^21 bytes) is max total l2 size */
- iob_l2_base = (u32 *)__va(memblock_alloc_base(1UL<<21, 1UL<<21,
0x8000));
-
- printk(KERN_INFO "IOBMAP L2 allocated at: %p\n", iob_l2_base);
-}
diff --git a/arch/powerpc/platforms/pasemi/pasemi.h
b/arch/powerpc/platforms/pasemi/pasemi.h
index 11f230a..74cbcb3 100644
--- a/arch/powerpc/platforms/pasemi/pasemi.h
+++ b/arch/powerpc/platforms/pasemi/pasemi.h
@@ -8,7 +8,6 @@ extern void pas_pci_dma_dev_setup(struct pci_dev *dev);
extern void __iomem *pasemi_pci_getcfgaddr(struct pci_dev *dev, int offset);
-extern void __init alloc_iobmap_l2(void);
extern void __init pasemi_map_registers(void);
/* Power savings modes, implemented in asm */
diff --git a/arch/powerpc/platforms/pasemi/setup.c
b/arch/powerpc/platforms/pasemi/setup.c
index 7605bc6..9a881be 100644
--- a/arch/powerpc/platforms/pasemi/setup.c
+++ b/arch/powerpc/platforms/pasemi/setup.c
@@ -426,8 +426,6 @@ static int __init pas_probe(void)
!of_flat_dt_is_compatible(root, "pasemi,pwrficient"))
return 0;
- alloc_iobmap_l2();
-
return 1;
}
--
2.7.4
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[PATCH 34/41] powerpc/32: Move cache info inits to a separate function
Matches 64-bit. Also move the call to the same spot as ppc64
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/setup_32.c | 27 ---
1 file changed, 16 insertions(+), 11 deletions(-)
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 22347e87..5457911 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -248,6 +248,21 @@ static void setup_power_save(void)
#endif
}
+static __init void initialize_cache_info(void)
+{
+ /*
+* Set cache line size based on type of cpu as a default.
+* Systems with OF can look in the properties on the cpu node(s)
+* for a possibly more accurate value.
+*/
+ dcache_bsize = cur_cpu_spec->dcache_bsize;
+ icache_bsize = cur_cpu_spec->icache_bsize;
+ ucache_bsize = 0;
+ if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE))
+ ucache_bsize = icache_bsize = dcache_bsize;
+}
+
+
/* Warning, IO base is not yet inited */
void __init setup_arch(char **cmdline_p)
{
@@ -257,6 +272,7 @@ void __init setup_arch(char **cmdline_p)
loops_per_jiffy = 5 / HZ;
unflatten_device_tree();
+ initialize_cache_info();
check_for_initrd();
probe_machine();
@@ -272,17 +288,6 @@ void __init setup_arch(char **cmdline_p)
xmon_setup();
- /*
-* Set cache line size based on type of cpu as a default.
-* Systems with OF can look in the properties on the cpu node(s)
-* for a possibly more accurate value.
-*/
- dcache_bsize = cur_cpu_spec->dcache_bsize;
- icache_bsize = cur_cpu_spec->icache_bsize;
- ucache_bsize = 0;
- if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE))
- ucache_bsize = icache_bsize = dcache_bsize;
-
if (ppc_md.panic)
setup_panic();
--
2.7.4
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[PATCH 23/41] powerpc: Ensure that ppc_md is empty before probing for machine type
Anything in there will be overwritten, so it helps catching nasty
bugs if we check that it's indeed full of NULL's before we do so.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/setup-common.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/powerpc/kernel/setup-common.c
b/arch/powerpc/kernel/setup-common.c
index 2a3564c..7e85fac 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -575,6 +575,7 @@ void probe_machine(void)
{
extern struct machdep_calls __machine_desc_start;
extern struct machdep_calls __machine_desc_end;
+ unsigned int i;
/*
* Iterate all ppc_md structures until we find the proper
@@ -582,6 +583,16 @@ void probe_machine(void)
*/
DBG("Probing machine type ...\n");
+ /* Check ppc_md is empty, if not we have a bug, ie, we setup an
+* entry before probe_machine() which will be overwritten
+*/
+ for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
+ if (((void **)&ppc_md)[i]) {
+ printk(KERN_ERR "Entry %d in ppc_md non empty before"
+ " machine probe !\n", i);
+ }
+ }
+
for (machine_id = &__machine_desc_start;
machine_id < &__machine_desc_end;
machine_id++) {
--
2.7.4
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[PATCH 20/41] powerpc/mm/hash64: Don't test for machine type to detect HEA special case
Instead, check for FW_FEATURE_SPLPAR. This should be roughtly equivalent as all pseries machiens that can have an HEA also support SPLPAR and no other machine type does. Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/mm/hash_utils_64.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c index a261e44..8ccb0b1 100644 --- a/arch/powerpc/mm/hash_utils_64.c +++ b/arch/powerpc/mm/hash_utils_64.c @@ -508,7 +508,8 @@ static bool might_have_hea(void) * we will never see an HEA ethernet device. */ #ifdef CONFIG_IBMEBUS - return !cpu_has_feature(CPU_FTR_ARCH_207S); + return !cpu_has_feature(CPU_FTR_ARCH_207S) && + !firmware_has_feature(FW_FEATURE_SPLPAR); #else return false; #endif @@ -574,7 +575,7 @@ found: * would stop us accessing the HEA ethernet. So if we * have the chance of ever seeing one, stay at 4k. */ - if (!might_have_hea() || !machine_is(pseries)) + if (!might_have_hea()) mmu_io_psize = MMU_PAGE_64K; } else mmu_ci_restrictions = 1; -- 2.7.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 10/41] powerpc: Add comment explaining the purpose of setup_kdump_trampoline()
Anything in early_setup() needs to be justified to be there, in
this case, we need the trampolines before we can take exceptions
and thus before we turn on the MMU.
Also remove a pretty meaningless and misplaced debug message
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/setup_64.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index e1b2e6f..a641753 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -276,10 +276,11 @@ void __init early_setup(unsigned long dt_ptr)
/* Probe the machine type */
probe_machine();
+ /* Setup the trampolines from the lowmem exception vectors
+* to the kdump kernel when not using a relocatable kernel.
+*/
setup_kdump_trampoline();
- DBG("Found, Initializing memory management...\n");
-
/* Initialize the hash table or TLB handling */
early_init_mmu();
--
2.7.4
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[PATCH 26/41] powerpc/85xx/ge_imp3a: Don't use the flat device-tree after boot
ge_imp3a_pic_init() is called way beyond the unflattening of
the tree, it shouldn't be using of_flat_dt_*
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/platforms/85xx/ge_imp3a.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/ge_imp3a.c
b/arch/powerpc/platforms/85xx/ge_imp3a.c
index 11790e0..55eefef 100644
--- a/arch/powerpc/platforms/85xx/ge_imp3a.c
+++ b/arch/powerpc/platforms/85xx/ge_imp3a.c
@@ -47,9 +47,8 @@ void __init ge_imp3a_pic_init(void)
struct mpic *mpic;
struct device_node *np;
struct device_node *cascade_node = NULL;
- unsigned long root = of_get_flat_dt_root();
- if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
+ if (of_machine_is_compatible("fsl,MPC8572DS-CAMP")) {
mpic = mpic_alloc(NULL, 0,
MPIC_NO_RESET |
MPIC_BIG_ENDIAN |
--
2.7.4
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[PATCH 27/41] powerpc/85xx/mpc85xx_ds: Don't use the flat device-tree after boot
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/platforms/85xx/mpc85xx_ds.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index f858306..64a7e8c 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -66,9 +66,7 @@ void __init mpc85xx_ds_pic_init(void)
struct device_node *cascade_node = NULL;
int cascade_irq;
#endif
- unsigned long root = of_get_flat_dt_root();
-
- if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
+ if (of_machine_is_compatible("fsl,MPC8572DS-CAMP")) {
mpic = mpic_alloc(NULL, 0,
MPIC_NO_RESET |
MPIC_BIG_ENDIAN |
--
2.7.4
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Re: [PATCH 36/41] powerpc: Re-order setup_panic()
On Tue, 2016-07-05 at 15:04 +1000, Benjamin Herrenschmidt wrote: > Do it right after probe_machine() since it's about testing ppc_md, > and put the test in the common code. Ignore the second copy of that patch, they are identical, my SSH tunnel broke down half way through sending the series. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc/pci: Fix build with PCI_IOV=y and EEH=n
On Tue, 2016-07-05 at 14:30 +1000, Russell Currey wrote:
> On Tue, 2016-07-05 at 14:13 +1000, Michael Ellerman wrote:
> > Despite attempting to fix this in commit fb36e9073693
> ("powerpc/pci: Fix
> > SRIOV not building without EEH enabled"), the build is still broken
> when
> > PCI_IOV=y and EEH=n (eg. g5_defconfig with PCI_IOV=y):
> >
> > arch/powerpc/kernel/pci_dn.c: In function ‘remove_dev_pci_data’:
> > arch/powerpc/kernel/pci_dn.c:230:18: error: unused variable
> ‘edev’
> >
> > Signed-off-by: Michael Ellerman
> > ---
>
> Mistakes were made.
The fix [PATCH 40/41] powerpc/pci: Fix build of Book3E/64 without EEH
in my series should subsume this... provided I didnt screw up that is
:-)
Cheers,
Ben.
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[PATCH 41/41] powerpc: Fix build with CONFIG_MEMORY_HOTPLUG on some configs
For memory hotplug to work, the MMU code needs to provide the functions
create_section_mapping() and remove_section_mapping() to respectively
map and unmap portions of the linear mapping.
At the moment only hash64 provides these, so we provide weak stubs that
just error out. This fixes the build with configurations such as 64-bit
BookE with CONFIG_MEMORY_HOTPLUG enabled.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/mm/mem.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 2fd57fa..b0b8f25 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -116,6 +116,16 @@ int memory_add_physaddr_to_nid(u64 start)
}
#endif
+int __weak create_section_mapping(unsigned long start, unsigned long end)
+{
+ return -ENODEV;
+}
+
+int __weak remove_section_mapping(unsigned long start, unsigned long end)
+{
+ return -ENODEV;
+}
+
int arch_add_memory(int nid, u64 start, u64 size, bool for_device)
{
struct pglist_data *pgdata;
--
2.7.4
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[PATCH 40/41] powerpc/pci: Fix build of Book3E/64 without EEH
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/pci_dn.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c
index ecdccce..4fc6ede 100644
--- a/arch/powerpc/kernel/pci_dn.c
+++ b/arch/powerpc/kernel/pci_dn.c
@@ -31,6 +31,7 @@
#include
#include
#include
+#include
/*
* The function is used to find the firmware data of one
@@ -181,7 +182,6 @@ struct pci_dn *add_dev_pci_data(struct pci_dev *pdev)
{
#ifdef CONFIG_PCI_IOV
struct pci_dn *parent, *pdn;
- struct eeh_dev *edev;
int i;
/* Only support IOV for now */
@@ -199,6 +199,8 @@ struct pci_dn *add_dev_pci_data(struct pci_dev *pdev)
return NULL;
for (i = 0; i < pci_sriov_get_totalvfs(pdev); i++) {
+ struct eeh_dev *edev __maybe_unused;
+
pdn = add_one_dev_pci_data(parent, NULL, i,
pci_iov_virtfn_bus(pdev, i),
pci_iov_virtfn_devfn(pdev, i));
@@ -209,10 +211,12 @@ struct pci_dn *add_dev_pci_data(struct pci_dev *pdev)
}
/* Create the EEH device for the VF */
+#ifdef CONFIG_EEH
eeh_dev_init(pdn, pci_bus_to_host(pdev->bus));
edev = pdn_to_eeh_dev(pdn);
BUG_ON(!edev);
edev->physfn = pdev;
+#endif /* CONFIG_EEH */
}
#endif /* CONFIG_PCI_IOV */
@@ -224,7 +228,6 @@ void remove_dev_pci_data(struct pci_dev *pdev)
#ifdef CONFIG_PCI_IOV
struct pci_dn *parent;
struct pci_dn *pdn, *tmp;
- struct eeh_dev *edev;
int i;
/*
@@ -260,18 +263,22 @@ void remove_dev_pci_data(struct pci_dev *pdev)
* a batch mode.
*/
for (i = 0; i < pci_sriov_get_totalvfs(pdev); i++) {
+ struct eeh_dev *edev __maybe_unused;
+
list_for_each_entry_safe(pdn, tmp,
&parent->child_list, list) {
if (pdn->busno != pci_iov_virtfn_bus(pdev, i) ||
pdn->devfn != pci_iov_virtfn_devfn(pdev, i))
continue;
+#ifdef CONFIG_EEH
/* Release EEH device for the VF */
edev = pdn_to_eeh_dev(pdn);
if (edev) {
pdn->edev = NULL;
kfree(edev);
}
+#endif
if (!list_empty(&pdn->list))
list_del(&pdn->list);
--
2.7.4
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[PATCH 39/41] powerpc/mm: Fix build of Book3E/64 with 64K pages
Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/include/asm/nohash/64/pgtable-64k.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/include/asm/nohash/64/pgtable-64k.h b/arch/powerpc/include/asm/nohash/64/pgtable-64k.h index 570fb30..9083245 100644 --- a/arch/powerpc/include/asm/nohash/64/pgtable-64k.h +++ b/arch/powerpc/include/asm/nohash/64/pgtable-64k.h @@ -23,6 +23,7 @@ #ifndef __ASSEMBLY__ #define PTE_TABLE_SIZE PTE_FRAG_SIZE #define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE) +#define PUD_TABLE_SIZE (0) #define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE) #endif /* __ASSEMBLY__ */ -- 2.7.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 38/41] powerpc: Merge 32-bit and 64-bit setup_arch()
There is little enough differences now. Use a few __weak stubs
for functions that may not be around in order to avoid too many
ifdefs.
Signed-off-by: Benjamin Herrenschmidt
---
v2. Fix include problems with kvm_ppc.h on some CPU archs
v3. Give up on fixing include problems and move the prototype
of kvm_cma_reserve() to a different file instead
---
arch/powerpc/include/asm/kvm_ppc.h | 4 -
arch/powerpc/include/asm/setup.h | 11 ++
arch/powerpc/kernel/setup-common.c | 205 +
arch/powerpc/kernel/setup_32.c | 65 +---
arch/powerpc/kernel/setup_64.c | 178 ++--
5 files changed, 228 insertions(+), 235 deletions(-)
diff --git a/arch/powerpc/include/asm/kvm_ppc.h
b/arch/powerpc/include/asm/kvm_ppc.h
index 2544eda..bad829a 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -395,7 +395,6 @@ void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid);
struct openpic;
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
-extern void kvm_cma_reserve(void) __init;
static inline void kvmppc_set_xics_phys(int cpu, unsigned long addr)
{
paca[cpu].kvm_hstate.xics_phys = addr;
@@ -425,9 +424,6 @@ extern void kvm_hv_vm_deactivated(void);
extern bool kvm_hv_mode_active(void);
#else
-static inline void __init kvm_cma_reserve(void)
-{}
-
static inline void kvmppc_set_xics_phys(int cpu, unsigned long addr)
{}
diff --git a/arch/powerpc/include/asm/setup.h b/arch/powerpc/include/asm/setup.h
index 1ba25c8..983615b 100644
--- a/arch/powerpc/include/asm/setup.h
+++ b/arch/powerpc/include/asm/setup.h
@@ -19,6 +19,10 @@ extern unsigned long reloc_offset(void);
extern unsigned long add_reloc_offset(unsigned long);
extern void reloc_got2(unsigned long);
+extern void initialize_cache_info(void);
+extern void irqstack_early_init(void);
+extern void emergency_stack_init(void);
+
#ifdef CONFIG_PPC32
#define PTRRELOC(x)((typeof(x)) add_reloc_offset((unsigned long)(x)))
#else
@@ -42,6 +46,13 @@ static inline void pseries_big_endian_exceptions(void) {}
static inline void pseries_little_endian_exceptions(void) {}
#endif /* CONFIG_PPC_PSERIES */
+/* Having this in kvm_ppc.h makes include dependencies too
+ * tricky to solve for setup-common.c so have it here with
+ * along with a weak stub instead.
+ */
+extern void kvm_cma_reserve(void);
+
+
#endif /* !__ASSEMBLY__ */
#endif /* _ASM_POWERPC_SETUP_H */
diff --git a/arch/powerpc/kernel/setup-common.c
b/arch/powerpc/kernel/setup-common.c
index d0256a3..ea74f9a 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -35,6 +35,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -61,6 +62,10 @@
#include
#include
#include
+#include
+#include
+#include
+#include
#ifdef DEBUG
#include
@@ -757,3 +762,203 @@ void arch_setup_pdev_archdata(struct platform_device
*pdev)
pdev->dev.dma_mask = &pdev->archdata.dma_mask;
set_dma_ops(&pdev->dev, &dma_direct_ops);
}
+
+static __init void print_system_info(void)
+{
+ pr_info("-\n");
+#ifdef CONFIG_PPC_STD_MMU_64
+ pr_info("ppc64_pft_size= 0x%llx\n", ppc64_pft_size);
+#endif
+#ifdef CONFIG_PPC_STD_MMU_32
+ pr_info("Hash_size = 0x%lx\n", Hash_size);
+#endif
+ pr_info("phys_mem_size = 0x%llx\n",
+ (unsigned long long)memblock_phys_mem_size());
+
+ pr_info("dcache_bsize = 0x%x\n", dcache_bsize);
+ pr_info("icache_bsize = 0x%x\n", icache_bsize);
+ if (ucache_bsize != 0)
+ pr_info("ucache_bsize = 0x%x\n", ucache_bsize);
+
+ pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features);
+ pr_info(" possible= 0x%016lx\n",
+ (unsigned long)CPU_FTRS_POSSIBLE);
+ pr_info(" always = 0x%016lx\n",
+ (unsigned long)CPU_FTRS_ALWAYS);
+ pr_info("cpu_user_features = 0x%08x 0x%08x\n",
+ cur_cpu_spec->cpu_user_features,
+ cur_cpu_spec->cpu_user_features2);
+ pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features);
+#ifdef CONFIG_PPC64
+ pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
+#endif
+
+#ifdef CONFIG_PPC_STD_MMU_64
+ if (htab_address)
+ pr_info("htab_address = 0x%p\n", htab_address);
+ if (htab_hash_mask)
+ pr_info("htab_hash_mask= 0x%lx\n", htab_hash_mask);
+#endif
+#ifdef CONFIG_PPC_STD_MMU_32
+ if (Hash)
+ pr_info("Hash = 0x%p\n", Hash);
+ if (Hash_mask)
+ pr_info("Hash_mask
[PATCH 37/41] powerpc/64: Make a few boot functions __init
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/setup_64.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index bb1b65e..46787d9 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -198,7 +198,7 @@ early_param("smt-enabled", early_smt_enabled);
#endif /* CONFIG_SMP */
/** Fix up paca fields required for the boot cpu */
-static void fixup_boot_paca(void)
+static void __init fixup_boot_paca(void)
{
/* The boot cpu is started */
get_paca()->cpu_start = 1;
@@ -206,7 +206,7 @@ static void fixup_boot_paca(void)
get_paca()->data_offset = 0;
}
-static void configure_exceptions(void)
+static void __init configure_exceptions(void)
{
/* Setup the trampolines from the lowmem exception vectors
* to the kdump kernel when not using a relocatable kernel.
@@ -515,7 +515,7 @@ static __init void print_system_info(void)
* used to allocate interrupt or emergency stacks for which our
* exception entry path doesn't deal with being interrupted.
*/
-static u64 safe_stack_limit(void)
+static __init u64 safe_stack_limit(void)
{
#ifdef CONFIG_PPC_BOOK3E
/* Freescale BookE bolts the entire linear mapping */
--
2.7.4
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[PATCH 36/41] powerpc: Re-order setup_panic()
Do it right after probe_machine() since it's about testing ppc_md,
and put the test in the common code.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/setup-common.c | 2 ++
arch/powerpc/kernel/setup_32.c | 5 ++---
arch/powerpc/kernel/setup_64.c | 5 ++---
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kernel/setup-common.c
b/arch/powerpc/kernel/setup-common.c
index 7e85fac..d0256a3 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -687,6 +687,8 @@ static struct notifier_block ppc_panic_block = {
void __init setup_panic(void)
{
+ if (!ppc_md.panic)
+ return;
atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
}
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 58674b6..6247a3a 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -277,6 +277,8 @@ void __init setup_arch(char **cmdline_p)
probe_machine();
+ setup_panic();
+
setup_power_save();
find_legacy_serial_ports();
@@ -288,9 +290,6 @@ void __init setup_arch(char **cmdline_p)
xmon_setup();
- if (ppc_md.panic)
- setup_panic();
-
init_mm.start_code = (unsigned long)_stext;
init_mm.end_code = (unsigned long) _etext;
init_mm.end_data = (unsigned long) _edata;
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 46faafe..bb1b65e 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -647,6 +647,8 @@ void __init setup_arch(char **cmdline_p)
/* Probe the machine type */
probe_machine();
+ setup_panic();
+
/*
* We can discover serial ports now since the above did setup the
* hash table management for us, thus ioremap works. We do that early
@@ -695,9 +697,6 @@ void __init setup_arch(char **cmdline_p)
*/
reserve_hugetlb_gpages();
- if (ppc_md.panic)
- setup_panic();
-
klp_init_thread_info(&init_thread_info);
init_mm.start_code = (unsigned long)_stext;
--
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[PATCH 36/41] powerpc: Re-order setup_panic()
Do it right after probe_machine() since it's about testing ppc_md,
and put the test in the common code.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/setup-common.c | 2 ++
arch/powerpc/kernel/setup_32.c | 5 ++---
arch/powerpc/kernel/setup_64.c | 5 ++---
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kernel/setup-common.c
b/arch/powerpc/kernel/setup-common.c
index 7e85fac..d0256a3 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -687,6 +687,8 @@ static struct notifier_block ppc_panic_block = {
void __init setup_panic(void)
{
+ if (!ppc_md.panic)
+ return;
atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
}
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 58674b6..6247a3a 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -277,6 +277,8 @@ void __init setup_arch(char **cmdline_p)
probe_machine();
+ setup_panic();
+
setup_power_save();
find_legacy_serial_ports();
@@ -288,9 +290,6 @@ void __init setup_arch(char **cmdline_p)
xmon_setup();
- if (ppc_md.panic)
- setup_panic();
-
init_mm.start_code = (unsigned long)_stext;
init_mm.end_code = (unsigned long) _etext;
init_mm.end_data = (unsigned long) _edata;
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 46faafe..bb1b65e 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -647,6 +647,8 @@ void __init setup_arch(char **cmdline_p)
/* Probe the machine type */
probe_machine();
+ setup_panic();
+
/*
* We can discover serial ports now since the above did setup the
* hash table management for us, thus ioremap works. We do that early
@@ -695,9 +697,6 @@ void __init setup_arch(char **cmdline_p)
*/
reserve_hugetlb_gpages();
- if (ppc_md.panic)
- setup_panic();
-
klp_init_thread_info(&init_thread_info);
init_mm.start_code = (unsigned long)_stext;
--
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[PATCH 35/41] powerpc: Re-order the call to smp_setup_cpu_maps()
It makes more sense to do it before intializing xmon() as xmon might use the info in there. We do want to register the console early though in case we want some functioning printk's in the cpu map setup. Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/kernel/setup_32.c | 4 ++-- arch/powerpc/kernel/setup_64.c | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c index 5457911..58674b6 100644 --- a/arch/powerpc/kernel/setup_32.c +++ b/arch/powerpc/kernel/setup_32.c @@ -281,11 +281,11 @@ void __init setup_arch(char **cmdline_p) find_legacy_serial_ports(); - smp_setup_cpu_maps(); - /* Register early console */ register_early_udbg_console(); + smp_setup_cpu_maps(); + xmon_setup(); if (ppc_md.panic) diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index 8ee24dc..46faafe 100644 --- a/arch/powerpc/kernel/setup_64.c +++ b/arch/powerpc/kernel/setup_64.c @@ -659,12 +659,13 @@ void __init setup_arch(char **cmdline_p) */ register_early_udbg_console(); + smp_setup_cpu_maps(); + /* * Initialize xmon */ xmon_setup(); - smp_setup_cpu_maps(); check_smt_enabled(); setup_tlb_core_data(); -- 2.7.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 29/41] powerpc: Move 32-bit probe() machine to later in the boot process
This converts all the 32-bit platforms to use the expanded device-tree which is a pretty mechanical change. Unlike 64-bit, the 32-bit kernel didn't rely on platform initializations to setup the MMU since it sets it up entirely before probe_machine() so the move has comparatively less consequences though it's a bigger patch. Signed-off-by: Benjamin Herrenschmidt --- v2. Fix typos v3. Fix more typos --- arch/powerpc/kernel/setup_32.c| 35 +++- arch/powerpc/platforms/40x/ep405.c| 4 +-- arch/powerpc/platforms/40x/ppc40x_simple.c| 2 +- arch/powerpc/platforms/40x/virtex.c | 4 +-- arch/powerpc/platforms/40x/walnut.c | 4 +-- arch/powerpc/platforms/44x/canyonlands.c | 5 ++- arch/powerpc/platforms/44x/ebony.c| 4 +-- arch/powerpc/platforms/44x/iss4xx.c | 4 +-- arch/powerpc/platforms/44x/ppc44x_simple.c| 3 +- arch/powerpc/platforms/44x/ppc476.c | 6 ++-- arch/powerpc/platforms/44x/sam440ep.c | 4 +-- arch/powerpc/platforms/44x/virtex.c | 4 +-- arch/powerpc/platforms/44x/warp.c | 4 +-- arch/powerpc/platforms/512x/mpc5121_ads.c | 4 +-- arch/powerpc/platforms/512x/mpc512x_generic.c | 2 +- arch/powerpc/platforms/512x/pdm360ng.c| 4 +-- arch/powerpc/platforms/52xx/efika.c | 3 +- arch/powerpc/platforms/52xx/lite5200.c| 2 +- arch/powerpc/platforms/52xx/media5200.c | 2 +- arch/powerpc/platforms/52xx/mpc5200_simple.c | 2 +- arch/powerpc/platforms/82xx/ep8248e.c | 3 +- arch/powerpc/platforms/82xx/km82xx.c | 3 +- arch/powerpc/platforms/82xx/mpc8272_ads.c | 3 +- arch/powerpc/platforms/82xx/pq2fads.c | 3 +- arch/powerpc/platforms/83xx/asp834x.c | 3 +- arch/powerpc/platforms/83xx/km83xx.c | 3 +- arch/powerpc/platforms/83xx/mpc830x_rdb.c | 2 +- arch/powerpc/platforms/83xx/mpc831x_rdb.c | 2 +- arch/powerpc/platforms/83xx/mpc832x_mds.c | 4 +-- arch/powerpc/platforms/83xx/mpc832x_rdb.c | 4 +-- arch/powerpc/platforms/83xx/mpc834x_itx.c | 4 +-- arch/powerpc/platforms/83xx/mpc834x_mds.c | 4 +-- arch/powerpc/platforms/83xx/mpc836x_mds.c | 4 +-- arch/powerpc/platforms/83xx/mpc836x_rdk.c | 4 +-- arch/powerpc/platforms/83xx/mpc837x_mds.c | 4 +-- arch/powerpc/platforms/83xx/mpc837x_rdb.c | 2 +- arch/powerpc/platforms/83xx/sbc834x.c | 4 +-- arch/powerpc/platforms/85xx/bsc913x_qds.c | 4 +-- arch/powerpc/platforms/85xx/bsc913x_rdb.c | 4 +-- arch/powerpc/platforms/85xx/c293pcie.c| 4 +-- arch/powerpc/platforms/85xx/corenet_generic.c | 5 ++- arch/powerpc/platforms/85xx/ge_imp3a.c| 4 +-- arch/powerpc/platforms/85xx/ksi8560.c | 4 +-- arch/powerpc/platforms/85xx/mpc8536_ds.c | 4 +-- arch/powerpc/platforms/85xx/mpc85xx_ads.c | 4 +-- arch/powerpc/platforms/85xx/mpc85xx_cds.c | 4 +-- arch/powerpc/platforms/85xx/mpc85xx_ds.c | 12 ++- arch/powerpc/platforms/85xx/mpc85xx_mds.c | 12 ++- arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 40 ++- arch/powerpc/platforms/85xx/mvme2500.c| 4 +-- arch/powerpc/platforms/85xx/p1010rdb.c| 6 ++-- arch/powerpc/platforms/85xx/p1022_ds.c| 4 +-- arch/powerpc/platforms/85xx/p1022_rdk.c | 4 +-- arch/powerpc/platforms/85xx/p1023_rdb.c | 4 +-- arch/powerpc/platforms/85xx/ppa8548.c | 4 +-- arch/powerpc/platforms/85xx/qemu_e500.c | 4 +-- arch/powerpc/platforms/85xx/sbc8548.c | 4 +-- arch/powerpc/platforms/85xx/socrates.c| 4 +-- arch/powerpc/platforms/85xx/stx_gp3.c | 4 +-- arch/powerpc/platforms/85xx/tqm85xx.c | 2 +- arch/powerpc/platforms/85xx/twr_p102x.c | 4 +-- arch/powerpc/platforms/85xx/xes_mpc85xx.c | 12 ++- arch/powerpc/platforms/86xx/gef_ppc9a.c | 4 +-- arch/powerpc/platforms/86xx/gef_sbc310.c | 4 +-- arch/powerpc/platforms/86xx/gef_sbc610.c | 4 +-- arch/powerpc/platforms/86xx/mpc8610_hpcd.c| 4 +-- arch/powerpc/platforms/86xx/mpc86xx_hpcn.c| 6 ++-- arch/powerpc/platforms/86xx/sbc8641d.c| 4 +-- arch/powerpc/platforms/8xx/adder875.c | 3 +- arch/powerpc/platforms/8xx/ep88xc.c | 3 +- arch/powerpc/platforms/8xx/mpc86xads_setup.c | 3 +- arch/powerpc/platforms/8xx/mpc885ads_setup.c | 3 +- arch/powerpc/platforms/8xx/tqm8xx_setup.c | 4 +-- arch/powerpc/platforms/amigaone/setup.c | 4 +-- arch/powerpc/platforms/embedded6xx/c2k.c | 4 +-- arch/powerpc/platforms/embedded6xx/gamecube.
[PATCH 32/41] powerpc/64: Move setting of {i, d}cache_bsize to initialize_cache_info()
Also remove the completely osbolete comment. We *do* look in the
device-tree.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/setup_64.c | 13 -
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index d8f5f48..16e9ce7 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -471,6 +471,10 @@ static void __init initialize_cache_info(void)
}
}
+ /* For use by binfmt_elf */
+ dcache_bsize = ppc64_caches.dline_size;
+ icache_bsize = ppc64_caches.iline_size;
+
DBG(" <- initialize_cache_info()\n");
}
@@ -691,15 +695,6 @@ void __init setup_arch(char **cmdline_p)
{
*cmdline_p = boot_command_line;
- /*
-* Set cache line size based on type of cpu as a default.
-* Systems with OF can look in the properties on the cpu node(s)
-* for a possibly more accurate value.
-*/
- dcache_bsize = ppc64_caches.dline_size;
- icache_bsize = ppc64_caches.iline_size;
-
-
/* Reserve large chunks of memory for use by CMA for KVM */
kvm_cma_reserve();
--
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[PATCH 30/41] powerpc: Get rid of ppc_md.init_early()
It is now called right after platform probe, so the probe function
can just do the job.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/include/asm/machdep.h| 1 -
arch/powerpc/kernel/setup_32.c| 3 ---
arch/powerpc/kernel/setup_64.c| 8
arch/powerpc/platforms/512x/mpc5121_ads.c | 8 ++--
arch/powerpc/platforms/512x/mpc512x_generic.c | 8 ++--
arch/powerpc/platforms/512x/pdm360ng.c| 8 ++--
arch/powerpc/platforms/chrp/setup.c | 5 +++--
arch/powerpc/platforms/embedded6xx/c2k.c | 4 +++-
arch/powerpc/platforms/embedded6xx/gamecube.c | 8 ++--
arch/powerpc/platforms/embedded6xx/wii.c | 8 ++--
arch/powerpc/platforms/maple/setup.c | 15 ++-
arch/powerpc/platforms/pasemi/setup.c | 8 ++--
arch/powerpc/platforms/powermac/setup.c | 5 +++--
arch/powerpc/platforms/powernv/setup.c| 5 +++--
arch/powerpc/platforms/pseries/setup.c| 9 +
15 files changed, 43 insertions(+), 60 deletions(-)
diff --git a/arch/powerpc/include/asm/machdep.h
b/arch/powerpc/include/asm/machdep.h
index 62b1461..29bc9a3 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -53,7 +53,6 @@ struct machdep_calls {
int (*probe)(void);
void(*setup_arch)(void); /* Optional, may be NULL */
- void(*init_early)(void);
/* Optional, may be NULL. */
void(*show_cpuinfo)(struct seq_file *m);
void(*show_percpuinfo)(struct seq_file *m, int i);
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index e7bb4e7..22347e87 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -263,9 +263,6 @@ void __init setup_arch(char **cmdline_p)
setup_power_save();
- if (ppc_md.init_early)
- ppc_md.init_early();
-
find_legacy_serial_ports();
smp_setup_cpu_maps();
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index cefe985..a49cb17 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -509,14 +509,6 @@ void __init setup_system(void)
/* Probe the machine type */
probe_machine();
- /*
-* Do some platform specific early initializations, that includes
-* setting up the hash table pointers. It also sets up some
interrupt-mapping
-* related options that will be used by finish_device_tree()
-*/
- if (ppc_md.init_early)
- ppc_md.init_early();
-
/*
* We can discover serial ports now since the above did setup the
* hash table management for us, thus ioremap works. We do that early
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c
b/arch/powerpc/platforms/512x/mpc5121_ads.c
index 4e03f04..f65d503 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.c
@@ -57,7 +57,12 @@ static void __init mpc5121_ads_init_IRQ(void)
*/
static int __init mpc5121_ads_probe(void)
{
- return of_machine_is_compatible("fsl,mpc5121ads");
+ if (!of_machine_is_compatible("fsl,mpc5121ads"))
+ return 0;
+
+ mpc512x_init_early();
+
+ return 1;
}
define_machine(mpc5121_ads) {
@@ -65,7 +70,6 @@ define_machine(mpc5121_ads) {
.probe = mpc5121_ads_probe,
.setup_arch = mpc5121_ads_setup_arch,
.init = mpc512x_init,
- .init_early = mpc512x_init_early,
.init_IRQ = mpc5121_ads_init_IRQ,
.get_irq= ipic_get_irq,
.calibrate_decr = generic_calibrate_decr,
diff --git a/arch/powerpc/platforms/512x/mpc512x_generic.c
b/arch/powerpc/platforms/512x/mpc512x_generic.c
index 87eba17..bf884d3 100644
--- a/arch/powerpc/platforms/512x/mpc512x_generic.c
+++ b/arch/powerpc/platforms/512x/mpc512x_generic.c
@@ -38,14 +38,18 @@ static const char * const board[] __initconst = {
*/
static int __init mpc512x_generic_probe(void)
{
- return of_device_compatible_match(of_root, board);
+ if (!of_device_compatible_match(of_root, board))
+ return 0;
+
+ mpc512x_init_early();
+
+ return 1;
}
define_machine(mpc512x_generic) {
.name = "MPC512x generic",
.probe = mpc512x_generic_probe,
.init = mpc512x_init,
- .init_early = mpc512x_init_early,
.setup_arch = mpc512x_setup_arch,
.init_IRQ = mpc512x_init_IRQ,
.get_irq= ipic_get_irq,
diff --git a/arch/powerpc/platforms/512x/pdm360ng.c
b/arch/powerpc/platforms/512x/pdm360ng.c
index f9cad19..dc81f05 100644
--- a/arch/powerpc/platforms/512x
[PATCH 25/41] powerpc/cell: Don't use flat device-tree after boot
Some bit of SPU code was using the FDT rather than the expanded
device-tree. Fix it.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/platforms/cell/spu_manage.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/cell/spu_manage.c
b/arch/powerpc/platforms/cell/spu_manage.c
index c3327f3..21b4bfb 100644
--- a/arch/powerpc/platforms/cell/spu_manage.c
+++ b/arch/powerpc/platforms/cell/spu_manage.c
@@ -535,8 +535,7 @@ static int __init init_affinity(void)
if (of_has_vicinity()) {
init_affinity_fw();
} else {
- long root = of_get_flat_dt_root();
- if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
+ if (of_machine_is_compatible("IBM,CPBW-1.0"))
init_affinity_qs20_harcoded();
else
printk("No affinity configuration found\n");
--
2.7.4
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[PATCH 28/41] powerpc/85xx/mpc85xx_rdb: Don't use the flat device-tree after boot
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index 3f4dad1..761e504 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -47,13 +47,12 @@
void __init mpc85xx_rdb_pic_init(void)
{
struct mpic *mpic;
- unsigned long root = of_get_flat_dt_root();
#ifdef CONFIG_QUICC_ENGINE
struct device_node *np;
#endif
- if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) {
+ if (of_machine_is_compatible("fsl,MPC85XXRDB-CAMP")) {
mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET |
MPIC_BIG_ENDIAN |
MPIC_SINGLE_DEST_CPU,
--
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[PATCH 24/41] powerpc: Move 64-bit probe_machine() to later in the boot process
We no long need the machine type that early, so we can move probe_machine()
to after the device-tree has been expanded. This will allow further
consolidation.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/setup_64.c | 6 +++---
arch/powerpc/platforms/cell/setup.c | 6 ++
arch/powerpc/platforms/maple/setup.c| 6 ++
arch/powerpc/platforms/pasemi/setup.c | 6 ++
arch/powerpc/platforms/powermac/setup.c | 6 ++
arch/powerpc/platforms/powernv/setup.c | 4 +---
arch/powerpc/platforms/ps3/setup.c | 6 ++
arch/powerpc/platforms/pseries/setup.c | 7 +++
8 files changed, 21 insertions(+), 26 deletions(-)
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 978c48c..cefe985 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -300,9 +300,6 @@ void __init early_setup(unsigned long dt_ptr)
setup_paca(&paca[boot_cpuid]);
fixup_boot_paca();
- /* Probe the machine type */
- probe_machine();
-
/* Configure exception handlers. This include setting up trampolines
* if needed, setting exception endian mode, etc...
*/
@@ -509,6 +506,9 @@ void __init setup_system(void)
*/
check_for_initrd();
+ /* Probe the machine type */
+ probe_machine();
+
/*
* Do some platform specific early initializations, that includes
* setting up the hash table pointers. It also sets up some
interrupt-mapping
diff --git a/arch/powerpc/platforms/cell/setup.c
b/arch/powerpc/platforms/cell/setup.c
index e342f78..d3543e6 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -255,10 +255,8 @@ static void __init cell_setup_arch(void)
static int __init cell_probe(void)
{
- unsigned long root = of_get_flat_dt_root();
-
- if (!of_flat_dt_is_compatible(root, "IBM,CBEA") &&
- !of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
+ if (!of_machine_is_compatible("IBM,CBEA") &&
+ !of_machine_is_compatible("IBM,CPBW-1.0"))
return 0;
pm_power_off = rtas_power_off;
diff --git a/arch/powerpc/platforms/maple/setup.c
b/arch/powerpc/platforms/maple/setup.c
index a56828c..a1ecbc9 100644
--- a/arch/powerpc/platforms/maple/setup.c
+++ b/arch/powerpc/platforms/maple/setup.c
@@ -298,10 +298,8 @@ static void __init maple_progress(char *s, unsigned short
hex)
*/
static int __init maple_probe(void)
{
- unsigned long root = of_get_flat_dt_root();
-
- if (!of_flat_dt_is_compatible(root, "Momentum,Maple") &&
- !of_flat_dt_is_compatible(root, "Momentum,Apache"))
+ if (!of_machine_is_compatible("Momentum,Maple") &&
+ !of_machine_is_compatible("Momentum,Apache"))
return 0;
pm_power_off = maple_power_off;
diff --git a/arch/powerpc/platforms/pasemi/setup.c
b/arch/powerpc/platforms/pasemi/setup.c
index 9a881be..8f5e291 100644
--- a/arch/powerpc/platforms/pasemi/setup.c
+++ b/arch/powerpc/platforms/pasemi/setup.c
@@ -420,10 +420,8 @@ machine_device_initcall(pasemi, pasemi_publish_devices);
*/
static int __init pas_probe(void)
{
- unsigned long root = of_get_flat_dt_root();
-
- if (!of_flat_dt_is_compatible(root, "PA6T-1682M") &&
- !of_flat_dt_is_compatible(root, "pasemi,pwrficient"))
+ if (!of_machine_is_compatible("PA6T-1682M") &&
+ !of_machine_is_compatible("pasemi,pwrficient"))
return 0;
return 1;
diff --git a/arch/powerpc/platforms/powermac/setup.c
b/arch/powerpc/platforms/powermac/setup.c
index 1e42104..128ce76 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -588,11 +588,17 @@ console_initcall(check_pmac_serial_console);
*/
static int __init pmac_probe(void)
{
+#ifdef CONFIG_PPC32
unsigned long root = of_get_flat_dt_root();
if (!of_flat_dt_is_compatible(root, "Power Macintosh") &&
!of_flat_dt_is_compatible(root, "MacRISC"))
return 0;
+#else
+ if (!of_machine_is_compatible("Power Macintosh") &&
+ !of_machine_is_compatible("MacRISC"))
+ return 0;
+#endif
#ifdef CONFIG_PPC32
/* isa_io_base gets set in pmac_pci_init */
diff --git a/arch/powerpc/platforms/powernv/setup.c
b/arch/powerpc/platforms/powernv/setup.c
index 15e3b8b..ed99177 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -268,9 +268,7 @@ static void __init pnv_setup_machdep_opal(void)
static int __init pnv_probe(void)
{
- unsigned long root = of_get_flat_dt_root();
-
- if (!of_flat_dt_is_compatible(root, "ibm,po
[PATCH 21/41] powerpc/pmac: Remove spurrious machine type test
pmac_declare_of_platform_devices() is already a machine initcall, thus
it won't be called on a non-powermac machine. Testing for chrp there
is pointless.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/platforms/powermac/setup.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/powerpc/platforms/powermac/setup.c
b/arch/powerpc/platforms/powermac/setup.c
index 5801889..1e42104 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -482,9 +482,6 @@ static int __init pmac_declare_of_platform_devices(void)
{
struct device_node *np;
- if (machine_is(chrp))
- return -1;
-
np = of_find_node_by_name(NULL, "valkyrie");
if (np) {
of_platform_device_create(np, "valkyrie", NULL);
--
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[PATCH 19/41] powerpc: Don't test for machine type in smp_setup_cpu_maps()
The subsequent test for RTAS along with the LPAR test are sufficient
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/setup-common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/setup-common.c
b/arch/powerpc/kernel/setup-common.c
index 8ca79b7..2a3564c 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -494,7 +494,7 @@ void __init smp_setup_cpu_maps(void)
* On pSeries LPAR, we need to know how many cpus
* could possibly be added to this partition.
*/
- if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
+ if (firmware_has_feature(FW_FEATURE_LPAR) &&
(dn = of_find_node_by_path("/rtas"))) {
int num_addr_cell, num_size_cell, maxcpus;
const __be32 *ireg;
--
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[PATCH 15/41] powerpc/64: Move MMU backend selection out of platform code
We move it into early_mmu_init() based on firmware features. For PS3,
we have to move the setting of these into early_init_devtree().
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/include/asm/ps3.h | 2 ++
arch/powerpc/kernel/prom.c | 7 +++
arch/powerpc/mm/hash_utils_64.c | 14 ++
arch/powerpc/mm/pgtable-radix.c | 1 +
arch/powerpc/platforms/cell/setup.c | 1 -
arch/powerpc/platforms/maple/setup.c| 1 -
arch/powerpc/platforms/pasemi/setup.c | 2 --
arch/powerpc/platforms/powermac/setup.c | 4
arch/powerpc/platforms/powernv/setup.c | 5 -
arch/powerpc/platforms/ps3/setup.c | 15 +--
arch/powerpc/platforms/pseries/setup.c | 7 ---
11 files changed, 33 insertions(+), 26 deletions(-)
diff --git a/arch/powerpc/include/asm/ps3.h b/arch/powerpc/include/asm/ps3.h
index a1bc7e7..a19f831 100644
--- a/arch/powerpc/include/asm/ps3.h
+++ b/arch/powerpc/include/asm/ps3.h
@@ -526,4 +526,6 @@ void ps3_sync_irq(int node);
u32 ps3_get_hw_thread_id(int cpu);
u64 ps3_get_spe_id(void *arg);
+void ps3_early_mm_init(void);
+
#endif
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index d10e786..5d59f11 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -748,6 +748,13 @@ void __init early_init_devtree(void *params)
/* Now try to figure out if we are running on LPAR */
of_scan_flat_dt(pseries_probe_fw_features, NULL);
#endif
+
+#ifdef CONFIG_PPC_PS3
+ /* Identify PS3 firmware */
+ if (of_flat_dt_is_compatible(of_get_flat_dt_root(), "sony,ps3"))
+ powerpc_firmware_features |= FW_FEATURE_PS3_POSSIBLE;
+#endif
+
DBG(" <- early_init_devtree()\n");
}
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 2bea864..839e1ad 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -58,6 +58,7 @@
#include
#include
#include
+#include
#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)
@@ -854,6 +855,11 @@ static void __init htab_initialize(void)
#undef KB
#undef MB
+void __init __weak hpte_init_lpar(void)
+{
+ panic("FW_FEATURE_LPAR set but no LPAR support compiled\n");
+}
+
void __init hash__early_init_mmu(void)
{
/*
@@ -886,6 +892,14 @@ void __init hash__early_init_mmu(void)
vmemmap = (struct page *)H_VMEMMAP_BASE;
ioremap_bot = IOREMAP_BASE;
+ /* Select appropriate backend */
+ if (firmware_has_feature(FW_FEATURE_PS3_LV1))
+ ps3_early_mm_init();
+ else if (firmware_has_feature(FW_FEATURE_LPAR))
+ hpte_init_lpar();
+ else
+ hpte_init_native();
+
/* Initialize the MMU Hash table and create the linear mapping
* of memory. Has to be done before SLB initialization as this is
* currently where the page size encoding is obtained.
diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
index c939e6e..6624b7b 100644
--- a/arch/powerpc/mm/pgtable-radix.c
+++ b/arch/powerpc/mm/pgtable-radix.c
@@ -339,6 +339,7 @@ void __init radix__early_init_mmu(void)
radix_init_page_sizes();
if (!firmware_has_feature(FW_FEATURE_LPAR)) {
+ radix_init_native();
lpcr = mfspr(SPRN_LPCR);
mtspr(SPRN_LPCR, lpcr | LPCR_UPRT);
radix_init_partition_table();
diff --git a/arch/powerpc/platforms/cell/setup.c
b/arch/powerpc/platforms/cell/setup.c
index 36cff28..e342f78 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -261,7 +261,6 @@ static int __init cell_probe(void)
!of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
return 0;
- hpte_init_native();
pm_power_off = rtas_power_off;
return 1;
diff --git a/arch/powerpc/platforms/maple/setup.c
b/arch/powerpc/platforms/maple/setup.c
index 3cd625d..a56828c 100644
--- a/arch/powerpc/platforms/maple/setup.c
+++ b/arch/powerpc/platforms/maple/setup.c
@@ -304,7 +304,6 @@ static int __init maple_probe(void)
!of_flat_dt_is_compatible(root, "Momentum,Apache"))
return 0;
- hpte_init_native();
pm_power_off = maple_power_off;
return 1;
diff --git a/arch/powerpc/platforms/pasemi/setup.c
b/arch/powerpc/platforms/pasemi/setup.c
index d71b2c7..7605bc6 100644
--- a/arch/powerpc/platforms/pasemi/setup.c
+++ b/arch/powerpc/platforms/pasemi/setup.c
@@ -426,8 +426,6 @@ static int __init pas_probe(void)
!of_flat_dt_is_compatible(root, "pasemi,pwrficient"))
return 0;
- hpte_init_native();
-
alloc_iobmap_l2();
return 1;
diff --git a/arch/powerpc/platforms/powermac/setup.c
b/arch/powerpc/platforms/powermac/setup.c
index 43d02c2..5801889 100644
--- a/arch/powerpc/platforms
[PATCH 17/41] powerpc/mm/hash: Don't use machine_is() early during boot
Use the device-tree instead as we'll be moving probe_machine()
out of early_setup
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/mm/hash_utils_64.c | 25 -
1 file changed, 16 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 839e1ad..a261e44 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -34,6 +34,7 @@
#include
#include
#include
+#include
#include
#include
@@ -731,7 +732,7 @@ static void __init htab_initialize(void)
unsigned long table;
unsigned long pteg_count;
unsigned long prot;
- unsigned long base = 0, size = 0, limit;
+ unsigned long base = 0, size = 0;
struct memblock_region *reg;
DBG(" -> htab_initialize()\n");
@@ -757,7 +758,8 @@ static void __init htab_initialize(void)
htab_hash_mask = pteg_count - 1;
- if (firmware_has_feature(FW_FEATURE_LPAR)) {
+ if (firmware_has_feature(FW_FEATURE_LPAR) ||
+ firmware_has_feature(FW_FEATURE_PS3_LV1)) {
/* Using a hypervisor which owns the htab */
htab_address = NULL;
_SDR1 = 0;
@@ -772,16 +774,21 @@ static void __init htab_initialize(void)
ppc_md.hpte_clear_all();
#endif
} else {
- /* Find storage for the HPT. Must be contiguous in
-* the absolute address space. On cell we want it to be
-* in the first 2 Gig so we can use it for IOMMU hacks.
+ unsigned long limit = MEMBLOCK_ALLOC_ANYWHERE;
+
+#ifdef CONFIG_PPC_CELL
+ /* Cell may require the hash table down low when using the
+* Axon IOMMU in order to fit the dynamic region over it, see
+* comments in cell/iommu.c
*/
- if (machine_is(cell))
+ if (fdt_subnode_offset(initial_boot_params, 0, "axon") > 0) {
limit = 0x8000;
- else
- limit = MEMBLOCK_ALLOC_ANYWHERE;
+ pr_info("Hash table forced below 2G for Axon IOMMU\n");
+ }
+#endif /* CONFIG_PPC_CELL */
- table = memblock_alloc_base(htab_size_bytes, htab_size_bytes,
limit);
+ table = memblock_alloc_base(htab_size_bytes, htab_size_bytes,
+ limit);
DBG("Hash table allocated at %lx, size: %lx\n", table,
htab_size_bytes);
--
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[PATCH 18/41] powerpc/rtas: Don't test for machine type in rtas_initialize()
The test is unnecessary, the FW_FEATURE_LPAR is sufficient as there
exist no other LPAR type that has RTAS.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/rtas.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 28736ff..030a4d5 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -1174,7 +1174,7 @@ void __init rtas_initialize(void)
* the stop-self token if any
*/
#ifdef CONFIG_PPC64
- if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR)) {
+ if (firmware_has_feature(FW_FEATURE_LPAR)) {
rtas_region = min(ppc64_rma_size, RTAS_INSTANTIATE_MAX);
ibm_suspend_me_token = rtas_token("ibm,suspend-me");
}
--
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[PATCH 13/41] powerpc: Put exception configuration in a common place
The various calls to establish exception endianness and AIL are
now done from a single point using already established CPU and FW
feature bits to decide what to do.
Signed-off-by: Benjamin Herrenschmidt
---
v3: Rework a bit, move error handling in the functions themselves
and fix a few more cases of compile failures on odd configs
---
arch/powerpc/include/asm/hvcall.h | 11
arch/powerpc/include/asm/opal.h| 1 +
arch/powerpc/include/asm/setup.h | 12 +
arch/powerpc/kernel/setup_64.c | 55 ++--
arch/powerpc/kvm/book3s_pr.c | 6 +--
arch/powerpc/platforms/powernv/opal.c | 13 ++---
arch/powerpc/platforms/pseries/lpar.c | 20 +---
arch/powerpc/platforms/pseries/setup.c | 92 --
8 files changed, 107 insertions(+), 103 deletions(-)
diff --git a/arch/powerpc/include/asm/hvcall.h
b/arch/powerpc/include/asm/hvcall.h
index 0bc9c28..708edeb 100644
--- a/arch/powerpc/include/asm/hvcall.h
+++ b/arch/powerpc/include/asm/hvcall.h
@@ -431,17 +431,6 @@ static inline unsigned long cmo_get_page_size(void)
{
return CMO_PageSize;
}
-
-extern long pSeries_enable_reloc_on_exc(void);
-extern long pSeries_disable_reloc_on_exc(void);
-
-extern long pseries_big_endian_exceptions(void);
-
-#else
-
-#define pSeries_enable_reloc_on_exc() do {} while (0)
-#define pSeries_disable_reloc_on_exc() do {} while (0)
-
#endif /* CONFIG_PPC_PSERIES */
#endif /* __ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 9d86c66..6135816 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -215,6 +215,7 @@ extern int early_init_dt_scan_opal(unsigned long node,
const char *uname,
int depth, void *data);
extern int early_init_dt_scan_recoverable_ranges(unsigned long node,
const char *uname, int depth, void *data);
+extern void opal_configure_cores(void);
extern int opal_get_chars(uint32_t vtermno, char *buf, int count);
extern int opal_put_chars(uint32_t vtermno, const char *buf, int total_len);
diff --git a/arch/powerpc/include/asm/setup.h b/arch/powerpc/include/asm/setup.h
index fa0687e..1ba25c8 100644
--- a/arch/powerpc/include/asm/setup.h
+++ b/arch/powerpc/include/asm/setup.h
@@ -30,6 +30,18 @@ void initmem_init(void);
void setup_panic(void);
#define ARCH_PANIC_TIMEOUT 180
+#ifdef CONFIG_PPC_PSERIES
+extern void pseries_enable_reloc_on_exc(void);
+extern void pseries_disable_reloc_on_exc(void);
+extern void pseries_big_endian_exceptions(void);
+extern void pseries_little_endian_exceptions(void);
+#else
+static inline void pseries_enable_reloc_on_exc(void) {}
+static inline void pseries_disable_reloc_on_exc(void) {}
+static inline void pseries_big_endian_exceptions(void) {}
+static inline void pseries_little_endian_exceptions(void) {}
+#endif /* CONFIG_PPC_PSERIES */
+
#endif /* !__ASSEMBLY__ */
#endif /* _ASM_POWERPC_SETUP_H */
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index a641753..978c48c 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -69,6 +69,7 @@
#include
#include
#include
+#include
#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)
@@ -205,21 +206,47 @@ static void fixup_boot_paca(void)
get_paca()->data_offset = 0;
}
+static void configure_exceptions(void)
+{
+ /* Setup the trampolines from the lowmem exception vectors
+* to the kdump kernel when not using a relocatable kernel.
+*/
+ setup_kdump_trampoline();
+
+ /* Under a PAPR hypervisor, we need hypercalls */
+ if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
+ /* Enable AIL if possible */
+ pseries_enable_reloc_on_exc();
+
+ /*
+* Tell the hypervisor that we want our exceptions to
+* be taken in little endian mode.
+*
+* We don't call this for big endian as our calling convention
+* makes us always enter in BE, and the call may fail under
+* some circumstances with kdump.
+*/
+#ifdef __LITTLE_ENDIAN__
+ pseries_little_endian_exceptions();
+#endif
+ } else {
+ /* Set endian mode using OPAL */
+ if (firmware_has_feature(FW_FEATURE_OPAL))
+ opal_configure_cores();
+
+ /* Enable AIL if supported, and we are in hypervisor mode */
+ if (cpu_has_feature(CPU_FTR_HVMODE) &&
+ cpu_has_feature(CPU_FTR_ARCH_207S)) {
+ unsigned long lpcr = mfspr(SPRN_LPCR);
+ mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3);
+ }
+ }
+}
+
static void cpu_ready_for_interrupts(void)
{
/* Set IR and DR in PACA MSR */
get_paca()->kern
[PATCH 07/41] powerpc: Move 64-bit memory reserves to setup_arch()
There is really no need to do them that early, early_setup() runs
before MMU is on, we should do the strict minimum there to get the
MMU going.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/setup_64.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index e79cf1b..bcc95ac 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -296,16 +296,6 @@ void __init early_setup(unsigned long dt_ptr)
*/
cpu_ready_for_interrupts();
- /* Reserve large chunks of memory for use by CMA for KVM */
- kvm_cma_reserve();
-
- /*
-* Reserve any gigantic pages requested on the command line.
-* memblock needs to have been initialized by the time this is
-* called since this will reserve memory.
-*/
- reserve_hugetlb_gpages();
-
DBG(" <- early_setup()\n");
#ifdef CONFIG_PPC_EARLY_DEBUG_BOOTX
@@ -688,6 +678,17 @@ void __init setup_arch(char **cmdline_p)
dcache_bsize = ppc64_caches.dline_size;
icache_bsize = ppc64_caches.iline_size;
+
+ /* Reserve large chunks of memory for use by CMA for KVM */
+ kvm_cma_reserve();
+
+ /*
+* Reserve any gigantic pages requested on the command line.
+* memblock needs to have been initialized by the time this is
+* called since this will reserve memory.
+*/
+ reserve_hugetlb_gpages();
+
if (ppc_md.panic)
setup_panic();
@@ -712,7 +713,6 @@ void __init setup_arch(char **cmdline_p)
#ifdef CONFIG_DUMMY_CONSOLE
conswitchp = &dummy_con;
#endif
-
if (ppc_md.setup_arch)
ppc_md.setup_arch();
--
2.7.4
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[PATCH 09/41] powerpc: Update obsolete comments in setup_32.c about entry conditions
early_init() is called in-place before kernel relocation and using whatever MMU setup exists at the point the kernel is entered. machine_init() is called after relocation and after some initial mapping of PAGE_OFFSET has been established (typically using BATs on 6xx/7xx/7xxx processors or some form of bolted TLB on others). Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/kernel/setup_32.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c index 34e61d68..3f0aca2 100644 --- a/arch/powerpc/kernel/setup_32.c +++ b/arch/powerpc/kernel/setup_32.c @@ -61,9 +61,7 @@ int icache_bsize; int ucache_bsize; /* - * We're called here very early in the boot. We determine the machine - * type and call the appropriate low-level setup functions. - * -- Cort + * We're called here very early in the boot. * * Note that the kernel may be running at an address which is different * from the address that it was linked at, so we must use RELOC/PTRRELOC @@ -91,6 +89,10 @@ notrace unsigned long __init early_init(unsigned long dt_ptr) /* + * This is run before start_kernel(), the kernel has been relocated + * and we are running with enough of the MMU enabled to have our + * proper kernel virtual addresses + * * Find out what kind of machine we're on and save any data we need * from the early boot process (devtree is copied on pmac by prom_init()). * This is called very early on the boot process, after a minimal -- 2.7.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 08/41] powerpc: Move epapr_paravirt_early_init() to early_init_devtree()
The function is called by both 32-bit and 64-bit early setup right
after early_init_devtree(). All it does is run yet another early
DT parser which is precisely what early_init_devtree() is about,
so move it in there.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/prom.c | 2 ++
arch/powerpc/kernel/setup_32.c | 3 ---
arch/powerpc/kernel/setup_64.c | 3 ---
3 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 946e34f..48434be 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -56,6 +56,7 @@
#include
#include
#include
+#include
#include
@@ -739,6 +740,7 @@ void __init early_init_devtree(void *params)
/* Scan and build the list of machine check recoverable ranges */
of_scan_flat_dt(early_init_dt_scan_recoverable_ranges, NULL);
#endif
+ epapr_paravirt_early_init();
DBG(" <- early_init_devtree()\n");
}
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 3d06fab..34e61d68 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -37,7 +37,6 @@
#include
#include
#include
-#include
#include
#define DBG(fmt...)
@@ -110,8 +109,6 @@ notrace void __init machine_init(u64 dt_ptr)
/* Do some early initialization based on the flat device tree */
early_init_devtree(__va(dt_ptr));
- epapr_paravirt_early_init();
-
early_init_mmu();
probe_machine();
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index bcc95ac..e1b2e6f 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -68,7 +68,6 @@
#include
#include
#include
-#include
#include
#ifdef DEBUG
@@ -270,8 +269,6 @@ void __init early_setup(unsigned long dt_ptr)
*/
early_init_devtree(__va(dt_ptr));
- epapr_paravirt_early_init();
-
/* Now we know the logical id of our boot cpu, setup the paca. */
setup_paca(&paca[boot_cpuid]);
fixup_boot_paca();
--
2.7.4
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[PATCH 03/41] powerpc/prom_init: PTRRELOC is not needed
There's one line of code still using PTRRELOC in prom_init, it shouldn't be necessary since that code is relocatable. Take it out. Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/kernel/prom_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c index 6ee4b72..54e450c 100644 --- a/arch/powerpc/kernel/prom_init.c +++ b/arch/powerpc/kernel/prom_init.c @@ -1980,7 +1980,7 @@ static void __init prom_check_displays(void) break; #ifdef CONFIG_LOGO_LINUX_CLUT224 - clut = PTRRELOC(logo_linux_clut224.clut); + clut = logo_linux_clut224.clut; for (i = 0; i < logo_linux_clut224.clutsize; i++, clut += 3) if (prom_set_color(ih, i + 32, clut[0], clut[1], clut[2]) != 0) -- 2.7.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 06/41] powerpc: Move 64-bit feature fixup earlier
Make it part of early_setup() as we really want the feature fixups
to be applied before we turn on the MMU since they can have an impact
on the various assembly path related to MMU management and interrupts.
This makes 64-bit match what 32-bit does.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/setup_64.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 996bed2..e79cf1b 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -286,6 +286,9 @@ void __init early_setup(unsigned long dt_ptr)
/* Initialize the hash table or TLB handling */
early_init_mmu();
+ /* Apply all the dynamic patching */
+ apply_feature_fixups();
+
/*
* At this point, we can let interrupts switch to virtual mode
* (the MMU has been setup), so adjust the MSR in the PACA to
@@ -468,8 +471,6 @@ void __init setup_system(void)
{
DBG(" -> setup_system()\n");
- apply_feature_fixups();
-
/*
* Unflatten the device-tree passed by prom_init or kexec
*/
--
2.7.4
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[PATCH 05/41] powerpc: Factor do_feature_fixup calls
32 and 64-bit do a similar set of calls early on, we move it all to
a single common function to make the boot code more readable.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/include/asm/feature-fixups.h | 4
arch/powerpc/include/asm/synch.h | 1 -
arch/powerpc/kernel/setup_32.c| 17 ++---
arch/powerpc/kernel/setup_64.c| 13 +
arch/powerpc/lib/feature-fixups.c | 31 +--
5 files changed, 36 insertions(+), 30 deletions(-)
diff --git a/arch/powerpc/include/asm/feature-fixups.h
b/arch/powerpc/include/asm/feature-fixups.h
index 9a67a38..57fec8a 100644
--- a/arch/powerpc/include/asm/feature-fixups.h
+++ b/arch/powerpc/include/asm/feature-fixups.h
@@ -184,4 +184,8 @@ label##3: \
FTR_ENTRY_OFFSET label##1b-label##3b; \
.popsection;
+#ifndef __ASSEMBLY__
+void apply_feature_fixups(void);
+#endif
+
#endif /* __ASM_POWERPC_FEATURE_FIXUPS_H */
diff --git a/arch/powerpc/include/asm/synch.h b/arch/powerpc/include/asm/synch.h
index c508686..78efe8d 100644
--- a/arch/powerpc/include/asm/synch.h
+++ b/arch/powerpc/include/asm/synch.h
@@ -13,7 +13,6 @@
extern unsigned int __start___lwsync_fixup, __stop___lwsync_fixup;
extern void do_lwsync_fixups(unsigned long value, void *fixup_start,
void *fixup_end);
-extern void do_final_fixups(void);
static inline void eieio(void)
{
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index d544fa3..3d06fab 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -73,7 +73,6 @@ int ucache_bsize;
notrace unsigned long __init early_init(unsigned long dt_ptr)
{
unsigned long offset = reloc_offset();
- struct cpu_spec *spec;
/* First zero the BSS -- use memset_io, some platforms don't have
* caches on yet */
@@ -84,21 +83,9 @@ notrace unsigned long __init early_init(unsigned long dt_ptr)
* Identify the CPU type and fix up code sections
* that depend on which cpu we have.
*/
- spec = identify_cpu(offset, mfspr(SPRN_PVR));
+ identify_cpu(offset, mfspr(SPRN_PVR));
- do_feature_fixups(spec->cpu_features,
- PTRRELOC(&__start___ftr_fixup),
- PTRRELOC(&__stop___ftr_fixup));
-
- do_feature_fixups(spec->mmu_features,
- PTRRELOC(&__start___mmu_ftr_fixup),
- PTRRELOC(&__stop___mmu_ftr_fixup));
-
- do_lwsync_fixups(spec->cpu_features,
-PTRRELOC(&__start___lwsync_fixup),
-PTRRELOC(&__stop___lwsync_fixup));
-
- do_final_fixups();
+ apply_feature_fixups();
return KERNELBASE + offset;
}
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 96d4a2b..996bed2 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -468,18 +468,7 @@ void __init setup_system(void)
{
DBG(" -> setup_system()\n");
- /* Apply the CPUs-specific and firmware specific fixups to kernel
-* text (nop out sections not relevant to this CPU or this firmware)
-*/
- do_feature_fixups(cur_cpu_spec->cpu_features,
- &__start___ftr_fixup, &__stop___ftr_fixup);
- do_feature_fixups(cur_cpu_spec->mmu_features,
- &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup);
- do_feature_fixups(powerpc_firmware_features,
- &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
- do_lwsync_fixups(cur_cpu_spec->cpu_features,
-&__start___lwsync_fixup, &__stop___lwsync_fixup);
- do_final_fixups();
+ apply_feature_fixups();
/*
* Unflatten the device-tree passed by prom_init or kexec
diff --git a/arch/powerpc/lib/feature-fixups.c
b/arch/powerpc/lib/feature-fixups.c
index 7ce3870..d0c72aa 100644
--- a/arch/powerpc/lib/feature-fixups.c
+++ b/arch/powerpc/lib/feature-fixups.c
@@ -20,7 +20,8 @@
#include
#include
#include
-
+#include
+#include
struct fixup_entry {
unsigned long mask;
@@ -130,7 +131,7 @@ void do_lwsync_fixups(unsigned long value, void
*fixup_start, void *fixup_end)
}
}
-void do_final_fixups(void)
+static void do_final_fixups(void)
{
#if defined(CONFIG_PPC64) && defined(CONFIG_RELOCATABLE)
int *src, *dest;
@@ -151,6 +152,32 @@ void do_final_fixups(void)
#endif
}
+void apply_feature_fixups(void)
+{
+ struct cpu_spec *spec = *PTRRELOC(&cur_cpu_spec);
+
+ /* Apply the CPUs-specific and firmware specific fixups to kernel
+* text (nop out sections not relevant to this CPU or this firmware)
+*/
+ do_feature_fixups(spec->
[PATCH 04/41] powerpc: Make PTRRELOC() 32-bit only
PTRRELOC is only used by 32-bit code since on 32-bit systems, early_init can be run with relocation off and running at an offset. Define it to identity on 64-bit Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/include/asm/setup.h | 4 1 file changed, 4 insertions(+) diff --git a/arch/powerpc/include/asm/setup.h b/arch/powerpc/include/asm/setup.h index e9d384c..fa0687e 100644 --- a/arch/powerpc/include/asm/setup.h +++ b/arch/powerpc/include/asm/setup.h @@ -19,7 +19,11 @@ extern unsigned long reloc_offset(void); extern unsigned long add_reloc_offset(unsigned long); extern void reloc_got2(unsigned long); +#ifdef CONFIG_PPC32 #define PTRRELOC(x)((typeof(x)) add_reloc_offset((unsigned long)(x))) +#else +#define PTRRELOC(x)(x) +#endif void check_for_initrd(void); void initmem_init(void); -- 2.7.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 01/41] dt: Add of_device_compatible_match()
This provides an equivalent of of_fdt_match() for non-flat trees.
This is more practical than matching an array of of_device_id structs
when converting a bunch of existing users of of_fdt_match().
Signed-off-by: Benjamin Herrenschmidt
---
drivers/of/base.c | 22 ++
include/linux/of.h | 2 ++
2 files changed, 24 insertions(+)
diff --git a/drivers/of/base.c b/drivers/of/base.c
index ebf84e3..429c594 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -493,6 +493,28 @@ int of_device_is_compatible(const struct device_node
*device,
}
EXPORT_SYMBOL(of_device_is_compatible);
+/** Checks if the device is compatible with any of the entries in
+ * a NULL terminated array of strings. Returns the best match
+ * score or 0.
+ */
+int of_device_compatible_match(struct device_node *device,
+ const char *const *compat)
+{
+ unsigned int tmp, score = 0;
+
+ if (!compat)
+ return 0;
+
+ while (*compat) {
+ tmp = of_device_is_compatible(device, *compat);
+ if (tmp && (score == 0 || (tmp < score)))
+ score = tmp;
+ compat++;
+ }
+
+ return score;
+}
+
/**
* of_machine_is_compatible - Test root of device tree for a given compatible
value
* @compat: compatible string to look for in root node's compatible property.
diff --git a/include/linux/of.h b/include/linux/of.h
index 74eb28c..33c184d 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -324,6 +324,8 @@ extern int of_property_read_string_helper(const struct
device_node *np,
const char **out_strs, size_t sz,
int index);
extern int of_device_is_compatible(const struct device_node *device,
const char *);
+extern int of_device_compatible_match(struct device_node *device,
+ const char *const *compat);
extern bool of_device_is_available(const struct device_node *device);
extern bool of_device_is_big_endian(const struct device_node *device);
extern const void *of_get_property(const struct device_node *node,
--
2.7.4
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[PATCH 02/41] drm: Fix broken use of _PAGE_NO_CACHE on powerpc
That constant no longer exist. Use the proper accessor instead
Signed-off-by: Benjamin Herrenschmidt
---
drivers/gpu/drm/drm_memory.c | 2 +-
drivers/gpu/drm/drm_scatter.c | 2 +-
drivers/gpu/drm/drm_vm.c | 4 ++--
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_memory.c b/drivers/gpu/drm/drm_memory.c
index 87a8cb7..fc0ebd2 100644
--- a/drivers/gpu/drm/drm_memory.c
+++ b/drivers/gpu/drm/drm_memory.c
@@ -44,7 +44,7 @@
# include
#else
# ifdef __powerpc__
-# define PAGE_AGP __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE)
+# define PAGE_AGP pgprot_noncached_wc(PAGE_KERNEL)
# else
# define PAGE_AGP PAGE_KERNEL
# endif
diff --git a/drivers/gpu/drm/drm_scatter.c b/drivers/gpu/drm/drm_scatter.c
index 4f0f3b3..bf70431 100644
--- a/drivers/gpu/drm/drm_scatter.c
+++ b/drivers/gpu/drm/drm_scatter.c
@@ -41,7 +41,7 @@
static inline void *drm_vmalloc_dma(unsigned long size)
{
#if defined(__powerpc__) && defined(CONFIG_NOT_COHERENT_CACHE)
- return __vmalloc(size, GFP_KERNEL, PAGE_KERNEL | _PAGE_NO_CACHE);
+ return __vmalloc(size, GFP_KERNEL, pgprot_noncached_wc(PAGE_KERNEL));
#else
return vmalloc_32(size);
#endif
diff --git a/drivers/gpu/drm/drm_vm.c b/drivers/gpu/drm/drm_vm.c
index ac9f4b3..7e9f642 100644
--- a/drivers/gpu/drm/drm_vm.c
+++ b/drivers/gpu/drm/drm_vm.c
@@ -80,7 +80,7 @@ static pgprot_t drm_dma_prot(uint32_t map_type, struct
vm_area_struct *vma)
pgprot_t tmp = vm_get_page_prot(vma->vm_flags);
#if defined(__powerpc__) && defined(CONFIG_NOT_COHERENT_CACHE)
- tmp |= _PAGE_NO_CACHE;
+ tmp = pgprot_noncached_wc(tmp);
#endif
return tmp;
}
@@ -593,7 +593,7 @@ static int drm_mmap_locked(struct file *filp, struct
vm_area_struct *vma)
* pages and mappings in fault()
*/
#if defined(__powerpc__)
- pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE;
+ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
#endif
vma->vm_ops = &drm_vm_ops;
break;
--
2.7.4
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[PATCH v2 00/41] Reorganize setup code and merge 32 and 64-bit setup_arch()
This series reorganizes the setup code, moving probe_machine() later than when it's currently done, and sync'ing 32-bit and 64-bit enough to merge their implementations of setup_arch(). We get rid of ppc64 setup_system() which is subsumed by the new setup_arch(). Note: The first 2 patches could go separately. The first one is a pre requisite for the ppc32 move of probe_machine(). The second one a general bug fix for recent kernels which I included here so my test kernels could build but the rest of the series doesn't depend on it. Finally I added a few more random build fixes at the end. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc: fix oops in pcibios_release_device() after pcibios_free_controller()
On Mon, 2016-07-04 at 22:44 -0300, Mauricio Faria de Oliveira wrote: > It's possible to hit an oops/crash if pcibios_release_device() accesses the > phb struct and it had been freed earlier -- by pcibios_free_controller() -- > as the memory it pointed to can be reused. > > If after reuse 'phb->controller_ops.release_device' is non-NULL it will be > called, but it points to an invalid location (that function pointer is not > set anywhere in the code, so if it's non-NULL, that's not correct), and so > it hits an oops and the system crashes. > > The solution is to verify whether 'phb' is still in 'hose_list' before any > access to it in pcibios_release_device() -- as it is removed from the list > by pcibios_free_controller() -- and ensure it cannot be used after kfree(). > > That problem can happen with the pSeries platform's DLPAR remove operation > if references to devices are held until after the pcibios_free_controller() > function runs, and then released - exercising pcibios_release_device() path. Have you considered instead adding a kref to the PHB and only freeing it when all devices have been freed ? Or it's too hard to tract device creation ? Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH][v2] driver/memory: Update dependency of IFC for Layerscape
On Mon, 2016-07-04 at 11:29 +0200, Boris Brezillon wrote: > +PPC maintainers. + Scott for FSL stuff > Hi Raghav, > > Since you're touching powerpc drivers, the least you could do is add > ppc maintainers in Cc, so that they can ack/review your patch... > > On Fri, 1 Jul 2016 21:32:30 +0530 > Raghav Dogra wrote: > > > This patch enables IFC NAND support on ARM layerscape platform. > > It fixes the dependency to enable NAND. The include files are being > > modified > > to ensure complilation for both PowerPC and ARM architectures. > > Still think this could be separated in 2 commits: > - the first one getting rid of the asm/prom.h inclusion > - the second one changing the Kconfig dependency > > > > > Signed-off-by: Raghav Dogra > > --- > > Applicable to git://git.infradead.org/l2-mtd.git > > > > Changes for v2: updated commit description > > > > drivers/memory/Kconfig | 2 +- > > drivers/memory/fsl_ifc.c | 4 +++- > > drivers/mtd/nand/Kconfig | 2 +- > > 3 files changed, 5 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig > > index 81ddb17..5645705 100644 > > --- a/drivers/memory/Kconfig > > +++ b/drivers/memory/Kconfig > > @@ -104,7 +104,7 @@ config FSL_CORENET_CF > > > > config FSL_IFC > > bool > > - depends on FSL_SOC > > + depends on FSL_SOC || ARCH_LAYERSCAPE > > > > config JZ4780_NEMC > > bool "Ingenic JZ4780 SoC NEMC driver" > > diff --git a/drivers/memory/fsl_ifc.c b/drivers/memory/fsl_ifc.c > > index 904b4af..1b182b1 100644 > > --- a/drivers/memory/fsl_ifc.c > > +++ b/drivers/memory/fsl_ifc.c > > @@ -31,7 +31,9 @@ > > #include > > #include > > #include > > -#include > > +#include > > +#include > > +#include > > > > struct fsl_ifc_ctrl *fsl_ifc_ctrl_dev; > > EXPORT_SYMBOL(fsl_ifc_ctrl_dev); > > diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig > > index f05e0e9..eace3ef 100644 > > --- a/drivers/mtd/nand/Kconfig > > +++ b/drivers/mtd/nand/Kconfig > > @@ -438,7 +438,7 @@ config MTD_NAND_FSL_ELBC > > > > config MTD_NAND_FSL_IFC > > tristate "NAND support for Freescale IFC controller" > > - depends on MTD_NAND && FSL_SOC > > + depends on MTD_NAND && (FSL_SOC || ARCH_LAYERSCAPE) > > select FSL_IFC > > select MEMORY > > help ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: powerpc/opal: Wake up kopald polling thread before waiting for events
On Mon, 2016-07-04 at 16:11 +1000, Michael Ellerman wrote: > On Mon, 2016-04-07 at 04:51:44 UTC, Benjamin Herrenschmidt wrote: > > On some environments (prototype machines, some simulators, etc...) > > there is no functional interrupt source to signal completion, so > > we rely on the fairly slow OPAL heartbeat. > > > > In a number of cases, the calls complete very quickly or even > > immediately. We've observed that it helps a lot to wakeup the OPAL > > heartbeat thread before waiting for event in those cases, it will > > call OPAL immediately to collect completions for anything that > > finished fast enough. > > Any performance/jitter impact on normal systems? Not that I can think of. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] powerpc/opal: Wake up kopald polling thread before waiting for events
On some environments (prototype machines, some simulators, etc...)
there is no functional interrupt source to signal completion, so
we rely on the fairly slow OPAL heartbeat.
In a number of cases, the calls complete very quickly or even
immediately. We've observed that it helps a lot to wakeup the OPAL
heartbeat thread before waiting for event in those cases, it will
call OPAL immediately to collect completions for anything that
finished fast enough.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/include/asm/opal.h | 2 ++
arch/powerpc/platforms/powernv/opal-async.c | 5 +
arch/powerpc/platforms/powernv/opal.c | 12 ++--
3 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 6135816..0c76bc0 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -277,6 +277,8 @@ extern int opal_error_code(int rc);
ssize_t opal_msglog_copy(char *to, loff_t pos, size_t count);
+void opal_wake_poller(void);
+
#endif /* __ASSEMBLY__ */
#endif /* _ASM_POWERPC_OPAL_H */
diff --git a/arch/powerpc/platforms/powernv/opal-async.c
b/arch/powerpc/platforms/powernv/opal-async.c
index bdc8c0c..83bebee 100644
--- a/arch/powerpc/platforms/powernv/opal-async.c
+++ b/arch/powerpc/platforms/powernv/opal-async.c
@@ -117,6 +117,11 @@ int opal_async_wait_response(uint64_t token, struct
opal_msg *msg)
return -EINVAL;
}
+ /* Wakeup the poller before we wait for events to speed things
+* up on platforms or simulators where the interrupts aren't
+* functional.
+*/
+ opal_wake_poller();
wait_event(opal_async_wait, test_bit(token, opal_async_complete_map));
memcpy(msg, &opal_async_responses[token], sizeof(*msg));
diff --git a/arch/powerpc/platforms/powernv/opal.c
b/arch/powerpc/platforms/powernv/opal.c
index 802f3b7..7f13302 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -55,6 +55,7 @@ struct device_node *opal_node;
static DEFINE_SPINLOCK(opal_write_lock);
static struct atomic_notifier_head opal_msg_notifier_head[OPAL_MSG_TYPE_MAX];
static uint32_t opal_heartbeat;
+static struct task_struct *kopald_tsk;
void opal_configure_cores(void)
{
@@ -650,6 +651,7 @@ static void opal_i2c_create_devs(void)
static int kopald(void *unused)
{
+ unsigned long timeout = msecs_to_jiffies(opal_heartbeat) + 1;
__be64 events;
set_freezable();
@@ -657,12 +659,18 @@ static int kopald(void *unused)
try_to_freeze();
opal_poll_events(&events);
opal_handle_events(be64_to_cpu(events));
- msleep_interruptible(opal_heartbeat);
+ schedule_timeout_interruptible(timeout);
} while (!kthread_should_stop());
return 0;
}
+void opal_wake_poller(void)
+{
+ if (kopald_tsk)
+ wake_up_process(kopald_tsk);
+}
+
static void opal_init_heartbeat(void)
{
/* Old firwmware, we assume the HVC heartbeat is sufficient */
@@ -671,7 +679,7 @@ static void opal_init_heartbeat(void)
opal_heartbeat = 0;
if (opal_heartbeat)
- kthread_run(kopald, NULL, "kopald");
+ kopald_tsk = kthread_run(kopald, NULL, "kopald");
}
static int __init opal_init(void)
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[PATCH v2 13/38] powerpc: Put exception configuration in a common place
The various calls to establish exception endianness and AIL are
now done from a single point using already established CPU and FW
feature bits to decide what to do.
Signed-off-by: Benjamin Herrenschmidt
---
v2: Add/fix prototypes of exported function, remove "static"
arch/powerpc/include/asm/hvcall.h | 8 ++--
arch/powerpc/include/asm/opal.h| 1 +
arch/powerpc/kernel/setup_64.c | 68 +++---
arch/powerpc/platforms/powernv/opal.c | 13 +++
arch/powerpc/platforms/pseries/setup.c | 31 +---
5 files changed, 66 insertions(+), 55 deletions(-)
diff --git a/arch/powerpc/include/asm/hvcall.h
b/arch/powerpc/include/asm/hvcall.h
index 0bc9c28..b88efbb 100644
--- a/arch/powerpc/include/asm/hvcall.h
+++ b/arch/powerpc/include/asm/hvcall.h
@@ -434,13 +434,15 @@ static inline unsigned long cmo_get_page_size(void)
extern long pSeries_enable_reloc_on_exc(void);
extern long pSeries_disable_reloc_on_exc(void);
-
extern long pseries_big_endian_exceptions(void);
+extern long pseries_little_endian_exceptions(void);
#else
-#define pSeries_enable_reloc_on_exc() do {} while (0)
-#define pSeries_disable_reloc_on_exc() do {} while (0)
+#define pSeries_enable_reloc_on_exc() (0)
+#define pSeries_disable_reloc_on_exc() (0)
+#define pseries_big_endian_exceptions()(0)
+#define pseries_little_endian_exceptions() (0)
#endif /* CONFIG_PPC_PSERIES */
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 9d86c66..6135816 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -215,6 +215,7 @@ extern int early_init_dt_scan_opal(unsigned long node,
const char *uname,
int depth, void *data);
extern int early_init_dt_scan_recoverable_ranges(unsigned long node,
const char *uname, int depth, void *data);
+extern void opal_configure_cores(void);
extern int opal_get_chars(uint32_t vtermno, char *buf, int count);
extern int opal_put_chars(uint32_t vtermno, const char *buf, int total_len);
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index a641753..47a2706 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -69,6 +69,7 @@
#include
#include
#include
+#include
#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)
@@ -205,21 +206,60 @@ static void fixup_boot_paca(void)
get_paca()->data_offset = 0;
}
+static void configure_exceptions(void)
+{
+ /* Setup the trampolines from the lowmem exception vectors
+* to the kdump kernel when not using a relocatable kernel.
+*/
+ setup_kdump_trampoline();
+
+ /* Under a PAPR hypervisor, we need hypercalls */
+ if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
+ long rc;
+
+ /* Enable AIL */
+ rc = pSeries_enable_reloc_on_exc();
+ if (rc == H_P2) {
+ pr_info("Relocation on exceptions not supported\n");
+ } else if (rc != H_SUCCESS) {
+ pr_warn("Unable to enable relocation on exceptions: "
+ "%ld\n", rc);
+ }
+
+ /*
+* Tell the hypervisor that we want our exceptions to
+* be taken in little endian mode. If this fails we don't
+* want to use BUG() because it will trigger an exception.
+*
+* We don't call this for big endian as our calling convention
+* makes us always enter in BE, and the call may fail under
+* some circumstances with kdump.
+*/
+#ifdef __LITTLE_ENDIAN__
+ rc = pseries_little_endian_exceptions();
+ if (rc) {
+ ppc_md.progress("H_SET_MODE LE exception fail", 0);
+ panic("Could not enable little endian exceptions");
+ }
+#endif
+ } else {
+ /* Set endian mode using OPAL */
+ if (firmware_has_feature(FW_FEATURE_OPAL))
+ opal_configure_cores();
+
+ /* Enable AIL if supported, and we are in hypervisor mode */
+ if (cpu_has_feature(CPU_FTR_HVMODE) &&
+ cpu_has_feature(CPU_FTR_ARCH_207S)) {
+ unsigned long lpcr = mfspr(SPRN_LPCR);
+ mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3);
+ }
+ }
+}
+
static void cpu_ready_for_interrupts(void)
{
/* Set IR and DR in PACA MSR */
get_paca()->kernel_msr = MSR_KERNEL;
-
- /*
-* Enable AIL if supported, and we are in hypervisor mode. If we are
-* not in hypervisor mode, we enable relocation-on interrupts later
-* in pSeries_setup_arch(
Re: [PATCH 29/38] powerpc: Move 32-bit probe() machine to later in the boot process
On Tue, 2016-06-28 at 15:25 +0200, Gerhard Pircher wrote: > > No we could just add something to early_init_devtree that does clear > > that bit if it sees the relevant piece of broken HW, it's not the AmigaOne > > per-se, it's the northbridge right ? > Does that work for CPU_FTR_NEED_COHERENT, given that the feature fixups > are done right after identify_cpu() and instructions within BEGIN_FTR_SECTION > and END_FTR_SECTION* are patched out (if I understand this mechanism > correctly) !? Right that's a problem. We do the fixup before early_init_devtree() on ppc32 (we don't on ppc64) ... ugh. I'll have to think about it. We can try to make them match by moving the fixup but that means making sure that the transition to the "initial" MMU mapping use for machine_init() can be done without the fixups being applied. I can have a quick sweep of the init code later today or tomorrow to see how bad that would be. Otherwise, compile option... > But yes, the specific northbridge is the problem here. > > > We could also make non-coherent cache a runtime option if we really > > wanted, it's just more churn ... > Yeah, I remember a discussion or two about this topic and I always wondered > how driver code would differentiate then between non-coherent and coherent > DMA, given that they sometimes require different handling of the DMA addresses > (e.g. if I look at /sound/core/pcm_native.c or the DRM code). > > > > > Do we know where the lockups come from btw ? A problem with the > > > > northbridge ? > > > Yes, it's a problem with the northbridge...as usual. :-( > > > > Marvell ? > No, the one with the dreaded "A" name: MAI Logic's "Articia S" :-) Heh ok. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 29/38] powerpc: Move 32-bit probe() machine to later in the boot process
On Tue, 2016-06-28 at 13:42 +0200, Gerhard Pircher wrote: > The question is, if a compile time option that simply clear ?s > CPU_FTR_NEED_COHERENT after identify_cpu() would be acceptable. And > then I still wonder why KVM needs its own similar fix to work on the > AmigaOne. I specifically had to remove/clear the PTE_M bit > inarch/powerpc/kvm/book3s_32_mmu_host.c for th No we could just add something to early_init_devtree that does clear that bit if it sees the relevant piece of broken HW, it's not the AmigaOne per-se, it's the northbridge right ? We could also make non-coherent cache a runtime option if we really wanted, it's just more churn ... > 206 pteg0 = ((eaddr & 0x0fff) >> 22) | (vsid << 7) | > PTE_V | > 207 (primary ? 0 : PTE_SEC); > 208 pteg1 = hpaddr | PTE_M | PTE_R | PTE_C; > ^ > > > Do we know where the lockups come from btw ? A problem with the > > northbridge ? > Yes, it's a problem with the northbridge...as usual. :-( Marvell ? Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 06/38] powerpc: Move 64-bit feature fixup earlier
On Tue, 2016-06-28 at 17:19 +0530, Aneesh Kumar K.V wrote: > If we can do feature fixup early. Then this patch series become > simpler. > > https://lkml.kernel.org/r/1465887288-12952-1-git-send-email-aneesh.ku > m...@linux.vnet.ibm.com > > ie, we can now start using cpu_has_feature/mmu_has_feature early > instead of using __cpu/mmu_has_feature. Ok, I'll look into it tomorrow. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 07/17] powerpc/opal: Add real mode call wrappers
On Tue, 2016-06-28 at 21:37 +1000, Michael Ellerman wrote: > Yeah Ben already told me. > > I don't know which will go in first yet, this has had zero revisions and zero > reviews so it might not go in straight away ;) The point was that patch could go in independently of the rest but I really don't care either way. > I'm happy to fix up whatever merge conflicts and/or get people to rebase, it's > no problem. Yup and rebasing my patch on top of Shreyas is not a big deal wither, I did it at least twice in internal trees already ;-) Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 06/38] powerpc: Move 64-bit feature fixup earlier
On Tue, 2016-06-28 at 16:35 +0530, Aneesh Kumar K.V wrote: > Why not move it immediately after we finish all the device tress > scan. Do you need it in early_init_mmu ? The important thing is to have it done before we *turn on* the MMU but yeah, there's no big deal moving it even further up I think.. > ie, > early_init_devtree(__va(dt_ptr)); > > epapr_paravirt_early_init(); > > + apply_feature_fixups(); > /* Now we know the logical id of our boot cpu, setup the > paca. */ > setup_paca(&paca[boot_cpuid]); > fixup_boot_paca(); > > Also with a comment explaining why we can't move it further up ? Yup, adding some comments about the why things are done in that order would be good, I'll improve that Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: arch/powerpc/xmon/dis-asm.h: 2 * wrong specifiers ?
On Tue, 2016-06-28 at 08:06 +0100, David Binderman wrote: > > I don't know the code, but given that insn is unsigned long and so > can go > past 32 bits, using a cast to unsigned int might throw away the > possibly important > upper bits. our instructions are only ever 32-bits. That xmon code is ancient and originated from 32-bits stuff. In fact some of Paulus earliest xmons might even have run on platforms where int is 16 bits :-) Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
