from:"Wolfgang Grandegger"

This patch enables or updates support for the CC770 and AN82527
CAN controller on the TQM8548 and TQM8xx boards.

CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Wolfgang Grandegger w...@grandegger.com
---
 arch/powerpc/boot/dts/tqm8548-bigflash.dts |   19 ++-
 arch/powerpc/boot/dts/tqm8548.dts  |   19 ++-
 arch/powerpc/boot/dts/tqm8xx.dts   |   25 +
 3 files changed, 53 insertions(+), 10 deletions(-)

diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts 
b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 9452c3c..d918752 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -352,7 +352,7 @@
ranges = 
0 0x0 0xfc00 0x0400 // NOR FLASH bank 1
1 0x0 0xf800 0x0800 // NOR FLASH bank 0
-   2 0x0 0xa300 0x8000 // CAN (2 x i82527)
+   2 0x0 0xa300 0x8000 // CAN (2 x CC770)
3 0x0 0xa301 0x8000 // NAND FLASH
 
;
@@ -393,18 +393,27 @@
};
 
/* Note: CAN support needs be enabled in U-Boot */
-   can0@2,0 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,0 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x0 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
+   bosch,clock-out-frequency = 1600;
};
 
-   can1@2,100 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,100 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x100 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
};
 
/* Note: NAND support needs to be enabled in U-Boot */
diff --git a/arch/powerpc/boot/dts/tqm8548.dts 
b/arch/powerpc/boot/dts/tqm8548.dts
index 619776f..988d887 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -352,7 +352,7 @@
ranges = 
0 0x0 0xfc00 0x0400 // NOR FLASH bank 1
1 0x0 0xf800 0x0800 // NOR FLASH bank 0
-   2 0x0 0xe300 0x8000 // CAN (2 x i82527)
+   2 0x0 0xe300 0x8000 // CAN (2 x CC770)
3 0x0 0xe301 0x8000 // NAND FLASH
 
;
@@ -393,18 +393,27 @@
};
 
/* Note: CAN support needs be enabled in U-Boot */
-   can0@2,0 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,0 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x0 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
+   bosch,clock-out-frequency = 1600;
};
 
-   can1@2,100 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,100 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x100 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
};
 
/* Note: NAND support needs to be enabled in U-Boot */
diff --git a/arch/powerpc/boot/dts/tqm8xx.dts b/arch/powerpc/boot/dts/tqm8xx.dts
index f6da7ec..c3dba25 100644
--- a/arch/powerpc/boot/dts/tqm8xx.dts
+++ b/arch/powerpc/boot/dts/tqm8xx.dts
@@ -57,6 +57,7 @@
 
ranges = 
0x0 0x0 0x4000 0x80
+   0x3 0x0 0xc000 0x200
;
 
flash@0,0 {
@@ -67,6 +68,30

[PATCH net-next v5 3/4] can: cc770: add platform bus driver for the CC770 and AN82527

This driver works with both, static platform data and device tree
bindings. It has been tested on a TQM855L board with two AN82527
CAN controllers on the local bus.

CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Wolfgang Grandegger w...@grandegger.com
Acked-by: Marc Kleine-Budde m...@pengutronix.de
---
 .../devicetree/bindings/net/can/cc770.txt  |   56 
 drivers/net/can/cc770/Kconfig  |7 +
 drivers/net/can/cc770/Makefile |1 +
 drivers/net/can/cc770/cc770_platform.c |  273 
 4 files changed, 337 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/can/cc770.txt
 create mode 100644 drivers/net/can/cc770/cc770_platform.c

diff --git a/Documentation/devicetree/bindings/net/can/cc770.txt 
b/Documentation/devicetree/bindings/net/can/cc770.txt
new file mode 100644
index 000..01e282d
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/can/cc770.txt
@@ -0,0 +1,56 @@
+Memory mapped Bosch CC770 and Intel AN82527 CAN controller
+
+Note: The CC770 is a CAN controller from Bosch, which is 100%
+compatible with the old AN82527 from Intel, but with bugs being fixed.
+
+Required properties:
+
+- compatible : should be bosch,cc770 for the CC770 and intc,82527
+   for the AN82527.
+
+- reg : should specify the chip select, address offset and size required
+   to map the registers of the controller. The size is usually 0x80.
+
+- interrupts : property with a value describing the interrupt source
+   (number and sensitivity) required for the controller.
+
+Optional properties:
+
+- bosch,external-clock-frequency : frequency of the external oscillator
+   clock in Hz. Note that the internal clock frequency used by the
+   controller is half of that value. If not specified, a default
+   value of 1600 (16 MHz) is used.
+
+- bosch,clock-out-frequency : slock frequency in Hz on the CLKOUT pin.
+   If not specified or if the specified value is 0, the CLKOUT pin
+   will be disabled.
+
+- bosch,slew-rate : slew rate of the CLKOUT signal. If not specified,
+   a resonable value will be calculated.
+
+- bosch,disconnect-rx0-input : see data sheet.
+
+- bosch,disconnect-rx1-input : see data sheet.
+
+- bosch,disconnect-tx1-output : see data sheet.
+
+- bosch,polarity-dominant : see data sheet.
+
+- bosch,divide-memory-clock : see data sheet.
+
+- bosch,iso-low-speed-mux : see data sheet.
+
+For further information, please have a look to the CC770 or AN82527.
+
+Examples:
+
+can@3,100 {
+   compatible = bosch,cc770;
+   reg = 3 0x100 0x80;
+   interrupts = 2 0;
+   interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+};
+
+
+
diff --git a/drivers/net/can/cc770/Kconfig b/drivers/net/can/cc770/Kconfig
index 28e4d48..22c07a8 100644
--- a/drivers/net/can/cc770/Kconfig
+++ b/drivers/net/can/cc770/Kconfig
@@ -11,4 +11,11 @@ config CAN_CC770_ISA
  connected to the ISA bus using I/O port, memory mapped or
  indirect access.
 
+config CAN_CC770_PLATFORM
+   tristate Generic Platform Bus based CC770 driver
+   ---help---
+ This driver adds support for the CC770 and AN82527 chips
+ connected to the platform bus (Linux abstraction for directly
+ to the processor attached devices).
+
 endif
diff --git a/drivers/net/can/cc770/Makefile b/drivers/net/can/cc770/Makefile
index 872ecff..9fb8321 100644
--- a/drivers/net/can/cc770/Makefile
+++ b/drivers/net/can/cc770/Makefile
@@ -4,5 +4,6 @@
 
 obj-$(CONFIG_CAN_CC770) += cc770.o
 obj-$(CONFIG_CAN_CC770_ISA) += cc770_isa.o
+obj-$(CONFIG_CAN_CC770_PLATFORM) += cc770_platform.o
 
 ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/cc770/cc770_platform.c 
b/drivers/net/can/cc770/cc770_platform.c
new file mode 100644
index 000..fb87b22
--- /dev/null
+++ b/drivers/net/can/cc770/cc770_platform.c
@@ -0,0 +1,273 @@
+/*
+ * Driver for CC770 and AN82527 CAN controllers on the platform bus
+ *
+ * Copyright (C) 2009, 2011 Wolfgang Grandegger w...@grandegger.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the version 2 of the GNU General Public License
+ * as published by the Free Software Foundation
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * If platform data are used you should have similar definitions
+ * in your board-specific code:
+ *
+ *   static struct cc770_platform_data myboard_cc770_pdata = {
+ *   .osc_freq = 1600,
+ *   .cir = 0x41,
+ *   .cor = 0x20,
+ *   .bcr = 0x40,
+ *   };
+ *
+ * Please see include/linux/can/platform

[PATCH net-next v5 4/4] powerpc: tqm8548/tqm8xx: add and update CAN device nodes

This patch enables or updates support for the CC770 and AN82527
CAN controller on the TQM8548 and TQM8xx boards.

CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Wolfgang Grandegger w...@grandegger.com
---
 arch/powerpc/boot/dts/tqm8548-bigflash.dts |   19 ++-
 arch/powerpc/boot/dts/tqm8548.dts  |   19 ++-
 arch/powerpc/boot/dts/tqm8xx.dts   |   25 +
 3 files changed, 53 insertions(+), 10 deletions(-)

diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts 
b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 9452c3c..d918752 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -352,7 +352,7 @@
ranges = 
0 0x0 0xfc00 0x0400 // NOR FLASH bank 1
1 0x0 0xf800 0x0800 // NOR FLASH bank 0
-   2 0x0 0xa300 0x8000 // CAN (2 x i82527)
+   2 0x0 0xa300 0x8000 // CAN (2 x CC770)
3 0x0 0xa301 0x8000 // NAND FLASH
 
;
@@ -393,18 +393,27 @@
};
 
/* Note: CAN support needs be enabled in U-Boot */
-   can0@2,0 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,0 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x0 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
+   bosch,clock-out-frequency = 1600;
};
 
-   can1@2,100 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,100 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x100 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
};
 
/* Note: NAND support needs to be enabled in U-Boot */
diff --git a/arch/powerpc/boot/dts/tqm8548.dts 
b/arch/powerpc/boot/dts/tqm8548.dts
index 619776f..988d887 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -352,7 +352,7 @@
ranges = 
0 0x0 0xfc00 0x0400 // NOR FLASH bank 1
1 0x0 0xf800 0x0800 // NOR FLASH bank 0
-   2 0x0 0xe300 0x8000 // CAN (2 x i82527)
+   2 0x0 0xe300 0x8000 // CAN (2 x CC770)
3 0x0 0xe301 0x8000 // NAND FLASH
 
;
@@ -393,18 +393,27 @@
};
 
/* Note: CAN support needs be enabled in U-Boot */
-   can0@2,0 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,0 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x0 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
+   bosch,clock-out-frequency = 1600;
};
 
-   can1@2,100 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,100 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x100 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
};
 
/* Note: NAND support needs to be enabled in U-Boot */
diff --git a/arch/powerpc/boot/dts/tqm8xx.dts b/arch/powerpc/boot/dts/tqm8xx.dts
index f6da7ec..c3dba25 100644
--- a/arch/powerpc/boot/dts/tqm8xx.dts
+++ b/arch/powerpc/boot/dts/tqm8xx.dts
@@ -57,6 +57,7 @@
 
ranges = 
0x0 0x0 0x4000 0x80
+   0x3 0x0 0xc000 0x200
;
 
flash@0,0 {
@@ -67,6 +68,30

[PATCH net-next v5 3/4] can: cc770: add platform bus driver for the CC770 and AN82527

This driver works with both, static platform data and device tree
bindings. It has been tested on a TQM855L board with two AN82527
CAN controllers on the local bus.

CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Wolfgang Grandegger w...@grandegger.com
Acked-by: Marc Kleine-Budde m...@pengutronix.de
---
 .../devicetree/bindings/net/can/cc770.txt  |   56 
 drivers/net/can/cc770/Kconfig  |7 +
 drivers/net/can/cc770/Makefile |1 +
 drivers/net/can/cc770/cc770_platform.c |  273 
 4 files changed, 337 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/can/cc770.txt
 create mode 100644 drivers/net/can/cc770/cc770_platform.c

diff --git a/Documentation/devicetree/bindings/net/can/cc770.txt 
b/Documentation/devicetree/bindings/net/can/cc770.txt
new file mode 100644
index 000..01e282d
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/can/cc770.txt
@@ -0,0 +1,56 @@
+Memory mapped Bosch CC770 and Intel AN82527 CAN controller
+
+Note: The CC770 is a CAN controller from Bosch, which is 100%
+compatible with the old AN82527 from Intel, but with bugs being fixed.
+
+Required properties:
+
+- compatible : should be bosch,cc770 for the CC770 and intc,82527
+   for the AN82527.
+
+- reg : should specify the chip select, address offset and size required
+   to map the registers of the controller. The size is usually 0x80.
+
+- interrupts : property with a value describing the interrupt source
+   (number and sensitivity) required for the controller.
+
+Optional properties:
+
+- bosch,external-clock-frequency : frequency of the external oscillator
+   clock in Hz. Note that the internal clock frequency used by the
+   controller is half of that value. If not specified, a default
+   value of 1600 (16 MHz) is used.
+
+- bosch,clock-out-frequency : slock frequency in Hz on the CLKOUT pin.
+   If not specified or if the specified value is 0, the CLKOUT pin
+   will be disabled.
+
+- bosch,slew-rate : slew rate of the CLKOUT signal. If not specified,
+   a resonable value will be calculated.
+
+- bosch,disconnect-rx0-input : see data sheet.
+
+- bosch,disconnect-rx1-input : see data sheet.
+
+- bosch,disconnect-tx1-output : see data sheet.
+
+- bosch,polarity-dominant : see data sheet.
+
+- bosch,divide-memory-clock : see data sheet.
+
+- bosch,iso-low-speed-mux : see data sheet.
+
+For further information, please have a look to the CC770 or AN82527.
+
+Examples:
+
+can@3,100 {
+   compatible = bosch,cc770;
+   reg = 3 0x100 0x80;
+   interrupts = 2 0;
+   interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+};
+
+
+
diff --git a/drivers/net/can/cc770/Kconfig b/drivers/net/can/cc770/Kconfig
index 28e4d48..22c07a8 100644
--- a/drivers/net/can/cc770/Kconfig
+++ b/drivers/net/can/cc770/Kconfig
@@ -11,4 +11,11 @@ config CAN_CC770_ISA
  connected to the ISA bus using I/O port, memory mapped or
  indirect access.
 
+config CAN_CC770_PLATFORM
+   tristate Generic Platform Bus based CC770 driver
+   ---help---
+ This driver adds support for the CC770 and AN82527 chips
+ connected to the platform bus (Linux abstraction for directly
+ to the processor attached devices).
+
 endif
diff --git a/drivers/net/can/cc770/Makefile b/drivers/net/can/cc770/Makefile
index 872ecff..9fb8321 100644
--- a/drivers/net/can/cc770/Makefile
+++ b/drivers/net/can/cc770/Makefile
@@ -4,5 +4,6 @@
 
 obj-$(CONFIG_CAN_CC770) += cc770.o
 obj-$(CONFIG_CAN_CC770_ISA) += cc770_isa.o
+obj-$(CONFIG_CAN_CC770_PLATFORM) += cc770_platform.o
 
 ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/cc770/cc770_platform.c 
b/drivers/net/can/cc770/cc770_platform.c
new file mode 100644
index 000..fb87b22
--- /dev/null
+++ b/drivers/net/can/cc770/cc770_platform.c
@@ -0,0 +1,273 @@
+/*
+ * Driver for CC770 and AN82527 CAN controllers on the platform bus
+ *
+ * Copyright (C) 2009, 2011 Wolfgang Grandegger w...@grandegger.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the version 2 of the GNU General Public License
+ * as published by the Free Software Foundation
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * If platform data are used you should have similar definitions
+ * in your board-specific code:
+ *
+ *   static struct cc770_platform_data myboard_cc770_pdata = {
+ *   .osc_freq = 1600,
+ *   .cir = 0x41,
+ *   .cor = 0x20,
+ *   .bcr = 0x40,
+ *   };
+ *
+ * Please see include/linux/can/platform

[PATCH net-next v4 4/4] powerpc: tqm8548/tqm8xx: add and update CAN device nodes

2011-11-29 Thread Wolfgang Grandegger

This patch enables or updates support for the CC770 and AN82527
CAN controller on the TQM8548 and TQM8xx boards.

CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Wolfgang Grandegger w...@grandegger.com
---
 arch/powerpc/boot/dts/tqm8548-bigflash.dts |   19 ++-
 arch/powerpc/boot/dts/tqm8548.dts  |   19 ++-
 arch/powerpc/boot/dts/tqm8xx.dts   |   25 +
 3 files changed, 53 insertions(+), 10 deletions(-)

diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts 
b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 9452c3c..d918752 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -352,7 +352,7 @@
ranges = 
0 0x0 0xfc00 0x0400 // NOR FLASH bank 1
1 0x0 0xf800 0x0800 // NOR FLASH bank 0
-   2 0x0 0xa300 0x8000 // CAN (2 x i82527)
+   2 0x0 0xa300 0x8000 // CAN (2 x CC770)
3 0x0 0xa301 0x8000 // NAND FLASH
 
;
@@ -393,18 +393,27 @@
};
 
/* Note: CAN support needs be enabled in U-Boot */
-   can0@2,0 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,0 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x0 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
+   bosch,clock-out-frequency = 1600;
};
 
-   can1@2,100 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,100 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x100 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
};
 
/* Note: NAND support needs to be enabled in U-Boot */
diff --git a/arch/powerpc/boot/dts/tqm8548.dts 
b/arch/powerpc/boot/dts/tqm8548.dts
index 619776f..988d887 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -352,7 +352,7 @@
ranges = 
0 0x0 0xfc00 0x0400 // NOR FLASH bank 1
1 0x0 0xf800 0x0800 // NOR FLASH bank 0
-   2 0x0 0xe300 0x8000 // CAN (2 x i82527)
+   2 0x0 0xe300 0x8000 // CAN (2 x CC770)
3 0x0 0xe301 0x8000 // NAND FLASH
 
;
@@ -393,18 +393,27 @@
};
 
/* Note: CAN support needs be enabled in U-Boot */
-   can0@2,0 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,0 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x0 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
+   bosch,clock-out-frequency = 1600;
};
 
-   can1@2,100 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,100 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x100 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
};
 
/* Note: NAND support needs to be enabled in U-Boot */
diff --git a/arch/powerpc/boot/dts/tqm8xx.dts b/arch/powerpc/boot/dts/tqm8xx.dts
index f6da7ec..c3dba25 100644
--- a/arch/powerpc/boot/dts/tqm8xx.dts
+++ b/arch/powerpc/boot/dts/tqm8xx.dts
@@ -57,6 +57,7 @@
 
ranges = 
0x0 0x0 0x4000 0x80
+   0x3 0x0 0xc000 0x200
;
 
flash@0,0 {
@@ -67,6 +68,30

[PATCH net-next v4 3/4] can: cc770: add platform bus driver for the CC770 and AN82527

2011-11-29 Thread Wolfgang Grandegger

This driver works with both, static platform data and device tree
bindings. It has been tested on a TQM855L board with two AN82527
CAN controllers on the local bus.

CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Wolfgang Grandegger w...@grandegger.com
Acked-by: Marc Kleine-Budde m...@pengutronix.de
---
 .../devicetree/bindings/net/can/cc770.txt  |   56 
 drivers/net/can/cc770/Kconfig  |7 +
 drivers/net/can/cc770/Makefile |1 +
 drivers/net/can/cc770/cc770_platform.c |  273 
 4 files changed, 337 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/can/cc770.txt
 create mode 100644 drivers/net/can/cc770/cc770_platform.c

diff --git a/Documentation/devicetree/bindings/net/can/cc770.txt 
b/Documentation/devicetree/bindings/net/can/cc770.txt
new file mode 100644
index 000..01e282d
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/can/cc770.txt
@@ -0,0 +1,56 @@
+Memory mapped Bosch CC770 and Intel AN82527 CAN controller
+
+Note: The CC770 is a CAN controller from Bosch, which is 100%
+compatible with the old AN82527 from Intel, but with bugs being fixed.
+
+Required properties:
+
+- compatible : should be bosch,cc770 for the CC770 and intc,82527
+   for the AN82527.
+
+- reg : should specify the chip select, address offset and size required
+   to map the registers of the controller. The size is usually 0x80.
+
+- interrupts : property with a value describing the interrupt source
+   (number and sensitivity) required for the controller.
+
+Optional properties:
+
+- bosch,external-clock-frequency : frequency of the external oscillator
+   clock in Hz. Note that the internal clock frequency used by the
+   controller is half of that value. If not specified, a default
+   value of 1600 (16 MHz) is used.
+
+- bosch,clock-out-frequency : slock frequency in Hz on the CLKOUT pin.
+   If not specified or if the specified value is 0, the CLKOUT pin
+   will be disabled.
+
+- bosch,slew-rate : slew rate of the CLKOUT signal. If not specified,
+   a resonable value will be calculated.
+
+- bosch,disconnect-rx0-input : see data sheet.
+
+- bosch,disconnect-rx1-input : see data sheet.
+
+- bosch,disconnect-tx1-output : see data sheet.
+
+- bosch,polarity-dominant : see data sheet.
+
+- bosch,divide-memory-clock : see data sheet.
+
+- bosch,iso-low-speed-mux : see data sheet.
+
+For further information, please have a look to the CC770 or AN82527.
+
+Examples:
+
+can@3,100 {
+   compatible = bosch,cc770;
+   reg = 3 0x100 0x80;
+   interrupts = 2 0;
+   interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+};
+
+
+
diff --git a/drivers/net/can/cc770/Kconfig b/drivers/net/can/cc770/Kconfig
index 28e4d48..22c07a8 100644
--- a/drivers/net/can/cc770/Kconfig
+++ b/drivers/net/can/cc770/Kconfig
@@ -11,4 +11,11 @@ config CAN_CC770_ISA
  connected to the ISA bus using I/O port, memory mapped or
  indirect access.
 
+config CAN_CC770_PLATFORM
+   tristate Generic Platform Bus based CC770 driver
+   ---help---
+ This driver adds support for the CC770 and AN82527 chips
+ connected to the platform bus (Linux abstraction for directly
+ to the processor attached devices).
+
 endif
diff --git a/drivers/net/can/cc770/Makefile b/drivers/net/can/cc770/Makefile
index 872ecff..9fb8321 100644
--- a/drivers/net/can/cc770/Makefile
+++ b/drivers/net/can/cc770/Makefile
@@ -4,5 +4,6 @@
 
 obj-$(CONFIG_CAN_CC770) += cc770.o
 obj-$(CONFIG_CAN_CC770_ISA) += cc770_isa.o
+obj-$(CONFIG_CAN_CC770_PLATFORM) += cc770_platform.o
 
 ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/cc770/cc770_platform.c 
b/drivers/net/can/cc770/cc770_platform.c
new file mode 100644
index 000..fb87b22
--- /dev/null
+++ b/drivers/net/can/cc770/cc770_platform.c
@@ -0,0 +1,273 @@
+/*
+ * Driver for CC770 and AN82527 CAN controllers on the platform bus
+ *
+ * Copyright (C) 2009, 2011 Wolfgang Grandegger w...@grandegger.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the version 2 of the GNU General Public License
+ * as published by the Free Software Foundation
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * If platform data are used you should have similar definitions
+ * in your board-specific code:
+ *
+ *   static struct cc770_platform_data myboard_cc770_pdata = {
+ *   .osc_freq = 1600,
+ *   .cir = 0x41,
+ *   .cor = 0x20,
+ *   .bcr = 0x40,
+ *   };
+ *
+ * Please see include/linux/can/platform

[PATCH net-next v3 4/4] powerpc: tqm8548/tqm8xx: add and update CAN device nodes

2011-11-28 Thread Wolfgang Grandegger

This patch enables or updates support for the CC770 and AN82527
CAN controller on the TQM8548 and TQM8xx boards.

CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Wolfgang Grandegger w...@grandegger.com
---
 arch/powerpc/boot/dts/tqm8548-bigflash.dts |   19 ++-
 arch/powerpc/boot/dts/tqm8548.dts  |   19 ++-
 arch/powerpc/boot/dts/tqm8xx.dts   |   25 +
 3 files changed, 53 insertions(+), 10 deletions(-)

diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts 
b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 9452c3c..d918752 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -352,7 +352,7 @@
ranges = 
0 0x0 0xfc00 0x0400 // NOR FLASH bank 1
1 0x0 0xf800 0x0800 // NOR FLASH bank 0
-   2 0x0 0xa300 0x8000 // CAN (2 x i82527)
+   2 0x0 0xa300 0x8000 // CAN (2 x CC770)
3 0x0 0xa301 0x8000 // NAND FLASH
 
;
@@ -393,18 +393,27 @@
};
 
/* Note: CAN support needs be enabled in U-Boot */
-   can0@2,0 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,0 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x0 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
+   bosch,clock-out-frequency = 1600;
};
 
-   can1@2,100 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,100 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x100 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
};
 
/* Note: NAND support needs to be enabled in U-Boot */
diff --git a/arch/powerpc/boot/dts/tqm8548.dts 
b/arch/powerpc/boot/dts/tqm8548.dts
index 619776f..988d887 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -352,7 +352,7 @@
ranges = 
0 0x0 0xfc00 0x0400 // NOR FLASH bank 1
1 0x0 0xf800 0x0800 // NOR FLASH bank 0
-   2 0x0 0xe300 0x8000 // CAN (2 x i82527)
+   2 0x0 0xe300 0x8000 // CAN (2 x CC770)
3 0x0 0xe301 0x8000 // NAND FLASH
 
;
@@ -393,18 +393,27 @@
};
 
/* Note: CAN support needs be enabled in U-Boot */
-   can0@2,0 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,0 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x0 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
+   bosch,clock-out-frequency = 1600;
};
 
-   can1@2,100 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,100 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x100 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
};
 
/* Note: NAND support needs to be enabled in U-Boot */
diff --git a/arch/powerpc/boot/dts/tqm8xx.dts b/arch/powerpc/boot/dts/tqm8xx.dts
index f6da7ec..c3dba25 100644
--- a/arch/powerpc/boot/dts/tqm8xx.dts
+++ b/arch/powerpc/boot/dts/tqm8xx.dts
@@ -57,6 +57,7 @@
 
ranges = 
0x0 0x0 0x4000 0x80
+   0x3 0x0 0xc000 0x200
;
 
flash@0,0 {
@@ -67,6 +68,30

[PATCH net-next v3 3/4] can: cc770: add platform bus driver for the CC770 and AN82527

2011-11-28 Thread Wolfgang Grandegger

This driver works with both, static platform data and device tree
bindings. It has been tested on a TQM855L board with two AN82527
CAN controllers on the local bus.

CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Wolfgang Grandegger w...@grandegger.com
---
 .../devicetree/bindings/net/can/cc770.txt  |   56 
 drivers/net/can/cc770/Kconfig  |7 +
 drivers/net/can/cc770/Makefile |1 +
 drivers/net/can/cc770/cc770_platform.c |  280 
 4 files changed, 344 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/can/cc770.txt
 create mode 100644 drivers/net/can/cc770/cc770_platform.c

diff --git a/Documentation/devicetree/bindings/net/can/cc770.txt 
b/Documentation/devicetree/bindings/net/can/cc770.txt
new file mode 100644
index 000..01e282d
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/can/cc770.txt
@@ -0,0 +1,56 @@
+Memory mapped Bosch CC770 and Intel AN82527 CAN controller
+
+Note: The CC770 is a CAN controller from Bosch, which is 100%
+compatible with the old AN82527 from Intel, but with bugs being fixed.
+
+Required properties:
+
+- compatible : should be bosch,cc770 for the CC770 and intc,82527
+   for the AN82527.
+
+- reg : should specify the chip select, address offset and size required
+   to map the registers of the controller. The size is usually 0x80.
+
+- interrupts : property with a value describing the interrupt source
+   (number and sensitivity) required for the controller.
+
+Optional properties:
+
+- bosch,external-clock-frequency : frequency of the external oscillator
+   clock in Hz. Note that the internal clock frequency used by the
+   controller is half of that value. If not specified, a default
+   value of 1600 (16 MHz) is used.
+
+- bosch,clock-out-frequency : slock frequency in Hz on the CLKOUT pin.
+   If not specified or if the specified value is 0, the CLKOUT pin
+   will be disabled.
+
+- bosch,slew-rate : slew rate of the CLKOUT signal. If not specified,
+   a resonable value will be calculated.
+
+- bosch,disconnect-rx0-input : see data sheet.
+
+- bosch,disconnect-rx1-input : see data sheet.
+
+- bosch,disconnect-tx1-output : see data sheet.
+
+- bosch,polarity-dominant : see data sheet.
+
+- bosch,divide-memory-clock : see data sheet.
+
+- bosch,iso-low-speed-mux : see data sheet.
+
+For further information, please have a look to the CC770 or AN82527.
+
+Examples:
+
+can@3,100 {
+   compatible = bosch,cc770;
+   reg = 3 0x100 0x80;
+   interrupts = 2 0;
+   interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+};
+
+
+
diff --git a/drivers/net/can/cc770/Kconfig b/drivers/net/can/cc770/Kconfig
index 28e4d48..22c07a8 100644
--- a/drivers/net/can/cc770/Kconfig
+++ b/drivers/net/can/cc770/Kconfig
@@ -11,4 +11,11 @@ config CAN_CC770_ISA
  connected to the ISA bus using I/O port, memory mapped or
  indirect access.
 
+config CAN_CC770_PLATFORM
+   tristate Generic Platform Bus based CC770 driver
+   ---help---
+ This driver adds support for the CC770 and AN82527 chips
+ connected to the platform bus (Linux abstraction for directly
+ to the processor attached devices).
+
 endif
diff --git a/drivers/net/can/cc770/Makefile b/drivers/net/can/cc770/Makefile
index 872ecff..9fb8321 100644
--- a/drivers/net/can/cc770/Makefile
+++ b/drivers/net/can/cc770/Makefile
@@ -4,5 +4,6 @@
 
 obj-$(CONFIG_CAN_CC770) += cc770.o
 obj-$(CONFIG_CAN_CC770_ISA) += cc770_isa.o
+obj-$(CONFIG_CAN_CC770_PLATFORM) += cc770_platform.o
 
 ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/cc770/cc770_platform.c 
b/drivers/net/can/cc770/cc770_platform.c
new file mode 100644
index 000..65e177e
--- /dev/null
+++ b/drivers/net/can/cc770/cc770_platform.c
@@ -0,0 +1,280 @@
+/*
+ * Driver for CC770 and AN82527 CAN controllers on the platform bus
+ *
+ * Copyright (C) 2009, 2011 Wolfgang Grandegger w...@grandegger.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the version 2 of the GNU General Public License
+ * as published by the Free Software Foundation
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software Foundation,
+ * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+/*
+ * If platform data are used you should have similar definitions
+ * in your board-specific code:
+ *
+ *   static struct cc770_platform_data myboard_cc770_pdata

[PATCH net-next v2 3/4] can: cc770: add platform bus driver for the CC770 and AN82527

2011-11-25 Thread Wolfgang Grandegger

This driver works with both, static platform data and device tree
bindings. It has been tested on a TQM855L board with two AN82527
CAN controllers on the local bus.

CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Wolfgang Grandegger w...@grandegger.com
---
 .../devicetree/bindings/net/can/cc770.txt  |   56 
 drivers/net/can/cc770/Kconfig  |7 +
 drivers/net/can/cc770/Makefile |1 +
 drivers/net/can/cc770/cc770_platform.c |  289 
 4 files changed, 353 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/can/cc770.txt
 create mode 100644 drivers/net/can/cc770/cc770_platform.c

diff --git a/Documentation/devicetree/bindings/net/can/cc770.txt 
b/Documentation/devicetree/bindings/net/can/cc770.txt
new file mode 100644
index 000..01e282d
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/can/cc770.txt
@@ -0,0 +1,56 @@
+Memory mapped Bosch CC770 and Intel AN82527 CAN controller
+
+Note: The CC770 is a CAN controller from Bosch, which is 100%
+compatible with the old AN82527 from Intel, but with bugs being fixed.
+
+Required properties:
+
+- compatible : should be bosch,cc770 for the CC770 and intc,82527
+   for the AN82527.
+
+- reg : should specify the chip select, address offset and size required
+   to map the registers of the controller. The size is usually 0x80.
+
+- interrupts : property with a value describing the interrupt source
+   (number and sensitivity) required for the controller.
+
+Optional properties:
+
+- bosch,external-clock-frequency : frequency of the external oscillator
+   clock in Hz. Note that the internal clock frequency used by the
+   controller is half of that value. If not specified, a default
+   value of 1600 (16 MHz) is used.
+
+- bosch,clock-out-frequency : slock frequency in Hz on the CLKOUT pin.
+   If not specified or if the specified value is 0, the CLKOUT pin
+   will be disabled.
+
+- bosch,slew-rate : slew rate of the CLKOUT signal. If not specified,
+   a resonable value will be calculated.
+
+- bosch,disconnect-rx0-input : see data sheet.
+
+- bosch,disconnect-rx1-input : see data sheet.
+
+- bosch,disconnect-tx1-output : see data sheet.
+
+- bosch,polarity-dominant : see data sheet.
+
+- bosch,divide-memory-clock : see data sheet.
+
+- bosch,iso-low-speed-mux : see data sheet.
+
+For further information, please have a look to the CC770 or AN82527.
+
+Examples:
+
+can@3,100 {
+   compatible = bosch,cc770;
+   reg = 3 0x100 0x80;
+   interrupts = 2 0;
+   interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+};
+
+
+
diff --git a/drivers/net/can/cc770/Kconfig b/drivers/net/can/cc770/Kconfig
index 28e4d48..22c07a8 100644
--- a/drivers/net/can/cc770/Kconfig
+++ b/drivers/net/can/cc770/Kconfig
@@ -11,4 +11,11 @@ config CAN_CC770_ISA
  connected to the ISA bus using I/O port, memory mapped or
  indirect access.
 
+config CAN_CC770_PLATFORM
+   tristate Generic Platform Bus based CC770 driver
+   ---help---
+ This driver adds support for the CC770 and AN82527 chips
+ connected to the platform bus (Linux abstraction for directly
+ to the processor attached devices).
+
 endif
diff --git a/drivers/net/can/cc770/Makefile b/drivers/net/can/cc770/Makefile
index 872ecff..9fb8321 100644
--- a/drivers/net/can/cc770/Makefile
+++ b/drivers/net/can/cc770/Makefile
@@ -4,5 +4,6 @@
 
 obj-$(CONFIG_CAN_CC770) += cc770.o
 obj-$(CONFIG_CAN_CC770_ISA) += cc770_isa.o
+obj-$(CONFIG_CAN_CC770_PLATFORM) += cc770_platform.o
 
 ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/cc770/cc770_platform.c 
b/drivers/net/can/cc770/cc770_platform.c
new file mode 100644
index 000..a33f91d
--- /dev/null
+++ b/drivers/net/can/cc770/cc770_platform.c
@@ -0,0 +1,289 @@
+/*
+ * Driver for CC770 and AN82527 CAN controllers on the platform bus
+ *
+ * Copyright (C) 2009, 2011 Wolfgang Grandegger w...@grandegger.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the version 2 of the GNU General Public License
+ * as published by the Free Software Foundation
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software Foundation,
+ * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+/*
+ * If platform data are used you should have similar definitions
+ * in your board-specific code:
+ *
+ *   static struct cc770_platform_data myboard_cc770_pdata

[PATCH net-next v2 4/4] powerpc: tqm8548/tqm8xx: add and update CAN device nodes

2011-11-25 Thread Wolfgang Grandegger

This patch enables or updates support for the CC770 and AN82527
CAN controller on the TQM8548 and TQM8xx boards.

CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Wolfgang Grandegger w...@grandegger.com
---
 arch/powerpc/boot/dts/tqm8548-bigflash.dts |   19 ++-
 arch/powerpc/boot/dts/tqm8548.dts  |   19 ++-
 arch/powerpc/boot/dts/tqm8xx.dts   |   25 +
 3 files changed, 53 insertions(+), 10 deletions(-)

diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts 
b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 9452c3c..d918752 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -352,7 +352,7 @@
ranges = 
0 0x0 0xfc00 0x0400 // NOR FLASH bank 1
1 0x0 0xf800 0x0800 // NOR FLASH bank 0
-   2 0x0 0xa300 0x8000 // CAN (2 x i82527)
+   2 0x0 0xa300 0x8000 // CAN (2 x CC770)
3 0x0 0xa301 0x8000 // NAND FLASH
 
;
@@ -393,18 +393,27 @@
};
 
/* Note: CAN support needs be enabled in U-Boot */
-   can0@2,0 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,0 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x0 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
+   bosch,clock-out-frequency = 1600;
};
 
-   can1@2,100 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,100 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x100 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
};
 
/* Note: NAND support needs to be enabled in U-Boot */
diff --git a/arch/powerpc/boot/dts/tqm8548.dts 
b/arch/powerpc/boot/dts/tqm8548.dts
index 619776f..988d887 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -352,7 +352,7 @@
ranges = 
0 0x0 0xfc00 0x0400 // NOR FLASH bank 1
1 0x0 0xf800 0x0800 // NOR FLASH bank 0
-   2 0x0 0xe300 0x8000 // CAN (2 x i82527)
+   2 0x0 0xe300 0x8000 // CAN (2 x CC770)
3 0x0 0xe301 0x8000 // NAND FLASH
 
;
@@ -393,18 +393,27 @@
};
 
/* Note: CAN support needs be enabled in U-Boot */
-   can0@2,0 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,0 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x0 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
+   bosch,clock-out-frequency = 1600;
};
 
-   can1@2,100 {
-   compatible = intel,82527; // Bosch CC770
+   can@2,100 {
+   compatible = bosch,cc770; // Bosch CC770
reg = 2 0x100 0x100;
interrupts = 4 1;
interrupt-parent = mpic;
+   bosch,external-clock-frequency = 1600;
+   bosch,disconnect-rx1-input;
+   bosch,disconnect-tx1-output;
+   bosch,iso-low-speed-mux;
};
 
/* Note: NAND support needs to be enabled in U-Boot */
diff --git a/arch/powerpc/boot/dts/tqm8xx.dts b/arch/powerpc/boot/dts/tqm8xx.dts
index f6da7ec..c3dba25 100644
--- a/arch/powerpc/boot/dts/tqm8xx.dts
+++ b/arch/powerpc/boot/dts/tqm8xx.dts
@@ -57,6 +57,7 @@
 
ranges = 
0x0 0x0 0x4000 0x80
+   0x3 0x0 0xc000 0x200
;
 
flash@0,0 {
@@ -67,6 +68,30

[PATCH net-next] ibm/emac: fix improper cleanup when device is removed to allow re-bind

2011-11-17 Thread Wolfgang Grandegger

The re-binding (unbind..bind) of an EMAC device fails because the
static variable busy_phy_map is not updated when the device is
removed.

Signed-off-by: Wolfgang Grandegger w...@denx.de
---
 drivers/net/ethernet/ibm/emac/core.c |3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/drivers/net/ethernet/ibm/emac/core.c 
b/drivers/net/ethernet/ibm/emac/core.c
index ed79b2d..2abce96 100644
--- a/drivers/net/ethernet/ibm/emac/core.c
+++ b/drivers/net/ethernet/ibm/emac/core.c
@@ -2924,6 +2924,9 @@ static int __devexit emac_remove(struct platform_device 
*ofdev)
if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII))
zmii_detach(dev-zmii_dev, dev-zmii_port);
 
+   busy_phy_map = ~(1  dev-phy.address);
+   DBG(dev, busy_phy_map now %#x NL, busy_phy_map);
+
mal_unregister_commac(dev-mal, dev-commac);
emac_put_deps(dev);
 
-- 
1.7.4.1

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Re: [PATCH v13 0/6] flexcan: Add support for powerpc flexcan (freescale p1010)

2011-10-18 Thread Wolfgang Grandegger

Hi Kumar,

On 10/18/2011 07:44 AM, Kumar Gala wrote:
 
 On Aug 16, 2011, at 10:32 PM, Robin Holt wrote:
 
 David,

 The following set of patches have been reviewed by the above parties and
 all comments have been integrated.  Although the patches stray from the
 drivers/net/can directory, the diversions are related to changes for
 the flexcan driver.

 The patch set is based upon your net-next-2.6 tree's commit 6c37e46.

 Could you please queue these up for the next appropriate push to Linus'
 tree?

 Thanks,
 Robin Holt
 
 Robin,
 
 Do you remember why we went with just 'fsl,p1010-flexcan' as the device tree 
 compatible?  Do we feel the flex can on P1010 isn't the same as on MPC5xxx? 
 or the ARM SoCs?

The MPC5xxx SOCs have a MSCAN controller, which is different to the
Flexcan and handled by another driver. But the Flexcan's  on the
Freescale ARM SOCs are identical and supported by that driver as well
and fsl,flexcan would work *perfectly*. Actually Grant instructed use
to be more explicit and use fsl,p1010-flexcan. Anyway,
fsl,p1010-flexcan should work on ARM SOCs if the source frequency is
provided via boot loader or the DTS file. Compatibility was one of our
main concerns.

Wolfgang.
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Re: [PATCH v12 5/6] flexcan: Prefer device tree clock frequency if available.

2011-08-12 Thread Wolfgang Grandegger

On 08/12/2011 10:45 AM, Robin Holt wrote:
 If our CAN device's device tree node has a clock-frequency property,
 then use that value for the can devices clock frequency.  If not, fall
 back to asking the platform/mach code for the clock frequency associated
 with the flexcan device.

 Signed-off-by: Robin Holt h...@sgi.com
 To: Kumar Gala ga...@kernel.crashing.org
 To: Wolfgang Grandegger w...@grandegger.com,
 To: Marc Kleine-Budde m...@pengutronix.de,
 To: U Bhaskar-B22300 b22...@freescale.com
 To: Scott Wood scottw...@freescale.com
 To: Grant Likely grant.lik...@secretlab.ca
 Cc: socketcan-c...@lists.berlios.de,
 Cc: net...@vger.kernel.org,
 Cc: PPC list linuxppc-dev@lists.ozlabs.org
 Cc: devicetree-disc...@lists.ozlabs.org

Acked-by: Wolfgang Grandegger w...@grandegger.com

From the Socket-CAN point of view, this and the other patches can go in.
Thanks for your effort.

Wolfgang.
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Re: [PATCH v11 4/5] powerpc: Add flexcan device support for p1010rdb.

On 08/11/2011 06:46 AM, Kumar Gala wrote:
 
 On Aug 10, 2011, at 1:16 PM, Wolfgang Grandegger wrote:
 
 On 08/10/2011 07:01 PM, Kumar Gala wrote:

 On Aug 10, 2011, at 11:27 AM, Robin Holt wrote:

 I added a simple clock source for the p1010rdb so the flexcan driver
 could determine a clock frequency.  The p1010 flexcan device only has
 an oscillator of system bus frequency divided by 2.

 Signed-off-by: Robin Holt h...@sgi.com
 Acked-by: Marc Kleine-Budde m...@pengutronix.de,
 Acked-by: Wolfgang Grandegger w...@grandegger.com,
 Cc: U Bhaskar-B22300 b22...@freescale.com
 Cc: socketcan-c...@lists.berlios.de,
 Cc: net...@vger.kernel.org,
 Cc: PPC list linuxppc-dev@lists.ozlabs.org
 Cc: Kumar Gala ga...@kernel.crashing.org
 ---
 arch/powerpc/platforms/85xx/Kconfig|2 +
 arch/powerpc/platforms/85xx/Makefile   |2 +
 arch/powerpc/platforms/85xx/clock.c|   52 
 
 arch/powerpc/platforms/85xx/p1010rdb.c |8 +
 4 files changed, 64 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/platforms/85xx/clock.c

 I dont understand how mpc85xx_clk_functions() ends up being associated with 
 the frequency the flexcan is running at.

 The function mpc85xx_clk_get_rate() returns fsl_get_sys_freq() / 2 for
 Flexcan devices.

 This either seems to global or I'm missing something.

 This patch extends the existing Flexcan platform driver for ARM for the
 PowerPC using the device tree. Due to the nice integration of the device
 tree (of-platform) into the platform driver and devices, the difference
 are quite small (see patches 1..3). Apart from the endianess issue, only
 the clock needs to be handled in a common way. As ARM already uses the
 clk interface, we found it straight-forward to implement it for the
 P1010, or more general for the 85xx, as well, instead of using an
 additional helper function.
 
 I see, that.  What concerns me is there are numerous clocks / frequencies 
 that exist inside a MPC85xx/P1010 SOC.  The code I'm seeing does NOT seem to 
 do anything to relate this clock JUST to the flexcan.

The clk interface is not commonly used on PowerPC, I know. It's just to
provide compatibility with ARM. An alternative would be to use some
helper function.

 I still think the clk / freq info should be in the device tree and handled 
 in the driver and NOT arch/powerpc platform code.

 If I understand you correctly, you want the boot-loader to provide the
 relevant information by fixing up the device tree, which then can be
 handled arch-independently by the driver, right?
 
 Yes, that is part of what I want.

This works fine if we just have *one* fixed clock source and frequency.
When there are choices (source and divider) it does make sense to allow
the user to select the frequency via DTS file entries for Linux. Then we
need arch-specific code anyway (to set the relevant registers).
Furthermore we rely on the boot-loader (the usual argument) which is not
a problem for new boards (with new boot-loader), of course.

Wolfgang.
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Re: [PATCH v11 4/5] powerpc: Add flexcan device support for p1010rdb.

On 08/11/2011 05:56 AM, Robin Holt wrote:
 On Wed, Aug 10, 2011 at 08:16:33PM +0200, Wolfgang Grandegger wrote:
 On 08/10/2011 07:01 PM, Kumar Gala wrote:

 On Aug 10, 2011, at 11:27 AM, Robin Holt wrote:

 I added a simple clock source for the p1010rdb so the flexcan driver
 could determine a clock frequency.  The p1010 flexcan device only has
 an oscillator of system bus frequency divided by 2.

 Signed-off-by: Robin Holt h...@sgi.com
 Acked-by: Marc Kleine-Budde m...@pengutronix.de,
 Acked-by: Wolfgang Grandegger w...@grandegger.com,
 Cc: U Bhaskar-B22300 b22...@freescale.com
 Cc: socketcan-c...@lists.berlios.de,
 Cc: net...@vger.kernel.org,
 Cc: PPC list linuxppc-dev@lists.ozlabs.org
 Cc: Kumar Gala ga...@kernel.crashing.org
 ---
 arch/powerpc/platforms/85xx/Kconfig|2 +
 arch/powerpc/platforms/85xx/Makefile   |2 +
 arch/powerpc/platforms/85xx/clock.c|   52 
 
 arch/powerpc/platforms/85xx/p1010rdb.c |8 +
 4 files changed, 64 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/platforms/85xx/clock.c

 I dont understand how mpc85xx_clk_functions() ends up being associated with 
 the frequency the flexcan is running at.

 The function mpc85xx_clk_get_rate() returns fsl_get_sys_freq() / 2 for
 Flexcan devices.

 This either seems to global or I'm missing something.

 This patch extends the existing Flexcan platform driver for ARM for the
 PowerPC using the device tree. Due to the nice integration of the device
 tree (of-platform) into the platform driver and devices, the difference
 are quite small (see patches 1..3). Apart from the endianess issue, only
 the clock needs to be handled in a common way. As ARM already uses the
 clk interface, we found it straight-forward to implement it for the
 P1010, or more general for the 85xx, as well, instead of using an
 additional helper function.

 I still think the clk / freq info should be in the device tree and handled 
 in the driver and NOT arch/powerpc platform code.

 If I understand you correctly, you want the boot-loader to provide the
 relevant information by fixing up the device tree, which then can be
 handled arch-independently by the driver, right?
 
 Marc and Wolfgang,
 
 This is a very early swag at this which I worked up while driving home from 
 dinner
 this evening.  It works with my current config, but that includes at least one
 bogus patch.  I will have to do more testing tomorrow.  For now, it is 
 something
 to ponder.

Yes, that's what Kumar is proposing. Fine for me with the P1010. It just
needs some proper U-Boot implementation.

 Thanks,
 Robin
 
 
 flexcan: Prefer device tree clock frequency if available.
 
 If our CAN device's device tree node has a clock-frequency property,
 then use that value for the can devices clock frequency.  If not, fall
 back to asking the platform/mach code for the clock frequency associated
 with the flexcan device.
 
 Too-early-to-be-signed-off-by: Robin Holt h...@sgi.com
 
 diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
 index 662f832..d6a87c9 100644
 --- a/drivers/net/can/flexcan.c
 +++ b/drivers/net/can/flexcan.c
 @@ -33,6 +33,7 @@
  #include linux/kernel.h
  #include linux/list.h
  #include linux/module.h
 +#include linux/of.h
  #include linux/platform_device.h
  
  #define DRV_NAME flexcan
 @@ -929,12 +930,25 @@ static int __devinit flexcan_probe(struct 
 platform_device *pdev)
   void __iomem *base;
   resource_size_t mem_size;
   int err, irq;
 + u32 clock_freq = 0;
  
 - clk = clk_get(pdev-dev, NULL);
 - if (IS_ERR(clk)) {
 - dev_err(pdev-dev, no clock defined\n);
 - err = PTR_ERR(clk);
 - goto failed_clock;
 + if (pdev-dev.of_node) {
 + u32 *clock_freq_p;

Should be:

const u32 *clock_freq_p;

 +
 + clk = NULL;
 + clock_freq_p = (u32 *)of_get_property(pdev-dev.of_node, 
 clock-frequency, NULL);

No cast please.

 + if (clock_freq_p)
 + clock_freq = *clock_freq_p;
 + }

Wolfgang.
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Re: [PATCH v11 6/6] powerpc: Add flexcan device support for p1010rdb.

On 08/11/2011 06:07 PM, Robin Holt wrote:
 Allow the p1010 processor to select the flexcan network driver.
 
 Signed-off-by: Robin Holt h...@sgi.com
 Acked-by: Marc Kleine-Budde m...@pengutronix.de,
 Acked-by: Wolfgang Grandegger w...@grandegger.com,
 Cc: U Bhaskar-B22300 b22...@freescale.com
 Cc: socketcan-c...@lists.berlios.de,
 Cc: net...@vger.kernel.org,
 Cc: PPC list linuxppc-dev@lists.ozlabs.org
 Cc: Kumar Gala ga...@kernel.crashing.org
 ---
  arch/powerpc/boot/dts/p1010rdb.dts  |8 
  arch/powerpc/platforms/85xx/Kconfig |2 ++
  2 files changed, 10 insertions(+), 0 deletions(-)
 
 diff --git a/arch/powerpc/boot/dts/p1010rdb.dts 
 b/arch/powerpc/boot/dts/p1010rdb.dts
 index d6c669c..df89b60 100644
 --- a/arch/powerpc/boot/dts/p1010rdb.dts
 +++ b/arch/powerpc/boot/dts/p1010rdb.dts
 @@ -171,6 +171,14 @@
   };
   };
  
 + can@1c000 {
 + clock-frequency = 0x0bebc1fc;
 + };


clock-frequency = 2; // filled in by 
boot-loader

Is better readable and makes clear that the value is filled in by the
boot loader. Usually we specify 0 in that case but it will *not*
work with your board because U-Boot fills into the property clock_freq
the CCB-frequency, which is twice as much. This needs to be fixed.

 + can1: can@1d000 {

What is the can1: good for?

 + clock-frequency = 0x0bebc1fc;

See above.

Wolfgang.




   usb@22000 {
   phy_type = utmi;
   };
 diff --git a/arch/powerpc/platforms/85xx/Kconfig 
 b/arch/powerpc/platforms/85xx/Kconfig
 index 498534c..c4304ae 100644
 --- a/arch/powerpc/platforms/85xx/Kconfig
 +++ b/arch/powerpc/platforms/85xx/Kconfig
 @@ -70,6 +70,8 @@ config MPC85xx_RDB
  config P1010_RDB
   bool Freescale P1010RDB
   select DEFAULT_UIMAGE
 + select HAVE_CAN_FLEXCAN if NET  CAN
 + select PPC_CLOCK if CAN_FLEXCAN
   help
 This option enables support for the MPC85xx RDB (P1010 RDB) board
  

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Re: [PATCH v11 5/6] flexcan: Prefer device tree clock frequency if available.

On 08/11/2011 06:07 PM, Robin Holt wrote:
 If our CAN device's device tree node has a clock-frequency property,
 then use that value for the can devices clock frequency.  If not, fall
 back to asking the platform/mach code for the clock frequency associated
 with the flexcan device.
 
 Signed-off-by: Robin Holt h...@sgi.com
 To: Kumar Gala ga...@kernel.crashing.org
 To: Wolfgang Grandegger w...@grandegger.com,
 To: Marc Kleine-Budde m...@pengutronix.de,
 To: U Bhaskar-B22300 b22...@freescale.com
 To: Scott Wood scottw...@freescale.com
 To: Grant Likely grant.lik...@secretlab.ca
 Cc: socketcan-c...@lists.berlios.de,
 Cc: net...@vger.kernel.org,
 Cc: PPC list linuxppc-dev@lists.ozlabs.org
 Cc: devicetree-disc...@lists.ozlabs.org
 ---
  .../devicetree/bindings/net/can/fsl-flexcan.txt|2 +
  drivers/net/can/flexcan.c  |   33 
 +++-
  2 files changed, 27 insertions(+), 8 deletions(-)
 
 diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt 
 b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
 index c78dcbb..a4382c7 100644
 --- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
 +++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
 @@ -11,6 +11,7 @@ Required properties:
  
  - reg : Offset and length of the register set for this device
  - interrupts : Interrupt tuple for this device
 +- clock-frequency : The oscillator frequency driving the flexcan device
  
  Example:
  
 @@ -19,4 +20,5 @@ Example:
reg = 0x1c000 0x1000;
interrupts = 48 0x2;
interrupt-parent = mpic;
 +  clock-frequency = 0x0bebc1fc;

 clock-frequency = 2; // filled in by bootloader

Is better readable. You should also add the comment.

Wolfgang.
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Re: [PATCH v10 5/5] [powerpc] Fix up fsl-flexcan device tree binding.

Hi Robin,

On 08/10/2011 05:06 AM, Robin Holt wrote:
 In working with the socketcan developers, we have come to the conclusion
 the Documentation...fsl-flexcan.txt device tree documentation needs to
 be cleaned up.  The driver does not depend upon any properties other

Your first sentence could be misleading. Please just describe what the
patch does and why, something like:

This patch cleans up the documentation of the device-tree binding for
 the Flexcan devices on Freescale's PowerPC and ARM cores. Extra
 properties are not needed as the frequency of the source clock is
 fixed... and so on.

 than the required properties so we are removing the file.  Additionally,
 the p1010*dts* files are not following the standard for node naming in
 that they have a trailing -v1.0.

 Signed-off-by: Robin Holt h...@sgi.com
 To: Marc Kleine-Budde m...@pengutronix.de,
 To: Wolfgang Grandegger w...@grandegger.com,
 To: U Bhaskar-B22300 b22...@freescale.com
 To: Scott Wood scottw...@freescale.com
 Cc: socketcan-c...@lists.berlios.de,
 Cc: net...@vger.kernel.org,
 Cc: PPC list linuxppc-dev@lists.ozlabs.org
 Cc: Kumar Gala ga...@kernel.crashing.org
 ---
  .../devicetree/bindings/net/can/fsl-flexcan.txt|   61 
 
  arch/powerpc/boot/dts/p1010rdb.dts |8 ---
  arch/powerpc/boot/dts/p1010si.dtsi |8 +-
  3 files changed, 4 insertions(+), 73 deletions(-)
  delete mode 100644 Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
 
 diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt 
 b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
 deleted file mode 100644
 index 1a729f0..000
 --- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
 +++ /dev/null
 @@ -1,61 +0,0 @@
 -CAN Device Tree Bindings
 -
 -2011 Freescale Semiconductor, Inc.
 -
 -fsl,flexcan-v1.0 nodes
 
 -In addition to the required compatible-, reg- and interrupt-properties, you 
 can
 -also specify which clock source shall be used for the controller.
 -
 -CPI Clock- Can Protocol Interface Clock
 - This CLK_SRC bit of CTRL(control register) selects the clock source to
 - the CAN Protocol Interface(CPI) to be either the peripheral clock
 - (driven by the PLL) or the crystal oscillator clock. The selected clock
 - is the one fed to the prescaler to generate the Serial Clock (Sclock).
 - The PRESDIV field of CTRL(control register) controls a prescaler that
 - generates the Serial Clock (Sclock), whose period defines the
 - time quantum used to compose the CAN waveform.
 -
 -Can Engine Clock Source
 - There are two sources for CAN clock
 - - Platform Clock  It represents the bus clock
 - - Oscillator Clock
 -
 - Peripheral Clock (PLL)
 - --
 -  |
 - - -
 - |   |CPI Clock| Prescaler |   Sclock
 - |   || (1.. 256) |
 - - -
 - |  |
 - --  -CLK_SRC
 - Oscillator Clock
 -
 -- fsl,flexcan-clock-source : CAN Engine Clock Source.This property selects
 -  the peripheral clock. PLL clock is fed to the
 -  prescaler to generate the Serial Clock (Sclock).
 -  Valid values are oscillator and platform
 -  oscillator: CAN engine clock source is 
 oscillator clock.
 -  platform The CAN engine clock source is the bus 
 clock
 -  (platform clock).
 -
 -- fsl,flexcan-clock-divider : for the reference and system clock, an 
 additional
 -   clock divider can be specified.
 -- clock-frequency: frequency required to calculate the bitrate for FlexCAN.
 -
 -Note:
 - - v1.0 of flexcan-v1.0 represent the IP block version for P1010 SOC.
 - - P1010 does not have oscillator as the Clock Source.So the default
 -   Clock Source is platform clock.
 -Examples:
 -
 - can0@1c000 {
 - compatible = fsl,flexcan-v1.0;
 - reg = 0x1c000 0x1000;
 - interrupts = 48 0x2;
 - interrupt-parent = mpic;
 - fsl,flexcan-clock-source = platform;
 - fsl,flexcan-clock-divqider = 2;
 - clock-frequency = fixed by u-boot;
 - };

Do we really want to drop the documentation for that binding. I think
something like the following text would be still useful:


Flexcan CAN contoller on Freescale's ARM and PowerPC processors

Required properties:

- compatible : Should be fsl,flexcan and optionally
   fsl,flexcan-processor
- reg : Offset and length of the register set for this device
- interrupts : Interrupt tuple for this device

Example:

  can@1c000

Re: [PATCH v10 5/5] [powerpc] Fix up fsl-flexcan device tree binding.

On 08/10/2011 04:15 PM, Robin Holt wrote:
 On Wed, Aug 10, 2011 at 03:47:43PM +0200, Wolfgang Grandegger wrote:
...
 Done, except the
   compatible = fsl,p1010-flexcan, fsl,flexcan;
 
 line is
   compatible = fsl,flexcan, fsl,flexcan-p1010;

IIRC, there order is more to less specific, e.g. for I2C:

  compatible = fsl,mpc5200-i2c, fsl-i2c

...

 Please also correct the node names (not using the number suffix).
 
 So the node names should be
   can@1c000 {
   can@1d000 {
 correct?

Yes, just have a look how other node names are constructed, e.g. for
sata, serial, rtc, etc.:

  $ grep serial@ *.dts
  ...
  pdm360ng.dts: serial@11000 {
  pdm360ng.dts: serial@11100 {
  pdm360ng.dts: serial@11200 {
  pdm360ng.dts: serial@11300 {
  pdm360ng.dts: serial@11400 {
  pdm360ng.dts: serial@11600 {
  pdm360ng.dts: serial@11800 {
  pdm360ng.dts: serial@11B00 {
  ...

Wolfgang.

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Re: [PATCH v11 4/5] powerpc: Add flexcan device support for p1010rdb.

On 08/10/2011 07:01 PM, Kumar Gala wrote:
 
 On Aug 10, 2011, at 11:27 AM, Robin Holt wrote:
 
 I added a simple clock source for the p1010rdb so the flexcan driver
 could determine a clock frequency.  The p1010 flexcan device only has
 an oscillator of system bus frequency divided by 2.

 Signed-off-by: Robin Holt h...@sgi.com
 Acked-by: Marc Kleine-Budde m...@pengutronix.de,
 Acked-by: Wolfgang Grandegger w...@grandegger.com,
 Cc: U Bhaskar-B22300 b22...@freescale.com
 Cc: socketcan-c...@lists.berlios.de,
 Cc: net...@vger.kernel.org,
 Cc: PPC list linuxppc-dev@lists.ozlabs.org
 Cc: Kumar Gala ga...@kernel.crashing.org
 ---
 arch/powerpc/platforms/85xx/Kconfig|2 +
 arch/powerpc/platforms/85xx/Makefile   |2 +
 arch/powerpc/platforms/85xx/clock.c|   52 
 
 arch/powerpc/platforms/85xx/p1010rdb.c |8 +
 4 files changed, 64 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/platforms/85xx/clock.c
 
 I dont understand how mpc85xx_clk_functions() ends up being associated with 
 the frequency the flexcan is running at.

The function mpc85xx_clk_get_rate() returns fsl_get_sys_freq() / 2 for
Flexcan devices.

 This either seems to global or I'm missing something.

This patch extends the existing Flexcan platform driver for ARM for the
PowerPC using the device tree. Due to the nice integration of the device
tree (of-platform) into the platform driver and devices, the difference
are quite small (see patches 1..3). Apart from the endianess issue, only
the clock needs to be handled in a common way. As ARM already uses the
clk interface, we found it straight-forward to implement it for the
P1010, or more general for the 85xx, as well, instead of using an
additional helper function.

 I still think the clk / freq info should be in the device tree and handled in 
 the driver and NOT arch/powerpc platform code.

If I understand you correctly, you want the boot-loader to provide the
relevant information by fixing up the device tree, which then can be
handled arch-independently by the driver, right?

Wolfgang.
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Re: [PATCH v10 5/5] [powerpc] Fix up fsl-flexcan device tree binding.

On 08/10/2011 06:00 PM, Robin Holt wrote:
 On Wed, Aug 10, 2011 at 02:36:20PM +, U Bhaskar-B22300 wrote:
...
 It looks like the way to do that is to assign a label to those devices
 and then associate the label with an alias.  I have no idea how that
 works under the hood, but it is the way other files are set up.  Take a
 look at arch/powerpc/boot/dts/bamboo.dts for how they define the serial
 interfaces.

With a label you mean label: at the beginning of a node. Such labels
are translated by the device tree compiler in node handles, which can be
referenced within nodes by using label, e.g.:

UIC0: interrupt-controller0 {
...
};
UIC1: interrupt-controller1 {
...
interrupt-parent = UIC0;
...
};

It has nothing to do with the name of the node.

Wolfgang.
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Re: [RFC 4/4] [powerpc] Add flexcan device support for p1010rdb.

On 08/09/2011 08:33 AM, Robin Holt wrote:
 Argh.  I sent an earlier (non-working) version of this patch.  Here is
 the correct one.

Please always resend the complete series of patches with an incremented
version number. Furthermore, this is not an RFC any more. A prefix
similar to [PATCH nfsl_get_sys_freq() et-next-2.6 v2] would be perfect.

 I added a clock source for the p1010rdb so the flexcan driver
 could find its clock frequency.
 
 Signed-off-by: Robin Holt h...@sgi.com
 To: Marc Kleine-Budde m...@pengutronix.de,
 To: Wolfgang Grandegger w...@grandegger.com,
 To: U Bhaskar-B22300 b22...@freescale.com
 Cc: socketcan-c...@lists.berlios.de,
 Cc: net...@vger.kernel.org,
 Cc: PPC list linuxppc-dev@lists.ozlabs.org
 ---
  arch/powerpc/platforms/85xx/Kconfig|6 +++
  arch/powerpc/platforms/85xx/Makefile   |1 +
  arch/powerpc/platforms/85xx/clock.c|   59 
 
  arch/powerpc/platforms/85xx/p1010rdb.c |   10 +
  4 files changed, 76 insertions(+), 0 deletions(-)
  create mode 100644 arch/powerpc/platforms/85xx/clock.c
 
 diff --git a/arch/powerpc/platforms/85xx/Kconfig 
 b/arch/powerpc/platforms/85xx/Kconfig
 index 498534c..ed4cf92 100644
 --- a/arch/powerpc/platforms/85xx/Kconfig
 +++ b/arch/powerpc/platforms/85xx/Kconfig
 @@ -26,6 +26,10 @@ config MPC8560_ADS
   help
 This option enables support for the MPC 8560 ADS board
  
 +config 85xx_HAVE_CAN_FLEXCAN
 + bool
 + select HAVE_CAN_FLEXCAN if NET  CAN
 +

Why do you need that? More below...

  config MPC85xx_CDS
   bool Freescale MPC85xx CDS
   select DEFAULT_UIMAGE
 @@ -70,6 +74,8 @@ config MPC85xx_RDB
  config P1010_RDB
   bool Freescale P1010RDB
   select DEFAULT_UIMAGE
 + select 85xx_HAVE_CAN_FLEXCAN
 + select PPC_CLOCK if CAN_FLEXCAN

select HAVE_CAN_FLEXCAN
select PPC_CLOCK

Should just be fine, or have I missed something.

   help
 This option enables support for the MPC85xx RDB (P1010 RDB) board
  
 diff --git a/arch/powerpc/platforms/85xx/Makefile 
 b/arch/powerpc/platforms/85xx/Makefile
 index a971b32..64ad7a4 100644
 --- a/arch/powerpc/platforms/85xx/Makefile
 +++ b/arch/powerpc/platforms/85xx/Makefile
 @@ -11,6 +11,7 @@ obj-$(CONFIG_MPC85xx_DS)  += mpc85xx_ds.o
  obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o
  obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o
  obj-$(CONFIG_P1010_RDB)   += p1010rdb.o
 +obj-$(CONFIG_PPC_CLOCK)   += clock.o

I would put that to the beginning or before the board settings.

  obj-$(CONFIG_P1022_DS)+= p1022_ds.o
  obj-$(CONFIG_P1023_RDS)   += p1023_rds.o
  obj-$(CONFIG_P2040_RDB)   += p2040_rdb.o corenet_ds.o
 diff --git a/arch/powerpc/platforms/85xx/clock.c 
 b/arch/powerpc/platforms/85xx/clock.c
 new file mode 100644
 index 000..a25cbf3
 --- /dev/null
 +++ b/arch/powerpc/platforms/85xx/clock.c
 @@ -0,0 +1,59 @@
 +
 +#include linux/device.h
 +#include linux/err.h
 +
 +#include asm/clk_interface.h
 +
 +#include sysdev/fsl_soc.h
 +
 +/*
 + * p1010rdb needs to provide a clock source for the flexcan driver.
 + */
 +struct clk {
 + unsigned long rate;
 +} p1010_rdb_system_clock;
 +
 +static struct clk *p1010_rdb_clk_get(struct device *dev, const char *id)
 +{
 + const char *dev_init_name;
 +
 + if (!dev)
 + return ERR_PTR(-ENOENT);
 +
 + /*
 +  * The can devices are named ffe1c000.can0 and ffe1d000.can1 on
 +  * the p1010rdb.  Check for the can portion of that name before
 +  * returning a clock source.
 +  */
 + dev_init_name = dev_name(dev);
 + if (strlen(dev_init_name) != 13)
 + return ERR_PTR(-ENOENT);
 + dev_init_name += 9;
 + if (strncmp(dev_init_name, can, 3))
 + return ERR_PTR(-ENOENT);

What's that good for? Also it's wrong to rely on the special name of the
node. I think it can be removed.

 + return p1010_rdb_system_clock;

Just returning fsl_get_sys_freq() here would already be fine. I'm also
missing the factor of two here:

return fsl_get_sys_freq() / 2; 

 +}
 +
 +static void p1010_rdb_clk_put(struct clk *clk)
 +{
 + return;
 +}
 +
 +static unsigned long p1010_rdb_clk_get_rate(struct clk *clk)
 +{
 + return clk-rate;
 +}
 +
 +static struct clk_interface p1010_rdb_clk_functions = {
 + .clk_get= p1010_rdb_clk_get,
 + .clk_get_rate   = p1010_rdb_clk_get_rate,
 + .clk_put= p1010_rdb_clk_put,
 +};
 +
 +void __init p1010_rdb_clk_init(void)
 +{
 + p1010_rdb_system_clock.rate = fsl_get_sys_freq();

 + clk_functions = p1010_rdb_clk_functions;
 +}

The name is too specific. The idea is that the interface could be used
for other 85xx processors as well, not only the p1010. The prefix
mpc85xx_ instead of p1010_rdb seems more appropriate to me.

 diff --git a/arch/powerpc/platforms/85xx/p1010rdb.c 
 b/arch/powerpc/platforms/85xx/p1010rdb.c
 index d7387fa..d0afbf9 100644
 --- a/arch/powerpc/platforms/85xx/p1010rdb.c
 +++ b/arch/powerpc

Re: [PATCH 4/4] [powerpc] Add flexcan device support for p1010rdb.

Hi Robin,

On 08/09/2011 02:28 PM, Robin Holt wrote:
 I added a simple clock source for the p1010rdb so the flexcan driver
 could determine a clock frequency.  The p1010 can device only has an
 oscillator of system bus frequency divided by 2.
 
 Signed-off-by: Robin Holt h...@sgi.com
 To: Marc Kleine-Budde m...@pengutronix.de,
 To: Wolfgang Grandegger w...@grandegger.com,
 To: U Bhaskar-B22300 b22...@freescale.com
 Cc: socketcan-c...@lists.berlios.de,
 Cc: net...@vger.kernel.org,
 Cc: PPC list linuxppc-dev@lists.ozlabs.org
 ---
  arch/powerpc/platforms/85xx/Kconfig|2 +
  arch/powerpc/platforms/85xx/Makefile   |2 +
  arch/powerpc/platforms/85xx/clock.c|   42 
 
  arch/powerpc/platforms/85xx/p1010rdb.c |8 ++
  4 files changed, 54 insertions(+), 0 deletions(-)
  create mode 100644 arch/powerpc/platforms/85xx/clock.c
 
 diff --git a/arch/powerpc/platforms/85xx/Kconfig 
 b/arch/powerpc/platforms/85xx/Kconfig
 index 498534c..c4304ae 100644
 --- a/arch/powerpc/platforms/85xx/Kconfig
 +++ b/arch/powerpc/platforms/85xx/Kconfig
 @@ -70,6 +70,8 @@ config MPC85xx_RDB
  config P1010_RDB
   bool Freescale P1010RDB
   select DEFAULT_UIMAGE
 + select HAVE_CAN_FLEXCAN if NET  CAN
 + select PPC_CLOCK if CAN_FLEXCAN
   help
 This option enables support for the MPC85xx RDB (P1010 RDB) board
  
 diff --git a/arch/powerpc/platforms/85xx/Makefile 
 b/arch/powerpc/platforms/85xx/Makefile
 index a971b32..cc7f381 100644
 --- a/arch/powerpc/platforms/85xx/Makefile
 +++ b/arch/powerpc/platforms/85xx/Makefile
 @@ -3,6 +3,8 @@
  #
  obj-$(CONFIG_SMP) += smp.o
  
 +obj-$(CONFIG_PPC_CLOCK)   += clock.o
 +
  obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
  obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
  obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
 diff --git a/arch/powerpc/platforms/85xx/clock.c 
 b/arch/powerpc/platforms/85xx/clock.c
 new file mode 100644
 index 000..a6fd2c8
 --- /dev/null
 +++ b/arch/powerpc/platforms/85xx/clock.c
 @@ -0,0 +1,42 @@
 +
 +#include linux/device.h
 +#include linux/err.h
 +
 +#include asm/clk_interface.h
 +
 +#include sysdev/fsl_soc.h
 +
 +/*
 + * p1010 needs to provide a clock source for the flexcan driver. The
 + * oscillator for the p1010 processor is only ever the system clock / 2.
 + */
 +
 +static struct clk *mpc85xx_clk_get(struct device *dev, const char *id)
 +{
 + if (!dev)
 + return ERR_PTR(-ENOENT);
 +

Ah, I think you removed too much code here. I obviously did not
understand what the device node check is good for, sorry. The clock is
only implemented for the Flexcan and therefore we should add a check here:

if (!dev-of_node ||
!of_device_is_compatible(dev-of_node, fsl,flexcan))
return ERR_PTR(-ENOENT);

Something like that should work. For the next version you can then add
my Acked-by: Wolfgang Grandegger w...@grandegger.com to all patches.

Wolfgang.

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Re: [PATCH 4/4] [powerpc] Add flexcan device support for p1010rdb.

On 08/09/2011 04:55 PM, Robin Holt wrote:
 On Tue, Aug 09, 2011 at 02:45:58PM +, U Bhaskar-B22300 wrote:
 Hi Robin,
  Where are you doing the irq handling ie request_irq() for the powerpc 
 based P1010.
  Or the existing code of ARM based FlexCAN will work for P1010 ??
 
 It appears that the of_device stuff got moved under the struct device
 and that allows the request_irq() to just magically work.

Cool! Actually I was also missing of_address_to_resource (or of_iomap)
and irq_of_parse_and_map(). But the resources seem to be filled in here:

  http://lxr.linux.no/#linux+v3.0.1/drivers/of/platform.c#L121

Wolfgang.

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Re: [PATCH 5/5] [powerpc] Fix up fsl-flexcan device tree binding.

On 08/09/2011 08:17 PM, Scott Wood wrote:
 On 08/09/2011 09:43 AM, Robin Holt wrote:
 In working with the socketcan developers, we have come to the conclusion
 the fsl-flexcan device tree bindings need to be cleaned up. 
 The driver does not depend upon any properties other than the required 
 properties
 so we are removing the file.
 
 That is not the criterion for whether something should be expresed in
 the device tree.  It's a description of the hardware, not a Linux driver
 configuration file.  If there are integration parameters that can not be
 inferred from this is FSL flexcan v1.0, they should be expressed in
 the node.
 
 Removing the binding altogether seems extreme as well -- we should have
 bindings for all devices, even if there are no special properties.

Yes, of course. The commit message misleading. We do not intend to
remove the binding but just a few unused and confusing properties.
Concerning the compatible string, Freescale introduced for the Flexcan
on the P1010 fsl,flexcan-v1.0. That's not the usual convention also
because the v1.0 if for the PowerPC cores only, I assume, but we have
ARM cores as well. If we need to distinguish I think we should use:

  fsl,p1010-flexcan, fsl,flexcan

Do you agree?

 Additionally, the p1010*dts files are not
 following the standard for node naming in that they have a trailing -v1.0.
 
 What standard for node naming?  There's nothing wrong with putting a
 block version number in the compatible string, and it looks like the
 p1010 dts files were following the binding document in this regard.  It
 is common practice when the block version is publicly documented but
 there's no register it can be read from at runtime.

See above.

Furthermore I must admit, that the bindings shown up mainline Linux have
never been presented on any mailing list.

Wolfgang.
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Re: [PATCH 5/5] [powerpc] Fix up fsl-flexcan device tree binding.

On 08/09/2011 09:13 PM, Scott Wood wrote:
On 08/09/2011 01:45 PM, Robin Holt wrote:
On Tue, Aug 09, 2011 at 01:17:47PM -0500, Scott Wood wrote:
On 08/09/2011 09:43 AM, Robin Holt wrote:
In working with the socketcan developers, we have come to the conclusion
the fsl-flexcan device tree bindings need to be cleaned up.
The driver does not depend upon any properties other than the required
properties
so we are removing the file.

That is not the criterion for whether something should be expresed in
the device tree. It's a description of the hardware, not a Linux driver
configuration file. If there are integration parameters that can not be
inferred from this is FSL flexcan v1.0, they should be expressed in
the node.

There are no properties other than the required properties. The others
were wrongly introduced and are not needed by the driver.

Not needed by this driver, or will never be needed by any reasonable
driver (or is not a good description of the hardware)?

The device tree is not an internal Linux implementation detail. It is
shared by other OSes, firmwares, hypervisors, etc. Bindings should be
created with care, and kept stable unless there's a good reason to break
compatibility.

devicetree-disc...@lists.ozlabs.org should be CCed on device tree
discussions.

Yes. The doc for the bindings we speak about

http://lxr.linux.no/#linux+v3.0.1/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt

sneaked into the kernel without been presented on any mailing list and
without the corresponding driver patch.

When we
removed the other properties and the wrong documentation of the mscan
oscillator source in the fsl-flexcan.txt file, we were left with an
Example: section and a one-line statement The only properties supported
are the required properties. That seemed like the fsl-flexcan.txt
file was then pointless.

There is the compatible string, and you could mention that there is a
single reg resource and a single interrupt.

Removing the binding altogether seems extreme as well -- we should have
bindings for all devices, even if there are no special properties.

Ok. I can do that too. Who is the definitive source for that answer?

For policy questions on device tree bindings? Grant Likely is the
maintainer for device tree stuff.

A lot of the simpler bindings have been left undocumented so far, IMHO
it should be a goal to document them all. There are some existing ones
that are documented despite not having special properties, e.g.
Documentation/devicetree/bindings/serio/altera_ps2.txt,
Documentation/devicetree/bindings/arm/sirf.txt,
Documentation/devicetree/bindings/powerpc/nintendo/wii.txt, etc.

I assume we are talking about the fsl-flexcan.txt file when we say
binding. Is that correct?

Yes, although devicetree.org is another possibility.

Additionally, the p1010*dts files are not
following the standard for node naming in that they have a trailing -v1.0.

What standard for node naming? There's nothing wrong with putting a

For the answer to that, you will need to ask Wolfgang Grandegger. I was
working from his feedback. Looking at the plethora of other node names,
the vast majority do not have any -v#.#, and the ones that do also tend
to have multiple versions. Based upon that, I suspect he is correct,
but I do not know where the documentation is or if it even exists.

There's a lot of crap in old bindings, plus it's not appropriate for all
circumstances (specifying bindings should be done a little more
carefully than what do most other bindings do?). It's something we've
been doing lately for blocks that have a version number, but it's not
dynamically readable.

Looking in the FlexCAN chapter of the p1010 manual, I don't see any
reference to a block version, and I do see references to previous
FlexCAN versions. So I suggest fsl,p1010-flexcan.

OK, just

fsl,p1010-flexcan

fsl,p1010-flexcan, fsl,flexcan

Note that the Flexcan is used on Freescale ARM cores as well (and device
tree for ARM will show up soon).

Wolfgang.
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Re: [RFC 4/4] [powerpc] Implement a p1010rdb clock source.

2011-08-08 Thread Wolfgang Grandegger

On 08/06/2011 10:59 PM, Kumar Gala wrote:
 
 On Aug 6, 2011, at 3:50 PM, Robin Holt wrote:
 
 On Sat, Aug 06, 2011 at 11:52:45AM -0500, Kumar Gala wrote:

 On Aug 6, 2011, at 8:58 AM, Marc Kleine-Budde wrote:

 On 08/06/2011 06:05 AM, Robin Holt wrote:
 flexcan driver needs the clk_get, clk_get_rate, etc functions
 to work.  This patch provides the minimum functionality.

 This patch has to go via the powerpc git tree. Added
 linuxppc-dev@lists.ozlabs.org on CC.

 Signed-off-by: Robin Holt h...@sgi.com
 To: Marc Kleine-Budde m...@pengutronix.de
 To: Wolfgang Grandegger w...@grandegger.com
 To: U Bhaskar-B22300 b22...@freescale.com
 Cc: socketcan-c...@lists.berlios.de
 Cc: net...@vger.kernel.org
 ---
 arch/powerpc/platforms/85xx/p1010rdb.c |   78 
 
 1 files changed, 78 insertions(+), 0 deletions(-)

 NAK.

 This doesn't look right at all.  We should be doing something based on the 
 device tree node that isn't board specific.

 I believe Bhaskar has a version of flexcan support that he's been working 
 on cleanup up for upstream.

 That version may be similar to what is in the freescale BSP which puts
 the clock functions inside flexcan.c

 The powerpc arch already provides a means for individual boards to provide
 the clock functions.  I am not posting this patch here for acceptance
 for powerpc and I am sure I will get feedback there when I post to
 their mailing list.  I am posting it here only to show that the flexcan
 developers earlier assertion that this can and should be done in the arch
 tree is correct and will work for the p1010 assuming we can get changes
 into the arch/powerpc directory to implement these clk_* functions.
 
 My point is that I don't think they should live in the arch code.  The clk_* 
 functions you want to implement are tied more the FlexCAN IP than anything 
 arch specific.  As such I believe they should be in the driver.
 
 For example when FSL has a P with FlexCAN on it, we should NOT have to 
 add any arch code to support it.

The Flexcan is found on ARM and now also on PowerPC SOCs. My current
understanding is that the ability to set the clock source and divider is
only available on PowerPC SOCs and therefore it's clearly arch specific
and should go to arch/powerpc/sysdev/fsl_soc.c if it's common for all
PowerPC platforms. What do you think?

Wolfgang.

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Re: GPIO IRQ on P1022

2011-07-31 Thread Wolfgang Grandegger

On 07/31/2011 12:38 PM, Felix Radensky wrote:
 Hi,
 
 I'm running kernel 3.0 on a custom board based on Freescale P1022.
 The interrupt line of on-board FPGA is connected to GPIO2_9. FPGA
 IRQ is level, active low. The GPIOs are mapped like this:
 
 GPIOs 160-191, /soc@ffe0/gpio-controller@f200:
 
 GPIOs 192-223, /soc@ffe0/gpio-controller@f100:
 
 GPIOs 224-255, /soc@ffe0/gpio-controller@f000:
 
 I've verified that pin mixing is done correctly, and the
 FPGA IRQ line is indeed configured as GPIO.
 
 I have the following code in my driver:
 
 #define FPGA_IRQ_GPIO 169
 
 err = gpio_request(FPGA_IRQ_GPIO, FPGA IRQ);
 if (err) {
 printk(KERN_ERR Failed to request FPGA IRQ GPIO, err=%d\n, err);
 goto out;
 }
 
 gpio_direction_input(FPGA_IRQ_GPIO);
 
 irq = gpio_to_irq(FPGA_IRQ_GPIO);
 if (irq  0) {
 printk(KERN_ERR Failed to map FPGA GPIO to IRQ\n);
 goto out;
 }
 
 err = request_irq(irq, gsat_interrupt,
   IRQF_TRIGGER_FALLING, DRVNAME, priv);
 
 Interrupt handler reads FPGA interrupt status register to clear
 interrupt
 and exits.
 
 What happens when I load my driver is single execution of interrupt
 handler
 followed by system freeze. Even if I call disable_irq() in interrupt
 handler the
 system still freezes.

Try disable_irq_nosync() instead.

Wolfgang.

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Re: GPIO IRQ on P1022

2011-07-31 Thread Wolfgang Grandegger

Hi Felix,

On 07/31/2011 05:51 PM, Felix Radensky wrote:
 Hi Wolfgang,
 
 On 07/31/2011 06:19 PM, Wolfgang Grandegger wrote:
 On 07/31/2011 12:38 PM, Felix Radensky wrote:
 Hi,

 I'm running kernel 3.0 on a custom board based on Freescale P1022.
 The interrupt line of on-board FPGA is connected to GPIO2_9. FPGA
 IRQ is level, active low. The GPIOs are mapped like this:

Here you say that it's a level sensitive interrupt but ...

 GPIOs 160-191, /soc@ffe0/gpio-controller@f200:

 GPIOs 192-223, /soc@ffe0/gpio-controller@f100:

 GPIOs 224-255, /soc@ffe0/gpio-controller@f000:

 I've verified that pin mixing is done correctly, and the
 FPGA IRQ line is indeed configured as GPIO.

 I have the following code in my driver:

  #define FPGA_IRQ_GPIO 169

  err = gpio_request(FPGA_IRQ_GPIO, FPGA IRQ);
  if (err) {
  printk(KERN_ERR Failed to request FPGA IRQ GPIO, err=%d\n,
 err);
  goto out;
  }

  gpio_direction_input(FPGA_IRQ_GPIO);

  irq = gpio_to_irq(FPGA_IRQ_GPIO);
  if (irq  0) {
  printk(KERN_ERR Failed to map FPGA GPIO to IRQ\n);
  goto out;
  }

  err = request_irq(irq, gsat_interrupt,
IRQF_TRIGGER_FALLING, DRVNAME, priv);

.. you request here an edge triggered interrupt.

Wolfgang.

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Re: [PATCH][upstream] powerpc: Adding bindings for flexcan controller

2011-06-26 Thread Wolfgang Grandegger

On 04/19/2011 03:58 PM, Bhaskar Upadhaya wrote:
 From: Bhaskar Upadhaya bhaskar.upadh...@freescale.com
 
 Signed-off-by: Bhaskar Upadhaya bhaskar.upadh...@freescale.com
 Acked-By: Scott Wood scottw...@freescale.com
 ---
 Based upon 
 git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git (branch 
 - master)
 
  .../devicetree/bindings/net/can/fsl-flexcan.txt|   61 
 
  1 files changed, 61 insertions(+), 0 deletions(-)
  create mode 100755 Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
 
 diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt 
 b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
 new file mode 100755
 index 000..1a729f0
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
 @@ -0,0 +1,61 @@
 +CAN Device Tree Bindings
 +
 +2011 Freescale Semiconductor, Inc.
 +
 +fsl,flexcan-v1.0 nodes
 +---
 +In addition to the required compatible-, reg- and interrupt-properties, you 
 can
 +also specify which clock source shall be used for the controller.
 +
 +CPI Clock- Can Protocol Interface Clock
 + This CLK_SRC bit of CTRL(control register) selects the clock source to
 + the CAN Protocol Interface(CPI) to be either the peripheral clock
 + (driven by the PLL) or the crystal oscillator clock. The selected clock
 + is the one fed to the prescaler to generate the Serial Clock (Sclock).
 + The PRESDIV field of CTRL(control register) controls a prescaler that
 + generates the Serial Clock (Sclock), whose period defines the
 + time quantum used to compose the CAN waveform.
 +
 +Can Engine Clock Source
 + There are two sources for CAN clock
 + - Platform Clock  It represents the bus clock
 + - Oscillator Clock
 +
 + Peripheral Clock (PLL)
 + --
 +  |
 + - -
 + |   |CPI Clock| Prescaler |   Sclock
 + |   || (1.. 256) |
 + - -
 + |  |
 + --  -CLK_SRC
 + Oscillator Clock
 +
 +- fsl,flexcan-clock-source : CAN Engine Clock Source.This property selects
 +  the peripheral clock. PLL clock is fed to the
 +  prescaler to generate the Serial Clock (Sclock).
 +  Valid values are oscillator and platform
 +  oscillator: CAN engine clock source is 
 oscillator clock.
 +  platform The CAN engine clock source is the bus 
 clock
 +  (platform clock).
 +
 +- fsl,flexcan-clock-divider : for the reference and system clock, an 
 additional
 +   clock divider can be specified.
 +- clock-frequency: frequency required to calculate the bitrate for FlexCAN.
 +
 +Note:
 + - v1.0 of flexcan-v1.0 represent the IP block version for P1010 SOC.
 + - P1010 does not have oscillator as the Clock Source.So the default
 +   Clock Source is platform clock.
 +Examples:
 +
 + can0@1c000 {
 + compatible = fsl,flexcan-v1.0;
 + reg = 0x1c000 0x1000;
 + interrupts = 48 0x2;
 + interrupt-parent = mpic;
 + fsl,flexcan-clock-source = platform;
 + fsl,flexcan-clock-divider = 2;
 + clock-frequency = fixed by u-boot;
 + };

I just realized that this patch has hit the mainline kernel but I do not
find the implementation for that new binding. Have I missed something?

Wolfgang.
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High process latencies due to MPC5200 FEC hard- soft-irq processing

2010-07-13 Thread Wolfgang Grandegger

Hello,

we realized, that multiple ping floods (ping -f) can cause very large
high-priority process latencies (up to a many seconds) on a MPC5200
PowerPC system with FEC NAPI support. The latencies are measured with

  # cyclictest -p 80 -n

The problem is that processing of the ICMP pakets in the Hard-Irq and
Soft-IRQ context can last for a long time without returning to the
scheduler. Reducing MAX_SOFTIRQ_RESTART from 10 to 2 helps - the latency
goes down to 35 ms with 2 ping -f - but it's not a configurable
parameter, even if it somehow depends on the CPU power. And using the
-rt patches seems overkill to me. Any other ideas or comments on how to
get rid of such high process latencies?

Wolfgang.
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Re: CAN Subsystem and MPC52xx onboard controller

2010-06-10 Thread Wolfgang Grandegger

On 06/10/2010 10:41 AM, Roman Fietze wrote:
 Hello List Members,
 
 I have tried multiple versions/branches and git repos (torvalds,
 benh/{next,master}, denx, pengutronix, ...) to get a 2.6.34 or HEAD
 version of that repos that compiles w/o errors when the CAN subsystem
 is enabled and the MPC5xxx onboard driver is selected starting with
 the lite5200b_defconfig.
 
 Until now I'm out of luck. If other's also have compile problems I can
 of course offer to try to dig into the sources.

Hm, kernel.org's linux-2.6.34.tar.bz2 builds here just fine with
lite5200b_defconfig and Socket-CAN support enabled for the MSCAN. I can
imaging that there are issues with more recent -rc versions due to
Grant's OF platform device generalization. Also the DTS entries entries
for MSCAN in lite5200b.dts seem OK.

 Q0:
 
 I'm somewhat unsure what repos to use in general to develop using the
 2.6 on a Lite5200B compatible board (for the 2.4 we always used the
 DENX repos).

Please use the mainline kernel for that board.

Wolfgang.
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Re: CAN Subsystem and MPC52xx onboard controller

2010-06-10 Thread Wolfgang Grandegger

On 06/10/2010 11:29 AM, Roman Fietze wrote:
 Hello Wolfram,
 
 On Thursday 10 June 2010 10:59:23 Wolfram Sang wrote:
 
 The mainline kernel works fine here with Phytec based MPC5xxx-boards.
 
 Reading your answer made me hope again, and I just pulled the newest
 HEAD from the mainline kernel and tried it once more. Now it compiles.
 Thanks for retriggering me again.
 
 All the other's sill have problems, except pengutronix, most of them
 with an inconsistency (with the socket CAN files?), which shows up as
 
   'struct can_bittime_std' declared inside parameter list
 
 in net/can/dev.c:69

With all other you mean the linux-2.6-denx tree!? These seem to be some
reminders of the old Socket-CAN support merged into that tree (master
branch). I will clean that up a.s.a.p. Nevertheless, whenever possible,
you should use the mainline kernel.

 So I assume we will switch to the mainline kernel, which we already
 use for Atom based x86 development on the MEN boards.

DENX tries to push patches upstream as fast as possible and new projects
are usually based on the mainline kernel tree.

Wolfgang.


 
 Thanks once more
 
 Roman
 

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Re: [PATCH v3 1/3] ptp: Added a brand new class driver for ptp clocks.

2010-05-17 Thread Wolfgang Grandegger

On 05/14/2010 06:45 PM, Richard Cochran wrote:
 This patch adds an infrastructure for hardware clocks that implement
 IEEE 1588, the Precision Time Protocol (PTP). A class driver offers a
 registration method to particular hardware clock drivers. Each clock is
 exposed to user space as a character device with ioctls that allow tuning
 of the PTP clock.
 
 Signed-off-by: Richard Cochran richard.coch...@omicron.at

Tested-by: Wolfgang Grandegger w...@denx.de

on my Freescale MPC8313 setup with ptpd and ptpv2d.

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Re: [PATCH v3 3/3] ptp: Added a clock that uses the eTSEC found on the MPC85xx.

2010-05-17 Thread Wolfgang Grandegger

On 05/14/2010 06:46 PM, Richard Cochran wrote:
 The eTSEC includes a PTP clock with quite a few features. This patch adds
 support for the basic clock adjustment functions, plus two external time
 stamps and one alarm.
 
 Signed-off-by: Richard Cochran richard.coch...@omicron.at

Tested-by: Wolfgang Grandegger w...@denx.de

on my Freescale MPC8313 setup with ptpd and ptpv2d.

FYI: checkplatch.pl reports various errors for this patch series.

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Re: MPC5200B, many FEC_IEVENT_RFIFO_ERRORs until link down

2010-04-05 Thread Wolfgang Grandegger

Hallo Roman,

Roman Fietze wrote:
 Hallo Wolfgang,
 
 On Wednesday 31 March 2010 12:15:47 Wolfgang Grandegger wrote:
 
 I just sent out the patch.
 
 Thanks a lot.
 
 Would be nice if you, or somebody else, could do some testing and
 provide some feedback.
 
 I tested the patches with the following setup:
 
 - DENX 2.6.33 plus NAPI patch, kernel config with and w/o NAPI enabled
 
 - Own Icecube based board using MPC5200B
 
 - Two different hard drives (because the Toshiba gave my headaches),
   ext3 default settings of mkfs.ext3, MWDMA2
 
 - FPGA on LPC receiving high bandwidth MOST150 data in PIO mode (for
   the test: generating them internally), small app writing the data to
   disk. Why PIO? SCLPC FIFO gave 
 
 - netcat receving data optionally writing the data to HD, sender is a
   Gigabit Intel NIC feeded using netcat (and /dev/zero) as well via a
   100MBit/s switch
 
 
 And now the first and preliminary results of the tests (see legend and
 description of the results below the table):
 
 NAPI  MOSTHD load bw  rx_irq  rfifo
 --+---+---+---+---+---+---
   nc  most
 ==+===+===+===+===+===+===
 
 onoff MK4036GA93  5.1532000-35000
   -   99  10.572000-74000
 
   on  MK4036GA49  46  crash   15000-17500 none 
 seen
   on  HEJ421010G9AT00 48  47  15000-17500 
 ~100-500, recovers
 
 --+---+---+---+---+---+---
 
 off   off MK4036GA90  5.1534000-36000
   -   99  10.576000-77000
 
   on  MK4036GA48  47  crash   17500-19000 ~200, 
 network down
 
 Legend:
 ---
 
 MOST: PIO mode access to FPGA receiving generated MOST150 data
   very high data rates possible
 HD:   used disk type
 load/nc:  load netcat, %
 load/most:load MOST receiver app, %
 load/idle:was always 0%
 bw:   netcat network band width, MB/s
 rx_irq:   FEX RX IRQ, rate in Hz
 rfifo:RX FIFO errors, time in between in seconds
 
 Results:
 
 
 Using the MK4036GA HD always crashes IDE after a few seconds. A reboot
 does not recover the disk, I always need a power cycle. That's why I
 switched to a HEJ421010G9AT00.

That might be a different issue.

 NAPI reduces the FEC RX interrupt rate (/proc/interrupts) somewhat.
 Could not detect an increase of the maximum bandwidth, but that's not
 the problem of NAPI.

I realized the same behavior.

 NAPI nicely recovers more or less nicely from link down (link down to
 up about 1 second), without NAPI I have to do that manually (e.g. ip
 set link down/up). That's something I was looking for since the
 modular PHY drivers.

Recovering from link down takes a while, unfortunately. I also do not
yet have an explanation why the link goes down, at all. The rather long
recovery time does not harm for my use case of heavy packet storms but
is rather annoying a high but not yet critical traffic.

 Some network applications (e.g. our Car Head Unit GN Protocol Logger)
 break up their connection when the link goes down (e.g. due to
 internal timeouts? Probably fixable). Ssh and netcat connections stay
 up.

That's a problem due to the overloaded network.

 Transferred many GiB of data to the MPC w/o any problems except those
 recoverable FEC_IEVENT_RFIFO_ERRORs.
 
 This patch really looks good to me.

Doesn't sound too bad...

 I will run some additional tests e.g. with mixed RX and TX, different
 and varying data rates, etc.

OK.

Wolfgang.
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[RFC-PATCH] fec_mpc52xx: add NAPI support

2010-03-31 Thread Wolfgang Grandegger

This patch adds NAPI support to the MPC52xx FEC network driver. The main
reason for using NAPI is to solve the problem of system hangs under
heavy packet storms causing interrupt flooding. While NAPI support is
straight-forward, recovering from RX FIFO errors is more delicate.
Actually, under packet storms, the RX FIFO error is triggered, requiring
a full reset of the FEC and the Bestcom tasks. Furthermore, the link
goes down and the only way to recover is to reset the phy as well. To
handle the reset properly, it's performed by a work queue task. The
reset does not really harm because the packets can not be digested
(processed) by the system at that rate anyhow. NAPI can be enabled via
Kconfig parameter CONFIG_FEC_MPC52xx_NAPI. Throughput measurements with
netperf showed almost the same results with and without NAPI.

Signed-off-by: Wolfgang Grandegger w...@denx.de
---
 drivers/net/Kconfig   |7 +++
 drivers/net/fec_mpc52xx.c |  121 -
 drivers/net/fec_mpc52xx_phy.c |4 +-
 3 files changed, 127 insertions(+), 5 deletions(-)

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 0ba5b8e..b973e28 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1938,6 +1938,13 @@ config FEC_MPC52xx
  Fast Ethernet Controller
  If compiled as module, it will be called fec_mpc52xx.
 
+config FEC_MPC52xx_NAPI
+   bool Use NAPI for MPC52xx FEC driver
+   depends on FEC_MPC52xx
+   ---help---
+ This option enables NAPI support for the MPC5200's on-chip
+ Fast Ethernet Controller driver.
+
 config FEC_MPC52xx_MDIO
bool MPC52xx FEC MDIO bus driver
depends on FEC_MPC52xx
diff --git a/drivers/net/fec_mpc52xx.c b/drivers/net/fec_mpc52xx.c
index 0dbd721..bb64a72 100644
--- a/drivers/net/fec_mpc52xx.c
+++ b/drivers/net/fec_mpc52xx.c
@@ -27,6 +27,7 @@
 #include linux/of_device.h
 #include linux/of_mdio.h
 #include linux/of_platform.h
+#include linux/workqueue.h
 
 #include linux/netdevice.h
 #include linux/etherdevice.h
@@ -44,6 +45,8 @@
 
 #define DRIVER_NAME mpc52xx-fec
 
+#define FEC_MPC52xx_NAPI_WEIGHT 64
+
 /* Private driver data structure */
 struct mpc52xx_fec_priv {
struct net_device *ndev;
@@ -63,6 +66,10 @@ struct mpc52xx_fec_priv {
struct phy_device *phydev;
enum phy_state link;
int seven_wire_mode;
+#ifdef CONFIG_FEC_MPC52xx_NAPI
+   struct work_struct reset_task;
+   struct napi_struct napi;
+#endif
 };
 
 
@@ -234,6 +241,10 @@ static int mpc52xx_fec_open(struct net_device *dev)
phy_start(priv-phydev);
}
 
+#ifdef CONFIG_FEC_MPC52xx_NAPI
+   napi_enable(priv-napi);
+#endif
+
if (request_irq(dev-irq, mpc52xx_fec_interrupt, IRQF_SHARED,
DRIVER_NAME _ctrl, dev)) {
dev_err(dev-dev, ctrl interrupt request failed\n);
@@ -281,6 +292,9 @@ static int mpc52xx_fec_open(struct net_device *dev)
priv-phydev = NULL;
}
 
+#ifdef CONFIG_FEC_MPC52xx_NAPI
+   napi_disable(priv-napi);
+#endif
return err;
 }
 
@@ -288,6 +302,10 @@ static int mpc52xx_fec_close(struct net_device *dev)
 {
struct mpc52xx_fec_priv *priv = netdev_priv(dev);
 
+#ifdef CONFIG_FEC_MPC52xx_NAPI
+   cancel_work_sync(priv-reset_task);
+   napi_disable(priv-napi);
+#endif
netif_stop_queue(dev);
 
mpc52xx_fec_stop(dev);
@@ -386,10 +404,44 @@ static irqreturn_t mpc52xx_fec_tx_interrupt(int irq, void 
*dev_id)
return IRQ_HANDLED;
 }
 
+#ifdef CONFIG_FEC_MPC52xx_NAPI
 static irqreturn_t mpc52xx_fec_rx_interrupt(int irq, void *dev_id)
 {
struct net_device *dev = dev_id;
struct mpc52xx_fec_priv *priv = netdev_priv(dev);
+   unsigned long flags;
+
+   spin_lock_irqsave(priv-lock, flags);
+
+   /* Disable the RX interrupt */
+   if (napi_schedule_prep(priv-napi)) {
+   disable_irq_nosync(irq);
+   __napi_schedule(priv-napi);
+   } else {
+   dev_err(dev-dev.parent, FEC BUG: interrupt while in poll\n);
+   }
+
+   spin_unlock_irqrestore(priv-lock, flags);
+
+   return IRQ_HANDLED;
+}
+#endif
+
+#ifdef CONFIG_FEC_MPC52xx_NAPI
+static int mpc52xx_fec_rx_poll(struct napi_struct *napi, int budget)
+#else
+static irqreturn_t mpc52xx_fec_rx_interrupt(int irq, void *dev_id)
+#endif
+{
+#ifdef CONFIG_FEC_MPC52xx_NAPI
+   struct mpc52xx_fec_priv *priv =
+   container_of(napi, struct mpc52xx_fec_priv, napi);
+   struct net_device *dev = napi-dev;
+   int pkt_received = 0;
+#else
+   struct net_device *dev = dev_id;
+   struct mpc52xx_fec_priv *priv = netdev_priv(dev);
+#endif
struct sk_buff *rskb; /* received sk_buff */
struct sk_buff *skb;  /* new sk_buff to enqueue in its place */
struct bcom_fec_bd *bd;
@@ -400,7 +452,11 @@ static irqreturn_t mpc52xx_fec_rx_interrupt(int irq, void 
*dev_id)
spin_lock_irqsave(priv-lock

Re: MPC5200B, many FEC_IEVENT_RFIFO_ERRORs until link down

2010-03-31 Thread Wolfgang Grandegger

Hi Roman,

Wolfgang Grandegger wrote:
 Roman Fietze wrote:
 Hello,

 I think this is a never ending story. This error still happens under
 higher load every few seconds, until I get a PHY: f0003000:00 - Link
 is Down, on my box easiliy reproducable after maybe 15 to 30 seconds.
 I can recover using ip link set down/up dev eth0.

 I double checked that I'm using the most recent version of this driver
 (checked with DENX, benh master/next, using Wolfgang Denk's version of
 the 2.6.33), this includes the locking patches from Asier Llano, the
 hard setting of mii_speed in the PHY mdio transfer routine of course.
 I tried all 8 combinations of PLDIS, BSDIS and SE, with and without
 CONFIG_NOT_COHERENT_CACHE.

 As some of you probably remember, I'm running this controller under
 high load on FEC, ATA and LPC. As soon as the load is going above a
 certain level I get those FEC RFIFO errors, sometimes ATA errors
 (MWDMA2) and sometimes even lost SDMA interrupts using BestComm with
 the SCLPC (now switched back to simple PIO). I quite sure almost all
 of this is the BestComm's fault.
 
 This problem shows up quickly with NAPI, but I have never observed it
 with the current version. The error occurs when the software is not able
 to readout the messages in time. Unfortunately, dealing with Bestcomm is
 a pain.
 
 Did somebody already try the latest NAPI patches, which might give me
 a slight chance to have a workaround? Any idea or upcoming patch to
 address this problem once more, and if it's just by recovering e.g.
 within mpc52xx_fec_mdio_transfer's timeout using some other dirty
 workaround?
 
 Yes, I have a NAPI version ready for testing. I will roll it out as RFC
 today or tomorrow.

I just sent out the patch. Would be nice if you, or somebody else, could
do some testing and provide some feedback. FYI, I will be out of office
next week.

Thanks,

Wolfgang.


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Re: MPC5200B, many FEC_IEVENT_RFIFO_ERRORs until link down

2010-03-30 Thread Wolfgang Grandegger

Roman Fietze wrote:
 Hello,
 
 I think this is a never ending story. This error still happens under
 higher load every few seconds, until I get a PHY: f0003000:00 - Link
 is Down, on my box easiliy reproducable after maybe 15 to 30 seconds.
 I can recover using ip link set down/up dev eth0.
 
 I double checked that I'm using the most recent version of this driver
 (checked with DENX, benh master/next, using Wolfgang Denk's version of
 the 2.6.33), this includes the locking patches from Asier Llano, the
 hard setting of mii_speed in the PHY mdio transfer routine of course.
 I tried all 8 combinations of PLDIS, BSDIS and SE, with and without
 CONFIG_NOT_COHERENT_CACHE.
 
 As some of you probably remember, I'm running this controller under
 high load on FEC, ATA and LPC. As soon as the load is going above a
 certain level I get those FEC RFIFO errors, sometimes ATA errors
 (MWDMA2) and sometimes even lost SDMA interrupts using BestComm with
 the SCLPC (now switched back to simple PIO). I quite sure almost all
 of this is the BestComm's fault.

This problem shows up quickly with NAPI, but I have never observed it
with the current version. The error occurs when the software is not able
to readout the messages in time. Unfortunately, dealing with Bestcomm is
a pain.

 Did somebody already try the latest NAPI patches, which might give me
 a slight chance to have a workaround? Any idea or upcoming patch to
 address this problem once more, and if it's just by recovering e.g.
 within mpc52xx_fec_mdio_transfer's timeout using some other dirty
 workaround?

Yes, I have a NAPI version ready for testing. I will roll it out as RFC
today or tomorrow.

Wolfgang.
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Re: Linux patches for XIP on MPC8xx?

2010-03-23 Thread Wolfgang Grandegger

Németh Márton wrote:
 Hi Wolfgang,
 
 I found your homepage at 
 http://www.denx.de/wiki/bin/view/DULG/ConfigureLinuxForXIP back
 from 2003. Was there any follow up of your patch for kernel 2.4.4?

Not that I remember.

Wolfgang.
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[PATCH v8 0/4] i2c-mpc: add support for the Freescale MPC512x and other fixes

This patch series adds support for the MPC512x from Freescale to the
i2c-mpc driver. At that occasion, issues with  __devinit[data] have
been fixed and the doc of the FSL I2C dts bindings updated. It has
been tested on a MPC5121ADS, TQM5200 and TQM8560 board

Changes since v1:

- use macro MPC_I2C_CLOCK_PRESERVE/SAFE for the special clock settings.
- document the special DTS node fsl,mpc5121-i2c-ctrl.
- update and correct the Kconfig help.
- some other minor fixes as suggested by Wolfram.

Changes since v2:

- use __init[data] instead of __devinit[data] for this driver.

Changes since v3:

- switch back to __devinit[data] as pointed out by Ben.

Changes since v4:

- check MPC_I2C_CLOCK_SAFE instead of !clock as suggested by Wolfram.
- update MODULE_DESCRIPTION().

Changes since v5 (suggested by Grant Likely):

- various correctings for labling initialization functions and data
  (this is tricky because section mismatches are not always obvious).
- add a separate patch for renaming the setclock into setup functions.
- correct the doc of the I2C bindings, e.g. don't mention the legacy
  clock setting and remove obsolte parts.

Changes since v6:

- use __devinitconst for const data as suggested by Stephen Rothwell.

Changes since v7:

- fix non-bisectable patch 1 as pointed out by Grant Likely.

Wolfgang

Wolfgang Grandegger (4):
  i2c-mpc: use __devinit[data] for initialization functions and data
  i2c-mpc: rename setclock initialization functions to setup
  i2c-mpc: add support for the MPC512x processors from Freescale
  powerpc: doc/dts-bindings: update doc of FSL I2C bindings

 Documentation/powerpc/dts-bindings/fsl/i2c.txt |   30 +++-
 drivers/i2c/busses/Kconfig |7 +-
 drivers/i2c/busses/i2c-mpc.c   |  194 +++-
 3 files changed, 146 insertions(+), 85 deletions(-)

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[PATCH v8 1/4] i2c-mpc: use __devinit[data] for initialization functions and data

From: Wolfgang Grandegger w...@denx.de

__devinit[data] has not yet been used for all initialization functions
and data. To avoid truncating lines, the struct mpc_i2c_match_data has
been renamed to mpc_i2c_data, which is even the better name.

Signed-off-by: Wolfgang Grandegger w...@denx.de
Tested-by: Wolfram Sang w.s...@pengutronix.de
---
 drivers/i2c/busses/i2c-mpc.c |   99 +++--
 1 files changed, 46 insertions(+), 53 deletions(-)

diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index f627001..2f74d9b 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -66,7 +66,7 @@ struct mpc_i2c_divider {
u16 fdr;/* including dfsrr */
 };
 
-struct mpc_i2c_match_data {
+struct mpc_i2c_data {
void (*setclock)(struct device_node *node,
 struct mpc_i2c *i2c,
 u32 clock, u32 prescaler);
@@ -165,7 +165,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, 
int writing)
 }
 
 #ifdef CONFIG_PPC_MPC52xx
-static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
+static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] __devinitconst = {
{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
{36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
@@ -186,7 +186,8 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] 
= {
{10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f}
 };
 
-int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
+static int __devinit mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock,
+ int prescaler)
 {
const struct mpc_i2c_divider *div = NULL;
unsigned int pvr = mfspr(SPRN_PVR);
@@ -215,9 +216,9 @@ int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 
clock, int prescaler)
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void mpc_i2c_setclock_52xx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -230,15 +231,15 @@ static void mpc_i2c_setclock_52xx(struct device_node 
*node,
dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
 }
 #else /* !CONFIG_PPC_MPC52xx */
-static void mpc_i2c_setclock_52xx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
 }
 #endif /* CONFIG_PPC_MPC52xx*/
 
 #ifdef CONFIG_FSL_SOC
-static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
+static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] __devinitconst = {
{160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123},
{288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102},
{416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127},
@@ -258,7 +259,7 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] 
= {
{49152, 0x011e}, {61440, 0x011f}
 };
 
-u32 mpc_i2c_get_sec_cfg_8xxx(void)
+static u32 __devinit mpc_i2c_get_sec_cfg_8xxx(void)
 {
struct device_node *node = NULL;
u32 __iomem *reg;
@@ -287,7 +288,8 @@ u32 mpc_i2c_get_sec_cfg_8xxx(void)
return val;
 }
 
-int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler)
+static int __devinit mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock,
+ u32 prescaler)
 {
const struct mpc_i2c_divider *div = NULL;
u32 divider;
@@ -320,9 +322,9 @@ int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 
clock, u32 prescaler)
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void mpc_i2c_setclock_8xxx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -338,9 +340,9 @@ static void mpc_i2c_setclock_8xxx(struct device_node *node,
 }
 
 #else /* !CONFIG_FSL_SOC */
-static void mpc_i2c_setclock_8xxx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node

[PATCH v8 2/4] i2c-mpc: rename setclock initialization functions to setup

From: Wolfgang Grandegger w...@denx.de

To prepare  support for the MPC512x processors from Freescale the
setclock initialization functions have been renamed to setup
because I2C interrupts must be enabled for the MPC512x by this
function as well.

Signed-off-by: Wolfgang Grandegger w...@denx.de
Acked-by: Wolfram Sang w.s...@pengutronix.de
---
 drivers/i2c/busses/i2c-mpc.c |   42 --
 1 files changed, 20 insertions(+), 22 deletions(-)

diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 2f74d9b..370c342 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -67,9 +67,8 @@ struct mpc_i2c_divider {
 };
 
 struct mpc_i2c_data {
-   void (*setclock)(struct device_node *node,
-struct mpc_i2c *i2c,
-u32 clock, u32 prescaler);
+   void (*setup)(struct device_node *node, struct mpc_i2c *i2c,
+ u32 clock, u32 prescaler);
u32 prescaler;
 };
 
@@ -216,9 +215,9 @@ static int __devinit mpc_i2c_get_fdr_52xx(struct 
device_node *node, u32 clock,
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -231,9 +230,9 @@ static void __devinit mpc_i2c_setclock_52xx(struct 
device_node *node,
dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
 }
 #else /* !CONFIG_PPC_MPC52xx */
-static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
 }
 #endif /* CONFIG_PPC_MPC52xx*/
@@ -322,9 +321,9 @@ static int __devinit mpc_i2c_get_fdr_8xxx(struct 
device_node *node, u32 clock,
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setup_8xxx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -340,9 +339,9 @@ static void __devinit mpc_i2c_setclock_8xxx(struct 
device_node *node,
 }
 
 #else /* !CONFIG_FSL_SOC */
-static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setup_8xxx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
 }
 #endif /* CONFIG_FSL_SOC */
@@ -533,12 +532,11 @@ static int __devinit fsl_i2c_probe(struct of_device *op,
if (match-data) {
struct mpc_i2c_data *data =
(struct mpc_i2c_data *)match-data;
-   data-setclock(op-node, i2c, clock, data-prescaler);
+   data-setup(op-node, i2c, clock, data-prescaler);
} else {
/* Backwards compatibility */
if (of_get_property(op-node, dfsrr, NULL))
-   mpc_i2c_setclock_8xxx(op-node, i2c,
- clock, 0);
+   mpc_i2c_setup_8xxx(op-node, i2c, clock, 0);
}
}
 
@@ -585,20 +583,20 @@ static int __devexit fsl_i2c_remove(struct of_device *op)
 };
 
 static struct mpc_i2c_data mpc_i2c_data_52xx __devinitdata = {
-   .setclock = mpc_i2c_setclock_52xx,
+   .setup = mpc_i2c_setup_52xx,
 };
 
 static struct mpc_i2c_data mpc_i2c_data_8313 __devinitdata = {
-   .setclock = mpc_i2c_setclock_8xxx,
+   .setup = mpc_i2c_setup_8xxx,
 };
 
 static struct mpc_i2c_data mpc_i2c_data_8543 __devinitdata = {
-   .setclock = mpc_i2c_setclock_8xxx,
+   .setup = mpc_i2c_setup_8xxx,
.prescaler = 2,
 };
 
 static struct mpc_i2c_data mpc_i2c_data_8544 __devinitdata = {
-   .setclock = mpc_i2c_setclock_8xxx,
+   .setup = mpc_i2c_setup_8xxx,
.prescaler = 3,
 };
 
-- 
1.6.2.5

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[PATCH v8 4/4] powerpc: doc/dts-bindings: update doc of FSL I2C bindings

From: Wolfgang Grandegger w...@denx.de

This patch adds the MPC5121 to the list of supported devices,
enhances the doc of the clock-frequency property and removes
the obsolete cell-index, device_type and fsl-i2c property.
Furthermore an example for the MPC5121 has been added.

Signed-off-by: Wolfgang Grandegger w...@denx.de
Reviewed-by: Wolfram Sang w.s...@pengutronix.de
---
 Documentation/powerpc/dts-bindings/fsl/i2c.txt |   30 +--
 1 files changed, 22 insertions(+), 8 deletions(-)

diff --git a/Documentation/powerpc/dts-bindings/fsl/i2c.txt 
b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
index b6d2e21..50da203 100644
--- a/Documentation/powerpc/dts-bindings/fsl/i2c.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
@@ -2,15 +2,14 @@
 
 Required properties :
 
- - device_type : Should be i2c
  - reg : Offset and length of the register set for the device
+ - compatible : should be fsl,CHIP-i2c where CHIP is the name of a
+   compatible processor, e.g. mpc8313, mpc8543, mpc8544, mpc5121,
+   mpc5200 or mpc5200b. For the mpc5121, an additional node
+   fsl,mpc5121-i2c-ctrl is required as shown in the example below.
 
 Recommended properties :
 
- - compatible : compatibility list with 2 entries, the first should
-   be fsl,CHIP-i2c where CHIP is the name of a compatible processor,
-   e.g. mpc8313, mpc8543, mpc8544, mpc5200 or mpc5200b. The second one
-   should be fsl-i2c.
  - interrupts : a b where a is the interrupt number and b is a
field that represents an encoding of the sense and level
information for the interrupt.  This should be encoded based on
@@ -24,25 +23,40 @@ Recommended properties :
 
 Examples :
 
+   /* MPC5121 based board */
+   i...@1740 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = fsl,mpc5121-i2c, fsl-i2c;
+   reg = 0x1740 0x20;
+   interrupts = 11 0x8;
+   interrupt-parent = ipic;
+   clock-frequency = 10;
+   };
+
+   i2ccont...@1760 {
+   compatible = fsl,mpc5121-i2c-ctrl;
+   reg = 0x1760 0x8;
+   };
+
+   /* MPC5200B based board */
i...@3d00 {
#address-cells = 1;
#size-cells = 0;
compatible = fsl,mpc5200b-i2c,fsl,mpc5200-i2c,fsl-i2c;
-   cell-index = 0;
reg = 0x3d00 0x40;
interrupts = 2 15 0;
interrupt-parent = mpc5200_pic;
fsl,preserve-clocking;
};
 
+   /* MPC8544 base board */
i...@3100 {
#address-cells = 1;
#size-cells = 0;
-   cell-index = 1;
compatible = fsl,mpc8544-i2c, fsl-i2c;
reg = 0x3100 0x100;
interrupts = 43 2;
interrupt-parent = mpic;
clock-frequency = 40;
};
-
-- 
1.6.2.5

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[PATCH v8 3/4] i2c-mpc: add support for the MPC512x processors from Freescale

From: Wolfgang Grandegger w...@denx.de

As I2C interrupts must  be enabled for the MPC512x by the setup function
as well, fsl,preserve-clocking is handled in a slighly different way.
Also, the old settings are now reported calling dev_dbg(). For the
MPC512x the clock setup function of the MPC52xx can be re-used.
Furthermore, the Kconfig help has been updated and corrected.

Signed-off-by: Wolfgang Grandegger w...@denx.de
Reviewed-by: Wolfram Sang w.s...@pengutronix.de
---
 drivers/i2c/busses/Kconfig   |7 +--
 drivers/i2c/busses/i2c-mpc.c |   93 +
 2 files changed, 78 insertions(+), 22 deletions(-)

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 5f318ce..5477e41 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -418,13 +418,12 @@ config I2C_IXP2000
  instead.
 
 config I2C_MPC
-   tristate MPC107/824x/85xx/52xx/86xx
+   tristate MPC107/824x/85xx/512x/52xx/83xx/86xx
depends on PPC32
help
  If you say yes to this option, support will be included for the
- built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
- MPC85xx/MPC8641 family processors. The driver may also work on 52xx
- family processors, though interrupts are known not to work.
+ built-in I2C interface on the MPC107, Tsi107, MPC512x, MPC52xx,
+ MPC8240, MPC8245, MPC83xx, MPC85xx and MPC8641 family processors.
 
  This driver can also be built as a module.  If so, the module
  will be called i2c-mpc.
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 370c342..78a15af 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -31,6 +31,9 @@
 
 #define DRV_NAME mpc-i2c
 
+#define MPC_I2C_CLOCK_LEGACY   0
+#define MPC_I2C_CLOCK_PRESERVE (~0U)
+
 #define MPC_I2C_FDR   0x04
 #define MPC_I2C_CR0x08
 #define MPC_I2C_SR0x0c
@@ -163,7 +166,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, 
int writing)
return 0;
 }
 
-#ifdef CONFIG_PPC_MPC52xx
+#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_PPC_MPC512x)
 static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] __devinitconst = {
{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
@@ -193,7 +196,7 @@ static int __devinit mpc_i2c_get_fdr_52xx(struct 
device_node *node, u32 clock,
u32 divider;
int i;
 
-   if (!clock)
+   if (clock == MPC_I2C_CLOCK_LEGACY)
return -EINVAL;
 
/* Determine divider value */
@@ -221,6 +224,12 @@ static void __devinit mpc_i2c_setup_52xx(struct 
device_node *node,
 {
int ret, fdr;
 
+   if (clock == MPC_I2C_CLOCK_PRESERVE) {
+   dev_dbg(i2c-dev, using fdr %d\n,
+   readb(i2c-base + MPC_I2C_FDR));
+   return;
+   }
+
ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler);
fdr = (ret = 0) ? ret : 0x3f; /* backward compatibility */
 
@@ -229,13 +238,49 @@ static void __devinit mpc_i2c_setup_52xx(struct 
device_node *node,
if (ret = 0)
dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
 }
-#else /* !CONFIG_PPC_MPC52xx */
+#else /* !(CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x) */
 static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
 struct mpc_i2c *i2c,
 u32 clock, u32 prescaler)
 {
 }
-#endif /* CONFIG_PPC_MPC52xx*/
+#endif /* CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x */
+
+#ifdef CONFIG_PPC_MPC512x
+static void __devinit mpc_i2c_setup_512x(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
+{
+   struct device_node *node_ctrl;
+   void __iomem *ctrl;
+   const u32 *pval;
+   u32 idx;
+
+   /* Enable I2C interrupts for mpc5121 */
+   node_ctrl = of_find_compatible_node(NULL, NULL,
+   fsl,mpc5121-i2c-ctrl);
+   if (node_ctrl) {
+   ctrl = of_iomap(node_ctrl, 0);
+   if (ctrl) {
+   /* Interrupt enable bits for i2c-0/1/2: bit 24/26/28 */
+   pval = of_get_property(node, reg, NULL);
+   idx = (*pval  0xff) / 0x20;
+   setbits32(ctrl, 1  (24 + idx * 2));
+   iounmap(ctrl);
+   }
+   of_node_put(node_ctrl);
+   }
+
+   /* The clock setup for the 52xx works also fine for the 512x */
+   mpc_i2c_setup_52xx(node, i2c, clock, prescaler);
+}
+#else /* CONFIG_PPC_MPC512x */
+static void __devinit mpc_i2c_setup_512x(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
+{
+}
+#endif

Re: [PATCH v7 1/4] i2c-mpc: use __devinit[data] for initialization functions and data

2010-02-16 Thread Wolfgang Grandegger

Grant Likely wrote:
 On Wed, Feb 10, 2010 at 7:55 AM, Wolfgang Grandegger w...@grandegger.com 
 wrote:
 From: Wolfgang Grandegger w...@denx.de

 __devinit[data] has not yet been used for all initialization functions
 and data. To avoid truncating lines, the struct mpc_i2c_match_data has
 been renamed to mpc_i2c_data, which is even the better name.

 Signed-off-by: Wolfgang Grandegger w...@denx.de
 Tested-by: Wolfram Sang w.s...@pengutronix.de
 
 Between patch 1  2 is not bisectable.  Functions still called
 *_setclock in this patch, but referenced as *_setup in the structure.
 Please respin.

Argh, sorry for the mess. I will fix it tomorrow.

 Also ...
 
 +static struct mpc_i2c_data mpc_i2c_data_52xx __devinitdata = {
 +   .setup = mpc_i2c_setup_52xx,
 +};
 +
 +static struct mpc_i2c_data mpc_i2c_data_8313 __devinitdata = {
 +   .setup = mpc_i2c_setup_8xxx,
 +};
 +
 +static struct mpc_i2c_data mpc_i2c_data_8543 __devinitdata = {
 +   .setup = mpc_i2c_setup_8xxx,
 +   .prescaler = 2,
 +};
 +
 +static struct mpc_i2c_data mpc_i2c_data_8544 __devinitdata = {
 +   .setup = mpc_i2c_setup_8xxx,
 +   .prescaler = 3,
 +};
 +
  static const struct of_device_id mpc_i2c_of_match[] = {
 -   {.compatible = mpc5200-i2c,
 -.data = (struct mpc_i2c_match_data) {
 -   .setclock = mpc_i2c_setclock_52xx,
 -   },
 -   },
 -   {.compatible = fsl,mpc5200b-i2c,
 -.data = (struct mpc_i2c_match_data) {
 -   .setclock = mpc_i2c_setclock_52xx,
 -   },
 -   },
 -   {.compatible = fsl,mpc5200-i2c,
 -.data = (struct mpc_i2c_match_data) {
 -   .setclock = mpc_i2c_setclock_52xx,
 -   },
 -   },
 -   {.compatible = fsl,mpc8313-i2c,
 -.data = (struct mpc_i2c_match_data) {
 -   .setclock = mpc_i2c_setclock_8xxx,
 -   },
 -   },
 -   {.compatible = fsl,mpc8543-i2c,
 -.data = (struct mpc_i2c_match_data) {
 -   .setclock = mpc_i2c_setclock_8xxx,
 -   .prescaler = 2,
 -   },
 -   },
 -   {.compatible = fsl,mpc8544-i2c,
 -.data = (struct mpc_i2c_match_data) {
 -   .setclock = mpc_i2c_setclock_8xxx,
 -   .prescaler = 3,
 -   },
 +   {.compatible = mpc5200-i2c, .data = mpc_i2c_data_52xx, },
 +   {.compatible = fsl,mpc5200b-i2c, .data = mpc_i2c_data_52xx, },
 +   {.compatible = fsl,mpc5200-i2c, .data = mpc_i2c_data_52xx, },
 +   {.compatible = fsl,mpc8313-i2c, .data = mpc_i2c_data_8313, },
 +   {.compatible = fsl,mpc8543-i2c, .data = mpc_i2c_data_8543, },
 +   {.compatible = fsl,mpc8544-i2c, .data = mpc_i2c_data_8544, },
 
 ... what was wrong with the old format of declaring the .data
 structures inline with the match table?

It does not allow to use __devinitdata because the space reserved by the
compiler does belong to another section. In other words it was necessary
to get ride of section mismatches.

Wolfgang.
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Re: [net-next-2.6 PATCH 2/3] fs_enet: Add support for MPC512x to fs_enet driver

Hi David,

David Miller wrote:
 From: Anatolij Gustschin ag...@denx.de
 Date: Tue, 9 Feb 2010 15:23:17 +0100

 In my understanding, in the ESP scsi driver the set of defines for
 the register offsets is common for all chip drivers. The chip driver
 methods for register access translate the offsets because the
 registers on some chips are at different intervals (4-byte, 1-byte,
 16-byte for mac_esp.c). But the register order is the same for
 different chips.

 In our case non only the register order is not the same for 8xx
 FEC and 5121 FEC, but there are also other differences, different
 reserved areas between several registers, some registers are
 available only on 8xx and some only on 5121.

 That only means you would need to use a table based register address
 translation scheme, rather than a simple calculation.  Something
 like:

 static unsigned int chip_xxx_table[] =
 {
   [GENERIC_REG_FOO]= CHIP_XXX_FOO,
   ...
 };

 static u32 chip_xxx_read_reg(struct chip *p, unsigned int reg)
 {
   unsigned int reg_off = chip_xxx_table[reg];

   return readl(p-regs + reg_off);
 }

 And this table can have special tokens in entries for
 registers which do not exist on a chip, so you can trap
 attempted access to them in these read/write handlers.

Yes, that could be done, but to honest, I do not see any improvement in
respect to the previous patch where the register offset were defined via
pointers within a structure.

 Please stop looking for excuses to fork this driver, a
 unified driver I think can be done cleanly.

Other people suggested to fork the driver because it's getting too ugly.

Wolfgang.
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[PATCH v6 4/4] powerpc: doc/dts-bindings: update doc of FSL I2C bindings

From: Wolfgang Grandegger w...@denx.de

This patch adds the MPC5121 to the list of supported devices,
enhances the doc of the clock-frequency property and removes
the obsolete cell-index, device_type and fsl-i2c property.
Furthermore an example for the MPC5121 has been added.

Signed-off-by: Wolfgang Grandegger w...@denx.de
Reviewed-by: Wolfram Sang w.s...@pengutronix.de
---
 Documentation/powerpc/dts-bindings/fsl/i2c.txt |   30 +--
 1 files changed, 22 insertions(+), 8 deletions(-)

diff --git a/Documentation/powerpc/dts-bindings/fsl/i2c.txt 
b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
index b6d2e21..50da203 100644
--- a/Documentation/powerpc/dts-bindings/fsl/i2c.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
@@ -2,15 +2,14 @@
 
 Required properties :
 
- - device_type : Should be i2c
  - reg : Offset and length of the register set for the device
+ - compatible : should be fsl,CHIP-i2c where CHIP is the name of a
+   compatible processor, e.g. mpc8313, mpc8543, mpc8544, mpc5121,
+   mpc5200 or mpc5200b. For the mpc5121, an additional node
+   fsl,mpc5121-i2c-ctrl is required as shown in the example below.
 
 Recommended properties :
 
- - compatible : compatibility list with 2 entries, the first should
-   be fsl,CHIP-i2c where CHIP is the name of a compatible processor,
-   e.g. mpc8313, mpc8543, mpc8544, mpc5200 or mpc5200b. The second one
-   should be fsl-i2c.
  - interrupts : a b where a is the interrupt number and b is a
field that represents an encoding of the sense and level
information for the interrupt.  This should be encoded based on
@@ -24,25 +23,40 @@ Recommended properties :
 
 Examples :
 
+   /* MPC5121 based board */
+   i...@1740 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = fsl,mpc5121-i2c, fsl-i2c;
+   reg = 0x1740 0x20;
+   interrupts = 11 0x8;
+   interrupt-parent = ipic;
+   clock-frequency = 10;
+   };
+
+   i2ccont...@1760 {
+   compatible = fsl,mpc5121-i2c-ctrl;
+   reg = 0x1760 0x8;
+   };
+
+   /* MPC5200B based board */
i...@3d00 {
#address-cells = 1;
#size-cells = 0;
compatible = fsl,mpc5200b-i2c,fsl,mpc5200-i2c,fsl-i2c;
-   cell-index = 0;
reg = 0x3d00 0x40;
interrupts = 2 15 0;
interrupt-parent = mpc5200_pic;
fsl,preserve-clocking;
};
 
+   /* MPC8544 base board */
i...@3100 {
#address-cells = 1;
#size-cells = 0;
-   cell-index = 1;
compatible = fsl,mpc8544-i2c, fsl-i2c;
reg = 0x3100 0x100;
interrupts = 43 2;
interrupt-parent = mpic;
clock-frequency = 40;
};
-
-- 
1.6.2.5

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[PATCH v6 2/4] i2c-mpc: rename setclock initialization functions to setup

From: Wolfgang Grandegger w...@denx.de

To prepare  support for the MPC512x processors from Freescale the
setclock initialization functions have been renamed to setup
because I2C interrupts must be enabled for the MPC512x by this
function as well.

Signed-off-by: Wolfgang Grandegger w...@denx.de
---
 drivers/i2c/busses/i2c-mpc.c |   34 --
 1 files changed, 16 insertions(+), 18 deletions(-)

diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index ba4e7af..51d5280 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -67,9 +67,8 @@ struct mpc_i2c_divider {
 };
 
 struct mpc_i2c_data {
-   void (*setclock)(struct device_node *node,
-struct mpc_i2c *i2c,
-u32 clock, u32 prescaler);
+   void (*setup)(struct device_node *node, struct mpc_i2c *i2c,
+ u32 clock, u32 prescaler);
u32 prescaler;
 };
 
@@ -216,9 +215,9 @@ static int __devinit mpc_i2c_get_fdr_52xx(struct 
device_node *node, u32 clock,
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -231,9 +230,9 @@ static void __devinit mpc_i2c_setclock_52xx(struct 
device_node *node,
dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
 }
 #else /* !CONFIG_PPC_MPC52xx */
-static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
 }
 #endif /* CONFIG_PPC_MPC52xx*/
@@ -322,9 +321,9 @@ static int __devinit mpc_i2c_get_fdr_8xxx(struct 
device_node *node, u32 clock,
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setup_8xxx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -340,9 +339,9 @@ static void __devinit mpc_i2c_setclock_8xxx(struct 
device_node *node,
 }
 
 #else /* !CONFIG_FSL_SOC */
-static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setup_8xxx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
 }
 #endif /* CONFIG_FSL_SOC */
@@ -533,12 +532,11 @@ static int __devinit fsl_i2c_probe(struct of_device *op,
if (match-data) {
struct mpc_i2c_data *data =
(struct mpc_i2c_data *)match-data;
-   data-setclock(op-node, i2c, clock, data-prescaler);
+   data-setup(op-node, i2c, clock, data-prescaler);
} else {
/* Backwards compatibility */
if (of_get_property(op-node, dfsrr, NULL))
-   mpc_i2c_setclock_8xxx(op-node, i2c,
- clock, 0);
+   mpc_i2c_setup_8xxx(op-node, i2c, clock, 0);
}
}
 
-- 
1.6.2.5

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[PATCH v6 1/4] i2c-mpc: use __devinit[data] for initialization functions and data

From: Wolfgang Grandegger w...@denx.de

__devinit[data] has not yet been used for all initialization functions
and data. To avoid truncating lines, the struct mpc_i2c_match_data has
been renamed to mpc_i2c_data, which is even the better name.

Signed-off-by: Wolfgang Grandegger w...@denx.de
Tested-by: Wolfram Sang w.s...@pengutronix.de
---
 drivers/i2c/busses/i2c-mpc.c |   99 +++--
 1 files changed, 46 insertions(+), 53 deletions(-)

diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index f627001..ba4e7af 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -66,7 +66,7 @@ struct mpc_i2c_divider {
u16 fdr;/* including dfsrr */
 };
 
-struct mpc_i2c_match_data {
+struct mpc_i2c_data {
void (*setclock)(struct device_node *node,
 struct mpc_i2c *i2c,
 u32 clock, u32 prescaler);
@@ -165,7 +165,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, 
int writing)
 }
 
 #ifdef CONFIG_PPC_MPC52xx
-static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
+static struct mpc_i2c_divider mpc_i2c_dividers_52xx[]  __devinitdata = {
{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
{36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
@@ -186,7 +186,8 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] 
= {
{10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f}
 };
 
-int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
+static int __devinit mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock,
+ int prescaler)
 {
const struct mpc_i2c_divider *div = NULL;
unsigned int pvr = mfspr(SPRN_PVR);
@@ -215,9 +216,9 @@ int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 
clock, int prescaler)
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void mpc_i2c_setclock_52xx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -230,15 +231,15 @@ static void mpc_i2c_setclock_52xx(struct device_node 
*node,
dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
 }
 #else /* !CONFIG_PPC_MPC52xx */
-static void mpc_i2c_setclock_52xx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
 }
 #endif /* CONFIG_PPC_MPC52xx*/
 
 #ifdef CONFIG_FSL_SOC
-static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
+static struct mpc_i2c_divider mpc_i2c_dividers_8xxx[]  __devinitdata = {
{160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123},
{288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102},
{416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127},
@@ -258,7 +259,7 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] 
= {
{49152, 0x011e}, {61440, 0x011f}
 };
 
-u32 mpc_i2c_get_sec_cfg_8xxx(void)
+static u32 __devinit mpc_i2c_get_sec_cfg_8xxx(void)
 {
struct device_node *node = NULL;
u32 __iomem *reg;
@@ -287,7 +288,8 @@ u32 mpc_i2c_get_sec_cfg_8xxx(void)
return val;
 }
 
-int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler)
+static int __devinit mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock,
+ u32 prescaler)
 {
const struct mpc_i2c_divider *div = NULL;
u32 divider;
@@ -320,9 +322,9 @@ int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 
clock, u32 prescaler)
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void mpc_i2c_setclock_8xxx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -338,9 +340,9 @@ static void mpc_i2c_setclock_8xxx(struct device_node *node,
 }
 
 #else /* !CONFIG_FSL_SOC */
-static void mpc_i2c_setclock_8xxx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node,
+   struct

[PATCH v6 3/4] i2c-mpc: add support for the MPC512x processors from Freescale

From: Wolfgang Grandegger w...@denx.de

As I2C interrupts must  be enabled for the MPC512x by the setup function
as well, fsl,preserve-clocking is handled in a slighly different way.
Also, the old settings are now reported calling dev_dbg(). For the
MPC512x the clock setup function of the MPC52xx can be re-used.
Furthermore, the Kconfig help has been updated and corrected.

Signed-off-by: Wolfgang Grandegger w...@denx.de
Reviewed-by: Wolfram Sang w.s...@pengutronix.de
---
 drivers/i2c/busses/Kconfig   |7 +--
 drivers/i2c/busses/i2c-mpc.c |   93 +
 2 files changed, 78 insertions(+), 22 deletions(-)

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 5f318ce..5477e41 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -418,13 +418,12 @@ config I2C_IXP2000
  instead.
 
 config I2C_MPC
-   tristate MPC107/824x/85xx/52xx/86xx
+   tristate MPC107/824x/85xx/512x/52xx/83xx/86xx
depends on PPC32
help
  If you say yes to this option, support will be included for the
- built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
- MPC85xx/MPC8641 family processors. The driver may also work on 52xx
- family processors, though interrupts are known not to work.
+ built-in I2C interface on the MPC107, Tsi107, MPC512x, MPC52xx,
+ MPC8240, MPC8245, MPC83xx, MPC85xx and MPC8641 family processors.
 
  This driver can also be built as a module.  If so, the module
  will be called i2c-mpc.
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 51d5280..106bf90 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -31,6 +31,9 @@
 
 #define DRV_NAME mpc-i2c
 
+#define MPC_I2C_CLOCK_LEGACY   0
+#define MPC_I2C_CLOCK_PRESERVE (~0U)
+
 #define MPC_I2C_FDR   0x04
 #define MPC_I2C_CR0x08
 #define MPC_I2C_SR0x0c
@@ -163,7 +166,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, 
int writing)
return 0;
 }
 
-#ifdef CONFIG_PPC_MPC52xx
+#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_PPC_MPC512x)
 static struct mpc_i2c_divider mpc_i2c_dividers_52xx[]  __devinitdata = {
{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
@@ -193,7 +196,7 @@ static int __devinit mpc_i2c_get_fdr_52xx(struct 
device_node *node, u32 clock,
u32 divider;
int i;
 
-   if (!clock)
+   if (clock == MPC_I2C_CLOCK_LEGACY)
return -EINVAL;
 
/* Determine divider value */
@@ -221,6 +224,12 @@ static void __devinit mpc_i2c_setup_52xx(struct 
device_node *node,
 {
int ret, fdr;
 
+   if (clock == MPC_I2C_CLOCK_PRESERVE) {
+   dev_dbg(i2c-dev, using fdr %d\n,
+   readb(i2c-base + MPC_I2C_FDR));
+   return;
+   }
+
ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler);
fdr = (ret = 0) ? ret : 0x3f; /* backward compatibility */
 
@@ -229,13 +238,49 @@ static void __devinit mpc_i2c_setup_52xx(struct 
device_node *node,
if (ret = 0)
dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
 }
-#else /* !CONFIG_PPC_MPC52xx */
+#else /* !(CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x) */
 static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
 struct mpc_i2c *i2c,
 u32 clock, u32 prescaler)
 {
 }
-#endif /* CONFIG_PPC_MPC52xx*/
+#endif /* CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x */
+
+#ifdef CONFIG_PPC_MPC512x
+static void __devinit mpc_i2c_setup_512x(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
+{
+   struct device_node *node_ctrl;
+   void __iomem *ctrl;
+   const u32 *pval;
+   u32 idx;
+
+   /* Enable I2C interrupts for mpc5121 */
+   node_ctrl = of_find_compatible_node(NULL, NULL,
+   fsl,mpc5121-i2c-ctrl);
+   if (node_ctrl) {
+   ctrl = of_iomap(node_ctrl, 0);
+   if (ctrl) {
+   /* Interrupt enable bits for i2c-0/1/2: bit 24/26/28 */
+   pval = of_get_property(node, reg, NULL);
+   idx = (*pval  0xff) / 0x20;
+   setbits32(ctrl, 1  (24 + idx * 2));
+   iounmap(ctrl);
+   }
+   of_node_put(node_ctrl);
+   }
+
+   /* The clock setup for the 52xx works also fine for the 512x */
+   mpc_i2c_setup_52xx(node, i2c, clock, prescaler);
+}
+#else /* CONFIG_PPC_MPC512x */
+static void __devinit mpc_i2c_setup_512x(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
+{
+}
+#endif

[PATCH v6 0/4] i2c-mpc: add support for the Freescale MPC512x and other fixes

From: Wolfgang Grandegger w...@denx.de

This patch series adds support for the MPC512x from Freescale to the
i2c-mpc driver. At that occasion, issues with  __devinit[data] have
been fixed and the doc of the FSL I2C dts bindings updated. It has
been tested on a MPC5121ADS, TQM5200 and TQM8560 board

Changes since v1:

- use macro MPC_I2C_CLOCK_PRESERVE/SAFE for the special clock settings.
- document the special DTS node fsl,mpc5121-i2c-ctrl.
- update and correct the Kconfig help.
- some other minor fixes as suggested by Wolfram.

Changes since v2:

- use __init[data] instead of __devinit[data] for this driver.

Changes since v3:

- switch back to __devinit[data] as pointed out by Ben.

Changes since v4:

- check MPC_I2C_CLOCK_SAFE instead of !clock as suggested by Wolfram.
- update MODULE_DESCRIPTION().

Changes since v5 (suggested by Grant Likely):

- various correctings for labling initialization functions and data
  (this is tricky because section mismatches are not always obvious).
- add a separate patch for renaming the setclock into setup functions.
- correct the doc of the I2C bindings, e.g. don't mention the legacy
  clock setting and remove obsolte parts.

Wolfgang

Wolfgang Grandegger (4):
  i2c-mpc: use __devinit[data] for initialization functions and data
  i2c-mpc: rename setclock initialization functions to setup
  i2c-mpc: add support for the MPC512x processors from Freescale
  powerpc: doc/dts-bindings: update doc of FSL I2C bindings

 Documentation/powerpc/dts-bindings/fsl/i2c.txt |   30 +++-
 drivers/i2c/busses/Kconfig |7 +-
 drivers/i2c/busses/i2c-mpc.c   |  194 +++-
 3 files changed, 146 insertions(+), 85 deletions(-)

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Re: [PATCH v4 1/3] i2c-mpc: use __devinit[data] for initialization functions and data

Grant Likely wrote:
 On Thu, Jan 28, 2010 at 6:25 AM, Wolfgang Grandegger w...@grandegger.com 
 wrote:
 From: Wolfgang Grandegger w...@denx.de

 __devinit[data] has not yet been used for all initialization functions
 and data. To avoid truncating lines, the struct mpc_i2c_match_data has
 been renamed to mpc_i2c_data, which is even the better name.

 Signed-off-by: Wolfgang Grandegger w...@denx.de
 
 Several comments below.
 
 ---
  drivers/i2c/busses/i2c-mpc.c |  103 
 +++--
  1 files changed, 48 insertions(+), 55 deletions(-)

 diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
 index f627001..275ebe6 100644
 --- a/drivers/i2c/busses/i2c-mpc.c
 +++ b/drivers/i2c/busses/i2c-mpc.c
 @@ -66,7 +66,7 @@ struct mpc_i2c_divider {
u16 fdr;/* including dfsrr */
  };

 -struct mpc_i2c_match_data {
 +struct mpc_i2c_data {
void (*setclock)(struct device_node *node,
 struct mpc_i2c *i2c,
 u32 clock, u32 prescaler);
 @@ -165,7 +165,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned 
 timeout, int writing)
  }

  #ifdef CONFIG_PPC_MPC52xx
 -static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
 +static const struct __devinitdata mpc_i2c_divider mpc_i2c_dividers_52xx[] = 
 {
 
 __devinitdata goes at the end, immediately before the '='.  Ditto
 throughout the file.

This made a difference and revealed section mismatches. const seems to
be incompatible with __devinitdata.

{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
{36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
 @@ -582,44 +584,35 @@ static int __devexit fsl_i2c_remove(struct of_device 
 *op)
return 0;
  };

 +static struct mpc_i2c_data __devinitdata mpc_i2c_data_52xx = {
 +   .setclock = mpc_i2c_setclock_52xx,
 +};
 +
 +static struct mpc_i2c_data __devinitdata mpc_i2c_data_8313 = {
 +   .setclock = mpc_i2c_setclock_8xxx,
 +};
 +
 +static struct mpc_i2c_data __devinitdata mpc_i2c_data_8543 = {
 +   .setclock = mpc_i2c_setclock_8xxx,
 +   .prescaler = 2,
 +};
 +
 +static struct mpc_i2c_data __devinitdata mpc_i2c_data_8544 = {
 +   .setclock = mpc_i2c_setclock_8xxx,
 +   .prescaler = 3,
 +};
 +
  static const struct of_device_id mpc_i2c_of_match[] = {
 
 You can make this __devinitdata too.

This results in a section mismatch as it's referenced by fsl_i2c_init().
I just sent out v6. Hope it's OK now.

Thanks,

Wolfgang.


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Re: [net-next-2.6 PATCH 2/3] fs_enet: Add support for MPC512x to fs_enet driver

Wolfgang Grandegger wrote:
 Hi David,

 David Miller wrote:
 From: Anatolij Gustschin ag...@denx.de
 Date: Tue, 9 Feb 2010 15:23:17 +0100

 In my understanding, in the ESP scsi driver the set of defines for
 the register offsets is common for all chip drivers. The chip driver
 methods for register access translate the offsets because the
 registers on some chips are at different intervals (4-byte, 1-byte,
 16-byte for mac_esp.c). But the register order is the same for
 different chips.

 In our case non only the register order is not the same for 8xx
 FEC and 5121 FEC, but there are also other differences, different
 reserved areas between several registers, some registers are
 available only on 8xx and some only on 5121.
 That only means you would need to use a table based register address
 translation scheme, rather than a simple calculation.  Something
 like:

 static unsigned int chip_xxx_table[] =
 {
  [GENERIC_REG_FOO]= CHIP_XXX_FOO,
  ...
 };

 static u32 chip_xxx_read_reg(struct chip *p, unsigned int reg)
 {
  unsigned int reg_off = chip_xxx_table[reg];

  return readl(p-regs + reg_off);
 }

 And this table can have special tokens in entries for
 registers which do not exist on a chip, so you can trap
 attempted access to them in these read/write handlers.

 Yes, that could be done, but to honest, I do not see any improvement in
 respect to the previous patch where the register offset were defined via
 pointers within a structure.

 Please stop looking for excuses to fork this driver, a
 unified driver I think can be done cleanly.

 Other people suggested to fork the driver because it's getting too ugly.

That said, I think there is consensus that it does not make sense, and
it's even not possible, to provide a kernel image which runs on both,
the 8xx and the mpc512x. Therefore, there is also no need for sharing
this driver at run time. Compile time selection would allow a more
elegant and transparent implementation. Would that be an acceptable
solution?

Wolfgang.
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Re: [PATCH v4 1/3] i2c-mpc: use __devinit[data] for initialization functions and data

Stephen Rothwell wrote:
 Hi Wolfgang,
 
 On Wed, 10 Feb 2010 11:09:25 +0100 Wolfgang Grandegger w...@grandegger.com 
 wrote:
 __devinitdata goes at the end, immediately before the '='.  Ditto
 throughout the file.
 This made a difference and revealed section mismatches. const seems to
 be incompatible with __devinitdata.
 
 Maybe try no const and __devinitconst (I am not sure if both will
 work).

Yes, that works, even together with const. To avoid rolling out the
whole patch series again, I can prepare a follow-up patch fixing this issue.

Wolfgang.

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Re: [PATCH v4 1/3] i2c-mpc: use __devinit[data] for initialization functions and data

Grant Likely wrote:
 On Wed, Feb 10, 2010 at 3:53 AM, Wolfgang Grandegger w...@grandegger.com 
 wrote:
 Stephen Rothwell wrote:
 Hi Wolfgang,

 On Wed, 10 Feb 2010 11:09:25 +0100 Wolfgang Grandegger 
 w...@grandegger.com wrote:
 __devinitdata goes at the end, immediately before the '='.  Ditto
 throughout the file.
 This made a difference and revealed section mismatches. const seems to
 be incompatible with __devinitdata.
 Maybe try no const and __devinitconst (I am not sure if both will
 work).
 Yes, that works, even together with const. To avoid rolling out the
 whole patch series again, I can prepare a follow-up patch fixing this issue.
 
 Nah, just resend this one patch.

Even if it break the following patches? Will resend v7 in a second.

Wolfgang.


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[PATCH v7 2/4] i2c-mpc: rename setclock initialization functions to setup

From: Wolfgang Grandegger w...@denx.de

To prepare  support for the MPC512x processors from Freescale the
setclock initialization functions have been renamed to setup
because I2C interrupts must be enabled for the MPC512x by this
function as well.

Signed-off-by: Wolfgang Grandegger w...@denx.de
---
 drivers/i2c/busses/i2c-mpc.c |   34 --
 1 files changed, 16 insertions(+), 18 deletions(-)

diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 9f0e203..370c342 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -67,9 +67,8 @@ struct mpc_i2c_divider {
 };
 
 struct mpc_i2c_data {
-   void (*setclock)(struct device_node *node,
-struct mpc_i2c *i2c,
-u32 clock, u32 prescaler);
+   void (*setup)(struct device_node *node, struct mpc_i2c *i2c,
+ u32 clock, u32 prescaler);
u32 prescaler;
 };
 
@@ -216,9 +215,9 @@ static int __devinit mpc_i2c_get_fdr_52xx(struct 
device_node *node, u32 clock,
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -231,9 +230,9 @@ static void __devinit mpc_i2c_setclock_52xx(struct 
device_node *node,
dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
 }
 #else /* !CONFIG_PPC_MPC52xx */
-static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
 }
 #endif /* CONFIG_PPC_MPC52xx*/
@@ -322,9 +321,9 @@ static int __devinit mpc_i2c_get_fdr_8xxx(struct 
device_node *node, u32 clock,
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setup_8xxx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -340,9 +339,9 @@ static void __devinit mpc_i2c_setclock_8xxx(struct 
device_node *node,
 }
 
 #else /* !CONFIG_FSL_SOC */
-static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setup_8xxx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
 }
 #endif /* CONFIG_FSL_SOC */
@@ -533,12 +532,11 @@ static int __devinit fsl_i2c_probe(struct of_device *op,
if (match-data) {
struct mpc_i2c_data *data =
(struct mpc_i2c_data *)match-data;
-   data-setclock(op-node, i2c, clock, data-prescaler);
+   data-setup(op-node, i2c, clock, data-prescaler);
} else {
/* Backwards compatibility */
if (of_get_property(op-node, dfsrr, NULL))
-   mpc_i2c_setclock_8xxx(op-node, i2c,
- clock, 0);
+   mpc_i2c_setup_8xxx(op-node, i2c, clock, 0);
}
}
 
-- 
1.6.2.5

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[PATCH v7 0/4] i2c-mpc: add support for the Freescale MPC512x and other fixes

From: Wolfgang Grandegger w...@denx.de

This patch series adds support for the MPC512x from Freescale to the
i2c-mpc driver. At that occasion, issues with  __devinit[data] have
been fixed and the doc of the FSL I2C dts bindings updated. It has
been tested on a MPC5121ADS, TQM5200 and TQM8560 board

Changes since v1:

- use macro MPC_I2C_CLOCK_PRESERVE/SAFE for the special clock settings.
- document the special DTS node fsl,mpc5121-i2c-ctrl.
- update and correct the Kconfig help.
- some other minor fixes as suggested by Wolfram.

Changes since v2:

- use __init[data] instead of __devinit[data] for this driver.

Changes since v3:

- switch back to __devinit[data] as pointed out by Ben.

Changes since v4:

- check MPC_I2C_CLOCK_SAFE instead of !clock as suggested by Wolfram.
- update MODULE_DESCRIPTION().

Changes since v5 (suggested by Grant Likely):

- various correctings for labling initialization functions and data
  (this is tricky because section mismatches are not always obvious).
- add a separate patch for renaming the setclock into setup functions.
- correct the doc of the I2C bindings, e.g. don't mention the legacy
  clock setting and remove obsolte parts.

Changes since v6:

- use __devinitconst for const data as suggested by Stephen Rothwell.

Wolfgang

Wolfgang Grandegger (4):
  i2c-mpc: use __devinit[data] for initialization functions and data
  i2c-mpc: rename setclock initialization functions to setup
  i2c-mpc: add support for the MPC512x processors from Freescale
  powerpc: doc/dts-bindings: update doc of FSL I2C bindings

 Documentation/powerpc/dts-bindings/fsl/i2c.txt |   30 +++-
 drivers/i2c/busses/Kconfig |7 +-
 drivers/i2c/busses/i2c-mpc.c   |  194 +++-
 3 files changed, 146 insertions(+), 85 deletions(-)

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[PATCH v7 3/4] i2c-mpc: add support for the MPC512x processors from Freescale

From: Wolfgang Grandegger w...@denx.de

As I2C interrupts must  be enabled for the MPC512x by the setup function
as well, fsl,preserve-clocking is handled in a slighly different way.
Also, the old settings are now reported calling dev_dbg(). For the
MPC512x the clock setup function of the MPC52xx can be re-used.
Furthermore, the Kconfig help has been updated and corrected.

Signed-off-by: Wolfgang Grandegger w...@denx.de
Reviewed-by: Wolfram Sang w.s...@pengutronix.de
---
 drivers/i2c/busses/Kconfig   |7 +--
 drivers/i2c/busses/i2c-mpc.c |   93 +
 2 files changed, 78 insertions(+), 22 deletions(-)

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 5f318ce..5477e41 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -418,13 +418,12 @@ config I2C_IXP2000
  instead.
 
 config I2C_MPC
-   tristate MPC107/824x/85xx/52xx/86xx
+   tristate MPC107/824x/85xx/512x/52xx/83xx/86xx
depends on PPC32
help
  If you say yes to this option, support will be included for the
- built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
- MPC85xx/MPC8641 family processors. The driver may also work on 52xx
- family processors, though interrupts are known not to work.
+ built-in I2C interface on the MPC107, Tsi107, MPC512x, MPC52xx,
+ MPC8240, MPC8245, MPC83xx, MPC85xx and MPC8641 family processors.
 
  This driver can also be built as a module.  If so, the module
  will be called i2c-mpc.
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 370c342..78a15af 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -31,6 +31,9 @@
 
 #define DRV_NAME mpc-i2c
 
+#define MPC_I2C_CLOCK_LEGACY   0
+#define MPC_I2C_CLOCK_PRESERVE (~0U)
+
 #define MPC_I2C_FDR   0x04
 #define MPC_I2C_CR0x08
 #define MPC_I2C_SR0x0c
@@ -163,7 +166,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, 
int writing)
return 0;
 }
 
-#ifdef CONFIG_PPC_MPC52xx
+#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_PPC_MPC512x)
 static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] __devinitconst = {
{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
@@ -193,7 +196,7 @@ static int __devinit mpc_i2c_get_fdr_52xx(struct 
device_node *node, u32 clock,
u32 divider;
int i;
 
-   if (!clock)
+   if (clock == MPC_I2C_CLOCK_LEGACY)
return -EINVAL;
 
/* Determine divider value */
@@ -221,6 +224,12 @@ static void __devinit mpc_i2c_setup_52xx(struct 
device_node *node,
 {
int ret, fdr;
 
+   if (clock == MPC_I2C_CLOCK_PRESERVE) {
+   dev_dbg(i2c-dev, using fdr %d\n,
+   readb(i2c-base + MPC_I2C_FDR));
+   return;
+   }
+
ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler);
fdr = (ret = 0) ? ret : 0x3f; /* backward compatibility */
 
@@ -229,13 +238,49 @@ static void __devinit mpc_i2c_setup_52xx(struct 
device_node *node,
if (ret = 0)
dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
 }
-#else /* !CONFIG_PPC_MPC52xx */
+#else /* !(CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x) */
 static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
 struct mpc_i2c *i2c,
 u32 clock, u32 prescaler)
 {
 }
-#endif /* CONFIG_PPC_MPC52xx*/
+#endif /* CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x */
+
+#ifdef CONFIG_PPC_MPC512x
+static void __devinit mpc_i2c_setup_512x(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
+{
+   struct device_node *node_ctrl;
+   void __iomem *ctrl;
+   const u32 *pval;
+   u32 idx;
+
+   /* Enable I2C interrupts for mpc5121 */
+   node_ctrl = of_find_compatible_node(NULL, NULL,
+   fsl,mpc5121-i2c-ctrl);
+   if (node_ctrl) {
+   ctrl = of_iomap(node_ctrl, 0);
+   if (ctrl) {
+   /* Interrupt enable bits for i2c-0/1/2: bit 24/26/28 */
+   pval = of_get_property(node, reg, NULL);
+   idx = (*pval  0xff) / 0x20;
+   setbits32(ctrl, 1  (24 + idx * 2));
+   iounmap(ctrl);
+   }
+   of_node_put(node_ctrl);
+   }
+
+   /* The clock setup for the 52xx works also fine for the 512x */
+   mpc_i2c_setup_52xx(node, i2c, clock, prescaler);
+}
+#else /* CONFIG_PPC_MPC512x */
+static void __devinit mpc_i2c_setup_512x(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
+{
+}
+#endif

[PATCH v7 1/4] i2c-mpc: use __devinit[data] for initialization functions and data

From: Wolfgang Grandegger w...@denx.de

__devinit[data] has not yet been used for all initialization functions
and data. To avoid truncating lines, the struct mpc_i2c_match_data has
been renamed to mpc_i2c_data, which is even the better name.

Signed-off-by: Wolfgang Grandegger w...@denx.de
Tested-by: Wolfram Sang w.s...@pengutronix.de
---
 drivers/i2c/busses/i2c-mpc.c |   99 +++--
 1 files changed, 46 insertions(+), 53 deletions(-)

diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index f627001..9f0e203 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -66,7 +66,7 @@ struct mpc_i2c_divider {
u16 fdr;/* including dfsrr */
 };
 
-struct mpc_i2c_match_data {
+struct mpc_i2c_data {
void (*setclock)(struct device_node *node,
 struct mpc_i2c *i2c,
 u32 clock, u32 prescaler);
@@ -165,7 +165,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, 
int writing)
 }
 
 #ifdef CONFIG_PPC_MPC52xx
-static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
+static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] __devinitconst = {
{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
{36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
@@ -186,7 +186,8 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] 
= {
{10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f}
 };
 
-int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
+static int __devinit mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock,
+ int prescaler)
 {
const struct mpc_i2c_divider *div = NULL;
unsigned int pvr = mfspr(SPRN_PVR);
@@ -215,9 +216,9 @@ int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 
clock, int prescaler)
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void mpc_i2c_setclock_52xx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -230,15 +231,15 @@ static void mpc_i2c_setclock_52xx(struct device_node 
*node,
dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
 }
 #else /* !CONFIG_PPC_MPC52xx */
-static void mpc_i2c_setclock_52xx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
 }
 #endif /* CONFIG_PPC_MPC52xx*/
 
 #ifdef CONFIG_FSL_SOC
-static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
+static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] __devinitconst = {
{160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123},
{288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102},
{416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127},
@@ -258,7 +259,7 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] 
= {
{49152, 0x011e}, {61440, 0x011f}
 };
 
-u32 mpc_i2c_get_sec_cfg_8xxx(void)
+static u32 __devinit mpc_i2c_get_sec_cfg_8xxx(void)
 {
struct device_node *node = NULL;
u32 __iomem *reg;
@@ -287,7 +288,8 @@ u32 mpc_i2c_get_sec_cfg_8xxx(void)
return val;
 }
 
-int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler)
+static int __devinit mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock,
+ u32 prescaler)
 {
const struct mpc_i2c_divider *div = NULL;
u32 divider;
@@ -320,9 +322,9 @@ int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 
clock, u32 prescaler)
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void mpc_i2c_setclock_8xxx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -338,9 +340,9 @@ static void mpc_i2c_setclock_8xxx(struct device_node *node,
 }
 
 #else /* !CONFIG_FSL_SOC */
-static void mpc_i2c_setclock_8xxx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node

[PATCH v7 4/4] powerpc: doc/dts-bindings: update doc of FSL I2C bindings

From: Wolfgang Grandegger w...@denx.de

This patch adds the MPC5121 to the list of supported devices,
enhances the doc of the clock-frequency property and removes
the obsolete cell-index, device_type and fsl-i2c property.
Furthermore an example for the MPC5121 has been added.

Signed-off-by: Wolfgang Grandegger w...@denx.de
Reviewed-by: Wolfram Sang w.s...@pengutronix.de
---
 Documentation/powerpc/dts-bindings/fsl/i2c.txt |   30 +--
 1 files changed, 22 insertions(+), 8 deletions(-)

diff --git a/Documentation/powerpc/dts-bindings/fsl/i2c.txt 
b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
index b6d2e21..50da203 100644
--- a/Documentation/powerpc/dts-bindings/fsl/i2c.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
@@ -2,15 +2,14 @@
 
 Required properties :
 
- - device_type : Should be i2c
  - reg : Offset and length of the register set for the device
+ - compatible : should be fsl,CHIP-i2c where CHIP is the name of a
+   compatible processor, e.g. mpc8313, mpc8543, mpc8544, mpc5121,
+   mpc5200 or mpc5200b. For the mpc5121, an additional node
+   fsl,mpc5121-i2c-ctrl is required as shown in the example below.
 
 Recommended properties :
 
- - compatible : compatibility list with 2 entries, the first should
-   be fsl,CHIP-i2c where CHIP is the name of a compatible processor,
-   e.g. mpc8313, mpc8543, mpc8544, mpc5200 or mpc5200b. The second one
-   should be fsl-i2c.
  - interrupts : a b where a is the interrupt number and b is a
field that represents an encoding of the sense and level
information for the interrupt.  This should be encoded based on
@@ -24,25 +23,40 @@ Recommended properties :
 
 Examples :
 
+   /* MPC5121 based board */
+   i...@1740 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = fsl,mpc5121-i2c, fsl-i2c;
+   reg = 0x1740 0x20;
+   interrupts = 11 0x8;
+   interrupt-parent = ipic;
+   clock-frequency = 10;
+   };
+
+   i2ccont...@1760 {
+   compatible = fsl,mpc5121-i2c-ctrl;
+   reg = 0x1760 0x8;
+   };
+
+   /* MPC5200B based board */
i...@3d00 {
#address-cells = 1;
#size-cells = 0;
compatible = fsl,mpc5200b-i2c,fsl,mpc5200-i2c,fsl-i2c;
-   cell-index = 0;
reg = 0x3d00 0x40;
interrupts = 2 15 0;
interrupt-parent = mpc5200_pic;
fsl,preserve-clocking;
};
 
+   /* MPC8544 base board */
i...@3100 {
#address-cells = 1;
#size-cells = 0;
-   cell-index = 1;
compatible = fsl,mpc8544-i2c, fsl-i2c;
reg = 0x3100 0x100;
interrupts = 43 2;
interrupt-parent = mpic;
clock-frequency = 40;
};
-
-- 
1.6.2.5

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Re: [PATCH v4 3/3] powerpc: doc/dts-bindings: update doc of FSL I2C bindings

2010-02-09 Thread Wolfgang Grandegger

Hi Grant,

Grant Likely wrote:
 On Thu, Jan 28, 2010 at 6:25 AM, Wolfgang Grandegger w...@grandegger.com 
 wrote:
 From: Wolfgang Grandegger w...@denx.de

 This patch adds the MPC5121 to the list of supported devices,
 enhances the doc of the clock-frequency property and removes
 the obsolete cell-index property from the example nodes.
 Furthermore and example for the MPC5121 has been added.

 Signed-off-by: Wolfgang Grandegger w...@denx.de
 
 Thanks Wolfgang.  Comments below.
 
 ---
  Documentation/powerpc/dts-bindings/fsl/i2c.txt |   30 
 +++
  1 files changed, 24 insertions(+), 6 deletions(-)

 diff --git a/Documentation/powerpc/dts-bindings/fsl/i2c.txt 
 b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
 index b6d2e21..2f62dae 100644
 --- a/Documentation/powerpc/dts-bindings/fsl/i2c.txt
 +++ b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
 @@ -9,8 +9,9 @@ Recommended properties :

  - compatible : compatibility list with 2 entries, the first should
be fsl,CHIP-i2c where CHIP is the name of a compatible processor,
 -   e.g. mpc8313, mpc8543, mpc8544, mpc5200 or mpc5200b. The second one
 -   should be fsl-i2c.
 +   e.g. mpc8313, mpc8543, mpc8544, mpc5121, mpc5200 or mpc5200b. The
 +   second one should be fsl-i2c. For the mpc5121, an additional node
 +   fsl,mpc5121-i2c-ctrl is required as shown in the example below.
 
 While you're editing this line; drop the requirement for the second
 value to be 'fsl-i2c'.  We don't use it anymore, and only preserve it
 for backwards compatibility with old trees.

OK.

  - interrupts : a b where a is the interrupt number and b is a
field that represents an encoding of the sense and level
information for the interrupt.  This should be encoded based on
 @@ -20,29 +21,46 @@ Recommended properties :
services interrupts for this device.
  - fsl,preserve-clocking : boolean; if defined, the clock settings
from the bootloader are preserved (not touched).
 - - clock-frequency : desired I2C bus clock frequency in Hz.
 + - clock-frequency : desired I2C bus clock frequency in Hz.  If this
 +   property and fsl,preserve-clocking is not defined, a safe fixed
 +   clock divider value is used (resulting in a small clock frequency).
 
 Nah, leave this as is.  Don't make it sound like omitting both
 properties is a valid option.  The driver may (and should!) handle the
 situation gracefully, but that fact does not need to be documented.

The safe value is not a good choice, indeed. Then it will also change
MPC_I2C_CLOCK_SAFE to MPC_I2C_CLOCK_LEGACY in i2c-mpc.c.

I will also fix the other issues you commented on.

Thanks,

Wolfgang.
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Re: [PATCH v4 3/3] powerpc: doc/dts-bindings: update doc of FSL I2C bindings

2010-02-09 Thread Wolfgang Grandegger

Wolfgang Grandegger wrote:
 Hi Grant,
 
 Grant Likely wrote:
 On Thu, Jan 28, 2010 at 6:25 AM, Wolfgang Grandegger w...@grandegger.com 
 wrote:
 From: Wolfgang Grandegger w...@denx.de

 This patch adds the MPC5121 to the list of supported devices,
 enhances the doc of the clock-frequency property and removes
 the obsolete cell-index property from the example nodes.
 Furthermore and example for the MPC5121 has been added.

 Signed-off-by: Wolfgang Grandegger w...@denx.de
 Thanks Wolfgang.  Comments below.

 ---
  Documentation/powerpc/dts-bindings/fsl/i2c.txt |   30 
 +++
  1 files changed, 24 insertions(+), 6 deletions(-)

 diff --git a/Documentation/powerpc/dts-bindings/fsl/i2c.txt 
 b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
 index b6d2e21..2f62dae 100644
 --- a/Documentation/powerpc/dts-bindings/fsl/i2c.txt
 +++ b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
 @@ -9,8 +9,9 @@ Recommended properties :

  - compatible : compatibility list with 2 entries, the first should
be fsl,CHIP-i2c where CHIP is the name of a compatible processor,
 -   e.g. mpc8313, mpc8543, mpc8544, mpc5200 or mpc5200b. The second one
 -   should be fsl-i2c.
 +   e.g. mpc8313, mpc8543, mpc8544, mpc5121, mpc5200 or mpc5200b. The
 +   second one should be fsl-i2c. For the mpc5121, an additional node
 +   fsl,mpc5121-i2c-ctrl is required as shown in the example below.
 While you're editing this line; drop the requirement for the second
 value to be 'fsl-i2c'.  We don't use it anymore, and only preserve it
 for backwards compatibility with old trees.
 
 OK.
 
  - interrupts : a b where a is the interrupt number and b is a
field that represents an encoding of the sense and level
information for the interrupt.  This should be encoded based on
 @@ -20,29 +21,46 @@ Recommended properties :
services interrupts for this device.
  - fsl,preserve-clocking : boolean; if defined, the clock settings
from the bootloader are preserved (not touched).
 - - clock-frequency : desired I2C bus clock frequency in Hz.
 + - clock-frequency : desired I2C bus clock frequency in Hz.  If this
 +   property and fsl,preserve-clocking is not defined, a safe fixed
 +   clock divider value is used (resulting in a small clock frequency).
 Nah, leave this as is.  Don't make it sound like omitting both
 properties is a valid option.  The driver may (and should!) handle the
 situation gracefully, but that fact does not need to be documented.
 
 The safe value is not a good choice, indeed. Then it will also change
 MPC_I2C_CLOCK_SAFE to MPC_I2C_CLOCK_LEGACY in i2c-mpc.c.
 
 I will also fix the other issues you commented on.

And I will also remove the device_type line from:

 -
 Required properties :

 - device_type : Should be i2c
 - reg : Offset and length of the register set for the device
 -

Wolfgang.
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[PATCH v5 1/3] i2c-mpc: use __devinit[data] for initialization functions and data

2010-01-31 Thread Wolfgang Grandegger

From: Wolfgang Grandegger w...@denx.de

__devinit[data] has not yet been used for all initialization functions
and data. To avoid truncating lines, the struct mpc_i2c_match_data has
been renamed to mpc_i2c_data, which is even the better name.

Signed-off-by: Wolfgang Grandegger w...@denx.de
Tested-by: Wolfram Sang w.s...@pengutronix.de
---
 drivers/i2c/busses/i2c-mpc.c |  103 +++--
 1 files changed, 48 insertions(+), 55 deletions(-)

diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index f627001..275ebe6 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -66,7 +66,7 @@ struct mpc_i2c_divider {
u16 fdr;/* including dfsrr */
 };
 
-struct mpc_i2c_match_data {
+struct mpc_i2c_data {
void (*setclock)(struct device_node *node,
 struct mpc_i2c *i2c,
 u32 clock, u32 prescaler);
@@ -165,7 +165,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, 
int writing)
 }
 
 #ifdef CONFIG_PPC_MPC52xx
-static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
+static const struct __devinitdata mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
{36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
@@ -186,7 +186,8 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] 
= {
{10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f}
 };
 
-int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
+static int __devinit mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock,
+ int prescaler)
 {
const struct mpc_i2c_divider *div = NULL;
unsigned int pvr = mfspr(SPRN_PVR);
@@ -215,9 +216,9 @@ int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 
clock, int prescaler)
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void mpc_i2c_setclock_52xx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -230,15 +231,15 @@ static void mpc_i2c_setclock_52xx(struct device_node 
*node,
dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
 }
 #else /* !CONFIG_PPC_MPC52xx */
-static void mpc_i2c_setclock_52xx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
 }
 #endif /* CONFIG_PPC_MPC52xx*/
 
 #ifdef CONFIG_FSL_SOC
-static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
+static const struct __devinitdata mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
{160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123},
{288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102},
{416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127},
@@ -258,7 +259,7 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] 
= {
{49152, 0x011e}, {61440, 0x011f}
 };
 
-u32 mpc_i2c_get_sec_cfg_8xxx(void)
+static u32 __devinit mpc_i2c_get_sec_cfg_8xxx(void)
 {
struct device_node *node = NULL;
u32 __iomem *reg;
@@ -287,7 +288,8 @@ u32 mpc_i2c_get_sec_cfg_8xxx(void)
return val;
 }
 
-int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler)
+static int __devinit mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock,
+ u32 prescaler)
 {
const struct mpc_i2c_divider *div = NULL;
u32 divider;
@@ -320,9 +322,9 @@ int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 
clock, u32 prescaler)
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void mpc_i2c_setclock_8xxx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -338,9 +340,9 @@ static void mpc_i2c_setclock_8xxx(struct device_node *node,
 }
 
 #else /* !CONFIG_FSL_SOC */
-static void mpc_i2c_setclock_8xxx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node

[PATCH v5 2/3] i2c-mpc: add support for the MPC512x processors from Freescale

2010-01-31 Thread Wolfgang Grandegger

From: Wolfgang Grandegger w...@denx.de

The setclock initialization functions have been renamed to setup
because I2C interrupts must be enabled for the MPC512x. This requires
to handle fsl,preserve-clocking in a slighly different way. Also,
the old settings are now reported calling dev_dbg(). For the MPC512x
the clock setup function of the MPC52xx can be re-used. Furthermore,
the Kconfig help has been updated and corrected.

Signed-off-by: Wolfgang Grandegger w...@denx.de
Reviewed-by: Wolfram Sang w.s...@pengutronix.de
---
 drivers/i2c/busses/Kconfig   |7 +-
 drivers/i2c/busses/i2c-mpc.c |  131 ++
 2 files changed, 96 insertions(+), 42 deletions(-)

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 5f318ce..5477e41 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -418,13 +418,12 @@ config I2C_IXP2000
  instead.
 
 config I2C_MPC
-   tristate MPC107/824x/85xx/52xx/86xx
+   tristate MPC107/824x/85xx/512x/52xx/83xx/86xx
depends on PPC32
help
  If you say yes to this option, support will be included for the
- built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
- MPC85xx/MPC8641 family processors. The driver may also work on 52xx
- family processors, though interrupts are known not to work.
+ built-in I2C interface on the MPC107, Tsi107, MPC512x, MPC52xx,
+ MPC8240, MPC8245, MPC83xx, MPC85xx and MPC8641 family processors.
 
  This driver can also be built as a module.  If so, the module
  will be called i2c-mpc.
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 275ebe6..3a351c5 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -31,6 +31,9 @@
 
 #define DRV_NAME mpc-i2c
 
+#define MPC_I2C_CLOCK_SAFE 0
+#define MPC_I2C_CLOCK_PRESERVE (~0U)
+
 #define MPC_I2C_FDR   0x04
 #define MPC_I2C_CR0x08
 #define MPC_I2C_SR0x0c
@@ -67,9 +70,8 @@ struct mpc_i2c_divider {
 };
 
 struct mpc_i2c_data {
-   void (*setclock)(struct device_node *node,
-struct mpc_i2c *i2c,
-u32 clock, u32 prescaler);
+   void (*setup)(struct device_node *node, struct mpc_i2c *i2c,
+ u32 clock, u32 prescaler);
u32 prescaler;
 };
 
@@ -164,7 +166,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, 
int writing)
return 0;
 }
 
-#ifdef CONFIG_PPC_MPC52xx
+#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_PPC_MPC512x)
 static const struct __devinitdata mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
@@ -194,7 +196,7 @@ static int __devinit mpc_i2c_get_fdr_52xx(struct 
device_node *node, u32 clock,
u32 divider;
int i;
 
-   if (!clock)
+   if (clock == MPC_I2C_CLOCK_SAFE)
return -EINVAL;
 
/* Determine divider value */
@@ -216,12 +218,18 @@ static int __devinit mpc_i2c_get_fdr_52xx(struct 
device_node *node, u32 clock,
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
int ret, fdr;
 
+   if (clock == MPC_I2C_CLOCK_PRESERVE) {
+   dev_dbg(i2c-dev, using fdr %d\n,
+   readb(i2c-base + MPC_I2C_FDR));
+   return;
+   }
+
ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler);
fdr = (ret = 0) ? ret : 0x3f; /* backward compatibility */
 
@@ -230,13 +238,49 @@ static void __devinit mpc_i2c_setclock_52xx(struct 
device_node *node,
if (ret = 0)
dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
 }
-#else /* !CONFIG_PPC_MPC52xx */
-static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+#else /* !(CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x) */
+static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
+{
+}
+#endif /* CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x */
+
+#ifdef CONFIG_PPC_MPC512x
+static void __devinit mpc_i2c_setup_512x(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
+{
+   struct device_node *node_ctrl;
+   void __iomem *ctrl

[PATCH v4 3/3] powerpc: doc/dts-bindings: update doc of FSL I2C bindings

From: Wolfgang Grandegger w...@denx.de

This patch adds the MPC5121 to the list of supported devices,
enhances the doc of the clock-frequency property and removes
the obsolete cell-index property from the example nodes.
Furthermore and example for the MPC5121 has been added.

Signed-off-by: Wolfgang Grandegger w...@denx.de
---
 Documentation/powerpc/dts-bindings/fsl/i2c.txt |   30 +++
 1 files changed, 24 insertions(+), 6 deletions(-)

diff --git a/Documentation/powerpc/dts-bindings/fsl/i2c.txt 
b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
index b6d2e21..2f62dae 100644
--- a/Documentation/powerpc/dts-bindings/fsl/i2c.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
@@ -9,8 +9,9 @@ Recommended properties :
 
  - compatible : compatibility list with 2 entries, the first should
be fsl,CHIP-i2c where CHIP is the name of a compatible processor,
-   e.g. mpc8313, mpc8543, mpc8544, mpc5200 or mpc5200b. The second one
-   should be fsl-i2c.
+   e.g. mpc8313, mpc8543, mpc8544, mpc5121, mpc5200 or mpc5200b. The
+   second one should be fsl-i2c. For the mpc5121, an additional node
+   fsl,mpc5121-i2c-ctrl is required as shown in the example below.
  - interrupts : a b where a is the interrupt number and b is a
field that represents an encoding of the sense and level
information for the interrupt.  This should be encoded based on
@@ -20,29 +21,46 @@ Recommended properties :
services interrupts for this device.
  - fsl,preserve-clocking : boolean; if defined, the clock settings
from the bootloader are preserved (not touched).
- - clock-frequency : desired I2C bus clock frequency in Hz.
+ - clock-frequency : desired I2C bus clock frequency in Hz.  If this
+   property and fsl,preserve-clocking is not defined, a safe fixed
+   clock divider value is used (resulting in a small clock frequency).
 
 Examples :
 
+   /* MPC5121 based board */
+   i...@1740 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = fsl,mpc5121-i2c, fsl-i2c;
+   reg = 0x1740 0x20;
+   interrupts = 11 0x8;
+   interrupt-parent = ipic;
+   clock-frequency = 10;
+   };
+
+   i2ccont...@1760 {
+   compatible = fsl,mpc5121-i2c-ctrl;
+   reg = 0x1760 0x8;
+   };
+
+   /* MPC5200B based board */
i...@3d00 {
#address-cells = 1;
#size-cells = 0;
compatible = fsl,mpc5200b-i2c,fsl,mpc5200-i2c,fsl-i2c;
-   cell-index = 0;
reg = 0x3d00 0x40;
interrupts = 2 15 0;
interrupt-parent = mpc5200_pic;
fsl,preserve-clocking;
};
 
+   /* MPC8544 base board */
i...@3100 {
#address-cells = 1;
#size-cells = 0;
-   cell-index = 1;
compatible = fsl,mpc8544-i2c, fsl-i2c;
reg = 0x3100 0x100;
interrupts = 43 2;
interrupt-parent = mpic;
clock-frequency = 40;
};
-
-- 
1.6.2.5

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[PATCH v4 0/3] i2c-mpc: add support for the Freescale MPC512x and other fixes

This patch series adds support for the MPC512x from Freescale to the
i2c-mpc driver. At that occasion, issues with  __devinit[data] have
been fixed and the doc of the FSL I2C dts bindings updated. It has
been tested on a MPC5121ADS, TQM5200 and TQM8560 board

Changes since v1:

- use macro MPC_I2C_CLOCK_PRESERVE/SAFE for the special clock settings.
- document the special DTS node fsl,mpc5121-i2c-ctrl.
- update and correct the Kconfig help.
- some other minor fixes as suggested by Wolfram.

Changes since v2:

- use __init[data] instead of __devinit[data] for this driver.

Changes since v3:

- switch back to __devinit[data] as pointed out by Ben.

Wolfgang

Wolfgang Grandegger (3):
  i2c-mpc: use __devinit[data] for initialization functions and data
  i2c-mpc: add support for the MPC512x processors from Freescale
  powerpc: doc/dts-bindings: update doc of FSL I2C bindings

 Documentation/powerpc/dts-bindings/fsl/i2c.txt |   30 +++-
 drivers/i2c/busses/Kconfig |7 +-
 drivers/i2c/busses/i2c-mpc.c   |  194 +++-
 3 files changed, 148 insertions(+), 83 deletions(-)

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[PATCH v4 2/3] i2c-mpc: add support for the MPC512x processors from Freescale

From: Wolfgang Grandegger w...@denx.de

The setclock initialization functions have been renamed to setup
because I2C interrupts must be enabled for the MPC512x. This requires
to handle fsl,preserve-clocking in a slighly different way. Also,
the old settings are now reported calling dev_dbg(). For the MPC512x
the clock setup function of the MPC52xx can be re-used. Furthermore,
the Kconfig help has been updated and corrected.

Signed-off-by: Wolfgang Grandegger w...@denx.de
---
 drivers/i2c/busses/Kconfig   |7 +-
 drivers/i2c/busses/i2c-mpc.c |  127 ++
 2 files changed, 94 insertions(+), 40 deletions(-)

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 5f318ce..5477e41 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -418,13 +418,12 @@ config I2C_IXP2000
  instead.
 
 config I2C_MPC
-   tristate MPC107/824x/85xx/52xx/86xx
+   tristate MPC107/824x/85xx/512x/52xx/83xx/86xx
depends on PPC32
help
  If you say yes to this option, support will be included for the
- built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
- MPC85xx/MPC8641 family processors. The driver may also work on 52xx
- family processors, though interrupts are known not to work.
+ built-in I2C interface on the MPC107, Tsi107, MPC512x, MPC52xx,
+ MPC8240, MPC8245, MPC83xx, MPC85xx and MPC8641 family processors.
 
  This driver can also be built as a module.  If so, the module
  will be called i2c-mpc.
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 275ebe6..1af0730 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -31,6 +31,9 @@
 
 #define DRV_NAME mpc-i2c
 
+#define MPC_I2C_CLOCK_SAFE 0
+#define MPC_I2C_CLOCK_PRESERVE (~0U)
+
 #define MPC_I2C_FDR   0x04
 #define MPC_I2C_CR0x08
 #define MPC_I2C_SR0x0c
@@ -67,9 +70,8 @@ struct mpc_i2c_divider {
 };
 
 struct mpc_i2c_data {
-   void (*setclock)(struct device_node *node,
-struct mpc_i2c *i2c,
-u32 clock, u32 prescaler);
+   void (*setup)(struct device_node *node, struct mpc_i2c *i2c,
+ u32 clock, u32 prescaler);
u32 prescaler;
 };
 
@@ -164,7 +166,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, 
int writing)
return 0;
 }
 
-#ifdef CONFIG_PPC_MPC52xx
+#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_PPC_MPC512x)
 static const struct __devinitdata mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
@@ -216,12 +218,18 @@ static int __devinit mpc_i2c_get_fdr_52xx(struct 
device_node *node, u32 clock,
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
int ret, fdr;
 
+   if (clock == MPC_I2C_CLOCK_PRESERVE) {
+   dev_dbg(i2c-dev, using fdr %d\n,
+   readb(i2c-base + MPC_I2C_FDR));
+   return;
+   }
+
ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler);
fdr = (ret = 0) ? ret : 0x3f; /* backward compatibility */
 
@@ -230,13 +238,49 @@ static void __devinit mpc_i2c_setclock_52xx(struct 
device_node *node,
if (ret = 0)
dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
 }
-#else /* !CONFIG_PPC_MPC52xx */
-static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+#else /* !(CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x) */
+static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
+{
+}
+#endif /* CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x */
+
+#ifdef CONFIG_PPC_MPC512x
+static void __devinit mpc_i2c_setup_512x(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
+{
+   struct device_node *node_ctrl;
+   void __iomem *ctrl;
+   const u32 *pval;
+   u32 idx;
+
+   /* Enable I2C interrupts for mpc5121 */
+   node_ctrl = of_find_compatible_node(NULL, NULL,
+   fsl,mpc5121-i2c-ctrl);
+   if (node_ctrl) {
+   ctrl = of_iomap(node_ctrl, 0);
+   if (ctrl

[PATCH v4 1/3] i2c-mpc: use __devinit[data] for initialization functions and data

From: Wolfgang Grandegger w...@denx.de

__devinit[data] has not yet been used for all initialization functions
and data. To avoid truncating lines, the struct mpc_i2c_match_data has
been renamed to mpc_i2c_data, which is even the better name.

Signed-off-by: Wolfgang Grandegger w...@denx.de
---
 drivers/i2c/busses/i2c-mpc.c |  103 +++--
 1 files changed, 48 insertions(+), 55 deletions(-)

diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index f627001..275ebe6 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -66,7 +66,7 @@ struct mpc_i2c_divider {
u16 fdr;/* including dfsrr */
 };
 
-struct mpc_i2c_match_data {
+struct mpc_i2c_data {
void (*setclock)(struct device_node *node,
 struct mpc_i2c *i2c,
 u32 clock, u32 prescaler);
@@ -165,7 +165,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, 
int writing)
 }
 
 #ifdef CONFIG_PPC_MPC52xx
-static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
+static const struct __devinitdata mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
{36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
@@ -186,7 +186,8 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] 
= {
{10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f}
 };
 
-int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
+static int __devinit mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock,
+ int prescaler)
 {
const struct mpc_i2c_divider *div = NULL;
unsigned int pvr = mfspr(SPRN_PVR);
@@ -215,9 +216,9 @@ int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 
clock, int prescaler)
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void mpc_i2c_setclock_52xx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -230,15 +231,15 @@ static void mpc_i2c_setclock_52xx(struct device_node 
*node,
dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
 }
 #else /* !CONFIG_PPC_MPC52xx */
-static void mpc_i2c_setclock_52xx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
 }
 #endif /* CONFIG_PPC_MPC52xx*/
 
 #ifdef CONFIG_FSL_SOC
-static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
+static const struct __devinitdata mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
{160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123},
{288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102},
{416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127},
@@ -258,7 +259,7 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] 
= {
{49152, 0x011e}, {61440, 0x011f}
 };
 
-u32 mpc_i2c_get_sec_cfg_8xxx(void)
+static u32 __devinit mpc_i2c_get_sec_cfg_8xxx(void)
 {
struct device_node *node = NULL;
u32 __iomem *reg;
@@ -287,7 +288,8 @@ u32 mpc_i2c_get_sec_cfg_8xxx(void)
return val;
 }
 
-int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler)
+static int __devinit mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock,
+ u32 prescaler)
 {
const struct mpc_i2c_divider *div = NULL;
u32 divider;
@@ -320,9 +322,9 @@ int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 
clock, u32 prescaler)
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void mpc_i2c_setclock_8xxx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -338,9 +340,9 @@ static void mpc_i2c_setclock_8xxx(struct device_node *node,
 }
 
 #else /* !CONFIG_FSL_SOC */
-static void mpc_i2c_setclock_8xxx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node,
+   struct mpc_i2c *i2c

Re: [net-next-2.6 PATCH 2/3] fs_enet: Add support for MPC512x to fs_enet driver

2010-01-27 Thread Wolfgang Grandegger

Arnd Bergmann wrote:
 On Sunday 24 January 2010, Wolfgang Denk wrote:
 In message 4b5c5bdf.6020...@grandegger.com you wrote:
 You are probably right and your proposal would likely result in more
 transparent (less ugly) code. There has been some discussion about
 unifying FEC drivers when the patches (with the same subject) have been
 submitted for the first time in May last year, but it was not about 512x
 and 8xx, IIRC.
 You can re-read this discussion here:

 http://patchwork.ozlabs.org/patch/26927/

 ee especiall Grant's note of 2009-05-21 15:36:11: If it looks too
 ugly, then just fork the driver.
 
 Ok. I fully agree with what Grant said in that thread, especially the
 way the files could be split. Forking the entire driver would work
 as an easy way to get it running at first, and we still have the option
 of reorganizing the duplicate parts later in a saner way if that's seen
 as helpful. I'd assume that at least some parts of it could become a
 lib_fs_enet module that can be shared by all of them.

Yes, I also vote for forking the driver allowing a clean implementation.
 I don't think it makes sense to share a driver with the 8xx for the
reasons you already mentioned. And the 8xx is a dying out arch anyway.

Wolfgang.
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Re: [PATCH v2 1/3] i2c-mpc: use __devinit[data] for initialization functions and data

Ben Dooks wrote:
 On Mon, Jan 25, 2010 at 09:55:04PM +0100, Wolfgang Grandegger wrote:
 From: Wolfgang Grandegger w...@denx.de

 __devinit[data] has not yet been used for all initialization functions
 and data. To avoid truncating lines, the struct mpc_i2c_match_data has
 been renamed to mpc_i2c_data, which is even the better name.

 Signed-off-by: Wolfgang Grandegger w...@denx.de
 ---
  drivers/i2c/busses/i2c-mpc.c |   99 
 +++--
  1 files changed, 46 insertions(+), 53 deletions(-)

 diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
 index f627001..2cb864e 100644
 --- a/drivers/i2c/busses/i2c-mpc.c
 +++ b/drivers/i2c/busses/i2c-mpc.c
 @@ -66,7 +66,7 @@ struct mpc_i2c_divider {
  u16 fdr;/* including dfsrr */
  };
  
 -struct mpc_i2c_match_data {
 +struct mpc_i2c_data {
  void (*setclock)(struct device_node *node,
   struct mpc_i2c *i2c,
   u32 clock, u32 prescaler);
 @@ -165,7 +165,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned 
 timeout, int writing)
  }
  
  #ifdef CONFIG_PPC_MPC52xx
 -static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
 +static const struct __devinitdata mpc_i2c_divider mpc_i2c_dividers_52xx[] = 
 {
  {20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
  {28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
  {36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
 @@ -186,7 +186,8 @@ static const struct mpc_i2c_divider 
 mpc_i2c_dividers_52xx[] = {
  {10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f}
  };
  
 -int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
 +static int __devinit mpc_i2c_get_fdr_52xx(struct device_node *node, u32 
 clock,
 +  int prescaler)
  {
  const struct mpc_i2c_divider *div = NULL;
  unsigned int pvr = mfspr(SPRN_PVR);
 @@ -215,9 +216,9 @@ int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 
 clock, int prescaler)
  return div ? (int)div-fdr : -EINVAL;
  }
  
 -static void mpc_i2c_setclock_52xx(struct device_node *node,
 -  struct mpc_i2c *i2c,
 -  u32 clock, u32 prescaler)
 +static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
 +struct mpc_i2c *i2c,
 +u32 clock, u32 prescaler)
  {
  int ret, fdr;
  
 @@ -230,15 +231,15 @@ static void mpc_i2c_setclock_52xx(struct device_node 
 *node,
  dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
  }
  #else /* !CONFIG_PPC_MPC52xx */
 -static void mpc_i2c_setclock_52xx(struct device_node *node,
 -  struct mpc_i2c *i2c,
 -  u32 clock, u32 prescaler)
 +static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
 +struct mpc_i2c *i2c,
 +u32 clock, u32 prescaler)
  {
  }
  #endif /* CONFIG_PPC_MPC52xx*/
  
  #ifdef CONFIG_FSL_SOC
 -static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
 +static const struct __devinitdata mpc_i2c_divider mpc_i2c_dividers_8xxx[] = 
 {
  {160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123},
  {288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102},
  {416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127},
 @@ -258,7 +259,7 @@ static const struct mpc_i2c_divider 
 mpc_i2c_dividers_8xxx[] = {
  {49152, 0x011e}, {61440, 0x011f}
  };
  
 -u32 mpc_i2c_get_sec_cfg_8xxx(void)
 +static u32 __devinit mpc_i2c_get_sec_cfg_8xxx(void)
  {
  struct device_node *node = NULL;
  u32 __iomem *reg;
 @@ -287,7 +288,8 @@ u32 mpc_i2c_get_sec_cfg_8xxx(void)
  return val;
  }
  
 -int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler)
 +static int __devinit mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 
 clock,
 +  u32 prescaler)
  {
  const struct mpc_i2c_divider *div = NULL;
  u32 divider;
 @@ -320,9 +322,9 @@ int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 
 clock, u32 prescaler)
  return div ? (int)div-fdr : -EINVAL;
  }
  
 -static void mpc_i2c_setclock_8xxx(struct device_node *node,
 -  struct mpc_i2c *i2c,
 -  u32 clock, u32 prescaler)
 +static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node,
 +struct mpc_i2c *i2c,
 +u32 clock, u32 prescaler)
  {
  int ret, fdr;
  
 @@ -338,9 +340,9 @@ static void mpc_i2c_setclock_8xxx(struct device_node 
 *node,
  }
  
  #else /* !CONFIG_FSL_SOC */
 -static void mpc_i2c_setclock_8xxx(struct device_node *node,
 -  struct mpc_i2c *i2c,
 -  u32 clock, u32 prescaler)
 +static void __devinit mpc_i2c_setclock_8xxx(struct device_node

Re: [PATCH 2/3] i2c-mpc: add support for the MPC512x processors from Freescale

Ben Dooks wrote:
 On Mon, Jan 25, 2010 at 04:15:09PM +0100, Wolfram Sang wrote:
  
 -static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
 - struct mpc_i2c *i2c,
 - u32 clock, u32 prescaler)
 +static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
 +  struct mpc_i2c *i2c,
 +  u32 clock, u32 prescaler)
  {
   int ret, fdr;
  
 + if (clock == -1) {
 Could we use 0 for 'no_clock'? This would make the above statement simply
 0 is already used to maintain backward compatibility setting a safe
 divider.
 Ah, now I see:

 'clock == -1' means 'preserve clocks' (and is checked here in 
 mpc_i2c_setup_52xx())
 'clock ==  0' means 'safe divider' (and is checked in mpc_i2c_get_fdr_52xx())
 
 hmm, sounds like a job for a  #define or similar.

See v2 of this patch.

Wolfgang.
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[PATCH v3 0/3] i2c-mpc: add support for the Freescale MPC512x and other fixes

From: Wolfgang Grandegger w...@denx.de

This patch series adds support for the MPC512x from Freescale to the
i2c-mpc driver. At that occasion, issues with  __devinit[data] have
been fixed and the doc of the FSL I2C dts bindings updated. It has
been tested on a MPC5121ADS, TQM5200 and TQM8560 board

Changes since v1:

- use macro MPC_I2C_CLOCK_PRESERVE/SAFE for the special clock settings.
- document the special DTS node fsl,mpc5121-i2c-ctrl.
- update and correct the Kconfig help.
- some other minor fixes as suggested by Wolfram.

Changes since v2:

- use __init[data] instead of __devinit[data] for this driver.

Wolfgang

Wolfgang Grandegger (3):
  i2c-mpc: use __init[data] for initialization functions and data
  i2c-mpc: add support for the MPC512x processors from Freescale
  powerpc: doc/dts-bindings: update doc of FSL I2C bindings

 Documentation/powerpc/dts-bindings/fsl/i2c.txt |   30 +++-
 drivers/i2c/busses/Kconfig |7 +-
 drivers/i2c/busses/i2c-mpc.c   |  197 +++-
 3 files changed, 150 insertions(+), 84 deletions(-)

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[PATCH v3 3/3] powerpc: doc/dts-bindings: update doc of FSL I2C bindings

From: Wolfgang Grandegger w...@denx.de

This patch adds the MPC5121 to the list of supported devices,
enhances the doc of the clock-frequency property and removes
the obsolete cell-index property from the example nodes.
Furthermore and example for the MPC5121 has been added.

Signed-off-by: Wolfgang Grandegger w...@denx.de
---
 Documentation/powerpc/dts-bindings/fsl/i2c.txt |   30 +++
 1 files changed, 24 insertions(+), 6 deletions(-)

diff --git a/Documentation/powerpc/dts-bindings/fsl/i2c.txt 
b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
index b6d2e21..2f62dae 100644
--- a/Documentation/powerpc/dts-bindings/fsl/i2c.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
@@ -9,8 +9,9 @@ Recommended properties :
 
  - compatible : compatibility list with 2 entries, the first should
be fsl,CHIP-i2c where CHIP is the name of a compatible processor,
-   e.g. mpc8313, mpc8543, mpc8544, mpc5200 or mpc5200b. The second one
-   should be fsl-i2c.
+   e.g. mpc8313, mpc8543, mpc8544, mpc5121, mpc5200 or mpc5200b. The
+   second one should be fsl-i2c. For the mpc5121, an additional node
+   fsl,mpc5121-i2c-ctrl is required as shown in the example below.
  - interrupts : a b where a is the interrupt number and b is a
field that represents an encoding of the sense and level
information for the interrupt.  This should be encoded based on
@@ -20,29 +21,46 @@ Recommended properties :
services interrupts for this device.
  - fsl,preserve-clocking : boolean; if defined, the clock settings
from the bootloader are preserved (not touched).
- - clock-frequency : desired I2C bus clock frequency in Hz.
+ - clock-frequency : desired I2C bus clock frequency in Hz.  If this
+   property and fsl,preserve-clocking is not defined, a safe fixed
+   clock divider value is used (resulting in a small clock frequency).
 
 Examples :
 
+   /* MPC5121 based board */
+   i...@1740 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = fsl,mpc5121-i2c, fsl-i2c;
+   reg = 0x1740 0x20;
+   interrupts = 11 0x8;
+   interrupt-parent = ipic;
+   clock-frequency = 10;
+   };
+
+   i2ccont...@1760 {
+   compatible = fsl,mpc5121-i2c-ctrl;
+   reg = 0x1760 0x8;
+   };
+
+   /* MPC5200B based board */
i...@3d00 {
#address-cells = 1;
#size-cells = 0;
compatible = fsl,mpc5200b-i2c,fsl,mpc5200-i2c,fsl-i2c;
-   cell-index = 0;
reg = 0x3d00 0x40;
interrupts = 2 15 0;
interrupt-parent = mpc5200_pic;
fsl,preserve-clocking;
};
 
+   /* MPC8544 base board */
i...@3100 {
#address-cells = 1;
#size-cells = 0;
-   cell-index = 1;
compatible = fsl,mpc8544-i2c, fsl-i2c;
reg = 0x3100 0x100;
interrupts = 43 2;
interrupt-parent = mpic;
clock-frequency = 40;
};
-
-- 
1.6.2.5

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[PATCH v3 2/3] i2c-mpc: add support for the MPC512x processors from Freescale

From: Wolfgang Grandegger w...@denx.de

The setclock initialization functions have been renamed to setup
because I2C interrupts must be enabled for the MPC512x. This requires
to handle fsl,preserve-clocking in a slighly different way. Also,
the old settings are now reported calling dev_dbg(). For the MPC512x
the clock setup function of the MPC52xx can be re-used. Furthermore,
the Kconfig help has been updated and corrected.

Signed-off-by: Wolfgang Grandegger w...@denx.de
---
 drivers/i2c/busses/Kconfig   |7 +--
 drivers/i2c/busses/i2c-mpc.c |  122 ++---
 2 files changed, 92 insertions(+), 37 deletions(-)

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 5f318ce..5477e41 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -418,13 +418,12 @@ config I2C_IXP2000
  instead.
 
 config I2C_MPC
-   tristate MPC107/824x/85xx/52xx/86xx
+   tristate MPC107/824x/85xx/512x/52xx/83xx/86xx
depends on PPC32
help
  If you say yes to this option, support will be included for the
- built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
- MPC85xx/MPC8641 family processors. The driver may also work on 52xx
- family processors, though interrupts are known not to work.
+ built-in I2C interface on the MPC107, Tsi107, MPC512x, MPC52xx,
+ MPC8240, MPC8245, MPC83xx, MPC85xx and MPC8641 family processors.
 
  This driver can also be built as a module.  If so, the module
  will be called i2c-mpc.
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 222f6b8..faea046 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -31,6 +31,9 @@
 
 #define DRV_NAME mpc-i2c
 
+#define MPC_I2C_CLOCK_SAFE 0
+#define MPC_I2C_CLOCK_PRESERVE (~0U)
+
 #define MPC_I2C_FDR   0x04
 #define MPC_I2C_CR0x08
 #define MPC_I2C_SR0x0c
@@ -67,9 +70,8 @@ struct mpc_i2c_divider {
 };
 
 struct mpc_i2c_data {
-   void (*setclock)(struct device_node *node,
-struct mpc_i2c *i2c,
-u32 clock, u32 prescaler);
+   void (*setup)(struct device_node *node, struct mpc_i2c *i2c,
+ u32 clock, u32 prescaler);
u32 prescaler;
 };
 
@@ -164,7 +166,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, 
int writing)
return 0;
 }
 
-#ifdef CONFIG_PPC_MPC52xx
+#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_PPC_MPC512x)
 static const struct __initdata mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
@@ -216,12 +218,18 @@ static int __init mpc_i2c_get_fdr_52xx(struct device_node 
*node, u32 clock,
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void __init mpc_i2c_setclock_52xx(struct device_node *node,
-struct mpc_i2c *i2c,
-u32 clock, u32 prescaler)
+static void __init mpc_i2c_setup_52xx(struct device_node *node,
+ struct mpc_i2c *i2c,
+ u32 clock, u32 prescaler)
 {
int ret, fdr;
 
+   if (clock == MPC_I2C_CLOCK_PRESERVE) {
+   dev_dbg(i2c-dev, using fdr %d\n,
+   readb(i2c-base + MPC_I2C_FDR));
+   return;
+   }
+
ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler);
fdr = (ret = 0) ? ret : 0x3f; /* backward compatibility */
 
@@ -230,13 +238,49 @@ static void __init mpc_i2c_setclock_52xx(struct 
device_node *node,
if (ret = 0)
dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
 }
-#else /* !CONFIG_PPC_MPC52xx */
-static void __init mpc_i2c_setclock_52xx(struct device_node *node,
+#else /* !(CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x) */
+static void __init mpc_i2c_setup_52xx(struct device_node *node,
+ struct mpc_i2c *i2c,
+ u32 clock, u32 prescaler)
+{
+}
+#endif /* CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x */
+
+#ifdef CONFIG_PPC_MPC512x
+static void __init mpc_i2c_setup_512x(struct device_node *node,
 struct mpc_i2c *i2c,
 u32 clock, u32 prescaler)
 {
+   struct device_node *node_ctrl;
+   void __iomem *ctrl;
+   const u32 *pval;
+   u32 idx;
+
+   /* Enable I2C interrupts for mpc5121 */
+   node_ctrl = of_find_compatible_node(NULL, NULL,
+   fsl,mpc5121-i2c-ctrl);
+   if (node_ctrl) {
+   ctrl = of_iomap(node_ctrl, 0);
+   if (ctrl) {
+   /* Interrupt enable bits for i2c-0/1/2: bit 24/26/28 */
+   pval = of_get_property(node, reg, NULL);
+   idx = (*pval  0xff

[PATCH v3 1/3] i2c-mpc: use __init[data] for initialization functions and data

From: Wolfgang Grandegger w...@denx.de

__devinit[data] has been renamed to __init[data] as this is not
a hotplugable device. Futhermore, all initialization functions and
data are now marked properly. To avoid truncating lines, the struct
mpc_i2c_match_data has been renamed to mpc_i2c_data, which is
even the better name.

Signed-off-by: Wolfgang Grandegger w...@denx.de
---
 drivers/i2c/busses/i2c-mpc.c |  107 +++--
 1 files changed, 50 insertions(+), 57 deletions(-)

diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index f627001..222f6b8 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -66,7 +66,7 @@ struct mpc_i2c_divider {
u16 fdr;/* including dfsrr */
 };
 
-struct mpc_i2c_match_data {
+struct mpc_i2c_data {
void (*setclock)(struct device_node *node,
 struct mpc_i2c *i2c,
 u32 clock, u32 prescaler);
@@ -165,7 +165,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, 
int writing)
 }
 
 #ifdef CONFIG_PPC_MPC52xx
-static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
+static const struct __initdata mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
{36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
@@ -186,7 +186,8 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] 
= {
{10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f}
 };
 
-int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
+static int __init mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock,
+  int prescaler)
 {
const struct mpc_i2c_divider *div = NULL;
unsigned int pvr = mfspr(SPRN_PVR);
@@ -215,9 +216,9 @@ int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 
clock, int prescaler)
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void mpc_i2c_setclock_52xx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __init mpc_i2c_setclock_52xx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -230,15 +231,15 @@ static void mpc_i2c_setclock_52xx(struct device_node 
*node,
dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
 }
 #else /* !CONFIG_PPC_MPC52xx */
-static void mpc_i2c_setclock_52xx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __init mpc_i2c_setclock_52xx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
 }
 #endif /* CONFIG_PPC_MPC52xx*/
 
 #ifdef CONFIG_FSL_SOC
-static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
+static const struct __initdata mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
{160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123},
{288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102},
{416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127},
@@ -258,7 +259,7 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] 
= {
{49152, 0x011e}, {61440, 0x011f}
 };
 
-u32 mpc_i2c_get_sec_cfg_8xxx(void)
+static u32 __init mpc_i2c_get_sec_cfg_8xxx(void)
 {
struct device_node *node = NULL;
u32 __iomem *reg;
@@ -287,7 +288,8 @@ u32 mpc_i2c_get_sec_cfg_8xxx(void)
return val;
 }
 
-int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler)
+static int __init mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock,
+  u32 prescaler)
 {
const struct mpc_i2c_divider *div = NULL;
u32 divider;
@@ -320,9 +322,9 @@ int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 
clock, u32 prescaler)
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void mpc_i2c_setclock_8xxx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __init mpc_i2c_setclock_8xxx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -338,9 +340,9 @@ static void mpc_i2c_setclock_8xxx(struct device_node *node,
 }
 
 #else /* !CONFIG_FSL_SOC */
-static void mpc_i2c_setclock_8xxx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __init mpc_i2c_setclock_8xxx(struct device_node *node,
+struct mpc_i2c *i2c

[PATCH 0/3] i2c-mpc: add support for the Freescale MPC512x and other fixes

This patch series adds support for the MPC512x from Freescale to the
i2c-mpc driver. At that occasion, issues with  __devinit[data] have
been fixed and the doc of the FSL I2C dts bindings updated. It has
been tested on a MPC5121ADS, TQM5200 and TQM8560 board

Wolfgang

Wolfgang Grandegger (3):
  i2c-mpc: use __devinit[data] for initialization functions and data
  i2c-mpc: add support for the MPC512x processors from Freescale
  powerpc: doc/dts-bindings: update doc of FSL I2C bindings

 Documentation/powerpc/dts-bindings/fsl/i2c.txt |   10 +-
 drivers/i2c/busses/Kconfig |9 +-
 drivers/i2c/busses/i2c-mpc.c   |  185 +++-
 3 files changed, 126 insertions(+), 78 deletions(-)

___
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[PATCH 1/3] i2c-mpc: use __devinit[data] for initialization functions and data

From: Wolfgang Grandegger w...@denx.de

__devinit[data] has not yet been used for all initialization functions
and data. To avoid truncating lines, the struct mpc_i2c_match_data has
been renamed to mpc_i2c_data, which is even the better name.

Signed-off-by: Wolfgang Grandegger w...@denx.de
---
 drivers/i2c/busses/i2c-mpc.c |   99 +++--
 1 files changed, 46 insertions(+), 53 deletions(-)

diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index f627001..2cb864e 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -66,7 +66,7 @@ struct mpc_i2c_divider {
u16 fdr;/* including dfsrr */
 };
 
-struct mpc_i2c_match_data {
+struct mpc_i2c_data {
void (*setclock)(struct device_node *node,
 struct mpc_i2c *i2c,
 u32 clock, u32 prescaler);
@@ -165,7 +165,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, 
int writing)
 }
 
 #ifdef CONFIG_PPC_MPC52xx
-static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
+static const struct __devinitdata mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
{36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
@@ -186,7 +186,8 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] 
= {
{10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f}
 };
 
-int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
+static int __devinit mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock,
+ int prescaler)
 {
const struct mpc_i2c_divider *div = NULL;
unsigned int pvr = mfspr(SPRN_PVR);
@@ -215,9 +216,9 @@ int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 
clock, int prescaler)
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void mpc_i2c_setclock_52xx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -230,15 +231,15 @@ static void mpc_i2c_setclock_52xx(struct device_node 
*node,
dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
 }
 #else /* !CONFIG_PPC_MPC52xx */
-static void mpc_i2c_setclock_52xx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
 }
 #endif /* CONFIG_PPC_MPC52xx*/
 
 #ifdef CONFIG_FSL_SOC
-static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
+static const struct __devinitdata mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
{160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123},
{288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102},
{416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127},
@@ -258,7 +259,7 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] 
= {
{49152, 0x011e}, {61440, 0x011f}
 };
 
-u32 mpc_i2c_get_sec_cfg_8xxx(void)
+static u32 __devinit mpc_i2c_get_sec_cfg_8xxx(void)
 {
struct device_node *node = NULL;
u32 __iomem *reg;
@@ -287,7 +288,8 @@ u32 mpc_i2c_get_sec_cfg_8xxx(void)
return val;
 }
 
-int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler)
+static int __devinit mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock,
+ u32 prescaler)
 {
const struct mpc_i2c_divider *div = NULL;
u32 divider;
@@ -320,9 +322,9 @@ int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 
clock, u32 prescaler)
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void mpc_i2c_setclock_8xxx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -338,9 +340,9 @@ static void mpc_i2c_setclock_8xxx(struct device_node *node,
 }
 
 #else /* !CONFIG_FSL_SOC */
-static void mpc_i2c_setclock_8xxx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node,
+   struct mpc_i2c *i2c

[PATCH 2/3] i2c-mpc: add support for the MPC512x processors from Freescale

From: Wolfgang Grandegger w...@denx.de

The setclock initialization functions have been renamed to setup
because I2C interrupts must be enabled for the MPC512x. This requires
to handle fsl,preserve-clocking in a slighly different way. Also,
the old settings are now reported calling dev_dbg(). For the MPC512x
the clock setup function of the MPC52xx can be re-used.

Signed-off-by: Wolfgang Grandegger w...@denx.de
---
 drivers/i2c/busses/Kconfig   |9 ++--
 drivers/i2c/busses/i2c-mpc.c |  122 ++
 2 files changed, 93 insertions(+), 38 deletions(-)

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 5f318ce..f481f30 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -418,13 +418,14 @@ config I2C_IXP2000
  instead.
 
 config I2C_MPC
-   tristate MPC107/824x/85xx/52xx/86xx
+   tristate MPC107/824x/85xx/512x/52xx/86xx
depends on PPC32
help
  If you say yes to this option, support will be included for the
- built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
- MPC85xx/MPC8641 family processors. The driver may also work on 52xx
- family processors, though interrupts are known not to work.
+ built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245,
+ MPC85xx/MPC8641 and MPC512x family processors. The driver may
+ also work on 52xx family processors, though interrupts are known
+ not to work.
 
  This driver can also be built as a module.  If so, the module
  will be called i2c-mpc.
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 2cb864e..70c3e5d 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -67,9 +67,8 @@ struct mpc_i2c_divider {
 };
 
 struct mpc_i2c_data {
-   void (*setclock)(struct device_node *node,
-struct mpc_i2c *i2c,
-u32 clock, u32 prescaler);
+   void (*setup)(struct device_node *node, struct mpc_i2c *i2c,
+ u32 clock, u32 prescaler);
u32 prescaler;
 };
 
@@ -164,7 +163,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, 
int writing)
return 0;
 }
 
-#ifdef CONFIG_PPC_MPC52xx
+#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_PPC_MPC512x)
 static const struct __devinitdata mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
@@ -216,12 +215,18 @@ static int __devinit mpc_i2c_get_fdr_52xx(struct 
device_node *node, u32 clock,
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
int ret, fdr;
 
+   if (clock == -1) {
+   dev_dbg(i2c-dev, using fdr %d\n,
+   readb(i2c-base + MPC_I2C_FDR));
+   return; /* preserve clocking */
+   }
+
ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler);
fdr = (ret = 0) ? ret : 0x3f; /* backward compatibility */
 
@@ -230,13 +235,50 @@ static void __devinit mpc_i2c_setclock_52xx(struct 
device_node *node,
if (ret = 0)
dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
 }
-#else /* !CONFIG_PPC_MPC52xx */
-static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+#else /* !(CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x) */
+static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
+{
+}
+#endif /* CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x */
+
+#ifdef CONFIG_PPC_MPC512x
+static void __devinit mpc_i2c_setup_512x(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
+{
+   struct device_node *node_ctrl;
+   void __iomem *ctrl;
+   const u32 *pval;
+   u32 idx;
+
+   /* Enable I2C interrupts for mpc5121 */
+   node_ctrl = of_find_compatible_node(NULL, NULL,
+   fsl,mpc5121-i2c-ctrl);
+   if (node_ctrl) {
+   ctrl = of_iomap(node_ctrl, 0);
+   if (ctrl) {
+
+   /* Interrupt enable bits for i2c-0/1/2: bit 24/26/28 */
+   pval = of_get_property(node, reg, NULL);
+   idx = (*pval  0xff

[PATCH 3/3] powerpc: doc/dts-bindings: update doc of FSL I2C bindings

From: Wolfgang Grandegger w...@denx.de

This patch adds the MPC5121 to the list of supported devices,
enhances the doc of the clock-frequency property and removes
the obsolete cell-index property from the example nodes.

Signed-off-by: Wolfgang Grandegger w...@denx.de
---
 Documentation/powerpc/dts-bindings/fsl/i2c.txt |   10 +-
 1 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/Documentation/powerpc/dts-bindings/fsl/i2c.txt 
b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
index b6d2e21..2af8a05 100644
--- a/Documentation/powerpc/dts-bindings/fsl/i2c.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
@@ -9,8 +9,8 @@ Recommended properties :
 
  - compatible : compatibility list with 2 entries, the first should
be fsl,CHIP-i2c where CHIP is the name of a compatible processor,
-   e.g. mpc8313, mpc8543, mpc8544, mpc5200 or mpc5200b. The second one
-   should be fsl-i2c.
+   e.g. mpc8313, mpc8543, mpc8544, mpc5121, mpc5200 or mpc5200b. The
+   second one should be fsl-i2c.
  - interrupts : a b where a is the interrupt number and b is a
field that represents an encoding of the sense and level
information for the interrupt.  This should be encoded based on
@@ -20,7 +20,9 @@ Recommended properties :
services interrupts for this device.
  - fsl,preserve-clocking : boolean; if defined, the clock settings
from the bootloader are preserved (not touched).
- - clock-frequency : desired I2C bus clock frequency in Hz.
+ - clock-frequency : desired I2C bus clock frequency in Hz.  If this
+   property and fsl,preserve-clocking is not defined, a safe fixed
+   clock divider value is used (resulting in a small clock frequency).
 
 Examples :
 
@@ -28,7 +30,6 @@ Examples :
#address-cells = 1;
#size-cells = 0;
compatible = fsl,mpc5200b-i2c,fsl,mpc5200-i2c,fsl-i2c;
-   cell-index = 0;
reg = 0x3d00 0x40;
interrupts = 2 15 0;
interrupt-parent = mpc5200_pic;
@@ -38,7 +39,6 @@ Examples :
i...@3100 {
#address-cells = 1;
#size-cells = 0;
-   cell-index = 1;
compatible = fsl,mpc8544-i2c, fsl-i2c;
reg = 0x3100 0x100;
interrupts = 43 2;
-- 
1.6.2.5

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Re: [PATCH 3/3] powerpc: doc/dts-bindings: update doc of FSL I2C bindings

Wolfram Sang wrote:
 On Mon, Jan 25, 2010 at 09:27:09AM +0100, Wolfgang Grandegger wrote:
 From: Wolfgang Grandegger w...@denx.de

 This patch adds the MPC5121 to the list of supported devices,
 enhances the doc of the clock-frequency property and removes
 the obsolete cell-index property from the example nodes.
 
 I think fsl,mpc5121-i2c-ctrl needs to be documented here, too?

Yep,

Wolfgang.
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Re: [PATCH 2/3] i2c-mpc: add support for the MPC512x processors from Freescale

Hi Wolfram,

Wolfram Sang wrote:
 Hi Wolfgang,
 
 On Mon, Jan 25, 2010 at 09:27:08AM +0100, Wolfgang Grandegger wrote:
 From: Wolfgang Grandegger w...@denx.de

 The setclock initialization functions have been renamed to setup
 because I2C interrupts must be enabled for the MPC512x. This requires
 to handle fsl,preserve-clocking in a slighly different way. Also,
 the old settings are now reported calling dev_dbg(). For the MPC512x
 the clock setup function of the MPC52xx can be re-used.

 Signed-off-by: Wolfgang Grandegger w...@denx.de
 ---
  drivers/i2c/busses/Kconfig   |9 ++--
  drivers/i2c/busses/i2c-mpc.c |  122 
 ++
  2 files changed, 93 insertions(+), 38 deletions(-)

 diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
 index 5f318ce..f481f30 100644
 --- a/drivers/i2c/busses/Kconfig
 +++ b/drivers/i2c/busses/Kconfig
 @@ -418,13 +418,14 @@ config I2C_IXP2000
instead.
  
  config I2C_MPC
 -tristate MPC107/824x/85xx/52xx/86xx
 +tristate MPC107/824x/85xx/512x/52xx/86xx
  depends on PPC32
  help
If you say yes to this option, support will be included for the
 -  built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
 -  MPC85xx/MPC8641 family processors. The driver may also work on 52xx
 -  family processors, though interrupts are known not to work.
 +  built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245,
 +  MPC85xx/MPC8641 and MPC512x family processors. The driver may
 +  also work on 52xx family processors, though interrupts are known
 +  not to work.
 
 Opinion poll: Can we remove the may work sentence while we are here? It has
 worked fine for years. BTW, which interrupts are meant here (from I2C slaves?
 interrupts of the controller?)?

I first wanted to remove this sentence but as I was not sure what it's
exact meaning... Anyway, it's confusing and I would remove it.

This driver can also be built as a module.  If so, the module
will be called i2c-mpc.
 diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
 index 2cb864e..70c3e5d 100644
 --- a/drivers/i2c/busses/i2c-mpc.c
 +++ b/drivers/i2c/busses/i2c-mpc.c
 @@ -67,9 +67,8 @@ struct mpc_i2c_divider {
  };
  
  struct mpc_i2c_data {
 -void (*setclock)(struct device_node *node,
 - struct mpc_i2c *i2c,
 - u32 clock, u32 prescaler);
 +void (*setup)(struct device_node *node, struct mpc_i2c *i2c,
 +  u32 clock, u32 prescaler);
  u32 prescaler;
  };
  
 @@ -164,7 +163,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned 
 timeout, int writing)
  return 0;
  }
  
 -#ifdef CONFIG_PPC_MPC52xx
 +#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_PPC_MPC512x)
  static const struct __devinitdata mpc_i2c_divider mpc_i2c_dividers_52xx[] = 
 {
  {20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
  {28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
 @@ -216,12 +215,18 @@ static int __devinit mpc_i2c_get_fdr_52xx(struct 
 device_node *node, u32 clock,
  return div ? (int)div-fdr : -EINVAL;
  }
  
 -static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
 -struct mpc_i2c *i2c,
 -u32 clock, u32 prescaler)
 +static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
 + struct mpc_i2c *i2c,
 + u32 clock, u32 prescaler)
  {
  int ret, fdr;
  
 +if (clock == -1) {
 
 Could we use 0 for 'no_clock'? This would make the above statement simply

0 is already used to maintain backward compatibility setting a safe
divider.

   if (!clock)
 
 and saves us using -1 with a u32.
 
 +dev_dbg(i2c-dev, using fdr %d\n,
 +readb(i2c-base + MPC_I2C_FDR));
 +return; /* preserve clocking */
 +}
 +
  ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler);
  fdr = (ret = 0) ? ret : 0x3f; /* backward compatibility */
  
 @@ -230,13 +235,50 @@ static void __devinit mpc_i2c_setclock_52xx(struct 
 device_node *node,
  if (ret = 0)
  dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
  }
 -#else /* !CONFIG_PPC_MPC52xx */
 -static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
 -struct mpc_i2c *i2c,
 -u32 clock, u32 prescaler)
 +#else /* !(CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x) */
 +static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
 + struct mpc_i2c *i2c,
 + u32 clock, u32 prescaler)
 +{
 +}
 +#endif /* CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x */
 +
 +#ifdef CONFIG_PPC_MPC512x
 +static void __devinit mpc_i2c_setup_512x(struct device_node *node,
 + struct mpc_i2c *i2c

Re: [PATCH 2/3] i2c-mpc: add support for the MPC512x processors from Freescale

Wolfram Sang wrote:
  
 -static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
 -  struct mpc_i2c *i2c,
 -  u32 clock, u32 prescaler)
 +static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
 +   struct mpc_i2c *i2c,
 +   u32 clock, u32 prescaler)
  {
int ret, fdr;
  
 +  if (clock == -1) {
 Could we use 0 for 'no_clock'? This would make the above statement simply
 0 is already used to maintain backward compatibility setting a safe
 divider.
 
 Ah, now I see:
 
 'clock == -1' means 'preserve clocks' (and is checked here in 
 mpc_i2c_setup_52xx())

Yes, this is now necessary because setup does not just do clock settings.

 'clock ==  0' means 'safe divider' (and is checked in mpc_i2c_get_fdr_52xx())

This is for compatibility with old DTS files and last time it was tricky
 to get that right and therefore...

 This is not a beauty ;)
 
 What about adding a flags variable to the setup-functions?

.. I hesitate to make bigger changes to the code flow, which the
introduction of a flags variable would required. Also it seems to be
overkill to me. I will have a closer look, though. At a minimum I will
replace -1 with MPC_I2C_PRESERVE_CLOCK.

Wolfgang.
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[PATCH v2 0/3] i2c-mpc: add support for the Freescale MPC512x and other fixes

From: Wolfgang Grandegger w...@denx.de

This patch series adds support for the MPC512x from Freescale to the
i2c-mpc driver. At that occasion, issues with  __devinit[data] have
been fixed and the doc of the FSL I2C dts bindings updated. It has
been tested on a MPC5121ADS, TQM5200 and TQM8560 board

Changes since v1:

- use macro MPC_I2C_CLOCK_PRESERVE/SAFE for the special clock settings.
- document the special DTS node fsl,mpc5121-i2c-ctrl.
- update and correct the Kconfig help.
- some other minor fixes as suggested by Wolfram.

Wolfgang

Wolfgang Grandegger (3):
  i2c-mpc: use __devinit[data] for initialization functions and data
  i2c-mpc: add support for the MPC512x processors from Freescale
  powerpc: doc/dts-bindings: update doc of FSL I2C bindings

 Documentation/powerpc/dts-bindings/fsl/i2c.txt |   30 +++-
 drivers/i2c/busses/Kconfig |7 +-
 drivers/i2c/busses/i2c-mpc.c   |  190 +++-
 3 files changed, 147 insertions(+), 80 deletions(-)

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[PATCH v2 3/3] powerpc: doc/dts-bindings: update doc of FSL I2C bindings

From: Wolfgang Grandegger w...@denx.de

This patch adds the MPC5121 to the list of supported devices,
enhances the doc of the clock-frequency property and removes
the obsolete cell-index property from the example nodes.
Furthermore and example for the MPC5121 has been added.

Signed-off-by: Wolfgang Grandegger w...@denx.de
---
 Documentation/powerpc/dts-bindings/fsl/i2c.txt |   30 +++
 1 files changed, 24 insertions(+), 6 deletions(-)

diff --git a/Documentation/powerpc/dts-bindings/fsl/i2c.txt 
b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
index b6d2e21..2f62dae 100644
--- a/Documentation/powerpc/dts-bindings/fsl/i2c.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
@@ -9,8 +9,9 @@ Recommended properties :
 
  - compatible : compatibility list with 2 entries, the first should
be fsl,CHIP-i2c where CHIP is the name of a compatible processor,
-   e.g. mpc8313, mpc8543, mpc8544, mpc5200 or mpc5200b. The second one
-   should be fsl-i2c.
+   e.g. mpc8313, mpc8543, mpc8544, mpc5121, mpc5200 or mpc5200b. The
+   second one should be fsl-i2c. For the mpc5121, an additional node
+   fsl,mpc5121-i2c-ctrl is required as shown in the example below.
  - interrupts : a b where a is the interrupt number and b is a
field that represents an encoding of the sense and level
information for the interrupt.  This should be encoded based on
@@ -20,29 +21,46 @@ Recommended properties :
services interrupts for this device.
  - fsl,preserve-clocking : boolean; if defined, the clock settings
from the bootloader are preserved (not touched).
- - clock-frequency : desired I2C bus clock frequency in Hz.
+ - clock-frequency : desired I2C bus clock frequency in Hz.  If this
+   property and fsl,preserve-clocking is not defined, a safe fixed
+   clock divider value is used (resulting in a small clock frequency).
 
 Examples :
 
+   /* MPC5121 based board */
+   i...@1740 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = fsl,mpc5121-i2c, fsl-i2c;
+   reg = 0x1740 0x20;
+   interrupts = 11 0x8;
+   interrupt-parent = ipic;
+   clock-frequency = 10;
+   };
+
+   i2ccont...@1760 {
+   compatible = fsl,mpc5121-i2c-ctrl;
+   reg = 0x1760 0x8;
+   };
+
+   /* MPC5200B based board */
i...@3d00 {
#address-cells = 1;
#size-cells = 0;
compatible = fsl,mpc5200b-i2c,fsl,mpc5200-i2c,fsl-i2c;
-   cell-index = 0;
reg = 0x3d00 0x40;
interrupts = 2 15 0;
interrupt-parent = mpc5200_pic;
fsl,preserve-clocking;
};
 
+   /* MPC8544 base board */
i...@3100 {
#address-cells = 1;
#size-cells = 0;
-   cell-index = 1;
compatible = fsl,mpc8544-i2c, fsl-i2c;
reg = 0x3100 0x100;
interrupts = 43 2;
interrupt-parent = mpic;
clock-frequency = 40;
};
-
-- 
1.6.2.5

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[PATCH v2 1/3] i2c-mpc: use __devinit[data] for initialization functions and data

From: Wolfgang Grandegger w...@denx.de

__devinit[data] has not yet been used for all initialization functions
and data. To avoid truncating lines, the struct mpc_i2c_match_data has
been renamed to mpc_i2c_data, which is even the better name.

Signed-off-by: Wolfgang Grandegger w...@denx.de
---
 drivers/i2c/busses/i2c-mpc.c |   99 +++--
 1 files changed, 46 insertions(+), 53 deletions(-)

diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index f627001..2cb864e 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -66,7 +66,7 @@ struct mpc_i2c_divider {
u16 fdr;/* including dfsrr */
 };
 
-struct mpc_i2c_match_data {
+struct mpc_i2c_data {
void (*setclock)(struct device_node *node,
 struct mpc_i2c *i2c,
 u32 clock, u32 prescaler);
@@ -165,7 +165,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, 
int writing)
 }
 
 #ifdef CONFIG_PPC_MPC52xx
-static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
+static const struct __devinitdata mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
{36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
@@ -186,7 +186,8 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] 
= {
{10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f}
 };
 
-int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
+static int __devinit mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock,
+ int prescaler)
 {
const struct mpc_i2c_divider *div = NULL;
unsigned int pvr = mfspr(SPRN_PVR);
@@ -215,9 +216,9 @@ int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 
clock, int prescaler)
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void mpc_i2c_setclock_52xx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -230,15 +231,15 @@ static void mpc_i2c_setclock_52xx(struct device_node 
*node,
dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
 }
 #else /* !CONFIG_PPC_MPC52xx */
-static void mpc_i2c_setclock_52xx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
 }
 #endif /* CONFIG_PPC_MPC52xx*/
 
 #ifdef CONFIG_FSL_SOC
-static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
+static const struct __devinitdata mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
{160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123},
{288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102},
{416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127},
@@ -258,7 +259,7 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] 
= {
{49152, 0x011e}, {61440, 0x011f}
 };
 
-u32 mpc_i2c_get_sec_cfg_8xxx(void)
+static u32 __devinit mpc_i2c_get_sec_cfg_8xxx(void)
 {
struct device_node *node = NULL;
u32 __iomem *reg;
@@ -287,7 +288,8 @@ u32 mpc_i2c_get_sec_cfg_8xxx(void)
return val;
 }
 
-int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler)
+static int __devinit mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock,
+ u32 prescaler)
 {
const struct mpc_i2c_divider *div = NULL;
u32 divider;
@@ -320,9 +322,9 @@ int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 
clock, u32 prescaler)
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void mpc_i2c_setclock_8xxx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node,
+   struct mpc_i2c *i2c,
+   u32 clock, u32 prescaler)
 {
int ret, fdr;
 
@@ -338,9 +340,9 @@ static void mpc_i2c_setclock_8xxx(struct device_node *node,
 }
 
 #else /* !CONFIG_FSL_SOC */
-static void mpc_i2c_setclock_8xxx(struct device_node *node,
- struct mpc_i2c *i2c,
- u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setclock_8xxx(struct device_node *node,
+   struct mpc_i2c *i2c

[PATCH v2 2/3] i2c-mpc: add support for the MPC512x processors from Freescale

From: Wolfgang Grandegger w...@denx.de

The setclock initialization functions have been renamed to setup
because I2C interrupts must be enabled for the MPC512x. This requires
to handle fsl,preserve-clocking in a slighly different way. Also,
the old settings are now reported calling dev_dbg(). For the MPC512x
the clock setup function of the MPC52xx can be re-used. Furthermore,
the Kconfig help has been updated and corrected.

Signed-off-by: Wolfgang Grandegger w...@denx.de
---
 drivers/i2c/busses/Kconfig   |7 +-
 drivers/i2c/busses/i2c-mpc.c |  127 ++
 2 files changed, 95 insertions(+), 39 deletions(-)

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 5f318ce..5477e41 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -418,13 +418,12 @@ config I2C_IXP2000
  instead.
 
 config I2C_MPC
-   tristate MPC107/824x/85xx/52xx/86xx
+   tristate MPC107/824x/85xx/512x/52xx/83xx/86xx
depends on PPC32
help
  If you say yes to this option, support will be included for the
- built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
- MPC85xx/MPC8641 family processors. The driver may also work on 52xx
- family processors, though interrupts are known not to work.
+ built-in I2C interface on the MPC107, Tsi107, MPC512x, MPC52xx,
+ MPC8240, MPC8245, MPC83xx, MPC85xx and MPC8641 family processors.
 
  This driver can also be built as a module.  If so, the module
  will be called i2c-mpc.
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 2cb864e..bc0281d 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -31,6 +31,9 @@
 
 #define DRV_NAME mpc-i2c
 
+#define MPC_I2C_CLOCK_SAFE 0
+#define MPC_I2C_CLOCK_PRESERVE (~0U)
+
 #define MPC_I2C_FDR   0x04
 #define MPC_I2C_CR0x08
 #define MPC_I2C_SR0x0c
@@ -67,9 +70,8 @@ struct mpc_i2c_divider {
 };
 
 struct mpc_i2c_data {
-   void (*setclock)(struct device_node *node,
-struct mpc_i2c *i2c,
-u32 clock, u32 prescaler);
+   void (*setup)(struct device_node *node, struct mpc_i2c *i2c,
+ u32 clock, u32 prescaler);
u32 prescaler;
 };
 
@@ -164,7 +166,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, 
int writing)
return 0;
 }
 
-#ifdef CONFIG_PPC_MPC52xx
+#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_PPC_MPC512x)
 static const struct __devinitdata mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
@@ -216,12 +218,18 @@ static int __devinit mpc_i2c_get_fdr_52xx(struct 
device_node *node, u32 clock,
return div ? (int)div-fdr : -EINVAL;
 }
 
-static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
int ret, fdr;
 
+   if (clock == MPC_I2C_CLOCK_PRESERVE) {
+   dev_dbg(i2c-dev, using fdr %d\n,
+   readb(i2c-base + MPC_I2C_FDR));
+   return;
+   }
+
ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler);
fdr = (ret = 0) ? ret : 0x3f; /* backward compatibility */
 
@@ -230,13 +238,50 @@ static void __devinit mpc_i2c_setclock_52xx(struct 
device_node *node,
if (ret = 0)
dev_info(i2c-dev, clock %d Hz (fdr=%d)\n, clock, fdr);
 }
-#else /* !CONFIG_PPC_MPC52xx */
-static void __devinit mpc_i2c_setclock_52xx(struct device_node *node,
-   struct mpc_i2c *i2c,
-   u32 clock, u32 prescaler)
+#else /* !(CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x) */
+static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
 {
 }
-#endif /* CONFIG_PPC_MPC52xx*/
+#endif /* CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x */
+
+#ifdef CONFIG_PPC_MPC512x
+static void __devinit mpc_i2c_setup_512x(struct device_node *node,
+struct mpc_i2c *i2c,
+u32 clock, u32 prescaler)
+{
+   struct device_node *node_ctrl;
+   void __iomem *ctrl;
+   const u32 *pval;
+   u32 idx;
+
+   /* Enable I2C interrupts for mpc5121 */
+   node_ctrl = of_find_compatible_node(NULL, NULL,
+   fsl,mpc5121-i2c-ctrl);
+   if (node_ctrl) {
+   ctrl = of_iomap(node_ctrl, 0

Re: [PATCH 2/3] i2c-mpc: add support for the MPC512x processors from Freescale

Wolfram Sang wrote:
 overkill to me. I will have a closer look, though. At a minimum I will
 replace -1 with MPC_I2C_PRESERVE_CLOCK.
 
 Might be also an idea to define it with ~0 (clock is still unsigned). If
 possible, the code checking for those two cases (0 and -1) should be close
 together. That could be a compromise until more quirks are needed ;)

I just sent v2. Hope it's OK now.

Wolfgang.

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Re: [PATCH/RFC 2/2] 5200: improve i2c bus error recovery