Re: [PATCH] advertise correct IDE mode on Pegasos2

2007-08-17 Thread Olaf Hering
On Fri, Aug 17, Matt Sealey wrote:

> Setting them to ~0x5 will set them to 0 (legacy mode) and they will always 
> read
> back as 0 (legacy mode.. sigh) even if in native mode.

The pci_dev->class needs updating as well, see second version of the
patch.
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[PATCH] advertise correct IDE mode on Pegasos2

2007-08-17 Thread Olaf Hering
The built-in IDE controller is configured in legacy mode,
but the PCI registers advertise native mode.
Force the PCI class into legacy mode. This allows pata_via to access
two drives.
The Pegasos specific irq enforcement in the via82cxxx driver
must stay because there is aparently no generic way to setup irq per channel.

Tested on Pegasos2 with firmware version 20040810, and two IDE disks.

Signed-off-by: Olaf Hering <[EMAIL PROTECTED]>

---
 arch/powerpc/kernel/prom_init.c   |   11 ---
 arch/powerpc/platforms/chrp/pci.c |   29 +
 2 files changed, 37 insertions(+), 3 deletions(-)

--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -2044,6 +2044,7 @@ static void __init fixup_device_tree_map
 /*
  * Pegasos and BriQ lacks the "ranges" property in the isa node
  * Pegasos needs decimal IRQ 14/15, not hexadecimal
+ * Pegasos has the IDE configured in legacy mode, but advertised as native
  */
 static void __init fixup_device_tree_chrp(void)
 {
@@ -2081,9 +2082,13 @@ static void __init fixup_device_tree_chr
prom_printf("Fixing up IDE interrupt on Pegasos...\n");
prop[0] = 14;
prop[1] = 0x0;
-   prop[2] = 15;
-   prop[3] = 0x0;
-   prom_setprop(ph, name, "interrupts", prop, 4*sizeof(u32));
+   prom_setprop(ph, name, "interrupts", prop, 2*sizeof(u32));
+   prom_printf("Fixing up IDE class-code on Pegasos...\n");
+   rc = prom_getprop(ph, "class-code", prop, sizeof(u32));
+   if (rc == sizeof(u32)) {
+   prop[0] &= ~0x5;
+   prom_setprop(ph, name, "class-code", prop, sizeof(u32));
+   }
}
 }
 #else
--- a/arch/powerpc/platforms/chrp/pci.c
+++ b/arch/powerpc/platforms/chrp/pci.c
@@ -338,3 +338,32 @@ void chrp_pci_fixup_winbond_ata(struct p
 }
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
chrp_pci_fixup_winbond_ata);
+
+/* Pegasos2 firmware version 20040810 configures the built-in IDE controller
+ * in legacy mode, but sets the PCI registers to PCI native mode.
+ * The chip can only operate in legacy mode, so force the PCI class into legacy
+ * mode as well. The same fixup must be done to the class-code property in
+ * the IDE node /[EMAIL PROTECTED]/[EMAIL PROTECTED],1
+ */
+static void chrp_pci_fixup_vt8231_ata(struct pci_dev *viaide)
+{
+   u8 progif;
+   struct pci_dev *viaisa;
+
+   if (!machine_is(chrp) || _chrp_type != _CHRP_Pegasos)
+   return;
+   if (viaide->irq != 14)
+   return;
+
+   viaisa = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 
NULL);
+   if (!viaisa)
+   return;
+   printk("Fixing VIA IDE, force legacy mode on '%s'\n", 
viaide->dev.bus_id);
+
+   pci_read_config_byte(viaide, PCI_CLASS_PROG, &progif);
+   pci_write_config_byte(viaide, PCI_CLASS_PROG, progif & ~0x5);
+   viaide->class &= ~0x5;
+
+   pci_dev_put(viaisa);
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, 
chrp_pci_fixup_vt8231_ata);
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Re: [PATCH] advertise correct IDE mode on Pegasos2

2007-08-17 Thread Matt Sealey

The programming interface register is definitely writable, but the VIA IDE docs
state that certain bits will always read 0 - setting '0x5' in my original patch
set those two bits so it was forced into native mode if it wasn't already.

Setting them to ~0x5 will set them to 0 (legacy mode) and they will always read
back as 0 (legacy mode.. sigh) even if in native mode.

Fixing the class code in the device tree doesn't mean anything as lspci, sysfs
etc. read right from config space and NOTHING in linux powerpc uses the device
tree for information (RTAS is about as close as it gets).

I'm still working on my little "device tree fixups" Forth script for Pegasos
which is very difficult without a Pegasos to test it on. I need the correct
device locations and target values to do it, and I want to add a fix so that
it ONLY runs on 20040810 firmwares (and the minor updates for 2B5 boards) and
complains on anything else (any developers who got a beta firmware..) as it
seems the fixes you're making here do not apply.

I attached it if anyone wants to toy with it.. I can't guarantee that it
even parses as I've just been poking at it, but the basic theory is in there.
It should remove any kernel/prom_init device tree fixups but requires still the
pci fixups in chrp/pci.

There's an Efika one too..

Any comments would be awesome.

--
Matt Sealey <[EMAIL PROTECTED]>
Genesi, Manager, Developer Relations

Olaf Hering wrote:

On Fri, Aug 17, Olaf Hering wrote:

Still not 100% perfect.


+   prom_printf("Fixing up IDE class-code on Pegasos...\n");
+   rc = prom_getprop(ph, "class-code", prop, sizeof(u32));
+   if (rc == sizeof(u32)) {
+   prop[0] &= ~0x5;
+   prom_setprop(ph, name, "class-code", prop, sizeof(u32));
+   }


This updates the class code in the device-tree, but sysfs still shows
the old value.


+   pci_read_config_byte(viaide, PCI_CLASS_PROG, &progif);
+   pci_write_config_byte(viaide, PCI_CLASS_PROG, progif & ~0x5);


Is this a readonly register by any chance?
Appending a 'viaide->class &= ~0x5;' changes the code paths in
do_ide_setup_pci_device(), now IDE prints 'not 100%% native mode,
will probe irqs later'. Where are the irqs supposed to come from?


-#ifdef CONFIG_PPC_CHRP
-   if(machine_is(chrp) && _chrp_type == _CHRP_Pegasos) {
-   hwif->irq = hwif->channel ? 15 : 14;
-   }
-#endif


Maybe we should just leave this in and dont bother about the arch
specific tweak?
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\ FORTH

\ Pegasos fixes for device tree and peripheral configuration
\
\ - Fixes up entries to "comply" with Linux specifications
\ - Changes IDE class-code to help libata decide what to do
\
\ Changelog:
\
\ 0.1: ISA ranges & IDE interrupts fixes from Linux
\  Requires prom_init.c patch to fix the PCI config space
\  as the 
\ 0.2: keyboard controller fix

." PegasosPPC Device Tree Supplement 20070817" cr
." (c) 2007 Matt Sealey, Genesi USA, Inc." cr cr

headerless

." Linux device tree fixups" cr

\ Fix ATA
." * Fixing IDE controller class-code and interrupts .." cr
." * Fixing IDE interrupts .." cr
s" /[EMAIL PROTECTED]/[EMAIL PROTECTED],1" find-device 
d# 14 encode-int 0 encode-int
\   d# 15 encode-int 0 encode-int
encode+ encode+ encode+ s" interrupts" property

\   0x101?? encode-int s" class-code" property
device-end

." * Fixing ISA ranges .. " cr
s" /[EMAIL PROTECTED]/[EMAIL PROTECTED]" find-device
0x1 encode-int 0x0 encode-int 0x1006000 encode-int 
0x0 encode-int 0x0 encode-int 0x1000 encode-int
encode+ encode+ encode+ encode+ encode+ s" ranges" property
device-end

." * Fixing Keyboard controller type .." cr
s" /[EMAIL PROTECTED]/[EMAIL PROTECTED]/8042" find-device
s" 8042" encode-string device-type
device-end

." Done" cr cr

\ Edit for your pleasure, and uncomment to boot your Linux
\ s" hd:0 vmlinuz video= root= console=" $boot\ FORTH

\ Efika fixes for device tree and port configuration, 
\ ostensibly for Linux but actually useful for a great
\ deal of other things.
\
\ Firmwares:20061107 (1.3) - Initial Production
\   20070122 (1.3) - Second Production
\    (2.0) - Any Day Now..
\
\ - Fixes up entries to "comply" with Linux specifications
\ - Enables AC97 on PSC2 if it's not already enabled
\ - Adds GPIO, CDM, GPT, SLT, XLB and SDRAM entries
\
\ Changelog:
\
\ 0.1: Makes all device tree changes dictated by
\  arch/powerpc/kernel/prom_init.c:fixup_device_tree_efika() 
\ 0.2: Adds slice timer, GPT nodes, CDM and GPIO
\ 0.3: Fixed GPT adder to use the stack properly instead of variables
\ 0.4: XLB and SDRAM nodes
\ 0.9: fixed BestComm fixer to use 'i' instead of a counter variable
\

." EFIKA MPC5200B Device Tree Supplement 20070810" cr

\ headerless

\ Device t

Re: [PATCH] advertise correct IDE mode on Pegasos2

2007-08-17 Thread Olaf Hering
On Fri, Aug 17, Olaf Hering wrote:

Still not 100% perfect.

> + prom_printf("Fixing up IDE class-code on Pegasos...\n");
> + rc = prom_getprop(ph, "class-code", prop, sizeof(u32));
> + if (rc == sizeof(u32)) {
> + prop[0] &= ~0x5;
> + prom_setprop(ph, name, "class-code", prop, sizeof(u32));
> + }

This updates the class code in the device-tree, but sysfs still shows
the old value.

> + pci_read_config_byte(viaide, PCI_CLASS_PROG, &progif);
> + pci_write_config_byte(viaide, PCI_CLASS_PROG, progif & ~0x5);

Is this a readonly register by any chance?
Appending a 'viaide->class &= ~0x5;' changes the code paths in
do_ide_setup_pci_device(), now IDE prints 'not 100%% native mode,
will probe irqs later'. Where are the irqs supposed to come from?

> -#ifdef CONFIG_PPC_CHRP
> - if(machine_is(chrp) && _chrp_type == _CHRP_Pegasos) {
> - hwif->irq = hwif->channel ? 15 : 14;
> - }
> -#endif

Maybe we should just leave this in and dont bother about the arch
specific tweak?
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[PATCH] advertise correct IDE mode on Pegasos2

2007-08-17 Thread Olaf Hering

The built-in IDE controller is configured in legacy mode,
but the PCI registers advertise native mode.
Force the PCI class into legacy mode. This allows pata_via to access
two drives.
The Pegasos specific irq enforcement in the via82cxxx driver
can be removed.

Tested on Pegasos2 with firmware version 20040810, and two IDE disks.


Signed-off-by: Olaf Hering <[EMAIL PROTECTED]>

---
 arch/powerpc/kernel/prom_init.c   |   11 ---
 arch/powerpc/platforms/chrp/pci.c |   28 
 drivers/ide/pci/via82cxxx.c   |7 ---
 3 files changed, 36 insertions(+), 10 deletions(-)

--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -2041,6 +2041,7 @@ static void __init fixup_device_tree_map
 /*
  * Pegasos and BriQ lacks the "ranges" property in the isa node
  * Pegasos needs decimal IRQ 14/15, not hexadecimal
+ * Pegasos has the IDE configured in legacy mode, but advertised as native
  */
 static void __init fixup_device_tree_chrp(void)
 {
@@ -2078,9 +2079,13 @@ static void __init fixup_device_tree_chr
prom_printf("Fixing up IDE interrupt on Pegasos...\n");
prop[0] = 14;
prop[1] = 0x0;
-   prop[2] = 15;
-   prop[3] = 0x0;
-   prom_setprop(ph, name, "interrupts", prop, 4*sizeof(u32));
+   prom_setprop(ph, name, "interrupts", prop, 2*sizeof(u32));
+   prom_printf("Fixing up IDE class-code on Pegasos...\n");
+   rc = prom_getprop(ph, "class-code", prop, sizeof(u32));
+   if (rc == sizeof(u32)) {
+   prop[0] &= ~0x5;
+   prom_setprop(ph, name, "class-code", prop, sizeof(u32));
+   }
}
 }
 #else
--- a/arch/powerpc/platforms/chrp/pci.c
+++ b/arch/powerpc/platforms/chrp/pci.c
@@ -338,3 +338,31 @@ void chrp_pci_fixup_winbond_ata(struct p
 }
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
chrp_pci_fixup_winbond_ata);
+
+/* Pegasos2 firmware version 20040810 configures the built-in IDE controller
+ * in legacy mode, but sets the PCI registers to PCI native mode.
+ * The chip can only operate in legacy mode, so force the PCI class into legacy
+ * mode as well. The same fixup must be done to the class-code property in
+ * the IDE node /[EMAIL PROTECTED]/[EMAIL PROTECTED],1
+ */
+static void chrp_pci_fixup_vt8231_ata(struct pci_dev *viaide)
+{
+   u8 progif;
+   struct pci_dev *viaisa;
+
+   if (!machine_is(chrp) || _chrp_type != _CHRP_Pegasos)
+   return;
+   if (viaide->irq != 14)
+   return;
+
+   viaisa = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 
NULL);
+   if (!viaisa)
+   return;
+   printk("Fixing VIA IDE, force legacy mode on '%s'\n", 
viaide->dev.bus_id);
+
+   pci_read_config_byte(viaide, PCI_CLASS_PROG, &progif);
+   pci_write_config_byte(viaide, PCI_CLASS_PROG, progif & ~0x5);
+
+   pci_dev_put(viaisa);
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, 
chrp_pci_fixup_vt8231_ata);
--- a/drivers/ide/pci/via82cxxx.c
+++ b/drivers/ide/pci/via82cxxx.c
@@ -436,13 +436,6 @@ static void __devinit init_hwif_via82cxx
hwif->tuneproc = &via82cxxx_tune_drive;
hwif->speedproc = &via_set_drive;
 
-
-#ifdef CONFIG_PPC_CHRP
-   if(machine_is(chrp) && _chrp_type == _CHRP_Pegasos) {
-   hwif->irq = hwif->channel ? 15 : 14;
-   }
-#endif
-
for (i = 0; i < 2; i++) {
hwif->drives[i].io_32bit = 1;
hwif->drives[i].unmask = (vdev->via_config->flags & 
VIA_NO_UNMASK) ? 0 : 1;
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