[llvm-branch-commits] [llvm] [BPF] Add CLI option to enable misaligned memory access (PR #167013)
clairechingching wrote: @yonghong-song The kernel verifier is indeed very restrictive and for good reason. This feature is intended for user-space eBPF, where the decision to allow misaligned access is up to the implementer. In such environments, allowing misaligned accesses is far more performant as it drastically reduces the number of instructions required to perform common memory operations. By making it optional, we leave kernel BPF behavior unchanged while allowing the implementer to improve user space performance when the platform supports it. https://github.com/llvm/llvm-project/pull/167013 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [BPF] Add CLI option to enable misaligned memory access (PR #167013)
clairechingching wrote: Hey @yonghong-song I tried moving the `-bpf-allow-misaligned-mem-access` option into BPFSubtarget, but realized that the parameters managed there are mostly about CPU instruction-set features. It seems more consistent to keep `-bpf-allow-misaligned-mem-access` where it currently is next to `-bpf-expand-memcpy-in-order`, but I’m curious what you think. https://github.com/llvm/llvm-project/pull/167013 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [BPF] Add CLI option to enable misaligned memory access (PR #167013)
https://github.com/clairechingching created
https://github.com/llvm/llvm-project/pull/167013
This proposal adds a `cl::opt` CLI flag `-bpf-allow-misaligned-mem-access` to
BPF target that lets users enable allowing misaligned memory accesses.
The motivation behind the proposal is user space eBPF VMs (interpreters or JITs
running in user space) typically run on real CPUs where unaligned memory
accesses are acceptable (or handled efficiently) and can be enabled to simplify
lowering and improve performance. In contrast, kernel eBPF must obey verifier
constraints and platform-specific alignment restrictions.
A new CLI option keeps kernel behavior unchanged while giving userspace VMs an
explicit opt-in to enable more permissive codegen. It supports both use-cases
without diverging codebases.
>From abaf0b6497cea283f985b012bf1b625fad8f0b15 Mon Sep 17 00:00:00 2001
From: Claire xyz
Date: Fri, 7 Nov 2025 11:08:47 -0500
Subject: [PATCH 1/6] [BPF] Add CLI option to enable misaligned memory access
---
llvm/lib/Target/BPF/BPFISelLowering.cpp | 24 ++
llvm/lib/Target/BPF/BPFISelLowering.h | 4 +
llvm/test/CodeGen/BPF/unaligned_load_store.ll | 208 ++
3 files changed, 236 insertions(+)
create mode 100644 llvm/test/CodeGen/BPF/unaligned_load_store.ll
diff --git a/llvm/lib/Target/BPF/BPFISelLowering.cpp
b/llvm/lib/Target/BPF/BPFISelLowering.cpp
index f4f414d192df0..c3ce25237637e 100644
--- a/llvm/lib/Target/BPF/BPFISelLowering.cpp
+++ b/llvm/lib/Target/BPF/BPFISelLowering.cpp
@@ -38,6 +38,10 @@ static cl::opt
BPFExpandMemcpyInOrder("bpf-expand-memcpy-in-order",
cl::Hidden, cl::init(false),
cl::desc("Expand memcpy into load/store pairs in order"));
+static cl::opt
BPFAllowMisalignedMemAccess("bpf-allow-misaligned-mem-access",
+ cl::Hidden, cl::init(false),
+ cl::desc("Allow misaligned memory access"));
+
static void fail(const SDLoc &DL, SelectionDAG &DAG, const Twine &Msg,
SDValue Val = {}) {
std::string Str;
@@ -198,6 +202,26 @@ BPFTargetLowering::BPFTargetLowering(const TargetMachine
&TM,
HasMovsx = STI.hasMovsx();
}
+bool BPFTargetLowering::allowsMisalignedMemoryAccesses(
+EVT VT, unsigned, Align, MachineMemOperand::Flags, unsigned *Fast) const {
+ if (!BPFAllowMisalignedMemAccess) {
+ // --bpf-allow-misaligned-mem-access isn't opted in
+ return false;
+ }
+
+ if (!VT.isSimple()) {
+// only allow misalignment for simple value types
+ return false;
+ }
+
+ if (Fast) {
+ // always assume fast mode when BPFAllowMisalignedMemAccess is enabled
+*Fast = true;
+ }
+
+ return true;
+}
+
bool BPFTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA)
const {
return false;
}
diff --git a/llvm/lib/Target/BPF/BPFISelLowering.h
b/llvm/lib/Target/BPF/BPFISelLowering.h
index 8f60261c10e9e..0b9ece5ab18c4 100644
--- a/llvm/lib/Target/BPF/BPFISelLowering.h
+++ b/llvm/lib/Target/BPF/BPFISelLowering.h
@@ -46,6 +46,10 @@ class BPFTargetLowering : public TargetLowering {
// with the given GlobalAddress is legal.
bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
+ bool allowsMisalignedMemoryAccesses(EVT VT, unsigned, Align,
+ MachineMemOperand::Flags,
+ unsigned *) const override;
+
BPFTargetLowering::ConstraintType
getConstraintType(StringRef Constraint) const override;
diff --git a/llvm/test/CodeGen/BPF/unaligned_load_store.ll
b/llvm/test/CodeGen/BPF/unaligned_load_store.ll
new file mode 100644
index 0..c01de4623af97
--- /dev/null
+++ b/llvm/test/CodeGen/BPF/unaligned_load_store.ll
@@ -0,0 +1,208 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+
+; RUN: llc -mtriple=bpfel -bpf-allow-misaligned-mem-access
-verify-machineinstrs %s -o - \
+; RUN:| FileCheck --check-prefixes=ALL,MISALIGN %s
+; RUN: llc -mtriple=bpfeb -bpf-allow-misaligned-mem-access
-verify-machineinstrs %s -o - \
+; RUN:| FileCheck --check-prefixes=ALL,MISALIGN %s
+
+; RUN: llc -mtriple=bpfel -verify-machineinstrs %s -o - \
+; RUN:| FileCheck --check-prefixes=ALL,ALIGN %s
+; RUN: llc -mtriple=bpfeb -verify-machineinstrs %s -o - \
+; RUN:| FileCheck --check-prefixes=ALL,ALIGN %s
+; NOTE:
+; This test verifies that the new +bpf-allow-misaligned-mem-access
+; feature allows the BPF backend to emit direct unaligned load/store
+; instructions instead of byte-by-byte emulation sequences.
+
+; -
+; i8 load
+; -
+define i8 @test_load_i8(i8* %p) {
+; ALL-LABEL: test_load_i8:
+; ALL: # %bb.0:
+; ALL-NEXT:w{{[0-9]+}} = *(u8 *)(r1 + 0)
+; ALL-NEXT:exit
+ %v = load i8, i8* %p, align 1
+ ret i8 %v
+}
+
+; -
+
[llvm-branch-commits] [llvm] [BPF] add allows-misaligned-mem-access target feature (PR #168314)
https://github.com/clairechingching created
https://github.com/llvm/llvm-project/pull/168314
I'd like to backport this change to handle misaligned memory access in the BPF
target which was merged in [this original
PR](https://github.com/llvm/llvm-project/pull/167013). Backporting it so I can
enable this feature in the rust nightly computer
>From 5d2ec95c53bd510a39fd33ab234a961c91b69cd0 Mon Sep 17 00:00:00 2001
From: Claire xyz
Date: Fri, 7 Nov 2025 11:08:47 -0500
Subject: [PATCH] [BPF] add allows-misaligned-mem-access target feature
This enables misaligned memory access when the feature is enabled
---
llvm/lib/Target/BPF/BPF.td| 4 +
llvm/lib/Target/BPF/BPFISelLowering.cpp | 20 ++
llvm/lib/Target/BPF/BPFISelLowering.h | 7 +
llvm/lib/Target/BPF/BPFSubtarget.cpp | 1 +
llvm/lib/Target/BPF/BPFSubtarget.h| 6 +
llvm/test/CodeGen/BPF/unaligned_load_store.ll | 196 ++
6 files changed, 234 insertions(+)
create mode 100644 llvm/test/CodeGen/BPF/unaligned_load_store.ll
diff --git a/llvm/lib/Target/BPF/BPF.td b/llvm/lib/Target/BPF/BPF.td
index dff76ca07af51..a7aa6274f5ac1 100644
--- a/llvm/lib/Target/BPF/BPF.td
+++ b/llvm/lib/Target/BPF/BPF.td
@@ -27,6 +27,10 @@ def ALU32 : SubtargetFeature<"alu32", "HasAlu32", "true",
def DwarfRIS: SubtargetFeature<"dwarfris", "UseDwarfRIS", "true",
"Disable MCAsmInfo
DwarfUsesRelocationsAcrossSections">;
+def MisalignedMemAccess : SubtargetFeature<"allows-misaligned-mem-access",
+ "AllowsMisalignedMemAccess", "true",
+ "Allows misaligned memory access">;
+
def : Proc<"generic", []>;
def : Proc<"v1", []>;
def : Proc<"v2", []>;
diff --git a/llvm/lib/Target/BPF/BPFISelLowering.cpp
b/llvm/lib/Target/BPF/BPFISelLowering.cpp
index f4f414d192df0..5ec7f5905fd22 100644
--- a/llvm/lib/Target/BPF/BPFISelLowering.cpp
+++ b/llvm/lib/Target/BPF/BPFISelLowering.cpp
@@ -196,6 +196,26 @@ BPFTargetLowering::BPFTargetLowering(const TargetMachine
&TM,
HasJmp32 = STI.getHasJmp32();
HasJmpExt = STI.getHasJmpExt();
HasMovsx = STI.hasMovsx();
+
+ AllowsMisalignedMemAccess = STI.getAllowsMisalignedMemAccess();
+}
+
+bool BPFTargetLowering::allowsMisalignedMemoryAccesses(EVT VT, unsigned, Align,
+
MachineMemOperand::Flags,
+ unsigned *Fast) const {
+ // allows-misaligned-mem-access is disabled
+ if (!AllowsMisalignedMemAccess)
+return false;
+
+ // only allow misalignment for simple value types
+ if (!VT.isSimple())
+return false;
+
+ // always assume fast mode when misalignment is allowed
+ if (Fast)
+*Fast = true;
+
+ return true;
}
bool BPFTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA)
const {
diff --git a/llvm/lib/Target/BPF/BPFISelLowering.h
b/llvm/lib/Target/BPF/BPFISelLowering.h
index 8f60261c10e9e..fe01bd5b8cf85 100644
--- a/llvm/lib/Target/BPF/BPFISelLowering.h
+++ b/llvm/lib/Target/BPF/BPFISelLowering.h
@@ -46,6 +46,10 @@ class BPFTargetLowering : public TargetLowering {
// with the given GlobalAddress is legal.
bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
+ bool allowsMisalignedMemoryAccesses(EVT VT, unsigned, Align,
+ MachineMemOperand::Flags,
+ unsigned *) const override;
+
BPFTargetLowering::ConstraintType
getConstraintType(StringRef Constraint) const override;
@@ -73,6 +77,9 @@ class BPFTargetLowering : public TargetLowering {
bool HasJmpExt;
bool HasMovsx;
+ // Allows Misalignment
+ bool AllowsMisalignedMemAccess;
+
SDValue LowerSDIVSREM(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
diff --git a/llvm/lib/Target/BPF/BPFSubtarget.cpp
b/llvm/lib/Target/BPF/BPFSubtarget.cpp
index 4167547680b12..925537710efb0 100644
--- a/llvm/lib/Target/BPF/BPFSubtarget.cpp
+++ b/llvm/lib/Target/BPF/BPFSubtarget.cpp
@@ -66,6 +66,7 @@ void BPFSubtarget::initializeEnvironment() {
HasGotol = false;
HasStoreImm = false;
HasLoadAcqStoreRel = false;
+ AllowsMisalignedMemAccess = false;
}
void BPFSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
diff --git a/llvm/lib/Target/BPF/BPFSubtarget.h
b/llvm/lib/Target/BPF/BPFSubtarget.h
index aed2211265e23..a9a20008733c9 100644
--- a/llvm/lib/Target/BPF/BPFSubtarget.h
+++ b/llvm/lib/Target/BPF/BPFSubtarget.h
@@ -63,6 +63,9 @@ class BPFSubtarget : public BPFGenSubtargetInfo {
// whether we should enable MCAsmInfo DwarfUsesRelocationsAcrossSections
bool UseDwarfRIS;
+ // whether we allows misaligned memory access
+ bool AllowsMisalignedMemAccess;
+
// whether cpu v4 insns are enabled.
bool HasLdsx, HasMo
[llvm-branch-commits] [llvm] [BPF] add allows-misaligned-mem-access target feature (PR #168314)
https://github.com/clairechingching edited https://github.com/llvm/llvm-project/pull/168314 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [BPF] add allows-misaligned-mem-access target feature (PR #168314)
clairechingching wrote: @yonghong-song I'd like to backport this change so that I can enable misalignment in the rust nightly compiler, thanks! https://github.com/llvm/llvm-project/pull/168314 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [BPF] add allows-misaligned-mem-access target feature (PR #168314)
https://github.com/clairechingching edited https://github.com/llvm/llvm-project/pull/168314 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [BPF] add allows-misaligned-mem-access target feature (PR #168314)
clairechingching wrote: @c-rhodes thanks for the clarification! @tru This change is a feature that doesn’t alter the default behavior, it simply enables misalignment support for the BPF target when explicitly requested. We’d like to backport it so that the Rust compiler can take advantage of this functionality. I’ve tested locally to confirm that the feature is correctly enabled when used. Would appreciate it if you could accept the merge. https://github.com/llvm/llvm-project/pull/168314 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
