Re: [llvm-commits] [test-suite] r47144 - in /test-suite/trunk: DiffOutput.sh RunSafely.sh RunSafelyAndStable.sh TimeProgram.sh TimedExec.sh
On Feb 14, 2008, at 3:43 PM, Lauro Ramos Venancio wrote: Author: laurov Date: Thu Feb 14 17:43:19 2008 New Revision: 47144 URL: http://llvm.org/viewvc/llvm-project?rev=47144view=rev Log: Shell scripts are not binary files. I believe this is incorrect, what you removed was the mime type of the files which is correctly application/x-sh. -eric ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r47162 - in /llvm/trunk/lib/Target: PowerPC/PPCSubtarget.cpp X86/X86Subtarget.cpp
Author: johannes
Date: Fri Feb 15 12:09:51 2008
New Revision: 47162
URL: http://llvm.org/viewvc/llvm-project?rev=47162view=rev
Log:
Remove warning about 64-bit code on processor
that doesn't support it. Per Chris.
Modified:
llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
llvm/trunk/lib/Target/X86/X86Subtarget.cpp
Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp?rev=47162r1=47161r2=47162view=diff
==
--- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp Fri Feb 15 12:09:51 2008
@@ -83,8 +83,6 @@
// If we are generating code for ppc64, verify that options make sense.
if (is64Bit) {
if (!has64BitSupport()) {
- cerr PPC: Generation of 64-bit code for a 32-bit processor
-requested. Ignoring 32-bit processor feature.\n;
Has64BitSupport = true;
}
// Silently force 64-bit register use on ppc64.
@@ -94,8 +92,6 @@
// If the user requested use of 64-bit regs, but the cpu selected doesn't
// support it, warn and ignore.
if (use64BitRegs() !has64BitSupport()) {
-cerr PPC: 64-bit registers requested on CPU without support.
- Disabling 64-bit register use.\n;
Use64BitRegs = false;
}
Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=47162r1=47161r2=47162view=diff
==
--- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Fri Feb 15 12:09:51 2008
@@ -235,12 +235,6 @@
// If feature string is not empty, parse features string.
std::string CPU = GetCurrentX86CPU();
ParseSubtargetFeatures(FS, CPU);
-
-if (Is64Bit !HasX86_64)
- cerr Warning: Generation of 64-bit code for a 32-bit processor
-requested.\n;
-if (Is64Bit X86SSELevel SSE2)
- cerr Warning: 64-bit processors all have at least SSE2.\n;
} else {
// Otherwise, use CPUID to auto-detect feature set.
AutoDetectSubtargetFeatures();
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Re: [llvm-commits] [llvm] r47162 - in /llvm/trunk/lib/Target: PowerPC/PPCSubtarget.cpp X86/X86Subtarget.cpp
On Feb 15, 2008, at 10:09 AM, Dale Johannesen wrote:
Author: johannes
Date: Fri Feb 15 12:09:51 2008
New Revision: 47162
URL: http://llvm.org/viewvc/llvm-project?rev=47162view=rev
Log:
Remove warning about 64-bit code on processor
that doesn't support it. Per Chris.
Thanks Dale! How about changing:
if (is64Bit) {
if (!has64BitSupport()) {
Has64BitSupport = true;
}
...
to:
if (is64Bit) {
Has64BitSupport = true;
...
-Chris
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[llvm-commits] [llvm] r47168 - /llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
Author: johannes
Date: Fri Feb 15 12:40:53 2008
New Revision: 47168
URL: http://llvm.org/viewvc/llvm-project?rev=47168view=rev
Log:
Cosmetics.
Modified:
llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp?rev=47168r1=47167r2=47168view=diff
==
--- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp Fri Feb 15 12:40:53 2008
@@ -82,18 +82,15 @@
// If we are generating code for ppc64, verify that options make sense.
if (is64Bit) {
-if (!has64BitSupport()) {
- Has64BitSupport = true;
-}
+Has64BitSupport = true;
// Silently force 64-bit register use on ppc64.
Use64BitRegs = true;
}
// If the user requested use of 64-bit regs, but the cpu selected doesn't
- // support it, warn and ignore.
- if (use64BitRegs() !has64BitSupport()) {
+ // support it, ignore.
+ if (use64BitRegs() !has64BitSupport())
Use64BitRegs = false;
- }
// Set the boolean corresponding to the current target triple, or the default
// if one cannot be determined, to true.
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[llvm-commits] [llvm] r47169 - /llvm/trunk/lib/VMCore/Mangler.cpp
Author: lattner
Date: Fri Feb 15 12:54:56 2008
New Revision: 47169
URL: http://llvm.org/viewvc/llvm-project?rev=47169view=rev
Log:
targets that support quotes for mangled names still need to escape newlines
when they occur in the name, just like is escaped.
Modified:
llvm/trunk/lib/VMCore/Mangler.cpp
Modified: llvm/trunk/lib/VMCore/Mangler.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Mangler.cpp?rev=47169r1=47168r2=47169view=diff
==
--- llvm/trunk/lib/VMCore/Mangler.cpp (original)
+++ llvm/trunk/lib/VMCore/Mangler.cpp Fri Feb 15 12:54:56 2008
@@ -96,6 +96,8 @@
for (std::string::const_iterator E = X.end(); I != E; ++I) {
if (*I == '')
Result += _QQ_;
+ else if (*I == '\n')
+Result += _NL_;
else
Result += *I;
}
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Re: [llvm-commits] CVS: llvm-www/releases/download.html
On Feb 15, 2008, at 10:46 AM, Duncan Sands wrote: Thanks Chris! Can you please also update the 2.2 release notes, and where it says (about Ada and Fortran) they need to be built from source, make that a link to GCCFEBuildIntrs. We typically don't change the 2.2 release notes after it ships. Do you mean the mainline release notes in llvm/docs? No, I meant the 2.2 ones, because it is not easy to find your way to GCCFEBuildIntrs from those release notes, that tell you to build from source... ok done -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r47161 - /llvm/trunk/lib/System/Unix/Signals.inc
Author: laurov
Date: Fri Feb 15 12:05:54 2008
New Revision: 47161
URL: http://llvm.org/viewvc/llvm-project?rev=47161view=rev
Log:
It is not safe to call fork in PrintStackTrace. Sometimes it freezes the
program.
Modified:
llvm/trunk/lib/System/Unix/Signals.inc
Modified: llvm/trunk/lib/System/Unix/Signals.inc
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Unix/Signals.inc?rev=47161r1=47160r2=47161view=diff
==
--- llvm/trunk/lib/System/Unix/Signals.inc (original)
+++ llvm/trunk/lib/System/Unix/Signals.inc Fri Feb 15 12:05:54 2008
@@ -61,54 +61,12 @@
// trace so that the user has an indication of why and where we died.
//
// On glibc systems we have the 'backtrace' function, which works nicely, but
-// doesn't demangle symbols. In order to backtrace symbols, we fork and exec a
-// 'c++filt' process to do the demangling. This seems like the simplest and
-// most robust solution when we can't allocate memory (such as in a signal
-// handler). If we can't find 'c++filt', we fallback to printing mangled
names.
-//
+// doesn't demangle symbols.
void PrintStackTrace() {
#ifdef HAVE_BACKTRACE
// Use backtrace() to output a backtrace on Linux systems with glibc.
int depth = backtrace(StackTrace, array_lengthof(StackTrace));
-
- // Create a one-way unix pipe. The backtracing process writes to PipeFDs[1],
- // the c++filt process reads from PipeFDs[0].
- int PipeFDs[2];
- if (pipe(PipeFDs)) {
-backtrace_symbols_fd(StackTrace, depth, STDERR_FILENO);
-return;
- }
-
- switch (pid_t ChildPID = fork()) {
- case -1:// Error forking, print mangled stack trace
-close(PipeFDs[0]);
-close(PipeFDs[1]);
-backtrace_symbols_fd(StackTrace, depth, STDERR_FILENO);
-return;
- default:// backtracing process
-close(PipeFDs[0]); // Close the reader side.
-
-// Print the mangled backtrace into the pipe.
-backtrace_symbols_fd(StackTrace, depth, PipeFDs[1]);
-close(PipeFDs[1]); // We are done writing.
-while (waitpid(ChildPID, 0, 0) == -1)
- if (errno != EINTR) break;
-return;
-
- case 0: // c++filt process
-close(PipeFDs[1]);// Close the writer side.
-dup2(PipeFDs[0], 0); // Read from standard input
-close(PipeFDs[0]);// Close the old descriptor
-dup2(2, 1); // Revector stdout - stderr
-
-// Try to run c++filt or gc++filt. If neither is found, call back on 'cat'
-// to print the mangled stack trace. If we can't find cat, just exit.
-execlp(c++filt, c++filt, (char*)NULL);
-execlp(gc++filt, gc++filt, (char*)NULL);
-execlp(cat, cat, (char*)NULL);
-execlp(/bin/cat, cat, (char*)NULL);
-exit(0);
- }
+ backtrace_symbols_fd(StackTrace, depth, STDERR_FILENO);
#endif
}
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[llvm-commits] [llvm] r47164 - /llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp
Author: evancheng Date: Fri Feb 15 12:12:09 2008 New Revision: 47164 URL: http://llvm.org/viewvc/llvm-project?rev=47164view=rev Log: Remove unnecessary #include. Modified: llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp Modified: llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp?rev=47164r1=47163r2=47164view=diff == --- llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp Fri Feb 15 12:12:09 2008 @@ -44,7 +44,6 @@ #include llvm/ADT/IndexedMap.h #include llvm/ADT/DenseMap.h #include llvm/ADT/SmallVector.h -#include llvm/ADT/SmallPtrSet.h #include llvm/ADT/Statistic.h #include algorithm using namespace llvm; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [test-suite] r47144 - in /test-suite/trunk: DiffOutput.sh RunSafely.sh RunSafelyAndStable.sh TimeProgram.sh TimedExec.sh
On Feb 15, 2008, at 10:08 AM, Lauro Ramos Venancio wrote: Hi Eric, I believe this is incorrect, what you removed was the mime type of the files which is correctly application/x-sh. As far as I know, the svn handle as binary all files with mime-type application. *looks at google* I found a patch (entertainingly from some guy at apple) that does that, so I guess I'll assume that. I have no idea why svn would want that for textual applications. -eric ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r47171 - in /llvm/trunk/lib/Target: ARM/ARMAsmPrinter.cpp PowerPC/PPCAsmPrinter.cpp X86/X86AsmPrinter.cpp
Author: lattner
Date: Fri Feb 15 13:04:54 2008
New Revision: 47171
URL: http://llvm.org/viewvc/llvm-project?rev=47171view=rev
Log:
Handle \n's in value names for more targets. The asm printers
really really really need refactoring :(
Modified:
llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp
Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=47171r1=47170r2=47171view=diff
==
--- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Fri Feb 15 13:04:54 2008
@@ -807,6 +807,15 @@
return Result;
}
+/// PrintUnmangledNameSafely - Print out the printable characters in the name.
+/// Don't print things like \n or \0.
+static void PrintUnmangledNameSafely(const Value *V, std::ostream OS) {
+ for (const char *Name = V-getNameStart(), *E = Name+V-getNameLen();
+ Name != E; ++Name)
+if (isprint(*Name))
+ OS *Name;
+}
+
bool ARMAsmPrinter::doFinalization(Module M) {
const TargetData *TD = TM.getTargetData();
@@ -875,7 +884,9 @@
if (TAI-getCOMMDirectiveTakesAlignment())
O , (TAI-getAlignmentIsInBytes() ? (1 Align) : Align);
}
-O \t\t TAI-getCommentString() I-getName() \n;
+O \t\t TAI-getCommentString() ;
+PrintUnmangledNameSafely(I, O);
+O \n;
continue;
}
}
@@ -961,8 +972,9 @@
}
EmitAlignment(Align, I);
-O name :\t\t\t\t TAI-getCommentString() I-getName()
- \n;
+O name :\t\t\t\t TAI-getCommentString() ;
+PrintUnmangledNameSafely(I, O);
+O \n;
if (TAI-hasDotTypeDotSizeDirective())
O \t.size name , Size \n;
// If the initializer is a extern weak symbol, remember to emit the weak
Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=47171r1=47170r2=47171view=diff
==
--- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Fri Feb 15 13:04:54 2008
@@ -639,6 +639,15 @@
return Result;
}
+/// PrintUnmangledNameSafely - Print out the printable characters in the name.
+/// Don't print things like \n or \0.
+static void PrintUnmangledNameSafely(const Value *V, std::ostream OS) {
+ for (const char *Name = V-getNameStart(), *E = Name+V-getNameLen();
+ Name != E; ++Name)
+if (isprint(*Name))
+ OS *Name;
+}
+
bool LinuxAsmPrinter::doFinalization(Module M) {
const TargetData *TD = TM.getTargetData();
@@ -680,7 +689,9 @@
SwitchToDataSection(\t.data, I);
O .comm name , Size;
}
- O \t\t TAI-getCommentString() ' I-getName() '\n;
+ O \t\t TAI-getCommentString() ';
+ PrintUnmangledNameSafely(I, O);
+ O '\n;
} else {
switch (I-getLinkage()) {
case GlobalValue::LinkOnceLinkage:
@@ -727,8 +738,9 @@
}
EmitAlignment(Align, I);
- O name :\t\t\t\t TAI-getCommentString() '
- I-getName() '\n;
+ O name :\t\t\t\t TAI-getCommentString() ';
+ PrintUnmangledNameSafely(I, O);
+ O '\n;
// If the initializer is a extern weak symbol, remember to emit the weak
// reference!
@@ -942,7 +954,9 @@
if (Subtarget.isDarwin9())
O , Align;
}
- O \t\t TAI-getCommentString() ' I-getName() '\n;
+ O \t\t TAI-getCommentString() ';
+ PrintUnmangledNameSafely(I, O);
+ O '\n;
} else {
switch (I-getLinkage()) {
case GlobalValue::LinkOnceLinkage:
@@ -999,8 +1013,9 @@
}
EmitAlignment(Align, I);
- O name :\t\t\t\t TAI-getCommentString() '
- I-getName() '\n;
+ O name :\t\t\t\t TAI-getCommentString() ';
+ PrintUnmangledNameSafely(I, O);
+ O '\n;
// If the initializer is a extern weak symbol, remember to emit the weak
// reference!
Modified: llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp?rev=47171r1=47170r2=47171view=diff
==
--- llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp Fri Feb 15 13:04:54 2008
@@ -138,9 +138,9 @@
return Result;
}
-/// PrintUnamedNameSafely - Print out the printable characters in the name.
+/// PrintUnmangledNameSafely - Print out the printable characters in the name.
/// Don't print things like \n or \0.
-static void PrintUnamedNameSafely(const Value *V, std::ostream
Re: [llvm-commits] CVS: llvm-www/releases/download.html
Thanks Chris! Can you please also update the 2.2 release notes, and where it says (about Ada and Fortran) they need to be built from source, make that a link to GCCFEBuildIntrs. We typically don't change the 2.2 release notes after it ships. Do you mean the mainline release notes in llvm/docs? No, I meant the 2.2 ones, because it is not easy to find your way to GCCFEBuildIntrs from those release notes, that tell you to build from source... Ciao, D. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm-www/releases/download.html
On Feb 14, 2008, at 11:42 PM, Duncan Sands wrote: update the one reference to CFEBuildInstrs.html that I see. Thanks Chris! Can you please also update the 2.2 release notes, and where it says (about Ada and Fortran) they need to be built from source, make that a link to GCCFEBuildIntrs. We typically don't change the 2.2 release notes after it ships. Do you mean the mainline release notes in llvm/docs? -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r46827 - memoperands #1
This, and the question of whether to make LSBaseNode store a MemOperand instead of separate fields, are related. Ok, right. What is your opinion on this? Is there any reason not to give MemOperand a VT and then give LSBaseNode a MemOperand? There's a little redundancy; the MemOperand has flags to distinguish between load and store, and LSBaseNode has its opcode which is either LOAD or STORE. But that's not a big problem. True, I don't think that an extra flag of redundancy is a big deal here. Code simplicity is worth it :) Good question. This sort of thing is currently rare enough that it is probably fine to just use a null Value*, and have everything treat it conservatively. Would this be acceptable for now? Yes, using a null Value* is done in many places right now that don't yet provide a proper SourceValue. Ok, -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r47172 - in /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeTypes.h LegalizeTypesPromote.cpp
Author: baldrick
Date: Fri Feb 15 13:34:17 2008
New Revision: 47172
URL: http://llvm.org/viewvc/llvm-project?rev=47172view=rev
Log:
Teach LegalizeTypes how to promote the flags
in a ret node. These are created as i32 constants
but on some platforms i32 is not legal. This
fixes 26 make check failures, for example
Alpha/2005-07-12-TwoMallocCalls.ll.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=47172r1=47171r2=47172view=diff
==
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Fri Feb 15 13:34:17 2008
@@ -182,18 +182,19 @@
// Operand Promotion.
bool PromoteOperand(SDNode *N, unsigned OperandNo);
SDOperand PromoteOperand_ANY_EXTEND(SDNode *N);
- SDOperand PromoteOperand_ZERO_EXTEND(SDNode *N);
- SDOperand PromoteOperand_SIGN_EXTEND(SDNode *N);
- SDOperand PromoteOperand_TRUNCATE(SDNode *N);
+ SDOperand PromoteOperand_BR_CC(SDNode *N, unsigned OpNo);
+ SDOperand PromoteOperand_BRCOND(SDNode *N, unsigned OpNo);
SDOperand PromoteOperand_FP_EXTEND(SDNode *N);
SDOperand PromoteOperand_FP_ROUND(SDNode *N);
SDOperand PromoteOperand_INT_TO_FP(SDNode *N);
+ SDOperand PromoteOperand_RET(SDNode *N, unsigned OpNo);
SDOperand PromoteOperand_SELECT(SDNode *N, unsigned OpNo);
- SDOperand PromoteOperand_BRCOND(SDNode *N, unsigned OpNo);
- SDOperand PromoteOperand_BR_CC(SDNode *N, unsigned OpNo);
SDOperand PromoteOperand_SETCC(SDNode *N, unsigned OpNo);
+ SDOperand PromoteOperand_SIGN_EXTEND(SDNode *N);
SDOperand PromoteOperand_STORE(StoreSDNode *N, unsigned OpNo);
-
+ SDOperand PromoteOperand_TRUNCATE(SDNode *N);
+ SDOperand PromoteOperand_ZERO_EXTEND(SDNode *N);
+
void PromoteSetCCOperands(SDOperand LHS,SDOperand RHS, ISD::CondCode Code);
//======//
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp?rev=47172r1=47171r2=47172view=diff
==
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp Fri Feb 15
13:34:17 2008
@@ -340,8 +340,10 @@
case ISD::MEMSET:
case ISD::MEMCPY:
case ISD::MEMMOVE: Res = HandleMemIntrinsic(N); break;
+
+ case ISD::RET: Res = PromoteOperand_RET(N, OpNo); break;
}
-
+
// If the result is null, the sub-method took care of registering results
etc.
if (!Res.Val) return false;
// If the result is N, the sub-method updated N in place.
@@ -524,3 +526,27 @@
SVOffset, N-getMemoryVT(),
isVolatile, Alignment);
}
+
+SDOperand DAGTypeLegalizer::PromoteOperand_RET(SDNode *N, unsigned OpNo) {
+ assert(!(OpNo 1) Return values should be legally typed!);
+ assert((N-getNumOperands() 1) Wrong number of operands!);
+
+ // It's a flag. Promote all the flags in one hit, as an optimization.
+ SmallVectorSDOperand, 8 NewValues(N-getNumOperands());
+ NewValues[0] = N-getOperand(0); // The chain
+ for (unsigned i = 1, e = N-getNumOperands(); i e; i += 2) {
+// The return value.
+NewValues[i] = N-getOperand(i);
+
+// The flag.
+SDOperand Flag = N-getOperand(i + 1);
+if (getTypeAction(Flag.getValueType()) == Promote)
+ // The promoted value may have rubbish in the new bits, but that
+ // doesn't matter because those bits aren't queried anyway.
+ Flag = GetPromotedOp(Flag);
+NewValues[i + 1] = Flag;
+ }
+
+ return DAG.UpdateNodeOperands(SDOperand (N, 0),
+NewValues[0], NewValues.size());
+}
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Re: [llvm-commits] [llvm] r47167 - in /llvm/trunk: include/llvm/CodeGen/LiveInterval.h include/llvm/CodeGen/LiveIntervalAnalysis.h lib/CodeGen/LiveInterval.cpp lib/CodeGen/LiveIntervalAnalysis.cpp lib
On Feb 15, 2008, at 10:24 AM, Evan Cheng wrote: Author: evancheng Date: Fri Feb 15 12:24:29 2008 New Revision: 47167 URL: http://llvm.org/viewvc/llvm-project?rev=47167view=rev Log: - Removing the infamous r2rMap_ and rep() method. Now the coalescer will update register defs and uses after each successful coalescing. - Also removed a number of hacks and fixed some subtle kill information bugs. Very nice! Is there any compile-time impact of this? Does it speed up coallescing/RA at all? -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm-gcc-4.2] r47077 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
On Feb 15, 2008, at 11:41 AM, Dale Johannesen wrote: I think this makes isPaddingElement and a bunch of code in llvm- types.cpp dead. Yes, thought I'd see how this patch went first:) Heh ok :) Looks like you were right :) Doesn't this also cause us to regress on PR1278? If that's what you want to call it. Personally I think padding should be deterministic whenever possible, even though the standards don't require it; you get fewer Interesting bugs that way. Ok, but this still doesn't get us that, and I don't see how we reasonably could ever get it in general: struct mystruct x; x.f = 1; x.g = 2; leaves any padding uninitialized. -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm-gcc-4.2] r47077 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
On Feb 15, 2008, at 11:56 AM, Chris Lattner wrote: On Feb 15, 2008, at 11:41 AM, Dale Johannesen wrote: I think this makes isPaddingElement and a bunch of code in llvm- types.cpp dead. Yes, thought I'd see how this patch went first:) Heh ok :) Looks like you were right :) Doesn't this also cause us to regress on PR1278? If that's what you want to call it. Personally I think padding should be deterministic whenever possible, even though the standards don't require it; you get fewer Interesting bugs that way. Ok, but this still doesn't get us that, and I don't see how we reasonably could ever get it in general: struct mystruct x; x.f = 1; x.g = 2; leaves any padding uninitialized. You can do it by initializing all struct objects, say to 0. The overhead for that is probably too high; in practice there would be cases you wouldn't get. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r47170 - /llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp
Author: lattner
Date: Fri Feb 15 12:56:05 2008
New Revision: 47170
URL: http://llvm.org/viewvc/llvm-project?rev=47170view=rev
Log:
If the llvm name contains an unprintable character, don't print it in
the global comment. This prevents printing things like:
.. # foo
bar
when the name is foo\nbar.
Modified:
llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp
Modified: llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp?rev=47170r1=47169r2=47170view=diff
==
--- llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp Fri Feb 15 12:56:05 2008
@@ -138,6 +138,15 @@
return Result;
}
+/// PrintUnamedNameSafely - Print out the printable characters in the name.
+/// Don't print things like \n or \0.
+static void PrintUnamedNameSafely(const Value *V, std::ostream OS) {
+ for (const char *Name = V-getNameStart(), *E = Name+V-getNameLen();
+ Name != E; ++Name)
+if (isprint(*Name))
+ OS *Name;
+}
+
bool X86SharedAsmPrinter::doFinalization(Module M) {
// Note: this code is not shared by the Intel printer as it is too different
// from how MASM does things. When making changes here don't forget to look
@@ -218,7 +227,9 @@
if (TAI-getCOMMDirectiveTakesAlignment())
O , (TAI-getAlignmentIsInBytes() ? (1 Align) : Align);
}
-O \t\t TAI-getCommentString() I-getName() \n;
+O \t\t TAI-getCommentString() ;
+PrintUnamedNameSafely(I, O);
+O \n;
continue;
}
}
@@ -319,8 +330,9 @@
}
EmitAlignment(Align, I);
-O name :\t\t\t\t TAI-getCommentString() I-getName()
- \n;
+O name :\t\t\t\t TAI-getCommentString() ;
+PrintUnamedNameSafely(I, O);
+O \n;
if (TAI-hasDotTypeDotSizeDirective())
O \t.size\t name , Size \n;
// If the initializer is a extern weak symbol, remember to emit the weak
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Re: [llvm-commits] test/C++Frontend/2008-02-13-sret.cpp
On Thursday 14 February 2008 19:02:26 Dale Johannesen wrote:
On Feb 14, 2008, at 6:52 AM, Duncan Sands wrote:
Hi Dale, this test is failing for me (x86-32 linux):
there is nothing called retval.
// RUN: %llvmgxx -S -O0 -emit-llvm %s -o - | grep retval | grep S242
| grep {i32 1} | count 2
OK, that's because Linux returns S242 by the sret mechanism instead of
as an i64. What's I'd like to do to preserve the sense of the test is
grep for retval | memtmp, but I'm not sure how to do that portably.
Does this work for you?
// RUN: %llvmgxx -S -O0 -emit-llvm %s -o - | grep {retval\\|memtmp} |
grep S242 | grep {i32 1} | count 2
It works for me so I've committed it.
Thanks!
Duncan.
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Re: [llvm-commits] [llvm] r47161 - /llvm/trunk/lib/System/Unix/Signals.inc
Is this in a signal handler? Yes. There are tight restrictions on what is allowed in a signal handler, not just no forking :) Lauro ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r47177 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
Author: djg
Date: Fri Feb 15 14:59:17 2008
New Revision: 47177
URL: http://llvm.org/viewvc/llvm-project?rev=47177view=rev
Log:
Skip over the defs and start at the uses when looking for operands
with the TIED_TO attribute.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=47177r1=47176r2=47177view=diff
==
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Fri Feb 15
14:59:17 2008
@@ -431,7 +431,7 @@
SUnit *NewSU = NewSUnit(N);
SUnitMap[N].push_back(NewSU);
const TargetInstrDesc TID = TII-get(N-getTargetOpcode());
-for (unsigned i = 0; i != TID.getNumOperands(); ++i) {
+for (unsigned i = TID.getNumDefs(); i != TID.getNumOperands(); ++i) {
if (TID.getOperandConstraint(i, TOI::TIED_TO) != -1) {
NewSU-isTwoAddress = true;
break;
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[llvm-commits] [llvm-gcc-4.2] r47180 - in /llvm-gcc-4.2/trunk/gcc: llvm-convert.cpp llvm-internal.h llvm-types.cpp
Author: johannes
Date: Fri Feb 15 16:02:22 2008
New Revision: 47180
URL: http://llvm.org/viewvc/llvm-project?rev=47180view=rev
Log:
Put back fixed version of code to avoid copying
padding within structs (sometimes).
Modified:
llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
llvm-gcc-4.2/trunk/gcc/llvm-internal.h
llvm-gcc-4.2/trunk/gcc/llvm-types.cpp
Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47180r1=47179r2=47180view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Fri Feb 15 16:02:22 2008
@@ -1229,7 +1229,8 @@
/// CopyAggregate - Recursively traverse the potientially aggregate src/dest
/// ptrs, copying all of the elements.
-static void CopyAggregate(MemRef DestLoc, MemRef SrcLoc, LLVMBuilder Builder)
{
+static void CopyAggregate(MemRef DestLoc, MemRef SrcLoc, LLVMBuilder Builder,
+ tree gccType) {
assert(DestLoc.Ptr-getType() == SrcLoc.Ptr-getType()
Cannot copy between two pointers of different type!);
const Type *ElTy =
@@ -1246,6 +1247,8 @@
const StructLayout *SL = getTargetData().getStructLayout(STy);
Constant *Zero = ConstantInt::get(Type::Int32Ty, 0);
for (unsigned i = 0, e = STy-getNumElements(); i != e; ++i) {
+ if (gccType isPaddingElement(gccType, i))
+continue;
Constant *Idx = ConstantInt::get(Type::Int32Ty, i);
Value *Idxs[2] = { Zero, Idx };
Value *DElPtr = Builder.CreateGEP(DestLoc.Ptr, Idxs, Idxs + 2, tmp);
@@ -1253,7 +1256,7 @@
unsigned Align = MinAlign(Alignment, SL-getElementOffset(i));
CopyAggregate(MemRef(DElPtr, Align, DestLoc.Volatile),
MemRef(SElPtr, Align, SrcLoc.Volatile),
-Builder);
+Builder, 0);
}
} else {
const ArrayType *ATy = castArrayType(ElTy);
@@ -1267,7 +1270,7 @@
unsigned Align = MinAlign(Alignment, i * EltSize);
CopyAggregate(MemRef(DElPtr, Align, DestLoc.Volatile),
MemRef(SElPtr, Align, SrcLoc.Volatile),
-Builder);
+Builder, 0);
}
}
}
@@ -1311,7 +1314,7 @@
CountAggregateElements(LLVMTy) = 8) {
DestLoc.Ptr = BitCastToType(DestLoc.Ptr, PointerType::getUnqual(LLVMTy));
SrcLoc.Ptr = BitCastToType(SrcLoc.Ptr, PointerType::getUnqual(LLVMTy));
- CopyAggregate(DestLoc, SrcLoc, Builder);
+ CopyAggregate(DestLoc, SrcLoc, Builder, type);
return;
}
}
Modified: llvm-gcc-4.2/trunk/gcc/llvm-internal.h
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-internal.h?rev=47180r1=47179r2=47180view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-internal.h (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-internal.h Fri Feb 15 16:02:22 2008
@@ -116,7 +116,7 @@
/// Return true if and only if field no. N from struct type T is a padding
/// element added to match llvm struct type size and gcc struct type size.
-bool isPaddingElement(const Type *T, unsigned N);
+bool isPaddingElement(union tree_node*, unsigned N);
/// TypeConverter - Implement the converter from GCC types to LLVM types.
///
Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-types.cpp?rev=47180r1=47179r2=47180view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-types.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Fri Feb 15 16:02:22 2008
@@ -1577,13 +1577,13 @@
}
}
-std::mapconst Type *, StructTypeConversionInfo * StructTypeInfoMap;
+std::maptree, StructTypeConversionInfo * StructTypeInfoMap;
/// Return true if and only if field no. N from struct type T is a padding
/// element added to match llvm struct type size and gcc struct type size.
-bool isPaddingElement(const Type *Ty, unsigned index) {
+bool isPaddingElement(tree type, unsigned index) {
- StructTypeConversionInfo *Info = StructTypeInfoMap[Ty];
+ StructTypeConversionInfo *Info = StructTypeInfoMap[type];
// If info is not available then be conservative and return false.
if (!Info)
@@ -1600,10 +1600,10 @@
/// structs then adjust their PaddingElement bits. Padding
/// field in one struct may not be a padding field in another
/// struct.
-void adjustPaddingElement(const Type *OldTy, const Type *NewTy) {
+void adjustPaddingElement(tree oldtree, tree newtree) {
- StructTypeConversionInfo *OldInfo = StructTypeInfoMap[OldTy];
- StructTypeConversionInfo *NewInfo = StructTypeInfoMap[NewTy];
+ StructTypeConversionInfo *OldInfo = StructTypeInfoMap[oldtree];
+ StructTypeConversionInfo *NewInfo = StructTypeInfoMap[newtree];
if (!OldInfo || !NewInfo)
return;
@@
Re: [llvm-commits] [llvm-gcc-4.2] r47077 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
On Feb 15, 2008, at 11:38 AM, Chris Lattner wrote:
On Feb 13, 2008, at 10:36 AM, Dale Johannesen wrote:
Author: johannes
Date: Wed Feb 13 12:36:09 2008
New Revision: 47077
URL: http://llvm.org/viewvc/llvm-project?rev=47077view=rev
Log:
Don't omit copying of PaddingElements; this causes
wrong code when structs are identical except that
one has padding in the same place another has a
real field. Look at the right node when looking
for MODIFY under RET.
I think this makes isPaddingElement and a bunch of code in llvm-
types.cpp dead.
Yes, thought I'd see how this patch went first:)
Doesn't this also cause us to regress on PR1278?
If that's what you want to call it. Personally I think padding should
be
deterministic whenever possible, even though the standards don't
require it; you get fewer Interesting bugs that way.
I'm fine with temporarily saying we'll take a code pessimization for
improved correctness but we need to address this somehow, perhaps by
filing another bug.
-Chris
Modified:
llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47077r1=47076r2=47077view=diff
=
=
=
=
=
=
=
=
=
=
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Wed Feb 13 12:36:09 2008
@@ -1246,8 +1246,6 @@
const StructLayout *SL = getTargetData().getStructLayout(STy);
Constant *Zero = ConstantInt::get(Type::Int32Ty, 0);
for (unsigned i = 0, e = STy-getNumElements(); i != e; ++i) {
- if (isPaddingElement(STy, i))
-continue;
Constant *Idx = ConstantInt::get(Type::Int32Ty, i);
Value *Idxs[2] = { Zero, Idx };
Value *DElPtr = Builder.CreateGEP(DestLoc.Ptr, Idxs, Idxs + 2,
tmp);
@@ -1721,7 +1719,8 @@
// operand is an aggregate value, create a temporary to evaluate
it into.
MemRef DestLoc;
const Type *DestTy = ConvertType(TREE_TYPE(TREE_OPERAND(exp, 0)));
-if (!DestTy-isFirstClassType() TREE_CODE(exp) !=
MODIFY_EXPR)
+if (!DestTy-isFirstClassType()
+TREE_CODE(TREE_OPERAND(exp, 0)) != MODIFY_EXPR)
DestLoc = CreateTempLoc(DestTy);
Emit(TREE_OPERAND(exp, 0), DestLoc.Ptr ? DestLoc : NULL);
}
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Re: [llvm-commits] [llvm] r47167 - in /llvm/trunk: include/llvm/CodeGen/LiveInterval.h include/llvm/CodeGen/LiveIntervalAnalysis.h lib/CodeGen/LiveInterval.cpp lib/CodeGen/LiveIntervalAnalysis.cpp lib
Excellent! -Chris On Feb 15, 2008, at 11:48 AM, Evan Cheng wrote: It sped up the coalescer considerably. On kimwitu++: before: 0.7527 ( 12.8%) 0.0068 ( 2.7%) 0.7596 ( 12.4%) 0.7591 ( 12.4%) Simple Register Coalescing now: 0.3062 ( 5.6%) 0.0055 ( 2.2%) 0.3117 ( 5.5%) 0.3115 ( 5.5%) Simple Register Coalescing Evan On Feb 15, 2008, at 11:19 AM, Chris Lattner wrote: On Feb 15, 2008, at 10:24 AM, Evan Cheng wrote: Author: evancheng Date: Fri Feb 15 12:24:29 2008 New Revision: 47167 URL: http://llvm.org/viewvc/llvm-project?rev=47167view=rev Log: - Removing the infamous r2rMap_ and rep() method. Now the coalescer will update register defs and uses after each successful coalescing. - Also removed a number of hacks and fixed some subtle kill information bugs. Very nice! Is there any compile-time impact of this? Does it speed up coallescing/RA at all? -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r47163 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Author: djg
Date: Fri Feb 15 12:11:59 2008
New Revision: 47163
URL: http://llvm.org/viewvc/llvm-project?rev=47163view=rev
Log:
Use StoreSDNode::getValue instead of calling getOperand directly
with a hard-coded operand number.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47163r1=47162r2=47163view=diff
==
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri Feb 15 12:11:59 2008
@@ -2344,14 +2344,14 @@
MVT::ValueType TVT = MVT::getVectorType(EVT, NumElems);
if (TLI.isTypeLegal(TVT)) {
// Turn this into a normal store of the vector type.
-Tmp3 = LegalizeOp(Node-getOperand(1));
+Tmp3 = LegalizeOp(ST-getValue());
Result = DAG.getStore(Tmp1, Tmp3, Tmp2, ST-getSrcValue(),
SVOffset, isVolatile, Alignment);
Result = LegalizeOp(Result);
break;
} else if (NumElems == 1) {
// Turn this into a normal store of the scalar type.
-Tmp3 = ScalarizeVectorOp(Node-getOperand(1));
+Tmp3 = ScalarizeVectorOp(ST-getValue());
Result = DAG.getStore(Tmp1, Tmp3, Tmp2, ST-getSrcValue(),
SVOffset, isVolatile, Alignment);
// The scalarized value type may not be legal, e.g. it might
require
@@ -2359,12 +2359,12 @@
Result = LegalizeOp(Result);
break;
} else {
-SplitVectorOp(Node-getOperand(1), Lo, Hi);
+SplitVectorOp(ST-getValue(), Lo, Hi);
IncrementSize = MVT::getVectorNumElements(Lo.Val-getValueType(0))
*
MVT::getSizeInBits(EVT)/8;
}
} else {
- ExpandOp(Node-getOperand(1), Lo, Hi);
+ ExpandOp(ST-getValue(), Lo, Hi);
IncrementSize = Hi.Val ? MVT::getSizeInBits(Hi.getValueType())/8 : 0;
if (TLI.isBigEndian())
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Re: [llvm-commits] [llvm] r47161 - /llvm/trunk/lib/System/Unix/Signals.inc
It is not safe to call fork in PrintStackTrace. Sometimes it freezes the program. Is this in a signal handler? There are tight restrictions on what is allowed in a signal handler, not just no forking :) Ciao, Duncan. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/releases/2.2/docs/ReleaseNotes.html
Changes in directory llvm-www/releases/2.2/docs: ReleaseNotes.html updated: 1.2 - 1.3 --- Log message: link to the instructions for building fortran and ada. --- Diffs of the changes: (+4 -3) ReleaseNotes.html |7 --- 1 files changed, 4 insertions(+), 3 deletions(-) Index: llvm-www/releases/2.2/docs/ReleaseNotes.html diff -u llvm-www/releases/2.2/docs/ReleaseNotes.html:1.2 llvm-www/releases/2.2/docs/ReleaseNotes.html:1.3 --- llvm-www/releases/2.2/docs/ReleaseNotes.html:1.2Tue Feb 12 01:02:12 2008 +++ llvm-www/releases/2.2/docs/ReleaseNotes.htmlFri Feb 15 13:06:44 2008 @@ -135,8 +135,9 @@ liAnton and Duncan significantly improved llvm-gcc 4.2 support for the GCC Ada (GNAT) and Fortran (gfortran) front-ends. These front-ends should still be considered experimental however: see the a href=#knownproblemslist of known problems/a. -The release binaries do not contain either front-end: they need to be built from -source (the Ada front-end only builds on x86-32 linux)./li +The release binaries do not contain either front-end: they need to be a +href=http://llvm.org/docs/GCCFEBuildInstrs.html;built from +source/a (the Ada front-end only builds on x86-32 linux)./li liDale contributed full support for long double on x86/x86-64 (where it is 80 bits) and on Darwin PPC/PPC64 (where it is 128 bits). In previous LLVM @@ -755,7 +756,7 @@ src=http://www.w3.org/Icons/valid-html401; alt=Valid HTML 4.01!/a a href=http://llvm.org/;LLVM Compiler Infrastructure/abr - Last modified: $Date: 2008/02/12 07:02:12 $ + Last modified: $Date: 2008/02/15 19:06:44 $ /address /body ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r47173 - /llvm/trunk/test/C++Frontend/2008-02-13-sret.cpp
Author: baldrick
Date: Fri Feb 15 13:42:13 2008
New Revision: 47173
URL: http://llvm.org/viewvc/llvm-project?rev=47173view=rev
Log:
Fix this test on linux, which returns S242
using sret.
Modified:
llvm/trunk/test/C++Frontend/2008-02-13-sret.cpp
Modified: llvm/trunk/test/C++Frontend/2008-02-13-sret.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/C%2B%2BFrontend/2008-02-13-sret.cpp?rev=47173r1=47172r2=47173view=diff
==
--- llvm/trunk/test/C++Frontend/2008-02-13-sret.cpp (original)
+++ llvm/trunk/test/C++Frontend/2008-02-13-sret.cpp Fri Feb 15 13:42:13 2008
@@ -1,4 +1,5 @@
-// RUN: %llvmgxx -S -O0 -emit-llvm %s -o - | grep retval | grep S242 | grep
{i32 1} | count 2
+// RUN: %llvmgxx -S -O0 -emit-llvm %s -o - | grep {retval\\|memtmp} | grep
S242 | \
+// RUN: grep {i32 1} | count 2
// Test that all 8 bytes of ret in check242 are copied. llvm-gcc was
// treating S242 as if it were S93, which does not need to have the
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[llvm-commits] [llvm] r47176 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
Author: djg
Date: Fri Feb 15 14:50:13 2008
New Revision: 47176
URL: http://llvm.org/viewvc/llvm-project?rev=47176view=rev
Log:
Use the TargetInstrDescr to determine the number of operands
that should be checked for the TIED_TO attribute instead of
using CountOperands.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=47176r1=47175r2=47176view=diff
==
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Fri Feb 15
14:50:13 2008
@@ -149,7 +149,7 @@
unsigned Opc = SU-Node-getTargetOpcode();
const TargetInstrDesc TID = TII-get(Opc);
unsigned NumRes = TID.getNumDefs();
- unsigned NumOps = CountOperands(SU-Node);
+ unsigned NumOps = TID.getNumOperands() - NumRes;
for (unsigned j = 0; j != NumOps; ++j) {
if (TID.getOperandConstraint(j+NumRes, TOI::TIED_TO) == -1)
continue;
@@ -1289,7 +1289,7 @@
unsigned Opc = SU-Node-getTargetOpcode();
const TargetInstrDesc TID = TII-get(Opc);
unsigned NumRes = TID.getNumDefs();
-unsigned NumOps = ScheduleDAG::CountOperands(SU-Node);
+unsigned NumOps = TID.getNumOperands() - NumRes;
for (unsigned i = 0; i != NumOps; ++i) {
if (TID.getOperandConstraint(i+NumRes, TOI::TIED_TO) != -1) {
SDNode *DU = SU-Node-getOperand(i).Val;
@@ -1365,7 +1365,7 @@
unsigned Opc = Node-getTargetOpcode();
const TargetInstrDesc TID = TII-get(Opc);
unsigned NumRes = TID.getNumDefs();
-unsigned NumOps = ScheduleDAG::CountOperands(Node);
+unsigned NumOps = TID.getNumOperands() - NumRes;
for (unsigned j = 0; j != NumOps; ++j) {
if (TID.getOperandConstraint(j+NumRes, TOI::TIED_TO) != -1) {
SDNode *DU = SU-Node-getOperand(j).Val;
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[llvm-commits] [test-suite] r47159 - /test-suite/trunk/RunSafely.sh
Author: laurov Date: Fri Feb 15 11:00:33 2008 New Revision: 47159 URL: http://llvm.org/viewvc/llvm-project?rev=47159view=rev Log: Limit virtual memory instead of stack size. Modified: test-suite/trunk/RunSafely.sh Modified: test-suite/trunk/RunSafely.sh URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/RunSafely.sh?rev=47159r1=47158r2=47159view=diff == --- test-suite/trunk/RunSafely.sh (original) +++ test-suite/trunk/RunSafely.sh Fri Feb 15 11:00:33 2008 @@ -82,8 +82,8 @@ # files being output by the tests. 10 MB should be enough for anybody. ;) ULIMITCMD=$ULIMITCMD ulimit -f 10485760; -# stack size: 100 MB should be enough for anybody. ;) -ULIMITCMD=$ULIMITCMD ulimit -s 10; +# virtual memory: 200 MB should be enough for anybody. ;) +ULIMITCMD=$ULIMITCMD ulimit -v 20; esac rm -f core core.* ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r47179 - /llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
Author: evancheng Date: Fri Feb 15 15:36:51 2008 New Revision: 47179 URL: http://llvm.org/viewvc/llvm-project?rev=47179view=rev Log: The copy instruction being coalesced will be removed, it is not a kill. Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=47179r1=47178r2=47179view=diff == --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Fri Feb 15 15:36:51 2008 @@ -300,10 +300,10 @@ if (ULR-valno != AValNo) continue; UseMO.setReg(NewReg); -if (UseMO.isKill()) - BKills.push_back(li_-getUseIndex(UseIdx)+1); if (UseMI == CopyMI) continue; +if (UseMO.isKill()) + BKills.push_back(li_-getUseIndex(UseIdx)+1); unsigned SrcReg, DstReg; if (!tii_-isMoveInstr(*UseMI, SrcReg, DstReg)) continue; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [test-suite] r47144 - in /test-suite/trunk: DiffOutput.sh RunSafely.sh RunSafelyAndStable.sh TimeProgram.sh TimedExec.sh
Hi Eric, I believe this is incorrect, what you removed was the mime type of the files which is correctly application/x-sh. As far as I know, the svn handle as binary all files with mime-type application. Lauro ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm-gcc-4.2] r47077 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
On Feb 13, 2008, at 10:36 AM, Dale Johannesen wrote:
Author: johannes
Date: Wed Feb 13 12:36:09 2008
New Revision: 47077
URL: http://llvm.org/viewvc/llvm-project?rev=47077view=rev
Log:
Don't omit copying of PaddingElements; this causes
wrong code when structs are identical except that
one has padding in the same place another has a
real field. Look at the right node when looking
for MODIFY under RET.
I think this makes isPaddingElement and a bunch of code in llvm-
types.cpp dead. Doesn't this also cause us to regress on PR1278?
I'm fine with temporarily saying we'll take a code pessimization for
improved correctness but we need to address this somehow, perhaps by
filing another bug.
-Chris
Modified:
llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47077r1=47076r2=47077view=diff
=
=
=
=
=
=
=
=
==
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Wed Feb 13 12:36:09 2008
@@ -1246,8 +1246,6 @@
const StructLayout *SL = getTargetData().getStructLayout(STy);
Constant *Zero = ConstantInt::get(Type::Int32Ty, 0);
for (unsigned i = 0, e = STy-getNumElements(); i != e; ++i) {
- if (isPaddingElement(STy, i))
-continue;
Constant *Idx = ConstantInt::get(Type::Int32Ty, i);
Value *Idxs[2] = { Zero, Idx };
Value *DElPtr = Builder.CreateGEP(DestLoc.Ptr, Idxs, Idxs + 2,
tmp);
@@ -1721,7 +1719,8 @@
// operand is an aggregate value, create a temporary to evaluate
it into.
MemRef DestLoc;
const Type *DestTy = ConvertType(TREE_TYPE(TREE_OPERAND(exp, 0)));
-if (!DestTy-isFirstClassType() TREE_CODE(exp) != MODIFY_EXPR)
+if (!DestTy-isFirstClassType()
+TREE_CODE(TREE_OPERAND(exp, 0)) != MODIFY_EXPR)
DestLoc = CreateTempLoc(DestTy);
Emit(TREE_OPERAND(exp, 0), DestLoc.Ptr ? DestLoc : NULL);
}
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[llvm-commits] [llvm] r47189 - /llvm/trunk/test/CodeGen/X86/coalescer-commute2.ll
Author: evancheng
Date: Fri Feb 15 17:06:21 2008
New Revision: 47189
URL: http://llvm.org/viewvc/llvm-project?rev=47189view=rev
Log:
This test is not interesting.
Removed:
llvm/trunk/test/CodeGen/X86/coalescer-commute2.ll
Removed: llvm/trunk/test/CodeGen/X86/coalescer-commute2.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/coalescer-commute2.ll?rev=47188view=auto
==
--- llvm/trunk/test/CodeGen/X86/coalescer-commute2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/coalescer-commute2.ll (removed)
@@ -1,21 +0,0 @@
-; RUN: llvm-as %s | llc -mtriple=i686-apple-darwin -mattr=+sse2
-coalescer-commute-instrs | grep movsd | count 4
-
-define i32 @main(i32 %argc, i8** %argv) nounwind {
-entry:
- br label %bb145.us.i.i
-
-bb145.us.i.i: ; preds = %bb145.us.i.i, %entry
- %seed.3.reg2mem.0.us.i.i = phi double [ 0.00e+00, %entry ], [
%tmp9.i.us.i.i, %bb145.us.i.i ] ; double [#uses=1]
- %tmp2.i13.us.i.i = mul double %seed.3.reg2mem.0.us.i.i, 1.680700e+04
; double [#uses=1]
- %tmp3.i.us.i.i = add double %tmp2.i13.us.i.i, 1.00e+00
; double [#uses=1]
- %tmp6.i15.us.i.i = call double @floor( double 0.00e+00 ) nounwind
readnone ; double [#uses=1]
- %tmp7.i16.us.i.i = mul double %tmp6.i15.us.i.i, 0xC1DFFFC0
; double [#uses=1]
- %tmp9.i.us.i.i = add double %tmp7.i16.us.i.i, %tmp3.i.us.i.i
; double [#uses=2]
- %tmp5.i12.us.i.i = mul double %tmp9.i.us.i.i, 2.00e+00
; double [#uses=1]
- %tmp6.i.us.i.i = fdiv double %tmp5.i12.us.i.i, 0x41DFFFC0
; double [#uses=1]
- %tmp8.i.us.i.i = add double %tmp6.i.us.i.i, -1.00e+00
; double [#uses=1]
- store double %tmp8.i.us.i.i, double* null, align 8
- br label %bb145.us.i.i
-}
-
-declare double @floor(double) nounwind readnone
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[llvm-commits] [llvm] r47188 - in /llvm/trunk: include/llvm/ADT/StringExtras.h lib/CodeGen/SelectionDAG/LegalizeDAG.cpp utils/TableGen/CodeGenDAGPatterns.cpp utils/TableGen/DAGISelEmitter.cpp
Author: pingbak
Date: Fri Feb 15 17:05:48 2008
New Revision: 47188
URL: http://llvm.org/viewvc/llvm-project?rev=47188view=rev
Log:
Make tblgen a little smarter about constants smaller than i32. Currently,
tblgen will complain if a sign-extended constant does not fit into a
data type smaller than i32, e.g., i16. This causes a problem when certain
hex constants are used, such as 0xff for byte masks or immediate xor
values.
tblgen will try the sign-extended value first and, if the sign extended
value would overflow, it tries to see if the unsigned value will fit.
Consequently, a software developer can now safely incant:
(XORHIr16 R16C:$rA, 0x)
which is somewhat clearer and more informative than incanting:
(XORHIr16 R16C:$rA, (i16 -1))
even if the two are bitwise equivalent.
Tblgen also outputs the 64-bit unsigned constant in the generated ISel code
when getTargetConstant() is invoked.
Modified:
llvm/trunk/include/llvm/ADT/StringExtras.h
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp
llvm/trunk/utils/TableGen/DAGISelEmitter.cpp
Modified: llvm/trunk/include/llvm/ADT/StringExtras.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/StringExtras.h?rev=47188r1=47187r2=47188view=diff
==
--- llvm/trunk/include/llvm/ADT/StringExtras.h (original)
+++ llvm/trunk/include/llvm/ADT/StringExtras.h Fri Feb 15 17:05:48 2008
@@ -85,6 +85,10 @@
return utostr(static_castuint64_t(X));
}
+static inline std::string itohexstr(int64_t X) {
+ return utohexstr(static_castuint64_t(X));
+}
+
static inline std::string ftostr(double V) {
char Buffer[200];
sprintf(Buffer, %20.6e, V);
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47188r1=47187r2=47188view=diff
==
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri Feb 15 17:05:48 2008
@@ -3852,6 +3852,13 @@
case Expand: assert(0 Shouldn't need to expand other operators here!);
case Legal:
Tmp1 = LegalizeOp(Node-getOperand(0));
+ if (TLI.getOperationAction(Node-getOpcode(), Node-getValueType(0)) ==
+ TargetLowering::Custom) {
+Tmp2 = TLI.LowerOperation(Result, DAG);
+if (Tmp2.Val) {
+ Tmp1 = Tmp2;
+}
+ }
Result = DAG.UpdateNodeOperands(Result, Tmp1);
break;
case Promote:
Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp?rev=47188r1=47187r2=47188view=diff
==
--- llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp (original)
+++ llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp Fri Feb 15 17:05:48 2008
@@ -702,10 +702,17 @@
// Make sure that the value is representable for this type.
if (Size 32) {
int Val = (II-getValue() (32-Size)) (32-Size);
-if (Val != II-getValue())
- TP.error(Sign-extended integer value ' +
itostr(II-getValue())+
- ' is out of range for type ' +
- getEnumName(getTypeNum(0)) + '!);
+if (Val != II-getValue()) {
+ // If sign-extended doesn't fit, does it fit as unsigned?
+ unsigned ValueMask = unsigned(MVT::getIntVTBitMask(VT));
+ unsigned UnsignedVal = unsigned(II-getValue());
+
+ if ((ValueMask UnsignedVal) != UnsignedVal) {
+ TP.error(Integer value ' + itostr(II-getValue())+
+' is out of range for type ' +
+getEnumName(getTypeNum(0)) + '!);
+ }
+ }
}
}
}
Modified: llvm/trunk/utils/TableGen/DAGISelEmitter.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/DAGISelEmitter.cpp?rev=47188r1=47187r2=47188view=diff
==
--- llvm/trunk/utils/TableGen/DAGISelEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/DAGISelEmitter.cpp Fri Feb 15 17:05:48 2008
@@ -730,8 +730,11 @@
const std::string VarName = N-getName();
std::string Val = VariableMap[VarName];
bool ModifiedVal = false;
- assert(!Val.empty()
- Variable referenced but not defined and not caught earlier!);
+ if (Val.empty()) {
+ cerr Variable ' VarName referenced but not defined
+ and not caught earlier!\n;
+ abort();
+ }
if (Val[0] == 'T' Val[1] == 'm' Val[2] == 'p') {
// Already selected this operand, just return the tmpval.
[llvm-commits] [llvm] r47187 - /llvm/trunk/docs/ProgrammersManual.html
Author: lattner Date: Fri Feb 15 16:57:17 2008 New Revision: 47187 URL: http://llvm.org/viewvc/llvm-project?rev=47187view=rev Log: simplify this. Modified: llvm/trunk/docs/ProgrammersManual.html Modified: llvm/trunk/docs/ProgrammersManual.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ProgrammersManual.html?rev=47187r1=47186r2=47187view=diff == --- llvm/trunk/docs/ProgrammersManual.html (original) +++ llvm/trunk/docs/ProgrammersManual.html Fri Feb 15 16:57:17 2008 @@ -1914,9 +1914,7 @@ div class=doc_code pre a href=#InstructionInstruction/a *I = .. ; -a href=#BasicBlockBasicBlock/a *BB = I-gt;getParent(); - -BB-gt;getInstList().erase(I); +I-gt;eraseFromParent(); /pre /div ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r47167 - in /llvm/trunk: include/llvm/CodeGen/LiveInterval.h include/llvm/CodeGen/LiveIntervalAnalysis.h lib/CodeGen/LiveInterval.cpp lib/CodeGen/LiveIntervalAnalysis.cpp lib
It sped up the coalescer considerably. On kimwitu++: before: 0.7527 ( 12.8%) 0.0068 ( 2.7%) 0.7596 ( 12.4%) 0.7591 ( 12.4%) Simple Register Coalescing now: 0.3062 ( 5.6%) 0.0055 ( 2.2%) 0.3117 ( 5.5%) 0.3115 ( 5.5%) Simple Register Coalescing Evan On Feb 15, 2008, at 11:19 AM, Chris Lattner wrote: On Feb 15, 2008, at 10:24 AM, Evan Cheng wrote: Author: evancheng Date: Fri Feb 15 12:24:29 2008 New Revision: 47167 URL: http://llvm.org/viewvc/llvm-project?rev=47167view=rev Log: - Removing the infamous r2rMap_ and rep() method. Now the coalescer will update register defs and uses after each successful coalescing. - Also removed a number of hacks and fixed some subtle kill information bugs. Very nice! Is there any compile-time impact of this? Does it speed up coallescing/RA at all? -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r47178 - /llvm/trunk/lib/Support/FoldingSet.cpp
Author: kremenek
Date: Fri Feb 15 15:12:46 2008
New Revision: 47178
URL: http://llvm.org/viewvc/llvm-project?rev=47178view=rev
Log:
Fixed bug in FoldingSetIteratorImpl where we did not correctly check if
we had reached the fake bucket after the last bucket, allowing the iterator
in some cases to run off the end of the hashtable.
Modified:
llvm/trunk/lib/Support/FoldingSet.cpp
Modified: llvm/trunk/lib/Support/FoldingSet.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/FoldingSet.cpp?rev=47178r1=47177r2=47178view=diff
==
--- llvm/trunk/lib/Support/FoldingSet.cpp (original)
+++ llvm/trunk/lib/Support/FoldingSet.cpp Fri Feb 15 15:12:46 2008
@@ -326,7 +326,8 @@
FoldingSetIteratorImpl::FoldingSetIteratorImpl(void **Bucket) {
// Skip to the first non-null non-self-cycle bucket.
- while (*Bucket == 0 || GetNextPtr(*Bucket) == 0)
+ while (*Bucket != reinterpret_castvoid*(-1)
+ (*Bucket == 0 || GetNextPtr(*Bucket) == 0))
++Bucket;
NodePtr = static_castFoldingSetNode*(*Bucket);
@@ -345,7 +346,8 @@
// Skip to the next non-null non-self-cycle bucket.
do {
++Bucket;
-} while (*Bucket == 0 || GetNextPtr(*Bucket) == 0);
+} while (*Bucket != reinterpret_castvoid*(-1)
+ (*Bucket == 0 || GetNextPtr(*Bucket) == 0));
NodePtr = static_castFoldingSetNode*(*Bucket);
}
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Re: [llvm-commits] [llvm] r47039 - in /llvm/trunk: include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/CellSPU/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Ta
On Feb 13, 2008, at 3:25 PM, Dan Gohman wrote: ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, Depth+1); assert((KnownZero KnownOne) == 0 Bits known to be one AND zero?); + KnownZero = KnownZero.lshr(ShAmt); + KnownOne = KnownOne.lshr(ShAmt); // Handle the sign bits. + APInt SignBit = APInt::getSignBit(BitWidth); + SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. It would be better to make an APInt with the bit in the right place instead of starting with a sign bit and shifting it. I don't see a way to do this in a single step with the current APInt API. And this doesn't seem common enough to want a specialized API call. One way to do it would be: APInt SignBit(BitWidth, 0); SignBit.set(position); It's not significantly less code, but it is more efficient :) MVT::ValueType InVT = Op.getOperand(0).getValueType(); +unsigned InBits = MVT::getSizeInBits(InVT); +APInt InMask= APInt::getLowBitsSet(BitWidth, InBits); +APInt InSignBit = APInt::getSignBit(InBits); +APInt NewBits = (~InMask) Mask; // If any of the sign extended bits are demanded, we know that the sign // bit is demanded. +InSignBit.zext(BitWidth); +if (!!(NewBits Mask)) + Mask |= InSignBit; I think this is a bug: NewBits is defined to be ... Mask. This is either a bug or this can be replaced with NewBits != 0 which doesn't seem right. It's actually right, though the code is more involved than it needs to be. I simplified this. Thanks! Incidentally, I think that this method: SDOperand SelectionDAG::getConstant(const APInt Val, MVT::ValueType VT, bool isTarget = false); Can be simplified to: SDOperand SelectionDAG::getConstant(const APInt Val, bool isTarget = false); And have it infer the MVT from the width of the APInt. We can add a new (explicit) method to handle the vector case. In the interest of keeping client code simpler, I'd prefer to avoid having a separate vector version. ok, well, the client code would be even simpler if we had two versions: one that takes an apint, and one that takes an apint + MVT. The first could forward to the second, and be used in cases where the client knows it is only dealing with scalars, which is quite often. More generally though: how many places call SelectionDAG::getConstant with a potentially vector constant? It seems a bit strange to me to have this, because the client would have to be aware that it is doing this and explicitly want it. It seems like a getVectorConstant would be more natural (and easier for the reader to understand), causing these cases to be explicitly separated. What do you think? Thanks Dan! -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r47166 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/CodeGen/TargetInstrInfoImpl.cpp
Author: evancheng
Date: Fri Feb 15 12:21:33 2008
New Revision: 47166
URL: http://llvm.org/viewvc/llvm-project?rev=47166view=rev
Log:
Added CommuteChangesDestination(). This returns true if commuting the specified
machine instr will change its definition register.
Modified:
llvm/trunk/include/llvm/Target/TargetInstrInfo.h
llvm/trunk/lib/CodeGen/TargetInstrInfoImpl.cpp
Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=47166r1=47165r2=47166view=diff
==
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Fri Feb 15 12:21:33 2008
@@ -149,6 +149,14 @@
///
virtual MachineInstr *commuteInstruction(MachineInstr *MI) const = 0;
+ /// CommuteChangesDestination - Return true if commuting the specified
+ /// instruction will also changes the destination operand. Also return the
+ /// current operand index of the would be new destination register by
+ /// reference. This can happen when the commutable instruction is also a
+ /// two-address instruction.
+ virtual bool CommuteChangesDestination(MachineInstr *MI,
+ unsigned OpIdx) const = 0;
+
/// AnalyzeBranch - Analyze the branching code at the end of MBB, returning
/// true if it cannot be understood (e.g. it's a switch dispatch or isn't
/// implemented for a target). Upon success, this returns false and returns
@@ -384,6 +392,8 @@
: TargetInstrInfo(desc, NumOpcodes) {}
public:
virtual MachineInstr *commuteInstruction(MachineInstr *MI) const;
+ virtual bool CommuteChangesDestination(MachineInstr *MI,
+ unsigned OpIdx) const;
virtual bool PredicateInstruction(MachineInstr *MI,
const std::vectorMachineOperand Pred) const;
Modified: llvm/trunk/lib/CodeGen/TargetInstrInfoImpl.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetInstrInfoImpl.cpp?rev=47166r1=47165r2=47166view=diff
==
--- llvm/trunk/lib/CodeGen/TargetInstrInfoImpl.cpp (original)
+++ llvm/trunk/lib/CodeGen/TargetInstrInfoImpl.cpp Fri Feb 15 12:21:33 2008
@@ -39,8 +39,28 @@
return MI;
}
+/// CommuteChangesDestination - Return true if commuting the specified
+/// instruction will also changes the destination operand. Also return the
+/// current operand index of the would be new destination register by
+/// reference. This can happen when the commutable instruction is also a
+/// two-address instruction.
+bool TargetInstrInfoImpl::CommuteChangesDestination(MachineInstr *MI,
+unsigned OpIdx) const{
+ assert(MI-getOperand(1).isRegister() MI-getOperand(2).isRegister()
+ This only knows how to commute register operands so far);
+ if (MI-getOperand(0).getReg() == MI-getOperand(1).getReg()) {
+// Must be two address instruction!
+assert(MI-getDesc().getOperandConstraint(0, TOI::TIED_TO)
+ Expecting a two-address instruction!);
+OpIdx = 2;
+return true;
+ }
+ return false;
+}
+
+
bool TargetInstrInfoImpl::PredicateInstruction(MachineInstr *MI,
- const
std::vectorMachineOperand Pred) const {
+const std::vectorMachineOperand Pred) const
{
bool MadeChange = false;
const TargetInstrDesc TID = MI-getDesc();
if (!TID.isPredicable())
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[llvm-commits] [llvm] r47182 - /llvm/trunk/test/C++Frontend/2008-02-13-sret.cpp
Author: johannes
Date: Fri Feb 15 16:05:15 2008
New Revision: 47182
URL: http://llvm.org/viewvc/llvm-project?rev=47182view=rev
Log:
Modify test to expect improved code.
Modified:
llvm/trunk/test/C++Frontend/2008-02-13-sret.cpp
Modified: llvm/trunk/test/C++Frontend/2008-02-13-sret.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/C%2B%2BFrontend/2008-02-13-sret.cpp?rev=47182r1=47181r2=47182view=diff
==
--- llvm/trunk/test/C++Frontend/2008-02-13-sret.cpp (original)
+++ llvm/trunk/test/C++Frontend/2008-02-13-sret.cpp Fri Feb 15 16:05:15 2008
@@ -1,9 +1,9 @@
// RUN: %llvmgxx -S -O0 -emit-llvm %s -o - | grep {retval\\|memtmp} | grep
S242 | \
-// RUN: grep {i32 1} | count 2
+// RUN: grep {i32 1} | count 1
+
+// Test that all 8 bytes of ret in check242 are copied, and only 4 bytes of
+// ret in check93 are copied (the same LLVM struct is used for both).
-// Test that all 8 bytes of ret in check242 are copied. llvm-gcc was
-// treating S242 as if it were S93, which does not need to have the
-// last 4 padding bytes copied.
typedef __builtin_va_list va_list;
typedef unsigned long size_t;
void *memset(void *, int, size_t);
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Re: [llvm-commits] [llvm-gcc-4.2] r47180 - in /llvm-gcc-4.2/trunk/gcc: llvm-convert.cpp llvm-internal.h llvm-types.cpp
On Feb 15, 2008, at 2:02 PM, Dale Johannesen wrote: Author: johannes Date: Fri Feb 15 16:02:22 2008 New Revision: 47180 URL: http://llvm.org/viewvc/llvm-project?rev=47180view=rev Log: Put back fixed version of code to avoid copying padding within structs (sometimes). Nice, thanks Dale! -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r47177 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
Hi Dan,
This is not right. You are assuming def operands must be first in the
operand list. But that's not necessary the case.
Evan
On Feb 15, 2008, at 12:59 PM, Dan Gohman wrote:
Author: djg
Date: Fri Feb 15 14:59:17 2008
New Revision: 47177
URL: http://llvm.org/viewvc/llvm-project?rev=47177view=rev
Log:
Skip over the defs and start at the uses when looking for operands
with the TIED_TO attribute.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=47177r1=47176r2=47177view=diff
=
=
=
=
=
=
=
=
==
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
(original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Fri
Feb 15 14:59:17 2008
@@ -431,7 +431,7 @@
SUnit *NewSU = NewSUnit(N);
SUnitMap[N].push_back(NewSU);
const TargetInstrDesc TID = TII-get(N-getTargetOpcode());
-for (unsigned i = 0; i != TID.getNumOperands(); ++i) {
+for (unsigned i = TID.getNumDefs(); i != TID.getNumOperands(); +
+i) {
if (TID.getOperandConstraint(i, TOI::TIED_TO) != -1) {
NewSU-isTwoAddress = true;
break;
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Re: [llvm-commits] [llvm] r47188 - in /llvm/trunk: include/llvm/ADT/StringExtras.h lib/CodeGen/SelectionDAG/LegalizeDAG.cpp utils/TableGen/CodeGenDAGPatterns.cpp utils/TableGen/DAGISelEmitter.cpp
On Feb 15, 2008, at 3:05 PM, Scott Michel wrote: Author: pingbak Date: Fri Feb 15 17:05:48 2008 New Revision: 47188 URL: http://llvm.org/viewvc/llvm-project?rev=47188view=rev Log: Make tblgen a little smarter about constants smaller than i32. Currently, tblgen will complain if a sign-extended constant does not fit into a data type smaller than i32, e.g., i16. This causes a problem when certain hex constants are used, such as 0xff for byte masks or immediate xor values. Looks good, thanks Scott. -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r47192 - in /llvm/trunk/test/Assembler: 2004-03-07-FunctionAddressAlignment.ll 2004-03-07-FunctionAddressAlignment.llx
Author: lattner
Date: Fri Feb 15 17:51:48 2008
New Revision: 47192
URL: http://llvm.org/viewvc/llvm-project?rev=47192view=rev
Log:
rename llx - ll
Added:
llvm/trunk/test/Assembler/2004-03-07-FunctionAddressAlignment.ll
- copied unchanged from r47064,
llvm/trunk/test/Assembler/2004-03-07-FunctionAddressAlignment.llx
Removed:
llvm/trunk/test/Assembler/2004-03-07-FunctionAddressAlignment.llx
Removed: llvm/trunk/test/Assembler/2004-03-07-FunctionAddressAlignment.llx
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Assembler/2004-03-07-FunctionAddressAlignment.llx?rev=47191view=auto
==
--- llvm/trunk/test/Assembler/2004-03-07-FunctionAddressAlignment.llx (original)
+++ llvm/trunk/test/Assembler/2004-03-07-FunctionAddressAlignment.llx (removed)
@@ -1,15 +0,0 @@
-; RUN: llvm-upgrade %s | llvm-as | llvm-dis | not grep cast
-; All of these should be eliminable
-
-
-int %foo() {
- ret int and (int cast (int()* %foo to int), int 1)
-}
-
-int %foo2() {
- ret int and (int 1, int cast (int()* %foo2 to int))
-}
-
-bool %foo3() {
- ret bool cast (bool()* %foo3 to bool)
-}
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[llvm-commits] [llvm] r47194 - /llvm/trunk/test/Assembler/2004-03-07-FunctionAddressAlignment.ll
Author: lattner
Date: Fri Feb 15 17:58:25 2008
New Revision: 47194
URL: http://llvm.org/viewvc/llvm-project?rev=47194view=rev
Log:
upgrade this test, which wasn't testing the right thing since llvm-upgrade came
around.
Modified:
llvm/trunk/test/Assembler/2004-03-07-FunctionAddressAlignment.ll
Modified: llvm/trunk/test/Assembler/2004-03-07-FunctionAddressAlignment.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Assembler/2004-03-07-FunctionAddressAlignment.ll?rev=47194r1=47193r2=47194view=diff
==
--- llvm/trunk/test/Assembler/2004-03-07-FunctionAddressAlignment.ll (original)
+++ llvm/trunk/test/Assembler/2004-03-07-FunctionAddressAlignment.ll Fri Feb 15
17:58:25 2008
@@ -1,15 +1,15 @@
-; RUN: llvm-upgrade %s | llvm-as | llvm-dis | not grep cast
+; RUN: llvm-as %s | llvm-dis | not grep ptrtoint
; All of these should be eliminable
-int %foo() {
- ret int and (int cast (int()* %foo to int), int 1)
+define i32 @foo() {
+ ret i32 and (i32 ptrtoint (i32()* @foo to i32), i32 1)
}
-int %foo2() {
- ret int and (int 1, int cast (int()* %foo2 to int))
+define i32 @foo2() {
+ ret i32 and (i32 1, i32 ptrtoint (i32()* @foo2 to i32))
}
-bool %foo3() {
- ret bool cast (bool()* %foo3 to bool)
+define i1 @foo3() {
+ ret i1 icmp ne (i1()* @foo3, i1()* null)
}
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Re: [llvm-commits] [llvm] r47177 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
Ok. I'm working to understand the dance between target SDNodes and
MachineInstrs and I mistook what was going on there. Can you point me
to
an example where an instruction has def operands that aren't first, not
counting ImplicitDefs defs?
Dan
On Feb 15, 2008, at 3:15 PM, Evan Cheng wrote:
Hi Dan,
This is not right. You are assuming def operands must be first in the
operand list. But that's not necessary the case.
Evan
On Feb 15, 2008, at 12:59 PM, Dan Gohman wrote:
Author: djg
Date: Fri Feb 15 14:59:17 2008
New Revision: 47177
URL: http://llvm.org/viewvc/llvm-project?rev=47177view=rev
Log:
Skip over the defs and start at the uses when looking for operands
with the TIED_TO attribute.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=47177r1=47176r2=47177view=diff
=
=
=
=
=
=
=
=
=
=
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
(original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Fri
Feb 15 14:59:17 2008
@@ -431,7 +431,7 @@
SUnit *NewSU = NewSUnit(N);
SUnitMap[N].push_back(NewSU);
const TargetInstrDesc TID = TII-get(N-getTargetOpcode());
-for (unsigned i = 0; i != TID.getNumOperands(); ++i) {
+for (unsigned i = TID.getNumDefs(); i != TID.getNumOperands(); +
+i) {
if (TID.getOperandConstraint(i, TOI::TIED_TO) != -1) {
NewSU-isTwoAddress = true;
break;
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[llvm-commits] [llvm] r47198 - in /llvm/trunk: include/llvm/CodeGen/ScheduleDAG.h lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
Author: djg
Date: Fri Feb 15 18:36:48 2008
New Revision: 47198
URL: http://llvm.org/viewvc/llvm-project?rev=47198view=rev
Log:
Rename CountMemOperands to ComputeMemOperandsEnd to reflect what
it actually does. Simplify CountOperands a little by reusing
ComputeMemOperandsEnd. And reword some comments for both.
Modified:
llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
Modified: llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h?rev=47198r1=47197r2=47198view=diff
==
--- llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h (original)
+++ llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h Fri Feb 15 18:36:48 2008
@@ -315,13 +315,14 @@
static unsigned CountResults(SDNode *Node);
/// CountOperands - The inputs to target nodes have any actual inputs
first,
-/// followed by optional memory operands chain operand, then flag operands.
-/// Compute the number of actual operands that will go into the machine
-/// instr.
+/// followed by special operands that describe memory references, then an
+/// optional chain operand, then flag operands. Compute the number of
+/// actual operands that will go into the resulting MachineInstr.
static unsigned CountOperands(SDNode *Node);
-/// CountMemOperands - Find the index of the last MemOperandSDNode
-static unsigned CountMemOperands(SDNode *Node);
+/// ComputeMemOperandsEnd - Find the index one past the last
+/// MemOperandSDNode operand
+static unsigned ComputeMemOperandsEnd(SDNode *Node);
/// EmitNode - Generate machine code for an node and needed dependencies.
/// VRBaseMap contains, for each already emitted node, the first virtual
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp?rev=47198r1=47197r2=47198view=diff
==
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Fri Feb 15 18:36:48 2008
@@ -279,22 +279,19 @@
}
/// CountOperands - The inputs to target nodes have any actual inputs first,
-/// followed by optional memory operands chain operand, then flag operands.
-/// Compute the number of actual operands that will go into the resulting
-/// MachineInstr.
+/// followed by special operands that describe memory references, then an
+/// optional chain operand, then flag operands. Compute the number of
+/// actual operands that will go into the resulting MachineInstr.
unsigned ScheduleDAG::CountOperands(SDNode *Node) {
- unsigned N = Node-getNumOperands();
- while (N Node-getOperand(N - 1).getValueType() == MVT::Flag)
---N;
- if (N Node-getOperand(N - 1).getValueType() == MVT::Other)
---N; // Ignore chain if it exists.
+ unsigned N = ComputeMemOperandsEnd(Node);
while (N isaMemOperandSDNode(Node-getOperand(N - 1).Val))
--N; // Ignore MemOperand nodes
return N;
}
-/// CountMemOperands - Find the index of the last MemOperandSDNode operand
-unsigned ScheduleDAG::CountMemOperands(SDNode *Node) {
+/// ComputeMemOperandsEnd - Find the index one past the last MemOperandSDNode
+/// operand
+unsigned ScheduleDAG::ComputeMemOperandsEnd(SDNode *Node) {
unsigned N = Node-getNumOperands();
while (N Node-getOperand(N - 1).getValueType() == MVT::Flag)
--N;
@@ -698,7 +695,7 @@
unsigned NumResults = CountResults(Node);
unsigned NodeOperands = CountOperands(Node);
-unsigned NodeMemOperands = CountMemOperands(Node);
+unsigned MemOperandsEnd = ComputeMemOperandsEnd(Node);
unsigned NumMIOperands = NodeOperands + NumResults;
bool HasPhysRegOuts = (NumResults II.getNumDefs())
II.getImplicitDefs() != 0;
@@ -722,7 +719,7 @@
AddOperand(MI, Node-getOperand(i), i+II.getNumDefs(), II, VRBaseMap);
// Emit all of the memory operands of this instruction
-for (unsigned i = NodeOperands; i != NodeMemOperands; ++i)
+for (unsigned i = NodeOperands; i != MemOperandsEnd; ++i)
AddMemOperand(MI, castMemOperandSDNode(Node-getOperand(i))-MO);
// Commute node if it has been determined to be profitable.
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[llvm-commits] [llvm] r47196 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
Author: djg
Date: Fri Feb 15 18:25:40 2008
New Revision: 47196
URL: http://llvm.org/viewvc/llvm-project?rev=47196view=rev
Log:
Revert 47177, which was incorrect.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=47196r1=47195r2=47196view=diff
==
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Fri Feb 15
18:25:40 2008
@@ -431,7 +431,7 @@
SUnit *NewSU = NewSUnit(N);
SUnitMap[N].push_back(NewSU);
const TargetInstrDesc TID = TII-get(N-getTargetOpcode());
-for (unsigned i = TID.getNumDefs(); i != TID.getNumOperands(); ++i) {
+for (unsigned i = 0; i != TID.getNumOperands(); ++i) {
if (TID.getOperandConstraint(i, TOI::TIED_TO) != -1) {
NewSU-isTwoAddress = true;
break;
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[llvm-commits] [llvm] r47204 - in /llvm/trunk: docs/ include/llvm/ include/llvm/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ lib/Target/Alpha/ lib/Target/X86/ test/CodeGen/Alpha/ test/CodeGen/X86/
Author: alenhar2 Date: Fri Feb 15 19:24:58 2008 New Revision: 47204 URL: http://llvm.org/viewvc/llvm-project?rev=47204view=rev Log: llvm.memory.barrier, and impl for x86 and alpha Added: llvm/trunk/test/CodeGen/Alpha/mb.ll llvm/trunk/test/CodeGen/Alpha/wmb.ll llvm/trunk/test/CodeGen/X86/lfence.ll llvm/trunk/test/CodeGen/X86/mfence.ll llvm/trunk/test/CodeGen/X86/nofence.ll llvm/trunk/test/CodeGen/X86/sfence.ll Modified: llvm/trunk/docs/LangRef.html llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h llvm/trunk/include/llvm/Intrinsics.td llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp llvm/trunk/lib/Target/Alpha/AlphaInstrFormats.td llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td llvm/trunk/lib/Target/TargetSelectionDAG.td llvm/trunk/lib/Target/X86/README.txt llvm/trunk/lib/Target/X86/X86InstrSSE.td Modified: llvm/trunk/docs/LangRef.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=47204r1=47203r2=47204view=diff == --- llvm/trunk/docs/LangRef.html (original) +++ llvm/trunk/docs/LangRef.html Fri Feb 15 19:24:58 2008 @@ -204,6 +204,11 @@ lia href=#int_it'ttllvm.init.trampoline/tt' Intrinsic/a/li /ol /li + lia href=#int_atomicsAtomic intrinsics/a +ol + lia href=#int_memory_barrierttllvm.memory_barrier/tt/li +/ol + /li lia href=#int_generalGeneral intrinsics/a ol lia href=#int_var_annotation @@ -5234,6 +5239,107 @@ !-- === -- div class=doc_subsection + a name=int_atomicsAtomic Operations and Synchronization Intrinsics/a +/div + +div class=doc_text +p + These intrinsic functions expand the universal IR of LLVM to represent + hardware constructs for atomic operations and memory synchronization. This + provides an interface to the hardware, not an interface to the programmer. It + is aimed at a low enough level to allow any programming models or APIs which + need atomic behaviors to map cleanly onto it. It is also modeled primarily on + hardware behavior. Just as hardware provides a universal IR for source + languages, it also provides a starting point for developing a universal + atomic operation and synchronization IR. +/p +p + These do emnot/em form an API such as high-level threading libraries, + software transaction memory systems, atomic primitives, and intrinsic + functions as found in BSD, GNU libc, atomic_ops, APR, and other system and + application libraries. The hardware interface provided by LLVM should allow + a clean implementation of all of these APIs and parallel programming models. + No one model or paradigm should be selected above others unless the hardware + itself ubiquitously does so. + +/p +/div + +!-- ___ -- +div class=doc_subsubsection + a name=int_memory_barrier'ttllvm.memory.barrier/tt' Intrinsic/a +/div +div class=doc_text +h5Syntax:/h5 +pre +declare void @llvm.memory.barrier( i1 lt;llgt;, i1 lt;lsgt;, i1 lt;slgt;, i1 lt;ssgt;, +i1 lt;devicegt; ) + +/pre +h5Overview:/h5 +p + The ttllvm.memory.barrier/tt intrinsic guarantees ordering between + specific pairs of memory access types. +/p +h5Arguments:/h5 +p + The ttllvm.memory.barrier/tt intrinsic requires five boolean arguments. + The first four arguments enables a specific barrier as listed below. The fith + argument specifies that the barrier applies to io or device or uncached memory. + +/p + ul +littll/tt: load-load barrier/li +littls/tt: load-store barrier/li +littsl/tt: store-load barrier/li +littss/tt: store-store barrier/li +littdevice/tt: barrier applies to device and uncached memory also. + /ul +h5Semantics:/h5 +p + This intrinsic causes the system to enforce some ordering constraints upon + the loads and stores of the program. This barrier does not indicate + emwhen/em any events will occur, it only enforces an emorder/em in + which they occur. For any of the specified pairs of load and store operations + (f.ex. load-load, or store-load), all of the first operations preceding the + barrier will complete before any of the second operations succeeding the + barrier begin. Specifically the semantics for each pairing is as follows: +/p + ul +littll/tt: All loads before the barrier must complete before any load +after the barrier begins./li + +littls/tt: All loads before the barrier must complete before any +store after the barrier begins./li +littss/tt: All stores before the barrier must complete before any +store after the barrier begins./li +littsl/tt: All stores before the barrier
[llvm-commits] [llvm-gcc-4.2] r47205 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Author: alenhar2
Date: Fri Feb 15 19:27:28 2008
New Revision: 47205
URL: http://llvm.org/viewvc/llvm-project?rev=47205view=rev
Log:
llvm.memory.barrier for __sync_syncronize
Modified:
llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47205r1=47204r2=47205view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Fri Feb 15 19:27:28 2008
@@ -4293,6 +4293,18 @@
return true;
}
+ case BUILT_IN_SYNCHRONIZE: {
+// We assume like gcc appears to, that this only applies to cached memory.
+Value* C[5];
+C[0] = C[1] = C[2] = C[3] = ConstantInt::get(Type::Int1Ty, 1);
+C[4] = ConstantInt::get(Type::Int1Ty, 0);
+
+Builder.CreateCall(Intrinsic::getDeclaration(TheModule,
+ Intrinsic::memory_barrier),
+ C, C + 5);
+return true;
+ }
+
#if 1 // FIXME: Should handle these GCC extensions eventually.
case BUILT_IN_APPLY_ARGS:
case BUILT_IN_APPLY:
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Re: [llvm-commits] [llvm-gcc-4.2] r47205 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
nice!
On Feb 15, 2008, at 5:27 PM, Andrew Lenharth wrote:
Author: alenhar2
Date: Fri Feb 15 19:27:28 2008
New Revision: 47205
URL: http://llvm.org/viewvc/llvm-project?rev=47205view=rev
Log:
llvm.memory.barrier for __sync_syncronize
Modified:
llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47205r1=47204r2=47205view=diff
=
=
=
=
=
=
=
=
==
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Fri Feb 15 19:27:28 2008
@@ -4293,6 +4293,18 @@
return true;
}
+ case BUILT_IN_SYNCHRONIZE: {
+// We assume like gcc appears to, that this only applies to
cached memory.
+Value* C[5];
+C[0] = C[1] = C[2] = C[3] = ConstantInt::get(Type::Int1Ty, 1);
+C[4] = ConstantInt::get(Type::Int1Ty, 0);
+
+Builder.CreateCall(Intrinsic::getDeclaration(TheModule,
+
Intrinsic::memory_barrier),
+ C, C + 5);
+return true;
+ }
+
#if 1 // FIXME: Should handle these GCC extensions eventually.
case BUILT_IN_APPLY_ARGS:
case BUILT_IN_APPLY:
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Re: [llvm-commits] [llvm] r47204 - in /llvm/trunk: docs/ include/llvm/ include/llvm/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ lib/Target/Alpha/ lib/Target/X86/ test/CodeGen/Alpha/ test/CodeGen/X8
I'll get the CBE support and pre SSE2 in this weekend. On 2/15/08, Andrew Lenharth [EMAIL PROTECTED] wrote: Author: alenhar2 Date: Fri Feb 15 19:24:58 2008 New Revision: 47204 URL: http://llvm.org/viewvc/llvm-project?rev=47204view=rev Log: llvm.memory.barrier, and impl for x86 and alpha Added: llvm/trunk/test/CodeGen/Alpha/mb.ll llvm/trunk/test/CodeGen/Alpha/wmb.ll llvm/trunk/test/CodeGen/X86/lfence.ll llvm/trunk/test/CodeGen/X86/mfence.ll llvm/trunk/test/CodeGen/X86/nofence.ll llvm/trunk/test/CodeGen/X86/sfence.ll Modified: llvm/trunk/docs/LangRef.html llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h llvm/trunk/include/llvm/Intrinsics.td llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp llvm/trunk/lib/Target/Alpha/AlphaInstrFormats.td llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td llvm/trunk/lib/Target/TargetSelectionDAG.td llvm/trunk/lib/Target/X86/README.txt llvm/trunk/lib/Target/X86/X86InstrSSE.td Modified: llvm/trunk/docs/LangRef.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=47204r1=47203r2=47204view=diff == --- llvm/trunk/docs/LangRef.html (original) +++ llvm/trunk/docs/LangRef.html Fri Feb 15 19:24:58 2008 @@ -204,6 +204,11 @@ lia href=#int_it'ttllvm.init.trampoline/tt' Intrinsic/a/li /ol /li + lia href=#int_atomicsAtomic intrinsics/a +ol + lia href=#int_memory_barrierttllvm.memory_barrier/tt/li +/ol + /li lia href=#int_generalGeneral intrinsics/a ol lia href=#int_var_annotation @@ -5234,6 +5239,107 @@ !-- === -- div class=doc_subsection + a name=int_atomicsAtomic Operations and Synchronization Intrinsics/a +/div + +div class=doc_text +p + These intrinsic functions expand the universal IR of LLVM to represent + hardware constructs for atomic operations and memory synchronization. This + provides an interface to the hardware, not an interface to the programmer. It + is aimed at a low enough level to allow any programming models or APIs which + need atomic behaviors to map cleanly onto it. It is also modeled primarily on + hardware behavior. Just as hardware provides a universal IR for source + languages, it also provides a starting point for developing a universal + atomic operation and synchronization IR. +/p +p + These do emnot/em form an API such as high-level threading libraries, + software transaction memory systems, atomic primitives, and intrinsic + functions as found in BSD, GNU libc, atomic_ops, APR, and other system and + application libraries. The hardware interface provided by LLVM should allow + a clean implementation of all of these APIs and parallel programming models. + No one model or paradigm should be selected above others unless the hardware + itself ubiquitously does so. + +/p +/div + +!-- ___ -- +div class=doc_subsubsection + a name=int_memory_barrier'ttllvm.memory.barrier/tt' Intrinsic/a +/div +div class=doc_text +h5Syntax:/h5 +pre +declare void @llvm.memory.barrier( i1 lt;llgt;, i1 lt;lsgt;, i1 lt;slgt;, i1 lt;ssgt;, +i1 lt;devicegt; ) + +/pre +h5Overview:/h5 +p + The ttllvm.memory.barrier/tt intrinsic guarantees ordering between + specific pairs of memory access types. +/p +h5Arguments:/h5 +p + The ttllvm.memory.barrier/tt intrinsic requires five boolean arguments. + The first four arguments enables a specific barrier as listed below. The fith + argument specifies that the barrier applies to io or device or uncached memory. + +/p + ul +littll/tt: load-load barrier/li +littls/tt: load-store barrier/li +littsl/tt: store-load barrier/li +littss/tt: store-store barrier/li +littdevice/tt: barrier applies to device and uncached memory also. + /ul +h5Semantics:/h5 +p + This intrinsic causes the system to enforce some ordering constraints upon + the loads and stores of the program. This barrier does not indicate + emwhen/em any events will occur, it only enforces an emorder/em in + which they occur. For any of the specified pairs of load and store operations + (f.ex. load-load, or store-load), all of the first operations preceding the + barrier will complete before any of the second operations succeeding the + barrier begin. Specifically the semantics for each pairing is as follows: +/p + ul +littll/tt: All loads before the barrier must complete before
[llvm-commits] [llvm] r47200 - /llvm/trunk/lib/CodeGen/RegisterScavenging.cpp
Author: void
Date: Fri Feb 15 19:09:25 2008
New Revision: 47200
URL: http://llvm.org/viewvc/llvm-project?rev=47200view=rev
Log:
Fix typos.
Modified:
llvm/trunk/lib/CodeGen/RegisterScavenging.cpp
Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=47200r1=47199r2=47200view=diff
==
--- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Fri Feb 15 19:09:25 2008
@@ -261,7 +261,7 @@
Candidates.reset(MO.getReg());
}
- // Find the register whose use is furtherest aaway.
+ // Find the register whose use is furthest away.
unsigned SReg = 0;
unsigned MaxDist = 0;
int Reg = Candidates.find_first();
@@ -277,7 +277,7 @@
if (ScavengedReg != 0) {
// First restore previously scavenged register.
TII-loadRegFromStackSlot(*MBB, I, ScavengedReg,
- ScavengingFrameIndex, ScavengedRC);
+ ScavengingFrameIndex, ScavengedRC);
MachineBasicBlock::iterator II = prior(I);
RegInfo-eliminateFrameIndex(II, SPAdj, this);
}
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[llvm-commits] [llvm] r47206 - /llvm/tags/Apple/llvmCore-2017/
Author: void Date: Fri Feb 15 19:48:02 2008 New Revision: 47206 URL: http://llvm.org/viewvc/llvm-project?rev=47206view=rev Log: Creating llvmCore-2017 branch Added: llvm/tags/Apple/llvmCore-2017/ - copied from r47205, llvm/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.2] r47207 - /llvm-gcc-4.2/tags/Apple/llvmgcc42-2016/
Author: void Date: Fri Feb 15 19:48:08 2008 New Revision: 47207 URL: http://llvm.org/viewvc/llvm-project?rev=47207view=rev Log: Creating llvmgcc42-2016 branch Added: llvm-gcc-4.2/tags/Apple/llvmgcc42-2016/ - copied from r47206, llvm-gcc-4.2/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r47177 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
Ignore me. :-)
While MachineInstr doesn't require all the defs to be at the start of
the operand list, it looks like TargetInstrInfo and scheduledag does.
So I suppose your change is perfectly safe / correct.
Evan
On Feb 15, 2008, at 4:32 PM, Dan Gohman wrote:
Ok. I'm working to understand the dance between target SDNodes and
MachineInstrs and I mistook what was going on there. Can you point me
to
an example where an instruction has def operands that aren't first,
not
counting ImplicitDefs defs?
Dan
On Feb 15, 2008, at 3:15 PM, Evan Cheng wrote:
Hi Dan,
This is not right. You are assuming def operands must be first in the
operand list. But that's not necessary the case.
Evan
On Feb 15, 2008, at 12:59 PM, Dan Gohman wrote:
Author: djg
Date: Fri Feb 15 14:59:17 2008
New Revision: 47177
URL: http://llvm.org/viewvc/llvm-project?rev=47177view=rev
Log:
Skip over the defs and start at the uses when looking for operands
with the TIED_TO attribute.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=47177r1=47176r2=47177view=diff
=
=
=
=
=
=
=
=
=
=
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
(original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Fri
Feb 15 14:59:17 2008
@@ -431,7 +431,7 @@
SUnit *NewSU = NewSUnit(N);
SUnitMap[N].push_back(NewSU);
const TargetInstrDesc TID = TII-get(N-getTargetOpcode());
-for (unsigned i = 0; i != TID.getNumOperands(); ++i) {
+for (unsigned i = TID.getNumDefs(); i !=
TID.getNumOperands(); +
+i) {
if (TID.getOperandConstraint(i, TOI::TIED_TO) != -1) {
NewSU-isTwoAddress = true;
break;
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Re: [llvm-commits] [llvm-gcc-4.2] r47205 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Hi Andrew,
I think this might be breaking ppc build.
/tmp/llvmgcc42.roots/llvmgcc42~obj/obj-i686-powerpc/./gcc/xgcc -B/
tmp/llvmgcc42.roots/llvmgcc42~obj/obj-i686-powerpc/./gcc/ -B/
Developer/usr/llvm-gcc-4.2/powerpc-apple-darwin9/bin/ -B/Developer/usr/
llvm-gc\
c-4.2/powerpc-apple-darwin9/lib/ -isystem /Developer/usr/llvm-gcc-4.2/
powerpc-apple-darwin9/include -isystem /Developer/usr/llvm-gcc-4.2/
powerpc-apple-darwin9/sys-include -DHAVE_CONFIG_H -I. -I/tmp/
llvmgcc42.\
roots/llvmgcc42~obj/src/libgomp -I. -I/tmp/llvmgcc42.roots/
llvmgcc42~obj/src/libgomp/config/posix -I/tmp/llvmgcc42.roots/
llvmgcc42~obj/src/libgomp -Wall -pthread -Werror -O2 -g -O2 -MT
critical.lo -MD -MP\
-MF .deps/critical.Tpo -c /tmp/llvmgcc42.roots/llvmgcc42~obj/src/
libgomp/critical.c -fno-common -DPIC -o .libs/critical.o
checking for mempcpy... Cannot yet select: 0x40c1a0c0: ch =
MemBarrier 0x40c18b70:1, 0x40c18840, 0x40c18840, 0x40c18840,
0x40c18840, 0x40c1a2c0
/tmp/llvmgcc42.roots/llvmgcc42~obj/src/libgomp/critical.c:148:
internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See URL:http://developer.apple.com/bugreporter for instructions.
I am going to temporarily disable this if that's the case. Please take
a look.
Thanks,
Evan
On Feb 15, 2008, at 5:27 PM, Andrew Lenharth wrote:
Author: alenhar2
Date: Fri Feb 15 19:27:28 2008
New Revision: 47205
URL: http://llvm.org/viewvc/llvm-project?rev=47205view=rev
Log:
llvm.memory.barrier for __sync_syncronize
Modified:
llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47205r1=47204r2=47205view=diff
=
=
=
=
=
=
=
=
==
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Fri Feb 15 19:27:28 2008
@@ -4293,6 +4293,18 @@
return true;
}
+ case BUILT_IN_SYNCHRONIZE: {
+// We assume like gcc appears to, that this only applies to
cached memory.
+Value* C[5];
+C[0] = C[1] = C[2] = C[3] = ConstantInt::get(Type::Int1Ty, 1);
+C[4] = ConstantInt::get(Type::Int1Ty, 0);
+
+Builder.CreateCall(Intrinsic::getDeclaration(TheModule,
+
Intrinsic::memory_barrier),
+ C, C + 5);
+return true;
+ }
+
#if 1 // FIXME: Should handle these GCC extensions eventually.
case BUILT_IN_APPLY_ARGS:
case BUILT_IN_APPLY:
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[llvm-commits] [llvm] r47208 - in /llvm/trunk/lib/CodeGen: SimpleRegisterCoalescing.cpp SimpleRegisterCoalescing.h
Author: evancheng
Date: Fri Feb 15 20:32:17 2008
New Revision: 47208
URL: http://llvm.org/viewvc/llvm-project?rev=47208view=rev
Log:
Refactor some code; check if commuteInstruction is able to commute the
instruction.
Modified:
llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h
Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=47208r1=47207r2=47208view=diff
==
--- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
+++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Fri Feb 15 20:32:17 2008
@@ -192,6 +192,31 @@
return true;
}
+/// HasOtherReachingDefs - Return true if there are definitions of IntB
+/// other than BValNo val# that can reach uses of AValno val# of IntA.
+bool SimpleRegisterCoalescing::HasOtherReachingDefs(LiveInterval IntA,
+LiveInterval IntB,
+VNInfo *AValNo,
+VNInfo *BValNo) {
+ for (LiveInterval::iterator AI = IntA.begin(), AE = IntA.end();
+ AI != AE; ++AI) {
+if (AI-valno != AValNo) continue;
+LiveInterval::Ranges::iterator BI =
+ std::upper_bound(IntB.ranges.begin(), IntB.ranges.end(), AI-start);
+if (BI != IntB.ranges.begin())
+ --BI;
+for (; BI != IntB.ranges.end() AI-end = BI-start; ++BI) {
+ if (BI-valno == BValNo)
+continue;
+ if (BI-start = AI-start BI-end AI-start)
+return true;
+ if (BI-start AI-start BI-start AI-end)
+return true;
+}
+ }
+ return false;
+}
+
/// RemoveCopyByCommutingDef - We found a non-trivially-coalescable copy with
IntA
/// being the source and IntB being the dest, thus this defines a value number
/// in IntB. If the source value number (in IntA) is defined by a commutable
@@ -254,27 +279,15 @@
// Make sure there are no other definitions of IntB that would reach the
// uses which the new definition can reach.
- for (LiveInterval::iterator AI = IntA.begin(), AE = IntA.end();
- AI != AE; ++AI) {
-if (AI-valno != AValNo) continue;
-LiveInterval::Ranges::iterator BI =
- std::upper_bound(IntB.ranges.begin(), IntB.ranges.end(), AI-start);
-if (BI != IntB.ranges.begin())
- --BI;
-for (; BI != IntB.ranges.end() AI-end = BI-start; ++BI) {
- if (BI-valno == BLR-valno)
-continue;
- if (BI-start = AI-start BI-end AI-start)
-return false;
- if (BI-start AI-start BI-start AI-end)
-return false;
-}
- }
+ if (HasOtherReachingDefs(IntA, IntB, AValNo, BValNo))
+return false;
// At this point we have decided that it is legal to do this
// transformation. Start by commuting the instruction.
MachineBasicBlock *MBB = DefMI-getParent();
MachineInstr *NewMI = tii_-commuteInstruction(DefMI);
+ if (!NewMI)
+return false;
if (NewMI != DefMI) {
li_-ReplaceMachineInstrInMaps(DefMI, NewMI);
MBB-insert(DefMI, NewMI);
@@ -682,7 +695,6 @@
return true;
}
-
// Otherwise, we are unable to join the intervals.
DOUT Interference!\n;
Again = true; // May be possible to coalesce later.
Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h?rev=47208r1=47207r2=47208view=diff
==
--- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h (original)
+++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h Fri Feb 15 20:32:17 2008
@@ -178,6 +178,11 @@
bool AdjustCopiesBackFrom(LiveInterval IntA, LiveInterval IntB,
MachineInstr *CopyMI);
+/// HasOtherReachingDefs - Return true if there are definitions of IntB
+/// other than BValNo val# that can reach uses of AValno val# of IntA.
+bool HasOtherReachingDefs(LiveInterval IntA, LiveInterval IntB,
+ VNInfo *AValNo, VNInfo *BValNo);
+
/// RemoveCopyByCommutingDef - We found a non-trivially-coalescable copy.
/// If the source value number is defined by a commutable instruction and
/// its other operand is coalesced to the copy dest register, see if we
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[llvm-commits] [llvm-gcc-4.2] r47209 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Author: evancheng
Date: Fri Feb 15 21:34:45 2008
New Revision: 47209
URL: http://llvm.org/viewvc/llvm-project?rev=47209view=rev
Log:
Back out 47205. It's breaking ppc build.
Modified:
llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47209r1=47208r2=47209view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Fri Feb 15 21:34:45 2008
@@ -4293,18 +4293,6 @@
return true;
}
- case BUILT_IN_SYNCHRONIZE: {
-// We assume like gcc appears to, that this only applies to cached memory.
-Value* C[5];
-C[0] = C[1] = C[2] = C[3] = ConstantInt::get(Type::Int1Ty, 1);
-C[4] = ConstantInt::get(Type::Int1Ty, 0);
-
-Builder.CreateCall(Intrinsic::getDeclaration(TheModule,
- Intrinsic::memory_barrier),
- C, C + 5);
-return true;
- }
-
#if 1 // FIXME: Should handle these GCC extensions eventually.
case BUILT_IN_APPLY_ARGS:
case BUILT_IN_APPLY:
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Re: [llvm-commits] [test-suite] r47144 - in /test-suite/trunk: DiffOutput.sh RunSafely.sh RunSafelyAndStable.sh TimeProgram.sh TimedExec.sh
On Feb 15, 2008 2:04 PM, Eric Christopher [EMAIL PROTECTED] wrote: On Feb 15, 2008, at 10:08 AM, Lauro Ramos Venancio wrote: Hi Eric, I believe this is incorrect, what you removed was the mime type of the files which is correctly application/x-sh. As far as I know, the svn handle as binary all files with mime-type application. *looks at google* I found a patch (entertainingly from some guy at apple) that does that, so I guess I'll assume that. I have no idea why svn would want that for textual applications. Don't look at meef. I think it considers text/* as text, and maybe a few small other exceptions. -eric ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm-gcc-4.2] r47205 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
On 2/15/08, Evan Cheng [EMAIL PROTECTED] wrote: Hi Andrew, I think this might be breaking ppc build. /tmp/llvmgcc42.roots/llvmgcc42~obj/obj-i686-powerpc/./gcc/xgcc -B/ tmp/llvmgcc42.roots/llvmgcc42~obj/obj-i686-powerpc/./gcc/ -B/ Developer/usr/llvm-gcc-4.2/powerpc-apple-darwin9/bin/ -B/Developer/usr/ llvm-gc\ c-4.2/powerpc-apple-darwin9/lib/ -isystem /Developer/usr/llvm-gcc-4.2/ powerpc-apple-darwin9/include -isystem /Developer/usr/llvm-gcc-4.2/ powerpc-apple-darwin9/sys-include -DHAVE_CONFIG_H -I. -I/tmp/ llvmgcc42.\ roots/llvmgcc42~obj/src/libgomp -I. -I/tmp/llvmgcc42.roots/ llvmgcc42~obj/src/libgomp/config/posix -I/tmp/llvmgcc42.roots/ llvmgcc42~obj/src/libgomp -Wall -pthread -Werror -O2 -g -O2 -MT critical.lo -MD -MP\ -MF .deps/critical.Tpo -c /tmp/llvmgcc42.roots/llvmgcc42~obj/src/ libgomp/critical.c -fno-common -DPIC -o .libs/critical.o checking for mempcpy... Cannot yet select: 0x40c1a0c0: ch = MemBarrier 0x40c18b70:1, 0x40c18840, 0x40c18840, 0x40c18840, 0x40c18840, 0x40c1a2c0 /tmp/llvmgcc42.roots/llvmgcc42~obj/src/libgomp/critical.c:148: internal compiler error: Abort trap Please submit a full bug report, with preprocessed source if appropriate. See URL:http://developer.apple.com/bugreporter for instructions. I am going to temporarily disable this if that's the case. Please take a look. Yes please do. Until ppc has support for memory.barrier, that file won't compile. The builtin was just being ignored before. I'll see about ppc support tomorrow. Andrew ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
