[Mesa-dev] [PATCH] scons: Add instrumentation component libraries to linking on llvm-3.2.
llvm-3.2svn r160587 moved createBoundsCheckingPass from
lib/Transforms/Scalar to lib/Transforms/Instrumentation.
Signed-off-by: Vinson Lee v...@freedesktop.org
---
scons/llvm.py | 3 +++
1 file changed, 3 insertions(+)
diff --git a/scons/llvm.py b/scons/llvm.py
index f87766a..2fb82f0 100644
--- a/scons/llvm.py
+++ b/scons/llvm.py
@@ -180,6 +180,9 @@ def generate(env):
components = ['engine', 'bitwriter', 'x86asmprinter']
+if llvm_version = distutils.version.LooseVersion('3.2'):
+components.append('instrumentation')
+
if llvm_version = distutils.version.LooseVersion('3.1'):
components.append('mcjit')
--
1.7.11.1
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[Mesa-dev] 761131ce4591e5f55f38d13f2c4d2194bc9cb0fd build regression with llvm 2.8
Hi guys LLVM 2.8 doesn't appear to have mcjit, so we end up with no llvm libs defined, look at the recent build failures in tinderbox.x.org. Dave. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] scons: Add instrumentation component libraries to linking on llvm-3.2.
Sounds good. Thanks Vinson.
Jose
- Original Message -
llvm-3.2svn r160587 moved createBoundsCheckingPass from
lib/Transforms/Scalar to lib/Transforms/Instrumentation.
Signed-off-by: Vinson Lee v...@freedesktop.org
---
scons/llvm.py | 3 +++
1 file changed, 3 insertions(+)
diff --git a/scons/llvm.py b/scons/llvm.py
index f87766a..2fb82f0 100644
--- a/scons/llvm.py
+++ b/scons/llvm.py
@@ -180,6 +180,9 @@ def generate(env):
components = ['engine', 'bitwriter', 'x86asmprinter']
+if llvm_version =
distutils.version.LooseVersion('3.2'):
+components.append('instrumentation')
+
if llvm_version =
distutils.version.LooseVersion('3.1'):
components.append('mcjit')
--
1.7.11.1
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Re: [Mesa-dev] 761131ce4591e5f55f38d13f2c4d2194bc9cb0fd build regression with llvm 2.8
- Original Message - Hi guys LLVM 2.8 doesn't appear to have mcjit, so we end up with no llvm libs defined, Yes, mcjit is only used/necessary from llvm-3.1 onwards, so the autoconf code should check conditiionally. BTW, I'll soon commit a change that will stop using mcjit from 3.2 onwards (as with the current LLVM 3.2 trunk, AVX is supported by the old jit, which is more stable/polished). look at the recent build failures in tinderbox.x.org. Interesting. Where can I read more about tinderbox.x.org setup? Would it be possible to add our own machines to the mix? I'm maintaining builds on a Jenkins machine internally. I'd like to provide Mesa/piglit build results for platforms we care that few other developers use (i.e., windows), but the jenkins server is also building/testing internal projects, and I don't really have the time to maintain a separate public-facing jenkins server. But the load of mainting a slave build machine for tinderbox.x.org sounds feasible. Jose ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] 761131ce4591e5f55f38d13f2c4d2194bc9cb0fd build regression with llvm 2.8
Yes, mcjit is only used/necessary from llvm-3.1 onwards, so the autoconf code should check conditiionally. BTW, I'll soon commit a change that will stop using mcjit from 3.2 onwards (as with the current LLVM 3.2 trunk, AVX is supported by the old jit, which is more stable/polished). look at the recent build failures in tinderbox.x.org. Interesting. Where can I read more about tinderbox.x.org setup? Would it be possible to add our own machines to the mix? http://www.x.org/wiki/Tinderbox has all the instructions for adding a machine, I just run the RHEL6 one in a VM on a server, doesn't take much looking after. Dave. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] 761131ce4591e5f55f38d13f2c4d2194bc9cb0fd build regression with llvm 2.8
The attached patch should fix, but I don't have a machine with old llvm now.
Jose
- Original Message -
- Original Message -
Hi guys
LLVM 2.8 doesn't appear to have mcjit, so we end up with no llvm
libs
defined,
Yes, mcjit is only used/necessary from llvm-3.1 onwards, so the
autoconf code should check conditiionally.
BTW, I'll soon commit a change that will stop using mcjit from 3.2
onwards (as with the current LLVM 3.2 trunk, AVX is supported by the
old jit, which is more stable/polished).
look at the recent build failures in tinderbox.x.org.
Interesting. Where can I read more about tinderbox.x.org setup? Would
it be possible to add our own machines to the mix?
I'm maintaining builds on a Jenkins machine internally. I'd like to
provide Mesa/piglit build results for platforms we care that few
other developers use (i.e., windows), but the jenkins server is also
building/testing internal projects, and I don't really have the time
to maintain a separate public-facing jenkins server. But the load of
mainting a slave build machine for tinderbox.x.org sounds feasible.
Jose
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diff --git a/configure.ac b/configure.ac
index 1d60957..7b88331 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1847,10 +1847,14 @@ if test x$enable_gallium_llvm = xyes; then
dnl We can't use $LLVM_VERSION because it has 'svn' stripped out,
LLVM_LIBS=-lLLVM-`$LLVM_CONFIG --version`
else
- LLVM_LIBS=`$LLVM_CONFIG --libs engine bitwriter mcjit`
+LLVM_COMPONENTS=engine bitwriter
+if $LLVM_CONFIG --components | grep -q '\mcjit\'; then
+LLVM_COMPONENTS=${LLVM_COMPONENTS} mcjit
+fi
if test x$enable_opencl = xyes; then
-LLVM_LIBS=${LLVM_LIBS} `$LLVM_CONFIG --libs ipo linker instrumentation`
+LLVM_COMPONENTS=${LLVM_COMPONENTS} ipo linker instrumentation
fi
+LLVM_LIBS=`$LLVM_CONFIG --libs ${LLVM_COMPONENTS}`
fi
LLVM_LDFLAGS=`$LLVM_CONFIG --ldflags`
LLVM_BINDIR=`$LLVM_CONFIG --bindir`
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Re: [Mesa-dev] 761131ce4591e5f55f38d13f2c4d2194bc9cb0fd build regression with llvm 2.8
- Original Message - Yes, mcjit is only used/necessary from llvm-3.1 onwards, so the autoconf code should check conditiionally. BTW, I'll soon commit a change that will stop using mcjit from 3.2 onwards (as with the current LLVM 3.2 trunk, AVX is supported by the old jit, which is more stable/polished). look at the recent build failures in tinderbox.x.org. Interesting. Where can I read more about tinderbox.x.org setup? Would it be possible to add our own machines to the mix? http://www.x.org/wiki/Tinderbox has all the instructions for adding a machine, I just run the RHEL6 one in a VM on a server, doesn't take much looking after. Thanks. At a glance, it sounds that setup jhbuild to build for native windows (as opposed to cygwin) might pose some challenges. But I'll look into it. Jose ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] 761131ce4591e5f55f38d13f2c4d2194bc9cb0fd build regression with llvm 2.8
I went ahead and pushed it. Hopefully it should fix it. Jose - Original Message - The attached patch should fix, but I don't have a machine with old llvm now. Jose - Original Message - - Original Message - Hi guys LLVM 2.8 doesn't appear to have mcjit, so we end up with no llvm libs defined, Yes, mcjit is only used/necessary from llvm-3.1 onwards, so the autoconf code should check conditiionally. BTW, I'll soon commit a change that will stop using mcjit from 3.2 onwards (as with the current LLVM 3.2 trunk, AVX is supported by the old jit, which is more stable/polished). look at the recent build failures in tinderbox.x.org. Interesting. Where can I read more about tinderbox.x.org setup? Would it be possible to add our own machines to the mix? I'm maintaining builds on a Jenkins machine internally. I'd like to provide Mesa/piglit build results for platforms we care that few other developers use (i.e., windows), but the jenkins server is also building/testing internal projects, and I don't really have the time to maintain a separate public-facing jenkins server. But the load of mainting a slave build machine for tinderbox.x.org sounds feasible. Jose ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 2/2] glxgears: Add support for multisample visuals
On Fri, Jul 20, 2012 at 6:29 PM, Chad Versace chad.vers...@linux.intel.com wrote: Add a command line parameter, `-sample N`, which selects a visual with at least N samples. For the series, Reviewed-by: Brian Paul bri...@vmware.com ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] mesa: fix format checking when doing a multisample resolve
Check the internal format instead of gl_format. Sometimes a driver may
allocate two textures of formats e.g. RGBA and ARGB
from internalformat GL_RGBA8, and doing a resolve between those 2 GL_RGBA8
formats results in a GL error.
Technically speaking, a user getting the error has done nothing wrong and
the error is seemingly unfixable from the user standpoint. If a driver
allocates non-matching formats internally, it should be able to cope
with that.
---
src/mesa/main/fbobject.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index 4370c72..d89cd4f 100644
--- a/src/mesa/main/fbobject.c
+++ b/src/mesa/main/fbobject.c
@@ -2798,7 +2798,7 @@ _mesa_BlitFramebufferEXT(GLint srcX0, GLint srcY0, GLint
srcX1, GLint srcY1,
/* color formats must match */
if (colorReadRb
colorDrawRb
- colorReadRb-Format != colorDrawRb-Format) {
+ colorReadRb-InternalFormat != colorDrawRb-InternalFormat) {
_mesa_error(ctx, GL_INVALID_OPERATION,
glBlitFramebufferEXT(bad src/dst multisample pixel formats));
return;
--
1.7.9.5
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[Mesa-dev] [PATCH] imports.h: Correct ceilf typo.
---
src/mesa/main/imports.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/mesa/main/imports.h b/src/mesa/main/imports.h
index 0fc8f55..73913b5 100644
--- a/src/mesa/main/imports.h
+++ b/src/mesa/main/imports.h
@@ -119,7 +119,7 @@ typedef union { GLfloat f; GLint i; } fi_type;
#define asinf(f) ((float) asin(f))
#define atan2f(x,y) ((float) atan2(x,y))
#define atanf(f) ((float) atan(f))
-#define cielf(f) ((float) ciel(f))
+#define ceilf(f) ((float) ceil(f))
#define cosf(f) ((float) cos(f))
#define coshf(f) ((float) cosh(f))
#define expf(f) ((float) exp(f))
--
1.7.8.6
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Re: [Mesa-dev] [PATCH] imports.h: Correct ceilf typo.
On Sat, Jul 21, 2012 at 10:07 AM, Matt Turner matts...@gmail.com wrote:
---
src/mesa/main/imports.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/mesa/main/imports.h b/src/mesa/main/imports.h
index 0fc8f55..73913b5 100644
--- a/src/mesa/main/imports.h
+++ b/src/mesa/main/imports.h
@@ -119,7 +119,7 @@ typedef union { GLfloat f; GLint i; } fi_type;
#define asinf(f) ((float) asin(f))
#define atan2f(x,y) ((float) atan2(x,y))
#define atanf(f) ((float) atan(f))
-#define cielf(f) ((float) ciel(f))
+#define ceilf(f) ((float) ceil(f))
#define cosf(f) ((float) cos(f))
#define coshf(f) ((float) cosh(f))
#define expf(f) ((float) exp(f))
Reviewed-by: Brian Paul bri...@vmware.com
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[Mesa-dev] [Bug 52346] New: libxcb version not specified (correctly) in dependency check
https://bugs.freedesktop.org/show_bug.cgi?id=52346 Bug #: 52346 Summary: libxcb version not specified (correctly) in dependency check Classification: Unclassified Product: Mesa Version: git Platform: Other OS/Version: All Status: NEW Severity: normal Priority: medium Component: Other AssignedTo: mesa-dev@lists.freedesktop.org ReportedBy: dar...@chaosreigns.com With libxcb1 v1.7, mesa fails to build with: make[3]: Entering directory `/home/darxus/source.test.master/mesa/src/glx' create_context.c:103:7: error: implicit declaration of function 'xcb_glx_create_context_attribs_arb_checked' [-Werror=implicit-function-declaration] With xcb rebuilt from git, it builds. There are rumours that it depends on xcb v1.8.1. 12:21PM tilman Darxus: http://e8903aeff8f0df94.paste.se/ does that patch fix the problem? 12:23PM mattst88 weird. we have PKG_CHECK_MODULES([XCB],[x11-xcb xcb-glx = 1.8.1]) a few lines below. 12:23PM mattst88 oh, that's in the else case 12:26PM mattst88 so, that whole if/else block just allows people to compile Mesa without having the X pkgconfig files? 12:27PM mattst88 if I'm reading that right, that seems really silly. The patch tillman mentioned is, in configure.ac: -dri_modules=x11 xext xdamage xfixes x11-xcb xcb-glx +dri_modules=x11 xext xdamage xfixes x11-xcb xcb-glx = 1.8.1 This is a new build failure that showed up in the last week on Ubuntu Oneric. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 48338] Building OpenGL ES 1 and 2 with make -j fails with fresh repo
https://bugs.freedesktop.org/show_bug.cgi?id=48338 Alexandre Demers alexandre.f.dem...@gmail.com changed: What|Removed |Added Status|NEW |RESOLVED Resolution||FIXED --- Comment #2 from Alexandre Demers alexandre.f.dem...@gmail.com 2012-07-21 20:09:43 UTC --- Closing: tested and I can't reproduce anymore with git. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 52347] New: mklib: Error: no object files specified for d3d1x state tracker
https://bugs.freedesktop.org/show_bug.cgi?id=52347 Bug #: 52347 Summary: mklib: Error: no object files specified for d3d1x state tracker Classification: Unclassified Product: Mesa Version: git Platform: Other OS/Version: All Status: NEW Severity: normal Priority: medium Component: Other AssignedTo: mesa-dev@lists.freedesktop.org ReportedBy: alexandre.f.dem...@gmail.com When trying to reproduce another bug, I encountered the following error about d3d1x state tracker: Making all in state_trackers make[3]: Entering directory `/home/dema1701/projects/display/mesa/src/gallium/state_trackers' make[4]: Entering directory `/home/dema1701/projects/display/mesa/src/gallium/state_trackers/d3d1x' make[5]: Entering directory `/home/dema1701/projects/display/mesa/src/gallium/state_trackers/d3d1x/d3dapi' /bin/sh ../../../../../bin/mklib -o -static mklib: Error: no object files specified (-h for help) make[5]: *** [lib.a] Error 1 make[5]: Leaving directory `/home/dema1701/projects/display/mesa/src/gallium/state_trackers/d3d1x/d3dapi' make[4]: *** [all] Error 2 make[4]: Leaving directory `/home/dema1701/projects/display/mesa/src/gallium/state_trackers/d3d1x' make[3]: *** [subdirs] Error 1 make[3]: Leaving directory `/home/dema1701/projects/display/mesa/src/gallium/state_trackers' make[2]: *** [all-recursive] Error 1 make[2]: Leaving directory `/home/dema1701/projects/display/mesa/src/gallium' make[1]: *** [all-recursive] Error 1 make[1]: Leaving directory `/home/dema1701/projects/display/mesa/src' make: *** [all-recursive] Error 1 As you can see, there is no output file name specified after the -o option. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] mesa: fix format checking when doing a multisample resolve
v2: make it more bullet-proof
---
src/mesa/main/fbobject.c | 112 +-
1 file changed, 111 insertions(+), 1 deletion(-)
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index 4370c72..ca43f81 100644
--- a/src/mesa/main/fbobject.c
+++ b/src/mesa/main/fbobject.c
@@ -2633,6 +2633,116 @@ compatible_color_datatypes(gl_format srcFormat,
gl_format dstFormat)
/**
+ * Return the equivalent non-generic internal format.
+ * This is useful for comparing whether two internal formats are semantically
+ * equivalent.
+ */
+static GLenum
+get_nongeneric_internalformat(GLenum format)
+{
+ switch (format) {
+ /* GL 1.1 formats. */
+ case 4:
+ case GL_RGBA:
+ return GL_RGBA8;
+
+ case 3:
+ case GL_RGB:
+ return GL_RGB8;
+
+ case 2:
+ case GL_LUMINANCE_ALPHA:
+ return GL_LUMINANCE8_ALPHA8;
+
+ case 1:
+ case GL_LUMINANCE:
+ return GL_LUMINANCE8;
+
+ case GL_ALPHA:
+ return GL_ALPHA8;
+
+ case GL_INTENSITY:
+ return GL_INTENSITY8;
+
+ /* GL_ARB_texture_rg */
+ case GL_RED:
+ return GL_R8;
+
+ case GL_RG:
+ return GL_RG8;
+
+ /* GL_EXT_texture_sRGB */
+ case GL_SRGB:
+ return GL_SRGB8;
+
+ case GL_SRGB_ALPHA:
+ return GL_SRGB8_ALPHA8;
+
+ case GL_SLUMINANCE:
+ return GL_SLUMINANCE8;
+
+ case GL_SLUMINANCE_ALPHA:
+ return GL_SLUMINANCE8_ALPHA8;
+
+ /* GL_EXT_texture_snorm */
+ case GL_RGBA_SNORM:
+ return GL_RGBA8_SNORM;
+
+ case GL_RGB_SNORM:
+ return GL_RGB8_SNORM;
+
+ case GL_RG_SNORM:
+ return GL_RG8_SNORM;
+
+ case GL_RED_SNORM:
+ return GL_R8_SNORM;
+
+ case GL_LUMINANCE_ALPHA_SNORM:
+ return GL_LUMINANCE8_ALPHA8_SNORM;
+
+ case GL_LUMINANCE_SNORM:
+ return GL_LUMINANCE8_SNORM;
+
+ case GL_ALPHA_SNORM:
+ return GL_ALPHA8_SNORM;
+
+ case GL_INTENSITY_SNORM:
+ return GL_INTENSITY8_SNORM;
+
+ default:
+ return format;
+ }
+}
+
+
+static GLboolean
+compatible_resolve_formats(const struct gl_renderbuffer *colorReadRb,
+ const struct gl_renderbuffer *colorDrawRb)
+{
+ /* The simple case where we know the backing formats are the same.
+*/
+ if (colorReadRb-Format == colorDrawRb-Format) {
+ return GL_TRUE;
+ }
+
+ /* The Mesa formats are different, so we must check whether the internal
+* formats are compatible.
+*
+* Under some circumstances, the user may request e.g. two GL_RGBA8
+* textures and get two entirely different Mesa formats like RGBA and
+* ARGB. Drivers behaving like that should be able to cope with
+* non-matching formats by themselves, because it's not the user's fault.
+*/
+ if (get_nongeneric_internalformat(colorReadRb-InternalFormat) ==
+ get_nongeneric_internalformat(colorDrawRb-InternalFormat)) {
+ return GL_TRUE;
+ }
+
+ return GL_FALSE;
+}
+
+
+/**
* Blit rectangular region, optionally from one framebuffer to another.
*
* Note, if the src buffer is multisampled and the dest is not, this is
@@ -2798,7 +2908,7 @@ _mesa_BlitFramebufferEXT(GLint srcX0, GLint srcY0, GLint
srcX1, GLint srcY1,
/* color formats must match */
if (colorReadRb
colorDrawRb
- colorReadRb-Format != colorDrawRb-Format) {
+ !compatible_resolve_formats(colorReadRb, colorDrawRb)) {
_mesa_error(ctx, GL_INVALID_OPERATION,
glBlitFramebufferEXT(bad src/dst multisample pixel formats));
return;
--
1.7.9.5
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Re: [Mesa-dev] [PATCH] automake: add ARCH_FLAGS, OPT_FLAGS, PIC_FLAGS into AM_CFLAGS and AM_CXXFLAGS
Marek Olšák mar...@gmail.com writes: This fixes a build system regression after Makefile conversions to automake. I need only OPT_FLAGS to set -fno-omit-frame-pointer. ARCH_FLAGS is for --enable-32-bit. I am not sure what PIC_FLAGS is good for, but r600g uses it. VISIBILITY_CFLAGS might be missing too. Seems like we should be stuffing a bunch of these things in DEFINES or something else more global. pgpearxMEGuRA.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] automake: add ARCH_FLAGS, OPT_FLAGS, PIC_FLAGS into AM_CFLAGS and AM_CXXFLAGS
On Sat, Jul 21, 2012 at 9:40 PM, Eric Anholt e...@anholt.net wrote: Marek Olšák mar...@gmail.com writes: This fixes a build system regression after Makefile conversions to automake. I need only OPT_FLAGS to set -fno-omit-frame-pointer. ARCH_FLAGS is for --enable-32-bit. I am not sure what PIC_FLAGS is good for, but r600g uses it. VISIBILITY_CFLAGS might be missing too. Seems like we should be stuffing a bunch of these things in DEFINES or something else more global. I get your idea, but I am not sure what to change and where. Build-system hacking is not my specialty. Marek ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] st/mesa: set the correct window renderbuffer internal format
The multisample-resolve blit relies on this being correct. --- src/mesa/state_tracker/st_cb_fbo.c | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/src/mesa/state_tracker/st_cb_fbo.c b/src/mesa/state_tracker/st_cb_fbo.c index e1818ab..7eef5c6 100644 --- a/src/mesa/state_tracker/st_cb_fbo.c +++ b/src/mesa/state_tracker/st_cb_fbo.c @@ -291,13 +291,21 @@ st_new_renderbuffer_fb(enum pipe_format format, int samples, boolean sw) case PIPE_FORMAT_R8G8B8A8_UNORM: case PIPE_FORMAT_B8G8R8A8_UNORM: case PIPE_FORMAT_A8R8G8B8_UNORM: + strb-Base.InternalFormat = GL_RGBA8; + break; case PIPE_FORMAT_R8G8B8X8_UNORM: case PIPE_FORMAT_B8G8R8X8_UNORM: case PIPE_FORMAT_X8R8G8B8_UNORM: + strb-Base.InternalFormat = GL_RGB8; + break; case PIPE_FORMAT_B5G5R5A1_UNORM: + strb-Base.InternalFormat = GL_RGB5_A1; + break; case PIPE_FORMAT_B4G4R4A4_UNORM: + strb-Base.InternalFormat = GL_RGBA4; + break; case PIPE_FORMAT_B5G6R5_UNORM: - strb-Base.InternalFormat = GL_RGBA; + strb-Base.InternalFormat = GL_RGB565; break; case PIPE_FORMAT_Z16_UNORM: strb-Base.InternalFormat = GL_DEPTH_COMPONENT16; -- 1.7.9.5 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 00/15] i965: Enable window system multisampling
No Piglit regressions on Ivybridge. Tested with `glxgears -samples 1`. Passes 53/70 of oglconform's winsys multisample tests. The failing tests mostly consist of those that call glDrawPixels on the depth and stencil buffer (which fail due to a swrast fallback) or do fancy things with the msaa alpha enums (which also fail with non-winsys msaa). We probably need to write some Piglit tests for some winsys msaa corner cases, but I think the series is good enough to push now based on the evidence of oglconform's pass rate. Chad Versace (15): intel: Remove dead code in intelAllocateBuffer intel: Decrease nesting level in intelCreateBuffer intel: Use consistent pattern in intelCreateBuffer intel: Refactor quantize_num_samples intel: Set num samples for winsys renderbuffers intel: Add intel_mipmap_tree::singlesample_mt intel: Refactor creation of hiz and mcs miptrees intel: Allocate miptree for multisample DRI2 buffers i965: Add function intel_miptree_downsample i965: Mark winsys MSAA color buffer as needing resolve postdraw intel: Downsample during glReadPixels intel: Downsample on DRI2 flush intel: Refactor creation of DRI2 configs intel: Refactor intel_screen_make_configs intel: Advertise multisample DRI2 configs on gen = 6 src/mesa/drivers/dri/i965/Makefile.sources | 1 + src/mesa/drivers/dri/i965/brw_blorp_orphans.cpp | 66 +++ src/mesa/drivers/dri/i965/brw_draw.c| 17 +- src/mesa/drivers/dri/intel/intel_context.c | 26 +- src/mesa/drivers/dri/intel/intel_fbo.c | 58 +-- src/mesa/drivers/dri/intel/intel_fbo.h | 8 +- src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 82 src/mesa/drivers/dri/intel/intel_mipmap_tree.h | 39 ++ src/mesa/drivers/dri/intel/intel_screen.c | 540 +--- src/mesa/drivers/dri/intel/intel_screen.h | 3 + 10 files changed, 536 insertions(+), 304 deletions(-) create mode 100644 src/mesa/drivers/dri/i965/brw_blorp_orphans.cpp -- 1.7.11.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 01/15] intel: Remove dead code in intelAllocateBuffer
After commit intel: Convert to using private depth/stencil buffers, we
request from DRI2GetBuffersWithFormat only the front left and back left
buffers. We no longer request depth and stencil buffers.
Assert that in intelAllocateBuffer and remove the related dead code.
CC: Eric Anholt e...@anholt.net
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_screen.c | 92 +++
1 file changed, 7 insertions(+), 85 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index 81953ce..2d46d67 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -972,54 +972,6 @@ struct intel_buffer {
struct intel_region *region;
};
-/**
- * \brief Get tiling format for a DRI buffer.
- *
- * \param attachment is the buffer's attachmet point, such as
- *__DRI_BUFFER_DEPTH.
- * \param out_tiling is the returned tiling format for buffer.
- * \return false if attachment is unrecognized or is incompatible with screen.
- */
-static bool
-intel_get_dri_buffer_tiling(struct intel_screen *screen,
-uint32_t attachment,
-uint32_t *out_tiling)
-{
- if (screen-gen 4) {
- *out_tiling = I915_TILING_X;
- return true;
- }
-
- switch (attachment) {
- case __DRI_BUFFER_DEPTH:
- case __DRI_BUFFER_DEPTH_STENCIL:
- case __DRI_BUFFER_HIZ:
- *out_tiling = I915_TILING_Y;
- return true;
- case __DRI_BUFFER_ACCUM:
- case __DRI_BUFFER_FRONT_LEFT:
- case __DRI_BUFFER_FRONT_RIGHT:
- case __DRI_BUFFER_BACK_LEFT:
- case __DRI_BUFFER_BACK_RIGHT:
- case __DRI_BUFFER_FAKE_FRONT_LEFT:
- case __DRI_BUFFER_FAKE_FRONT_RIGHT:
- *out_tiling = I915_TILING_X;
- return true;
- case __DRI_BUFFER_STENCIL:
- /* The stencil buffer is W tiled. However, we request from the kernel
- * a non-tiled buffer because the GTT is incapable of W fencing.
- */
- *out_tiling = I915_TILING_NONE;
- return true;
- default:
- if(unlikely(INTEL_DEBUG DEBUG_DRI)) {
-fprintf(stderr, error: %s: unrecognized DRI buffer attachment 0x%x\n,
-__FUNCTION__, attachment);
- }
- return false;
- }
-}
-
static __DRIbuffer *
intelAllocateBuffer(__DRIscreen *screen,
unsigned attachment, unsigned format,
@@ -1028,49 +980,19 @@ intelAllocateBuffer(__DRIscreen *screen,
struct intel_buffer *intelBuffer;
struct intel_screen *intelScreen = screen-driverPrivate;
- uint32_t tiling;
- uint32_t region_width;
- uint32_t region_height;
- uint32_t region_cpp;
-
- bool ok = true;
-
- ok = intel_get_dri_buffer_tiling(intelScreen, attachment, tiling);
- if (!ok)
- return NULL;
+ assert(attachment == __DRI_BUFFER_FRONT_LEFT ||
+ attachment == __DRI_BUFFER_BACK_LEFT);
intelBuffer = CALLOC(sizeof *intelBuffer);
if (intelBuffer == NULL)
return NULL;
- if (attachment == __DRI_BUFFER_STENCIL) {
- /* Stencil buffers use W tiling, a tiling format that the DRM functions
- * don't properly account for. Therefore, when we allocate a stencil
- * buffer that is private to Mesa (see intel_miptree_create), we round
- * the height and width up to the next multiple of the tile size (64x64)
- * and then ask DRM to allocate an untiled buffer. Consequently, the
- * height and the width stored in the stencil buffer's region structure
- * are always multiples of 64, even if the stencil buffer itself is
- * smaller.
- *
- * To avoid inconsistencies between how we represent private buffers and
- * buffers shared with the window system, round up the height and width
- * for window system buffers too.
- */
- region_width = ALIGN(width, 64);
- region_height = ALIGN(height, 64);
- } else {
- region_width = width;
- region_height = height;
- }
-
- region_cpp = format / 8;
-
+ /* The front and back buffers are color buffers, which are X tiled. */
intelBuffer-region = intel_region_alloc(intelScreen,
-tiling,
-region_cpp,
-region_width,
-region_height,
+I915_TILING_X,
+format / 8,
+width,
+height,
true);
if (intelBuffer-region == NULL) {
--
1.7.11.2
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[Mesa-dev] [PATCH 02/15] intel: Decrease nesting level in intelCreateBuffer
Nearly the whole function body was contained in the 'else' branch. The
'if' branch did one thing: return early with an error. Clean things up by
moving all the code out of the 'else' branch. Decreases max nesting level
from 4 to 3.
CC: Eric Anholt e...@anholt.net
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_screen.c | 129 +++---
1 file changed, 63 insertions(+), 66 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index 2d46d67..7839804 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -549,83 +549,80 @@ intelCreateBuffer(__DRIscreen * driScrnPriv,
{
struct intel_renderbuffer *rb;
struct intel_screen *screen = (struct intel_screen*)
driScrnPriv-driverPrivate;
+ gl_format rgbFormat;
+ struct gl_framebuffer *fb;
- if (isPixmap) {
- return false; /* not implemented */
- }
- else {
- gl_format rgbFormat;
+ if (isPixmap)
+ return false;
- struct gl_framebuffer *fb = CALLOC_STRUCT(gl_framebuffer);
+ fb = CALLOC_STRUCT(gl_framebuffer);
+ if (!fb)
+ return false;
- if (!fb)
-return false;
+ _mesa_initialize_window_framebuffer(fb, mesaVis);
- _mesa_initialize_window_framebuffer(fb, mesaVis);
+ if (mesaVis-redBits == 5)
+ rgbFormat = MESA_FORMAT_RGB565;
+ else if (mesaVis-alphaBits == 0)
+ rgbFormat = MESA_FORMAT_XRGB;
+ else
+ rgbFormat = MESA_FORMAT_ARGB;
- if (mesaVis-redBits == 5)
-rgbFormat = MESA_FORMAT_RGB565;
- else if (mesaVis-alphaBits == 0)
-rgbFormat = MESA_FORMAT_XRGB;
- else
-rgbFormat = MESA_FORMAT_ARGB;
+ /* setup the hardware-based renderbuffers */
+ rb = intel_create_renderbuffer(rgbFormat);
+ _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, rb-Base.Base);
- /* setup the hardware-based renderbuffers */
+ if (mesaVis-doubleBufferMode) {
rb = intel_create_renderbuffer(rgbFormat);
- _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, rb-Base.Base);
-
- if (mesaVis-doubleBufferMode) {
-rb = intel_create_renderbuffer(rgbFormat);
- _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, rb-Base.Base);
- }
+ _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, rb-Base.Base);
+ }
- /*
- * Assert here that the gl_config has an expected depth/stencil bit
- * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
- * which constructs the advertised configs.)
- */
- if (mesaVis-depthBits == 24) {
-assert(mesaVis-stencilBits == 8);
-
-if (screen-hw_has_separate_stencil) {
- rb = intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24);
- _mesa_add_renderbuffer(fb, BUFFER_DEPTH, rb-Base.Base);
- rb = intel_create_private_renderbuffer(MESA_FORMAT_S8);
- _mesa_add_renderbuffer(fb, BUFFER_STENCIL, rb-Base.Base);
-} else {
- /*
-* Use combined depth/stencil. Note that the renderbuffer is
-* attached to two attachment points.
-*/
-rb = intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24);
- _mesa_add_renderbuffer(fb, BUFFER_DEPTH, rb-Base.Base);
- _mesa_add_renderbuffer(fb, BUFFER_STENCIL, rb-Base.Base);
-}
- }
- else if (mesaVis-depthBits == 16) {
-assert(mesaVis-stencilBits == 0);
- /* just 16-bit depth buffer, no hw stencil */
- struct intel_renderbuffer *depthRb
- = intel_create_private_renderbuffer(MESA_FORMAT_Z16);
- _mesa_add_renderbuffer(fb, BUFFER_DEPTH, depthRb-Base.Base);
- }
- else {
-assert(mesaVis-depthBits == 0);
-assert(mesaVis-stencilBits == 0);
+ /*
+* Assert here that the gl_config has an expected depth/stencil bit
+* combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
+* which constructs the advertised configs.)
+*/
+ if (mesaVis-depthBits == 24) {
+ assert(mesaVis-stencilBits == 8);
+
+ if (screen-hw_has_separate_stencil) {
+ rb = intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24);
+ _mesa_add_renderbuffer(fb, BUFFER_DEPTH, rb-Base.Base);
+ rb = intel_create_private_renderbuffer(MESA_FORMAT_S8);
+ _mesa_add_renderbuffer(fb, BUFFER_STENCIL, rb-Base.Base);
+ } else {
+ /*
+ * Use combined depth/stencil. Note that the renderbuffer is
+ * attached to two attachment points.
+ */
+ rb = intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24);
+ _mesa_add_renderbuffer(fb, BUFFER_DEPTH, rb-Base.Base);
+ _mesa_add_renderbuffer(fb, BUFFER_STENCIL, rb-Base.Base);
}
+ }
+ else if (mesaVis-depthBits == 16) {
+ assert(mesaVis-stencilBits == 0);
+ /* just 16-bit depth buffer, no hw stencil */
[Mesa-dev] [PATCH 03/15] intel: Use consistent pattern in intelCreateBuffer
The 16-bit depth case did not follow the function's prevalent pattern.
CC: Eric Anholt e...@anholt.net
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_screen.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index 7839804..e319b6e 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -602,10 +602,8 @@ intelCreateBuffer(__DRIscreen * driScrnPriv,
}
else if (mesaVis-depthBits == 16) {
assert(mesaVis-stencilBits == 0);
- /* just 16-bit depth buffer, no hw stencil */
- struct intel_renderbuffer *depthRb
- = intel_create_private_renderbuffer(MESA_FORMAT_Z16);
- _mesa_add_renderbuffer(fb, BUFFER_DEPTH, depthRb-Base.Base);
+ rb = intel_create_private_renderbuffer(MESA_FORMAT_Z16);
+ _mesa_add_renderbuffer(fb, BUFFER_DEPTH, rb-Base.Base);
}
else {
assert(mesaVis-depthBits == 0);
--
1.7.11.2
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[Mesa-dev] [PATCH 04/15] intel: Refactor quantize_num_samples
Rename quantize_num_samples to intel_quantize_num_samples and change the
first param from struct intel_context* to struct intel_screen*. The
function will later be used by intelCreateBuffer, which is not bound to
any context but is bound to a screen. Since the function now depends on
the screen, move it to intel_screen.[ch].
CC: Paul Berry stereotype...@gmail.com
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c| 31 ++-
src/mesa/drivers/dri/intel/intel_screen.c | 27 +++
src/mesa/drivers/dri/intel/intel_screen.h | 3 +++
3 files changed, 32 insertions(+), 29 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c
b/src/mesa/drivers/dri/intel/intel_fbo.c
index db4fb3b..eb95014 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -178,34 +178,6 @@ intel_unmap_renderbuffer(struct gl_context *ctx,
intel_miptree_unmap(intel, irb-mt, irb-mt_level, irb-mt_layer);
}
-
-/**
- * Round up the requested multisample count to the next supported sample size.
- */
-static unsigned
-quantize_num_samples(struct intel_context *intel, unsigned num_samples)
-{
- switch (intel-gen) {
- case 6:
- /* Gen6 supports only 4x multisampling. */
- if (num_samples 0)
- return 4;
- else
- return 0;
- case 7:
- /* TODO: Gen7 supports only 4x multisampling at the moment. */
- if (num_samples 0)
- return 4;
- else
- return 0;
- return 0;
- default:
- /* MSAA unsupported */
- return 0;
- }
-}
-
-
/**
* Called via glRenderbufferStorageEXT() to set the format and allocate
* storage for a user-created renderbuffer.
@@ -216,8 +188,9 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx,
struct gl_renderbuffer
GLuint width, GLuint height)
{
struct intel_context *intel = intel_context(ctx);
+ struct intel_screen *screen = intel-intelScreen;
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
- rb-NumSamples = quantize_num_samples(intel, rb-NumSamples);
+ rb-NumSamples = intel_quantize_num_samples(screen, rb-NumSamples);
switch (internalFormat) {
default:
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index e319b6e..9a93ac2 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -109,6 +109,33 @@ const GLuint __driNConfigOptions = 15;
static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
#endif /*USE_NEW_INTERFACE */
+
+/**
+ * Round up the requested multisample count to the next supported sample size.
+ */
+unsigned
+intel_quantize_num_samples(struct intel_screen *intel, unsigned num_samples)
+{
+ switch (intel-gen) {
+ case 6:
+ /* Gen6 supports only 4x multisampling. */
+ if (num_samples 0)
+ return 4;
+ else
+ return 0;
+ case 7:
+ /* TODO: Gen7 supports only 4x multisampling at the moment. */
+ if (num_samples 0)
+ return 4;
+ else
+ return 0;
+ return 0;
+ default:
+ /* MSAA unsupported */
+ return 0;
+ }
+}
+
void
aub_dump_bmp(struct gl_context *ctx)
{
diff --git a/src/mesa/drivers/dri/intel/intel_screen.h
b/src/mesa/drivers/dri/intel/intel_screen.h
index c0cc284..a30ed7d 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.h
+++ b/src/mesa/drivers/dri/intel/intel_screen.h
@@ -83,4 +83,7 @@ intelMakeCurrent(__DRIcontext * driContextPriv,
void aub_dump_bmp(struct gl_context *ctx);
+unsigned
+intel_quantize_num_samples(struct intel_screen *intel, unsigned num_samples);
+
#endif
--
1.7.11.2
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[Mesa-dev] [PATCH 05/15] intel: Set num samples for winsys renderbuffers
Add a new param, num_samples, to intel_create_renderbuffer and
intel_create_private_renderbuffer. The caller, intelCreateBuffer, passes
in the value of gl_config::NumSamples.
No multisample GL config is yet advertised, so the value of num_samples is
currently 0.
For server-owned winsys buffers, gl_renderbuffer::NumSamples is not yet
used.
CC: Eric Anholt e...@anholt.net
CC: Paul Berry stereotype...@gmail.com
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c| 11 ---
src/mesa/drivers/dri/intel/intel_fbo.h| 8 ++--
src/mesa/drivers/dri/intel/intel_screen.c | 17 +++--
3 files changed, 25 insertions(+), 11 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c
b/src/mesa/drivers/dri/intel/intel_fbo.c
index eb95014..a410df6 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -361,7 +361,9 @@ intel_nop_alloc_storage(struct gl_context * ctx, struct
gl_renderbuffer *rb,
* not a user-created renderbuffer.
*/
struct intel_renderbuffer *
-intel_create_renderbuffer(gl_format format)
+intel_create_renderbuffer(struct intel_screen *screen,
+ gl_format format,
+ unsigned num_samples)
{
struct intel_renderbuffer *irb;
struct gl_renderbuffer *rb;
@@ -381,6 +383,7 @@ intel_create_renderbuffer(gl_format format)
rb-_BaseFormat = _mesa_get_format_base_format(format);
rb-Format = format;
rb-InternalFormat = rb-_BaseFormat;
+ rb-NumSamples = intel_quantize_num_samples(screen, num_samples);
/* intel-specific methods */
rb-Delete = intel_delete_renderbuffer;
@@ -396,11 +399,13 @@ intel_create_renderbuffer(gl_format format)
* may be called at intel_update_renderbuffers() time.
*/
struct intel_renderbuffer *
-intel_create_private_renderbuffer(gl_format format)
+intel_create_private_renderbuffer(struct intel_screen *screen,
+ gl_format format,
+ unsigned num_samples)
{
struct intel_renderbuffer *irb;
- irb = intel_create_renderbuffer(format);
+ irb = intel_create_renderbuffer(screen, format, num_samples);
irb-Base.Base.AllocStorage = intel_alloc_renderbuffer_storage;
return irb;
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.h
b/src/mesa/drivers/dri/intel/intel_fbo.h
index 02bda1e..c497c1b 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.h
+++ b/src/mesa/drivers/dri/intel/intel_fbo.h
@@ -130,10 +130,14 @@ intel_rb_format(const struct intel_renderbuffer *rb)
}
extern struct intel_renderbuffer *
-intel_create_renderbuffer(gl_format format);
+intel_create_renderbuffer(struct intel_screen *screen,
+ gl_format format,
+ unsigned num_samples);
struct intel_renderbuffer *
-intel_create_private_renderbuffer(gl_format format);
+intel_create_private_renderbuffer(struct intel_screen *screen,
+ gl_format format,
+ unsigned num_samples);
struct gl_renderbuffer*
intel_create_wrapped_renderbuffer(struct gl_context * ctx,
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index 9a93ac2..4a12b67 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -577,6 +577,7 @@ intelCreateBuffer(__DRIscreen * driScrnPriv,
struct intel_renderbuffer *rb;
struct intel_screen *screen = (struct intel_screen*)
driScrnPriv-driverPrivate;
gl_format rgbFormat;
+ unsigned num_samples = mesaVis-samples;
struct gl_framebuffer *fb;
if (isPixmap)
@@ -596,11 +597,11 @@ intelCreateBuffer(__DRIscreen * driScrnPriv,
rgbFormat = MESA_FORMAT_ARGB;
/* setup the hardware-based renderbuffers */
- rb = intel_create_renderbuffer(rgbFormat);
+ rb = intel_create_renderbuffer(screen, rgbFormat, num_samples);
_mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, rb-Base.Base);
if (mesaVis-doubleBufferMode) {
- rb = intel_create_renderbuffer(rgbFormat);
+ rb = intel_create_renderbuffer(screen, rgbFormat, num_samples);
_mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, rb-Base.Base);
}
@@ -613,23 +614,27 @@ intelCreateBuffer(__DRIscreen * driScrnPriv,
assert(mesaVis-stencilBits == 8);
if (screen-hw_has_separate_stencil) {
- rb = intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24);
+ rb = intel_create_private_renderbuffer(screen, MESA_FORMAT_X8_Z24,
+num_samples);
_mesa_add_renderbuffer(fb, BUFFER_DEPTH, rb-Base.Base);
- rb = intel_create_private_renderbuffer(MESA_FORMAT_S8);
+ rb = intel_create_private_renderbuffer(screen, MESA_FORMAT_S8,
+num_samples);
_mesa_add_renderbuffer(fb, BUFFER_STENCIL, rb-Base.Base);
[Mesa-dev] [PATCH 06/15] intel: Add intel_mipmap_tree::singlesample_mt
This miptree will be used only for storing the singlesample data of
multisample window system buffers.
CC: Eric Anholt e...@anholt.net
CC: Paul Berry stereotype...@gmail.com
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 1 +
src/mesa/drivers/dri/intel/intel_mipmap_tree.h | 23 +++
2 files changed, 24 insertions(+)
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index d6572cd..56e936e 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -435,6 +435,7 @@ intel_miptree_release(struct intel_mipmap_tree **mt)
intel_miptree_release((*mt)-stencil_mt);
intel_miptree_release((*mt)-hiz_mt);
intel_miptree_release((*mt)-mcs_mt);
+ intel_miptree_release((*mt)-singlesample_mt);
intel_resolve_map_clear((*mt)-hiz_map);
for (i = 0; i MAX_TEXTURE_LEVELS; i++) {
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
index cfd671e..e5e89f0 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
@@ -248,6 +248,29 @@ struct intel_mipmap_tree
uint32_t offset;
/**
+* \brief Singlesample miptree.
+*
+* This is used only for multisample window system front and back buffers.
+*
+* Suppose that the window system FBO was created with a multisample
+* config. Let back_rb be the intel_renderbuffer for the FBO's back
+* buffer. Then back_rb contains two miptrees: a parent multisample miptree
+* (back_rb-mt) and a child singlesample miptree
+* (back_rb-mt-singlesample_mt). The DRM buffer shared with DRI2 belongs
+* to back_rb-mt-singlesample_mt and contains singlesample data.
+*
+* When access to the singlesample data is needed, such as at
+* eglSwapBuffers and glReadPixels, an automatic downsample occurs from
+* back_rb-mt to back_rb-mt-singlesample_mt when necessary.
+*/
+ struct intel_mipmap_tree *singlesample_mt;
+
+ /**
+* \brief A downsample is needed from this miptree to singlesample_mt.
+*/
+ bool need_downsample;
+
+ /**
* \brief HiZ miptree
*
* This is non-null only if HiZ is enabled for this miptree.
--
1.7.11.2
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[Mesa-dev] [PATCH 07/15] intel: Refactor creation of hiz and mcs miptrees
Move the logic for creating the ancillary hiz and mcs miptress for winsys
and non-texture renderbuffers from intel_alloc_renderbuffer_storage to
intel_miptree_create_for_renderbuffer. Let's try to isolate complex
miptree logic to intel_mipmap_tree.c.
Without this refactor, code duplication would be required along the
intel_process_dri2_buffer codepath in order to create the mcs miptree.
CC: Eric Anholt e...@anholt.net
CC: Paul Berry stereotype...@gmail.com
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c | 16
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 19 +++
2 files changed, 19 insertions(+), 16 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c
b/src/mesa/drivers/dri/intel/intel_fbo.c
index a410df6..68e878e 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -236,22 +236,6 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx,
struct gl_renderbuffer
if (!irb-mt)
return false;
- if (intel-vtbl.is_hiz_depth_format(intel, rb-Format)) {
- bool ok = intel_miptree_alloc_hiz(intel, irb-mt, rb-NumSamples);
- if (!ok) {
-intel_miptree_release(irb-mt);
-return false;
- }
- }
-
- if (irb-mt-msaa_layout == INTEL_MSAA_LAYOUT_CMS) {
- bool ok = intel_miptree_alloc_mcs(intel, irb-mt, rb-NumSamples);
- if (!ok) {
- intel_miptree_release(irb-mt);
- return false;
- }
- }
-
return true;
}
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index 56e936e..b402099 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -334,6 +334,7 @@ intel_miptree_create_for_renderbuffer(struct intel_context
*intel,
struct intel_mipmap_tree *mt;
uint32_t depth = 1;
enum intel_msaa_layout msaa_layout = INTEL_MSAA_LAYOUT_NONE;
+ bool ok;
if (num_samples 0) {
/* Adjust width/height/depth for MSAA */
@@ -397,8 +398,26 @@ intel_miptree_create_for_renderbuffer(struct intel_context
*intel,
mt = intel_miptree_create(intel, GL_TEXTURE_2D, format, 0, 0,
width, height, depth, true, num_samples,
msaa_layout);
+ if (mt == NULL)
+ goto fail;
+
+ if (intel-vtbl.is_hiz_depth_format(intel, format)) {
+ ok = intel_miptree_alloc_hiz(intel, mt, num_samples);
+ if (!ok)
+ goto fail;
+ }
+
+ if (mt-msaa_layout == INTEL_MSAA_LAYOUT_CMS) {
+ ok = intel_miptree_alloc_mcs(intel, mt, num_samples);
+ if (!ok)
+ goto fail;
+ }
return mt;
+
+fail:
+ intel_miptree_release(mt);
+ return NULL;
}
void
--
1.7.11.2
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[Mesa-dev] [PATCH 08/15] intel: Allocate miptree for multisample DRI2 buffers
Immediately after obtaining, with DRI2GetBuffersWithFormat, the DRM buffer
handle for a DRI2 buffer, we wrap that DRM buffer handle with a region and
a miptre. This patch additionally allocates an accompanying multisample
miptree if the DRI2 buffer is multisampled.
Since we do not yet advertise multisample GL configs, the code for
allocating the multisample miptree is currently inactive.
CC: Eric Anholt e...@anholt.net
CC: Paul Berry stereotype...@gmail.com
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_context.c | 26 +
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 52 ++
src/mesa/drivers/dri/intel/intel_mipmap_tree.h | 6 +++
3 files changed, 76 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_context.c
b/src/mesa/drivers/dri/intel/intel_context.c
index 378859c..9a85d83 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -893,14 +893,24 @@ intel_process_dri2_buffer(struct intel_context *intel,
if (!rb)
return;
+ unsigned num_samples = rb-Base.Base.NumSamples;
+
/* We try to avoid closing and reopening the same BO name, because the first
* use of a mapping of the buffer involves a bunch of page faulting which is
* moderately expensive.
*/
- if (rb-mt
- rb-mt-region
- rb-mt-region-name == buffer-name)
- return;
+ if (num_samples == 0) {
+ if (rb-mt
+ rb-mt-region
+ rb-mt-region-name == buffer-name)
+ return;
+ } else {
+ if (rb-mt
+ rb-mt-singlesample_mt
+ rb-mt-singlesample_mt-region
+ rb-mt-singlesample_mt-region-name == buffer-name)
+ return;
+ }
if (unlikely(INTEL_DEBUG DEBUG_DRI)) {
fprintf(stderr,
@@ -920,9 +930,9 @@ intel_process_dri2_buffer(struct intel_context *intel,
if (!region)
return;
- rb-mt = intel_miptree_create_for_region(intel,
-GL_TEXTURE_2D,
-intel_rb_format(rb),
-region);
+ rb-mt = intel_miptree_create_for_dri2_buffer(intel,
+ intel_rb_format(rb),
+ num_samples,
+ region);
intel_region_release(region);
}
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index b402099..c4496ea 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -324,6 +324,58 @@ compute_msaa_layout(struct intel_context *intel, gl_format
format)
}
}
+/**
+ * If the DRI2 buffer is multisampled, then its content is undefined
+ * after calling this. This behavior violates the GLX spec for the
+ * benefit of avoiding a performance penalty.
+ */
+struct intel_mipmap_tree*
+intel_miptree_create_for_dri2_buffer(struct intel_context *intel,
+ gl_format format,
+ uint32_t num_samples,
+ struct intel_region *region)
+{
+ struct intel_mipmap_tree *singlesample_mt = NULL;
+ struct intel_mipmap_tree *multisample_mt = NULL;
+ GLenum base_format = _mesa_get_format_base_format(format);
+
+ /* Only the front and back buffers, which are color buffers, are shared
+* through DRI2.
+*/
+ assert(base_format == GL_RGB || base_format == GL_RGBA);
+
+ singlesample_mt = intel_miptree_create_for_region(intel, GL_TEXTURE_2D,
+ format, region);
+ if (!singlesample_mt)
+ return NULL;
+
+ if (num_samples == 0) {
+ return singlesample_mt;
+ } else {
+ multisample_mt = intel_miptree_create_for_renderbuffer(intel,
+ format,
+ region-width,
+ region-height,
+ num_samples);
+ if (!multisample_mt) {
+ intel_miptree_release(singlesample_mt);
+ return NULL;
+ }
+
+ multisample_mt-singlesample_mt = singlesample_mt;
+ multisample_mt-need_downsample = false;
+
+ /* If we wanted to preserve the contents of the DRI2 buffer, here we
+ * would need to do an upsample from singlesample_mt to multisample_mt.
+ * However, it is unlikely that any app desires that behavior. So we
+ * invalidate its content for the benefit of avoiding the upsample
+ * performance penalty.
+ */
+
+ return multisample_mt;
+ }
+}
+
struct intel_mipmap_tree*
intel_miptree_create_for_renderbuffer(struct intel_context *intel,
[Mesa-dev] [PATCH 09/15] i965: Add function intel_miptree_downsample
This function does a downsample from mt to mt-singlesample_mt.
Conceptually, this function belongs in intel_mipmap_tree.c. However, it
needs to interact with blorp, which is C++. So I created a new file,
brw_blorp_orphands.cpp, for this and other functions that fall into the
same category.
CC: Eric Anholt e...@anholt.net
CC: Paul Berry stereotype...@gmail.com
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/Makefile.sources | 1 +
src/mesa/drivers/dri/i965/brw_blorp_orphans.cpp | 66 +
src/mesa/drivers/dri/intel/intel_mipmap_tree.h | 10
3 files changed, 77 insertions(+)
create mode 100644 src/mesa/drivers/dri/i965/brw_blorp_orphans.cpp
diff --git a/src/mesa/drivers/dri/i965/Makefile.sources
b/src/mesa/drivers/dri/i965/Makefile.sources
index 334bfd9..4bbd905 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -113,6 +113,7 @@ i965_C_FILES = \
i965_CXX_FILES = \
brw_blorp.cpp \
brw_blorp_blit.cpp \
+ brw_blorp_orphans.cpp \
brw_cubemap_normalize.cpp \
brw_fs.cpp \
brw_fs_cfg.cpp \
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_orphans.cpp
b/src/mesa/drivers/dri/i965/brw_blorp_orphans.cpp
new file mode 100644
index 000..0b16438
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/brw_blorp_orphans.cpp
@@ -0,0 +1,66 @@
+/*
+ * Copyright © 2012 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+/**
+ * \file
+ *
+ * This file contains functions which whose definitions conceptually belong
+ * in other C files but need to interact closely with blorp.
+ */
+
+#include intel_mipmap_tree.h
+
+#include brw_blorp.h
+
+extern C {
+
+/**
+ * \brief Downsample from mt to mt-singlesample_mt.
+ *
+ * If the miptree needs no downsample, then skip.
+ */
+void
+intel_miptree_downsample(struct intel_context *intel,
+ struct intel_mipmap_tree *mt)
+{
+ if (!mt-need_downsample)
+ return;
+
+ int src_x0 = 0;
+ int src_y0 = 0;
+ int dst_x0 = 0;
+ int dst_y0 = 0;
+
+ brw_blorp_blit_params params(brw_context(intel-ctx),
+mt, mt-singlesample_mt,
+src_x0, src_y0,
+dst_x0, dst_y0,
+mt-singlesample_mt-width0,
+mt-singlesample_mt-height0,
+false, false);
+ brw_blorp_exec(intel, params);
+
+ mt-need_downsample = false;
+}
+
+} /* end extern C */
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
index bb3fa50..0b76fad 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
@@ -540,6 +540,9 @@ intel_miptree_unmap(struct intel_context *intel,
unsigned int slice);
#ifdef I915
+
+void intel_miptree_downsample();
+
static inline void
intel_hiz_exec(struct intel_context *intel, struct intel_mipmap_tree *mt,
unsigned int level, unsigned int layer, enum gen6_hiz_op op)
@@ -548,7 +551,14 @@ intel_hiz_exec(struct intel_context *intel, struct
intel_mipmap_tree *mt,
* there.
*/
}
+
#else
+
+void
+intel_miptree_downsample(struct intel_context *intel,
+ struct intel_mipmap_tree *mt);
+
+
void
intel_hiz_exec(struct intel_context *intel, struct intel_mipmap_tree *mt,
unsigned int level, unsigned int layer, enum gen6_hiz_op op);
--
1.7.11.2
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[Mesa-dev] [PATCH 10/15] i965: Mark winsys MSAA color buffer as needing resolve postdraw
Do this immediately after drawing is complete and at the same time that we
mark the depth buffer as needing a depth resolve.
CC: Eric Anholt e...@anholt.net
CC: Paul Berry stereotype...@gmail.com
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_draw.c | 17 ++---
1 file changed, 14 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers/dri/i965/brw_draw.c
index 1069a63..ca44ff8 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -326,18 +326,29 @@ brw_predraw_resolve_buffers(struct brw_context *brw)
* If the depth buffer was written to and if it has an accompanying HiZ
* buffer, then mark that it needs a depth resolve.
*
- * (In the future, this will also mark needed MSAA resolves).
+ * If the color buffer is a multisampled window system buffer, then
+ * mark that it needs a downsample resolve.
*/
static void brw_postdraw_set_buffers_need_resolve(struct brw_context *brw)
{
struct gl_context *ctx = brw-intel.ctx;
struct gl_framebuffer *fb = ctx-DrawBuffer;
- struct intel_renderbuffer *depth_irb =
-intel_get_renderbuffer(fb, BUFFER_DEPTH);
+
+ gl_buffer_index color_buffer = brw-intel.is_front_buffer_rendering
+? BUFFER_FRONT_LEFT
+: BUFFER_BACK_LEFT;
+
+ struct intel_renderbuffer *depth_irb = intel_get_renderbuffer(fb,
BUFFER_DEPTH);
+ struct intel_renderbuffer *color_irb = intel_get_renderbuffer(fb,
color_buffer);
if (depth_irb ctx-Depth.Mask) {
intel_renderbuffer_set_needs_depth_resolve(depth_irb);
}
+
+ if (color_irb color_irb-mt-singlesample_mt) {
+ assert(fb-Name == 0);
+ color_irb-mt-need_downsample = true;
+ }
}
static int
--
1.7.11.2
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[Mesa-dev] [PATCH 11/15] intel: Downsample during glReadPixels
Actually, this patch forces an automatic downsample during
intel_miptree_map. And this should occur only due to glReadPixels.
CC: Eric Anholt e...@anholt.net
CC: Paul Berry stereotype...@gmail.com
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index c4496ea..26002c2 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -1339,6 +1339,15 @@ intel_miptree_map(struct intel_context *intel,
{
struct intel_miptree_map *map;
+ if (mt-num_samples 0 (mode GL_MAP_WRITE_BIT)) {
+ /* We choose not support swrast on multisample buffers because
+ * it would require an upsample on unmap. As of 2012-07-20, this
+ * warning occurs only on glDrawPixels(GL_STENCIL_INDEX).
+ */
+ _mesa_warning(intel-ctx, unsupported fallback to software
+rasterization on a multisample buffer);
+ }
+
map = calloc(1, sizeof(struct intel_miptree_map));
if (!map){
*out_ptr = NULL;
@@ -1354,6 +1363,7 @@ intel_miptree_map(struct intel_context *intel,
map-w = w;
map-h = h;
+ intel_miptree_downsample(intel, mt);
intel_miptree_slice_resolve_depth(intel, mt, level, slice);
if (map-mode GL_MAP_WRITE_BIT) {
intel_miptree_slice_set_needs_hiz_resolve(mt, level, slice);
--
1.7.11.2
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[Mesa-dev] [PATCH 12/15] intel: Downsample on DRI2 flush
CC: Eric Anholt e...@anholt.net
CC: Paul Berry stereotype...@gmail.com
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_screen.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index 4a12b67..958ff9f 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -177,6 +177,36 @@ static const __DRItexBufferExtension
intelTexBufferExtension = {
};
static void
+intel_downsample_for_dri2_flush(struct intel_context *intel,
+__DRIdrawable *drawable)
+{
+ if (intel-gen 6) {
+ /* MSAA is not supported, so don't waste time checking for
+ * a multisample buffer.
+ */
+ return;
+ }
+
+ struct gl_framebuffer *fb = drawable-driverPrivate;
+ struct intel_renderbuffer *rb;
+
+ /* Usually, only the back buffer will need to be downsampled. However,
+* the front buffer will also need it if the user has rendered into it.
+*/
+ static const gl_buffer_index buffers[2] = {
+ BUFFER_BACK_LEFT,
+ BUFFER_FRONT_LEFT,
+ };
+
+ for (int i = 0; i 2; ++i) {
+ rb = intel_get_renderbuffer(fb, buffers[i]);
+ if (rb == NULL || rb-mt == NULL)
+ continue;
+ intel_miptree_downsample(intel, rb-mt);
+ }
+}
+
+static void
intelDRI2Flush(__DRIdrawable *drawable)
{
GET_CURRENT_CONTEXT(ctx);
@@ -187,6 +217,7 @@ intelDRI2Flush(__DRIdrawable *drawable)
if (intel-gen 4)
INTEL_FIREVERTICES(intel);
+ intel_downsample_for_dri2_flush(intel, drawable);
intel-need_throttle = true;
if (intel-batch.used)
--
1.7.11.2
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[Mesa-dev] [PATCH 13/15] intel: Refactor creation of DRI2 configs
DRI2 configs were constructed in intelInitScreen2. That function already
does too much, so move verbatim the code for creating configs to a new
function, intel_screen_make_configs.
CC: Eric Anholt e...@anholt.net
CC: Paul Berry stereotype...@gmail.com
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_screen.c | 189 --
1 file changed, 98 insertions(+), 91 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index 958ff9f..9bb42dd 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -848,6 +848,103 @@ intel_detect_swizzling(struct intel_screen *screen)
return true;
}
+static __DRIconfig**
+intel_screen_make_configs(__DRIscreen *dri_screen)
+{
+ static const GLenum back_buffer_modes[] = {
+ GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML
+ };
+
+ GLenum fb_format[3];
+ GLenum fb_type[3];
+ uint8_t depth_bits[4], stencil_bits[4], msaa_samples_array[1];
+ int color;
+ __DRIconfig **configs = NULL;
+
+ msaa_samples_array[0] = 0;
+
+ fb_format[0] = GL_RGB;
+ fb_type[0] = GL_UNSIGNED_SHORT_5_6_5;
+
+ fb_format[1] = GL_BGR;
+ fb_type[1] = GL_UNSIGNED_INT_8_8_8_8_REV;
+
+ fb_format[2] = GL_BGRA;
+ fb_type[2] = GL_UNSIGNED_INT_8_8_8_8_REV;
+
+ depth_bits[0] = 0;
+ stencil_bits[0] = 0;
+
+ /* Generate a rich set of useful configs that do not include an
+* accumulation buffer.
+*/
+ for (color = 0; color ARRAY_SIZE(fb_format); color++) {
+ __DRIconfig **new_configs;
+ int depth_factor;
+
+ /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
+ * buffer that has a different number of bits per pixel than the color
+ * buffer. This isn't yet supported here.
+ */
+ if (fb_type[color] == GL_UNSIGNED_SHORT_5_6_5) {
+ depth_bits[1] = 16;
+ stencil_bits[1] = 0;
+ } else {
+ depth_bits[1] = 24;
+ stencil_bits[1] = 8;
+ }
+
+ depth_factor = 2;
+
+ new_configs = driCreateConfigs(fb_format[color], fb_type[color],
+ depth_bits,
+ stencil_bits,
+ depth_factor,
+ back_buffer_modes,
+ ARRAY_SIZE(back_buffer_modes),
+ msaa_samples_array,
+ ARRAY_SIZE(msaa_samples_array),
+ false);
+ if (configs == NULL)
+ configs = new_configs;
+ else
+ configs = driConcatConfigs(configs, new_configs);
+ }
+
+ /* Generate the minimum possible set of configs that include an
+* accumulation buffer.
+*/
+ for (color = 0; color ARRAY_SIZE(fb_format); color++) {
+ __DRIconfig **new_configs;
+
+ if (fb_type[color] == GL_UNSIGNED_SHORT_5_6_5) {
+ depth_bits[0] = 16;
+ stencil_bits[0] = 0;
+ } else {
+ depth_bits[0] = 24;
+ stencil_bits[0] = 8;
+ }
+
+ new_configs = driCreateConfigs(fb_format[color], fb_type[color],
+ depth_bits, stencil_bits, 1,
+ back_buffer_modes + 1, 1,
+ msaa_samples_array, 1,
+ true);
+ if (configs == NULL)
+ configs = new_configs;
+ else
+ configs = driConcatConfigs(configs, new_configs);
+ }
+
+ if (configs == NULL) {
+ fprintf(stderr, [%s:%u] Error creating FBConfig!\n, __func__,
+ __LINE__);
+ return NULL;
+ }
+
+ return configs;
+}
+
/**
* This is the driver specific part of the createNewScreen entry point.
* Called when using DRI2.
@@ -858,17 +955,8 @@ static const
__DRIconfig **intelInitScreen2(__DRIscreen *psp)
{
struct intel_screen *intelScreen;
- GLenum fb_format[3];
- GLenum fb_type[3];
unsigned int api_mask;
- static const GLenum back_buffer_modes[] = {
- GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML
- };
- uint8_t depth_bits[4], stencil_bits[4], msaa_samples_array[1];
- int color;
- __DRIconfig **configs = NULL;
-
if (psp-dri2.loader-base.version = 2 ||
psp-dri2.loader-getBuffersWithFormat == NULL) {
fprintf(stderr,
@@ -941,88 +1029,7 @@ __DRIconfig **intelInitScreen2(__DRIscreen *psp)
psp-extensions = intelScreenExtensions;
- msaa_samples_array[0] = 0;
-
- fb_format[0] = GL_RGB;
- fb_type[0] = GL_UNSIGNED_SHORT_5_6_5;
-
- fb_format[1] = GL_BGR;
- fb_type[1] = GL_UNSIGNED_INT_8_8_8_8_REV;
-
- fb_format[2] = GL_BGRA;
- fb_type[2] = GL_UNSIGNED_INT_8_8_8_8_REV;
-
- depth_bits[0] = 0;
- stencil_bits[0] = 0;
-
- /* Generate a rich set of useful configs that do not include an
-* accumulation buffer.
-
[Mesa-dev] [PATCH 14/15] intel: Refactor intel_screen_make_configs
Transform the code from clever, obfuscated, and imperative to
straight-forward and table-driven.
CC: Ian Romanick i...@freedesktop.org
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_screen.c | 167 +-
1 file changed, 97 insertions(+), 70 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index 9bb42dd..61daea7 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -851,85 +851,112 @@ intel_detect_swizzling(struct intel_screen *screen)
static __DRIconfig**
intel_screen_make_configs(__DRIscreen *dri_screen)
{
- static const GLenum back_buffer_modes[] = {
- GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML
+ struct config_params {
+ GLenum color_format;
+ GLenum color_type;
+ const uint8_t depth_sizes[4];
+ const uint8_t stencil_sizes[4];
+ unsigned num_depth_stencil_sizes;
+ unsigned num_back_buffer_modes;
+ unsigned num_msaa_modes;
+ bool enable_accum;
};
- GLenum fb_format[3];
- GLenum fb_type[3];
- uint8_t depth_bits[4], stencil_bits[4], msaa_samples_array[1];
- int color;
- __DRIconfig **configs = NULL;
-
- msaa_samples_array[0] = 0;
-
- fb_format[0] = GL_RGB;
- fb_type[0] = GL_UNSIGNED_SHORT_5_6_5;
-
- fb_format[1] = GL_BGR;
- fb_type[1] = GL_UNSIGNED_INT_8_8_8_8_REV;
-
- fb_format[2] = GL_BGRA;
- fb_type[2] = GL_UNSIGNED_INT_8_8_8_8_REV;
+ static const GLenum back_buffer_modes[] = {
+ GLX_SWAP_UNDEFINED_OML, GLX_NONE, GLX_SWAP_COPY_OML,
+ };
- depth_bits[0] = 0;
- stencil_bits[0] = 0;
+ static const uint8_t msaa_samples[] = {0};
- /* Generate a rich set of useful configs that do not include an
-* accumulation buffer.
+ /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
+* buffer that has a different number of bits per pixel than the color
+* buffer. This isn't yet supported here.
*/
- for (color = 0; color ARRAY_SIZE(fb_format); color++) {
- __DRIconfig **new_configs;
- int depth_factor;
-
- /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
- * buffer that has a different number of bits per pixel than the color
- * buffer. This isn't yet supported here.
+ struct config_params params[] = {
+ /* Configs without accumulation buffer. */
+ {
+ .color_format = GL_RGB,
+ .color_type = GL_UNSIGNED_SHORT_5_6_5,
+ .depth_sizes = {0, 16},
+ .stencil_sizes = {0, 0},
+ .num_depth_stencil_sizes = 2,
+ .num_back_buffer_modes = 3,
+ .num_msaa_modes = 1,
+ .enable_accum = false,
+ },
+ {
+ .color_format = GL_BGR,
+ .color_type = GL_UNSIGNED_INT_8_8_8_8_REV,
+ .depth_sizes = {0, 24},
+ .stencil_sizes = {0, 8},
+ .num_depth_stencil_sizes = 2,
+ .num_back_buffer_modes = 3,
+ .num_msaa_modes = 1,
+ .enable_accum = false,
+ },
+ {
+ .color_format = GL_BGRA,
+ .color_type = GL_UNSIGNED_INT_8_8_8_8_REV,
+ .depth_sizes = {0, 24},
+ .stencil_sizes = {0, 8},
+ .num_depth_stencil_sizes = 2,
+ .num_back_buffer_modes = 3,
+ .num_msaa_modes = 1,
+ .enable_accum = false,
+ },
+
+ /* Configs with accumulation buffer.
+ *
+ * We generate the minimum possible set of configs that include an
+ * accumulation buffer.
*/
- if (fb_type[color] == GL_UNSIGNED_SHORT_5_6_5) {
- depth_bits[1] = 16;
- stencil_bits[1] = 0;
- } else {
- depth_bits[1] = 24;
- stencil_bits[1] = 8;
- }
-
- depth_factor = 2;
-
- new_configs = driCreateConfigs(fb_format[color], fb_type[color],
- depth_bits,
- stencil_bits,
- depth_factor,
- back_buffer_modes,
- ARRAY_SIZE(back_buffer_modes),
- msaa_samples_array,
- ARRAY_SIZE(msaa_samples_array),
- false);
- if (configs == NULL)
- configs = new_configs;
- else
- configs = driConcatConfigs(configs, new_configs);
- }
+ {
+ .color_format = GL_RGB,
+ .color_type = GL_UNSIGNED_SHORT_5_6_5,
+ .depth_sizes = {16},
+ .stencil_sizes = {0},
+ .num_depth_stencil_sizes = 1,
+ .num_back_buffer_modes = 1,
+ .num_msaa_modes = 1,
+ .enable_accum = true,
+ },
+ {
+ .color_format = GL_BGR,
+ .color_type = GL_UNSIGNED_INT_8_8_8_8_REV,
+ .depth_sizes = {24},
+ .stencil_sizes = {8},
+
Re: [Mesa-dev] [PATCH 01/15] intel: Remove dead code in intelAllocateBuffer
On Sat, 21 Jul 2012 17:36:40 -0700, Chad Versace chad.vers...@linux.intel.com
wrote:
After commit intel: Convert to using private depth/stencil buffers, we
request from DRI2GetBuffersWithFormat only the front left and back left
buffers. We no longer request depth and stencil buffers.
Assert that in intelAllocateBuffer and remove the related dead code.
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index 81953ce..2d46d67 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -972,54 +972,6 @@ struct intel_buffer {
struct intel_region *region;
- ok = intel_get_dri_buffer_tiling(intelScreen, attachment, tiling);
+ /* The front and back buffers are color buffers, which are X tiled. */
intelBuffer-region = intel_region_alloc(intelScreen,
-tiling,
-region_cpp,
-region_width,
-region_height,
+I915_TILING_X,
+format / 8,
+width,
+height,
true);
I see no reason to bake in the assumption that the buffers are X-tiled.
Presumably Y-tiling will still be advantageous in many circumstances,
basically any surface which is not a candidate for pageflipping?
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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[Mesa-dev] [PATCH] st/mesa: flush the glBitmap cache before changing framebuffer state
This fixes the piglit EXT_framebuffer_multisample/bitmap tests.
Note that we must not rely on ctx-DrawBuffer when flushing the cache, because
that's already updated with a new framebuffer. We want to draw into the old
framebuffer where glBitmap was called.
---
src/mesa/state_tracker/st_atom_framebuffer.c |4 ++
src/mesa/state_tracker/st_cb_bitmap.c| 74 --
src/mesa/state_tracker/st_context.h |2 +
3 files changed, 41 insertions(+), 39 deletions(-)
diff --git a/src/mesa/state_tracker/st_atom_framebuffer.c
b/src/mesa/state_tracker/st_atom_framebuffer.c
index a8907c1..6f94a47 100644
--- a/src/mesa/state_tracker/st_atom_framebuffer.c
+++ b/src/mesa/state_tracker/st_atom_framebuffer.c
@@ -33,6 +33,7 @@
#include st_context.h
#include st_atom.h
+#include st_cb_bitmap.h
#include st_cb_fbo.h
#include st_texture.h
#include pipe/p_context.h
@@ -103,6 +104,9 @@ update_framebuffer_state( struct st_context *st )
struct st_renderbuffer *strb;
GLuint i;
+ st_flush_bitmap_cache(st);
+
+ st-state.fb_orientation = st_fb_orientation(fb);
framebuffer-width = fb-Width;
framebuffer-height = fb-Height;
diff --git a/src/mesa/state_tracker/st_cb_bitmap.c
b/src/mesa/state_tracker/st_cb_bitmap.c
index f48c9c1..c260588 100644
--- a/src/mesa/state_tracker/st_cb_bitmap.c
+++ b/src/mesa/state_tracker/st_cb_bitmap.c
@@ -335,9 +335,8 @@ setup_bitmap_vertex_data(struct st_context *st, bool
normalized,
struct pipe_resource **vbuf,
unsigned *vbuf_offset)
{
- const struct gl_framebuffer *fb = st-ctx-DrawBuffer;
- const GLfloat fb_width = (GLfloat)fb-Width;
- const GLfloat fb_height = (GLfloat)fb-Height;
+ const GLfloat fb_width = (GLfloat)st-state.framebuffer.width;
+ const GLfloat fb_height = (GLfloat)st-state.framebuffer.height;
const GLfloat x0 = (GLfloat)x;
const GLfloat x1 = (GLfloat)(x + width);
const GLfloat y0 = (GLfloat)y;
@@ -502,10 +501,9 @@ draw_bitmap_quad(struct gl_context *ctx, GLint x, GLint y,
GLfloat z,
/* viewport state: viewport matching window dims */
{
- const struct gl_framebuffer *fb = st-ctx-DrawBuffer;
- const GLboolean invert = (st_fb_orientation(fb) == Y_0_TOP);
- const GLfloat width = (GLfloat)fb-Width;
- const GLfloat height = (GLfloat)fb-Height;
+ const GLboolean invert = st-state.fb_orientation == Y_0_TOP;
+ const GLfloat width = (GLfloat)st-state.framebuffer.width;
+ const GLfloat height = (GLfloat)st-state.framebuffer.height;
struct pipe_viewport_state vp;
vp.scale[0] = 0.5f * width;
vp.scale[1] = height * (invert ? -0.5f : 0.5f);
@@ -636,43 +634,41 @@ st_flush_bitmap_cache(struct st_context *st)
if (!st-bitmap.cache-empty) {
struct bitmap_cache *cache = st-bitmap.cache;
- if (st-ctx-DrawBuffer) {
- struct pipe_context *pipe = st-pipe;
- struct pipe_sampler_view *sv;
+ struct pipe_context *pipe = st-pipe;
+ struct pipe_sampler_view *sv;
- assert(cache-xmin = cache-xmax);
-
-/* printf(flush size %d x %d at %d, %d\n,
-cache-xmax - cache-xmin,
-cache-ymax - cache-ymin,
-cache-xpos, cache-ypos);
+ assert(cache-xmin = cache-xmax);
+
+/*printf(flush size %d x %d at %d, %d\n,
+ cache-xmax - cache-xmin,
+ cache-ymax - cache-ymin,
+ cache-xpos, cache-ypos);
*/
- /* The texture transfer has been mapped until now.
+ /* The texture transfer has been mapped until now.
* So unmap and release the texture transfer before drawing.
*/
- if (cache-trans) {
-if (0)
- print_cache(cache);
-pipe_transfer_unmap(pipe, cache-trans);
-cache-buffer = NULL;
-
-pipe-transfer_destroy(pipe, cache-trans);
-cache-trans = NULL;
- }
-
- sv = st_create_texture_sampler_view(st-pipe, cache-texture);
- if (sv) {
-draw_bitmap_quad(st-ctx,
- cache-xpos,
- cache-ypos,
- cache-zpos,
- BITMAP_CACHE_WIDTH, BITMAP_CACHE_HEIGHT,
- sv,
- cache-color);
-
-pipe_sampler_view_reference(sv, NULL);
- }
+ if (cache-trans) {
+ if (0)
+print_cache(cache);
+ pipe_transfer_unmap(pipe, cache-trans);
+ cache-buffer = NULL;
+
+ pipe-transfer_destroy(pipe, cache-trans);
+ cache-trans = NULL;
+ }
+
+ sv = st_create_texture_sampler_view(st-pipe, cache-texture);
+ if (sv) {
+ draw_bitmap_quad(st-ctx,
+ cache-xpos,
+ cache-ypos,
+ cache-zpos,
+ BITMAP_CACHE_WIDTH,
