[Mesa-dev] [PATCH 05/10] mesa/program: add hw atomic counter file

[Dave Airlie]

From: Dave Airlie 

This is needed for the GLSL->TGSI translation for hw atomic counters.

Signed-off-by: Dave Airlie 
---
 src/mesa/main/mtypes.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index 2acf64e..60f06aa 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -2059,6 +2059,7 @@ typedef enum
PROGRAM_BUFFER,  /**< for shader buffers, compile-time only */
PROGRAM_MEMORY,  /**< for shared, global and local memory */
PROGRAM_IMAGE,   /**< for shader images, compile-time only */
+   PROGRAM_HW_ATOMIC,   /**< for hw atomic counters, compile-time only */
PROGRAM_FILE_MAX
 } gl_register_file;
 
-- 
2.9.5

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[Mesa-dev] [PATCH 02/10] gallium: add CAPs to support HW atomic counters. (v2)

[Dave Airlie]

From: Dave Airlie 

This looks like an evergreen specific feature, but with atomic
counters AMD have hw specific counters they use instead of operating
on buffers directly. These are separate to the buffer atomics,
so require different limits and code paths.

I've left the CAP for atomic type extensible in case someone
else has a variant on this sort of thing (freedreno maybe?)
and needs to change it.

This adds all the CAPs required to add support for those atomic
counters, along with a related CAP for limiting the number of
output resources.

I'd like to land this and the st patch then I can start to
upstream the evergreen support for these and other GL4.x features.

v2: drop the ATOMIC_COUNTER_MODE cap, just use the return
from the HW counters. If 0 we use the current mode.

Signed-off-by: Dave Airlie 
---
 src/gallium/auxiliary/gallivm/lp_bld_limits.h| 2 ++
 src/gallium/auxiliary/tgsi/tgsi_exec.h   | 2 ++
 src/gallium/docs/source/screen.rst   | 5 -
 src/gallium/drivers/etnaviv/etnaviv_screen.c | 2 ++
 src/gallium/drivers/freedreno/freedreno_screen.c | 2 ++
 src/gallium/drivers/nouveau/nv30/nv30_screen.c   | 2 ++
 src/gallium/drivers/nouveau/nv50/nv50_screen.c   | 2 ++
 src/gallium/drivers/nouveau/nvc0/nvc0_screen.c   | 2 ++
 src/gallium/drivers/r300/r300_screen.c   | 2 ++
 src/gallium/drivers/r600/r600_pipe.c | 2 ++
 src/gallium/drivers/radeonsi/si_pipe.c   | 3 +++
 src/gallium/drivers/svga/svga_screen.c   | 4 
 src/gallium/drivers/vc4/vc4_screen.c | 2 ++
 src/gallium/drivers/virgl/virgl_screen.c | 2 ++
 src/gallium/include/pipe/p_defines.h | 2 ++
 15 files changed, 35 insertions(+), 1 deletion(-)

diff --git a/src/gallium/auxiliary/gallivm/lp_bld_limits.h 
b/src/gallium/auxiliary/gallivm/lp_bld_limits.h
index ea320bb..c7755bf 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_limits.h
+++ b/src/gallium/auxiliary/gallivm/lp_bld_limits.h
@@ -140,6 +140,8 @@ gallivm_get_shader_param(enum pipe_shader_cap param)
case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
+   case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
+   case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
   return 0;
case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
   return 32;
diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.h 
b/src/gallium/auxiliary/tgsi/tgsi_exec.h
index 514c69e..ad920dc 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_exec.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_exec.h
@@ -541,6 +541,8 @@ tgsi_exec_get_shader_param(enum pipe_shader_cap param)
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
+   case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
+   case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
   return 0;
case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
   return PIPE_MAX_SHADER_BUFFERS;
diff --git a/src/gallium/docs/source/screen.rst 
b/src/gallium/docs/source/screen.rst
index 376b95e..134a10b 100644
--- a/src/gallium/docs/source/screen.rst
+++ b/src/gallium/docs/source/screen.rst
@@ -515,7 +515,10 @@ MOV OUT[0], CONST[0][3]  # copy vector 3 of constbuf 0
 * ``PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS``: Whether the merge registers
   TGSI pass is skipped. This might reduce code size and register pressure if
   the underlying driver has a real backend compiler.
-
+* ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS``: If atomic counters are separate,
+  how many HW counters are available for this stage. (0 uses SSBO atomics).
+* ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS``: If atomic counters are
+  separate, how many atomic counter buffers are available for this stage.
 
 .. _pipe_compute_cap:
 
diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.c 
b/src/gallium/drivers/etnaviv/etnaviv_screen.c
index 68973be..ca94ed1 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_screen.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_screen.c
@@ -458,6 +458,8 @@ etna_screen_get_shader_param(struct pipe_screen *pscreen,
case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
+   case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
+   case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
   return 0;
}
 
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c 
b/src/gallium/drivers/freedreno/freedreno_screen.c
index 30b2ded..f9b38c1 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -553,6 +553,8 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen,
return 32;
case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
+   case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
+   case 

[Mesa-dev] [PATCH 04/10] gallium: add hw atomic buffer binding API.

[Dave Airlie]

From: Dave Airlie 

This API binds atomic buffers for all bound shaders (as per the
GL semantics).

This is needed to support cross shader hw atomic counters.

Signed-off-by: Dave Airlie 
---
 src/gallium/docs/source/context.rst  |  8 
 src/gallium/include/pipe/p_context.h | 16 
 2 files changed, 24 insertions(+)

diff --git a/src/gallium/docs/source/context.rst 
b/src/gallium/docs/source/context.rst
index ba7fef8..5898157 100644
--- a/src/gallium/docs/source/context.rst
+++ b/src/gallium/docs/source/context.rst
@@ -145,6 +145,14 @@ to the array index which is used for sampling.
 * ``sampler_view_destroy`` destroys a sampler view and releases its reference
   to associated texture.
 
+Hardware Atomic buffers
+^^^
+
+Buffers containing hw atomics are required to support the feature
+on some drivers.
+
+Drivers that require this need to fill the ``set_hw_atomic_buffers`` method.
+
 Shader Resources
 
 
diff --git a/src/gallium/include/pipe/p_context.h 
b/src/gallium/include/pipe/p_context.h
index 4609d4d..c2153f7 100644
--- a/src/gallium/include/pipe/p_context.h
+++ b/src/gallium/include/pipe/p_context.h
@@ -332,6 +332,22 @@ struct pipe_context {
   const struct pipe_shader_buffer *buffers);
 
/**
+* Bind an array of hw atomic buffers for use by all shaders.
+* And buffers that were previously bound to the specified range
+* will be unbound.
+*
+* \param start_slot first buffer slot to bind.
+* \param count  number of consecutive buffers to bind.
+* \param buffersarray of pointers to the buffers to bind, it
+*   should contain at least \a count elements
+*   unless it's NULL, in which case no buffers will
+*   be bound.
+*/
+   void (*set_hw_atomic_buffers)(struct pipe_context *,
+ unsigned start_slot, unsigned count,
+ const struct pipe_shader_buffer *buffers);
+
+   /**
 * Bind an array of images that will be used by a shader.
 * Any images that were previously bound to the specified range
 * will be unbound.
-- 
2.9.5

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[Mesa-dev] gallium + r600 hardware atomic counter support

[Dave Airlie]

Until now we only implement ARB_shader_atomic_counters using SSBO
atomics, however this extension was originally designed for exposing
hardware that was faster than ssbo atomics. Evergreen and Cayman hw
have append/consume hardware intended for this purpose.

This series adds support to glsl to add a unique hw counter index
to all atomic counters at link time, since these resources need to
be allocated across all shaders, and the unique values are required at
compile time.

I've experimented with a number of ways of adding these, and they all
had ups and downs, this is where I ended up.

There is no compute shader support in this yet as r600 doesn't have
compute shaders yet.

I'm also not sure if this will work for the radeonsi GDS atomics
if AMD decide to use them but it should be closer to what they want,
I think some of the limits might be a bit low.

Dave.

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[Mesa-dev] [PATCH 01/10] glsl: add support for tracking atomic counter index across stages.

[Dave Airlie]

From: Dave Airlie 

If we have hardware like evergreen with limited hw counters, we need
to assign each used counter in a series of linked shaders a unique
index so the driver can assign them to the hw counters uniquely.

Since I need to know this information at compile time, I would
have to introduce shader variants in the backend for it if I can't
get it provided from the frontend, so this adds it to the front end
to avoid that.

Signed-off-by: Dave Airlie 
---
 src/compiler/glsl/ir_uniform.h  | 6 ++
 src/compiler/glsl/link_atomics.cpp  | 5 +
 src/compiler/glsl/link_uniforms.cpp | 1 +
 3 files changed, 12 insertions(+)

diff --git a/src/compiler/glsl/ir_uniform.h b/src/compiler/glsl/ir_uniform.h
index 9545c49..bfb7f33 100644
--- a/src/compiler/glsl/ir_uniform.h
+++ b/src/compiler/glsl/ir_uniform.h
@@ -184,6 +184,12 @@ struct gl_uniform_storage {
int atomic_buffer_index;
 
/**
+* For drivers with limited shared hw atomic counters, this is the
+* the index into the hw counters within all linked shaders.
+*/
+   int atomic_hw_counter_index;
+
+   /**
 * The 'base location' for this uniform in the uniform remap table. For
 * arrays this is the first element in the array.
 * for subroutines this is in shader subroutine uniform remap table.
diff --git a/src/compiler/glsl/link_atomics.cpp 
b/src/compiler/glsl/link_atomics.cpp
index d26e62a..dbf7942 100644
--- a/src/compiler/glsl/link_atomics.cpp
+++ b/src/compiler/glsl/link_atomics.cpp
@@ -212,6 +212,8 @@ link_assign_atomic_counter_resources(struct gl_context *ctx,
prog->data->NumAtomicBuffers = num_buffers;
 
unsigned i = 0;
+   unsigned hw_counter_index = 0;
+
for (unsigned binding = 0;
 binding < ctx->Const.MaxAtomicBufferBindings;
 binding++) {
@@ -245,6 +247,9 @@ link_assign_atomic_counter_resources(struct gl_context *ctx,
  storage->offset = var->data.offset;
  storage->array_stride = (var->type->is_array() ?
   var->type->without_array()->atomic_size() : 
0);
+ storage->atomic_hw_counter_index = hw_counter_index;
+ hw_counter_index += storage->array_elements ? storage->array_elements 
: 1;
+
  if (!var->type->is_matrix())
 storage->matrix_stride = 0;
   }
diff --git a/src/compiler/glsl/link_uniforms.cpp 
b/src/compiler/glsl/link_uniforms.cpp
index 7d14154..6bf7e01 100644
--- a/src/compiler/glsl/link_uniforms.cpp
+++ b/src/compiler/glsl/link_uniforms.cpp
@@ -824,6 +824,7 @@ private:
   this->uniforms[id].num_driver_storage = 0;
   this->uniforms[id].driver_storage = NULL;
   this->uniforms[id].atomic_buffer_index = -1;
+  this->uniforms[id].atomic_hw_counter_index = -1;
   this->uniforms[id].hidden =
  current_var->data.how_declared == ir_var_hidden;
   this->uniforms[id].builtin = is_gl_identifier(name);
-- 
2.9.5

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[Mesa-dev] [PATCH 09/10] r600: add support for hw atomic counters.

[Dave Airlie]

From: Dave Airlie 

This adds support for the evergreen/cayman atomic counters.

These are implemented using GDS append/consume counters. The values
for each counter are loaded before drawing and saved after each draw
using special CP packets.

Signed-off-by: Dave Airlie 
---
 src/gallium/drivers/r600/evergreen_state.c   | 159 
 src/gallium/drivers/r600/r600_pipe.c |  14 ++
 src/gallium/drivers/r600/r600_pipe.h |  22 +++
 src/gallium/drivers/r600/r600_shader.c   | 209 ---
 src/gallium/drivers/r600/r600_shader.h   |   9 ++
 src/gallium/drivers/r600/r600_state_common.c |   9 ++
 src/gallium/drivers/r600/r600d_common.h  |   2 +
 7 files changed, 402 insertions(+), 22 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c 
b/src/gallium/drivers/r600/evergreen_state.c
index 96eb35a..ccc5798 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -3716,6 +3716,38 @@ static void evergreen_set_tess_state(struct pipe_context 
*ctx,
rctx->tess_state_dirty = true;
 }
 
+static void evergreen_set_hw_atomic_buffers(struct pipe_context *ctx,
+   unsigned start_slot,
+   unsigned count,
+   const struct pipe_shader_buffer 
*buffers)
+{
+   struct r600_context *rctx = (struct r600_context *)ctx;
+   struct r600_atomic_buffer_state *astate;
+   int i, idx;
+
+   astate = >atomic_buffer_state;
+
+   /* we'd probably like to expand this to 8 later so put the logic in */
+   for (i = start_slot, idx = 0; i < start_slot + count; i++, idx++) {
+   const struct pipe_shader_buffer *buf;
+   struct pipe_shader_buffer *abuf;
+
+   abuf = >buffer[i];
+
+   if (!buffers || !buffers[idx].buffer) {
+   pipe_resource_reference(>buffer, NULL);
+   astate->enabled_mask &= ~(1 << i);
+   continue;
+   }
+   buf = [idx];
+
+   pipe_resource_reference(>buffer, buf->buffer);
+   abuf->buffer_offset = buf->buffer_offset;
+   abuf->buffer_size = buf->buffer_size;
+   astate->enabled_mask |= (1 << i);
+   }
+}
+
 void evergreen_init_state_functions(struct r600_context *rctx)
 {
unsigned id = 1;
@@ -3801,6 +3833,7 @@ void evergreen_init_state_functions(struct r600_context 
*rctx)
rctx->b.b.set_polygon_stipple = evergreen_set_polygon_stipple;
rctx->b.b.set_min_samples = evergreen_set_min_samples;
rctx->b.b.set_tess_state = evergreen_set_tess_state;
+   rctx->b.b.set_hw_atomic_buffers = evergreen_set_hw_atomic_buffers;
if (rctx->b.chip_class == EVERGREEN)
 rctx->b.b.get_sample_position = evergreen_get_sample_position;
 else
@@ -4107,3 +4140,129 @@ void eg_trace_emit(struct r600_context *rctx)
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
radeon_emit(cs, AC_ENCODE_TRACE_POINT(rctx->trace_id));
 }
+
+bool evergreen_emit_atomic_buffer_setup(struct r600_context *rctx,
+   struct r600_shader_atomic 
*combined_atomics,
+   uint8_t *atomic_used_mask_p)
+{
+   struct radeon_winsys_cs *cs = rctx->b.gfx.cs;
+   struct r600_atomic_buffer_state *astate = >atomic_buffer_state;
+   unsigned pkt_flags = 0;
+   uint8_t atomic_used_mask = 0;
+   int i, j, k;
+
+   for (i = 0; i < EG_NUM_HW_STAGES; i++) {
+   uint8_t num_atomic_stage;
+   struct r600_pipe_shader *pshader;
+
+   pshader = rctx->hw_shader_stages[i].shader;
+   if (!pshader)
+   continue;
+
+   num_atomic_stage = pshader->shader.nhwatomic;
+   if (!num_atomic_stage)
+   continue;
+
+   for (j = 0; j < num_atomic_stage; j++) {
+   struct r600_shader_atomic *atomic = 
>shader.atomics[j];
+   int natomics = atomic->end - atomic->start + 1;
+
+   for (k = 0; k < natomics; k++) {
+   /* seen this in a previous stage */
+   if (atomic_used_mask & (1u << (atomic->hw_idx + 
k)))
+   continue;
+
+   combined_atomics[atomic->hw_idx + k].hw_idx = 
atomic->hw_idx + k;
+   combined_atomics[atomic->hw_idx + k].buffer_id 
= atomic->buffer_id;
+   combined_atomics[atomic->hw_idx + k].start = 
atomic->start + k;
+   combined_atomics[atomic->hw_idx + k].end = 
combined_atomics[atomic->hw_idx + k].start + 1;
+   atomic_used_mask |= (1u 

[Mesa-dev] [PATCH 08/10] st/mesa: add support for hw atomics to glsl->tgsi.

[Dave Airlie]

From: Dave Airlie 

This adds support for creating the hw atomic tgsi from
the glsl codepaths.

Signed-off-by: Dave Airlie 
---
 src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 110 -
 1 file changed, 94 insertions(+), 16 deletions(-)

diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp 
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 54e1961..f6d4db6 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -152,6 +152,13 @@ find_array_type(struct inout_decl *decls, unsigned count, 
unsigned array_id)
return GLSL_TYPE_ERROR;
 }
 
+struct hwatomic_decl {
+   unsigned location;
+   unsigned binding;
+   unsigned size;
+   unsigned array_id;
+};
+
 struct glsl_to_tgsi_visitor : public ir_visitor {
 public:
glsl_to_tgsi_visitor();
@@ -176,6 +183,9 @@ public:
unsigned num_outputs;
unsigned num_output_arrays;
 
+   struct hwatomic_decl atomic_info[PIPE_MAX_HW_ATOMIC_BUFFERS];
+   unsigned num_atomics;
+   unsigned num_atomic_arrays;
int num_address_regs;
uint32_t samplers_used;
glsl_base_type sampler_types[PIPE_MAX_SAMPLERS];
@@ -299,7 +309,8 @@ public:
   unsigned *base,
   uint16_t *index,
   st_src_reg *reladdr,
-  bool opaque);
+  bool opaque,
+  uint8_t *hw_atomic_id);
   void calc_deref_offsets(ir_dereference *tail,
   unsigned *array_elements,
   uint16_t *index,
@@ -3206,24 +3217,67 @@ 
glsl_to_tgsi_visitor::visit_atomic_counter_intrinsic(ir_call *ir)
exec_node *param = ir->actual_parameters.get_head();
ir_dereference *deref = static_cast(param);
ir_variable *location = deref->variable_referenced();
-
-   st_src_reg buffer(
- PROGRAM_BUFFER, location->data.binding, GLSL_TYPE_ATOMIC_UINT);
-
+   bool has_hw_atomics = st_context(ctx)->has_hw_atomics;
/* Calculate the surface offset */
st_src_reg offset;
unsigned array_size = 0, base = 0;
uint16_t index = 0;
+   uint8_t hw_atomic_index;
+   st_src_reg resource;
 
-   get_deref_offsets(deref, _size, , , , false);
+   get_deref_offsets(deref, _size, , , , false, 
_atomic_index);
 
-   if (offset.file != PROGRAM_UNDEFINED) {
-  emit_asm(ir, TGSI_OPCODE_MUL, st_dst_reg(offset),
-   offset, st_src_reg_for_int(ATOMIC_COUNTER_SIZE));
-  emit_asm(ir, TGSI_OPCODE_ADD, st_dst_reg(offset),
-   offset, st_src_reg_for_int(location->data.offset + index * 
ATOMIC_COUNTER_SIZE));
+   if (has_hw_atomics) {
+  variable_storage *entry = find_variable_storage(location);
+  st_src_reg buffer(PROGRAM_HW_ATOMIC, 0, GLSL_TYPE_ATOMIC_UINT, 
location->data.binding);
+
+  if (!entry) {
+ entry = new(mem_ctx) variable_storage(location, PROGRAM_HW_ATOMIC,
+   num_atomics);
+ _mesa_hash_table_insert(this->variables, location, entry);
+
+ atomic_info[num_atomics].location = location->data.location;
+ atomic_info[num_atomics].binding = location->data.binding;
+ atomic_info[num_atomics].size = 
location->type->arrays_of_arrays_size();
+ atomic_info[num_atomics].array_id = 0;
+ num_atomics++;
+  }
+
+  if (offset.file != PROGRAM_UNDEFINED) {
+ if (atomic_info[entry->index].array_id == 0) {
+num_atomic_arrays++;
+atomic_info[entry->index].array_id = num_atomic_arrays;
+ }
+ buffer.array_id = atomic_info[entry->index].array_id;
+  }
+
+  buffer.index = index;
+  buffer.index += location->data.offset / ATOMIC_COUNTER_SIZE;
+  buffer.has_index2 = true;
+
+  if (offset.file != PROGRAM_UNDEFINED) {
+ buffer.reladdr = ralloc(mem_ctx, st_src_reg);
+ *buffer.reladdr = offset;
+ emit_arl(ir, sampler_reladdr, offset);
+  } else
+ hw_atomic_index += index;
+
+  offset = st_src_reg_for_int(hw_atomic_index);
+
+  resource = buffer;
} else {
-  offset = st_src_reg_for_int(location->data.offset + index * 
ATOMIC_COUNTER_SIZE);
+  st_src_reg buffer(PROGRAM_BUFFER, location->data.binding,
+GLSL_TYPE_ATOMIC_UINT);
+
+  if (offset.file != PROGRAM_UNDEFINED) {
+ emit_asm(ir, TGSI_OPCODE_MUL, st_dst_reg(offset),
+  offset, st_src_reg_for_int(ATOMIC_COUNTER_SIZE));
+ emit_asm(ir, TGSI_OPCODE_ADD, st_dst_reg(offset),
+  offset, st_src_reg_for_int(location->data.offset + index * 
ATOMIC_COUNTER_SIZE));
+  } else {
+ offset = st_src_reg_for_int(location->data.offset + index * 
ATOMIC_COUNTER_SIZE);
+  }
+  resource = buffer;
}
 
ir->return_deref->accept(this);
@@ -3286,7 +3340,7 @@ 
glsl_to_tgsi_visitor::visit_atomic_counter_intrinsic(ir_call *ir)
   inst = 

[Mesa-dev] [PATCH 03/10] gallium/tgsi: start adding hw atomics

[Dave Airlie]

From: Dave Airlie 

This adds support for a hw atomic counters to TGSI.

A new register file for storing atomic counters is added,
along with a new atomic counter semantic, along with docs
for both.

Signed-off-by: Dave Airlie 
---
 src/gallium/auxiliary/tgsi/tgsi_strings.c  |  2 +
 src/gallium/auxiliary/tgsi/tgsi_ureg.c | 89 ++
 src/gallium/auxiliary/tgsi/tgsi_ureg.h |  8 +++
 src/gallium/docs/source/tgsi.rst   | 45 ++-
 src/gallium/include/pipe/p_shader_tokens.h |  2 +
 src/gallium/include/pipe/p_state.h |  1 +
 6 files changed, 144 insertions(+), 3 deletions(-)

diff --git a/src/gallium/auxiliary/tgsi/tgsi_strings.c 
b/src/gallium/auxiliary/tgsi/tgsi_strings.c
index 0872db9..3a6761d 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_strings.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_strings.c
@@ -58,6 +58,7 @@ static const char *tgsi_file_names[] =
"BUFFER",
"MEMORY",
"CONSTBUF",
+   "HWATOMIC",
 };
 
 const char *tgsi_semantic_names[TGSI_SEMANTIC_COUNT] =
@@ -107,6 +108,7 @@ const char *tgsi_semantic_names[TGSI_SEMANTIC_COUNT] =
"SUBGROUP_GT_MASK",
"SUBGROUP_LE_MASK",
"SUBGROUP_LT_MASK",
+   "HW_ATOMIC_INDEX",
 };
 
 const char *tgsi_texture_names[TGSI_TEXTURE_COUNT] =
diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.c 
b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
index b26434c..1be417b 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_ureg.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
@@ -80,6 +80,7 @@ struct ureg_tokens {
 #define UREG_MAX_SYSTEM_VALUE PIPE_MAX_ATTRIBS
 #define UREG_MAX_OUTPUT (4 * PIPE_MAX_SHADER_OUTPUTS)
 #define UREG_MAX_CONSTANT_RANGE 32
+#define UREG_MAX_HW_ATOMIC_RANGE 32
 #define UREG_MAX_IMMEDIATE 4096
 #define UREG_MAX_ADDR 3
 #define UREG_MAX_ARRAY_TEMPS 256
@@ -92,6 +93,16 @@ struct const_decl {
unsigned nr_constant_ranges;
 };
 
+struct hw_atomic_decl {
+   struct {
+  unsigned first;
+  unsigned last;
+  unsigned hw_atomic_base;
+  unsigned array_id;
+   } hw_atomic_range[UREG_MAX_HW_ATOMIC_RANGE];
+   unsigned nr_hw_atomic_ranges;
+};
+
 #define DOMAIN_DECL 0
 #define DOMAIN_INSN 1
 
@@ -182,6 +193,8 @@ struct ureg_program
 
struct const_decl const_decls[PIPE_MAX_CONSTANT_BUFFERS];
 
+   struct hw_atomic_decl hw_atomic_decls[PIPE_MAX_HW_ATOMIC_BUFFERS];
+
unsigned properties[TGSI_PROPERTY_COUNT];
 
unsigned nr_addrs;
@@ -583,6 +596,30 @@ out:
return ureg_src_dimension(src, 0);
 }
 
+
+/* Returns a new hw atomic register.  Keep track of which have been
+ * referred to so that we can emit decls later.
+ */
+void
+ureg_DECL_hw_atomic(struct ureg_program *ureg,
+   unsigned first,
+   unsigned last,
+   unsigned buffer_id,
+unsigned array_id,
+   unsigned hw_atomic_base)
+{
+   struct hw_atomic_decl *decl = >hw_atomic_decls[buffer_id];
+
+   if (decl->nr_hw_atomic_ranges < UREG_MAX_HW_ATOMIC_RANGE) {
+  uint i = decl->nr_hw_atomic_ranges++;
+
+  decl->hw_atomic_range[i].first = first;
+  decl->hw_atomic_range[i].last = last;
+  decl->hw_atomic_range[i].array_id = array_id;
+  decl->hw_atomic_range[i].hw_atomic_base = hw_atomic_base;
+   }
+}
+
 static struct ureg_dst alloc_temporary( struct ureg_program *ureg,
 boolean local )
 {
@@ -1501,6 +1538,41 @@ emit_decl_semantic(struct ureg_program *ureg,
}
 }
 
+static void
+emit_decl_semantic_atomic_2d(struct ureg_program *ureg,
+unsigned first,
+unsigned last,
+unsigned index2D,
+ unsigned array_id,
+unsigned semantic_index)
+{
+   union tgsi_any_token *out = get_tokens(ureg, DOMAIN_DECL, array_id ? 5 : 4);
+
+   out[0].value = 0;
+   out[0].decl.Type = TGSI_TOKEN_TYPE_DECLARATION;
+   out[0].decl.NrTokens = 3;
+   out[0].decl.File = TGSI_FILE_HW_ATOMIC;
+   out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW;
+   out[0].decl.Semantic = 1;
+   out[0].decl.Dimension = 1;
+   out[0].decl.Array = array_id != 0;
+
+   out[1].value = 0;
+   out[1].decl_range.First = first;
+   out[1].decl_range.Last = last;
+
+   out[2].value = 0;
+   out[2].decl_dim.Index2D = index2D;
+
+   out[3].value = 0;
+   out[3].decl_semantic.Name = TGSI_SEMANTIC_HW_ATOMIC_INDEX;
+   out[3].decl_semantic.Index = semantic_index;
+
+   if (array_id) {
+  out[4].value = 0;
+  out[4].array.ArrayID = array_id;
+   }
+}
 
 static void
 emit_decl_fs(struct ureg_program *ureg,
@@ -1908,6 +1980,23 @@ static void emit_decls( struct ureg_program *ureg )
   }
}
 
+   for (i = 0; i < PIPE_MAX_HW_ATOMIC_BUFFERS; i++) {
+  struct hw_atomic_decl *decl = >hw_atomic_decls[i];
+
+  if (decl->nr_hw_atomic_ranges) {
+ uint j;
+
+ for (j = 0; j < decl->nr_hw_atomic_ranges; j++) {
+

[Mesa-dev] [PATCH 07/10] st/mesa: setup hw atomic limits.

[Dave Airlie]

From: Dave Airlie 

HW atomics need to use caps to set some limits, and some
other limits may also need limiting.

This fixes things up to work for evergreen hw, it may need
more changes in the future if other hw wants to use this path.

Signed-off-by: Dave Airlie 
---
 src/mesa/state_tracker/st_extensions.c | 45 ++
 1 file changed, 35 insertions(+), 10 deletions(-)

diff --git a/src/mesa/state_tracker/st_extensions.c 
b/src/mesa/state_tracker/st_extensions.c
index fa2d002..ea5002b 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -79,6 +79,7 @@ void st_init_limits(struct pipe_screen *screen,
unsigned sh;
boolean can_ubo = TRUE;
int temp;
+   bool ssbo_atomic = true;
 
c->MaxTextureLevels
   = _min(screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS),
@@ -243,11 +244,21 @@ void st_init_limits(struct pipe_screen *screen,
   c->MaxUniformBlockSize / 4 *
   pc->MaxUniformBlocks);
 
-  pc->MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
-  pc->MaxAtomicBuffers = screen->get_shader_param(
-screen, sh, PIPE_SHADER_CAP_MAX_SHADER_BUFFERS) / 2;
-  pc->MaxShaderStorageBlocks = pc->MaxAtomicBuffers;
-
+  temp = screen->get_shader_param(screen, sh, 
PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS);
+  if (temp) {
+ /*
+  * for separate atomic counters get the actual hw limits
+  * per stage on atomic counters and buffers
+  */
+ssbo_atomic = false;
+ pc->MaxAtomicCounters = temp;
+ pc->MaxAtomicBuffers = screen->get_shader_param(screen, sh, 
PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS);
+ pc->MaxShaderStorageBlocks = screen->get_shader_param(screen, sh, 
PIPE_SHADER_CAP_MAX_SHADER_BUFFERS);
+  } else {
+ pc->MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
+ pc->MaxAtomicBuffers = screen->get_shader_param(screen, sh, 
PIPE_SHADER_CAP_MAX_SHADER_BUFFERS) / 2;
+ pc->MaxShaderStorageBlocks = pc->MaxAtomicBuffers;
+  }
   pc->MaxImageUniforms = screen->get_shader_param(
 screen, sh, PIPE_SHADER_CAP_MAX_SHADER_IMAGES);
 
@@ -407,14 +418,26 @@ void st_init_limits(struct pipe_screen *screen,
   screen->get_param(screen, PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL);
 
c->MaxAtomicBufferBindings =
- c->Program[MESA_SHADER_FRAGMENT].MaxAtomicBuffers;
-   c->MaxCombinedAtomicBuffers =
+  c->Program[MESA_SHADER_FRAGMENT].MaxAtomicBuffers;
+
+   if (!ssbo_atomic) {
+  /* for separate atomic buffers - there atomic buffer size will be
+ limited */
+  c->MaxAtomicBufferSize = 
c->Program[MESA_SHADER_FRAGMENT].MaxAtomicCounters * ATOMIC_COUNTER_SIZE;
+  /* on all HW with separate atomic (evergreen) the following
+ lines are true. not sure it's worth adding CAPs for this at this
+ stage. */
+  c->MaxCombinedAtomicCounters = 
c->Program[MESA_SHADER_FRAGMENT].MaxAtomicCounters;
+  c->MaxCombinedAtomicBuffers = 
c->Program[MESA_SHADER_FRAGMENT].MaxAtomicBuffers;
+   } else {
+  c->MaxCombinedAtomicBuffers =
  c->Program[MESA_SHADER_VERTEX].MaxAtomicBuffers +
  c->Program[MESA_SHADER_TESS_CTRL].MaxAtomicBuffers +
  c->Program[MESA_SHADER_TESS_EVAL].MaxAtomicBuffers +
  c->Program[MESA_SHADER_GEOMETRY].MaxAtomicBuffers +
  c->Program[MESA_SHADER_FRAGMENT].MaxAtomicBuffers;
-   assert(c->MaxCombinedAtomicBuffers <= MAX_COMBINED_ATOMIC_BUFFERS);
+  assert(c->MaxCombinedAtomicBuffers <= MAX_COMBINED_ATOMIC_BUFFERS);
+   }
 
if (c->MaxCombinedAtomicBuffers > 0) {
   extensions->ARB_shader_atomic_counters = GL_TRUE;
@@ -425,8 +448,10 @@ void st_init_limits(struct pipe_screen *screen,
c->ShaderStorageBufferOffsetAlignment =
   screen->get_param(screen, PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT);
if (c->ShaderStorageBufferOffsetAlignment) {
-  c->MaxCombinedShaderStorageBlocks = c->MaxShaderStorageBufferBindings =
- c->MaxCombinedAtomicBuffers;
+  /* for hw atomic counters leaves these at default for now */
+  if (ssbo_atomic)
+ c->MaxCombinedShaderStorageBlocks = c->MaxShaderStorageBufferBindings 
=
+c->MaxCombinedAtomicBuffers;
   c->MaxCombinedShaderOutputResources +=
  c->MaxCombinedShaderStorageBlocks;
   c->MaxShaderStorageBlockSize = 1 << 27;
-- 
2.9.5

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[Mesa-dev] [PATCH 06/10] st/mesa: start adding support for hw atomics atom.

[Dave Airlie]

From: Dave Airlie 

This adds a new atom that calls the new driver API to
bind buffers containing hw atomics.

Signed-off-by: Dave Airlie 
---
 src/mesa/state_tracker/st_atom_atomicbuf.c   | 37 
 src/mesa/state_tracker/st_atom_list.h|  2 ++
 src/mesa/state_tracker/st_cb_bufferobjects.c |  2 +-
 src/mesa/state_tracker/st_context.c  |  9 ++-
 src/mesa/state_tracker/st_context.h  |  1 +
 5 files changed, 49 insertions(+), 2 deletions(-)

diff --git a/src/mesa/state_tracker/st_atom_atomicbuf.c 
b/src/mesa/state_tracker/st_atom_atomicbuf.c
index ee5944f..9c518a0 100644
--- a/src/mesa/state_tracker/st_atom_atomicbuf.c
+++ b/src/mesa/state_tracker/st_atom_atomicbuf.c
@@ -128,3 +128,40 @@ st_bind_cs_atomics(struct st_context *st)
 
st_bind_atomics(st, prog, PIPE_SHADER_COMPUTE);
 }
+
+void
+st_bind_hw_atomic_buffers(struct st_context *st)
+{
+   struct pipe_shader_buffer buffers[PIPE_MAX_HW_ATOMIC_BUFFERS];
+   int i;
+   int num_buffers = 0;
+
+   if (!st->has_hw_atomics)
+  return;
+
+   for (i = 0; i < MAX_COMBINED_ATOMIC_BUFFERS; i++) {
+  struct gl_buffer_binding *binding = >ctx->AtomicBufferBindings[i];
+  struct st_buffer_object *st_obj = 
st_buffer_object(binding->BufferObject);
+  struct pipe_shader_buffer *sb = [num_buffers];
+
+  if (st_obj && st_obj->buffer) {
+sb->buffer = st_obj->buffer;
+sb->buffer_offset = binding->Offset;
+sb->buffer_size = st_obj->buffer->width0 - binding->Offset;
+
+/* AutomaticSize is FALSE if the buffer was set with BindBufferRange.
+ * Take the minimum just to be sure.
+ */
+if (!binding->AutomaticSize)
+  sb->buffer_size = MIN2(sb->buffer_size, (unsigned) binding->Size);
+num_buffers++;
+  } else {
+sb->buffer = NULL;
+sb->buffer_offset = 0;
+sb->buffer_size = 0;
+  }
+   }
+
+   st->pipe->set_hw_atomic_buffers(st->pipe, 0, num_buffers,
+   buffers);
+}
diff --git a/src/mesa/state_tracker/st_atom_list.h 
b/src/mesa/state_tracker/st_atom_list.h
index b76854e..8f50a72 100644
--- a/src/mesa/state_tracker/st_atom_list.h
+++ b/src/mesa/state_tracker/st_atom_list.h
@@ -66,6 +66,8 @@ ST_STATE(ST_NEW_GS_SSBOS, st_bind_gs_ssbos)
 ST_STATE(ST_NEW_PIXEL_TRANSFER, st_update_pixel_transfer)
 ST_STATE(ST_NEW_TESS_STATE, st_update_tess)
 
+ST_STATE(ST_NEW_HW_ATOMICS, st_bind_hw_atomic_buffers)
+
 /* this must be done after the vertex program update */
 ST_STATE(ST_NEW_VERTEX_ARRAYS, st_update_array)
 
diff --git a/src/mesa/state_tracker/st_cb_bufferobjects.c 
b/src/mesa/state_tracker/st_cb_bufferobjects.c
index 86ebfc6..03fae95 100644
--- a/src/mesa/state_tracker/st_cb_bufferobjects.c
+++ b/src/mesa/state_tracker/st_cb_bufferobjects.c
@@ -348,7 +348,7 @@ bufferobj_data(struct gl_context *ctx,
if (st_obj->Base.UsageHistory & USAGE_TEXTURE_BUFFER)
   ctx->NewDriverState |= ST_NEW_SAMPLER_VIEWS | ST_NEW_IMAGE_UNITS;
if (st_obj->Base.UsageHistory & USAGE_ATOMIC_COUNTER_BUFFER)
-  ctx->NewDriverState |= ST_NEW_ATOMIC_BUFFER;
+  ctx->NewDriverState |= st->has_hw_atomics ? ST_NEW_HW_ATOMICS : 
ST_NEW_ATOMIC_BUFFER;
 
return GL_TRUE;
 }
diff --git a/src/mesa/state_tracker/st_context.c 
b/src/mesa/state_tracker/st_context.c
index 5d8dd8b..e82090b 100644
--- a/src/mesa/state_tracker/st_context.c
+++ b/src/mesa/state_tracker/st_context.c
@@ -405,6 +405,10 @@ st_create_context_priv( struct gl_context *ctx, struct 
pipe_context *pipe,
st->has_multi_draw_indirect =
   screen->get_param(screen, PIPE_CAP_MULTI_DRAW_INDIRECT);
 
+   st->has_hw_atomics =
+  screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
+   PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS) ? true 
: false;
+
/* GL limits and extensions */
st_init_limits(pipe->screen, >Const, >Extensions);
st_init_extensions(pipe->screen, >Const,
@@ -497,7 +501,10 @@ static void st_init_driver_flags(struct st_context *st)
 
/* Shader resources */
f->NewTextureBuffer = ST_NEW_SAMPLER_VIEWS;
-   f->NewAtomicBuffer = ST_NEW_ATOMIC_BUFFER;
+   if (st->has_hw_atomics)
+  f->NewAtomicBuffer = ST_NEW_HW_ATOMICS;
+   else
+  f->NewAtomicBuffer = ST_NEW_ATOMIC_BUFFER;
f->NewShaderStorageBuffer = ST_NEW_STORAGE_BUFFER;
f->NewImageUnits = ST_NEW_IMAGE_UNITS;
 
diff --git a/src/mesa/state_tracker/st_context.h 
b/src/mesa/state_tracker/st_context.h
index ced915e..9f33eed 100644
--- a/src/mesa/state_tracker/st_context.h
+++ b/src/mesa/state_tracker/st_context.h
@@ -129,6 +129,7 @@ struct st_context
boolean invalidate_on_gl_viewport;
boolean draw_needs_minmax_index;
boolean vertex_array_out_of_memory;
+   boolean has_hw_atomics;
 
/* Some state is contained in constant objects.
 * Other state is just parameter values.
-- 
2.9.5

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[Mesa-dev] [PATCH 10/10] docs: update r600 atomic counter status.

[Dave Airlie]

From: Dave Airlie 

Signed-off-by: Dave Airlie 
---
 docs/features.txt | 6 +++---
 docs/relnotes/17.4.0.html | 1 +
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/docs/features.txt b/docs/features.txt
index d228a02..1d03326 100644
--- a/docs/features.txt
+++ b/docs/features.txt
@@ -150,7 +150,7 @@ GL 4.2, GLSL 4.20 -- all DONE: i965/gen7+, nvc0, radeonsi
 
   GL_ARB_texture_compression_bptc   DONE (i965, r600)
   GL_ARB_compressed_texture_pixel_storage   DONE (all drivers)
-  GL_ARB_shader_atomic_counters DONE (i965, softpipe)
+  GL_ARB_shader_atomic_counters DONE (i965, r600, 
softpipe)
   GL_ARB_texture_storageDONE (all drivers)
   GL_ARB_transform_feedback_instanced   DONE (i965, nv50, 
r600, llvmpipe, softpipe, swr)
   GL_ARB_base_instance  DONE (i965, nv50, 
r600, llvmpipe, softpipe, swr)
@@ -227,7 +227,7 @@ GL 4.6, GLSL 4.60
   GL_ARB_indirect_parametersDONE (i965/gen7+, 
nvc0, radeonsi)
   GL_ARB_pipeline_statistics_query  DONE (i965, nvc0, 
radeonsi, llvmpipe, softpipe, swr)
   GL_ARB_polygon_offset_clamp   DONE (i965, nv50, 
nvc0, r600, radeonsi, llvmpipe, swr)
-  GL_ARB_shader_atomic_counter_ops  DONE (i965/gen7+, 
nvc0, radeonsi, softpipe)
+  GL_ARB_shader_atomic_counter_ops  DONE (i965/gen7+, 
nvc0, r600, radeonsi, softpipe)
   GL_ARB_shader_draw_parameters DONE (i965, nvc0, 
radeonsi)
   GL_ARB_shader_group_vote  DONE (i965, nvc0, 
radeonsi)
   GL_ARB_spirv_extensions   in progress (Nicolai 
Hähnle, Ian Romanick)
@@ -246,7 +246,7 @@ GLES3.1, GLSL ES 3.1 -- all DONE: i965/hsw+, nvc0, radeonsi
   GL_ARB_explicit_uniform_location  DONE (all drivers that 
support GLSL)
   GL_ARB_framebuffer_no_attachments DONE (i965/gen7+, 
r600, softpipe)
   GL_ARB_program_interface_queryDONE (all drivers)
-  GL_ARB_shader_atomic_counters DONE (i965/gen7+, 
softpipe)
+  GL_ARB_shader_atomic_counters DONE (i965/gen7+, 
r600, softpipe)
   GL_ARB_shader_image_load_storeDONE (i965/gen7+, 
softpipe)
   GL_ARB_shader_image_size  DONE (i965/gen7+, 
softpipe)
   GL_ARB_shader_storage_buffer_object   DONE (i965/gen7+, 
softpipe)
diff --git a/docs/relnotes/17.4.0.html b/docs/relnotes/17.4.0.html
index f81b5bd..19e0c80 100644
--- a/docs/relnotes/17.4.0.html
+++ b/docs/relnotes/17.4.0.html
@@ -45,6 +45,7 @@ Note: some of the new features are only available with 
certain drivers.
 
 
 Disk shader cache support for i965 when MESA_GLSL_CACHE_DISABLE 
environment variable is set to "0" or "false"
+GL_ARB_shader_atomic_counters and GL_ARB_shader_atomic_counter_ops on 
r600/evergreen+
 
 
 Bug fixes
-- 
2.9.5

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Re: [Mesa-dev] [PATCH 00/17] Add support for GL_EXT_semaphore

[Andres Rodriguez]

That's actually a pretty good suggestion, as it would help me get my feet
wet on piglit changes with something simple.

Thanks,
Andres

On Nov 2, 2017 1:24 AM, "Timothy Arceri"  wrote:

> On 02/11/17 15:12, Andres Rodriguez wrote:
>
>> It was tested against steamvr using an opengl vr client (hellovr_opengl
>> for simplicity).
>>
>
> Hi Andres,
>
> Full tests would be great but at the very least we should start with some
> piglit tests that exercise the error paths.
>
> Tim
>
>
>> Regards,
>> Andres
>>
>>
>> On 2017-11-02 12:07 AM, Jason Ekstrand wrote:
>>
>>> Out of curiosity, how has this series been tested beyond regression
>>> testing?
>>>
>>>
>>> On November 1, 2017 20:57:57 Andres Rodriguez 
>>> wrote:
>>>
>>> This series adds radeonsi support for GL_EXT_semaphore.

 GL_EXT_semaphore is used by steam's vrclient to synchronize access to
 shared
 surfaces (vulkan <-> gl interop). It allows our gl vrclients to enqueue
 their
 framebuffer surface without waiting for a glFinish().

 If anyone has any suggestions on improvements for the implicit flush
 added in
 patch 9 please let me know. Either a way to remove it, or a way to move
 it to
 a codepath that is a bit more specific to radeonsi.

 Test results for this series (pretty alpha quality auto testing):
 https://lostgoat.me/gpuci/jenkins/blue/organizations/jenkins
 /amdgpu-reviews/detail/amdgpu-reviews/184/pipeline

 Test results for each individual patch can also be found here (see
 'Related
 Changes' section):
 https://gerrit.lostgoat.me/#/c/454/

 And here is a baseline for test results for comparison:
 https://lostgoat.me/gpuci/jenkins/blue/organizations/jenkins
 /amdgpu-master/detail/amdgpu-master/1269/tests

 Tests include Vulkan CTS and piglit on Kaveri and Polaris 10.

 I just kicked off the tests, so they might still show in a queued/in
 progress
 state for a few hours. Hopefully my ryzen server and my test slaves
 survive the
 unsupervised effort (*fingers crossed it doesn't catch fire while I
 sleep*).

 Patches 1-12 add support for semaphore wait/signal/import
 Patch 13 implements buffer/texture barriers
 Patches 14-16 implement layout transitions
 Patch 17 exposes the extension

 Andres Rodriguez (17):
   gallium: introduce PIPE_CAP_SEMAPHORE
   mesa/st: expose EXT_semaphore and EXT_semaphore_fd
   mesa: add support for semaphore object creation/import/delete
   mesa: add semaphore parameter stub
   gallium: introduce semaphore object
   u_threaded_context: add support for semaphore wait/signal
   mesa/st: add support for semaphore object create/import/delete
   mesa: add support for semaphore object signal/wait
   mesa/st: add support for waiting for semaphore objects
   mesa: minor tidy up for memory object error strings
   winsys/amdgpu: add support for syncobj signaling
   radeonsi: implement semaphore operations
   mesa: implement buffer/texture barriers for semaphore wait/signal
   gallium: add transition_resource call
   mesa/st: hook up resource transitions for semaphore calls
   radeonsi: implement pipe transition_resource callback
   radeonsi: advertise support for GL_EXT_semaphore

  src/gallium/auxiliary/util/u_threaded_context.c|  52 
  .../auxiliary/util/u_threaded_context_calls.h  |   1 +
  src/gallium/docs/source/screen.rst |   1 +
  src/gallium/drivers/ddebug/dd_context.c|  23 ++
  src/gallium/drivers/ddebug/dd_screen.c |  25 ++
  src/gallium/drivers/etnaviv/etnaviv_screen.c   |   1 +
  src/gallium/drivers/freedreno/freedreno_screen.c   |   1 +
  src/gallium/drivers/i915/i915_screen.c |   1 +
  src/gallium/drivers/llvmpipe/lp_screen.c   |   1 +
  src/gallium/drivers/nouveau/nv30/nv30_screen.c |   1 +
  src/gallium/drivers/nouveau/nv50/nv50_screen.c |   1 +
  src/gallium/drivers/nouveau/nvc0/nvc0_screen.c |   1 +
  src/gallium/drivers/r300/r300_screen.c |   1 +
  src/gallium/drivers/r600/r600_pipe.c   |   1 +
  src/gallium/drivers/radeon/r600_pipe_common.c  |  52 
  src/gallium/drivers/radeon/r600_pipe_common.h  |   5 +
  src/gallium/drivers/radeon/radeon_winsys.h |  12 +
  src/gallium/drivers/radeonsi/si_blit.c |  11 +
  src/gallium/drivers/radeonsi/si_pipe.c |   3 +
  src/gallium/drivers/softpipe/sp_screen.c   |   1 +
  src/gallium/drivers/svga/svga_screen.c |   1 +
  src/gallium/drivers/swr/swr_screen.cpp |   1 +
  src/gallium/drivers/trace/tr_context.c |  36 +++
  src/gallium/drivers/trace/tr_screen.c  |  39 +++
  

Re: [Mesa-dev] [PATCH 00/17] Add support for GL_EXT_semaphore

[Timothy Arceri]

On 02/11/17 15:12, Andres Rodriguez wrote:
It was tested against steamvr using an opengl vr client (hellovr_opengl 
for simplicity).


Hi Andres,

Full tests would be great but at the very least we should start with 
some piglit tests that exercise the error paths.


Tim



Regards,
Andres


On 2017-11-02 12:07 AM, Jason Ekstrand wrote:
Out of curiosity, how has this series been tested beyond regression 
testing?



On November 1, 2017 20:57:57 Andres Rodriguez  wrote:


This series adds radeonsi support for GL_EXT_semaphore.

GL_EXT_semaphore is used by steam's vrclient to synchronize access to 
shared
surfaces (vulkan <-> gl interop). It allows our gl vrclients to 
enqueue their

framebuffer surface without waiting for a glFinish().

If anyone has any suggestions on improvements for the implicit flush 
added in
patch 9 please let me know. Either a way to remove it, or a way to 
move it to

a codepath that is a bit more specific to radeonsi.

Test results for this series (pretty alpha quality auto testing):
https://lostgoat.me/gpuci/jenkins/blue/organizations/jenkins/amdgpu-reviews/detail/amdgpu-reviews/184/pipeline 



Test results for each individual patch can also be found here (see 
'Related

Changes' section):
https://gerrit.lostgoat.me/#/c/454/

And here is a baseline for test results for comparison:
https://lostgoat.me/gpuci/jenkins/blue/organizations/jenkins/amdgpu-master/detail/amdgpu-master/1269/tests 



Tests include Vulkan CTS and piglit on Kaveri and Polaris 10.

I just kicked off the tests, so they might still show in a queued/in 
progress
state for a few hours. Hopefully my ryzen server and my test slaves 
survive the
unsupervised effort (*fingers crossed it doesn't catch fire while I 
sleep*).


Patches 1-12 add support for semaphore wait/signal/import
Patch 13 implements buffer/texture barriers
Patches 14-16 implement layout transitions
Patch 17 exposes the extension

Andres Rodriguez (17):
  gallium: introduce PIPE_CAP_SEMAPHORE
  mesa/st: expose EXT_semaphore and EXT_semaphore_fd
  mesa: add support for semaphore object creation/import/delete
  mesa: add semaphore parameter stub
  gallium: introduce semaphore object
  u_threaded_context: add support for semaphore wait/signal
  mesa/st: add support for semaphore object create/import/delete
  mesa: add support for semaphore object signal/wait
  mesa/st: add support for waiting for semaphore objects
  mesa: minor tidy up for memory object error strings
  winsys/amdgpu: add support for syncobj signaling
  radeonsi: implement semaphore operations
  mesa: implement buffer/texture barriers for semaphore wait/signal
  gallium: add transition_resource call
  mesa/st: hook up resource transitions for semaphore calls
  radeonsi: implement pipe transition_resource callback
  radeonsi: advertise support for GL_EXT_semaphore

 src/gallium/auxiliary/util/u_threaded_context.c    |  52 
 .../auxiliary/util/u_threaded_context_calls.h  |   1 +
 src/gallium/docs/source/screen.rst |   1 +
 src/gallium/drivers/ddebug/dd_context.c    |  23 ++
 src/gallium/drivers/ddebug/dd_screen.c |  25 ++
 src/gallium/drivers/etnaviv/etnaviv_screen.c   |   1 +
 src/gallium/drivers/freedreno/freedreno_screen.c   |   1 +
 src/gallium/drivers/i915/i915_screen.c |   1 +
 src/gallium/drivers/llvmpipe/lp_screen.c   |   1 +
 src/gallium/drivers/nouveau/nv30/nv30_screen.c |   1 +
 src/gallium/drivers/nouveau/nv50/nv50_screen.c |   1 +
 src/gallium/drivers/nouveau/nvc0/nvc0_screen.c |   1 +
 src/gallium/drivers/r300/r300_screen.c |   1 +
 src/gallium/drivers/r600/r600_pipe.c   |   1 +
 src/gallium/drivers/radeon/r600_pipe_common.c  |  52 
 src/gallium/drivers/radeon/r600_pipe_common.h  |   5 +
 src/gallium/drivers/radeon/radeon_winsys.h |  12 +
 src/gallium/drivers/radeonsi/si_blit.c |  11 +
 src/gallium/drivers/radeonsi/si_pipe.c |   3 +
 src/gallium/drivers/softpipe/sp_screen.c   |   1 +
 src/gallium/drivers/svga/svga_screen.c |   1 +
 src/gallium/drivers/swr/swr_screen.cpp |   1 +
 src/gallium/drivers/trace/tr_context.c |  36 +++
 src/gallium/drivers/trace/tr_screen.c  |  39 +++
 src/gallium/drivers/vc4/vc4_screen.c   |   1 +
 src/gallium/drivers/virgl/virgl_screen.c   |   1 +
 src/gallium/include/pipe/p_context.h   |  36 +++
 src/gallium/include/pipe/p_defines.h   |  12 +
 src/gallium/include/pipe/p_screen.h    |  22 ++
 src/gallium/include/pipe/p_state.h |   8 +
 src/gallium/winsys/amdgpu/drm/amdgpu_cs.c  |  81 +-
 src/gallium/winsys/amdgpu/drm/amdgpu_cs.h  |   4 +
 src/mesa/Makefile.sources  |   2 +
 src/mesa/drivers/common/driverfuncs.c  |   3 +
 src/mesa/main/dd.h |  58 +
 

Re: [Mesa-dev] [PATCH 00/17] Add support for GL_EXT_semaphore

[Andres Rodriguez]

It was tested against steamvr using an opengl vr client (hellovr_opengl 
for simplicity).


Regards,
Andres


On 2017-11-02 12:07 AM, Jason Ekstrand wrote:
Out of curiosity, how has this series been tested beyond regression 
testing?



On November 1, 2017 20:57:57 Andres Rodriguez  wrote:


This series adds radeonsi support for GL_EXT_semaphore.

GL_EXT_semaphore is used by steam's vrclient to synchronize access to 
shared
surfaces (vulkan <-> gl interop). It allows our gl vrclients to 
enqueue their

framebuffer surface without waiting for a glFinish().

If anyone has any suggestions on improvements for the implicit flush 
added in
patch 9 please let me know. Either a way to remove it, or a way to 
move it to

a codepath that is a bit more specific to radeonsi.

Test results for this series (pretty alpha quality auto testing):
https://lostgoat.me/gpuci/jenkins/blue/organizations/jenkins/amdgpu-reviews/detail/amdgpu-reviews/184/pipeline 



Test results for each individual patch can also be found here (see 
'Related

Changes' section):
https://gerrit.lostgoat.me/#/c/454/

And here is a baseline for test results for comparison:
https://lostgoat.me/gpuci/jenkins/blue/organizations/jenkins/amdgpu-master/detail/amdgpu-master/1269/tests 



Tests include Vulkan CTS and piglit on Kaveri and Polaris 10.

I just kicked off the tests, so they might still show in a queued/in 
progress
state for a few hours. Hopefully my ryzen server and my test slaves 
survive the
unsupervised effort (*fingers crossed it doesn't catch fire while I 
sleep*).


Patches 1-12 add support for semaphore wait/signal/import
Patch 13 implements buffer/texture barriers
Patches 14-16 implement layout transitions
Patch 17 exposes the extension

Andres Rodriguez (17):
  gallium: introduce PIPE_CAP_SEMAPHORE
  mesa/st: expose EXT_semaphore and EXT_semaphore_fd
  mesa: add support for semaphore object creation/import/delete
  mesa: add semaphore parameter stub
  gallium: introduce semaphore object
  u_threaded_context: add support for semaphore wait/signal
  mesa/st: add support for semaphore object create/import/delete
  mesa: add support for semaphore object signal/wait
  mesa/st: add support for waiting for semaphore objects
  mesa: minor tidy up for memory object error strings
  winsys/amdgpu: add support for syncobj signaling
  radeonsi: implement semaphore operations
  mesa: implement buffer/texture barriers for semaphore wait/signal
  gallium: add transition_resource call
  mesa/st: hook up resource transitions for semaphore calls
  radeonsi: implement pipe transition_resource callback
  radeonsi: advertise support for GL_EXT_semaphore

 src/gallium/auxiliary/util/u_threaded_context.c    |  52 
 .../auxiliary/util/u_threaded_context_calls.h  |   1 +
 src/gallium/docs/source/screen.rst |   1 +
 src/gallium/drivers/ddebug/dd_context.c    |  23 ++
 src/gallium/drivers/ddebug/dd_screen.c |  25 ++
 src/gallium/drivers/etnaviv/etnaviv_screen.c   |   1 +
 src/gallium/drivers/freedreno/freedreno_screen.c   |   1 +
 src/gallium/drivers/i915/i915_screen.c |   1 +
 src/gallium/drivers/llvmpipe/lp_screen.c   |   1 +
 src/gallium/drivers/nouveau/nv30/nv30_screen.c |   1 +
 src/gallium/drivers/nouveau/nv50/nv50_screen.c |   1 +
 src/gallium/drivers/nouveau/nvc0/nvc0_screen.c |   1 +
 src/gallium/drivers/r300/r300_screen.c |   1 +
 src/gallium/drivers/r600/r600_pipe.c   |   1 +
 src/gallium/drivers/radeon/r600_pipe_common.c  |  52 
 src/gallium/drivers/radeon/r600_pipe_common.h  |   5 +
 src/gallium/drivers/radeon/radeon_winsys.h |  12 +
 src/gallium/drivers/radeonsi/si_blit.c |  11 +
 src/gallium/drivers/radeonsi/si_pipe.c |   3 +
 src/gallium/drivers/softpipe/sp_screen.c   |   1 +
 src/gallium/drivers/svga/svga_screen.c |   1 +
 src/gallium/drivers/swr/swr_screen.cpp |   1 +
 src/gallium/drivers/trace/tr_context.c |  36 +++
 src/gallium/drivers/trace/tr_screen.c  |  39 +++
 src/gallium/drivers/vc4/vc4_screen.c   |   1 +
 src/gallium/drivers/virgl/virgl_screen.c   |   1 +
 src/gallium/include/pipe/p_context.h   |  36 +++
 src/gallium/include/pipe/p_defines.h   |  12 +
 src/gallium/include/pipe/p_screen.h    |  22 ++
 src/gallium/include/pipe/p_state.h |   8 +
 src/gallium/winsys/amdgpu/drm/amdgpu_cs.c  |  81 +-
 src/gallium/winsys/amdgpu/drm/amdgpu_cs.h  |   4 +
 src/mesa/Makefile.sources  |   2 +
 src/mesa/drivers/common/driverfuncs.c  |   3 +
 src/mesa/main/dd.h |  58 +
 src/mesa/main/extensions_table.h   |   2 +
 src/mesa/main/externalobjects.c    | 274 
+++--

 src/mesa/main/externalobjects.h    |  34 ++-

Re: [Mesa-dev] [PATCH 00/17] Add support for GL_EXT_semaphore

[Jason Ekstrand]

Out of curiosity, how has this series been tested beyond regression testing?


On November 1, 2017 20:57:57 Andres Rodriguez  wrote:


This series adds radeonsi support for GL_EXT_semaphore.

GL_EXT_semaphore is used by steam's vrclient to synchronize access to shared
surfaces (vulkan <-> gl interop). It allows our gl vrclients to enqueue their
framebuffer surface without waiting for a glFinish().

If anyone has any suggestions on improvements for the implicit flush added in
patch 9 please let me know. Either a way to remove it, or a way to move it to
a codepath that is a bit more specific to radeonsi.

Test results for this series (pretty alpha quality auto testing):
https://lostgoat.me/gpuci/jenkins/blue/organizations/jenkins/amdgpu-reviews/detail/amdgpu-reviews/184/pipeline

Test results for each individual patch can also be found here (see 'Related
Changes' section):
https://gerrit.lostgoat.me/#/c/454/

And here is a baseline for test results for comparison:
https://lostgoat.me/gpuci/jenkins/blue/organizations/jenkins/amdgpu-master/detail/amdgpu-master/1269/tests

Tests include Vulkan CTS and piglit on Kaveri and Polaris 10.

I just kicked off the tests, so they might still show in a queued/in progress
state for a few hours. Hopefully my ryzen server and my test slaves survive the
unsupervised effort (*fingers crossed it doesn't catch fire while I sleep*).

Patches 1-12 add support for semaphore wait/signal/import
Patch 13 implements buffer/texture barriers
Patches 14-16 implement layout transitions
Patch 17 exposes the extension

Andres Rodriguez (17):
  gallium: introduce PIPE_CAP_SEMAPHORE
  mesa/st: expose EXT_semaphore and EXT_semaphore_fd
  mesa: add support for semaphore object creation/import/delete
  mesa: add semaphore parameter stub
  gallium: introduce semaphore object
  u_threaded_context: add support for semaphore wait/signal
  mesa/st: add support for semaphore object create/import/delete
  mesa: add support for semaphore object signal/wait
  mesa/st: add support for waiting for semaphore objects
  mesa: minor tidy up for memory object error strings
  winsys/amdgpu: add support for syncobj signaling
  radeonsi: implement semaphore operations
  mesa: implement buffer/texture barriers for semaphore wait/signal
  gallium: add transition_resource call
  mesa/st: hook up resource transitions for semaphore calls
  radeonsi: implement pipe transition_resource callback
  radeonsi: advertise support for GL_EXT_semaphore

 src/gallium/auxiliary/util/u_threaded_context.c|  52 
 .../auxiliary/util/u_threaded_context_calls.h  |   1 +
 src/gallium/docs/source/screen.rst |   1 +
 src/gallium/drivers/ddebug/dd_context.c|  23 ++
 src/gallium/drivers/ddebug/dd_screen.c |  25 ++
 src/gallium/drivers/etnaviv/etnaviv_screen.c   |   1 +
 src/gallium/drivers/freedreno/freedreno_screen.c   |   1 +
 src/gallium/drivers/i915/i915_screen.c |   1 +
 src/gallium/drivers/llvmpipe/lp_screen.c   |   1 +
 src/gallium/drivers/nouveau/nv30/nv30_screen.c |   1 +
 src/gallium/drivers/nouveau/nv50/nv50_screen.c |   1 +
 src/gallium/drivers/nouveau/nvc0/nvc0_screen.c |   1 +
 src/gallium/drivers/r300/r300_screen.c |   1 +
 src/gallium/drivers/r600/r600_pipe.c   |   1 +
 src/gallium/drivers/radeon/r600_pipe_common.c  |  52 
 src/gallium/drivers/radeon/r600_pipe_common.h  |   5 +
 src/gallium/drivers/radeon/radeon_winsys.h |  12 +
 src/gallium/drivers/radeonsi/si_blit.c |  11 +
 src/gallium/drivers/radeonsi/si_pipe.c |   3 +
 src/gallium/drivers/softpipe/sp_screen.c   |   1 +
 src/gallium/drivers/svga/svga_screen.c |   1 +
 src/gallium/drivers/swr/swr_screen.cpp |   1 +
 src/gallium/drivers/trace/tr_context.c |  36 +++
 src/gallium/drivers/trace/tr_screen.c  |  39 +++
 src/gallium/drivers/vc4/vc4_screen.c   |   1 +
 src/gallium/drivers/virgl/virgl_screen.c   |   1 +
 src/gallium/include/pipe/p_context.h   |  36 +++
 src/gallium/include/pipe/p_defines.h   |  12 +
 src/gallium/include/pipe/p_screen.h|  22 ++
 src/gallium/include/pipe/p_state.h |   8 +
 src/gallium/winsys/amdgpu/drm/amdgpu_cs.c  |  81 +-
 src/gallium/winsys/amdgpu/drm/amdgpu_cs.h  |   4 +
 src/mesa/Makefile.sources  |   2 +
 src/mesa/drivers/common/driverfuncs.c  |   3 +
 src/mesa/main/dd.h |  58 +
 src/mesa/main/extensions_table.h   |   2 +
 src/mesa/main/externalobjects.c| 274 +++--
 src/mesa/main/externalobjects.h|  34 ++-
 src/mesa/main/mtypes.h |   9 +
 src/mesa/main/shared.c |  17 ++
 src/mesa/meson.build   |   

[Mesa-dev] [PATCH 17/17] radeonsi: advertise support for GL_EXT_semaphore

[Andres Rodriguez]

Expose the feature only when we have syncobj support available

Signed-off-by: Andres Rodriguez 
---
 src/gallium/drivers/radeonsi/si_pipe.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c 
b/src/gallium/drivers/radeonsi/si_pipe.c
index 0077aa2..8e17789 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -573,6 +573,9 @@ static int si_get_param(struct pipe_screen* pscreen, enum 
pipe_cap param)
return RADEON_SPARSE_PAGE_SIZE;
return 0;
 
+   case PIPE_CAP_SEMAPHORE:
+   return sscreen->b.info.has_syncobj;
+
/* Unsupported features. */
case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
@@ -590,7 +593,6 @@ static int si_get_param(struct pipe_screen* pscreen, enum 
pipe_cap param)
case PIPE_CAP_POST_DEPTH_COVERAGE:
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
-   case PIPE_CAP_SEMAPHORE:
return 0;
 
case PIPE_CAP_NATIVE_FENCE_FD:
-- 
2.9.3

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[Mesa-dev] [PATCH 10/17] mesa: minor tidy up for memory object error strings

[Andres Rodriguez]

Signed-off-by: Andres Rodriguez 
---
 src/mesa/main/externalobjects.c | 30 ++
 1 file changed, 14 insertions(+), 16 deletions(-)

diff --git a/src/mesa/main/externalobjects.c b/src/mesa/main/externalobjects.c
index b82d425..67912dd 100644
--- a/src/mesa/main/externalobjects.c
+++ b/src/mesa/main/externalobjects.c
@@ -149,8 +149,7 @@ _mesa_CreateMemoryObjectsEXT(GLsizei n, GLuint 
*memoryObjects)
   _mesa_debug(ctx, "%s(%d, %p)", func, n, memoryObjects);
 
if (!ctx->Extensions.EXT_memory_object) {
-  _mesa_error(ctx, GL_INVALID_OPERATION,
-  "glCreateMemoryObjectsEXT(unsupported)");
+  _mesa_error(ctx, GL_INVALID_OPERATION, "%s(unsupported)", func);
   return;
}
 
@@ -196,9 +195,10 @@ _mesa_MemoryObjectParameterivEXT(GLuint memoryObject,
GET_CURRENT_CONTEXT(ctx);
struct gl_memory_object *memObj;
 
+   const char *func = "glMemoryObjectParameterivEXT";
+
if (!ctx->Extensions.EXT_memory_object) {
-  _mesa_error(ctx, GL_INVALID_OPERATION,
-  "glMemoryObjectParameterivEXT(unsupported)");
+  _mesa_error(ctx, GL_INVALID_OPERATION, "%s(unsupported)", func);
   return;
}
 
@@ -207,8 +207,7 @@ _mesa_MemoryObjectParameterivEXT(GLuint memoryObject,
   return;
 
if (memObj->Immutable) {
-  _mesa_error(ctx, GL_INVALID_OPERATION,
-  "glMemoryObjectParameterivEXT(memoryObject is immutable");
+  _mesa_error(ctx, GL_INVALID_OPERATION, "%s(memoryObject is immutable", 
func);
   return;
}
 
@@ -225,8 +224,7 @@ _mesa_MemoryObjectParameterivEXT(GLuint memoryObject,
return;
 
 invalid_pname:
-   _mesa_error(ctx, GL_INVALID_ENUM,
-   "glMemoryObjectParameterivEXT(pname=0x%x)", pname);
+   _mesa_error(ctx, GL_INVALID_ENUM, "%s(pname=0x%x)", func, pname);
 }
 
 void GLAPIENTRY
@@ -237,9 +235,10 @@ _mesa_GetMemoryObjectParameterivEXT(GLuint memoryObject,
GET_CURRENT_CONTEXT(ctx);
struct gl_memory_object *memObj;
 
+   const char *func = "glMemoryObjectParameterivEXT";
+
if (!ctx->Extensions.EXT_memory_object) {
-  _mesa_error(ctx, GL_INVALID_OPERATION,
-  "glGetMemoryObjectParameterivEXT(unsupported)");
+  _mesa_error(ctx, GL_INVALID_OPERATION, "%s(unsupported)", func);
   return;
}
 
@@ -260,8 +259,7 @@ _mesa_GetMemoryObjectParameterivEXT(GLuint memoryObject,
return;
 
 invalid_pname:
-   _mesa_error(ctx, GL_INVALID_ENUM,
-   "glGetMemoryObjectParameterivEXT(pname=0x%x)", pname);
+   _mesa_error(ctx, GL_INVALID_ENUM, "%s(pname=0x%x)", func, pname);
 }
 
 static struct gl_memory_object *
@@ -797,15 +795,15 @@ _mesa_ImportMemoryFdEXT(GLuint memory,
 {
GET_CURRENT_CONTEXT(ctx);
 
+   const char *func = "glImportMemoryFdEXT";
+
if (!ctx->Extensions.EXT_memory_object_fd) {
-  _mesa_error(ctx, GL_INVALID_OPERATION,
-  "glImportMemoryFdEXT(unsupported)");
+  _mesa_error(ctx, GL_INVALID_OPERATION, "%s(unsupported)", func);
   return;
}
 
if (handleType != GL_HANDLE_TYPE_OPAQUE_FD_EXT) {
-  _mesa_error(ctx, GL_INVALID_VALUE, "glImportMemoryFdEXT(handleType=%u)",
-  handleType);
+  _mesa_error(ctx, GL_INVALID_VALUE, "%s(handleType=%u)", func, 
handleType);
   return;
}
 
-- 
2.9.3

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[Mesa-dev] [PATCH 16/17] radeonsi: implement pipe transition_resource callback

[Andres Rodriguez]

Signed-off-by: Andres Rodriguez 
---
 src/gallium/drivers/radeonsi/si_blit.c | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_blit.c 
b/src/gallium/drivers/radeonsi/si_blit.c
index abf25b6..d28eef2 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -1471,6 +1471,16 @@ static void si_flush_resource(struct pipe_context *ctx,
}
 }
 
+static void si_transition_resource(struct pipe_context *ctx,
+  struct pipe_resource *res,
+  enum pipe_layout layout)
+{
+   /**
+* Radeonsi/RADV use a compatible layout for all
+* exported resources.
+*/
+}
+
 static void si_decompress_dcc(struct pipe_context *ctx,
  struct r600_texture *rtex)
 {
@@ -1552,6 +1562,7 @@ void si_init_blit_functions(struct si_context *sctx)
sctx->b.b.blit = si_blit;
sctx->b.b.flush_resource = si_flush_resource;
sctx->b.b.generate_mipmap = si_generate_mipmap;
+   sctx->b.b.transition_resource = si_transition_resource;
sctx->b.blit_decompress_depth = si_blit_decompress_depth;
sctx->b.decompress_dcc = si_decompress_dcc;
 }
-- 
2.9.3

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[Mesa-dev] [PATCH 13/17] mesa: implement buffer/texture barriers for semaphore wait/signal

[Andres Rodriguez]

Make sure memory is accessible to the external client, for the specified
memory object, before the signal/after the wait.

Signed-off-by: Andres Rodriguez 
---
 src/mesa/main/dd.h  | 14 ++-
 src/mesa/main/externalobjects.c | 38 ++---
 src/mesa/state_tracker/st_cb_semaphoreobjects.c | 55 -
 3 files changed, 98 insertions(+), 9 deletions(-)

diff --git a/src/mesa/main/dd.h b/src/mesa/main/dd.h
index ec9ed8e..5089c86 100644
--- a/src/mesa/main/dd.h
+++ b/src/mesa/main/dd.h
@@ -1149,14 +1149,24 @@ struct dd_function_table {
 * server's command stream
 */
void (*ServerWaitSemaphoreObject)(struct gl_context *ctx,
- struct gl_semaphore_object *semObj);
+ struct gl_semaphore_object *semObj,
+ GLuint numBufferBarriers,
+ struct gl_buffer_object **bufObjs,
+ GLuint numTextureBarriers,
+ struct gl_texture_object **texObjs,
+ const GLenum *srcLayouts);
 
/**
 * Introduce an operation to signal the semaphore object in the GL
 * server's command stream
 */
void (*ServerSignalSemaphoreObject)(struct gl_context *ctx,
-   struct gl_semaphore_object *semObj);
+   struct gl_semaphore_object *semObj,
+   GLuint numBufferBarriers,
+   struct gl_buffer_object **bufObjs,
+   GLuint numTextureBarriers,
+   struct gl_texture_object **texObjs,
+   const GLenum *dstLayouts);
/*@}*/
 
/**
diff --git a/src/mesa/main/externalobjects.c b/src/mesa/main/externalobjects.c
index 67912dd..a7e42a9 100644
--- a/src/mesa/main/externalobjects.c
+++ b/src/mesa/main/externalobjects.c
@@ -23,6 +23,7 @@
 
 #include "macros.h"
 #include "mtypes.h"
+#include "bufferobj.h"
 #include "context.h"
 #include "externalobjects.h"
 #include "teximage.h"
@@ -744,7 +745,8 @@ _mesa_WaitSemaphoreEXT(GLuint semaphore,
 {
GET_CURRENT_CONTEXT(ctx);
struct gl_semaphore_object *semObj;
-
+   struct gl_buffer_object **bufObjs;
+   struct gl_texture_object **texObjs;
 
if (!ctx->Extensions.EXT_semaphore) {
   _mesa_error(ctx, GL_INVALID_OPERATION, 
"glWaitSemaphoreEXT(unsupported)");
@@ -757,8 +759,20 @@ _mesa_WaitSemaphoreEXT(GLuint semaphore,
if (!semObj)
   return;
 
-   /* TODO: memory barriers and layout transitions */
-   ctx->Driver.ServerWaitSemaphoreObject(ctx, semObj);
+   bufObjs = alloca(sizeof(struct gl_buffer_object **) * numBufferBarriers);
+   for (unsigned i = 0; i < numBufferBarriers; i++) {
+  bufObjs[i] = _mesa_lookup_bufferobj(ctx, buffers[i]);
+   }
+
+   texObjs = alloca(sizeof(struct gl_texture_object **) * numTextureBarriers);
+   for (unsigned i = 0; i < numTextureBarriers; i++) {
+  texObjs[i] = _mesa_lookup_texture(ctx, textures[i]);
+   }
+
+   ctx->Driver.ServerWaitSemaphoreObject(ctx, semObj,
+ numBufferBarriers, bufObjs,
+ numTextureBarriers, texObjs,
+ srcLayouts);
 }
 
 void GLAPIENTRY
@@ -771,6 +785,8 @@ _mesa_SignalSemaphoreEXT(GLuint semaphore,
 {
GET_CURRENT_CONTEXT(ctx);
struct gl_semaphore_object *semObj;
+   struct gl_buffer_object **bufObjs;
+   struct gl_texture_object **texObjs;
 
if (!ctx->Extensions.EXT_semaphore) {
   _mesa_error(ctx, GL_INVALID_OPERATION, 
"glSignalSemaphoreEXT(unsupported)");
@@ -783,8 +799,20 @@ _mesa_SignalSemaphoreEXT(GLuint semaphore,
if (!semObj)
   return;
 
-   /* TODO: memory barriers and layout transitions */
-   ctx->Driver.ServerSignalSemaphoreObject(ctx, semObj);
+   bufObjs = alloca(sizeof(struct gl_buffer_object **) * numBufferBarriers);
+   for (unsigned i = 0; i < numBufferBarriers; i++) {
+  bufObjs[i] = _mesa_lookup_bufferobj(ctx, buffers[i]);
+   }
+
+   texObjs = alloca(sizeof(struct gl_texture_object **) * numTextureBarriers);
+   for (unsigned i = 0; i < numTextureBarriers; i++) {
+  texObjs[i] = _mesa_lookup_texture(ctx, textures[i]);
+   }
+
+   ctx->Driver.ServerSignalSemaphoreObject(ctx, semObj,
+   numBufferBarriers, bufObjs,
+   numTextureBarriers, texObjs,
+   dstLayouts);
 }
 
 void GLAPIENTRY
diff --git a/src/mesa/state_tracker/st_cb_semaphoreobjects.c 
b/src/mesa/state_tracker/st_cb_semaphoreobjects.c
index 4cff3fd..f6242c7 100644
--- a/src/mesa/state_tracker/st_cb_semaphoreobjects.c
+++ b/src/mesa/state_tracker/st_cb_semaphoreobjects.c
@@ 

[Mesa-dev] [PATCH 12/17] radeonsi: implement semaphore operations

[Andres Rodriguez]

Allow importing, waiting and signaling of semaphore objects.

Semaphore objects are backed by syncobj based fences.

Signed-off-by: Andres Rodriguez 
---
 src/gallium/drivers/radeon/r600_pipe_common.c | 52 +++
 src/gallium/drivers/radeon/r600_pipe_common.h |  5 +++
 2 files changed, 57 insertions(+)

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c 
b/src/gallium/drivers/radeon/r600_pipe_common.c
index b77d859..65205dd 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -421,6 +421,54 @@ static int r600_fence_get_fd(struct pipe_screen *screen,
return gfx_fd;
 }
 
+static struct pipe_semaphore_object *
+si_semobj_create_from_fd(struct pipe_screen *screen, int fd)
+{
+   struct r600_common_screen *rscreen = (struct r600_common_screen*)screen;
+   struct r600_semaphore_object *semobj = 
CALLOC_STRUCT(r600_semaphore_object);
+   struct pipe_fence_handle *syncobj;
+
+   if (!semobj)
+   return NULL;
+
+   syncobj = rscreen->ws->fence_import_syncobj(rscreen->ws, fd);
+   if (!syncobj) {
+   free(semobj);
+   return NULL;
+   }
+
+   semobj->syncobj = syncobj;
+
+   return (struct pipe_semaphore_object *)semobj;
+}
+
+static void si_semobj_destroy(struct pipe_screen *screen,
+ struct pipe_semaphore_object *semobj)
+{
+   struct r600_common_screen *rscreen = (struct r600_common_screen*)screen;
+   struct r600_semaphore_object *rsemobj = (struct r600_semaphore_object 
*) semobj;
+
+   rscreen->ws->fence_reference(>syncobj, NULL);
+   free(semobj);
+}
+
+static void si_semobj_wait(struct pipe_context *ctx,
+  struct pipe_semaphore_object *semobj)
+{
+   struct r600_semaphore_object *rsemobj = (struct r600_semaphore_object 
*) semobj;
+
+   r600_fence_server_sync(ctx, rsemobj->syncobj);
+}
+
+static void si_semobj_signal(struct pipe_context *ctx,
+struct pipe_semaphore_object *semobj)
+{
+   struct r600_common_context *rctx = (struct r600_common_context *)ctx;
+   struct r600_semaphore_object *rsemobj = (struct r600_semaphore_object 
*) semobj;
+
+   rctx->ws->cs_add_syncobj_signal(rctx->gfx.cs, rsemobj->syncobj);
+}
+
 static void r600_flush_from_st(struct pipe_context *ctx,
   struct pipe_fence_handle **fence,
   unsigned flags)
@@ -701,6 +749,8 @@ bool si_common_context_init(struct r600_common_context 
*rctx,
rctx->b.fence_server_sync = r600_fence_server_sync;
rctx->dma_clear_buffer = r600_dma_clear_buffer_fallback;
rctx->b.buffer_subdata = si_buffer_subdata;
+   rctx->b.semobj_wait = si_semobj_wait;
+   rctx->b.semobj_signal = si_semobj_signal;
 
if (rscreen->info.drm_major == 2 && rscreen->info.drm_minor >= 43) {
rctx->b.get_device_reset_status = r600_get_reset_status;
@@ -1367,6 +1417,8 @@ bool si_common_screen_init(struct r600_common_screen 
*rscreen,
rscreen->b.resource_from_user_memory = si_buffer_from_user_memory;
rscreen->b.query_memory_info = r600_query_memory_info;
rscreen->b.fence_get_fd = r600_fence_get_fd;
+   rscreen->b.semobj_create_from_fd = si_semobj_create_from_fd;
+   rscreen->b.semobj_destroy = si_semobj_destroy;
 
if (rscreen->info.has_hw_decode) {
rscreen->b.get_video_param = si_vid_get_video_param;
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h 
b/src/gallium/drivers/radeon/r600_pipe_common.h
index a7c91cb..3bc37de 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -404,6 +404,11 @@ struct r600_memory_object {
uint32_toffset;
 };
 
+struct r600_semaphore_object {
+   struct pipe_semaphore_objectb;
+   struct pipe_fence_handle*syncobj;
+};
+
 struct r600_common_screen {
struct pipe_screen  b;
struct radeon_winsys*ws;
-- 
2.9.3

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[Mesa-dev] [PATCH 14/17] gallium: add transition_resource call

[Andres Rodriguez]

This operation is meant to transition resource in and out of optimized
layouts for compatibility with external clients.

Signed-off-by: Andres Rodriguez 
---
 src/gallium/auxiliary/util/u_threaded_context.c| 27 ++
 .../auxiliary/util/u_threaded_context_calls.h  |  1 +
 src/gallium/include/pipe/p_context.h   | 10 
 src/gallium/include/pipe/p_defines.h   | 11 +
 4 files changed, 49 insertions(+)

diff --git a/src/gallium/auxiliary/util/u_threaded_context.c 
b/src/gallium/auxiliary/util/u_threaded_context.c
index 272d846..881f886 100644
--- a/src/gallium/auxiliary/util/u_threaded_context.c
+++ b/src/gallium/auxiliary/util/u_threaded_context.c
@@ -2086,6 +2086,32 @@ tc_invalidate_resource(struct pipe_context *_pipe,
tc_set_resource_reference(>resource, resource);
 }
 
+struct tc_transition_resource {
+   struct pipe_resource *resource;
+   enum pipe_layout layout;
+};
+
+static void
+tc_call_transition_resource(struct pipe_context *pipe, union tc_payload 
*payload)
+{
+   struct tc_transition_resource *p = (struct tc_transition_resource *)payload;
+   pipe->transition_resource(pipe, p->resource, p->layout);
+   tc_set_resource_reference(>resource, NULL);
+}
+
+static void
+tc_transition_resource(struct pipe_context *pipe,
+   struct pipe_resource *resource,
+   enum pipe_layout layout)
+{
+   struct threaded_context *tc = threaded_context(pipe);
+   struct tc_transition_resource *p = tc_add_struct_typed_call(tc,
+   
TC_CALL_transition_resource,
+   
tc_transition_resource);
+   tc_set_resource_reference(>resource, resource);
+   p->layout = layout;
+}
+
 struct tc_clear {
unsigned buffers;
union pipe_color_union color;
@@ -2380,6 +2406,7 @@ threaded_context_create(struct pipe_context *pipe,
CTX_INIT(clear_buffer);
CTX_INIT(clear_texture);
CTX_INIT(flush_resource);
+   CTX_INIT(transition_resource);
CTX_INIT(generate_mipmap);
CTX_INIT(render_condition);
CTX_INIT(create_query);
diff --git a/src/gallium/auxiliary/util/u_threaded_context_calls.h 
b/src/gallium/auxiliary/util/u_threaded_context_calls.h
index 546819a..0fbebf8 100644
--- a/src/gallium/auxiliary/util/u_threaded_context_calls.h
+++ b/src/gallium/auxiliary/util/u_threaded_context_calls.h
@@ -28,6 +28,7 @@ CALL(blit)
 CALL(generate_mipmap)
 CALL(flush_resource)
 CALL(invalidate_resource)
+CALL(transition_resource)
 CALL(clear)
 CALL(clear_buffer)
 CALL(clear_texture)
diff --git a/src/gallium/include/pipe/p_context.h 
b/src/gallium/include/pipe/p_context.h
index 0e3e930..f386230 100644
--- a/src/gallium/include/pipe/p_context.h
+++ b/src/gallium/include/pipe/p_context.h
@@ -714,6 +714,16 @@ struct pipe_context {
   struct pipe_resource *resource);
 
/**
+* Transition a resource to a different layout so it can be used by
+* an external client.
+*
+* Note: The layout definitions across clients must be consistent.
+*/
+   void (*transition_resource)(struct pipe_context *ctx,
+   struct pipe_resource *resource,
+   enum pipe_layout layout);
+
+   /**
 * Invalidate the contents of the resource. This is used to
 *
 * (1) implement EGL's semantic of undefined depth/stencil
diff --git a/src/gallium/include/pipe/p_defines.h 
b/src/gallium/include/pipe/p_defines.h
index 66e9444..95ebbaa 100644
--- a/src/gallium/include/pipe/p_defines.h
+++ b/src/gallium/include/pipe/p_defines.h
@@ -578,6 +578,17 @@ enum pipe_swizzle {
PIPE_SWIZZLE_MAX, /**< Number of enums counter (must be last) */
 };
 
+enum pipe_layout
+{
+   PIPE_LAYOUT_GENERAL_EXT,
+   PIPE_LAYOUT_COLOR_ATTACHMENT,
+   PIPE_LAYOUT_DEPTH_STENCIL_ATTACHMENT,
+   PIPE_LAYOUT_DEPTH_STENCIL_READ_ONLY,
+   PIPE_LAYOUT_SHADER_READ_ONLY,
+   PIPE_LAYOUT_TRANSFER_SRC,
+   PIPE_LAYOUT_TRANSFER_DST,
+};
+
 #define PIPE_TIMEOUT_INFINITE 0xull
 
 
-- 
2.9.3

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[Mesa-dev] [PATCH 15/17] mesa/st: hook up resource transitions for semaphore calls

[Andres Rodriguez]

Signed-off-by: Andres Rodriguez 
---
 src/mesa/state_tracker/st_cb_semaphoreobjects.c | 33 +++--
 1 file changed, 31 insertions(+), 2 deletions(-)

diff --git a/src/mesa/state_tracker/st_cb_semaphoreobjects.c 
b/src/mesa/state_tracker/st_cb_semaphoreobjects.c
index f6242c7..df9154b 100644
--- a/src/mesa/state_tracker/st_cb_semaphoreobjects.c
+++ b/src/mesa/state_tracker/st_cb_semaphoreobjects.c
@@ -51,6 +51,29 @@ st_import_semaphoreobj_fd(struct gl_context *ctx,
 #endif
 }
 
+static enum pipe_layout
+pipe_layout(GLenum gl_layout)
+{
+   switch (gl_layout) {
+   case GL_LAYOUT_GENERAL_EXT:
+  return PIPE_LAYOUT_GENERAL_EXT;
+   case PIPE_LAYOUT_COLOR_ATTACHMENT:
+  return PIPE_LAYOUT_COLOR_ATTACHMENT;
+   case PIPE_LAYOUT_DEPTH_STENCIL_ATTACHMENT:
+  return PIPE_LAYOUT_DEPTH_STENCIL_ATTACHMENT;
+   case PIPE_LAYOUT_DEPTH_STENCIL_READ_ONLY:
+  return PIPE_LAYOUT_DEPTH_STENCIL_READ_ONLY;
+   case PIPE_LAYOUT_SHADER_READ_ONLY:
+  return PIPE_LAYOUT_SHADER_READ_ONLY;
+   case PIPE_LAYOUT_TRANSFER_SRC:
+  return PIPE_LAYOUT_TRANSFER_SRC;
+   case PIPE_LAYOUT_TRANSFER_DST:
+  return PIPE_LAYOUT_TRANSFER_DST;
+   default:
+  unreachable("unexpected layout");
+   }
+}
+
 static void
 st_server_wait_semaphore(struct gl_context *ctx,
  struct gl_semaphore_object *semObj,
@@ -65,6 +88,7 @@ st_server_wait_semaphore(struct gl_context *ctx,
struct pipe_context *pipe = st->pipe;
struct st_buffer_object *bufObj;
struct st_texture_object *texObj;
+   enum pipe_layout srcLayout;
 
for (unsigned i = 0; i < numBufferBarriers; i++) {
   if (!bufObjs[i])
@@ -79,10 +103,12 @@ st_server_wait_semaphore(struct gl_context *ctx,
  continue;
 
   texObj = st_texture_object(texObjs[i]);
+  srcLayout = pipe_layout(srcLayouts[i]);
+
   pipe->flush_resource(pipe, texObj->pt);
+  pipe->transition_resource(pipe, texObj->pt, srcLayout);
}
 
-   /* TODO: layout transition */
_mesa_flush(ctx);
pipe->semobj_wait(pipe, st_obj->semaphore);
 }
@@ -101,6 +127,7 @@ st_server_signal_semaphore(struct gl_context *ctx,
struct pipe_context *pipe = st->pipe;
struct st_buffer_object *bufObj;
struct st_texture_object *texObj;
+   enum pipe_layout dstLayout;
 
pipe->semobj_signal(pipe, st_obj->semaphore);
 
@@ -117,10 +144,12 @@ st_server_signal_semaphore(struct gl_context *ctx,
  continue;
 
   texObj = st_texture_object(texObjs[i]);
+  dstLayout = pipe_layout(dstLayouts[i]);
+
   pipe->flush_resource(pipe, texObj->pt);
+  pipe->transition_resource(pipe, texObj->pt, dstLayout);
}
 
-   /* TODO: layout transition */
_mesa_flush(ctx);
 }
 
-- 
2.9.3

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[Mesa-dev] [PATCH 11/17] winsys/amdgpu: add support for syncobj signaling

[Andres Rodriguez]

Add the ability to signal a syncobj when a cs completes execution.

Signed-off-by: Andres Rodriguez 
---
 src/gallium/drivers/radeon/radeon_winsys.h | 12 +
 src/gallium/winsys/amdgpu/drm/amdgpu_cs.c  | 81 +-
 src/gallium/winsys/amdgpu/drm/amdgpu_cs.h  |  4 ++
 3 files changed, 96 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeon/radeon_winsys.h 
b/src/gallium/drivers/radeon/radeon_winsys.h
index 2d3f646..8358aa7 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -582,6 +582,12 @@ struct radeon_winsys {
 struct pipe_fence_handle *fence);
 
 /**
+ * Signal a syncobj when the CS finishes execution.
+ */
+void (*cs_add_syncobj_signal)(struct radeon_winsys_cs *cs,
+ struct pipe_fence_handle *fence);
+
+/**
  * Wait for the fence and return true if the fence has been signalled.
  * The timeout of 0 will only return the status.
  * The timeout of PIPE_TIMEOUT_INFINITE will always wait until the fence
@@ -598,6 +604,12 @@ struct radeon_winsys {
 struct pipe_fence_handle *src);
 
 /**
+ * Create a new fence object corresponding to the given syncobj fd.
+ */
+struct pipe_fence_handle *(*fence_import_syncobj)(struct radeon_winsys *ws,
+ int fd);
+
+/**
  * Create a new fence object corresponding to the given sync_file.
  */
 struct pipe_fence_handle *(*fence_import_sync_file)(struct radeon_winsys 
*ws,
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c 
b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index 8f43e93..ee5b501 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -59,6 +59,29 @@ amdgpu_fence_create(struct amdgpu_ctx *ctx, unsigned ip_type,
 }
 
 static struct pipe_fence_handle *
+amdgpu_fence_import_syncobj(struct radeon_winsys *rws, int fd)
+{
+   struct amdgpu_winsys *ws = amdgpu_winsys(rws);
+   struct amdgpu_fence *fence = CALLOC_STRUCT(amdgpu_fence);
+   int r;
+
+   if (!fence)
+  return NULL;
+
+   pipe_reference_init(>reference, 1);
+   fence->ws = ws;
+
+   r = amdgpu_cs_import_syncobj(ws->dev, fd, >syncobj);
+   if (r) {
+  FREE(fence);
+  return NULL;
+   }
+
+   assert(amdgpu_fence_is_syncobj(fence));
+   return (struct pipe_fence_handle*)fence;
+}
+
+static struct pipe_fence_handle *
 amdgpu_fence_import_sync_file(struct radeon_winsys *rws, int fd)
 {
struct amdgpu_winsys *ws = amdgpu_winsys(rws);
@@ -812,11 +835,14 @@ static void amdgpu_cs_context_cleanup(struct 
amdgpu_cs_context *cs)
}
for (i = 0; i < cs->num_fence_dependencies; i++)
   amdgpu_fence_reference(>fence_dependencies[i], NULL);
+   for (i = 0; i < cs->num_syncobj_to_signal; i++)
+  amdgpu_fence_reference(>syncobj_to_signal[i], NULL);
 
cs->num_real_buffers = 0;
cs->num_slab_buffers = 0;
cs->num_sparse_buffers = 0;
cs->num_fence_dependencies = 0;
+   cs->num_syncobj_to_signal = 0;
amdgpu_fence_reference(>fence, NULL);
 
memset(cs->buffer_indices_hashlist, -1, 
sizeof(cs->buffer_indices_hashlist));
@@ -832,6 +858,7 @@ static void amdgpu_destroy_cs_context(struct 
amdgpu_cs_context *cs)
FREE(cs->slab_buffers);
FREE(cs->sparse_buffers);
FREE(cs->fence_dependencies);
+   FREE(cs->syncobj_to_signal);
 }
 
 
@@ -1139,6 +1166,36 @@ static void 
amdgpu_add_fence_dependencies_bo_lists(struct amdgpu_cs *acs)
amdgpu_add_fence_dependencies_bo_list(acs, cs->fence, 
cs->num_sparse_buffers, cs->sparse_buffers);
 }
 
+static unsigned add_syncobj_to_signal_entry(struct amdgpu_cs_context *cs)
+{
+   unsigned idx = cs->num_syncobj_to_signal++;
+
+   if (idx >= cs->max_syncobj_to_signal) {
+  unsigned size;
+  const unsigned increment = 8;
+
+  cs->max_syncobj_to_signal = idx + increment;
+  size = cs->max_syncobj_to_signal * sizeof(cs->syncobj_to_signal[0]);
+  cs->syncobj_to_signal = realloc(cs->syncobj_to_signal, size);
+  /* Clear the newly-allocated elements. */
+  memset(cs->syncobj_to_signal + idx, 0,
+ increment * sizeof(cs->syncobj_to_signal[0]));
+   }
+   return idx;
+}
+
+static void amdgpu_cs_add_syncobj_signal(struct radeon_winsys_cs *rws,
+ struct pipe_fence_handle *fence)
+{
+   struct amdgpu_cs *acs = amdgpu_cs(rws);
+   struct amdgpu_cs_context *cs = acs->csc;
+
+   assert(amdgpu_fence_is_syncobj((struct amdgpu_fence *)fence));
+
+   unsigned idx = add_syncobj_to_signal_entry(cs);
+   amdgpu_fence_reference(>syncobj_to_signal[idx], fence);
+}
+
 /* Add backing of sparse buffers to the buffer list.
  *
  * This is done late, during submission, to keep the buffer list short before
@@ -1269,7 +1326,7 @@ bo_list_error:
if (acs->ctx->num_rejected_cs) {
   r = -ECANCELED;
} else {
-  

[Mesa-dev] [PATCH 00/17] Add support for GL_EXT_semaphore

[Andres Rodriguez]

This series adds radeonsi support for GL_EXT_semaphore.

GL_EXT_semaphore is used by steam's vrclient to synchronize access to shared
surfaces (vulkan <-> gl interop). It allows our gl vrclients to enqueue their
framebuffer surface without waiting for a glFinish().

If anyone has any suggestions on improvements for the implicit flush added in
patch 9 please let me know. Either a way to remove it, or a way to move it to
a codepath that is a bit more specific to radeonsi.

Test results for this series (pretty alpha quality auto testing):
https://lostgoat.me/gpuci/jenkins/blue/organizations/jenkins/amdgpu-reviews/detail/amdgpu-reviews/184/pipeline

Test results for each individual patch can also be found here (see 'Related
Changes' section):
https://gerrit.lostgoat.me/#/c/454/

And here is a baseline for test results for comparison:
https://lostgoat.me/gpuci/jenkins/blue/organizations/jenkins/amdgpu-master/detail/amdgpu-master/1269/tests

Tests include Vulkan CTS and piglit on Kaveri and Polaris 10.

I just kicked off the tests, so they might still show in a queued/in progress
state for a few hours. Hopefully my ryzen server and my test slaves survive the
unsupervised effort (*fingers crossed it doesn't catch fire while I sleep*).

Patches 1-12 add support for semaphore wait/signal/import
Patch 13 implements buffer/texture barriers
Patches 14-16 implement layout transitions
Patch 17 exposes the extension

Andres Rodriguez (17):
  gallium: introduce PIPE_CAP_SEMAPHORE
  mesa/st: expose EXT_semaphore and EXT_semaphore_fd
  mesa: add support for semaphore object creation/import/delete
  mesa: add semaphore parameter stub
  gallium: introduce semaphore object
  u_threaded_context: add support for semaphore wait/signal
  mesa/st: add support for semaphore object create/import/delete
  mesa: add support for semaphore object signal/wait
  mesa/st: add support for waiting for semaphore objects
  mesa: minor tidy up for memory object error strings
  winsys/amdgpu: add support for syncobj signaling
  radeonsi: implement semaphore operations
  mesa: implement buffer/texture barriers for semaphore wait/signal
  gallium: add transition_resource call
  mesa/st: hook up resource transitions for semaphore calls
  radeonsi: implement pipe transition_resource callback
  radeonsi: advertise support for GL_EXT_semaphore

 src/gallium/auxiliary/util/u_threaded_context.c|  52 
 .../auxiliary/util/u_threaded_context_calls.h  |   1 +
 src/gallium/docs/source/screen.rst |   1 +
 src/gallium/drivers/ddebug/dd_context.c|  23 ++
 src/gallium/drivers/ddebug/dd_screen.c |  25 ++
 src/gallium/drivers/etnaviv/etnaviv_screen.c   |   1 +
 src/gallium/drivers/freedreno/freedreno_screen.c   |   1 +
 src/gallium/drivers/i915/i915_screen.c |   1 +
 src/gallium/drivers/llvmpipe/lp_screen.c   |   1 +
 src/gallium/drivers/nouveau/nv30/nv30_screen.c |   1 +
 src/gallium/drivers/nouveau/nv50/nv50_screen.c |   1 +
 src/gallium/drivers/nouveau/nvc0/nvc0_screen.c |   1 +
 src/gallium/drivers/r300/r300_screen.c |   1 +
 src/gallium/drivers/r600/r600_pipe.c   |   1 +
 src/gallium/drivers/radeon/r600_pipe_common.c  |  52 
 src/gallium/drivers/radeon/r600_pipe_common.h  |   5 +
 src/gallium/drivers/radeon/radeon_winsys.h |  12 +
 src/gallium/drivers/radeonsi/si_blit.c |  11 +
 src/gallium/drivers/radeonsi/si_pipe.c |   3 +
 src/gallium/drivers/softpipe/sp_screen.c   |   1 +
 src/gallium/drivers/svga/svga_screen.c |   1 +
 src/gallium/drivers/swr/swr_screen.cpp |   1 +
 src/gallium/drivers/trace/tr_context.c |  36 +++
 src/gallium/drivers/trace/tr_screen.c  |  39 +++
 src/gallium/drivers/vc4/vc4_screen.c   |   1 +
 src/gallium/drivers/virgl/virgl_screen.c   |   1 +
 src/gallium/include/pipe/p_context.h   |  36 +++
 src/gallium/include/pipe/p_defines.h   |  12 +
 src/gallium/include/pipe/p_screen.h|  22 ++
 src/gallium/include/pipe/p_state.h |   8 +
 src/gallium/winsys/amdgpu/drm/amdgpu_cs.c  |  81 +-
 src/gallium/winsys/amdgpu/drm/amdgpu_cs.h  |   4 +
 src/mesa/Makefile.sources  |   2 +
 src/mesa/drivers/common/driverfuncs.c  |   3 +
 src/mesa/main/dd.h |  58 +
 src/mesa/main/extensions_table.h   |   2 +
 src/mesa/main/externalobjects.c| 274 +++--
 src/mesa/main/externalobjects.h|  34 ++-
 src/mesa/main/mtypes.h |   9 +
 src/mesa/main/shared.c |  17 ++
 src/mesa/meson.build   |   2 +
 src/mesa/state_tracker/st_cb_semaphoreobjects.c| 164 
 src/mesa/state_tracker/st_cb_semaphoreobjects.h|  25 ++
 

[Mesa-dev] [PATCH 08/17] mesa: add support for semaphore object signal/wait

[Andres Rodriguez]

Memory synchronization is left for a future patch.

Signed-off-by: Andres Rodriguez 
---
 src/mesa/main/dd.h  | 14 ++
 src/mesa/main/externalobjects.c | 32 
 2 files changed, 46 insertions(+)

diff --git a/src/mesa/main/dd.h b/src/mesa/main/dd.h
index b089219..ec9ed8e 100644
--- a/src/mesa/main/dd.h
+++ b/src/mesa/main/dd.h
@@ -1143,6 +1143,20 @@ struct dd_function_table {
 */
void (*DeleteSemaphoreObject)(struct gl_context *ctx,
  struct gl_semaphore_object *semObj);
+
+   /**
+* Introduce an operation to wait for the semaphore object in the GL
+* server's command stream
+*/
+   void (*ServerWaitSemaphoreObject)(struct gl_context *ctx,
+ struct gl_semaphore_object *semObj);
+
+   /**
+* Introduce an operation to signal the semaphore object in the GL
+* server's command stream
+*/
+   void (*ServerSignalSemaphoreObject)(struct gl_context *ctx,
+   struct gl_semaphore_object *semObj);
/*@}*/
 
/**
diff --git a/src/mesa/main/externalobjects.c b/src/mesa/main/externalobjects.c
index 93a92e9..b82d425 100644
--- a/src/mesa/main/externalobjects.c
+++ b/src/mesa/main/externalobjects.c
@@ -23,6 +23,7 @@
 
 #include "macros.h"
 #include "mtypes.h"
+#include "context.h"
 #include "externalobjects.h"
 #include "teximage.h"
 #include "texobj.h"
@@ -743,7 +744,23 @@ _mesa_WaitSemaphoreEXT(GLuint semaphore,
const GLuint *textures,
const GLenum *srcLayouts)
 {
+   GET_CURRENT_CONTEXT(ctx);
+   struct gl_semaphore_object *semObj;
+
+
+   if (!ctx->Extensions.EXT_semaphore) {
+  _mesa_error(ctx, GL_INVALID_OPERATION, 
"glWaitSemaphoreEXT(unsupported)");
+  return;
+   }
+
+   ASSERT_OUTSIDE_BEGIN_END(ctx);
+
+   semObj = _mesa_lookup_semaphore_object(ctx, semaphore);
+   if (!semObj)
+  return;
 
+   /* TODO: memory barriers and layout transitions */
+   ctx->Driver.ServerWaitSemaphoreObject(ctx, semObj);
 }
 
 void GLAPIENTRY
@@ -754,7 +771,22 @@ _mesa_SignalSemaphoreEXT(GLuint semaphore,
  const GLuint *textures,
  const GLenum *dstLayouts)
 {
+   GET_CURRENT_CONTEXT(ctx);
+   struct gl_semaphore_object *semObj;
+
+   if (!ctx->Extensions.EXT_semaphore) {
+  _mesa_error(ctx, GL_INVALID_OPERATION, 
"glSignalSemaphoreEXT(unsupported)");
+  return;
+   }
+
+   ASSERT_OUTSIDE_BEGIN_END(ctx);
+
+   semObj = _mesa_lookup_semaphore_object(ctx, semaphore);
+   if (!semObj)
+  return;
 
+   /* TODO: memory barriers and layout transitions */
+   ctx->Driver.ServerSignalSemaphoreObject(ctx, semObj);
 }
 
 void GLAPIENTRY
-- 
2.9.3

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[Mesa-dev] [PATCH 09/17] mesa/st: add support for waiting for semaphore objects

[Andres Rodriguez]

Bits to implement ServerWaitSemaphoreObject/ServerSignalSemaphoreObject

Signed-off-by: Andres Rodriguez 
---
 src/mesa/state_tracker/st_cb_semaphoreobjects.c | 28 +
 1 file changed, 28 insertions(+)

diff --git a/src/mesa/state_tracker/st_cb_semaphoreobjects.c 
b/src/mesa/state_tracker/st_cb_semaphoreobjects.c
index 47ece47..4cff3fd 100644
--- a/src/mesa/state_tracker/st_cb_semaphoreobjects.c
+++ b/src/mesa/state_tracker/st_cb_semaphoreobjects.c
@@ -1,5 +1,7 @@
+
 #include "main/imports.h"
 #include "main/mtypes.h"
+#include "main/context.h"
 
 #include "main/externalobjects.h"
 
@@ -47,10 +49,36 @@ st_import_semaphoreobj_fd(struct gl_context *ctx,
 #endif
 }
 
+static void
+st_server_wait_semaphore(struct gl_context *ctx,
+ struct gl_semaphore_object *semObj)
+{
+   struct st_semaphore_object *st_obj = st_semaphore_object(semObj);
+   struct st_context *st = st_context(ctx);
+   struct pipe_context *pipe = st->pipe;
+
+   _mesa_flush(ctx);
+   pipe->semobj_wait(pipe, st_obj->semaphore);
+}
+
+static void
+st_server_signal_semaphore(struct gl_context *ctx,
+   struct gl_semaphore_object *semObj)
+{
+   struct st_semaphore_object *st_obj = st_semaphore_object(semObj);
+   struct st_context *st = st_context(ctx);
+   struct pipe_context *pipe = st->pipe;
+
+   pipe->semobj_signal(pipe, st_obj->semaphore);
+   _mesa_flush(ctx);
+}
+
 void
 st_init_semaphoreobject_functions(struct dd_function_table *functions)
 {
functions->NewSemaphoreObject = st_semaphoreobj_alloc;
functions->DeleteSemaphoreObject = st_semaphoreobj_free;
functions->ImportSemaphoreFd = st_import_semaphoreobj_fd;
+   functions->ServerWaitSemaphoreObject = st_server_wait_semaphore;
+   functions->ServerSignalSemaphoreObject = st_server_signal_semaphore;
 }
-- 
2.9.3

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[Mesa-dev] [PATCH 07/17] mesa/st: add support for semaphore object create/import/delete

[Andres Rodriguez]

Add basic semaphore object operations.

Signed-off-by: Andres Rodriguez 
---
 src/mesa/Makefile.sources   |  2 +
 src/mesa/meson.build|  2 +
 src/mesa/state_tracker/st_cb_semaphoreobjects.c | 56 +
 src/mesa/state_tracker/st_cb_semaphoreobjects.h | 25 +++
 src/mesa/state_tracker/st_context.c |  2 +
 5 files changed, 87 insertions(+)
 create mode 100644 src/mesa/state_tracker/st_cb_semaphoreobjects.c
 create mode 100644 src/mesa/state_tracker/st_cb_semaphoreobjects.h

diff --git a/src/mesa/Makefile.sources b/src/mesa/Makefile.sources
index 6da1e3f..e4582ee 100644
--- a/src/mesa/Makefile.sources
+++ b/src/mesa/Makefile.sources
@@ -481,6 +481,8 @@ STATETRACKER_FILES = \
state_tracker/st_cb_rasterpos.h \
state_tracker/st_cb_readpixels.c \
state_tracker/st_cb_readpixels.h \
+   state_tracker/st_cb_semaphoreobjects.c \
+   state_tracker/st_cb_semaphoreobjects.h \
state_tracker/st_cb_strings.c \
state_tracker/st_cb_strings.h \
state_tracker/st_cb_syncobj.c \
diff --git a/src/mesa/meson.build b/src/mesa/meson.build
index 20d06aa..a2e89a2 100644
--- a/src/mesa/meson.build
+++ b/src/mesa/meson.build
@@ -537,6 +537,8 @@ files_libmesa_gallium = files(
   'state_tracker/st_cb_readpixels.h',
   'state_tracker/st_cb_strings.c',
   'state_tracker/st_cb_strings.h',
+  'state_tracker/st_cb_semaphoreobjects.c',
+  'state_tracker/st_cb_semaphoreobjects.h',
   'state_tracker/st_cb_syncobj.c',
   'state_tracker/st_cb_syncobj.h',
   'state_tracker/st_cb_texturebarrier.c',
diff --git a/src/mesa/state_tracker/st_cb_semaphoreobjects.c 
b/src/mesa/state_tracker/st_cb_semaphoreobjects.c
new file mode 100644
index 000..47ece47
--- /dev/null
+++ b/src/mesa/state_tracker/st_cb_semaphoreobjects.c
@@ -0,0 +1,56 @@
+#include "main/imports.h"
+#include "main/mtypes.h"
+
+#include "main/externalobjects.h"
+
+#include "st_context.h"
+#include "st_cb_semaphoreobjects.h"
+
+#include "state_tracker/drm_driver.h"
+#include "pipe/p_context.h"
+#include "pipe/p_screen.h"
+
+static struct gl_semaphore_object *
+st_semaphoreobj_alloc(struct gl_context *ctx, GLuint name)
+{
+   struct st_semaphore_object *st_obj = ST_CALLOC_STRUCT(st_semaphore_object);
+   if (!st_obj)
+  return NULL;
+
+   _mesa_initialize_semaphore_object(ctx, _obj->Base, name);
+   return _obj->Base;
+}
+
+static void
+st_semaphoreobj_free(struct gl_context *ctx,
+ struct gl_semaphore_object *semObj)
+{
+   _mesa_delete_semaphore_object(ctx, semObj);
+}
+
+
+static void
+st_import_semaphoreobj_fd(struct gl_context *ctx,
+   struct gl_semaphore_object *semObj,
+   int fd)
+{
+   struct st_semaphore_object *st_obj = st_semaphore_object(semObj);
+   struct st_context *st = st_context(ctx);
+   struct pipe_context *pipe = st->pipe;
+   struct pipe_screen *screen = pipe->screen;
+
+   st_obj->semaphore = screen->semobj_create_from_fd(screen, fd);
+
+#if !defined(_WIN32)
+   /* We own fd, but we no longer need it. So get rid of it */
+   close(fd);
+#endif
+}
+
+void
+st_init_semaphoreobject_functions(struct dd_function_table *functions)
+{
+   functions->NewSemaphoreObject = st_semaphoreobj_alloc;
+   functions->DeleteSemaphoreObject = st_semaphoreobj_free;
+   functions->ImportSemaphoreFd = st_import_semaphoreobj_fd;
+}
diff --git a/src/mesa/state_tracker/st_cb_semaphoreobjects.h 
b/src/mesa/state_tracker/st_cb_semaphoreobjects.h
new file mode 100644
index 000..2301651
--- /dev/null
+++ b/src/mesa/state_tracker/st_cb_semaphoreobjects.h
@@ -0,0 +1,25 @@
+#ifndef ST_CB_SEMAPHOREOBJECTS_H
+#define ST_CB_SEMAPHOREOBJECTS_H
+
+#include "main/compiler.h"
+#include "main/mtypes.h"
+
+struct dd_function_table;
+struct pipe_screen;
+
+struct st_semaphore_object
+{
+   struct gl_semaphore_object Base;
+   struct pipe_semaphore_object *semaphore;
+};
+
+static inline struct st_semaphore_object *
+st_semaphore_object(struct gl_semaphore_object *obj)
+{
+   return (struct st_semaphore_object *)obj;
+}
+
+extern void
+st_init_semaphoreobject_functions(struct dd_function_table *functions);
+
+#endif
diff --git a/src/mesa/state_tracker/st_context.c 
b/src/mesa/state_tracker/st_context.c
index 5d8dd8b..ddee38c 100644
--- a/src/mesa/state_tracker/st_context.c
+++ b/src/mesa/state_tracker/st_context.c
@@ -60,6 +60,7 @@
 #include "st_cb_program.h"
 #include "st_cb_queryobj.h"
 #include "st_cb_readpixels.h"
+#include "st_cb_semaphoreobjects.h"
 #include "st_cb_texture.h"
 #include "st_cb_xformfb.h"
 #include "st_cb_flush.h"
@@ -715,6 +716,7 @@ void st_init_driver_functions(struct pipe_screen *screen,
st_init_query_functions(functions);
st_init_cond_render_functions(functions);
st_init_readpixels_functions(functions);
+   st_init_semaphoreobject_functions(functions);
st_init_texture_functions(functions);
st_init_texture_barrier_functions(functions);
   

[Mesa-dev] [PATCH 06/17] u_threaded_context: add support for semaphore wait/signal

[Andres Rodriguez]

Signed-off-by: Andres Rodriguez 
---
 src/gallium/auxiliary/util/u_threaded_context.c | 25 +
 1 file changed, 25 insertions(+)

diff --git a/src/gallium/auxiliary/util/u_threaded_context.c 
b/src/gallium/auxiliary/util/u_threaded_context.c
index 7e28b87..272d846 100644
--- a/src/gallium/auxiliary/util/u_threaded_context.c
+++ b/src/gallium/auxiliary/util/u_threaded_context.c
@@ -1636,6 +1636,29 @@ tc_texture_subdata(struct pipe_context *_pipe,
}
 }
 
+/
+ * Semaphores
+ */
+
+static void
+tc_semobj_wait(struct pipe_context *_pipe,
+   struct pipe_semaphore_object *semobj)
+{
+   struct threaded_context *tc = threaded_context(_pipe);
+   struct pipe_context *pipe = tc->pipe;
+
+   pipe->semobj_wait(pipe, semobj);
+}
+
+static void
+tc_semobj_signal(struct pipe_context *_pipe,
+ struct pipe_semaphore_object *semobj)
+{
+   struct threaded_context *tc = threaded_context(_pipe);
+   struct pipe_context *pipe = tc->pipe;
+
+   pipe->semobj_signal(pipe, semobj);
+}
 
 /
  * miscellaneous
@@ -2451,6 +2474,8 @@ threaded_context_create(struct pipe_context *pipe,
CTX_INIT(create_image_handle);
CTX_INIT(delete_image_handle);
CTX_INIT(make_image_handle_resident);
+   CTX_INIT(semobj_wait);
+   CTX_INIT(semobj_signal);
 #undef CTX_INIT
 
if (out)
-- 
2.9.3

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[Mesa-dev] [PATCH 05/17] gallium: introduce semaphore object

[Andres Rodriguez]

Signed-off-by: Andres Rodriguez 
---
 src/gallium/drivers/ddebug/dd_context.c | 23 +++
 src/gallium/drivers/ddebug/dd_screen.c  | 25 +
 src/gallium/drivers/trace/tr_context.c  | 36 ++
 src/gallium/drivers/trace/tr_screen.c   | 39 +
 src/gallium/include/pipe/p_context.h| 26 ++
 src/gallium/include/pipe/p_screen.h | 22 +++
 src/gallium/include/pipe/p_state.h  |  8 +++
 7 files changed, 179 insertions(+)

diff --git a/src/gallium/drivers/ddebug/dd_context.c 
b/src/gallium/drivers/ddebug/dd_context.c
index 2abbff9..653e368 100644
--- a/src/gallium/drivers/ddebug/dd_context.c
+++ b/src/gallium/drivers/ddebug/dd_context.c
@@ -663,6 +663,27 @@ dd_context_texture_subdata(struct pipe_context *_pipe,
  stride, layer_stride);
 }
 
+/
+ * Semaphores
+ */
+
+static void
+dd_context_semobj_wait(struct pipe_context *_pipe,
+   struct pipe_semaphore_object *semobj)
+{
+   struct pipe_context *pipe = dd_context(_pipe)->pipe;
+
+   pipe->semobj_wait(pipe, semobj);
+}
+
+static void
+dd_context_semobj_signal(struct pipe_context *_pipe,
+ struct pipe_semaphore_object *semobj)
+{
+   struct pipe_context *pipe = dd_context(_pipe)->pipe;
+
+   pipe->semobj_signal(pipe, semobj);
+}
 
 /
  * miscellaneous
@@ -912,6 +933,8 @@ dd_context_create(struct dd_screen *dscreen, struct 
pipe_context *pipe)
CTX_INIT(create_image_handle);
CTX_INIT(delete_image_handle);
CTX_INIT(make_image_handle_resident);
+   CTX_INIT(semobj_wait);
+   CTX_INIT(semobj_signal);
 
dd_init_draw_functions(dctx);
 
diff --git a/src/gallium/drivers/ddebug/dd_screen.c 
b/src/gallium/drivers/ddebug/dd_screen.c
index caf31f6..6c854cd 100644
--- a/src/gallium/drivers/ddebug/dd_screen.c
+++ b/src/gallium/drivers/ddebug/dd_screen.c
@@ -367,6 +367,29 @@ dd_screen_memobj_destroy(struct pipe_screen *_screen,
 
screen->memobj_destroy(screen, memobj);
 }
+
+/
+ * memobj
+ */
+
+static struct pipe_semaphore_object *
+dd_screen_semobj_create_from_fd(struct pipe_screen *_screen,
+int fd)
+{
+   struct pipe_screen *screen = dd_screen(_screen)->screen;
+
+   return screen->semobj_create_from_fd(screen, fd);
+}
+
+static void
+dd_screen_semobj_destroy(struct pipe_screen *_screen,
+ struct pipe_semaphore_object *semobj)
+{
+   struct pipe_screen *screen = dd_screen(_screen)->screen;
+
+   screen->semobj_destroy(screen, semobj);
+}
+
 /
  * screen
  */
@@ -486,6 +509,8 @@ ddebug_screen_create(struct pipe_screen *screen)
SCR_INIT(fence_finish);
SCR_INIT(memobj_create_from_handle);
SCR_INIT(memobj_destroy);
+   SCR_INIT(semobj_create_from_fd);
+   SCR_INIT(semobj_destroy);
SCR_INIT(get_driver_query_info);
SCR_INIT(get_driver_query_group_info);
SCR_INIT(get_compiler_options);
diff --git a/src/gallium/drivers/trace/tr_context.c 
b/src/gallium/drivers/trace/tr_context.c
index 6d918d4..3e423c5 100644
--- a/src/gallium/drivers/trace/tr_context.c
+++ b/src/gallium/drivers/trace/tr_context.c
@@ -1810,6 +1810,40 @@ static void 
trace_context_make_image_handle_resident(struct pipe_context *_pipe,
pipe->make_image_handle_resident(pipe, handle, access, resident);
 }
 
+/
+ * Semaphores
+ */
+
+static void
+trace_context_semobj_wait(struct pipe_context *_pipe,
+  struct pipe_semaphore_object *semobj)
+{
+   struct trace_context *tr_ctx = trace_context(_pipe);
+   struct pipe_context *pipe = tr_ctx->pipe;
+
+   trace_dump_call_begin("pipe_context", "semobj_wait");
+   trace_dump_arg(ptr, _pipe);
+   trace_dump_arg(ptr, semobj);
+   trace_dump_call_end();
+
+   pipe->semobj_wait(pipe, semobj);
+}
+
+static void
+trace_context_semobj_signal(struct pipe_context *_pipe,
+struct pipe_semaphore_object *semobj)
+{
+   struct trace_context *tr_ctx = trace_context(_pipe);
+   struct pipe_context *pipe = tr_ctx->pipe;
+
+   trace_dump_call_begin("pipe_context", "semobj_signal");
+   trace_dump_arg(ptr, _pipe);
+   trace_dump_arg(ptr, semobj);
+   trace_dump_call_end();
+
+   pipe->semobj_signal(pipe, semobj);
+}
+
 struct pipe_context *
 trace_context_create(struct trace_screen *tr_scr,
  struct pipe_context *pipe)
@@ -1917,6 +1951,8 @@ trace_context_create(struct trace_screen *tr_scr,
TR_CTX_INIT(create_image_handle);
TR_CTX_INIT(delete_image_handle);
TR_CTX_INIT(make_image_handle_resident);
+   TR_CTX_INIT(semobj_wait);
+   TR_CTX_INIT(semobj_signal);
 
  

[Mesa-dev] [PATCH 04/17] mesa: add semaphore parameter stub

[Andres Rodriguez]

EXT_semaphore and EXT_semaphore_fd define no pnames. Therefore there
isn't much to do besides determining the correct error code.

Signed-off-by: Andres Rodriguez 
---
 src/mesa/main/externalobjects.c | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/src/mesa/main/externalobjects.c b/src/mesa/main/externalobjects.c
index 30f5248..93a92e9 100644
--- a/src/mesa/main/externalobjects.c
+++ b/src/mesa/main/externalobjects.c
@@ -696,12 +696,33 @@ _mesa_IsSemaphoreEXT(GLuint semaphore)
return obj ? GL_TRUE : GL_FALSE;
 }
 
+/**
+ * Helper that outputs the correct error status for parameter
+ * calls where no pnames are defined
+ */
+static void
+semaphore_parameter_stub(const char* func, GLenum pname)
+{
+   GET_CURRENT_CONTEXT(ctx);
+
+   if (!ctx->Extensions.EXT_semaphore) {
+  _mesa_error(ctx, GL_INVALID_OPERATION, "%s(unsupported)", func);
+  return;
+   }
+
+   /* EXT_semaphore and EXT_semaphore_fd define no parameters */
+   _mesa_error(ctx, GL_INVALID_ENUM, "%s(pname=0x%x)", func, pname);
+   return;
+}
+
 void GLAPIENTRY
 _mesa_SemaphoreParameterui64vEXT(GLuint semaphore,
  GLenum pname,
  const GLuint64 *params)
 {
+   const char *func = "glSemaphoreParameterui64vEXT";
 
+   semaphore_parameter_stub(func, pname);
 }
 
 void GLAPIENTRY
@@ -709,7 +730,9 @@ _mesa_GetSemaphoreParameterui64vEXT(GLuint semaphore,
 GLenum pname,
 GLuint64 *params)
 {
+   const char *func = "glGetSemaphoreParameterui64vEXT";
 
+   semaphore_parameter_stub(func, pname);
 }
 
 void GLAPIENTRY
-- 
2.9.3

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[Mesa-dev] [PATCH 02/17] mesa/st: expose EXT_semaphore and EXT_semaphore_fd

[Andres Rodriguez]

Guarded by PIPE_CAP_SEMAPHORE.

Signed-off-by: Andres Rodriguez 
---
 src/mesa/main/extensions_table.h   | 2 ++
 src/mesa/main/mtypes.h | 2 ++
 src/mesa/state_tracker/st_extensions.c | 2 ++
 3 files changed, 6 insertions(+)

diff --git a/src/mesa/main/extensions_table.h b/src/mesa/main/extensions_table.h
index 8d8b637..1fb6dd1 100644
--- a/src/mesa/main/extensions_table.h
+++ b/src/mesa/main/extensions_table.h
@@ -245,6 +245,8 @@ EXT(EXT_read_format_bgra, dummy_true
 EXT(EXT_rescale_normal  , dummy_true   
  , GLL,  x ,  x ,  x , 1997)
 EXT(EXT_robustness  , KHR_robustness   
  ,  x,   x,   x , ES2, 2011)
 EXT(EXT_secondary_color , dummy_true   
  , GLL,  x ,  x ,  x , 1999)
+EXT(EXT_semaphore   , EXT_semaphore
  , GLL, GLC,  x , ES2, 2017)
+EXT(EXT_semaphore_fd, EXT_semaphore_fd 
  , GLL, GLC,  x , ES2, 2017)
 EXT(EXT_separate_shader_objects , dummy_true   
  ,  x ,  x ,  x , ES2, 2013)
 EXT(EXT_separate_specular_color , dummy_true   
  , GLL,  x ,  x ,  x , 1997)
 EXT(EXT_shader_framebuffer_fetch, MESA_shader_framebuffer_fetch
  ,  x ,  x ,  x , ES2, 2013)
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index 2acf64e..2894243 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -4143,6 +4143,8 @@ struct gl_extensions
GLboolean EXT_pixel_buffer_object;
GLboolean EXT_point_parameters;
GLboolean EXT_provoking_vertex;
+   GLboolean EXT_semaphore;
+   GLboolean EXT_semaphore_fd;
GLboolean EXT_shader_integer_mix;
GLboolean EXT_shader_samples_identical;
GLboolean EXT_stencil_two_side;
diff --git a/src/mesa/state_tracker/st_extensions.c 
b/src/mesa/state_tracker/st_extensions.c
index fa2d002..1c309d5 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -644,6 +644,8 @@ void st_init_extensions(struct pipe_screen *screen,
   { o(EXT_draw_buffers2),PIPE_CAP_INDEP_BLEND_ENABLE   
},
   { o(EXT_memory_object),PIPE_CAP_MEMOBJ   
},
   { o(EXT_memory_object_fd), PIPE_CAP_MEMOBJ   
},
+  { o(EXT_semaphore),PIPE_CAP_SEMAPHORE
},
+  { o(EXT_semaphore_fd), PIPE_CAP_SEMAPHORE
},
   { o(EXT_stencil_two_side), PIPE_CAP_TWO_SIDED_STENCIL
},
   { o(EXT_texture_array),PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS 
},
   { o(EXT_texture_filter_anisotropic),   PIPE_CAP_ANISOTROPIC_FILTER   
},
-- 
2.9.3

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[Mesa-dev] [PATCH 03/17] mesa: add support for semaphore object creation/import/delete

[Andres Rodriguez]

Used by EXT_semmaphore and EXT_semaphore_fd

Signed-off-by: Andres Rodriguez 
---
 src/mesa/drivers/common/driverfuncs.c |   3 +
 src/mesa/main/dd.h|  34 +++
 src/mesa/main/externalobjects.c   | 161 +-
 src/mesa/main/externalobjects.h   |  34 ++-
 src/mesa/main/mtypes.h|   7 ++
 src/mesa/main/shared.c|  17 
 6 files changed, 254 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/common/driverfuncs.c 
b/src/mesa/drivers/common/driverfuncs.c
index ddb4bb6..1ab1b5d 100644
--- a/src/mesa/drivers/common/driverfuncs.c
+++ b/src/mesa/drivers/common/driverfuncs.c
@@ -170,6 +170,9 @@ _mesa_init_driver_functions(struct dd_function_table 
*driver)
/* memory objects */
_mesa_init_memory_object_functions(driver);
 
+   /* semaphore objects */
+   _mesa_init_semaphore_object_functions(driver);
+
driver->NewFramebuffer = _mesa_new_framebuffer;
driver->NewRenderbuffer = _swrast_new_soft_renderbuffer;
driver->MapRenderbuffer = _swrast_map_soft_renderbuffer;
diff --git a/src/mesa/main/dd.h b/src/mesa/main/dd.h
index da03b2e..b089219 100644
--- a/src/mesa/main/dd.h
+++ b/src/mesa/main/dd.h
@@ -1126,6 +1126,40 @@ struct dd_function_table {
 GLuint64 size,
 int fd);
/*@}*/
+
+   /**
+* \name GL_EXT_semaphore interface
+*/
+   /*@{*/
+  /**
+* Called to allocate a new semaphore object. Drivers will usually
+* allocate/return a subclass of gl_semaphore_object.
+*/
+   struct gl_semaphore_object * (*NewSemaphoreObject)(struct gl_context *ctx,
+  GLuint name);
+   /**
+* Called to delete/free a semaphore object. Drivers should free the
+* object and any associated resources.
+*/
+   void (*DeleteSemaphoreObject)(struct gl_context *ctx,
+ struct gl_semaphore_object *semObj);
+   /*@}*/
+
+   /**
+* \name GL_EXT_semaphore_fd interface
+*/
+   /*@{*/
+   /**
+* Called to import a semaphore object. The caller relinquishes ownership
+* of fd after the call returns.
+*
+* Accessing fd after ImportSemaphoreFd returns results in undefined
+* behaviour. This is consistent with EXT_semaphore_fd.
+*/
+   void (*ImportSemaphoreFd)(struct gl_context *ctx,
+struct gl_semaphore_object *semObj,
+int fd);
+   /*@}*/
 };
 
 
diff --git a/src/mesa/main/externalobjects.c b/src/mesa/main/externalobjects.c
index e70280c..30f5248 100644
--- a/src/mesa/main/externalobjects.c
+++ b/src/mesa/main/externalobjects.c
@@ -547,22 +547,153 @@ _mesa_TextureStorageMem1DEXT(GLuint texture,
  memory, offset, "glTextureStorageMem1DEXT");
 }
 
+/**
+ * Used as a placeholder for semaphore objects between glGenSemaphoresEXT()
+ * and glImportSemaphoreFdEXT(), so that glIsSemaphoreEXT() can work correctly.
+ */
+static struct gl_semaphore_object DummySemaphoreObject;
+
+
+/**
+ * Allocate and initialize a new semaphore object.  But don't put it into the
+ * semaphore object hash table.
+ *
+ * Called via ctx->Driver.NewSemaphoreObject, unless overridden by a device
+ * driver.
+ *
+ * \return pointer to new semaphore object.
+ */
+static struct gl_semaphore_object *
+_mesa_new_semaphore_object(struct gl_context *ctx, GLuint name)
+{
+   struct gl_semaphore_object *obj = MALLOC_STRUCT(gl_semaphore_object);
+   if (!obj)
+  return NULL;
+
+   _mesa_initialize_semaphore_object(ctx, obj, name);
+   return obj;
+}
+
+/**
+ * Delete a semaphore object.  Called via ctx->Driver.DeleteSemaphore().
+ * Not removed from hash table here.
+ */
+void
+_mesa_delete_semaphore_object(struct gl_context *ctx,
+  struct gl_semaphore_object *semObj)
+{
+   free(semObj);
+}
+
+void
+_mesa_init_semaphore_object_functions(struct dd_function_table *driver)
+{
+   driver->NewSemaphoreObject = _mesa_new_semaphore_object;
+   driver->DeleteSemaphoreObject = _mesa_delete_semaphore_object;
+}
+
+/**
+ * Initialize a semaphore object to default values.
+ */
+void
+_mesa_initialize_semaphore_object(struct gl_context *ctx,
+  struct gl_semaphore_object *obj,
+  GLuint name)
+{
+   memset(obj, 0, sizeof(struct gl_semaphore_object));
+   obj->Name = name;
+}
+
 void GLAPIENTRY
 _mesa_GenSemaphoresEXT(GLsizei n, GLuint *semaphores)
 {
+   GET_CURRENT_CONTEXT(ctx);
+
+   const char *func = "glGenSemaphoresEXT";
+
+   if (MESA_VERBOSE & (VERBOSE_API))
+  _mesa_debug(ctx, "%s(%d, %p)", func, n, semaphores);
+
+   if (!ctx->Extensions.EXT_semaphore) {
+  _mesa_error(ctx, GL_INVALID_OPERATION, "%s(unsupported)", func);
+  return;
+   }
+
+   if (n < 0) {
+  _mesa_error(ctx, GL_INVALID_VALUE, "%s(n < 0)", func);
+  return;
+   }
+
+   if 

[Mesa-dev] [PATCH 01/17] gallium: introduce PIPE_CAP_SEMAPHORE

[Andres Rodriguez]

Used to guard support for EXT_semaphore.

Signed-off-by: Andres Rodriguez 
---
 src/gallium/docs/source/screen.rst   | 1 +
 src/gallium/drivers/etnaviv/etnaviv_screen.c | 1 +
 src/gallium/drivers/freedreno/freedreno_screen.c | 1 +
 src/gallium/drivers/i915/i915_screen.c   | 1 +
 src/gallium/drivers/llvmpipe/lp_screen.c | 1 +
 src/gallium/drivers/nouveau/nv30/nv30_screen.c   | 1 +
 src/gallium/drivers/nouveau/nv50/nv50_screen.c   | 1 +
 src/gallium/drivers/nouveau/nvc0/nvc0_screen.c   | 1 +
 src/gallium/drivers/r300/r300_screen.c   | 1 +
 src/gallium/drivers/r600/r600_pipe.c | 1 +
 src/gallium/drivers/radeonsi/si_pipe.c   | 1 +
 src/gallium/drivers/softpipe/sp_screen.c | 1 +
 src/gallium/drivers/svga/svga_screen.c   | 1 +
 src/gallium/drivers/swr/swr_screen.cpp   | 1 +
 src/gallium/drivers/vc4/vc4_screen.c | 1 +
 src/gallium/drivers/virgl/virgl_screen.c | 1 +
 src/gallium/include/pipe/p_defines.h | 1 +
 17 files changed, 17 insertions(+)

diff --git a/src/gallium/docs/source/screen.rst 
b/src/gallium/docs/source/screen.rst
index 376b95e..fe7ee5e 100644
--- a/src/gallium/docs/source/screen.rst
+++ b/src/gallium/docs/source/screen.rst
@@ -414,6 +414,7 @@ The integer capabilities:
 * ``PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES``: Limit on combined shader
   output resources (images + buffers + fragment outputs). If 0 the state
   tracker works it out.
+* ``PIPE_CAP_SEMAPHORE``: True if the driver supports semaphore objects
 
 .. _pipe_capf:
 
diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.c 
b/src/gallium/drivers/etnaviv/etnaviv_screen.c
index 68973be..44f5de7 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_screen.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_screen.c
@@ -267,6 +267,7 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum 
pipe_cap param)
case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+   case PIPE_CAP_SEMAPHORE:
   return 0;
 
/* Stream output. */
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c 
b/src/gallium/drivers/freedreno/freedreno_screen.c
index 30b2ded..8ed0ff4 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -328,6 +328,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum 
pipe_cap param)
case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+   case PIPE_CAP_SEMAPHORE:
return 0;
 
case PIPE_CAP_MAX_VIEWPORTS:
diff --git a/src/gallium/drivers/i915/i915_screen.c 
b/src/gallium/drivers/i915/i915_screen.c
index d7bd810..e8b421f 100644
--- a/src/gallium/drivers/i915/i915_screen.c
+++ b/src/gallium/drivers/i915/i915_screen.c
@@ -320,6 +320,7 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap 
cap)
case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+   case PIPE_CAP_SEMAPHORE:
   return 0;
 
case PIPE_CAP_MAX_VIEWPORTS:
diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c 
b/src/gallium/drivers/llvmpipe/lp_screen.c
index fc11317..082257f 100644
--- a/src/gallium/drivers/llvmpipe/lp_screen.c
+++ b/src/gallium/drivers/llvmpipe/lp_screen.c
@@ -363,6 +363,7 @@ llvmpipe_get_param(struct pipe_screen *screen, enum 
pipe_cap param)
case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+   case PIPE_CAP_SEMAPHORE:
   return 0;
}
/* should only get here on unhandled cases */
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_screen.c 
b/src/gallium/drivers/nouveau/nv30/nv30_screen.c
index 6ebce57..151a0b8 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_screen.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_screen.c
@@ -227,6 +227,7 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum 
pipe_cap param)
case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+   case PIPE_CAP_SEMAPHORE:
   return 0;
 
case PIPE_CAP_VENDOR_ID:
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c 
b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
index 2066cf3..a9ede61 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
@@ -279,6 +279,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum 
pipe_cap param)
case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+   case PIPE_CAP_SEMAPHORE:
   return 0;
 
case PIPE_CAP_VENDOR_ID:
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c 

[Mesa-dev] [Bug 103140] [OpenGL CTS] KHR-GL45.enhanced_layouts.varying_location_aliasing_* fails

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=103140

Kenneth Graunke  changed:

   What|Removed |Added

 Resolution|--- |FIXED
 Status|NEW |RESOLVED

--- Comment #2 from Kenneth Graunke  ---
Seem to be passing, probably fixed by

commit ab40acb45341d8cea011ba7330626ffc6e3238ad
Author: Iago Toral Quiroga 
Date:   Thu Oct 19 16:33:49 2017 +0200

glsl/linker: outputs in the same location must share auxiliary storage

From ARB_enhanced_layouts:

"[...]when location aliasing, the aliases sharing the location
  must have the same underlying numerical type (floating-point or
  integer) and the same auxiliary storage and
  interpolation qualification.[...]"

Add code to the linker to validate that aliased locations do
have the same aux storage.

Fixes:
   
KHR-GL45.enhanced_layouts.varying_location_aliasing_with_mixed_auxiliary_storage

Reviewed-by: Timothy Arceri 
Reviewed-by: Ilia Mirkin 

commit 0b565f715d24d74d844f0708e3ed17ad1ee14faf
Author: Iago Toral Quiroga 
Date:   Thu Oct 19 16:13:21 2017 +0200

glsl/linker: outputs in the same location must share interpolation

From ARB_enhanced_layouts:

"[...]when location aliasing, the aliases sharing the location
 must have the same underlying numerical type (floating-point or
 integer) and the same auxiliary storage and
 interpolation qualification.[...]"

Add code to the linker to validate that aliased locations do
have the same interpolation.

Fixes:
   
KHR-GL45.enhanced_layouts.varying_location_aliasing_with_mixed_interpolation

Reviewed-by: Timothy Arceri 

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[Mesa-dev] [PATCH 09/10] ac: remove usused v4f32

[Timothy Arceri]

---
 src/amd/common/ac_nir_to_llvm.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index ac50debdde..ec51ed7007 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,22 +127,20 @@ struct nir_to_llvm_context {
LLVMValueRef esgs_ring;
LLVMValueRef gsvs_ring;
LLVMValueRef hs_ring_tess_offchip;
LLVMValueRef hs_ring_tess_factor;
 
LLVMValueRef prim_mask;
LLVMValueRef sample_pos_offset;
LLVMValueRef persp_sample, persp_center, persp_centroid;
LLVMValueRef linear_sample, linear_center, linear_centroid;
 
-   LLVMTypeRef v4f32;
-
unsigned uniform_md_kind;
LLVMValueRef empty_md;
gl_shader_stage stage;
 
LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
 
uint64_t input_mask;
uint64_t output_mask;
uint8_t num_output_clips;
uint8_t num_output_culls;
@@ -977,22 +975,20 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
break;
default:
unreachable("Shader stage not implemented");
}
 
ctx->shader_info->num_user_sgprs = user_sgpr_idx;
 }
 
 static void setup_types(struct nir_to_llvm_context *ctx)
 {
-   ctx->v4f32 = LLVMVectorType(ctx->ac.f32, 4);
-
ctx->uniform_md_kind =
LLVMGetMDKindIDInContext(ctx->context, "amdgpu.uniform", 14);
ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
 }
 
 static int get_llvm_num_components(LLVMValueRef value)
 {
LLVMTypeRef type = LLVMTypeOf(value);
unsigned num_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind
  ? LLVMGetVectorSize(type)
-- 
2.14.3

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[Mesa-dev] [PATCH 08/10] ac: add v2f32 to the common code and make use of it

[Timothy Arceri]

---
 src/amd/common/ac_llvm_build.c  |  1 +
 src/amd/common/ac_llvm_build.h  |  1 +
 src/amd/common/ac_nir_to_llvm.c | 15 +--
 3 files changed, 7 insertions(+), 10 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 1519262b3d..5640a23b8a 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -62,20 +62,21 @@ ac_llvm_context_init(struct ac_llvm_context *ctx, 
LLVMContextRef context,
ctx->i8 = LLVMInt8TypeInContext(ctx->context);
ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
ctx->i32 = LLVMIntTypeInContext(ctx->context, 32);
ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
ctx->f16 = LLVMHalfTypeInContext(ctx->context);
ctx->f32 = LLVMFloatTypeInContext(ctx->context);
ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
ctx->v2i32 = LLVMVectorType(ctx->i32, 2);
ctx->v3i32 = LLVMVectorType(ctx->i32, 3);
ctx->v4i32 = LLVMVectorType(ctx->i32, 4);
+   ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
 
ctx->i32_0 = LLVMConstInt(ctx->i32, 0, false);
ctx->i32_1 = LLVMConstInt(ctx->i32, 1, false);
ctx->f32_0 = LLVMConstReal(ctx->f32, 0.0);
ctx->f32_1 = LLVMConstReal(ctx->f32, 1.0);
 
ctx->i1false = LLVMConstInt(ctx->i1, 0, false);
ctx->i1true = LLVMConstInt(ctx->i1, 1, false);
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index f662cc4dd8..1f51937c9e 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -48,20 +48,21 @@ struct ac_llvm_context {
LLVMTypeRef i8;
LLVMTypeRef i16;
LLVMTypeRef i32;
LLVMTypeRef i64;
LLVMTypeRef f16;
LLVMTypeRef f32;
LLVMTypeRef f64;
LLVMTypeRef v2i32;
LLVMTypeRef v3i32;
LLVMTypeRef v4i32;
+   LLVMTypeRef v2f32;
LLVMTypeRef v4f32;
LLVMTypeRef v8i32;
 
LLVMValueRef i32_0;
LLVMValueRef i32_1;
LLVMValueRef f32_0;
LLVMValueRef f32_1;
LLVMValueRef i1true;
LLVMValueRef i1false;
 
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 1e1a1c0276..ac50debdde 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,21 +127,20 @@ struct nir_to_llvm_context {
LLVMValueRef esgs_ring;
LLVMValueRef gsvs_ring;
LLVMValueRef hs_ring_tess_offchip;
LLVMValueRef hs_ring_tess_factor;
 
LLVMValueRef prim_mask;
LLVMValueRef sample_pos_offset;
LLVMValueRef persp_sample, persp_center, persp_centroid;
LLVMValueRef linear_sample, linear_center, linear_centroid;
 
-   LLVMTypeRef v2f32;
LLVMTypeRef v4f32;
 
unsigned uniform_md_kind;
LLVMValueRef empty_md;
gl_shader_stage stage;
 
LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
 
uint64_t input_mask;
uint64_t output_mask;
@@ -978,21 +977,20 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
break;
default:
unreachable("Shader stage not implemented");
}
 
ctx->shader_info->num_user_sgprs = user_sgpr_idx;
 }
 
 static void setup_types(struct nir_to_llvm_context *ctx)
 {
-   ctx->v2f32 = LLVMVectorType(ctx->ac.f32, 2);
ctx->v4f32 = LLVMVectorType(ctx->ac.f32, 4);
 
ctx->uniform_md_kind =
LLVMGetMDKindIDInContext(ctx->context, "amdgpu.uniform", 14);
ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
 }
 
 static int get_llvm_num_components(LLVMValueRef value)
 {
LLVMTypeRef type = LLVMTypeOf(value);
@@ -1443,22 +1441,21 @@ static LLVMValueRef emit_unpack_half_2x16(struct 
ac_llvm_context *ctx,
LLVMValueRef temps[2], result, val;
int i;
 
for (i = 0; i < 2; i++) {
val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : 
src0;
val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
}
 
-   LLVMTypeRef v2f32 = LLVMVectorType(ctx->f32, 2);
-   result = LLVMBuildInsertElement(ctx->builder, LLVMGetUndef(v2f32), 
temps[0],
+   result = LLVMBuildInsertElement(ctx->builder, LLVMGetUndef(ctx->v2f32), 
temps[0],
ctx->i32_0, "");
result = LLVMBuildInsertElement(ctx->builder, result, temps[1],
ctx->i32_1, "");
return result;
 }
 
 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
  nir_op op,
  LLVMValueRef src0)
 {
@@ -2298,25 +2295,23 @@ static void visit_store_ssbo(struct 

[Mesa-dev] [PATCH 10/10] ac: remove the remaining duplicate llvm types

[Timothy Arceri]

---
 src/amd/common/ac_nir_to_llvm.c | 13 +
 1 file changed, 1 insertion(+), 12 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index ec51ed7007..38a65b9cd1 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,22 +127,20 @@ struct nir_to_llvm_context {
LLVMValueRef esgs_ring;
LLVMValueRef gsvs_ring;
LLVMValueRef hs_ring_tess_offchip;
LLVMValueRef hs_ring_tess_factor;
 
LLVMValueRef prim_mask;
LLVMValueRef sample_pos_offset;
LLVMValueRef persp_sample, persp_center, persp_centroid;
LLVMValueRef linear_sample, linear_center, linear_centroid;
 
-   unsigned uniform_md_kind;
-   LLVMValueRef empty_md;
gl_shader_stage stage;
 
LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
 
uint64_t input_mask;
uint64_t output_mask;
uint8_t num_output_clips;
uint8_t num_output_culls;
 
bool is_gs_copy_shader;
@@ -973,27 +971,20 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
set_userdata_location_shader(ctx, 
AC_UD_PS_SAMPLE_POS_OFFSET, _sgpr_idx, 1);
}
break;
default:
unreachable("Shader stage not implemented");
}
 
ctx->shader_info->num_user_sgprs = user_sgpr_idx;
 }
 
-static void setup_types(struct nir_to_llvm_context *ctx)
-{
-   ctx->uniform_md_kind =
-   LLVMGetMDKindIDInContext(ctx->context, "amdgpu.uniform", 14);
-   ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
-}
-
 static int get_llvm_num_components(LLVMValueRef value)
 {
LLVMTypeRef type = LLVMTypeOf(value);
unsigned num_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind
  ? LLVMGetVectorSize(type)
  : 1;
return num_components;
 }
 
 static LLVMValueRef llvm_extract_elem(struct ac_llvm_context *ac,
@@ -2213,21 +2204,21 @@ static LLVMValueRef visit_vulkan_resource_index(struct 
nir_to_llvm_context *ctx,
stride = LLVMConstInt(ctx->ac.i32, 16, false);
} else
stride = LLVMConstInt(ctx->ac.i32, 
layout->binding[binding].size, false);
 
offset = LLVMConstInt(ctx->ac.i32, base_offset, false);
index = LLVMBuildMul(ctx->builder, index, stride, "");
offset = LLVMBuildAdd(ctx->builder, offset, index, "");

desc_ptr = ac_build_gep0(>ac, desc_ptr, offset);
desc_ptr = cast_ptr(ctx, desc_ptr, ctx->ac.v4i32);
-   LLVMSetMetadata(desc_ptr, ctx->uniform_md_kind, ctx->empty_md);
+   LLVMSetMetadata(desc_ptr, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
 
return LLVMBuildLoad(ctx->builder, desc_ptr, "");
 }
 
 static LLVMValueRef visit_load_push_constant(struct nir_to_llvm_context *ctx,
  nir_intrinsic_instr *instr)
 {
LLVMValueRef ptr, addr;
 
addr = LLVMConstInt(ctx->ac.i32, nir_intrinsic_base(instr), 0);
@@ -6474,21 +6465,20 @@ LLVMModuleRef 
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
ac_llvm_context_init(, ctx.context, options->chip_class);
ctx.ac.module = ctx.module;
LLVMSetTarget(ctx.module, options->supports_spill ? 
"amdgcn-mesa-mesa3d" : "amdgcn--");
 
LLVMTargetDataRef data_layout = LLVMCreateTargetDataLayout(tm);
char *data_layout_str = LLVMCopyStringRepOfTargetData(data_layout);
LLVMSetDataLayout(ctx.module, data_layout_str);
LLVMDisposeTargetData(data_layout);
LLVMDisposeMessage(data_layout_str);
 
-   setup_types();
ctx.builder = LLVMCreateBuilderInContext(ctx.context);
ctx.ac.builder = ctx.builder;
 
memset(shader_info, 0, sizeof(*shader_info));
 
for(int i = 0; i < shader_count; ++i)
ac_nir_shader_info_pass(shaders[i], options, 
_info->info);
 
for (i = 0; i < AC_UD_MAX_SETS; i++)
shader_info->user_sgprs_locs.descriptor_sets[i].sgpr_idx = -1;
@@ -6847,21 +6837,20 @@ void ac_create_gs_copy_shader(LLVMTargetMachineRef tm,
ctx.context = LLVMContextCreate();
ctx.module = LLVMModuleCreateWithNameInContext("shader", ctx.context);
ctx.options = options;
ctx.shader_info = shader_info;
 
ac_llvm_context_init(, ctx.context, options->chip_class);
ctx.ac.module = ctx.module;
 
ctx.is_gs_copy_shader = true;
LLVMSetTarget(ctx.module, "amdgcn--");
-   setup_types();
 
ctx.builder = LLVMCreateBuilderInContext(ctx.context);
ctx.ac.builder = ctx.builder;
ctx.stage = MESA_SHADER_VERTEX;
 
create_function(, MESA_SHADER_VERTEX, false, MESA_SHADER_VERTEX);
 
ctx.gs_max_out_vertices = geom_shader->info.gs.vertices_out;
ac_setup_rings();
 
-- 
2.14.3

___
mesa-dev 

[Mesa-dev] [PATCH 01/10] ac: add v2i32 to the common code and use it

[Timothy Arceri]

---
 src/amd/common/ac_llvm_build.c  |  1 +
 src/amd/common/ac_llvm_build.h  |  1 +
 src/amd/common/ac_nir_to_llvm.c | 20 +---
 3 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index ea238fa006..1a0d44bcdd 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -59,20 +59,21 @@ ac_llvm_context_init(struct ac_llvm_context *ctx, 
LLVMContextRef context,
 
ctx->voidt = LLVMVoidTypeInContext(ctx->context);
ctx->i1 = LLVMInt1TypeInContext(ctx->context);
ctx->i8 = LLVMInt8TypeInContext(ctx->context);
ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
ctx->i32 = LLVMIntTypeInContext(ctx->context, 32);
ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
ctx->f16 = LLVMHalfTypeInContext(ctx->context);
ctx->f32 = LLVMFloatTypeInContext(ctx->context);
ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
+   ctx->v2i32 = LLVMVectorType(ctx->i32, 2);
ctx->v4i32 = LLVMVectorType(ctx->i32, 4);
ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
 
ctx->i32_0 = LLVMConstInt(ctx->i32, 0, false);
ctx->i32_1 = LLVMConstInt(ctx->i32, 1, false);
ctx->f32_0 = LLVMConstReal(ctx->f32, 0.0);
ctx->f32_1 = LLVMConstReal(ctx->f32, 1.0);
 
ctx->i1false = LLVMConstInt(ctx->i1, 0, false);
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index f790619827..7fc336c3f9 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -45,20 +45,21 @@ struct ac_llvm_context {
 
LLVMTypeRef voidt;
LLVMTypeRef i1;
LLVMTypeRef i8;
LLVMTypeRef i16;
LLVMTypeRef i32;
LLVMTypeRef i64;
LLVMTypeRef f16;
LLVMTypeRef f32;
LLVMTypeRef f64;
+   LLVMTypeRef v2i32;
LLVMTypeRef v4i32;
LLVMTypeRef v4f32;
LLVMTypeRef v8i32;
 
LLVMValueRef i32_0;
LLVMValueRef i32_1;
LLVMValueRef f32_0;
LLVMValueRef f32_1;
LLVMValueRef i1true;
LLVMValueRef i1false;
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 2437ea05c1..0bcb0b0525 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,21 +127,20 @@ struct nir_to_llvm_context {
LLVMValueRef esgs_ring;
LLVMValueRef gsvs_ring;
LLVMValueRef hs_ring_tess_offchip;
LLVMValueRef hs_ring_tess_factor;
 
LLVMValueRef prim_mask;
LLVMValueRef sample_pos_offset;
LLVMValueRef persp_sample, persp_center, persp_centroid;
LLVMValueRef linear_sample, linear_center, linear_centroid;
 
-   LLVMTypeRef v2i32;
LLVMTypeRef v3i32;
LLVMTypeRef v4i32;
LLVMTypeRef v8i32;
LLVMTypeRef f64;
LLVMTypeRef f32;
LLVMTypeRef f16;
LLVMTypeRef v2f32;
LLVMTypeRef v4f32;
 
unsigned uniform_md_kind;
@@ -870,27 +869,27 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
add_vgpr_argument(, ctx->ac.i32, 
>gs_vtx_offset[4]);
add_vgpr_argument(, ctx->ac.i32, 
>gs_vtx_offset[5]);
add_vgpr_argument(, ctx->ac.i32, 
>gs_invocation_id);
}
break;
case MESA_SHADER_FRAGMENT:
radv_define_common_user_sgprs_phase1(ctx, stage, 
has_previous_stage, previous_stage, _sgpr_info, , _sets);
if (ctx->shader_info->info.ps.needs_sample_positions)
add_user_sgpr_argument(, ctx->ac.i32, 
>sample_pos_offset); /* sample position offset */
add_sgpr_argument(, ctx->ac.i32, >prim_mask); /* prim 
mask */
-   add_vgpr_argument(, ctx->v2i32, >persp_sample); /* 
persp sample */
-   add_vgpr_argument(, ctx->v2i32, >persp_center); /* 
persp center */
-   add_vgpr_argument(, ctx->v2i32, >persp_centroid); /* 
persp centroid */
+   add_vgpr_argument(, ctx->ac.v2i32, >persp_sample); /* 
persp sample */
+   add_vgpr_argument(, ctx->ac.v2i32, >persp_center); /* 
persp center */
+   add_vgpr_argument(, ctx->ac.v2i32, >persp_centroid); 
/* persp centroid */
add_vgpr_argument(, ctx->v3i32, NULL); /* persp pull model 
*/
-   add_vgpr_argument(, ctx->v2i32, >linear_sample); /* 
linear sample */
-   add_vgpr_argument(, ctx->v2i32, >linear_center); /* 
linear center */
-   add_vgpr_argument(, ctx->v2i32, >linear_centroid); /* 
linear centroid */
+   add_vgpr_argument(, ctx->ac.v2i32, >linear_sample); 
/* linear sample */
+   add_vgpr_argument(, ctx->ac.v2i32, >linear_center); 
/* linear center */
+   add_vgpr_argument(, ctx->ac.v2i32, >linear_centroid); 
/* linear centroid */
 

[Mesa-dev] [PATCH 06/10] ac: use the ac f32 llvm type

[Timothy Arceri]

---
 src/amd/common/ac_nir_to_llvm.c | 68 -
 1 file changed, 33 insertions(+), 35 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 45eb613579..736131ab56 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,21 +127,20 @@ struct nir_to_llvm_context {
LLVMValueRef esgs_ring;
LLVMValueRef gsvs_ring;
LLVMValueRef hs_ring_tess_offchip;
LLVMValueRef hs_ring_tess_factor;
 
LLVMValueRef prim_mask;
LLVMValueRef sample_pos_offset;
LLVMValueRef persp_sample, persp_center, persp_centroid;
LLVMValueRef linear_sample, linear_center, linear_centroid;
 
-   LLVMTypeRef f32;
LLVMTypeRef f16;
LLVMTypeRef v2f32;
LLVMTypeRef v4f32;
 
unsigned uniform_md_kind;
LLVMValueRef empty_md;
gl_shader_stage stage;
 
LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
 
@@ -798,22 +797,22 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
if (ctx->shader_info->info.needs_multiview_view_index || 
(!ctx->options->key.tes.as_es && ctx->options->key.has_multiview_view_index))
add_user_sgpr_argument(, ctx->ac.i32, 
>view_index);
if (ctx->options->key.tes.as_es) {
add_sgpr_argument(, ctx->ac.i32, >oc_lds); // 
OC LDS
add_sgpr_argument(, ctx->ac.i32, NULL); //
add_sgpr_argument(, ctx->ac.i32, 
>es2gs_offset); // es2gs offset
} else {
add_sgpr_argument(, ctx->ac.i32, NULL); //
add_sgpr_argument(, ctx->ac.i32, >oc_lds); // 
OC LDS
}
-   add_vgpr_argument(, ctx->f32, >tes_u); // tes_u
-   add_vgpr_argument(, ctx->f32, >tes_v); // tes_v
+   add_vgpr_argument(, ctx->ac.f32, >tes_u); // tes_u
+   add_vgpr_argument(, ctx->ac.f32, >tes_v); // tes_v
add_vgpr_argument(, ctx->ac.i32, >tes_rel_patch_id); 
// tes rel patch id
add_vgpr_argument(, ctx->ac.i32, >tes_patch_id); // 
tes patch id
break;
case MESA_SHADER_GEOMETRY:
if (has_previous_stage) {
// First 6 system regs
add_sgpr_argument(, ctx->ac.i32, 
>gs2vs_offset); // tess factor offset
add_sgpr_argument(, ctx->ac.i32, 
>merged_wave_info); // merged wave info
add_sgpr_argument(, ctx->ac.i32, >oc_lds); // 
param oc lds
 
@@ -836,22 +835,22 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
add_vgpr_argument(, ctx->ac.i32, 
>gs_prim_id); // prim id
add_vgpr_argument(, ctx->ac.i32, 
>gs_invocation_id);
add_vgpr_argument(, ctx->ac.i32, 
>gs_vtx_offset[4]);
 
if (previous_stage == MESA_SHADER_VERTEX) {
add_vgpr_argument(, ctx->ac.i32, 
>abi.vertex_id); // vertex id
add_vgpr_argument(, ctx->ac.i32, 
>rel_auto_id); // rel auto id
add_vgpr_argument(, ctx->ac.i32, 
>vs_prim_id); // vs prim id
add_vgpr_argument(, ctx->ac.i32, 
>abi.instance_id); // instance id
} else {
-   add_vgpr_argument(, ctx->f32, 
>tes_u); // tes_u
-   add_vgpr_argument(, ctx->f32, 
>tes_v); // tes_v
+   add_vgpr_argument(, ctx->ac.f32, 
>tes_u); // tes_u
+   add_vgpr_argument(, ctx->ac.f32, 
>tes_v); // tes_v
add_vgpr_argument(, ctx->ac.i32, 
>tes_rel_patch_id); // tes rel patch id
add_vgpr_argument(, ctx->ac.i32, 
>tes_patch_id); // tes patch id
}
} else {
radv_define_common_user_sgprs_phase1(ctx, stage, 
has_previous_stage, previous_stage, _sgpr_info, , _sets);
radv_define_vs_user_sgprs_phase1(ctx, stage, 
has_previous_stage, previous_stage, );
add_user_sgpr_argument(, ctx->ac.i32, 
>gsvs_ring_stride); // gsvs stride
add_user_sgpr_argument(, ctx->ac.i32, 
>gsvs_num_entries); // gsvs num entires
if (ctx->shader_info->info.needs_multiview_view_index)
add_user_sgpr_argument(, ctx->ac.i32, 
>view_index);
@@ -872,25 +871,25 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
if (ctx->shader_info->info.ps.needs_sample_positions)
add_user_sgpr_argument(, ctx->ac.i32, 
>sample_pos_offset); /* sample position offset */
add_sgpr_argument(, ctx->ac.i32, >prim_mask); /* prim 
mask */
   

[Mesa-dev] [PATCH 03/10] ac: use the common v4i32 llvm type

[Timothy Arceri]

---
 src/amd/common/ac_nir_to_llvm.c | 16 +++-
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 6a638e3f16..40c856224a 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,21 +127,20 @@ struct nir_to_llvm_context {
LLVMValueRef esgs_ring;
LLVMValueRef gsvs_ring;
LLVMValueRef hs_ring_tess_offchip;
LLVMValueRef hs_ring_tess_factor;
 
LLVMValueRef prim_mask;
LLVMValueRef sample_pos_offset;
LLVMValueRef persp_sample, persp_center, persp_centroid;
LLVMValueRef linear_sample, linear_center, linear_centroid;
 
-   LLVMTypeRef v4i32;
LLVMTypeRef v8i32;
LLVMTypeRef f64;
LLVMTypeRef f32;
LLVMTypeRef f16;
LLVMTypeRef v2f32;
LLVMTypeRef v4f32;
 
unsigned uniform_md_kind;
LLVMValueRef empty_md;
gl_shader_stage stage;
@@ -677,21 +676,21 @@ radv_define_common_user_sgprs_phase2(struct 
nir_to_llvm_context *ctx,
 
 static void
 radv_define_vs_user_sgprs_phase1(struct nir_to_llvm_context *ctx,
  gl_shader_stage stage,
  bool has_previous_stage,
  gl_shader_stage previous_stage,
  struct arg_info *args)
 {
if (!ctx->is_gs_copy_shader && (stage == MESA_SHADER_VERTEX || 
(has_previous_stage && previous_stage == MESA_SHADER_VERTEX))) {
if (ctx->shader_info->info.vs.has_vertex_buffers)
-   add_user_sgpr_argument(args, const_array(ctx->v4i32, 
16), >vertex_buffers); /* vertex buffers */
+   add_user_sgpr_argument(args, const_array(ctx->ac.v4i32, 
16), >vertex_buffers); /* vertex buffers */
add_user_sgpr_argument(args, ctx->ac.i32, 
>abi.base_vertex); // base vertex
add_user_sgpr_argument(args, ctx->ac.i32, 
>abi.start_instance);// start instance
if (ctx->shader_info->info.vs.needs_draw_id)
add_user_sgpr_argument(args, ctx->ac.i32, 
>abi.draw_id); // draw id
}
 }
 
 static void
 radv_define_vs_user_sgprs_phase2(struct nir_to_llvm_context *ctx,
  gl_shader_stage stage,
@@ -718,21 +717,21 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
 gl_shader_stage previous_stage)
 {
uint8_t user_sgpr_idx;
struct user_sgpr_info user_sgpr_info;
struct arg_info args = {};
LLVMValueRef desc_sets;
 
allocate_user_sgprs(ctx, _sgpr_info);
 
if (user_sgpr_info.need_ring_offsets && !ctx->options->supports_spill) {
-   add_user_sgpr_argument(, const_array(ctx->v4i32, 16), 
>ring_offsets); /* address of rings */
+   add_user_sgpr_argument(, const_array(ctx->ac.v4i32, 16), 
>ring_offsets); /* address of rings */
}
 
switch (stage) {
case MESA_SHADER_COMPUTE:
radv_define_common_user_sgprs_phase1(ctx, stage, 
has_previous_stage, previous_stage, _sgpr_info, , _sets);
if (ctx->shader_info->info.cs.grid_components_used)
add_user_sgpr_argument(, 
LLVMVectorType(ctx->ac.i32, ctx->shader_info->info.cs.grid_components_used), 
>num_work_groups); /* grid size */
add_sgpr_argument(, ctx->ac.v3i32, >workgroup_ids);
add_sgpr_argument(, ctx->ac.i32, >tg_size);
add_vgpr_argument(, ctx->ac.v3i32, 
>local_invocation_ids);
@@ -915,21 +914,21 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
 
user_sgpr_idx = 0;
 
if (ctx->options->supports_spill || user_sgpr_info.need_ring_offsets) {
set_userdata_location_shader(ctx, AC_UD_SCRATCH_RING_OFFSETS, 
_sgpr_idx, 2);
if (ctx->options->supports_spill) {
ctx->ring_offsets = ac_build_intrinsic(>ac, 
"llvm.amdgcn.implicit.buffer.ptr",
   
LLVMPointerType(ctx->ac.i8, CONST_ADDR_SPACE),
   NULL, 0, 
AC_FUNC_ATTR_READNONE);
ctx->ring_offsets = LLVMBuildBitCast(ctx->builder, 
ctx->ring_offsets,
-
const_array(ctx->v4i32, 16), "");
+
const_array(ctx->ac.v4i32, 16), "");
}
}

/* For merged shaders the user SGPRs start at 8, with 8 system SGPRs in 
front (including
 * the rw_buffers at s0/s1. With user SGPR0 = s8, lets restart the 
count from 0 */
if (has_previous_stage)
user_sgpr_idx = 0;
 
radv_define_common_user_sgprs_phase2(ctx, stage, has_previous_stage, 
previous_stage, _sgpr_info, desc_sets, _sgpr_idx);
 

[Mesa-dev] [PATCH 02/10] ac: add v3i32 to the common code and make use of it

[Timothy Arceri]

---
 src/amd/common/ac_llvm_build.c  | 1 +
 src/amd/common/ac_llvm_build.h  | 1 +
 src/amd/common/ac_nir_to_llvm.c | 8 +++-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 1a0d44bcdd..1519262b3d 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -60,20 +60,21 @@ ac_llvm_context_init(struct ac_llvm_context *ctx, 
LLVMContextRef context,
ctx->voidt = LLVMVoidTypeInContext(ctx->context);
ctx->i1 = LLVMInt1TypeInContext(ctx->context);
ctx->i8 = LLVMInt8TypeInContext(ctx->context);
ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
ctx->i32 = LLVMIntTypeInContext(ctx->context, 32);
ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
ctx->f16 = LLVMHalfTypeInContext(ctx->context);
ctx->f32 = LLVMFloatTypeInContext(ctx->context);
ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
ctx->v2i32 = LLVMVectorType(ctx->i32, 2);
+   ctx->v3i32 = LLVMVectorType(ctx->i32, 3);
ctx->v4i32 = LLVMVectorType(ctx->i32, 4);
ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
 
ctx->i32_0 = LLVMConstInt(ctx->i32, 0, false);
ctx->i32_1 = LLVMConstInt(ctx->i32, 1, false);
ctx->f32_0 = LLVMConstReal(ctx->f32, 0.0);
ctx->f32_1 = LLVMConstReal(ctx->f32, 1.0);
 
ctx->i1false = LLVMConstInt(ctx->i1, 0, false);
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index 7fc336c3f9..f662cc4dd8 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -46,20 +46,21 @@ struct ac_llvm_context {
LLVMTypeRef voidt;
LLVMTypeRef i1;
LLVMTypeRef i8;
LLVMTypeRef i16;
LLVMTypeRef i32;
LLVMTypeRef i64;
LLVMTypeRef f16;
LLVMTypeRef f32;
LLVMTypeRef f64;
LLVMTypeRef v2i32;
+   LLVMTypeRef v3i32;
LLVMTypeRef v4i32;
LLVMTypeRef v4f32;
LLVMTypeRef v8i32;
 
LLVMValueRef i32_0;
LLVMValueRef i32_1;
LLVMValueRef f32_0;
LLVMValueRef f32_1;
LLVMValueRef i1true;
LLVMValueRef i1false;
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 0bcb0b0525..6a638e3f16 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,21 +127,20 @@ struct nir_to_llvm_context {
LLVMValueRef esgs_ring;
LLVMValueRef gsvs_ring;
LLVMValueRef hs_ring_tess_offchip;
LLVMValueRef hs_ring_tess_factor;
 
LLVMValueRef prim_mask;
LLVMValueRef sample_pos_offset;
LLVMValueRef persp_sample, persp_center, persp_centroid;
LLVMValueRef linear_sample, linear_center, linear_centroid;
 
-   LLVMTypeRef v3i32;
LLVMTypeRef v4i32;
LLVMTypeRef v8i32;
LLVMTypeRef f64;
LLVMTypeRef f32;
LLVMTypeRef f16;
LLVMTypeRef v2f32;
LLVMTypeRef v4f32;
 
unsigned uniform_md_kind;
LLVMValueRef empty_md;
@@ -727,23 +726,23 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
 
if (user_sgpr_info.need_ring_offsets && !ctx->options->supports_spill) {
add_user_sgpr_argument(, const_array(ctx->v4i32, 16), 
>ring_offsets); /* address of rings */
}
 
switch (stage) {
case MESA_SHADER_COMPUTE:
radv_define_common_user_sgprs_phase1(ctx, stage, 
has_previous_stage, previous_stage, _sgpr_info, , _sets);
if (ctx->shader_info->info.cs.grid_components_used)
add_user_sgpr_argument(, 
LLVMVectorType(ctx->ac.i32, ctx->shader_info->info.cs.grid_components_used), 
>num_work_groups); /* grid size */
-   add_sgpr_argument(, LLVMVectorType(ctx->ac.i32, 3), 
>workgroup_ids);
+   add_sgpr_argument(, ctx->ac.v3i32, >workgroup_ids);
add_sgpr_argument(, ctx->ac.i32, >tg_size);
-   add_vgpr_argument(, LLVMVectorType(ctx->ac.i32, 3), 
>local_invocation_ids);
+   add_vgpr_argument(, ctx->ac.v3i32, 
>local_invocation_ids);
break;
case MESA_SHADER_VERTEX:
radv_define_common_user_sgprs_phase1(ctx, stage, 
has_previous_stage, previous_stage, _sgpr_info, , _sets);
radv_define_vs_user_sgprs_phase1(ctx, stage, 
has_previous_stage, previous_stage, );
if (ctx->shader_info->info.needs_multiview_view_index || 
(!ctx->options->key.vs.as_es && !ctx->options->key.vs.as_ls && 
ctx->options->key.has_multiview_view_index))
add_user_sgpr_argument(, ctx->ac.i32, 
>view_index);
if (ctx->options->key.vs.as_es)
add_sgpr_argument(, ctx->ac.i32, 
>es2gs_offset); // es2gs offset
else if (ctx->options->key.vs.as_ls)

[Mesa-dev] [PATCH 04/10] ac: use the common v8i32 llvm type

[Timothy Arceri]

---
 src/amd/common/ac_nir_to_llvm.c | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 40c856224a..b0f0ea63ed 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,21 +127,20 @@ struct nir_to_llvm_context {
LLVMValueRef esgs_ring;
LLVMValueRef gsvs_ring;
LLVMValueRef hs_ring_tess_offchip;
LLVMValueRef hs_ring_tess_factor;
 
LLVMValueRef prim_mask;
LLVMValueRef sample_pos_offset;
LLVMValueRef persp_sample, persp_center, persp_centroid;
LLVMValueRef linear_sample, linear_center, linear_centroid;
 
-   LLVMTypeRef v8i32;
LLVMTypeRef f64;
LLVMTypeRef f32;
LLVMTypeRef f16;
LLVMTypeRef v2f32;
LLVMTypeRef v4f32;
 
unsigned uniform_md_kind;
LLVMValueRef empty_md;
gl_shader_stage stage;
 
@@ -982,21 +981,20 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
break;
default:
unreachable("Shader stage not implemented");
}
 
ctx->shader_info->num_user_sgprs = user_sgpr_idx;
 }
 
 static void setup_types(struct nir_to_llvm_context *ctx)
 {
-   ctx->v8i32 = LLVMVectorType(ctx->ac.i32, 8);
ctx->f32 = LLVMFloatTypeInContext(ctx->context);
ctx->f16 = LLVMHalfTypeInContext(ctx->context);
ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
 
ctx->uniform_md_kind =
LLVMGetMDKindIDInContext(ctx->context, "amdgpu.uniform", 14);
ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
 }
@@ -4244,25 +4242,25 @@ static LLVMValueRef radv_get_sampler_desc(struct 
ac_shader_abi *abi,
LLVMBuilderRef builder = ctx->builder;
LLVMTypeRef type;
 
assert(base_index < layout->binding_count);
 
if (write && ctx->stage == MESA_SHADER_FRAGMENT)
ctx->shader_info->fs.writes_memory = true;
 
switch (desc_type) {
case AC_DESC_IMAGE:
-   type = ctx->v8i32;
+   type = ctx->ac.v8i32;
type_size = 32;
break;
case AC_DESC_FMASK:
-   type = ctx->v8i32;
+   type = ctx->ac.v8i32;
offset += 32;
type_size = 32;
break;
case AC_DESC_SAMPLER:
type = ctx->ac.v4i32;
if (binding->type == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER)
offset += 64;
 
type_size = 16;
break;
-- 
2.14.3

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[Mesa-dev] [PATCH 05/10] ac: use the ac f64 llvm type

[Timothy Arceri]

---
 src/amd/common/ac_nir_to_llvm.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index b0f0ea63ed..45eb613579 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,21 +127,20 @@ struct nir_to_llvm_context {
LLVMValueRef esgs_ring;
LLVMValueRef gsvs_ring;
LLVMValueRef hs_ring_tess_offchip;
LLVMValueRef hs_ring_tess_factor;
 
LLVMValueRef prim_mask;
LLVMValueRef sample_pos_offset;
LLVMValueRef persp_sample, persp_center, persp_centroid;
LLVMValueRef linear_sample, linear_center, linear_centroid;
 
-   LLVMTypeRef f64;
LLVMTypeRef f32;
LLVMTypeRef f16;
LLVMTypeRef v2f32;
LLVMTypeRef v4f32;
 
unsigned uniform_md_kind;
LLVMValueRef empty_md;
gl_shader_stage stage;
 
LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
@@ -983,21 +982,20 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
unreachable("Shader stage not implemented");
}
 
ctx->shader_info->num_user_sgprs = user_sgpr_idx;
 }
 
 static void setup_types(struct nir_to_llvm_context *ctx)
 {
ctx->f32 = LLVMFloatTypeInContext(ctx->context);
ctx->f16 = LLVMHalfTypeInContext(ctx->context);
-   ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
 
ctx->uniform_md_kind =
LLVMGetMDKindIDInContext(ctx->context, "amdgpu.uniform", 14);
ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
 }
 
 static int get_llvm_num_components(LLVMValueRef value)
 {
@@ -5316,21 +5314,21 @@ glsl_base_to_llvm_type(struct nir_to_llvm_context *ctx,
case GLSL_TYPE_UINT:
case GLSL_TYPE_BOOL:
case GLSL_TYPE_SUBROUTINE:
return ctx->ac.i32;
case GLSL_TYPE_FLOAT: /* TODO handle mediump */
return ctx->f32;
case GLSL_TYPE_INT64:
case GLSL_TYPE_UINT64:
return ctx->ac.i64;
case GLSL_TYPE_DOUBLE:
-   return ctx->f64;
+   return ctx->ac.f64;
default:
unreachable("unknown GLSL type");
}
 }
 
 static LLVMTypeRef
 glsl_to_llvm_type(struct nir_to_llvm_context *ctx,
  const struct glsl_type *type)
 {
if (glsl_type_is_scalar(type)) {
-- 
2.14.3

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[Mesa-dev] [PATCH 07/10] ac: use the ac f16 llvm type

[Timothy Arceri]

---
 src/amd/common/ac_nir_to_llvm.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 736131ab56..1e1a1c0276 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,21 +127,20 @@ struct nir_to_llvm_context {
LLVMValueRef esgs_ring;
LLVMValueRef gsvs_ring;
LLVMValueRef hs_ring_tess_offchip;
LLVMValueRef hs_ring_tess_factor;
 
LLVMValueRef prim_mask;
LLVMValueRef sample_pos_offset;
LLVMValueRef persp_sample, persp_center, persp_centroid;
LLVMValueRef linear_sample, linear_center, linear_centroid;
 
-   LLVMTypeRef f16;
LLVMTypeRef v2f32;
LLVMTypeRef v4f32;
 
unsigned uniform_md_kind;
LLVMValueRef empty_md;
gl_shader_stage stage;
 
LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
 
uint64_t input_mask;
@@ -979,21 +978,20 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
break;
default:
unreachable("Shader stage not implemented");
}
 
ctx->shader_info->num_user_sgprs = user_sgpr_idx;
 }
 
 static void setup_types(struct nir_to_llvm_context *ctx)
 {
-   ctx->f16 = LLVMHalfTypeInContext(ctx->context);
ctx->v2f32 = LLVMVectorType(ctx->ac.f32, 2);
ctx->v4f32 = LLVMVectorType(ctx->ac.f32, 4);
 
ctx->uniform_md_kind =
LLVMGetMDKindIDInContext(ctx->context, "amdgpu.uniform", 14);
ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
 }
 
 static int get_llvm_num_components(LLVMValueRef value)
 {
@@ -1307,21 +1305,21 @@ static LLVMValueRef emit_i2b(struct ac_llvm_context 
*ctx,
 ctx->i32, "");
 }
 
 static LLVMValueRef emit_f2f16(struct nir_to_llvm_context *ctx,
   LLVMValueRef src0)
 {
LLVMValueRef result;
LLVMValueRef cond = NULL;
 
src0 = ac_to_float(>ac, src0);
-   result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
+   result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->ac.f16, "");
 
if (ctx->options->chip_class >= VI) {
LLVMValueRef args[2];
/* Check if the result is a denormal - and flush to 0 if so. */
args[0] = result;
args[1] = LLVMConstInt(ctx->ac.i32, N_SUBNORMAL | P_SUBNORMAL, 
false);
cond = ac_build_intrinsic(>ac, "llvm.amdgcn.class.f16", 
ctx->ac.i1, args, 2, AC_FUNC_ATTR_READNONE);
}
 
/* need to convert back up to f32 */
-- 
2.14.3

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Re: [Mesa-dev] [PATCH 1/6] ac: use the ac i32 llvm type

[Dave Airlie]

On 2 November 2017 at 11:50, Timothy Arceri  wrote:
> ---
Yeah why not,

For the series:
Reviewed-by: Dave Airlie 

>  src/amd/common/ac_nir_to_llvm.c | 360 
> 
>  1 file changed, 179 insertions(+), 181 deletions(-)
>
> diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
> index 2ec30517e0..d792042925 100644
> --- a/src/amd/common/ac_nir_to_llvm.c
> +++ b/src/amd/common/ac_nir_to_llvm.c
> @@ -130,21 +130,20 @@ struct nir_to_llvm_context {
> LLVMValueRef hs_ring_tess_factor;
>
> LLVMValueRef prim_mask;
> LLVMValueRef sample_pos_offset;
> LLVMValueRef persp_sample, persp_center, persp_centroid;
> LLVMValueRef linear_sample, linear_center, linear_centroid;
>
> LLVMTypeRef i1;
> LLVMTypeRef i8;
> LLVMTypeRef i16;
> -   LLVMTypeRef i32;
> LLVMTypeRef i64;
> LLVMTypeRef v2i32;
> LLVMTypeRef v3i32;
> LLVMTypeRef v4i32;
> LLVMTypeRef v8i32;
> LLVMTypeRef f64;
> LLVMTypeRef f32;
> LLVMTypeRef f16;
> LLVMTypeRef v2f32;
> LLVMTypeRef v4f32;
> @@ -461,29 +460,29 @@ static LLVMValueRef
>  get_tcs_out_patch_stride(struct nir_to_llvm_context *ctx)
>  {
> return unpack_param(>ac, ctx->tcs_out_layout, 0, 13);
>  }
>
>  static LLVMValueRef
>  get_tcs_out_patch0_offset(struct nir_to_llvm_context *ctx)
>  {
> return LLVMBuildMul(ctx->builder,
> unpack_param(>ac, ctx->tcs_out_offsets, 0, 
> 16),
> -   LLVMConstInt(ctx->i32, 4, false), "");
> +   LLVMConstInt(ctx->ac.i32, 4, false), "");
>  }
>
>  static LLVMValueRef
>  get_tcs_out_patch0_patch_data_offset(struct nir_to_llvm_context *ctx)
>  {
> return LLVMBuildMul(ctx->builder,
> unpack_param(>ac, ctx->tcs_out_offsets, 16, 
> 16),
> -   LLVMConstInt(ctx->i32, 4, false), "");
> +   LLVMConstInt(ctx->ac.i32, 4, false), "");
>  }
>
>  static LLVMValueRef
>  get_tcs_in_current_patch_offset(struct nir_to_llvm_context *ctx)
>  {
> LLVMValueRef patch_stride = get_tcs_in_patch_stride(ctx);
> LLVMValueRef rel_patch_id = get_rel_patch_id(ctx);
>
> return LLVMBuildMul(ctx->builder, patch_stride, rel_patch_id, "");
>  }
> @@ -663,21 +662,21 @@ radv_define_common_user_sgprs_phase2(struct 
> nir_to_llvm_context *ctx,
> } else
> ctx->descriptor_sets[i] = NULL;
> }
> } else {
> uint32_t desc_sgpr_idx = *user_sgpr_idx;
> set_userdata_location_shader(ctx, 
> AC_UD_INDIRECT_DESCRIPTOR_SETS, user_sgpr_idx, 2);
>
> for (unsigned i = 0; i < num_sets; ++i) {
> if 
> (ctx->options->layout->set[i].layout->shader_stages & stage_mask) {
> 
> set_userdata_location_indirect(>shader_info->user_sgprs_locs.descriptor_sets[i],
>  desc_sgpr_idx, 2, i * 8);
> -   ctx->descriptor_sets[i] = 
> ac_build_load_to_sgpr(>ac, desc_sets, LLVMConstInt(ctx->i32, i, false));
> +   ctx->descriptor_sets[i] = 
> ac_build_load_to_sgpr(>ac, desc_sets, LLVMConstInt(ctx->ac.i32, i, 
> false));
>
> } else
> ctx->descriptor_sets[i] = NULL;
> }
> ctx->shader_info->need_indirect_descriptor_sets = true;
> }
>
> if (ctx->shader_info->info.needs_push_constants) {
> set_userdata_location_shader(ctx, AC_UD_PUSH_CONSTANTS, 
> user_sgpr_idx, 2);
> }
> @@ -686,24 +685,24 @@ radv_define_common_user_sgprs_phase2(struct 
> nir_to_llvm_context *ctx,
>  static void
>  radv_define_vs_user_sgprs_phase1(struct nir_to_llvm_context *ctx,
>   gl_shader_stage stage,
>   bool has_previous_stage,
>   gl_shader_stage previous_stage,
>   struct arg_info *args)
>  {
> if (!ctx->is_gs_copy_shader && (stage == MESA_SHADER_VERTEX || 
> (has_previous_stage && previous_stage == MESA_SHADER_VERTEX))) {
> if (ctx->shader_info->info.vs.has_vertex_buffers)
> add_user_sgpr_argument(args, const_array(ctx->v4i32, 
> 16), >vertex_buffers); /* vertex buffers */
> -   add_user_sgpr_argument(args, ctx->i32, 
> >abi.base_vertex); // base vertex
> -   add_user_sgpr_argument(args, ctx->i32, 
> >abi.start_instance);// start instance
> +   add_user_sgpr_argument(args, ctx->ac.i32, 
> >abi.base_vertex); // base vertex
> +   add_user_sgpr_argument(args, ctx->ac.i32, 
> >abi.start_instance);// start instance
> if 

Re: [Mesa-dev] [PATCH] radv: Don't expose heaps with 0 memory.

[Dave Airlie]

On 2 November 2017 at 05:58, Bas Nieuwenhuizen  wrote:
> It confuses CTS. This pregenerates the heap info into the
> physical device, so we can use it for translating contiguous
> indices into our "standard" ones.
>
> This also makes the WSI a bit smarter in case the first preferred
> heap does not exist.

Reviewed-by: Dave Airlie 
>
> CC: 
> ---
>  src/amd/vulkan/radv_device.c  | 135 
> ++
>  src/amd/vulkan/radv_private.h |   3 +
>  src/amd/vulkan/radv_wsi.c |  16 -
>  3 files changed, 101 insertions(+), 53 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
> index 0c2f6fa6312..e95f3ee32af 100644
> --- a/src/amd/vulkan/radv_device.c
> +++ b/src/amd/vulkan/radv_device.c
> @@ -104,6 +104,75 @@ get_chip_name(enum radeon_family family)
> }
>  }
>
> +static void
> +radv_physical_device_init_mem_types(struct radv_physical_device *device)
> +{
> +   STATIC_ASSERT(RADV_MEM_HEAP_COUNT <= VK_MAX_MEMORY_HEAPS);
> +   uint64_t visible_vram_size = MIN2(device->rad_info.vram_size,
> + device->rad_info.vram_vis_size);
> +
> +   int vram_index = -1, visible_vram_index = -1, gart_index = -1;
> +   device->memory_properties.memoryHeapCount = 0;
> +   if (device->rad_info.vram_size - visible_vram_size > 0) {
> +   vram_index = device->memory_properties.memoryHeapCount++;
> +   device->memory_properties.memoryHeaps[vram_index] = 
> (VkMemoryHeap) {
> +   .size = device->rad_info.vram_size - 
> visible_vram_size,
> +   .flags = VK_MEMORY_HEAP_DEVICE_LOCAL_BIT,
> +   };
> +   }
> +   if (visible_vram_size) {
> +   visible_vram_index = 
> device->memory_properties.memoryHeapCount++;
> +   device->memory_properties.memoryHeaps[visible_vram_index] = 
> (VkMemoryHeap) {
> +   .size = visible_vram_size,
> +   .flags = VK_MEMORY_HEAP_DEVICE_LOCAL_BIT,
> +   };
> +   }
> +   if (device->rad_info.gart_size > 0) {
> +   gart_index = device->memory_properties.memoryHeapCount++;
> +   device->memory_properties.memoryHeaps[gart_index] = 
> (VkMemoryHeap) {
> +   .size = device->rad_info.gart_size,
> +   .flags = 0,
> +   };
> +   }
> +
> +   STATIC_ASSERT(RADV_MEM_TYPE_COUNT <= VK_MAX_MEMORY_TYPES);
> +   unsigned type_count = 0;
> +   if (vram_index >= 0) {
> +   device->mem_type_indices[type_count] = RADV_MEM_TYPE_VRAM;
> +   device->memory_properties.memoryTypes[type_count++] = 
> (VkMemoryType) {
> +   .propertyFlags = VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT,
> +   .heapIndex = vram_index,
> +   };
> +   }
> +   if (gart_index >= 0) {
> +   device->mem_type_indices[type_count] = 
> RADV_MEM_TYPE_GTT_WRITE_COMBINE;
> +   device->memory_properties.memoryTypes[type_count++] = 
> (VkMemoryType) {
> +   .propertyFlags = VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT |
> +   VK_MEMORY_PROPERTY_HOST_COHERENT_BIT,
> +   .heapIndex = gart_index,
> +   };
> +   }
> +   if (visible_vram_index >= 0) {
> +   device->mem_type_indices[type_count] = 
> RADV_MEM_TYPE_VRAM_CPU_ACCESS;
> +   device->memory_properties.memoryTypes[type_count++] = 
> (VkMemoryType) {
> +   .propertyFlags = VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT |
> +   VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT |
> +   VK_MEMORY_PROPERTY_HOST_COHERENT_BIT,
> +   .heapIndex = visible_vram_index,
> +   };
> +   }
> +   if (gart_index >= 0) {
> +   device->mem_type_indices[type_count] = 
> RADV_MEM_TYPE_GTT_CACHED;
> +   device->memory_properties.memoryTypes[type_count++] = 
> (VkMemoryType) {
> +   .propertyFlags = VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT |
> +   VK_MEMORY_PROPERTY_HOST_COHERENT_BIT |
> +   VK_MEMORY_PROPERTY_HOST_CACHED_BIT,
> +   .heapIndex = gart_index,
> +   };
> +   }
> +   device->memory_properties.memoryTypeCount = type_count;
> +}
> +
>  static VkResult
>  radv_physical_device_init(struct radv_physical_device *device,
>   struct radv_instance *instance,
> @@ -190,6 +259,7 @@ radv_physical_device_init(struct radv_physical_device 
> *device,
>  */
> device->has_clear_state = device->rad_info.chip_class >= CIK;
>
> +   radv_physical_device_init_mem_types(device);
> return VK_SUCCESS;
>
>  fail:
> @@ -780,49 +850,7 @@ void 

[Mesa-dev] [PATCH 2/6] ac: use the ac i1 llvm type

[Timothy Arceri]

---
 src/amd/common/ac_nir_to_llvm.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index d792042925..9c01f0ad37 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,21 +127,20 @@ struct nir_to_llvm_context {
LLVMValueRef esgs_ring;
LLVMValueRef gsvs_ring;
LLVMValueRef hs_ring_tess_offchip;
LLVMValueRef hs_ring_tess_factor;
 
LLVMValueRef prim_mask;
LLVMValueRef sample_pos_offset;
LLVMValueRef persp_sample, persp_center, persp_centroid;
LLVMValueRef linear_sample, linear_center, linear_centroid;
 
-   LLVMTypeRef i1;
LLVMTypeRef i8;
LLVMTypeRef i16;
LLVMTypeRef i64;
LLVMTypeRef v2i32;
LLVMTypeRef v3i32;
LLVMTypeRef v4i32;
LLVMTypeRef v8i32;
LLVMTypeRef f64;
LLVMTypeRef f32;
LLVMTypeRef f16;
@@ -991,21 +990,20 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
default:
unreachable("Shader stage not implemented");
}
 
ctx->shader_info->num_user_sgprs = user_sgpr_idx;
 }
 
 static void setup_types(struct nir_to_llvm_context *ctx)
 {
ctx->voidt = LLVMVoidTypeInContext(ctx->context);
-   ctx->i1 = LLVMIntTypeInContext(ctx->context, 1);
ctx->i8 = LLVMIntTypeInContext(ctx->context, 8);
ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
ctx->v2i32 = LLVMVectorType(ctx->ac.i32, 2);
ctx->v3i32 = LLVMVectorType(ctx->ac.i32, 3);
ctx->v4i32 = LLVMVectorType(ctx->ac.i32, 4);
ctx->v8i32 = LLVMVectorType(ctx->ac.i32, 8);
ctx->f32 = LLVMFloatTypeInContext(ctx->context);
ctx->f16 = LLVMHalfTypeInContext(ctx->context);
ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
@@ -1336,21 +1334,21 @@ static LLVMValueRef emit_f2f16(struct 
nir_to_llvm_context *ctx,
LLVMValueRef cond = NULL;
 
src0 = ac_to_float(>ac, src0);
result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
 
if (ctx->options->chip_class >= VI) {
LLVMValueRef args[2];
/* Check if the result is a denormal - and flush to 0 if so. */
args[0] = result;
args[1] = LLVMConstInt(ctx->ac.i32, N_SUBNORMAL | P_SUBNORMAL, 
false);
-   cond = ac_build_intrinsic(>ac, "llvm.amdgcn.class.f16", 
ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
+   cond = ac_build_intrinsic(>ac, "llvm.amdgcn.class.f16", 
ctx->ac.i1, args, 2, AC_FUNC_ATTR_READNONE);
}
 
/* need to convert back up to f32 */
result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
 
if (ctx->options->chip_class >= VI)
result = LLVMBuildSelect(ctx->builder, cond, ctx->ac.f32_0, 
result, "");
else {
/* for SI/CIK */
/* 0x3880 is smallest half float value (2^-14) in 32-bit 
float,
-- 
2.14.3

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[Mesa-dev] [PATCH 3/6] ac: use the ac i8 llvm type

[Timothy Arceri]

---
 src/amd/common/ac_nir_to_llvm.c | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 9c01f0ad37..44137deb09 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,21 +127,20 @@ struct nir_to_llvm_context {
LLVMValueRef esgs_ring;
LLVMValueRef gsvs_ring;
LLVMValueRef hs_ring_tess_offchip;
LLVMValueRef hs_ring_tess_factor;
 
LLVMValueRef prim_mask;
LLVMValueRef sample_pos_offset;
LLVMValueRef persp_sample, persp_center, persp_centroid;
LLVMValueRef linear_sample, linear_center, linear_centroid;
 
-   LLVMTypeRef i8;
LLVMTypeRef i16;
LLVMTypeRef i64;
LLVMTypeRef v2i32;
LLVMTypeRef v3i32;
LLVMTypeRef v4i32;
LLVMTypeRef v8i32;
LLVMTypeRef f64;
LLVMTypeRef f32;
LLVMTypeRef f16;
LLVMTypeRef v2f32;
@@ -621,29 +620,29 @@ radv_define_common_user_sgprs_phase1(struct 
nir_to_llvm_context *ctx,
 {
unsigned num_sets = ctx->options->layout ? 
ctx->options->layout->num_sets : 0;
unsigned stage_mask = 1 << stage;
if (has_previous_stage)
stage_mask |= 1 << previous_stage;
 
/* 1 for each descriptor set */
if (!user_sgpr_info->indirect_all_descriptor_sets) {
for (unsigned i = 0; i < num_sets; ++i) {
if (ctx->options->layout->set[i].layout->shader_stages 
& stage_mask) {
-   add_user_sgpr_array_argument(args, 
const_array(ctx->i8, 1024 * 1024), >descriptor_sets[i]);
+   add_user_sgpr_array_argument(args, 
const_array(ctx->ac.i8, 1024 * 1024), >descriptor_sets[i]);
}
}
} else
-   add_user_sgpr_array_argument(args, 
const_array(const_array(ctx->i8, 1024 * 1024), 32), desc_sets);
+   add_user_sgpr_array_argument(args, 
const_array(const_array(ctx->ac.i8, 1024 * 1024), 32), desc_sets);
 
if (ctx->shader_info->info.needs_push_constants) {
/* 1 for push constants and dynamic descriptors */
-   add_user_sgpr_array_argument(args, const_array(ctx->i8, 1024 * 
1024), >push_constants);
+   add_user_sgpr_array_argument(args, const_array(ctx->ac.i8, 1024 
* 1024), >push_constants);
}
 }
 
 static void
 radv_define_common_user_sgprs_phase2(struct nir_to_llvm_context *ctx,
  gl_shader_stage stage,
  bool has_previous_stage,
  gl_shader_stage previous_stage,
  const struct user_sgpr_info 
*user_sgpr_info,
 LLVMValueRef desc_sets,
@@ -918,21 +917,21 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
ctx->shader_info->num_input_vgprs = args.num_vgprs_used;
 
assign_arguments(ctx->main_function, );
 
user_sgpr_idx = 0;
 
if (ctx->options->supports_spill || user_sgpr_info.need_ring_offsets) {
set_userdata_location_shader(ctx, AC_UD_SCRATCH_RING_OFFSETS, 
_sgpr_idx, 2);
if (ctx->options->supports_spill) {
ctx->ring_offsets = ac_build_intrinsic(>ac, 
"llvm.amdgcn.implicit.buffer.ptr",
-  
LLVMPointerType(ctx->i8, CONST_ADDR_SPACE),
+  
LLVMPointerType(ctx->ac.i8, CONST_ADDR_SPACE),
   NULL, 0, 
AC_FUNC_ATTR_READNONE);
ctx->ring_offsets = LLVMBuildBitCast(ctx->builder, 
ctx->ring_offsets,
 
const_array(ctx->v4i32, 16), "");
}
}

/* For merged shaders the user SGPRs start at 8, with 8 system SGPRs in 
front (including
 * the rw_buffers at s0/s1. With user SGPR0 = s8, lets restart the 
count from 0 */
if (has_previous_stage)
user_sgpr_idx = 0;
@@ -990,21 +989,20 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
default:
unreachable("Shader stage not implemented");
}
 
ctx->shader_info->num_user_sgprs = user_sgpr_idx;
 }
 
 static void setup_types(struct nir_to_llvm_context *ctx)
 {
ctx->voidt = LLVMVoidTypeInContext(ctx->context);
-   ctx->i8 = LLVMIntTypeInContext(ctx->context, 8);
ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
ctx->v2i32 = LLVMVectorType(ctx->ac.i32, 2);
ctx->v3i32 = LLVMVectorType(ctx->ac.i32, 3);
ctx->v4i32 = LLVMVectorType(ctx->ac.i32, 4);
ctx->v8i32 = LLVMVectorType(ctx->ac.i32, 8);

[Mesa-dev] [PATCH 5/6] ac: remove unused i16 llvm type

[Timothy Arceri]

---
 src/amd/common/ac_nir_to_llvm.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index d741fb7b45..c3c9d7a859 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,21 +127,20 @@ struct nir_to_llvm_context {
LLVMValueRef esgs_ring;
LLVMValueRef gsvs_ring;
LLVMValueRef hs_ring_tess_offchip;
LLVMValueRef hs_ring_tess_factor;
 
LLVMValueRef prim_mask;
LLVMValueRef sample_pos_offset;
LLVMValueRef persp_sample, persp_center, persp_centroid;
LLVMValueRef linear_sample, linear_center, linear_centroid;
 
-   LLVMTypeRef i16;
LLVMTypeRef i64;
LLVMTypeRef v2i32;
LLVMTypeRef v3i32;
LLVMTypeRef v4i32;
LLVMTypeRef v8i32;
LLVMTypeRef f64;
LLVMTypeRef f32;
LLVMTypeRef f16;
LLVMTypeRef v2f32;
LLVMTypeRef v4f32;
@@ -987,21 +986,20 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
break;
default:
unreachable("Shader stage not implemented");
}
 
ctx->shader_info->num_user_sgprs = user_sgpr_idx;
 }
 
 static void setup_types(struct nir_to_llvm_context *ctx)
 {
-   ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
ctx->v2i32 = LLVMVectorType(ctx->ac.i32, 2);
ctx->v3i32 = LLVMVectorType(ctx->ac.i32, 3);
ctx->v4i32 = LLVMVectorType(ctx->ac.i32, 4);
ctx->v8i32 = LLVMVectorType(ctx->ac.i32, 8);
ctx->f32 = LLVMFloatTypeInContext(ctx->context);
ctx->f16 = LLVMHalfTypeInContext(ctx->context);
ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
-- 
2.14.3

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[Mesa-dev] [PATCH 6/6] ac: use the ac i64 llvm type

[Timothy Arceri]

---
 src/amd/common/ac_nir_to_llvm.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index c3c9d7a859..2437ea05c1 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,21 +127,20 @@ struct nir_to_llvm_context {
LLVMValueRef esgs_ring;
LLVMValueRef gsvs_ring;
LLVMValueRef hs_ring_tess_offchip;
LLVMValueRef hs_ring_tess_factor;
 
LLVMValueRef prim_mask;
LLVMValueRef sample_pos_offset;
LLVMValueRef persp_sample, persp_center, persp_centroid;
LLVMValueRef linear_sample, linear_center, linear_centroid;
 
-   LLVMTypeRef i64;
LLVMTypeRef v2i32;
LLVMTypeRef v3i32;
LLVMTypeRef v4i32;
LLVMTypeRef v8i32;
LLVMTypeRef f64;
LLVMTypeRef f32;
LLVMTypeRef f16;
LLVMTypeRef v2f32;
LLVMTypeRef v4f32;
 
@@ -986,21 +985,20 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
break;
default:
unreachable("Shader stage not implemented");
}
 
ctx->shader_info->num_user_sgprs = user_sgpr_idx;
 }
 
 static void setup_types(struct nir_to_llvm_context *ctx)
 {
-   ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
ctx->v2i32 = LLVMVectorType(ctx->ac.i32, 2);
ctx->v3i32 = LLVMVectorType(ctx->ac.i32, 3);
ctx->v4i32 = LLVMVectorType(ctx->ac.i32, 4);
ctx->v8i32 = LLVMVectorType(ctx->ac.i32, 8);
ctx->f32 = LLVMFloatTypeInContext(ctx->context);
ctx->f16 = LLVMHalfTypeInContext(ctx->context);
ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
 
@@ -5324,21 +5322,21 @@ glsl_base_to_llvm_type(struct nir_to_llvm_context *ctx,
switch (type) {
case GLSL_TYPE_INT:
case GLSL_TYPE_UINT:
case GLSL_TYPE_BOOL:
case GLSL_TYPE_SUBROUTINE:
return ctx->ac.i32;
case GLSL_TYPE_FLOAT: /* TODO handle mediump */
return ctx->f32;
case GLSL_TYPE_INT64:
case GLSL_TYPE_UINT64:
-   return ctx->i64;
+   return ctx->ac.i64;
case GLSL_TYPE_DOUBLE:
return ctx->f64;
default:
unreachable("unknown GLSL type");
}
 }
 
 static LLVMTypeRef
 glsl_to_llvm_type(struct nir_to_llvm_context *ctx,
  const struct glsl_type *type)
-- 
2.14.3

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[Mesa-dev] [PATCH 4/6] ac: use the ac ivoidt llvm type

[Timothy Arceri]

---
 src/amd/common/ac_nir_to_llvm.c | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 44137deb09..d741fb7b45 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -138,21 +138,20 @@ struct nir_to_llvm_context {
LLVMTypeRef i64;
LLVMTypeRef v2i32;
LLVMTypeRef v3i32;
LLVMTypeRef v4i32;
LLVMTypeRef v8i32;
LLVMTypeRef f64;
LLVMTypeRef f32;
LLVMTypeRef f16;
LLVMTypeRef v2f32;
LLVMTypeRef v4f32;
-   LLVMTypeRef voidt;
 
unsigned uniform_md_kind;
LLVMValueRef empty_md;
gl_shader_stage stage;
 
LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
 
uint64_t input_mask;
uint64_t output_mask;
uint8_t num_output_clips;
@@ -988,21 +987,20 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
break;
default:
unreachable("Shader stage not implemented");
}
 
ctx->shader_info->num_user_sgprs = user_sgpr_idx;
 }
 
 static void setup_types(struct nir_to_llvm_context *ctx)
 {
-   ctx->voidt = LLVMVoidTypeInContext(ctx->context);
ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
ctx->v2i32 = LLVMVectorType(ctx->ac.i32, 2);
ctx->v3i32 = LLVMVectorType(ctx->ac.i32, 3);
ctx->v4i32 = LLVMVectorType(ctx->ac.i32, 4);
ctx->v8i32 = LLVMVectorType(ctx->ac.i32, 8);
ctx->f32 = LLVMFloatTypeInContext(ctx->context);
ctx->f16 = LLVMHalfTypeInContext(ctx->context);
ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
@@ -3682,36 +3680,36 @@ static LLVMValueRef visit_image_size(struct 
ac_nir_context *ctx,
 #define LGKM_CNT 0x07f
 #define VM_CNT 0xf70
 
 static void emit_waitcnt(struct nir_to_llvm_context *ctx,
 unsigned simm16)
 {
LLVMValueRef args[1] = {
LLVMConstInt(ctx->ac.i32, simm16, false),
};
ac_build_intrinsic(>ac, "llvm.amdgcn.s.waitcnt",
-  ctx->voidt, args, 1, 0);
+  ctx->ac.voidt, args, 1, 0);
 }
 
 static void emit_barrier(struct nir_to_llvm_context *ctx)
 {
/* SI only (thanks to a hw bug workaround):
 * The real barrier instruction isn’t needed, because an entire patch
 * always fits into a single wave.
 */
if (ctx->options->chip_class == SI &&
ctx->stage == MESA_SHADER_TESS_CTRL) {
emit_waitcnt(ctx, LGKM_CNT & VM_CNT);
return;
}
ac_build_intrinsic(>ac, "llvm.amdgcn.s.barrier",
-  ctx->voidt, NULL, 0, AC_FUNC_ATTR_CONVERGENT);
+  ctx->ac.voidt, NULL, 0, AC_FUNC_ATTR_CONVERGENT);
 }
 
 static void emit_discard_if(struct ac_nir_context *ctx,
const nir_intrinsic_instr *instr)
 {
LLVMValueRef cond;
 
cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
 get_src(ctx, instr->src[0]),
 ctx->ac.i32_0, "");
-- 
2.14.3

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Re: [Mesa-dev] [PATCH 2/3] mesa: enable ARB_texture_buffer_* extensions in the Compatibility profile

[Mark Janes]

The FC suffix does not help.  We are testing openglcts from
opengl-cts-4.6.0 branch of gitlab.khronos.org:Tracker/vk-gl-cts.git:

d6144a989   Fix attribute mapping in enhanced layouts tests for input arrays

MESA_GLES_VERSION_OVERRIDE=3.2 MESA_GLSL_VERSION_OVERRIDE=460 
MESA_GL_VERSION_OVERRIDE=4.6FC ./glcts --deqp-runmode=xml-caselist
Writing test log into TestResults.qpa
dEQP Core git-d6144a989937b2829a9fc9813de994c4f514ebae (0xd6144a98) 
starting..
  target implementation = 'X11 EGL'
Writing test cases from 'CTS-Configs' to file 'CTS-Configs-cases.xml'..
Writing test cases from 'dEQP-EGL' to file 'dEQP-EGL-cases.xml'..
Writing test cases from 'KHR-GLES2' to file 'KHR-GLES2-cases.xml'..
Writing test cases from 'dEQP-GLES2' to file 'dEQP-GLES2-cases.xml'..
Writing test cases from 'KHR-GLES3' to file 'KHR-GLES3-cases.xml'..
Writing test cases from 'dEQP-GLES3' to file 'dEQP-GLES3-cases.xml'..
Writing test cases from 'dEQP-GLES31' to file 'dEQP-GLES31-cases.xml'..
Writing test cases from 'KHR-GLES31' to file 'KHR-GLES31-cases.xml'..
Writing test cases from 'KHR-GLESEXT' to file 'KHR-GLESEXT-cases.xml'..
Writing test cases from 'KHR-GLES32' to file 'KHR-GLES32-cases.xml'..
Writing test cases from 'KHR-NoContext' to file 'KHR-NoContext-cases.xml'..
Writing test cases from 'KHR-GL30' to file 'KHR-GL30-cases.xml'..
Writing test cases from 'KHR-GL31' to file 'KHR-GL31-cases.xml'..
FATAL ERROR: Failed to initialize dEQP: Got EGL_BAD_MATCH: 
eglCreateContext() at egluGLUtil.cpp:198
ERROR: command failed

Marek Olšák  writes:

> This should work (I added "FC" at the end):
>
> MESA_GLSL_VERSION_OVERRIDE=460 MESA_GL_VERSION_OVERRIDE=4.6FC
>
> Marek
>
> On Wed, Nov 1, 2017 at 11:16 PM, Mark Janes  wrote:
>> Mark Janes  writes:
>>
>>> Marek Olšák  writes:
>>>
 Hi Mark,

 Can you try the attached patches instead?
>>>
>>> After talking with Ken and Dylan, I realize that I missed a one-line
>>> patch from your thread with my last test (Oct 25 patch to
>>> intel_extensions.c).  With that patch, there are no regressions in CI.
>>>
>>> I'm testing the attached patches as well.
>>
>> With the most recent patches, I'm unable to run the GL CTS 4.6:
>>
>> MESA_GLSL_VERSION_OVERRIDE=460 MESA_GL_VERSION_OVERRIDE=4.6 ./glcts 
>> --deqp-runmode=xml-caselist
>> Writing test log into TestResults.qpa
>> dEQP Core git-d6144a989937b2829a9fc9813de994c4f514ebae (0xd6144a98) 
>> starting..
>>   target implementation = 'X11 EGL'
>> Writing test cases from 'CTS-Configs' to file 'CTS-Configs-cases.xml'..
>> Writing test cases from 'dEQP-EGL' to file 'dEQP-EGL-cases.xml'..
>> Writing test cases from 'KHR-GLES2' to file 'KHR-GLES2-cases.xml'..
>> Writing test cases from 'dEQP-GLES2' to file 'dEQP-GLES2-cases.xml'..
>> Writing test cases from 'KHR-GLES3' to file 'KHR-GLES3-cases.xml'..
>> Writing test cases from 'dEQP-GLES3' to file 'dEQP-GLES3-cases.xml'..
>> Writing test cases from 'dEQP-GLES31' to file 'dEQP-GLES31-cases.xml'..
>> Writing test cases from 'KHR-GLES31' to file 'KHR-GLES31-cases.xml'..
>> Writing test cases from 'KHR-GLESEXT' to file 'KHR-GLESEXT-cases.xml'..
>> Writing test cases from 'KHR-GLES32' to file 'KHR-GLES32-cases.xml'..
>> Writing test cases from 'KHR-NoContext' to file 
>> 'KHR-NoContext-cases.xml'..
>> Writing test cases from 'KHR-GL30' to file 'KHR-GL30-cases.xml'..
>> Writing test cases from 'KHR-GL31' to file 'KHR-GL31-cases.xml'..
>> FATAL ERROR: Failed to initialize dEQP: Got EGL_BAD_MATCH: 
>> eglCreateContext() at egluGLUtil.cpp:198
>>
>> piglit, deqp, and gles-cts encountered no regressions.
>>
 Thanks,
 Marek

 On Wed, Nov 1, 2017 at 9:49 PM, Mark Janes  wrote:
> Dylan Baker  writes:
>
>> I haven't run the CTS tests, but both the deqp and the piglit test pass 
>> on my
>> skl with Marek's patches applied.
>
> I must have tested with only the patch 2 applied.  Running with all
> three patches in the series, I see no piglit/deqp regressions.
>
> However, GLES CTS fails thousands of ES31-CTS.functional.texture tests,
> eg:
>
> ES31-CTS.functional.texture.format.buffer.rg8i_npot
> glGetIntegerv() failed: glGetError() returned GL_INVALID_ENUM at 
> gluContextInfo.cpp:229
>
> -Mark
>
>>
>> Dylan
>>
>> Quoting Marek Olšák (2017-10-31 18:16:51)
>>> This is how I run piglit on i965:
>>> WAFFLE_GBM_DEVICE=/dev/dri/renderD128 PIGLIT_PLATFORM=gbm 
>>> piglit/bin/glinfo|head
>>> GL_RENDERER = Mesa DRI Intel(R) Ivybridge Desktop
>>>
>>> Of course I have Radeon as my main GPU.
>>>
>>> Marek
>>>
>>> On Wed, Nov 1, 2017 at 12:52 AM, Mark Janes  
>>> wrote:
>>> > 

Re: [Mesa-dev] [PATCH v3 30/43] i965/fs: Support 16-bit types at load_input and store_output

[Jason Ekstrand]

I haven't read it all in detail but I have a strong suspicion that this is
probably broken for TCS outputs.  In the TCS, we write values out
immediately and we have to be able to write single components.  This is
because TCS outputs also act as a sort of SLM for tessellation shaders
where each thread can write it's own data and then you barrier and then any
thread can read the output of any other thread.  I think we can make this
work but it's going to be rather annoying and will take careful thought and
lots of testing.

--Jason

On Thu, Oct 12, 2017 at 11:38 AM, Jose Maria Casanova Crespo <
jmcasan...@igalia.com> wrote:

> Enables the support of 16-bit types on load_input and
> store_outputs intrinsics intra-stages.
>
> The approach was based on re-using the 32-bit URB read
> and writes between stages, shuffling pairs of 16-bit values into
> 32-bit values at load_store intrinsic and un-shuffling the values
> at load_inputs.
>
> shuffle_32bit_load_result_to_16bit_data and
> shuffle_32bit_load_result_to_16bit_data are implemented in a similar
> way than the analogous functions for handling 64-bit types.
> ---
>  src/intel/compiler/brw_fs.h   |  11 
>  src/intel/compiler/brw_fs_nir.cpp | 119 ++
> +++-
>  2 files changed, 129 insertions(+), 1 deletion(-)
>
> diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h
> index b9476e69ed..90ada3ef4b 100644
> --- a/src/intel/compiler/brw_fs.h
> +++ b/src/intel/compiler/brw_fs.h
> @@ -498,6 +498,17 @@ void shuffle_64bit_data_for_32bit_write(const
> brw::fs_builder ,
>  const fs_reg ,
>  const fs_reg ,
>  uint32_t components);
> +
> +void shuffle_32bit_load_result_to_16bit_data(const brw::fs_builder ,
> + const fs_reg ,
> + const fs_reg ,
> + uint32_t components);
> +
> +void shuffle_16bit_data_for_32bit_write(const brw::fs_builder ,
> +const fs_reg ,
> +const fs_reg ,
> +uint32_t components);
> +
>  fs_reg setup_imm_df(const brw::fs_builder ,
>  double v);
>
> diff --git a/src/intel/compiler/brw_fs_nir.cpp
> b/src/intel/compiler/brw_fs_nir.cpp
> index 83ff0607a7..9c694a1c53 100644
> --- a/src/intel/compiler/brw_fs_nir.cpp
> +++ b/src/intel/compiler/brw_fs_nir.cpp
> @@ -2124,12 +2124,17 @@ fs_visitor::emit_gs_input_load(const fs_reg ,
>first_component = first_component / 2;
> }
>
> +   if (type_sz(dst.type) == 2) {
> +  num_components = DIV_ROUND_UP(num_components, 2);
> +  tmp_dst = bld.vgrf(BRW_REGISTER_TYPE_F, num_components);
> +   }
> +
> for (unsigned iter = 0; iter < num_iterations; iter++) {
>if (offset_const) {
>   /* Constant indexing - use global offset. */
>   if (first_component != 0) {
>  unsigned read_components = num_components + first_component;
> -fs_reg tmp = bld.vgrf(dst.type, read_components);
> +fs_reg tmp = bld.vgrf(tmp_dst.type, read_components);
>  inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8, tmp,
> icp_handle);
>  inst->size_written = read_components *
>   tmp.component_size(inst->exec_size);
> @@ -2179,6 +2184,11 @@ fs_visitor::emit_gs_input_load(const fs_reg ,
>  bld.MOV(offset(dst, bld, iter * 2 + c), offset(tmp_dst, bld,
> c));
>}
>
> +  if (type_sz(dst.type) == 2) {
> + shuffle_32bit_load_result_to_16bit_data(
> +bld, dst, retype(tmp_dst, BRW_REGISTER_TYPE_F),
> orig_num_components);
> +  }
> +
>if (num_iterations > 1) {
>   num_components = orig_num_components - 2;
>   if(offset_const) {
> @@ -2484,6 +2494,11 @@ fs_visitor::nir_emit_tcs_intrinsic(const
> fs_builder ,
>   dst = tmp;
>}
>
> +  if (type_sz(dst.type) == 2) {
> + num_components = DIV_ROUND_UP(num_components, 2);
> + dst = bld.vgrf(BRW_REGISTER_TYPE_F, num_components);
> +  }
> +
>for (unsigned iter = 0; iter < num_iterations; iter++) {
>   if (indirect_offset.file == BAD_FILE) {
>  /* Constant indexing - use global offset. */
> @@ -2539,6 +2554,11 @@ fs_visitor::nir_emit_tcs_intrinsic(const
> fs_builder ,
>  }
>   }
>
> + if (type_sz(orig_dst.type) == 2) {
> +shuffle_32bit_load_result_to_16bit_data(
> +   bld, orig_dst, dst, instr->num_components);
> + }
> +
>   /* Copy the temporary to the destination to deal with
> writemasking.
>*
>* Also attempt to deal with gl_PointSize being in the .w
> component.
> @@ -2629,6 +2649,8 @@ fs_visitor::nir_emit_tcs_intrinsic(const 

Re: [Mesa-dev] [PATCH v3 00/43] anv: SPV_KHR_16bit_storage/VK_KHR_16bit_storage for gen8+

[Jason Ekstrand]

I'm done reading for the day.  As you're working on incorporating feedback,
I'd  like you to re-arrange things a bit so that we do everything required
to enable VK_KHR_16bit_storage (including advertising the Vulkan extension
string) for SSBOs and UBOs first and then enable it for push constants and
enable it for inputs/outputs last.  This way we can land the most important
part (UBOs and SSBOs) soon and the more annoying parts can get the review
time that they need.

On Mon, Oct 30, 2017 at 5:20 PM, Jason Ekstrand 
wrote:

> Patches 1-5, 8-11, and 13-18 are
>
> Reviewed-by: Jason Ekstrand 
>
> On Mon, Oct 16, 2017 at 8:23 AM, Pohjolainen, Topi <
> topi.pohjolai...@gmail.com> wrote:
>
>> On Mon, Oct 16, 2017 at 08:03:41AM -0700, Jason Ekstrand wrote:
>> > FYI: I'm planning to review this some time this week.  Probably not
>> today
>> > though.
>>
>> Great, I was hoping you would. I'm just reading out of curiosity and
>> asking
>> random questions. Mostly trying to remind myself how compiler works :) It
>> has
>> been a while since I had anything to do with it.
>>
>> >
>> > On Thu, Oct 12, 2017 at 11:37 AM, Jose Maria Casanova Crespo <
>> > jmcasan...@igalia.com> wrote:
>> >
>> > > Hello,
>> > >
>> > > this is the V3 series for the implementation of the
>> > > SPV_KHR_16bit_storage and VK_KHR_16bit_storage extensions on the anv
>> > > vulkan driver, in addition to the GLSL and NIR support needed.
>> > >
>> > > The original series can be found here [1], and the V2 is available
>> > > here [2].
>> > >
>> > > In short V3 includes the following:
>> > >
>> > >  * Updates on several patches after the review of the V2 series.
>> > >This includes some squashes, and specially changes so 16-bit
>> > >types are always packed, not using stride 2 by default.
>> > >This implied a re-implementation of all load_input/store_output
>> > >intrinsics for 16-bit. New solution shuffles and unshuffles
>> > >16-bit components in 32-bit URB write and read operations. This
>> > >saves space in the URB writes and reduces the register pressure
>> > >just using half of the space.
>> > >
>> > > * 5 patches have been removed from v2 series because now we not
>> > >assume the stride 2 for 16-bit registers. We also removed the
>> > >patch of reuse_16bit_conversion_register. The problems related
>> > >to spilling that motivate that patch were better addressed by
>> > >Curro's liveness patch.
>> > >
>> > >i965/fs: Set stride 2 when dealing with 16-bit floats/ints
>> > >i965/fs: Retype 16-bit/stride2 movs to UD on nir_op_vecX
>> > >i965/fs: Need to allocate as minimum 32-bit register
>> > >i965/fs: Update assertion on copy propagation
>> > >i965/fs: Add reuse_16bit_conversions_register optimization
>> > >
>> > > Finally an updated overview of the patches:
>> > >
>> > > Patches 1-2 add 16-bit float, int and uint types to GLSL. This is
>> > > needed because NIR uses GLSL types internally. We use the enums
>> > > already defined at AMD_gpu_shader_half_float and NV_gpu_shader
>> > > extensions. Patch 4 updates mesa/st, in order to avoid warnings for
>> > > types not handled on a switch.
>> > >
>> > > Patches 3-6 add NIR support for those new GLSL 16-bit types,
>> > > conversion opcodes, and rounding modes for float to half-float
>> > > conversions.
>> > >
>> > > Patches 7-9 add the SPIR-V (SPV_KHR_16bit_storage) to NIR support.
>> > >
>> > > Patches 10-13 add general 16-bit support for i965. This includes
>> > > handling of new types on several general purpose methods,
>> > > update/remove some asserts.
>> > >
>> > > Patches 14-18 add support for 32 to 16-bit conversions for i965,
>> > > including rounding mode opcodes (needed for float to half-float
>> > > conversions), and an optimization that removes superfluous rounding
>> > > mode sets.
>> > >
>> > > Patch 19 adds 16-bit support for constant location.
>> > >
>> > > Patches 20-24 add and use two new messages: byte scattered read and
>> > > write. Those were needed because untyped surface message has a fixed
>> > > 32-bit write size. Those messages are used on the 16-bit support of
>> > > store SSBO, load SSBO, load UBO and load shared.
>> > >
>> > > Patches 25-29 implement 16-bit vertex attribute inputs support on
>> > > i965. These include changes on anv. This was needed because 16-bit
>> > > surface formats do implicit conversion to 32-bit. To workaround this,
>> > > we override the 16-bit surface format, and use 32-bit ones.
>> > >
>> > > Patch 30 implements load input and load store for all intra stage.
>> > > This patch substitutes the previous simple patch i965/fs: Set stride 2
>> > > when dealing with 16-bit floats/ints.
>> > >
>> > > Patch 31-37 implements 16-bit store output support for fragment
>> > > shaders on i965.
>> > >
>> > > Patches 38-41 are the new patches included in V2. Three of them are
>> > > improvements over V1 that doesn't fix any execution problem, but they

Re: [Mesa-dev] [PATCH] radv: make sure we set buffers as shareable properly.

[Andres Rodriguez]

Tested-by, and Reviewed-by: Andres Rodriguez 

On 2017-11-01 07:59 PM, Dave Airlie wrote:

From: Dave Airlie 

This should make sure we don't treat exports buffers as local
bos.

Fixes: a639d40f13 (radv: add support for local bos. (v3))

Signed-off-by: Dave Airlie 
---
  src/amd/vulkan/radv_device.c  | 7 +--
  src/amd/vulkan/radv_private.h | 2 ++
  2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 0c2f6fa6312..fce0bff8491 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -2255,13 +2255,13 @@ void radv_GetBufferMemoryRequirements2KHR(
  {
radv_GetBufferMemoryRequirements(device, pInfo->buffer,
  
>memoryRequirements);
-
+   RADV_FROM_HANDLE(radv_buffer, buffer, pInfo->buffer);
vk_foreach_struct(ext, pMemoryRequirements->pNext) {
switch (ext->sType) {
case VK_STRUCTURE_TYPE_MEMORY_DEDICATED_REQUIREMENTS_KHR: {
VkMemoryDedicatedRequirementsKHR *req =
   (VkMemoryDedicatedRequirementsKHR *) ext;
-   req->requiresDedicatedAllocation = false;
+   req->requiresDedicatedAllocation = buffer->shareable;
req->prefersDedicatedAllocation = 
req->requiresDedicatedAllocation;
break;
}
@@ -2775,6 +2775,9 @@ VkResult radv_CreateBuffer(
buffer->offset = 0;
buffer->flags = pCreateInfo->flags;
  
+	buffer->shareable = vk_find_struct_const(pCreateInfo->pNext,

+
EXTERNAL_MEMORY_BUFFER_CREATE_INFO_KHR) != NULL;
+
if (pCreateInfo->flags & VK_BUFFER_CREATE_SPARSE_BINDING_BIT) {
buffer->bo = device->ws->buffer_create(device->ws,
   align64(buffer->size, 
4096),
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 381afb777f3..1c0aa15e7f9 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -673,6 +673,8 @@ struct radv_buffer {
/* Set when bound */
struct radeon_winsys_bo *  bo;
VkDeviceSize offset;
+
+   bool shareable;
  };
  
  


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[Mesa-dev] [PATCH] radv: make sure we set buffers as shareable properly.

[Dave Airlie]

From: Dave Airlie 

This should make sure we don't treat exports buffers as local
bos.

Fixes: a639d40f13 (radv: add support for local bos. (v3))

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_device.c  | 7 +--
 src/amd/vulkan/radv_private.h | 2 ++
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 0c2f6fa6312..fce0bff8491 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -2255,13 +2255,13 @@ void radv_GetBufferMemoryRequirements2KHR(
 {
radv_GetBufferMemoryRequirements(device, pInfo->buffer,
 
>memoryRequirements);
-
+   RADV_FROM_HANDLE(radv_buffer, buffer, pInfo->buffer);
vk_foreach_struct(ext, pMemoryRequirements->pNext) {
switch (ext->sType) {
case VK_STRUCTURE_TYPE_MEMORY_DEDICATED_REQUIREMENTS_KHR: {
VkMemoryDedicatedRequirementsKHR *req =
   (VkMemoryDedicatedRequirementsKHR *) ext;
-   req->requiresDedicatedAllocation = false;
+   req->requiresDedicatedAllocation = buffer->shareable;
req->prefersDedicatedAllocation = 
req->requiresDedicatedAllocation;
break;
}
@@ -2775,6 +2775,9 @@ VkResult radv_CreateBuffer(
buffer->offset = 0;
buffer->flags = pCreateInfo->flags;
 
+   buffer->shareable = vk_find_struct_const(pCreateInfo->pNext,
+
EXTERNAL_MEMORY_BUFFER_CREATE_INFO_KHR) != NULL;
+
if (pCreateInfo->flags & VK_BUFFER_CREATE_SPARSE_BINDING_BIT) {
buffer->bo = device->ws->buffer_create(device->ws,
   align64(buffer->size, 
4096),
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 381afb777f3..1c0aa15e7f9 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -673,6 +673,8 @@ struct radv_buffer {
/* Set when bound */
struct radeon_winsys_bo *  bo;
VkDeviceSize offset;
+
+   bool shareable;
 };
 
 
-- 
2.14.2

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[Mesa-dev] [PATCH] Revert "meson: bump libdrm version required by amdgpu"

[Dylan Baker]

This reverts commit d364684711a5894fd3221191811d56713d6abdee.

The commit that bumped the autotools version was reverted, so lets
revert the meson version to match.

fixes: 1f2640bfa940362c7550cdd065d37555f21c8ae8
   "Revert "winsys/amdgpu: Add R600_DEBUG flag to reserve VMID per ctx.""
Signed-off-by: Dylan Baker 
---
 meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/meson.build b/meson.build
index 6ad8c8bbf4b..d22d49535af 100644
--- a/meson.build
+++ b/meson.build
@@ -638,7 +638,7 @@ dep_libdrm_nouveau = []
 dep_libdrm_etnaviv = []
 dep_libdrm_freedreno = []
 if with_amd_vk or with_gallium_radeonsi
-  dep_libdrm_amdgpu = dependency('libdrm_amdgpu', version : '>= 2.4.86')
+  dep_libdrm_amdgpu = dependency('libdrm_amdgpu', version : '>= 2.4.85')
 endif
 if with_gallium_radeonsi or with_dri_r100 or with_dri_r200
   dep_libdrm_radeon = dependency('libdrm_radeon', version : '>= 2.4.71')
-- 
2.14.3

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Re: [Mesa-dev] More gratitude for Meson

[Dylan Baker]

Quoting Ilia Mirkin (2017-11-01 16:05:17)
> On Wed, Nov 1, 2017 at 7:03 PM, Dylan Baker  wrote:
> > Quoting Ilia Mirkin (2017-11-01 15:52:56)
> >> On Wed, Nov 1, 2017 at 6:49 PM, Chad Versace  
> >> wrote:
> >> > On Wed 01 Nov 2017, Dylan Baker wrote:
> >> >> Quoting Chad Versace (2017-11-01 14:43:28)
> >> >> > Wow. 10 seconds from a clean checkout to an installed Vulkan driver.
> >> >
> >> >> Glad that it's working out for you guys!
> >> >>
> >> >> Can I convince you to wire the anvil and i965 android/arc++ bits? ;)
> >> >>
> >> >> JFYI, the meson build will (I consider it a bug if it doesn't) turn off 
> >> >> all
> >> >> glapi, egl, and glx if there are no dri or gallium drivers built unless 
> >> >> you
> >> >> force them on.
> >> >
> >> > Thanks for turning that stuff off. Last time I tried to build just
> >> > Vulkan without GL (maybe 1.5 years ago), Autotools didn't allow it. It
> >> > insisted that i965 was a build dependency for anvil.
> >> >
> >> >> It also avoids building the glsl compiler unless there's a driver
> >> >> that uses it.
> >> >
> >> > I expected the buildtime to be much longer because I expected it to
> >> > build the GLSL compiler too. I was surprised and happy to discover that
> >> > it builds only the SPIR-V compiler.
> >> >
> >> >> And it defaults to debug, which might be surprising, but people
> >> >> around here thought that default debug is a feature.
> >> >
> >> > Huh... For infrastructure projects like Mesa (as opposed to test
> >> > projects like Piglit), I expect the default build to be the release
> >> > build. But I can understand why others would want default=debug.
> >>
> >> autotools defaults to debug disabled. I think that's how almost every
> >> project does it... debug enabled is definitely a surprise.
> >>
> >>   -ilia
> >
> > Well, for distros they likely want to set the buildtype to plain (meson 
> > adds no
> > compiler flags except ones the project defines), and then add their default
> > flags via CFLAGS and CXXFLAGS. That is certainly *not* what anyone except a
> > distro (or some kind of build infrastructure like jenkins or gentoo) would 
> > want.
> > Xorg's default is debugoptimzed, for reference.
> 
> --enable-debug enables -DDEBUG in mesa. Are you saying that this is
> the default? Or are you just saying that you're not adding extra
> -O100073 options?

The meson build keys -DDEBUG on the builtype, debug or debugoptimized you get
-DDEBUG, anything else, you don't. The way mesa is setup if you don't have
-DNDEBUG you have to have -DDEBUG or asserts happen for member of structures
that don't exist.

I'm not dead set on debug as the default buildtype, it's what we have ATM
though. I asked around here and the feeling was that builtype debug by default
was a feature. If the larger community disagrees we can change it.

Dylan


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Re: [Mesa-dev] More gratitude for Meson

[Ilia Mirkin]

On Wed, Nov 1, 2017 at 7:03 PM, Dylan Baker  wrote:
> Quoting Ilia Mirkin (2017-11-01 15:52:56)
>> On Wed, Nov 1, 2017 at 6:49 PM, Chad Versace  
>> wrote:
>> > On Wed 01 Nov 2017, Dylan Baker wrote:
>> >> Quoting Chad Versace (2017-11-01 14:43:28)
>> >> > Wow. 10 seconds from a clean checkout to an installed Vulkan driver.
>> >
>> >> Glad that it's working out for you guys!
>> >>
>> >> Can I convince you to wire the anvil and i965 android/arc++ bits? ;)
>> >>
>> >> JFYI, the meson build will (I consider it a bug if it doesn't) turn off 
>> >> all
>> >> glapi, egl, and glx if there are no dri or gallium drivers built unless 
>> >> you
>> >> force them on.
>> >
>> > Thanks for turning that stuff off. Last time I tried to build just
>> > Vulkan without GL (maybe 1.5 years ago), Autotools didn't allow it. It
>> > insisted that i965 was a build dependency for anvil.
>> >
>> >> It also avoids building the glsl compiler unless there's a driver
>> >> that uses it.
>> >
>> > I expected the buildtime to be much longer because I expected it to
>> > build the GLSL compiler too. I was surprised and happy to discover that
>> > it builds only the SPIR-V compiler.
>> >
>> >> And it defaults to debug, which might be surprising, but people
>> >> around here thought that default debug is a feature.
>> >
>> > Huh... For infrastructure projects like Mesa (as opposed to test
>> > projects like Piglit), I expect the default build to be the release
>> > build. But I can understand why others would want default=debug.
>>
>> autotools defaults to debug disabled. I think that's how almost every
>> project does it... debug enabled is definitely a surprise.
>>
>>   -ilia
>
> Well, for distros they likely want to set the buildtype to plain (meson adds 
> no
> compiler flags except ones the project defines), and then add their default
> flags via CFLAGS and CXXFLAGS. That is certainly *not* what anyone except a
> distro (or some kind of build infrastructure like jenkins or gentoo) would 
> want.
> Xorg's default is debugoptimzed, for reference.

--enable-debug enables -DDEBUG in mesa. Are you saying that this is
the default? Or are you just saying that you're not adding extra
-O100073 options?
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Re: [Mesa-dev] [PATCH v3 29/43] i965/fs: Unpack 16-bit from 32-bit components in VS load_input

[Jason Ekstrand]

On Thu, Oct 12, 2017 at 11:38 AM, Jose Maria Casanova Crespo <
jmcasan...@igalia.com> wrote:

> The VS load input for 16-bit values receives pairs of 16-bit values
> packed in 32-bit values. Because of the adjusted format used at:
>
>  anv/pipeline: Use 32-bit surface formats for 16-bit formats
>
> v2: Removed use of stride = 2 on 16-bit sources (Jason Ekstrand)
> ---
>  src/intel/compiler/brw_fs_nir.cpp | 21 +++--
>  1 file changed, 19 insertions(+), 2 deletions(-)
>
> diff --git a/src/intel/compiler/brw_fs_nir.cpp
> b/src/intel/compiler/brw_fs_nir.cpp
> index d2f2e17b70..83ff0607a7 100644
> --- a/src/intel/compiler/brw_fs_nir.cpp
> +++ b/src/intel/compiler/brw_fs_nir.cpp
> @@ -2322,8 +2322,25 @@ fs_visitor::nir_emit_vs_intrinsic(const fs_builder
> ,
>assert(const_offset && "Indirect input loads not allowed");
>src = offset(src, bld, const_offset->u32[0]);
>
> -  for (unsigned j = 0; j < num_components; j++) {
> - bld.MOV(offset(dest, bld, j), offset(src, bld, j +
> first_component));
> +  /* The VS load input for 16-bit values receives pairs of 16-bit
> values
> +   * packed in 32-bit values. This is an example on SIMD8:
> +   *
> +   * xy xy xy xy xy xy xy xy
> +   * zw zw zw zw yw zw zw xw
> +   *
> +   * We need to format it to something like:
> +   *
> +   * xx xx xx xx yy yy yy yy
> +   * zz zz zz zz ww ww ww ww
> +   */
>

Please pull this comment inside the if.


> +  if (type_sz(type) == 2) {
> + for (unsigned j = 0; j < num_components; j++)
> +bld.MOV(offset(dest, bld, j),
> +subscript(retype(offset(src,bld, (j / 2) * 2 +
> first_component),
>
+ BRW_REGISTER_TYPE_F), type, j % 2));


Ugh... This is rather hard to parse.  All of the retyping and subscripting
is making my head spin.  How about:

src.type = BRW_REGISTER_TYPE_F;
for (unsigned j = 0; j < num_components; j++) {
   unsigned src_comp = j / 2 + first_component;
   bld.MOV(offset(dest, bld, j),
 subscript(offset(src, bld, src_comp), dst.type, j % 2));
}


> +  } else {
> + for (unsigned j = 0; j < num_components; j++)
> +bld.MOV(offset(dest, bld, j), offset(src, bld, j +
> first_component));
>}
>
>if (type == BRW_REGISTER_TYPE_DF) {
> --
> 2.13.6
>
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Re: [Mesa-dev] More gratitude for Meson

[Dylan Baker]

Quoting Ilia Mirkin (2017-11-01 15:52:56)
> On Wed, Nov 1, 2017 at 6:49 PM, Chad Versace  wrote:
> > On Wed 01 Nov 2017, Dylan Baker wrote:
> >> Quoting Chad Versace (2017-11-01 14:43:28)
> >> > Wow. 10 seconds from a clean checkout to an installed Vulkan driver.
> >
> >> Glad that it's working out for you guys!
> >>
> >> Can I convince you to wire the anvil and i965 android/arc++ bits? ;)
> >>
> >> JFYI, the meson build will (I consider it a bug if it doesn't) turn off all
> >> glapi, egl, and glx if there are no dri or gallium drivers built unless you
> >> force them on.
> >
> > Thanks for turning that stuff off. Last time I tried to build just
> > Vulkan without GL (maybe 1.5 years ago), Autotools didn't allow it. It
> > insisted that i965 was a build dependency for anvil.
> >
> >> It also avoids building the glsl compiler unless there's a driver
> >> that uses it.
> >
> > I expected the buildtime to be much longer because I expected it to
> > build the GLSL compiler too. I was surprised and happy to discover that
> > it builds only the SPIR-V compiler.
> >
> >> And it defaults to debug, which might be surprising, but people
> >> around here thought that default debug is a feature.
> >
> > Huh... For infrastructure projects like Mesa (as opposed to test
> > projects like Piglit), I expect the default build to be the release
> > build. But I can understand why others would want default=debug.
> 
> autotools defaults to debug disabled. I think that's how almost every
> project does it... debug enabled is definitely a surprise.
> 
>   -ilia

Well, for distros they likely want to set the buildtype to plain (meson adds no
compiler flags except ones the project defines), and then add their default
flags via CFLAGS and CXXFLAGS. That is certainly *not* what anyone except a
distro (or some kind of build infrastructure like jenkins or gentoo) would want.
Xorg's default is debugoptimzed, for reference.

Dylan


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[Mesa-dev] [PATCH 07/13] autotools: set XA versions in configure.ac and configure header file

[Dylan Baker]

Currently the versions are set in the header, and then sed is used to
extract them, so that autotools can use them elsewhere.

This is odd. Autotools is perfectly capable of configuring the header
with the versions, and then they don't need to be extracted from the
the header. This is cleaner and more obvious.

Tested with make distcheck.

cc: Matt Turner 
Signed-off-by: Dylan Baker 
---
 configure.ac| 17 -
 .../state_trackers/xa/{xa_tracker.h => xa_tracker.h.in} |  6 +++---
 2 files changed, 11 insertions(+), 12 deletions(-)
 rename src/gallium/state_trackers/xa/{xa_tracker.h => xa_tracker.h.in} (97%)

diff --git a/configure.ac b/configure.ac
index 9aa02f55ded..8565d4fca55 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2808,15 +2808,13 @@ AM_CONDITIONAL(HAVE_VULKAN_COMMON, test 
"x$VULKAN_DRIVERS" != "x")
 AC_SUBST([XVMC_MAJOR], 1)
 AC_SUBST([XVMC_MINOR], 0)
 
-XA_HEADER="$srcdir/src/gallium/state_trackers/xa/xa_tracker.h"
-XA_MAJOR=`grep "#define XA_TRACKER_VERSION_MAJOR" $XA_HEADER | $SED 
's/^#define XA_TRACKER_VERSION_MAJOR //'`
-XA_MINOR=`grep "#define XA_TRACKER_VERSION_MINOR" $XA_HEADER | $SED 
's/^#define XA_TRACKER_VERSION_MINOR //'`
-XA_TINY=`grep "#define XA_TRACKER_VERSION_PATCH" $XA_HEADER | $SED 's/^#define 
XA_TRACKER_VERSION_PATCH //'`
-
-AC_SUBST([XA_MAJOR], $XA_MAJOR)
-AC_SUBST([XA_MINOR], $XA_MINOR)
-AC_SUBST([XA_TINY], $XA_TINY)
-AC_SUBST([XA_VERSION], "$XA_MAJOR.$XA_MINOR.$XA_TINY")
+XA_VERSION_MAJOR=2
+AC_SUBST([XA_VERSION_MAJOR])
+XA_VERSION_MINOR=3
+AC_SUBST([XA_VERSION_MINOR])
+XA_VERSION_PATCH=0
+AC_SUBST([XA_VERSION_PATCH])
+AC_SUBST([XA_VERSION], "$XA_MAJOR.$XA_MINOR.$XA_PATCH")
 
 AC_ARG_ENABLE(valgrind,
   [AS_HELP_STRING([--enable-valgrind],
@@ -2898,6 +2896,7 @@ AC_CONFIG_FILES([Makefile
  src/gallium/state_trackers/va/Makefile
  src/gallium/state_trackers/vdpau/Makefile
  src/gallium/state_trackers/xa/Makefile
+ src/gallium/state_trackers/xa/xa_tracker.h
  src/gallium/state_trackers/xvmc/Makefile
  src/gallium/targets/d3dadapter9/Makefile
  src/gallium/targets/d3dadapter9/d3d.pc
diff --git a/src/gallium/state_trackers/xa/xa_tracker.h 
b/src/gallium/state_trackers/xa/xa_tracker.h.in
similarity index 97%
rename from src/gallium/state_trackers/xa/xa_tracker.h
rename to src/gallium/state_trackers/xa/xa_tracker.h.in
index 44b3eb5cbe4..cbd2ae55092 100644
--- a/src/gallium/state_trackers/xa/xa_tracker.h
+++ b/src/gallium/state_trackers/xa/xa_tracker.h.in
@@ -36,9 +36,9 @@
 
 #include 
 
-#define XA_TRACKER_VERSION_MAJOR 2
-#define XA_TRACKER_VERSION_MINOR 3
-#define XA_TRACKER_VERSION_PATCH 0
+#define XA_TRACKER_VERSION_MAJOR @XA_VERSION_MAJOR@
+#define XA_TRACKER_VERSION_MINOR @XA_VERSION_MINOR@
+#define XA_TRACKER_VERSION_PATCH @XA_VERSION_PATCH@
 
 #define XA_FLAG_SHARED (1 << 0)
 #define XA_FLAG_RENDER_TARGET  (1 << 1)
-- 
2.14.3

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[Mesa-dev] [PATCH 09/13] meson: build gallium vdpau state tracker

[Dylan Baker]

---
 meson.build  | 40 -
 meson_options.txt| 13 +
 src/gallium/meson.build  |  7 ++-
 src/gallium/state_trackers/vdpau/meson.build | 32 ++
 src/gallium/targets/vdpau/meson.build| 87 
 5 files changed, 177 insertions(+), 2 deletions(-)
 create mode 100644 src/gallium/state_trackers/vdpau/meson.build
 create mode 100644 src/gallium/targets/vdpau/meson.build

diff --git a/meson.build b/meson.build
index f5b2102fb0e..d269047308c 100644
--- a/meson.build
+++ b/meson.build
@@ -296,6 +296,43 @@ if with_dri or with_gallium
   endif
 endif
 
+dep_vdpau = []
+_vdpau = get_option('gallium-vdpau')
+if _vdpau == 'auto'
+  if not ['linux', 'bsd'].contains(host_machine.system())
+with_gallium_vdpau = false
+  elif not with_platform_x11
+with_gallium_vdpau = false
+  elif not (with_gallium_r300 or with_gallium_r600 or with_gallium_radeonsi or
+with_gallium_nouveau)
+with_gallium_vdpau = false
+  else
+dep_vdpau = dependency('vdpau', version : '>= 1.1', required : false)
+with_gallium_vdpau = dep_vdpau.found()
+  endif
+elif _vdpau == 'true'
+  if not ['linux', 'bsd'].contains(host_machine.system())
+error('VDPAU state tracker can only be build on unix-like OSes.')
+  elif not with_platform_x11
+error('VDPAU state tracker requires X11 support.')
+with_gallium_vdpau = false
+  elif not (with_gallium_r300 or with_gallium_r600 or with_gallium_radeonsi or
+with_gallium_nouveau)
+error('VDPAU state tracker requires at least one of the following gallium 
drivers: r300, r600, radeonsi, nouveau.')
+  endif
+  dep_vdpau = dependency('vdpau', version : '>= 1.1')
+else
+  with_gallium_vdpau = false
+endif
+
+if with_gallium_vdpau
+  pre_args += '-DHAVE_ST_VDPAU'
+endif
+vdpau_drivers_path = get_option('vdpau-libs-path')
+if vdpau_drivers_path == ''
+  vdpau_drivers_path = join_paths(get_option('libdir'), 'vdpau')
+endif
+
 gl_pkgconfig_c_flags = []
 if with_platform_x11
   if with_any_vk or (with_glx == 'dri' and with_dri_platform == 'drm')
@@ -802,7 +839,8 @@ if with_platform_x11
 dep_xcb_glx = dependency('xcb-glx', version : '>= 1.8.1')
 dep_xxf86vm = dependency('xxf86vm', required : false)
   endif
-  if with_any_vk or (with_glx == 'dri' and with_dri_platform == 'drm')
+  if (with_any_vk or (with_glx == 'dri' and with_dri_platform == 'drm') or
+  with_gallium_vdpau)
 dep_xcb = dependency('xcb')
 dep_x11_xcb = dependency('x11-xcb')
 dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')
diff --git a/meson_options.txt b/meson_options.txt
index dabaad48505..6cb27301bb1 100644
--- a/meson_options.txt
+++ b/meson_options.txt
@@ -49,6 +49,19 @@ option(
   value : 
'pl111,radeonsi,nouveau,freedreno,swrast,vc4,etnaviv,imx,r300,r600,svga,virgl',
   description : 'comma separated list of gallium drivers to build.'
 )
+option(
+  'gallium-vdpau',
+  type : 'combo',
+  value : 'auto',
+  choices : ['auto', 'true', 'false'],
+  description : 'enable gallium vdpau state tracker.',
+)
+option(
+  'vdpau-libs-path',
+  type : 'string',
+  value : '',
+  description : 'path to put vdpau libraries. defaults to $libdir/vdpau.'
+)
 option(
   'vulkan-drivers',
   type : 'string',
diff --git a/src/gallium/meson.build b/src/gallium/meson.build
index b9f9624c364..89c74ee23a6 100644
--- a/src/gallium/meson.build
+++ b/src/gallium/meson.build
@@ -95,6 +95,9 @@ subdir('state_trackers/dri')
 if with_osmesa == 'gallium'
   subdir('state_trackers/osmesa')
 endif
+if with_gallium_vdpau
+  subdir('state_trackers/vdpau')
+endif
 # TODO: SWR
 # TODO: virgl
 # TODO: winsys/sw/xlib
@@ -105,10 +108,12 @@ endif
 if with_osmesa == 'gallium'
   subdir('targets/osmesa')
 endif
+if with_gallium_vdpau
+  subdir('targets/vdpau')
+endif
 # TODO: xlib-glx
 # TODO: OMX
 # TODO: VA
-# TODO: vdpau
 # TODO: xa
 # TODO: xvmc
 # TODO: nine
diff --git a/src/gallium/state_trackers/vdpau/meson.build 
b/src/gallium/state_trackers/vdpau/meson.build
new file mode 100644
index 000..9678b79ef6c
--- /dev/null
+++ b/src/gallium/state_trackers/vdpau/meson.build
@@ -0,0 +1,32 @@
+# Copyright © 2017 Intel Corproration
+
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR 

[Mesa-dev] [PATCH 05/13] meson: build svga driver on linux

[Dylan Baker]

Build tested only.

Signed-off-by: Dylan Baker 
---
 meson.build |  2 +
 meson_options.txt   |  2 +-
 src/gallium/drivers/svga/meson.build| 88 +
 src/gallium/meson.build |  7 ++-
 src/gallium/targets/dri/meson.build |  5 ++
 src/gallium/winsys/svga/drm/meson.build | 45 +
 6 files changed, 147 insertions(+), 2 deletions(-)
 create mode 100644 src/gallium/drivers/svga/meson.build
 create mode 100644 src/gallium/winsys/svga/drm/meson.build

diff --git a/meson.build b/meson.build
index 1b7972c97e3..253dea57c51 100644
--- a/meson.build
+++ b/meson.build
@@ -114,6 +114,7 @@ with_gallium_vc5 = false
 with_gallium_etnaviv = false
 with_gallium_imx = false
 with_gallium_i915 = false
+with_gallium_svga = false
 _drivers = get_option('gallium-drivers')
 if _drivers != ''
   _split = _drivers.split(',')
@@ -129,6 +130,7 @@ if _drivers != ''
   with_gallium_etnaviv = _split.contains('etnaviv')
   with_gallium_imx = _split.contains('imx')
   with_gallium_i915 = _split.contains('i915')
+  with_gallium_svga = _split.contains('svga')
   with_gallium = true
   with_dri = true
 endif
diff --git a/meson_options.txt b/meson_options.txt
index 2d21a10425f..41db2555fe9 100644
--- a/meson_options.txt
+++ b/meson_options.txt
@@ -46,7 +46,7 @@ option(
 option(
   'gallium-drivers',
   type : 'string',
-  value : 'pl111,radeonsi,nouveau,freedreno,swrast,vc4,etnaviv,imx,r300,r600',
+  value : 
'pl111,radeonsi,nouveau,freedreno,swrast,vc4,etnaviv,imx,r300,r600,svga',
   description : 'comma separated list of gallium drivers to build.'
 )
 option(
diff --git a/src/gallium/drivers/svga/meson.build 
b/src/gallium/drivers/svga/meson.build
new file mode 100644
index 000..d9a7da95a33
--- /dev/null
+++ b/src/gallium/drivers/svga/meson.build
@@ -0,0 +1,88 @@
+# Copyright © 2017 Intel Corporation
+
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+files_svga = files(
+  'svga_cmd.c',
+  'svga_cmd_vgpu10.c',
+  'svga_context.c',
+  'svga_draw_arrays.c',
+  'svga_draw.c',
+  'svga_draw_elements.c',
+  'svga_format.c',
+  'svga_link.c',
+  'svga_msg.c',
+  'svga_pipe_blend.c',
+  'svga_pipe_blit.c',
+  'svga_pipe_clear.c',
+  'svga_pipe_constants.c',
+  'svga_pipe_depthstencil.c',
+  'svga_pipe_draw.c',
+  'svga_pipe_flush.c',
+  'svga_pipe_fs.c',
+  'svga_pipe_gs.c',
+  'svga_pipe_misc.c',
+  'svga_pipe_query.c',
+  'svga_pipe_rasterizer.c',
+  'svga_pipe_sampler.c',
+  'svga_pipe_streamout.c',
+  'svga_pipe_vertex.c',
+  'svga_pipe_vs.c',
+  'svga_resource_buffer.c',
+  'svga_resource_buffer_upload.c',
+  'svga_resource.c',
+  'svga_resource_texture.c',
+  'svga_sampler_view.c',
+  'svga_screen.c',
+  'svga_screen_cache.c',
+  'svga_shader.c',
+  'svga_state.c',
+  'svga_state_constants.c',
+  'svga_state_framebuffer.c',
+  'svga_state_fs.c',
+  'svga_state_gs.c',
+  'svga_state_need_swtnl.c',
+  'svga_state_rss.c',
+  'svga_state_sampler.c',
+  'svga_state_tgsi_transform.c',
+  'svga_state_tss.c',
+  'svga_state_vdecl.c',
+  'svga_state_vs.c',
+  'svga_surface.c',
+  'svga_swtnl_backend.c',
+  'svga_swtnl_draw.c',
+  'svga_swtnl_state.c',
+  'svga_tgsi.c',
+  'svga_tgsi_decl_sm30.c',
+  'svga_tgsi_insn.c',
+  'svga_tgsi_vgpu10.c',
+  'svgadump/svga_dump.c',
+  'svgadump/svga_shader_dump.c',
+  'svgadump/svga_shader_op.c',
+)
+
+libsvga = static_library(
+  'svga',
+  files_svga,
+  c_args : [c_vis_args, c_msvc_compat_args],
+  include_directories : [
+inc_src, inc_include, inc_gallium, inc_gallium_aux,
+include_directories('include')
+  ],
+)
diff --git a/src/gallium/meson.build b/src/gallium/meson.build
index 3ff7b994956..2140267105e 100644
--- a/src/gallium/meson.build
+++ b/src/gallium/meson.build
@@ -50,6 +50,9 @@ endif
 if with_gallium_r600
   subdir('drivers/r600')
 endif
+if with_gallium_svga
+  subdir('drivers/svga')
+endif
 subdir('drivers/llvmpipe')
 

[Mesa-dev] [PATCH 10/13] meson: build gallium xvmc state tracker

[Dylan Baker]

---
 meson.build | 34 +-
 meson_options.txt   | 13 ++
 src/gallium/meson.build |  7 ++-
 src/gallium/state_trackers/xvmc/meson.build | 52 +
 src/gallium/targets/xvmc/meson.build| 70 +
 5 files changed, 174 insertions(+), 2 deletions(-)
 create mode 100644 src/gallium/state_trackers/xvmc/meson.build
 create mode 100644 src/gallium/targets/xvmc/meson.build

diff --git a/meson.build b/meson.build
index d269047308c..48fa4ca5e5e 100644
--- a/meson.build
+++ b/meson.build
@@ -333,6 +333,38 @@ if vdpau_drivers_path == ''
   vdpau_drivers_path = join_paths(get_option('libdir'), 'vdpau')
 endif
 
+dep_xvmc = []
+_xvmc = get_option('gallium-xvmc')
+if _xvmc == 'auto'
+  if not ['linux', 'bsd'].contains(host_machine.system())
+with_gallium_xvmc = false
+  elif not with_platform_x11
+with_gallium_xvmc = false
+  elif not (with_gallium_r600 or with_gallium_nouveau)
+with_gallium_xvmc = false
+  else
+dep_xvmc = dependency('xvmc', version : '>= 1.0.6', required : false)
+with_gallium_xvmc = dep_xvmc.found()
+  endif
+elif _xvmc == 'true'
+  if not ['linux', 'bsd'].contains(host_machine.system())
+error('XVMC state tracker can only be build on unix-like OSes.')
+  elif not with_platform_x11
+error('XVMC state tracker requires X11 support.')
+with_gallium_xvmc = false
+  elif not (with_gallium_r600 or with_gallium_nouveau)
+error('XVMC state tracker requires at least one of the following gallium 
drivers: r600, nouveau.')
+  endif
+  dep_xvmc = dependency('xvmc', version : '>= 1.0.6')
+else
+  with_gallium_xvmc = false
+endif
+
+xvmc_drivers_path = get_option('xvmc-libs-path')
+if xvmc_drivers_path == ''
+  xvmc_drivers_path = get_option('libdir')
+endif
+
 gl_pkgconfig_c_flags = []
 if with_platform_x11
   if with_any_vk or (with_glx == 'dri' and with_dri_platform == 'drm')
@@ -840,7 +872,7 @@ if with_platform_x11
 dep_xxf86vm = dependency('xxf86vm', required : false)
   endif
   if (with_any_vk or (with_glx == 'dri' and with_dri_platform == 'drm') or
-  with_gallium_vdpau)
+  (with_gallium_vdpau or with_gallium_xvmc))
 dep_xcb = dependency('xcb')
 dep_x11_xcb = dependency('x11-xcb')
 dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')
diff --git a/meson_options.txt b/meson_options.txt
index 6cb27301bb1..3b60a0ecf97 100644
--- a/meson_options.txt
+++ b/meson_options.txt
@@ -62,6 +62,19 @@ option(
   value : '',
   description : 'path to put vdpau libraries. defaults to $libdir/vdpau.'
 )
+option(
+  'gallium-xvmc',
+  type : 'combo',
+  value : 'auto',
+  choices : ['auto', 'true', 'false'],
+  description : 'enable gallium xvmc state tracker.',
+)
+option(
+  'xvmc-libs-path',
+  type : 'string',
+  value : '',
+  description : 'path to put xvmc libraries. defaults to $libdir.'
+)
 option(
   'vulkan-drivers',
   type : 'string',
diff --git a/src/gallium/meson.build b/src/gallium/meson.build
index 89c74ee23a6..81a6670830e 100644
--- a/src/gallium/meson.build
+++ b/src/gallium/meson.build
@@ -98,6 +98,9 @@ endif
 if with_gallium_vdpau
   subdir('state_trackers/vdpau')
 endif
+if with_gallium_xvmc
+  subdir('state_trackers/xvmc')
+endif
 # TODO: SWR
 # TODO: virgl
 # TODO: winsys/sw/xlib
@@ -111,10 +114,12 @@ endif
 if with_gallium_vdpau
   subdir('targets/vdpau')
 endif
+if with_gallium_xvmc
+  subdir('targets/xvmc')
+endif
 # TODO: xlib-glx
 # TODO: OMX
 # TODO: VA
 # TODO: xa
-# TODO: xvmc
 # TODO: nine
 # TODO: tests
diff --git a/src/gallium/state_trackers/xvmc/meson.build 
b/src/gallium/state_trackers/xvmc/meson.build
new file mode 100644
index 000..141b38f7d3f
--- /dev/null
+++ b/src/gallium/state_trackers/xvmc/meson.build
@@ -0,0 +1,52 @@
+# Copyright © 2017 Intel Corporation
+
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+libxvmc_st = static_library(
+  'xvmc_st',
+  files('attributes.c', 

[Mesa-dev] [PATCH 12/13] meson: build gallium va state tracker

[Dylan Baker]

---
 meson.build   | 35 +-
 meson_options.txt | 13 ++
 src/gallium/meson.build   |  7 ++-
 src/gallium/state_trackers/va/meson.build | 39 
 src/gallium/targets/va/meson.build| 78 +++
 5 files changed, 170 insertions(+), 2 deletions(-)
 create mode 100644 src/gallium/state_trackers/va/meson.build
 create mode 100644 src/gallium/targets/va/meson.build

diff --git a/meson.build b/meson.build
index 32b9d96e5be..582ee1d45f1 100644
--- a/meson.build
+++ b/meson.build
@@ -417,6 +417,38 @@ if with_gallium_omx
   endif
 endif
 
+dep_va = []
+_va = get_option('gallium-va')
+if _va == 'auto'
+  if not ['linux', 'bsd'].contains(host_machine.system())
+with_gallium_va = false
+  elif not with_platform_x11
+with_gallium_va = false
+  elif not (with_gallium_r600 or with_gallium_radeonsi or with_gallium_nouveau)
+with_gallium_va = false
+  else
+dep_va = dependency('libva', version : '>= 0.38.0', required : false)
+with_gallium_va = dep_va.found()
+  endif
+elif _va == 'true'
+  if not ['linux', 'bsd'].contains(host_machine.system())
+error('VA state tracker can only be built on unix-like OSes.')
+  elif not (with_platform_x11 or with_platform_drm)
+error('VA state tracker requires X11 or drm or wayland platform support.')
+with_gallium_va = false
+  elif not (with_gallium_r600 or with_gallium_radeonsi or with_gallium_nouveau)
+error('VA state tracker requires at least one of the following gallium 
drivers: r600, radeonsi, nouveau.')
+  endif
+  dep_va = dependency('libva', version : '>= 0.38.0')
+else
+  with_gallium_va = false
+endif
+
+va_drivers_path = get_option('va-libs-path')
+if va_drivers_path == ''
+  va_drivers_path = join_paths(get_option('libdir'), 'dri')
+endif
+
 gl_pkgconfig_c_flags = []
 if with_platform_x11
   if with_any_vk or (with_glx == 'dri' and with_dri_platform == 'drm')
@@ -924,7 +956,8 @@ if with_platform_x11
 dep_xxf86vm = dependency('xxf86vm', required : false)
   endif
   if (with_any_vk or (with_glx == 'dri' and with_dri_platform == 'drm') or
-  (with_gallium_vdpau or with_gallium_xvmc or with_gallium_omx))
+  (with_gallium_vdpau or with_gallium_xvmc or with_gallium_omx or
+   with_gallium_xa))
 dep_xcb = dependency('xcb')
 dep_x11_xcb = dependency('x11-xcb')
 dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')
diff --git a/meson_options.txt b/meson_options.txt
index f0cb73a89eb..497242cf532 100644
--- a/meson_options.txt
+++ b/meson_options.txt
@@ -88,6 +88,19 @@ option(
   value : '',
   description : 'path to put omx libraries. defaults to omx-bellagio 
pkg-config pluginsdir.'
 )
+option(
+  'gallium-va',
+  type : 'combo',
+  value : 'auto',
+  choices : ['auto', 'true', 'false'],
+  description : 'enable gallium va state tracker.',
+)
+option(
+  'va-libs-path',
+  type : 'string',
+  value : '',
+  description : 'path to put va libraries. defaults to $libdir/dri.'
+)
 option(
   'vulkan-drivers',
   type : 'string',
diff --git a/src/gallium/meson.build b/src/gallium/meson.build
index 49e3d72114b..1dc646bf28f 100644
--- a/src/gallium/meson.build
+++ b/src/gallium/meson.build
@@ -104,6 +104,9 @@ endif
 if with_gallium_omx
   subdir('state_trackers/omx_bellagio')
 endif
+if with_gallium_va
+  subdir('state_trackers/va')
+endif
 # TODO: SWR
 # TODO: virgl
 # TODO: winsys/sw/xlib
@@ -123,8 +126,10 @@ endif
 if with_gallium_omx
   subdir('targets/omx-bellagio')
 endif
+if with_gallium_va
+  subdir('targets/va')
+endif
 # TODO: xlib-glx
-# TODO: VA
 # TODO: xa
 # TODO: nine
 # TODO: tests
diff --git a/src/gallium/state_trackers/va/meson.build 
b/src/gallium/state_trackers/va/meson.build
new file mode 100644
index 000..7770bc48066
--- /dev/null
+++ b/src/gallium/state_trackers/va/meson.build
@@ -0,0 +1,39 @@
+# Copyright © 2017 Intel Corporation
+
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 

[Mesa-dev] [PATCH 01/13] meson: add proper LLVM modules to check for RadeonSI as well

[Dylan Baker]

Signed-off-by: Dylan Baker 
---
 meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/meson.build b/meson.build
index 6ad8c8bbf4b..bae3b5a02ef 100644
--- a/meson.build
+++ b/meson.build
@@ -654,7 +654,7 @@ if with_gallium_freedreno
 endif
 
 llvm_modules = ['bitwriter', 'engine', 'mcdisassembler', 'mcjit']
-if with_amd_vk
+if with_amd_vk or with_gallium_radeonsi # TODO: r600
   llvm_modules += ['amdgpu', 'bitreader', 'ipo']
 endif
 dep_llvm = dependency(
-- 
2.14.3

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 13/13] meson: build gallium xa state tracker

[Dylan Baker]

---
 meson.build   | 21 +
 meson_options.txt |  7 +++
 src/gallium/meson.build   |  7 ++-
 src/gallium/state_trackers/xa/meson.build | 45 ++
 src/gallium/targets/xa/meson.build| 77 +++
 5 files changed, 156 insertions(+), 1 deletion(-)
 create mode 100644 src/gallium/state_trackers/xa/meson.build
 create mode 100644 src/gallium/targets/xa/meson.build

diff --git a/meson.build b/meson.build
index 582ee1d45f1..15250d99145 100644
--- a/meson.build
+++ b/meson.build
@@ -449,6 +449,27 @@ if va_drivers_path == ''
   va_drivers_path = join_paths(get_option('libdir'), 'dri')
 endif
 
+_xa = get_option('gallium-xa')
+if _xa == 'auto'
+  if not ['linux', 'bsd'].contains(host_machine.system())
+with_gallium_xa = false
+  elif not (with_gallium_nouveau or with_gallium_freedreno or with_gallium_i915
+or with_gallium_svga)
+with_gallium_xa = false
+  else
+with_gallium_xa = true
+  endif
+elif _xa == 'true'
+  if not ['linux', 'bsd'].contains(host_machine.system())
+error('XA state tracker can only be built on unix-like OSes.')
+  elif not (with_gallium_nouveau or with_gallium_freedreno or with_gallium_i915
+or with_gallium_svga)
+error('XA state tracker requires at least one of the following gallium 
drivers: nouveau, freedreno, i915, svga.')
+  endif
+else
+  with_gallium_xa = false
+endif
+
 gl_pkgconfig_c_flags = []
 if with_platform_x11
   if with_any_vk or (with_glx == 'dri' and with_dri_platform == 'drm')
diff --git a/meson_options.txt b/meson_options.txt
index 497242cf532..98cb54bcb19 100644
--- a/meson_options.txt
+++ b/meson_options.txt
@@ -101,6 +101,13 @@ option(
   value : '',
   description : 'path to put va libraries. defaults to $libdir/dri.'
 )
+option(
+  'gallium-xa',
+  type : 'combo',
+  value : 'auto',
+  choices : ['auto', 'true', 'false'],
+  description : 'enable gallium xa state tracker.',
+)
 option(
   'vulkan-drivers',
   type : 'string',
diff --git a/src/gallium/meson.build b/src/gallium/meson.build
index 1dc646bf28f..a8f21e7e7c1 100644
--- a/src/gallium/meson.build
+++ b/src/gallium/meson.build
@@ -107,6 +107,9 @@ endif
 if with_gallium_va
   subdir('state_trackers/va')
 endif
+if with_gallium_xa
+  subdir('state_trackers/xa')
+endif
 # TODO: SWR
 # TODO: virgl
 # TODO: winsys/sw/xlib
@@ -129,7 +132,9 @@ endif
 if with_gallium_va
   subdir('targets/va')
 endif
+if with_gallium_xa
+  subdir('targets/xa')
+endif
 # TODO: xlib-glx
-# TODO: xa
 # TODO: nine
 # TODO: tests
diff --git a/src/gallium/state_trackers/xa/meson.build 
b/src/gallium/state_trackers/xa/meson.build
new file mode 100644
index 000..5678221f235
--- /dev/null
+++ b/src/gallium/state_trackers/xa/meson.build
@@ -0,0 +1,45 @@
+# Copyright © 2017 Intel Corporation
+
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+xa_version = ['2', '3', '0']
+
+xa_conf = configuration_data()
+xa_conf.set('XA_VERSION_MAJOR', xa_version[0])
+xa_conf.set('XA_VERSION_MINOR', xa_version[1])
+xa_conf.set('XA_VERSION_PATCH', xa_version[2])
+
+xa_tracker_h = configure_file(
+  configuration : xa_conf,
+  input : 'xa_tracker.h.in',
+  output : 'xa_tracker.h',
+  install_dir : get_option('includedir'),
+)
+
+libxa_st = static_library(
+  'xa_st',
+  [xa_tracker_h, files(
+'xa_composite.c', 'xa_context.c', 'xa_renderer.c', 'xa_tgsi.c',
+'xa_tracker.c', 'xa_yuv.c',
+  )],
+  c_args : [c_vis_args, '-pedantic'],
+  include_directories : inc_common,
+)
+
+install_headers('xa_composite.h', 'xa_context.h')
diff --git a/src/gallium/targets/xa/meson.build 
b/src/gallium/targets/xa/meson.build
new file mode 100644
index 000..052183a6f21
--- /dev/null
+++ b/src/gallium/targets/xa/meson.build
@@ -0,0 +1,77 @@
+# Copyright © 2017 Intel Corporation
+
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated 

[Mesa-dev] [PATCH 02/13] meson: build i915g driver

[Dylan Baker]

Build tested only.

Signed-off-by: Dylan Baker 
---
 meson.build |  7 +++-
 src/gallium/drivers/i915/meson.build| 70 +
 src/gallium/meson.build |  7 +++-
 src/gallium/targets/dri/meson.build |  5 +++
 src/gallium/winsys/i915/drm/meson.build | 31 +++
 5 files changed, 118 insertions(+), 2 deletions(-)
 create mode 100644 src/gallium/drivers/i915/meson.build
 create mode 100644 src/gallium/winsys/i915/drm/meson.build

diff --git a/meson.build b/meson.build
index bae3b5a02ef..9206369a72a 100644
--- a/meson.build
+++ b/meson.build
@@ -111,6 +111,7 @@ with_gallium_vc4 = false
 with_gallium_vc5 = false
 with_gallium_etnaviv = false
 with_gallium_imx = false
+with_gallium_i915 = false
 _drivers = get_option('gallium-drivers')
 if _drivers != ''
   _split = _drivers.split(',')
@@ -123,6 +124,7 @@ if _drivers != ''
   with_gallium_vc5 = _split.contains('vc5')
   with_gallium_etnaviv = _split.contains('etnaviv')
   with_gallium_imx = _split.contains('imx')
+  with_gallium_i915 = _split.contains('i915')
   with_gallium = true
   with_dri = true
 endif
@@ -138,12 +140,15 @@ endif
 if with_dri_swrast and with_gallium_softpipe
   error('Only one swrast provider can be built')
 endif
+if with_dri_i915 and with_gallium_i915
+  error('Only one i915 provider can be built')
+endif
 if with_gallium_imx and not with_gallium_etnaviv
   error('IMX driver requires etnaviv driver')
 endif
 
 dep_libdrm_intel = []
-if with_dri_i915
+if with_dri_i915 or with_gallium_i915
   dep_libdrm_intel = dependency('libdrm_intel', version : '>= 2.4.75')
 endif
 
diff --git a/src/gallium/drivers/i915/meson.build 
b/src/gallium/drivers/i915/meson.build
new file mode 100644
index 000..17f0f6adf8f
--- /dev/null
+++ b/src/gallium/drivers/i915/meson.build
@@ -0,0 +1,70 @@
+# Copyright © 2017 Intel Corporation
+
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+files_i915 = files(
+  'i915_batchbuffer.h',
+  'i915_batch.h',
+  'i915_blit.c',
+  'i915_blit.h',
+  'i915_clear.c',
+  'i915_context.c',
+  'i915_context.h',
+  'i915_debug.c',
+  'i915_debug_fp.c',
+  'i915_debug.h',
+  'i915_debug_private.h',
+  'i915_flush.c',
+  'i915_fpc_emit.c',
+  'i915_fpc.h',
+  'i915_fpc_optimize.c',
+  'i915_fpc_translate.c',
+  'i915_prim_emit.c',
+  'i915_prim_vbuf.c',
+  'i915_public.h',
+  'i915_query.c',
+  'i915_query.h',
+  'i915_reg.h',
+  'i915_resource_buffer.c',
+  'i915_resource.c',
+  'i915_resource.h',
+  'i915_resource_texture.c',
+  'i915_screen.c',
+  'i915_screen.h',
+  'i915_state.c',
+  'i915_state_derived.c',
+  'i915_state_dynamic.c',
+  'i915_state_emit.c',
+  'i915_state_fpc.c',
+  'i915_state.h',
+  'i915_state_immediate.c',
+  'i915_state_inlines.h',
+  'i915_state_sampler.c',
+  'i915_state_static.c',
+  'i915_surface.c',
+  'i915_surface.h',
+  'i915_winsys.h',
+)
+
+libi915 = static_library(
+  'i915',
+  files_i915,
+  c_args : [c_vis_args],
+  include_directories : [inc_include, inc_src, inc_gallium, inc_gallium_aux],
+)
diff --git a/src/gallium/meson.build b/src/gallium/meson.build
index 6edfe80321d..67002132cd0 100644
--- a/src/gallium/meson.build
+++ b/src/gallium/meson.build
@@ -41,6 +41,9 @@ endif
 if with_gallium_etnaviv
   subdir('drivers/etnaviv')
 endif
+if with_gallium_i915
+  subdir('drivers/i915')
+endif
 subdir('drivers/llvmpipe')
 subdir('winsys/sw/null')
 subdir('winsys/sw/dri')
@@ -65,11 +68,13 @@ endif
 if with_gallium_imx
   subdir('winsys/imx/drm')
 endif
+if with_gallium_i915
+  subdir('winsys/i915/drm')
+endif
 subdir('state_trackers/dri')
 if with_osmesa == 'gallium'
   subdir('state_trackers/osmesa')
 endif
-# TODO: i915
 # TODO: SVGA
 # TODO: r300
 # TODO: r600
diff --git a/src/gallium/targets/dri/meson.build 
b/src/gallium/targets/dri/meson.build
index 0ce088e1aca..631cd664e52 100644
--- a/src/gallium/targets/dri/meson.build
+++ b/src/gallium/targets/dri/meson.build
@@ -107,6 

[Mesa-dev] [PATCH 03/13] meson: build r300 driver

[Dylan Baker]

This is build tested only

Signed-off-by: Dylan Baker 
---
 meson.build  |   4 +-
 meson_options.txt|   2 +-
 src/gallium/drivers/r300/meson.build | 156 +++
 src/gallium/meson.build  |   4 +-
 src/gallium/targets/dri/meson.build  |  12 ++-
 5 files changed, 173 insertions(+), 5 deletions(-)
 create mode 100644 src/gallium/drivers/r300/meson.build

diff --git a/meson.build b/meson.build
index 9206369a72a..daa07330f12 100644
--- a/meson.build
+++ b/meson.build
@@ -104,6 +104,7 @@ endif
 with_gallium = false
 with_gallium_pl111 = false
 with_gallium_radeonsi = false
+with_gallium_r300 = false
 with_gallium_nouveau = false
 with_gallium_freedreno = false
 with_gallium_softpipe = false
@@ -117,6 +118,7 @@ if _drivers != ''
   _split = _drivers.split(',')
   with_gallium_pl111 = _split.contains('pl111')
   with_gallium_radeonsi = _split.contains('radeonsi')
+  with_gallium_r300 = _split.contains('r300')
   with_gallium_nouveau = _split.contains('nouveau')
   with_gallium_freedreno = _split.contains('freedreno')
   with_gallium_softpipe = _split.contains('swrast')
@@ -645,7 +647,7 @@ dep_libdrm_freedreno = []
 if with_amd_vk or with_gallium_radeonsi
   dep_libdrm_amdgpu = dependency('libdrm_amdgpu', version : '>= 2.4.86')
 endif
-if with_gallium_radeonsi or with_dri_r100 or with_dri_r200
+if with_gallium_radeonsi or with_dri_r100 or with_dri_r200 or with_gallium_r300
   dep_libdrm_radeon = dependency('libdrm_radeon', version : '>= 2.4.71')
 endif
 if with_gallium_nouveau or with_dri_nouveau
diff --git a/meson_options.txt b/meson_options.txt
index d93dd6eab2a..eca431edd95 100644
--- a/meson_options.txt
+++ b/meson_options.txt
@@ -46,7 +46,7 @@ option(
 option(
   'gallium-drivers',
   type : 'string',
-  value : 'pl111,radeonsi,nouveau,freedreno,swrast,vc4,etnaviv,imx',
+  value : 'pl111,radeonsi,nouveau,freedreno,swrast,vc4,etnaviv,imx,r300',
   description : 'comma separated list of gallium drivers to build.'
 )
 option(
diff --git a/src/gallium/drivers/r300/meson.build 
b/src/gallium/drivers/r300/meson.build
new file mode 100644
index 000..0d525d8d1b3
--- /dev/null
+++ b/src/gallium/drivers/r300/meson.build
@@ -0,0 +1,156 @@
+# Copyright © 2017 Intel Corporation
+
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+files_r300 = files(
+  'r300_blit.c',
+  'r300_cb.h',
+  'r300_chipset.c',
+  'r300_chipset.h',
+  'r300_context.c',
+  'r300_context.h',
+  'r300_cs.h',
+  'r300_debug.c',
+  'r300_defines.h',
+  'r300_emit.c',
+  'r300_emit.h',
+  'r300_flush.c',
+  'r300_fs.c',
+  'r300_fs.h',
+  'r300_hyperz.c',
+  'r300_public.h',
+  'r300_query.c',
+  'r300_reg.h',
+  'r300_render.c',
+  'r300_render_stencilref.c',
+  'r300_render_translate.c',
+  'r300_resource.c',
+  'r300_screen_buffer.c',
+  'r300_screen_buffer.h',
+  'r300_screen.c',
+  'r300_screen.h',
+  'r300_shader_semantics.h',
+  'r300_state.c',
+  'r300_state_derived.c',
+  'r300_state_inlines.h',
+  'r300_texture.c',
+  'r300_texture_desc.c',
+  'r300_texture_desc.h',
+  'r300_texture.h',
+  'r300_tgsi_to_rc.c',
+  'r300_tgsi_to_rc.h',
+  'r300_transfer.c',
+  'r300_transfer.h',
+  'r300_vs.c',
+  'r300_vs_draw.c',
+  'r300_vs.h',
+  'compiler/memory_pool.c',
+  'compiler/memory_pool.h',
+  'compiler/r300_fragprog.c',
+  'compiler/r300_fragprog_emit.c',
+  'compiler/r300_fragprog.h',
+  'compiler/r300_fragprog_swizzle.c',
+  'compiler/r300_fragprog_swizzle.h',
+  'compiler/r3xx_fragprog.c',
+  'compiler/r3xx_vertprog.c',
+  'compiler/r3xx_vertprog_dump.c',
+  'compiler/r500_fragprog.c',
+  'compiler/r500_fragprog_emit.c',
+  'compiler/r500_fragprog.h',
+  'compiler/radeon_code.c',
+  'compiler/radeon_code.h',
+  'compiler/radeon_compiler.c',
+  'compiler/radeon_compiler.h',
+  'compiler/radeon_compiler_util.c',
+  'compiler/radeon_compiler_util.h',
+  'compiler/radeon_dataflow.c',
+  'compiler/radeon_dataflow_deadcode.c',
+  

[Mesa-dev] [PATCH 06/13] meson: build virgl driver

[Dylan Baker]

Build tested only.

Signed-off-by: Dylan Baker 
---
 meson.build| 12 ++---
 meson_options.txt  |  2 +-
 src/gallium/drivers/virgl/meson.build  | 39 ++
 src/gallium/meson.build|  8 ++
 src/gallium/targets/dri/meson.build|  5 
 src/gallium/winsys/virgl/drm/meson.build   | 27 +
 src/gallium/winsys/virgl/vtest/meson.build | 26 
 7 files changed, 115 insertions(+), 4 deletions(-)
 create mode 100644 src/gallium/drivers/virgl/meson.build
 create mode 100644 src/gallium/winsys/virgl/drm/meson.build
 create mode 100644 src/gallium/winsys/virgl/vtest/meson.build

diff --git a/meson.build b/meson.build
index 253dea57c51..adb4578dea0 100644
--- a/meson.build
+++ b/meson.build
@@ -115,6 +115,7 @@ with_gallium_etnaviv = false
 with_gallium_imx = false
 with_gallium_i915 = false
 with_gallium_svga = false
+with_gallium_virgl = false
 _drivers = get_option('gallium-drivers')
 if _drivers != ''
   _split = _drivers.split(',')
@@ -131,6 +132,7 @@ if _drivers != ''
   with_gallium_imx = _split.contains('imx')
   with_gallium_i915 = _split.contains('i915')
   with_gallium_svga = _split.contains('svga')
+  with_gallium_virgl = _split.contains('virgl')
   with_gallium = true
   with_dri = true
 endif
@@ -206,9 +208,13 @@ else
   with_egl = false
 endif
 
-# TODO: or virgl
-if with_egl and with_gallium_radeonsi and not (with_platform_drm or 
with_platform_surfaceless)
-  error('RadeonSI requires drm or surfaceless platform when using EGL')
+if with_egl and not (with_platform_drm or with_platform_surfaceless)
+  if with_gallium_radeonsi
+error('RadeonSI requires drm or surfaceless platform when using EGL')
+  endif
+  if with_gallium_virgl
+error('Virgl requires drm or surfaceless platform when using EGL')
+  endif
 endif
 
 pre_args += '-DGLX_USE_TLS'
diff --git a/meson_options.txt b/meson_options.txt
index 41db2555fe9..4c7d459f140 100644
--- a/meson_options.txt
+++ b/meson_options.txt
@@ -46,7 +46,7 @@ option(
 option(
   'gallium-drivers',
   type : 'string',
-  value : 
'pl111,radeonsi,nouveau,freedreno,swrast,vc4,etnaviv,imx,r300,r600,svga',
+  value : 
'pl111,radeonsi,nouveau,freedreno,swrast,vc4,etnaviv,imx,r300,r600,svga,virgl',
   description : 'comma separated list of gallium drivers to build.'
 )
 option(
diff --git a/src/gallium/drivers/virgl/meson.build 
b/src/gallium/drivers/virgl/meson.build
new file mode 100644
index 000..8284f548927
--- /dev/null
+++ b/src/gallium/drivers/virgl/meson.build
@@ -0,0 +1,39 @@
+# Copyright © 2017 Intel Corporation
+
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+files_libvirgl = files(
+  'virgl_buffer.c',
+  'virgl_context.c',
+  'virgl_encode.c',
+  'virgl_query.c',
+  'virgl_resource.c',
+  'virgl_screen.c',
+  'virgl_streamout.c',
+  'virgl_texture.c',
+  'virgl_tgsi.c',
+)
+
+libvirgl = static_library(
+  'virgl',
+  files_libvirgl,
+  c_args : c_vis_args,
+  include_directories : inc_common,
+  dependencies : dep_libdrm,
+)
diff --git a/src/gallium/meson.build b/src/gallium/meson.build
index 2140267105e..b9f9624c364 100644
--- a/src/gallium/meson.build
+++ b/src/gallium/meson.build
@@ -1,4 +1,5 @@
 # Copyright © 2017 Dylan Baker
+# Copyright © 2017 Intel Corporation
 
 # Permission is hereby granted, free of charge, to any person obtaining a copy
 # of this software and associated documentation files (the "Software"), to deal
@@ -53,6 +54,9 @@ endif
 if with_gallium_svga
   subdir('drivers/svga')
 endif
+if with_gallium_virgl
+  subdir('drivers/virgl')
+endif
 subdir('drivers/llvmpipe')
 subdir('winsys/sw/null')
 subdir('winsys/sw/dri')
@@ -83,6 +87,10 @@ endif
 if with_gallium_svga
   subdir('winsys/svga/drm')
 endif
+if with_gallium_virgl
+  subdir('winsys/virgl/drm')
+  subdir('winsys/virgl/vtest')
+endif
 subdir('state_trackers/dri')
 if with_osmesa == 

[Mesa-dev] [PATCH 11/13] meson: build gallium omx state tracker

[Dylan Baker]

---
 meson.build| 54 ++-
 meson_options.txt  | 13 
 src/gallium/meson.build|  7 +-
 .../state_trackers/omx_bellagio/meson.build| 30 +
 src/gallium/targets/omx-bellagio/meson.build   | 77 ++
 5 files changed, 179 insertions(+), 2 deletions(-)
 create mode 100644 src/gallium/state_trackers/omx_bellagio/meson.build
 create mode 100644 src/gallium/targets/omx-bellagio/meson.build

diff --git a/meson.build b/meson.build
index 48fa4ca5e5e..32b9d96e5be 100644
--- a/meson.build
+++ b/meson.build
@@ -365,6 +365,58 @@ if xvmc_drivers_path == ''
   xvmc_drivers_path = get_option('libdir')
 endif
 
+dep_omx = []
+_omx = get_option('gallium-omx')
+if _omx == 'auto'
+  if not ['linux', 'bsd'].contains(host_machine.system())
+with_gallium_omx = false
+  elif not with_platform_x11
+with_gallium_omx = false
+  elif not (with_gallium_r600 or with_gallium_radeonsi or with_gallium_nouveau)
+with_gallium_omx = false
+  else
+dep_omx = dependency('libomxil-bellagio', required : false)
+with_gallium_omx = dep_omx.found()
+  endif
+elif _omx == 'true'
+  if not ['linux', 'bsd'].contains(host_machine.system())
+error('OMX state tracker can only be built on unix-like OSes.')
+  elif not (with_platform_x11 or with_platform_drm)
+error('OMX state tracker requires X11 or drm platform support.')
+with_gallium_omx = false
+  elif not (with_gallium_r600 or with_gallium_radeonsi or with_gallium_nouveau)
+error('OMX state tracker requires at least one of the following gallium 
drivers: r600, radeonsi, nouveau.')
+  endif
+  dep_omx = dependency('libomxil-bellagio')
+else
+  with_gallium_omx = false
+endif
+
+omx_drivers_path = get_option('omx-libs-path')
+if with_gallium_omx
+  # Figure out where to put the omx driver.
+  # FIXME: this could all be vastly simplified by adding a 'defined_variable'
+  # argument to meson's get_pkgconfig_variable method.
+  if omx_drivers_path == ''
+_omx_libdir = dep_omx.get_pkgconfig_variable('libdir')
+_omx_drivers_dir = dep_omx.get_pkgconfig_variable('pluginsdir')
+if _omx_libdir == get_option('libdir')
+  omx_drivers_path = _omx_drivers_dir
+else
+  _omx_base_dir = []
+  # This will fail on windows. Does OMX run on windows?
+  _omx_libdir = _omx_libdir.split('/')
+  _omx_drivers_dir = _omx_drivers_dir.split('/')
+  foreach o : _omx_libdir
+if not _omx_drivers_dir.contains(o)
+  _omx_base_dir += o
+endif
+  endforeach
+  omx_drivers_path = join_paths(get_option('libdir'), _omx_drivers_dir)
+endif
+  endif
+endif
+
 gl_pkgconfig_c_flags = []
 if with_platform_x11
   if with_any_vk or (with_glx == 'dri' and with_dri_platform == 'drm')
@@ -872,7 +924,7 @@ if with_platform_x11
 dep_xxf86vm = dependency('xxf86vm', required : false)
   endif
   if (with_any_vk or (with_glx == 'dri' and with_dri_platform == 'drm') or
-  (with_gallium_vdpau or with_gallium_xvmc))
+  (with_gallium_vdpau or with_gallium_xvmc or with_gallium_omx))
 dep_xcb = dependency('xcb')
 dep_x11_xcb = dependency('x11-xcb')
 dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')
diff --git a/meson_options.txt b/meson_options.txt
index 3b60a0ecf97..f0cb73a89eb 100644
--- a/meson_options.txt
+++ b/meson_options.txt
@@ -75,6 +75,19 @@ option(
   value : '',
   description : 'path to put xvmc libraries. defaults to $libdir.'
 )
+option(
+  'gallium-omx',
+  type : 'combo',
+  value : 'auto',
+  choices : ['auto', 'true', 'false'],
+  description : 'enable gallium omx bellagio state tracker.',
+)
+option(
+  'omx-libs-path',
+  type : 'string',
+  value : '',
+  description : 'path to put omx libraries. defaults to omx-bellagio 
pkg-config pluginsdir.'
+)
 option(
   'vulkan-drivers',
   type : 'string',
diff --git a/src/gallium/meson.build b/src/gallium/meson.build
index 81a6670830e..49e3d72114b 100644
--- a/src/gallium/meson.build
+++ b/src/gallium/meson.build
@@ -101,6 +101,9 @@ endif
 if with_gallium_xvmc
   subdir('state_trackers/xvmc')
 endif
+if with_gallium_omx
+  subdir('state_trackers/omx_bellagio')
+endif
 # TODO: SWR
 # TODO: virgl
 # TODO: winsys/sw/xlib
@@ -117,8 +120,10 @@ endif
 if with_gallium_xvmc
   subdir('targets/xvmc')
 endif
+if with_gallium_omx
+  subdir('targets/omx-bellagio')
+endif
 # TODO: xlib-glx
-# TODO: OMX
 # TODO: VA
 # TODO: xa
 # TODO: nine
diff --git a/src/gallium/state_trackers/omx_bellagio/meson.build 
b/src/gallium/state_trackers/omx_bellagio/meson.build
new file mode 100644
index 000..a62a31149e2
--- /dev/null
+++ b/src/gallium/state_trackers/omx_bellagio/meson.build
@@ -0,0 +1,30 @@
+# Copyright © 2017 Intel Corporation
+
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without 

[Mesa-dev] [PATCH 08/13] meson: drop gallium-media argument

[Dylan Baker]

This argument is the wrong approach for handling gallium media state
trackers, since it doesn't allow for an auto option. Instead we'll use
tristates, which do allow for auto.

This option has never been wired to anything anyway.

Signed-off-by: Dylan Baker 
---
 meson.build   | 17 -
 meson_options.txt |  6 --
 2 files changed, 23 deletions(-)

diff --git a/meson.build b/meson.build
index adb4578dea0..f5b2102fb0e 100644
--- a/meson.build
+++ b/meson.build
@@ -296,23 +296,6 @@ if with_dri or with_gallium
   endif
 endif
 
-with_gallium_xvmc = false
-with_gallium_vdpau = false
-with_gallium_omx = false  # this is bellagio
-with_gallium_va = false
-with_gallium_media = false
-dep_va = []
-_drivers = get_option('gallium-media')
-if _drivers != ''
-  _split = _drivers.split(',')
-  with_gallium_xvmc = _split.contains('xvmc')
-  with_gallium_vdpau = _split.contains('vdpau')
-  with_gallium_omx = _split.contains('omx')
-  with_gallium_va = _split.contains('va')
-  with_gallium_media = (with_gallium_xvmc or with_gallium_vdpau or
-with_gallium_omx or with_gallium_va)
-endif
-
 gl_pkgconfig_c_flags = []
 if with_platform_x11
   if with_any_vk or (with_glx == 'dri' and with_dri_platform == 'drm')
diff --git a/meson_options.txt b/meson_options.txt
index 4c7d459f140..dabaad48505 100644
--- a/meson_options.txt
+++ b/meson_options.txt
@@ -49,12 +49,6 @@ option(
   value : 
'pl111,radeonsi,nouveau,freedreno,swrast,vc4,etnaviv,imx,r300,r600,svga,virgl',
   description : 'comma separated list of gallium drivers to build.'
 )
-option(
-  'gallium-media',
-  type : 'string',
-  value : '',
-  description : 'comma separated list of gallium media APIs to build 
(omx,va,vdpau,xvmc).'
-)
 option(
   'vulkan-drivers',
   type : 'string',
-- 
2.14.3

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[Mesa-dev] [PATCH 00/13] meson: build remaining gallium drivers, media state trackers

[Dylan Baker]

This is built on my last series to add the remaining gallium drivers: i915g,
r300, r600, svga, and virgl; and adds to it the 5 gallium media state trackers.
most of this is pretty straight forward build logic, but there is one change
to XA to set the version from the build system instead of the build system
scraping the headers for the versions.

Please review.

Dylan Baker (13):
  meson: add proper LLVM modules to check for RadeonSI as well
  meson: build i915g driver
  meson: build r300 driver
  meson: build r600 driver
  meson: build svga driver on linux
  meson: build virgl driver
  autotools: set XA versions in configure.ac and configure header file
  meson: drop gallium-media argument
  meson: build gallium vdpau state tracker
  meson: build gallium xvmc state tracker
  meson: build gallium omx state tracker
  meson: build gallium va state tracker
  meson: build gallium xa state tracker

 configure.ac   |  17 +-
 meson.build| 232 ++---
 meson_options.txt  |  59 +-
 src/gallium/drivers/i915/meson.build   |  70 +++
 src/gallium/drivers/r300/meson.build   | 156 ++
 src/gallium/drivers/r600/meson.build   | 128 
 src/gallium/drivers/svga/meson.build   |  88 
 src/gallium/drivers/virgl/meson.build  |  39 
 src/gallium/meson.build|  65 +-
 .../state_trackers/omx_bellagio/meson.build|  30 +++
 src/gallium/state_trackers/va/meson.build  |  39 
 src/gallium/state_trackers/vdpau/meson.build   |  32 +++
 src/gallium/state_trackers/xa/meson.build  |  45 
 .../xa/{xa_tracker.h => xa_tracker.h.in}   |   6 +-
 src/gallium/state_trackers/xvmc/meson.build|  52 +
 src/gallium/targets/dri/meson.build|  32 ++-
 src/gallium/targets/omx-bellagio/meson.build   |  77 +++
 src/gallium/targets/va/meson.build |  78 +++
 src/gallium/targets/vdpau/meson.build  |  87 
 src/gallium/targets/xa/meson.build |  77 +++
 src/gallium/targets/xvmc/meson.build   |  70 +++
 src/gallium/winsys/i915/drm/meson.build|  31 +++
 src/gallium/winsys/svga/drm/meson.build|  45 
 src/gallium/winsys/virgl/drm/meson.build   |  27 +++
 src/gallium/winsys/virgl/vtest/meson.build |  26 +++
 25 files changed, 1558 insertions(+), 50 deletions(-)
 create mode 100644 src/gallium/drivers/i915/meson.build
 create mode 100644 src/gallium/drivers/r300/meson.build
 create mode 100644 src/gallium/drivers/r600/meson.build
 create mode 100644 src/gallium/drivers/svga/meson.build
 create mode 100644 src/gallium/drivers/virgl/meson.build
 create mode 100644 src/gallium/state_trackers/omx_bellagio/meson.build
 create mode 100644 src/gallium/state_trackers/va/meson.build
 create mode 100644 src/gallium/state_trackers/vdpau/meson.build
 create mode 100644 src/gallium/state_trackers/xa/meson.build
 rename src/gallium/state_trackers/xa/{xa_tracker.h => xa_tracker.h.in} (97%)
 create mode 100644 src/gallium/state_trackers/xvmc/meson.build
 create mode 100644 src/gallium/targets/omx-bellagio/meson.build
 create mode 100644 src/gallium/targets/va/meson.build
 create mode 100644 src/gallium/targets/vdpau/meson.build
 create mode 100644 src/gallium/targets/xa/meson.build
 create mode 100644 src/gallium/targets/xvmc/meson.build
 create mode 100644 src/gallium/winsys/i915/drm/meson.build
 create mode 100644 src/gallium/winsys/svga/drm/meson.build
 create mode 100644 src/gallium/winsys/virgl/drm/meson.build
 create mode 100644 src/gallium/winsys/virgl/vtest/meson.build

-- 
2.14.3

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[Mesa-dev] [PATCH 04/13] meson: build r600 driver

[Dylan Baker]

Signed-off-by: Dylan Baker 
Tested-by: Aaron Watry 
---
 meson.build  |  20 --
 meson_options.txt|   2 +-
 src/gallium/drivers/r600/meson.build | 128 +++
 src/gallium/meson.build  |   4 +-
 src/gallium/targets/dri/meson.build  |   7 +-
 5 files changed, 153 insertions(+), 8 deletions(-)
 create mode 100644 src/gallium/drivers/r600/meson.build

diff --git a/meson.build b/meson.build
index daa07330f12..1b7972c97e3 100644
--- a/meson.build
+++ b/meson.build
@@ -105,6 +105,7 @@ with_gallium = false
 with_gallium_pl111 = false
 with_gallium_radeonsi = false
 with_gallium_r300 = false
+with_gallium_r600 = false
 with_gallium_nouveau = false
 with_gallium_freedreno = false
 with_gallium_softpipe = false
@@ -119,6 +120,7 @@ if _drivers != ''
   with_gallium_pl111 = _split.contains('pl111')
   with_gallium_radeonsi = _split.contains('radeonsi')
   with_gallium_r300 = _split.contains('r300')
+  with_gallium_r600 = _split.contains('r600')
   with_gallium_nouveau = _split.contains('nouveau')
   with_gallium_freedreno = _split.contains('freedreno')
   with_gallium_softpipe = _split.contains('swrast')
@@ -630,9 +632,13 @@ dep_thread = dependency('threads')
 if dep_thread.found() and host_machine.system() == 'linux'
   pre_args += '-DHAVE_PTHREAD'
 endif
-dep_elf = dependency('libelf', required : false)
-if not dep_elf.found() and (with_amd_vk or with_gallium_radeonsi) # TODO: 
clover, r600
-  dep_elf = cc.find_library('elf')
+if with_amd_vk or with_gallium_radeonsi or with_gallium_r600 # TODO: clover
+  dep_elf = dependency('libelf', required : false)
+  if not dep_elf.found()
+dep_elf = cc.find_library('elf')
+  endif
+else
+  dep_elf = []
 endif
 dep_expat = dependency('expat')
 # this only exists on linux so either this is linux and it will be found, or
@@ -647,7 +653,8 @@ dep_libdrm_freedreno = []
 if with_amd_vk or with_gallium_radeonsi
   dep_libdrm_amdgpu = dependency('libdrm_amdgpu', version : '>= 2.4.86')
 endif
-if with_gallium_radeonsi or with_dri_r100 or with_dri_r200 or with_gallium_r300
+if (with_gallium_radeonsi or with_dri_r100 or with_dri_r200 or
+with_gallium_r300 or with_gallium_r600)
   dep_libdrm_radeon = dependency('libdrm_radeon', version : '>= 2.4.71')
 endif
 if with_gallium_nouveau or with_dri_nouveau
@@ -661,8 +668,11 @@ if with_gallium_freedreno
 endif
 
 llvm_modules = ['bitwriter', 'engine', 'mcdisassembler', 'mcjit']
-if with_amd_vk or with_gallium_radeonsi # TODO: r600
+if with_amd_vk or with_gallium_radeonsi or with_gallium_r600
   llvm_modules += ['amdgpu', 'bitreader', 'ipo']
+  if with_gallium_r600
+llvm_modules += 'asmparser'
+  endif
 endif
 dep_llvm = dependency(
   'llvm', version : '>= 3.9.0', required : with_amd_vk, modules : llvm_modules,
diff --git a/meson_options.txt b/meson_options.txt
index eca431edd95..2d21a10425f 100644
--- a/meson_options.txt
+++ b/meson_options.txt
@@ -46,7 +46,7 @@ option(
 option(
   'gallium-drivers',
   type : 'string',
-  value : 'pl111,radeonsi,nouveau,freedreno,swrast,vc4,etnaviv,imx,r300',
+  value : 'pl111,radeonsi,nouveau,freedreno,swrast,vc4,etnaviv,imx,r300,r600',
   description : 'comma separated list of gallium drivers to build.'
 )
 option(
diff --git a/src/gallium/drivers/r600/meson.build 
b/src/gallium/drivers/r600/meson.build
new file mode 100644
index 000..411b550331d
--- /dev/null
+++ b/src/gallium/drivers/r600/meson.build
@@ -0,0 +1,128 @@
+# Copyright © 2017 Intel Corporation
+
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+files_r600 = files(
+  'r600d_common.h',
+  'compute_memory_pool.c',
+  'compute_memory_pool.h',
+  'eg_asm.c',
+  'eg_debug.c',
+  'eg_sq.h',
+  'evergreen_compute.c',
+  'evergreen_compute.h',
+  'evergreen_compute_internal.h',
+  'evergreend.h',
+  'evergreen_hw_context.c',
+  'evergreen_state.c',
+  'r600_asm.c',
+  'r600_asm.h',
+  'r600_blit.c',

Re: [Mesa-dev] More gratitude for Meson

[Ilia Mirkin]

On Wed, Nov 1, 2017 at 6:49 PM, Chad Versace  wrote:
> On Wed 01 Nov 2017, Dylan Baker wrote:
>> Quoting Chad Versace (2017-11-01 14:43:28)
>> > Wow. 10 seconds from a clean checkout to an installed Vulkan driver.
>
>> Glad that it's working out for you guys!
>>
>> Can I convince you to wire the anvil and i965 android/arc++ bits? ;)
>>
>> JFYI, the meson build will (I consider it a bug if it doesn't) turn off all
>> glapi, egl, and glx if there are no dri or gallium drivers built unless you
>> force them on.
>
> Thanks for turning that stuff off. Last time I tried to build just
> Vulkan without GL (maybe 1.5 years ago), Autotools didn't allow it. It
> insisted that i965 was a build dependency for anvil.
>
>> It also avoids building the glsl compiler unless there's a driver
>> that uses it.
>
> I expected the buildtime to be much longer because I expected it to
> build the GLSL compiler too. I was surprised and happy to discover that
> it builds only the SPIR-V compiler.
>
>> And it defaults to debug, which might be surprising, but people
>> around here thought that default debug is a feature.
>
> Huh... For infrastructure projects like Mesa (as opposed to test
> projects like Piglit), I expect the default build to be the release
> build. But I can understand why others would want default=debug.

autotools defaults to debug disabled. I think that's how almost every
project does it... debug enabled is definitely a surprise.

  -ilia
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[Mesa-dev] [PATCH v2 4/4] i965/gen10: Implement Wa3DStateMode

[Anuj Phogat]

V2: Remove the bits enabling Float blend optimization. It is
enabled through CACHE_MODE_SS register.
Update the comment.

This workaround doesn't fix any of the piglit hangs we've seen
on CNL.

Cc: Nanley Chery 
Cc: Jason Ekstrand 
Signed-off-by: Anuj Phogat 
Reviewed-by: Rafael Antognolli 
---
 src/mesa/drivers/dri/i965/brw_defines.h  |  2 ++
 src/mesa/drivers/dri/i965/brw_state_upload.c | 12 
 2 files changed, 14 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
b/src/mesa/drivers/dri/i965/brw_defines.h
index 3008a1b8a7..1c2f06546e 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1333,6 +1333,8 @@ enum brw_pixel_shader_coverage_mask_mode {
 /* DW2: start address */
 /* DW3: end address. */
 
+#define _3DSTATE_3D_MODE 0x791e
+
 #define CMD_MI_FLUSH  0x0200
 
 # define BLT_X_SHIFT   0
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c 
b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 7df06a6e4d..76c137c90e 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -89,6 +89,18 @@ brw_upload_initial_gpu_state(struct brw_context *brw)
   brw_load_register_imm32(brw, GEN10_CACHE_MODE_SS,
   REG_MASK(GEN10_FLOAT_BLEND_OPTIMIZATION_ENABLE) |
   GEN10_FLOAT_BLEND_OPTIMIZATION_ENABLE);
+
+  /* From gen10 workaround table in h/w specs:
+   * "On 3DSTATE_3D_MODE, driver must always program bits 31:16 of DW1
+   *  a value of 0x"
+   *  This means that we end up setting the entire 3D_MODE state. Bits
+   *  in this register control things such as slice hashing and we want
+   *  the default values of zero at the moment.
+   */
+  BEGIN_BATCH(2);
+  OUT_BATCH(_3DSTATE_3D_MODE  << 16 | (2 - 2));
+  OUT_BATCH(0x << 16);
+  ADVANCE_BATCH();
}
 
if (devinfo->gen >= 8) {
-- 
2.13.5

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[Mesa-dev] [PATCH v2 3/4] i965/gen10: Enable float blend optimization

[Anuj Phogat]

This optimization is enabled for previous generations too.
See Mesa commit c17e214a6b
On CNL this bit has been moved to CACHE_MODE_SS register.

Cc: Nanley Chery 
Signed-off-by: Anuj Phogat 
---
 src/mesa/drivers/dri/i965/brw_defines.h  | 3 +++
 src/mesa/drivers/dri/i965/brw_state_upload.c | 6 ++
 2 files changed, 9 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
b/src/mesa/drivers/dri/i965/brw_defines.h
index 270cdf29db..3008a1b8a7 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1688,6 +1688,9 @@ enum brw_pixel_shader_coverage_mask_mode {
 # define GEN8_L3CNTLREG_ALL_ALLOC_SHIFT25
 # define GEN8_L3CNTLREG_ALL_ALLOC_MASK INTEL_MASK(31, 25)
 
+#define GEN10_CACHE_MODE_SS0x0e420
+# define GEN10_FLOAT_BLEND_OPTIMIZATION_ENABLE (1 << 4)
+
 #define INSTPM 0x20c0
 # define INSTPM_CONSTANT_BUFFER_ADDRESS_OFFSET_DISABLE (1 << 6)
 
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c 
b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 23e4ebda25..7df06a6e4d 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -85,6 +85,12 @@ brw_upload_initial_gpu_state(struct brw_context *brw)
   }
}
 
+   if (devinfo->gen == 10) {
+  brw_load_register_imm32(brw, GEN10_CACHE_MODE_SS,
+  REG_MASK(GEN10_FLOAT_BLEND_OPTIMIZATION_ENABLE) |
+  GEN10_FLOAT_BLEND_OPTIMIZATION_ENABLE);
+   }
+
if (devinfo->gen >= 8) {
   gen8_emit_3dstate_sample_pattern(brw);
 
-- 
2.13.5

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[Mesa-dev] [PATCH v2 2/4] i965/gen10: Implement WaForceRCPFEHangWorkaround

[Anuj Phogat]

V2: Add the check for Post Sync Operation.
Update the workaround comment.

This workaround doesn't fix any of the piglit hangs we've seen
on CNL. But it might be fixing something we haven't tested yet.

Cc: Nanley Chery 
Signed-off-by: Anuj Phogat 
Reviewed-by: Rafael Antognolli 
---
 src/mesa/drivers/dri/i965/brw_pipe_control.c | 21 +
 1 file changed, 21 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.c 
b/src/mesa/drivers/dri/i965/brw_pipe_control.c
index 6ebe1443d5..b1975ce533 100644
--- a/src/mesa/drivers/dri/i965/brw_pipe_control.c
+++ b/src/mesa/drivers/dri/i965/brw_pipe_control.c
@@ -89,6 +89,24 @@ gen7_cs_stall_every_four_pipe_controls(struct brw_context 
*brw, uint32_t flags)
return 0;
 }
 
+/* #1130 from gen10 workarounds page in h/w specs:
+ * "Enable Depth Stall on every Post Sync Op if Render target Cache Flush is
+ *  not enabled in same PIPE CONTROL and Enable Pixel score board stall if
+ *  Render target cache flush is enabled."
+ *
+ * Applicable to CNL B0 and C0 steppings only.
+ */
+static void
+gen10_add_rcpfe_workaround_bits(uint32_t *flags)
+{
+   if (*flags & PIPE_CONTROL_RENDER_TARGET_FLUSH)
+  *flags = *flags | PIPE_CONTROL_STALL_AT_SCOREBOARD;
+   else if ((*flags & PIPE_CONTROL_WRITE_IMMEDIATE) ||
+(*flags & PIPE_CONTROL_WRITE_DEPTH_COUNT) ||
+(*flags & PIPE_CONTROL_WRITE_TIMESTAMP))
+  *flags = *flags | PIPE_CONTROL_DEPTH_STALL;
+}
+
 static void
 brw_emit_pipe_control(struct brw_context *brw, uint32_t flags,
   struct brw_bo *bo, uint32_t offset, uint64_t imm)
@@ -109,6 +127,9 @@ brw_emit_pipe_control(struct brw_context *brw, uint32_t 
flags,
  brw_emit_pipe_control_flush(brw, 0);
   }
 
+  if (devinfo->gen == 10)
+ gen10_add_rcpfe_workaround_bits();
+
   BEGIN_BATCH(6);
   OUT_BATCH(_3DSTATE_PIPE_CONTROL | (6 - 2));
   OUT_BATCH(flags);
-- 
2.13.5

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Re: [Mesa-dev] More gratitude for Meson

[Chad Versace]

On Wed 01 Nov 2017, Dylan Baker wrote:
> Quoting Chad Versace (2017-11-01 14:43:28)
> > Wow. 10 seconds from a clean checkout to an installed Vulkan driver.

> Glad that it's working out for you guys!
> 
> Can I convince you to wire the anvil and i965 android/arc++ bits? ;)
> 
> JFYI, the meson build will (I consider it a bug if it doesn't) turn off all
> glapi, egl, and glx if there are no dri or gallium drivers built unless you
> force them on.

Thanks for turning that stuff off. Last time I tried to build just
Vulkan without GL (maybe 1.5 years ago), Autotools didn't allow it. It
insisted that i965 was a build dependency for anvil.

> It also avoids building the glsl compiler unless there's a driver
> that uses it.

I expected the buildtime to be much longer because I expected it to
build the GLSL compiler too. I was surprised and happy to discover that
it builds only the SPIR-V compiler.

> And it defaults to debug, which might be surprising, but people
> around here thought that default debug is a feature.

Huh... For infrastructure projects like Mesa (as opposed to test
projects like Piglit), I expect the default build to be the release
build. But I can understand why others would want default=debug.
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[Mesa-dev] [PATCH v2 1/4] i965/gen10: Implement WaSampleOffsetIZ workaround

[Anuj Phogat]

There are few other (duplicate) workarounds which have similar recommendations:
WaFlushHangWhenNonPipelineStateAndMarkerStalled
WaCSStallBefore3DSamplePattern
WaPipeControlBefore3DStateSamplePattern

WaPipeControlBefore3DStateSamplePattern has some extra recommendations if
driver is using mid batch context restore. Ignoring it for now because We're
not doing mid-batch context restore in Mesa.

This workaround doesn't fix any of the piglit hangs we've seen
on CNL. But it might be fixing something we haven't tested yet.

V2: Use brw_load_register_imm32() to program CACHE_MODE_0.
Get rid of brw_flush_gpu_caches().

Cc: Nanley Chery 
Signed-off-by: Anuj Phogat 
Reviewed-by: Rafael Antognolli 
---
 src/mesa/drivers/dri/i965/brw_context.h|  2 ++
 src/mesa/drivers/dri/i965/brw_defines.h|  1 +
 src/mesa/drivers/dri/i965/brw_pipe_control.c   | 41 ++
 src/mesa/drivers/dri/i965/gen8_multisample_state.c |  8 +
 4 files changed, 52 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
b/src/mesa/drivers/dri/i965/brw_context.h
index 0102f15424..1030b2b313 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1656,6 +1656,8 @@ void brw_emit_post_sync_nonzero_flush(struct brw_context 
*brw);
 void brw_emit_depth_stall_flushes(struct brw_context *brw);
 void gen7_emit_vs_workaround_flush(struct brw_context *brw);
 void gen7_emit_cs_stall_flush(struct brw_context *brw);
+void gen10_emit_wa_cs_stall_flush(struct brw_context *brw);
+void gen10_emit_wa_lri_to_cache_mode_zero(struct brw_context *brw);
 
 /* brw_queryformat.c */
 void brw_query_internal_format(struct gl_context *ctx, GLenum target,
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
b/src/mesa/drivers/dri/i965/brw_defines.h
index 4abb790612..270cdf29db 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1609,6 +1609,7 @@ enum brw_pixel_shader_coverage_mask_mode {
 #define GEN7_GPGPU_DISPATCHDIMY 0x2504
 #define GEN7_GPGPU_DISPATCHDIMZ 0x2508
 
+#define GEN7_CACHE_MODE_0   0x7000
 #define GEN7_CACHE_MODE_1   0x7004
 # define GEN9_FLOAT_BLEND_OPTIMIZATION_ENABLE (1 << 4)
 # define GEN8_HIZ_NP_PMA_FIX_ENABLE(1 << 11)
diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.c 
b/src/mesa/drivers/dri/i965/brw_pipe_control.c
index 460b8f73b6..6ebe1443d5 100644
--- a/src/mesa/drivers/dri/i965/brw_pipe_control.c
+++ b/src/mesa/drivers/dri/i965/brw_pipe_control.c
@@ -279,6 +279,47 @@ gen7_emit_cs_stall_flush(struct brw_context *brw)
 }
 
 /**
+ * From Gen10 Workarounds page in h/w specs:
+ * WaSampleOffsetIZ:
+ * Prior to the 3DSTATE_SAMPLE_PATTERN driver must ensure there are no
+ * markers in the pipeline by programming a PIPE_CONTROL with stall.
+ */
+void
+gen10_emit_wa_cs_stall_flush(struct brw_context *brw)
+{
+   const struct gen_device_info *devinfo = >screen->devinfo;
+   assert(devinfo->gen == 10);
+   brw_emit_pipe_control_flush(brw,
+   PIPE_CONTROL_CS_STALL |
+   PIPE_CONTROL_STALL_AT_SCOREBOARD);
+}
+
+/**
+ * From Gen10 Workarounds page in h/w specs:
+ * WaSampleOffsetIZ:
+ * When 3DSTATE_SAMPLE_PATTERN is programmed, driver must then issue an
+ * MI_LOAD_REGISTER_IMM command to an offset between 0x7000 and 0x7FFF(SVL)
+ * after the command to ensure the state has been delivered prior to any
+ * command causing a marker in the pipeline.
+ */
+void
+gen10_emit_wa_lri_to_cache_mode_zero(struct brw_context *brw)
+{
+   const struct gen_device_info *devinfo = >screen->devinfo;
+   assert(devinfo->gen == 10);
+
+   /* Before changing the value of CACHE_MODE_0 register, GFX pipeline must
+* be idle; i.e., full flush is required.
+*/
+   brw_emit_pipe_control_flush(brw,
+   PIPE_CONTROL_CACHE_FLUSH_BITS |
+   PIPE_CONTROL_CACHE_INVALIDATE_BITS);
+
+   /* Write to CACHE_MODE_0 (0x7000) */
+   brw_load_register_imm32(brw, GEN7_CACHE_MODE_0, 0);
+}
+
+/**
  * Emits a PIPE_CONTROL with a non-zero post-sync operation, for
  * implementing two workarounds on gen6.  From section 1.4.7.1
  * "PIPE_CONTROL" of the Sandy Bridge PRM volume 2 part 1:
diff --git a/src/mesa/drivers/dri/i965/gen8_multisample_state.c 
b/src/mesa/drivers/dri/i965/gen8_multisample_state.c
index 3afa586275..5235fc2cf9 100644
--- a/src/mesa/drivers/dri/i965/gen8_multisample_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_multisample_state.c
@@ -33,6 +33,11 @@
 void
 gen8_emit_3dstate_sample_pattern(struct brw_context *brw)
 {
+   const struct gen_device_info *devinfo = >screen->devinfo;
+
+   if (devinfo->gen == 10)
+  gen10_emit_wa_cs_stall_flush(brw);
+
BEGIN_BATCH(9);
OUT_BATCH(_3DSTATE_SAMPLE_PATTERN << 16 | (9 - 2));
 
@@ -52,4 +57,7 @@ 

Re: [Mesa-dev] [PATCH v3 28/43] anv/cmd_buffer: Add a padding to the vertex buffer

[Jason Ekstrand]

On Sun, Oct 15, 2017 at 3:28 AM, Pohjolainen, Topi <
topi.pohjolai...@gmail.com> wrote:

> On Thu, Oct 12, 2017 at 08:38:17PM +0200, Jose Maria Casanova Crespo wrote:
> > From: Alejandro Piñeiro 
> >
> > As we are using 32-bit surface formats with 16-bit elements we can be
> > on a situation where a vertex element can poke over the buffer by 2
> > bytes. To avoid that we add a padding when flushing the state.
> >
> > This is similar to what the i965 drivers prior to Haswell do, as they
> > use 4-component formats to fake 3-component formats, and add a padding
> > there too. See commit:
> >7c8dfa78b98a12c1c5f74d11433c8554d4c90657
> > ---
> >  src/intel/vulkan/genX_cmd_buffer.c | 20 ++--
> >  1 file changed, 18 insertions(+), 2 deletions(-)
> >
> > diff --git a/src/intel/vulkan/genX_cmd_buffer.c
> b/src/intel/vulkan/genX_cmd_buffer.c
> > index 43437c8eb0..f3ba0108f4 100644
> > --- a/src/intel/vulkan/genX_cmd_buffer.c
> > +++ b/src/intel/vulkan/genX_cmd_buffer.c
> > @@ -1958,6 +1958,11 @@ genX(cmd_buffer_flush_state)(struct
> anv_cmd_buffer *cmd_buffer)
> >  {
> > struct anv_pipeline *pipeline = cmd_buffer->state.pipeline;
> > uint32_t *p;
> > +#if GEN_GEN >= 8
> > +   const struct brw_vs_prog_data *vs_prog_data =
> get_vs_prog_data(pipeline);
> > +   const uint64_t half_inputs_read = vs_prog_data->half_inputs_read;
> > +   const uint32_t elements_half = half_inputs_read >>
> VERT_ATTRIB_GENERIC0;
> > +#endif
> >
> > uint32_t vb_emit = cmd_buffer->state.vb_dirty & pipeline->vb_used;
> >
> > @@ -1970,6 +1975,17 @@ genX(cmd_buffer_flush_state)(struct
> anv_cmd_buffer *cmd_buffer)
> > if (vb_emit) {
> >const uint32_t num_buffers = __builtin_popcount(vb_emit);
> >const uint32_t num_dwords = 1 + num_buffers * 4;
> > +  /* ISL 16-bit formats do a 16-bit to 32-bit float conversion, so
> we need
> > +   * to use ISL 32-bit formats to avoid such conversion in order to
> support
> > +   * properly 16-bit formats. This means that the vertex element
> may poke
> > +   * over the end of the buffer by 2 bytes.
> > +   */
> > +  const unsigned padding =
> > +#if GEN_GEN >= 8
> > + (elements_half > 0) * 2;
> > +#else
> > +  0;
> > +#endif
>

Why not just do

const unsigned padding = (elements_half && GEN_GEN >= 8) ? 2 : 0;


> >
> >p = anv_batch_emitn(_buffer->batch, num_dwords,
> >GENX(3DSTATE_VERTEX_BUFFERS));
> > @@ -1999,9 +2015,9 @@ genX(cmd_buffer_flush_state)(struct
> anv_cmd_buffer *cmd_buffer)
> >  .BufferStartingAddress = { buffer->bo, buffer->offset +
> offset },
> >
> >  #if GEN_GEN >= 8
> > -.BufferSize = buffer->size - offset
> > +.BufferSize = buffer->size - offset + padding,
>
> I can't help thinking that the padding should have been taken into account
> by the time of allocation of the vertex buffer and marked there into
> ::size.
> Also I'm thinking if offset needs a treatment as well. We use 32-bit
> formats
> adn therefore the offset needs to be 32-bit aligned, right? Or does that
> get
> guaranteed by something else (and therefore just add an assert here)?
>

I don't think alignment is an issue.  I'm pretty sure VF can fetch
unaligned without any problems.  What concerns me more is the interactions
with robustBufferAccess.  The Vulkan spec says:

   -

   Vertex input attributes are considered out of bounds if the address of
   the attribute plus the size of the attribute is greater than the size of
   the bound buffer. Further, if any vertex input attribute using a specific
   vertex input binding is out of bounds, then all vertex input attributes
   using that vertex input binding for that vertex shader invocation are
   considered out of bounds.
   -

  If a vertex input attribute is out of bounds, it will be assigned one
  of the following values:
  -

 Values from anywhere within the memory range(s) bound to the
 buffer, converted according to the format of the attribute.
 -

 Zero values, format converted according to the format of the
 attribute.
 -

 Zero values, or (0,0,0,x) vectors, as described above.

This is actually rather difficult to implement exactly with the current
scheme.  One option that I think would give us a technically correct
implementation would be to simply increase the size returned by
GetBufferMemoryRequirements for vertex buffers by 2 bytes.  Then the values
we read would be outside of the VkBuffer but would not be outside "the
memory range(s) bound to the buffer".  We could make this increase only if
robustBufferAccess is enabled which would probably be a good idea.

Other than the annoying robustBufferAccess problems, I think this looks
pretty good.


> Jason, any thoughts?
>
> >  #else
> > -.EndAddress = { buffer->bo, buffer->offset + buffer->size -
> 1},
> > +.EndAddress = { buffer->bo, 

Re: [Mesa-dev] [PATCH 2/3] mesa: enable ARB_texture_buffer_* extensions in the Compatibility profile

[Marek Olšák]

This should work (I added "FC" at the end):

MESA_GLSL_VERSION_OVERRIDE=460 MESA_GL_VERSION_OVERRIDE=4.6FC

Marek

On Wed, Nov 1, 2017 at 11:16 PM, Mark Janes  wrote:
> Mark Janes  writes:
>
>> Marek Olšák  writes:
>>
>>> Hi Mark,
>>>
>>> Can you try the attached patches instead?
>>
>> After talking with Ken and Dylan, I realize that I missed a one-line
>> patch from your thread with my last test (Oct 25 patch to
>> intel_extensions.c).  With that patch, there are no regressions in CI.
>>
>> I'm testing the attached patches as well.
>
> With the most recent patches, I'm unable to run the GL CTS 4.6:
>
> MESA_GLSL_VERSION_OVERRIDE=460 MESA_GL_VERSION_OVERRIDE=4.6 ./glcts 
> --deqp-runmode=xml-caselist
> Writing test log into TestResults.qpa
> dEQP Core git-d6144a989937b2829a9fc9813de994c4f514ebae (0xd6144a98) 
> starting..
>   target implementation = 'X11 EGL'
> Writing test cases from 'CTS-Configs' to file 'CTS-Configs-cases.xml'..
> Writing test cases from 'dEQP-EGL' to file 'dEQP-EGL-cases.xml'..
> Writing test cases from 'KHR-GLES2' to file 'KHR-GLES2-cases.xml'..
> Writing test cases from 'dEQP-GLES2' to file 'dEQP-GLES2-cases.xml'..
> Writing test cases from 'KHR-GLES3' to file 'KHR-GLES3-cases.xml'..
> Writing test cases from 'dEQP-GLES3' to file 'dEQP-GLES3-cases.xml'..
> Writing test cases from 'dEQP-GLES31' to file 'dEQP-GLES31-cases.xml'..
> Writing test cases from 'KHR-GLES31' to file 'KHR-GLES31-cases.xml'..
> Writing test cases from 'KHR-GLESEXT' to file 'KHR-GLESEXT-cases.xml'..
> Writing test cases from 'KHR-GLES32' to file 'KHR-GLES32-cases.xml'..
> Writing test cases from 'KHR-NoContext' to file 
> 'KHR-NoContext-cases.xml'..
> Writing test cases from 'KHR-GL30' to file 'KHR-GL30-cases.xml'..
> Writing test cases from 'KHR-GL31' to file 'KHR-GL31-cases.xml'..
> FATAL ERROR: Failed to initialize dEQP: Got EGL_BAD_MATCH: 
> eglCreateContext() at egluGLUtil.cpp:198
>
> piglit, deqp, and gles-cts encountered no regressions.
>
>>> Thanks,
>>> Marek
>>>
>>> On Wed, Nov 1, 2017 at 9:49 PM, Mark Janes  wrote:
 Dylan Baker  writes:

> I haven't run the CTS tests, but both the deqp and the piglit test pass 
> on my
> skl with Marek's patches applied.

 I must have tested with only the patch 2 applied.  Running with all
 three patches in the series, I see no piglit/deqp regressions.

 However, GLES CTS fails thousands of ES31-CTS.functional.texture tests,
 eg:

 ES31-CTS.functional.texture.format.buffer.rg8i_npot
 glGetIntegerv() failed: glGetError() returned GL_INVALID_ENUM at 
 gluContextInfo.cpp:229

 -Mark

>
> Dylan
>
> Quoting Marek Olšák (2017-10-31 18:16:51)
>> This is how I run piglit on i965:
>> WAFFLE_GBM_DEVICE=/dev/dri/renderD128 PIGLIT_PLATFORM=gbm 
>> piglit/bin/glinfo|head
>> GL_RENDERER = Mesa DRI Intel(R) Ivybridge Desktop
>>
>> Of course I have Radeon as my main GPU.
>>
>> Marek
>>
>> On Wed, Nov 1, 2017 at 12:52 AM, Mark Janes  
>> wrote:
>> > No, please don't.  We can't have thousands of failures added to CI.
>> >
>> > Dylan, can you double check this for Marek?  I'm surprised that it
>> > doesn't reproduce for him.
>> >
>> > -Mark
>> >
>> > Marek Olšák  writes:
>> >
>> >> I can't reproduce the issue on my IVB. How about I just push this and
>> >> you guys fix i965 when you have time?
>> >>
>> >> Marek
>> >>
>> >> On Thu, Oct 26, 2017 at 5:46 PM, Mark Janes  
>> >> wrote:
>> >>> That fixed many issues, but:
>> >>>
>> >>> On deqp EGL tests, we get:
>> >>>
>> >>> dEQP-EGL.functional.create_context_ext.gl_42.rgba_no_depth_no_stencil
>> >>> deqp-egl: main/api_exec.c:135: _mesa_initialize_exec_table: 
>> >>> Assertion `ctx->Version > 0' failed.
>> >>>
>> >>> On ES31 CTS tests:
>> >>> ES31-CTS.functional.texture.texture_buffer.render.as_vertex_array_as_vertex_texture_as_fragment_texture.range_size_513
>> >>> glGetIntegerv() failed: glGetError() returned GL_INVALID_ENUM at
>> >>> gluContextInfo.cpp:229
>> >>>
>> >>> on GL46 CTS (27 failures):
>> >>> src/mesa/main/teximage.c:595: _mesa_tex_target_is_layered: Assertion
>> >>> `!"Invalid texture target."' failed.
>> >>>
>> >>> Piglit fails 3.5k tests with the same `ctx->Version > 0' assertion as
>> >>> deqp-egl.
>> >>>
>> >>> -Mark
>> >>>
>> >>> Dylan Baker  writes:
>> >>>
>>  I've pushed it to our CI, I'll let you know tomorrow what it looks 
>>  like
>> 
>>  Dylan
>> 
>>  Quoting Marek Olšák (2017-10-25 19:52:43)
>> > Hi 

Re: [Mesa-dev] More gratitude for Meson

[Dylan Baker]

Quoting Chad Versace (2017-11-01 14:43:28)
> Wow. 10 seconds from a clean checkout to an installed Vulkan driver.
> 
> I don't know how qualify my surprise...
> 
> Wow.
> 
> The Intel Vulkan driver is often all I need, so I was tempted to
> investigate whether Meson allowed building and installing just anvil and
> nothing else. No OpenGL, no OpenGL ES, no EGL, no GLX,... just
> libvulkan_intel.so, the icd json, and the pkg-config files.
> 
> I benchmarked the time to configure, build, and install from a clean git
> checkout. I tested with vkcube.
> 
> $ tmpdir=$(mktemp -d --tmpdir mesa.)
> 
> $ time meson \
> --prefix="$tmpdir/prefix" \
> -Dbuildtype=debug \
> -Dvalgrind=true \
> -Dplatforms=x11,drm,wayland,surfaceless \
> -Ddri-drivers= \
> -Dvulkan-drivers=intel \
> -Dgallium-drivers= \
> -Dgles1=false \
> -Dgles2=false \
> -Dopengl=false \
> "$tmpdir/build"
> real0m4.970s
> user0m3.420s
> sys 0m1.100s
> 
> $ ninja -C /tmp/mesa.fnQzVfsc/build
> real0m5.080s
> user2m18.93s
> sys 0m18.330s
> 
> $ ninja -C /tmp/mesa.fnQzVfsc/build install
> real0m0.460s
> user0m0.36s
> sys 0m0.070s

Glad that it's working out for you guys!

Can I convince you to wire the anvil and i965 android/arc++ bits? ;)

JFYI, the meson build will (I consider it a bug if it doesn't) turn off all
glapi, egl, and glx if there are no dri or gallium drivers built unless you
force them on. It also avoids building the glsl compiler unless there's a driver
that uses it. And it defaults to debug, which might be surprising, but people
around here thought that default debug is a feature.

Dylan


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Re: [Mesa-dev] [PATCH 2/3] mesa: enable ARB_texture_buffer_* extensions in the Compatibility profile

[Mark Janes]

Mark Janes  writes:

> Marek Olšák  writes:
>
>> Hi Mark,
>>
>> Can you try the attached patches instead?
>
> After talking with Ken and Dylan, I realize that I missed a one-line
> patch from your thread with my last test (Oct 25 patch to
> intel_extensions.c).  With that patch, there are no regressions in CI.
>
> I'm testing the attached patches as well.

With the most recent patches, I'm unable to run the GL CTS 4.6:

MESA_GLSL_VERSION_OVERRIDE=460 MESA_GL_VERSION_OVERRIDE=4.6 ./glcts 
--deqp-runmode=xml-caselist
Writing test log into TestResults.qpa
dEQP Core git-d6144a989937b2829a9fc9813de994c4f514ebae (0xd6144a98) 
starting..
  target implementation = 'X11 EGL'
Writing test cases from 'CTS-Configs' to file 'CTS-Configs-cases.xml'..
Writing test cases from 'dEQP-EGL' to file 'dEQP-EGL-cases.xml'..
Writing test cases from 'KHR-GLES2' to file 'KHR-GLES2-cases.xml'..
Writing test cases from 'dEQP-GLES2' to file 'dEQP-GLES2-cases.xml'..
Writing test cases from 'KHR-GLES3' to file 'KHR-GLES3-cases.xml'..
Writing test cases from 'dEQP-GLES3' to file 'dEQP-GLES3-cases.xml'..
Writing test cases from 'dEQP-GLES31' to file 'dEQP-GLES31-cases.xml'..
Writing test cases from 'KHR-GLES31' to file 'KHR-GLES31-cases.xml'..
Writing test cases from 'KHR-GLESEXT' to file 'KHR-GLESEXT-cases.xml'..
Writing test cases from 'KHR-GLES32' to file 'KHR-GLES32-cases.xml'..
Writing test cases from 'KHR-NoContext' to file 'KHR-NoContext-cases.xml'..
Writing test cases from 'KHR-GL30' to file 'KHR-GL30-cases.xml'..
Writing test cases from 'KHR-GL31' to file 'KHR-GL31-cases.xml'..
FATAL ERROR: Failed to initialize dEQP: Got EGL_BAD_MATCH: 
eglCreateContext() at egluGLUtil.cpp:198

piglit, deqp, and gles-cts encountered no regressions.

>> Thanks,
>> Marek
>>
>> On Wed, Nov 1, 2017 at 9:49 PM, Mark Janes  wrote:
>>> Dylan Baker  writes:
>>>
 I haven't run the CTS tests, but both the deqp and the piglit test pass on 
 my
 skl with Marek's patches applied.
>>>
>>> I must have tested with only the patch 2 applied.  Running with all
>>> three patches in the series, I see no piglit/deqp regressions.
>>>
>>> However, GLES CTS fails thousands of ES31-CTS.functional.texture tests,
>>> eg:
>>>
>>> ES31-CTS.functional.texture.format.buffer.rg8i_npot
>>> glGetIntegerv() failed: glGetError() returned GL_INVALID_ENUM at 
>>> gluContextInfo.cpp:229
>>>
>>> -Mark
>>>

 Dylan

 Quoting Marek Olšák (2017-10-31 18:16:51)
> This is how I run piglit on i965:
> WAFFLE_GBM_DEVICE=/dev/dri/renderD128 PIGLIT_PLATFORM=gbm 
> piglit/bin/glinfo|head
> GL_RENDERER = Mesa DRI Intel(R) Ivybridge Desktop
>
> Of course I have Radeon as my main GPU.
>
> Marek
>
> On Wed, Nov 1, 2017 at 12:52 AM, Mark Janes  
> wrote:
> > No, please don't.  We can't have thousands of failures added to CI.
> >
> > Dylan, can you double check this for Marek?  I'm surprised that it
> > doesn't reproduce for him.
> >
> > -Mark
> >
> > Marek Olšák  writes:
> >
> >> I can't reproduce the issue on my IVB. How about I just push this and
> >> you guys fix i965 when you have time?
> >>
> >> Marek
> >>
> >> On Thu, Oct 26, 2017 at 5:46 PM, Mark Janes  
> >> wrote:
> >>> That fixed many issues, but:
> >>>
> >>> On deqp EGL tests, we get:
> >>>
> >>> dEQP-EGL.functional.create_context_ext.gl_42.rgba_no_depth_no_stencil
> >>> deqp-egl: main/api_exec.c:135: _mesa_initialize_exec_table: Assertion 
> >>> `ctx->Version > 0' failed.
> >>>
> >>> On ES31 CTS tests:
> >>> ES31-CTS.functional.texture.texture_buffer.render.as_vertex_array_as_vertex_texture_as_fragment_texture.range_size_513
> >>> glGetIntegerv() failed: glGetError() returned GL_INVALID_ENUM at
> >>> gluContextInfo.cpp:229
> >>>
> >>> on GL46 CTS (27 failures):
> >>> src/mesa/main/teximage.c:595: _mesa_tex_target_is_layered: Assertion
> >>> `!"Invalid texture target."' failed.
> >>>
> >>> Piglit fails 3.5k tests with the same `ctx->Version > 0' assertion as
> >>> deqp-egl.
> >>>
> >>> -Mark
> >>>
> >>> Dylan Baker  writes:
> >>>
>  I've pushed it to our CI, I'll let you know tomorrow what it looks 
>  like
> 
>  Dylan
> 
>  Quoting Marek Olšák (2017-10-25 19:52:43)
> > Hi Dylan,
> >
> > Can you please add this and re-test?
> >
> > diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c 
> > b/src/mesa/drivers/
> > dri/i965/intel_extensions.c
> > index 21cf632..4d17393 100644
> > --- a/src/mesa/drivers/dri/i965/intel_extensions.c
> > +++ 

Re: [Mesa-dev] [PATCH 33/33] intel: add aubinator ui

[Scott D Phillips]

Dylan Baker  writes:

> Quoting Lionel Landwerlin (2017-11-01 14:25:03)
>> On 01/11/17 20:30, Dylan Baker wrote:
>> > Quoting Scott D Phillips (2017-11-01 10:30:09)
>> >> Lionel Landwerlin  writes:
>> >>
>> >>> On 31/10/17 21:11, Scott D Phillips wrote:
>> > +}
>>  [snip imgui]
>> 
>>  imgui seems to be the first instance of someone pasting a sizeable third
>>  party library into the repo.  I'm not sure how everyone feels about
>>  that. Unfortunately it seems like imgui isn't packaged by any distros
>>  that I can see either.
>> 
>>  Maybe we could do some meson wrap magic or something to pull it in
>>  without having to commit the code.
>> 
>> >>> Copying seems to be the main way anybody is using it. Are you suggesting
>> >>> a submodule?
>> >> Right, something like making a 'wrap' for imgui that can go download and
>> >> build the source:
>> >>
>> >> http://mesonbuild.com/Wrap-dependency-system-manual.html
>> >>
>> >> Really no idea if this is a great or terrible idea though. Dylan might
>> >> have a better idea.
>> >>
>> >>> ___
>> >>> mesa-dev mailing list
>> >>> mesa-dev@lists.freedesktop.org
>> >>> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>> > I'm really not thrilled with the idea of pulling such a large fast moving
>> > project into the tree either, though there is president, we have gtest in 
>> > tree
>> > already.
>> >
>> > A wrap might be a good way to build it it, especially for an optional tool 
>> > that
>> > distros aren't expected to package. I wonder if upstream would take a 
>> > meson build
>> > specifically for this purpose? Would you like me to follow up with them 
>> > and see
>> > if that would be an option (meson feels [rightly] that it's preferable to 
>> > try to
>> > get a meson build into the upstream project before adding it to wrapdb)?
>> >
>> > Dylan
>> 
>> I'll ask but it seems the ImGui project is really not meant to be 
>> packaged like most software we find in Linux distros.
>> There are a few glue example to work on various versions window systems 
>> and OpenGL/Vulkan, but these are just meant as examples.
>> It's expected whoever uses it will embedded it in its project and tweak 
>> the few things it needs (either event plumbing or adding new 
>> colors-scheme/widgets).
>> 
>> In our case, I wrote the Gtk3 backend, I'm pretty sure there is little 
>> interest in having it upstream.
>> 
>> -
>> Lionel
>
> At least I'm not concerned with having the gtk backend in tree, I'm concerned
> with vendoring the upstream project in tree. I'm pretty much convinced that
> vendoring is always a bad idea.
>
> I do have a working meson wrap for imgui, it's 40 lines of meson with an MIT
> copyright header, and only provides a static library for the cpp files and an
> include directive for the h files, you can see it here:
>
> https://github.com/dcbaker/imgui wip/meson-wrap
>
> If upstream isn't interested in it, we could get into meson's wrap-db, 
> although
> that doesn't solve the problem that it needs to be built with autotools for 
> the
> forseeable future.

For a driver-developer-only tool that's not built by default, I don't
see the harm in leaving it out of autotools. It's not like it's there
with autotools today anyway.

> Dylan
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Re: [Mesa-dev] [PATCH 33/33] intel: add aubinator ui

[Dylan Baker]

Quoting Lionel Landwerlin (2017-11-01 14:25:03)
> On 01/11/17 20:30, Dylan Baker wrote:
> > Quoting Scott D Phillips (2017-11-01 10:30:09)
> >> Lionel Landwerlin  writes:
> >>
> >>> On 31/10/17 21:11, Scott D Phillips wrote:
> > +}
>  [snip imgui]
> 
>  imgui seems to be the first instance of someone pasting a sizeable third
>  party library into the repo.  I'm not sure how everyone feels about
>  that. Unfortunately it seems like imgui isn't packaged by any distros
>  that I can see either.
> 
>  Maybe we could do some meson wrap magic or something to pull it in
>  without having to commit the code.
> 
> >>> Copying seems to be the main way anybody is using it. Are you suggesting
> >>> a submodule?
> >> Right, something like making a 'wrap' for imgui that can go download and
> >> build the source:
> >>
> >> http://mesonbuild.com/Wrap-dependency-system-manual.html
> >>
> >> Really no idea if this is a great or terrible idea though. Dylan might
> >> have a better idea.
> >>
> >>> ___
> >>> mesa-dev mailing list
> >>> mesa-dev@lists.freedesktop.org
> >>> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> > I'm really not thrilled with the idea of pulling such a large fast moving
> > project into the tree either, though there is president, we have gtest in 
> > tree
> > already.
> >
> > A wrap might be a good way to build it it, especially for an optional tool 
> > that
> > distros aren't expected to package. I wonder if upstream would take a meson 
> > build
> > specifically for this purpose? Would you like me to follow up with them and 
> > see
> > if that would be an option (meson feels [rightly] that it's preferable to 
> > try to
> > get a meson build into the upstream project before adding it to wrapdb)?
> >
> > Dylan
> 
> I'll ask but it seems the ImGui project is really not meant to be 
> packaged like most software we find in Linux distros.
> There are a few glue example to work on various versions window systems 
> and OpenGL/Vulkan, but these are just meant as examples.
> It's expected whoever uses it will embedded it in its project and tweak 
> the few things it needs (either event plumbing or adding new 
> colors-scheme/widgets).
> 
> In our case, I wrote the Gtk3 backend, I'm pretty sure there is little 
> interest in having it upstream.
> 
> -
> Lionel

At least I'm not concerned with having the gtk backend in tree, I'm concerned
with vendoring the upstream project in tree. I'm pretty much convinced that
vendoring is always a bad idea.

I do have a working meson wrap for imgui, it's 40 lines of meson with an MIT
copyright header, and only provides a static library for the cpp files and an
include directive for the h files, you can see it here:

https://github.com/dcbaker/imgui wip/meson-wrap

If upstream isn't interested in it, we could get into meson's wrap-db, although
that doesn't solve the problem that it needs to be built with autotools for the
forseeable future.

Dylan


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Re: [Mesa-dev] [PATCH 2/3] mesa: enable ARB_texture_buffer_* extensions in the Compatibility profile

[Mark Janes]

Marek Olšák  writes:

> Hi Mark,
>
> Can you try the attached patches instead?

After talking with Ken and Dylan, I realize that I missed a one-line
patch from your thread with my last test (Oct 25 patch to
intel_extensions.c).  With that patch, there are no regressions in CI.

I'm testing the attached patches as well.

> Thanks,
> Marek
>
> On Wed, Nov 1, 2017 at 9:49 PM, Mark Janes  wrote:
>> Dylan Baker  writes:
>>
>>> I haven't run the CTS tests, but both the deqp and the piglit test pass on 
>>> my
>>> skl with Marek's patches applied.
>>
>> I must have tested with only the patch 2 applied.  Running with all
>> three patches in the series, I see no piglit/deqp regressions.
>>
>> However, GLES CTS fails thousands of ES31-CTS.functional.texture tests,
>> eg:
>>
>> ES31-CTS.functional.texture.format.buffer.rg8i_npot
>> glGetIntegerv() failed: glGetError() returned GL_INVALID_ENUM at 
>> gluContextInfo.cpp:229
>>
>> -Mark
>>
>>>
>>> Dylan
>>>
>>> Quoting Marek Olšák (2017-10-31 18:16:51)
 This is how I run piglit on i965:
 WAFFLE_GBM_DEVICE=/dev/dri/renderD128 PIGLIT_PLATFORM=gbm 
 piglit/bin/glinfo|head
 GL_RENDERER = Mesa DRI Intel(R) Ivybridge Desktop

 Of course I have Radeon as my main GPU.

 Marek

 On Wed, Nov 1, 2017 at 12:52 AM, Mark Janes  wrote:
 > No, please don't.  We can't have thousands of failures added to CI.
 >
 > Dylan, can you double check this for Marek?  I'm surprised that it
 > doesn't reproduce for him.
 >
 > -Mark
 >
 > Marek Olšák  writes:
 >
 >> I can't reproduce the issue on my IVB. How about I just push this and
 >> you guys fix i965 when you have time?
 >>
 >> Marek
 >>
 >> On Thu, Oct 26, 2017 at 5:46 PM, Mark Janes  
 >> wrote:
 >>> That fixed many issues, but:
 >>>
 >>> On deqp EGL tests, we get:
 >>>
 >>> dEQP-EGL.functional.create_context_ext.gl_42.rgba_no_depth_no_stencil
 >>> deqp-egl: main/api_exec.c:135: _mesa_initialize_exec_table: Assertion 
 >>> `ctx->Version > 0' failed.
 >>>
 >>> On ES31 CTS tests:
 >>> ES31-CTS.functional.texture.texture_buffer.render.as_vertex_array_as_vertex_texture_as_fragment_texture.range_size_513
 >>> glGetIntegerv() failed: glGetError() returned GL_INVALID_ENUM at
 >>> gluContextInfo.cpp:229
 >>>
 >>> on GL46 CTS (27 failures):
 >>> src/mesa/main/teximage.c:595: _mesa_tex_target_is_layered: Assertion
 >>> `!"Invalid texture target."' failed.
 >>>
 >>> Piglit fails 3.5k tests with the same `ctx->Version > 0' assertion as
 >>> deqp-egl.
 >>>
 >>> -Mark
 >>>
 >>> Dylan Baker  writes:
 >>>
  I've pushed it to our CI, I'll let you know tomorrow what it looks 
  like
 
  Dylan
 
  Quoting Marek Olšák (2017-10-25 19:52:43)
 > Hi Dylan,
 >
 > Can you please add this and re-test?
 >
 > diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c 
 > b/src/mesa/drivers/
 > dri/i965/intel_extensions.c
 > index 21cf632..4d17393 100644
 > --- a/src/mesa/drivers/dri/i965/intel_extensions.c
 > +++ b/src/mesa/drivers/dri/i965/intel_extensions.c
 > @@ -178,7 +178,7 @@ intelInitExtensions(struct gl_context *ctx)
 >ctx->Extensions.ARB_pipeline_statistics_query = true;
 >ctx->Extensions.ARB_sample_shading = true;
 >ctx->Extensions.ARB_shading_language_420pack = true;
 > -  if (ctx->API == API_OPENGL_CORE) {
 > +  if (ctx->API != API_OPENGL_COMPAT) {
 >   ctx->Extensions.ARB_texture_buffer_object = true;
 >   ctx->Extensions.ARB_texture_buffer_object_rgb32 = true;
 >   ctx->Extensions.ARB_texture_buffer_range = true;
 >
 >
 > Marek
 >
 > On Wed, Oct 25, 2017 at 11:42 PM, Dylan Baker 
 >  wrote:
 >
 > There are a significant number of i965 regressions from
 > d96c68146a781c79a23f5181d7050174f1070d90, largely related to 
 > texturing (I
 > can
 > send you a complete list of regressions if you care, but due to 
 > the large
 > number
 > of them I suspect it's something fairly simple).
 >
 > For example:
 > ES31-CTS.functional.texture.format.buffer.r32ui_npot
 >
 > glGetIntegerv() failed: glGetError() returned GL_INVALID_ENUM at
 > gluContextInfo.cpp:229
 >
 > dEQP-GLES31.functional.state_query.integer.texture_buffer_
 > binding_getinteger:
 >
 > 

[Mesa-dev] More gratitude for Meson

[Chad Versace]

Wow. 10 seconds from a clean checkout to an installed Vulkan driver.

I don't know how qualify my surprise...

Wow.

The Intel Vulkan driver is often all I need, so I was tempted to
investigate whether Meson allowed building and installing just anvil and
nothing else. No OpenGL, no OpenGL ES, no EGL, no GLX,... just
libvulkan_intel.so, the icd json, and the pkg-config files.

I benchmarked the time to configure, build, and install from a clean git
checkout. I tested with vkcube.

$ tmpdir=$(mktemp -d --tmpdir mesa.)

$ time meson \
--prefix="$tmpdir/prefix" \
-Dbuildtype=debug \
-Dvalgrind=true \
-Dplatforms=x11,drm,wayland,surfaceless \
-Ddri-drivers= \
-Dvulkan-drivers=intel \
-Dgallium-drivers= \
-Dgles1=false \
-Dgles2=false \
-Dopengl=false \
"$tmpdir/build"
real0m4.970s
user0m3.420s
sys 0m1.100s

$ ninja -C /tmp/mesa.fnQzVfsc/build
real0m5.080s
user2m18.93s
sys 0m18.330s

$ ninja -C /tmp/mesa.fnQzVfsc/build install
real0m0.460s
user0m0.36s
sys 0m0.070s
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Re: [Mesa-dev] [PATCH v3 27/43] anv/pipeline: Use 32-bit surface formats for 16-bit formats (v2)

[Jason Ekstrand]

On Tue, Oct 24, 2017 at 4:49 AM, Jose Maria Casanova Crespo <
jmcasan...@igalia.com> wrote:

> From: Alejandro Piñeiro 
>
> From Vulkan 1.0.50 spec, Section 3.30.1. Format Definition:
> VK_FORMAT_R16G16_SFLOAT
>
> A two-component, 32-bit signed floating-point format that has a
> 16-bit R component in bytes 0..1, and a 16-bit G component in
> bytes 2..3.
>
> So this format expects those 16-bit floats to be passed without any
> conversion (applies too using 2/3/4 components, and with int formats)
>

I don't think this assertion is really accurate.  The assumption on vertex
data and other inputs has always been that they will get up-converted.  The
16-bit storage extension provides a mechanism to get them more directly and
efficiently, however.


> But from skl PRM, vol 07, section FormatConversion, page 445 there is
> a table that points that *16*FLOAT formats are converted to FLOAT,
> that in that context, is a 32-bit float. This is similar to the
> *64*FLOAT formats, that converts 64-bit floats to 32-bit floats.
>
> Unfortunately, while with 64-bit floats we have the alternative to use
> *64*PASSTHRU formats, it is not the case with 16-bits.
>
> This issue happens too with 16-bit int surface formats.
>
> As a workaround, if we are using a 16-bit location at the shader, we
> use 32-bit formats to avoid the conversion, and will fix getting the
> proper content later. Note that as we are using 32-bit formats, we
> can use formats with less components (example: use *R32* for *R16G16*).
>
> Signed-off-by: Jose Maria Casanova Crespo 
> Signed-off-by: Alejandro Piñeiro 
>
> v2: Always use UINT surface format variants. (Topi Pohjolainen)
> ---
>  src/intel/vulkan/genX_pipeline.c | 34 ++
>  1 file changed, 34 insertions(+)
>
> diff --git a/src/intel/vulkan/genX_pipeline.c
> b/src/intel/vulkan/genX_pipeline.c
> index c2fa9c0ff7..7c5c6df7e0 100644
> --- a/src/intel/vulkan/genX_pipeline.c
> +++ b/src/intel/vulkan/genX_pipeline.c
> @@ -83,6 +83,31 @@ vertex_element_comp_control(enum isl_format format,
> unsigned comp)
> }
>  }
>
> +#if GEN_GEN >= 8
> +static enum isl_format
> +adjust_16bit_format(enum isl_format format)
> +{
> +   switch(format) {
> +   case ISL_FORMAT_R16_UINT:
> +   case ISL_FORMAT_R16_SINT:
> +   case ISL_FORMAT_R16_FLOAT:
> +   case ISL_FORMAT_R16G16_UINT:
> +   case ISL_FORMAT_R16G16_SINT:
> +   case ISL_FORMAT_R16G16_FLOAT:
> +  return ISL_FORMAT_R32_UINT;
> +   case ISL_FORMAT_R16G16B16_UINT:
> +   case ISL_FORMAT_R16G16B16_SINT:
> +   case ISL_FORMAT_R16G16B16_FLOAT:
> +   case ISL_FORMAT_R16G16B16A16_UINT:
> +   case ISL_FORMAT_R16G16B16A16_SINT:
> +   case ISL_FORMAT_R16G16B16A16_FLOAT:
> +  return ISL_FORMAT_R32G32_UINT;
> +   default:
> +  return format;
> +   }
> +}
> +#endif
> +
>  static void
>  emit_vertex_input(struct anv_pipeline *pipeline,
>const VkPipelineVertexInputStateCreateInfo *info)
> @@ -95,6 +120,10 @@ emit_vertex_input(struct anv_pipeline *pipeline,
> assert((inputs_read & ((1 << VERT_ATTRIB_GENERIC0) - 1)) == 0);
> const uint32_t elements = inputs_read >> VERT_ATTRIB_GENERIC0;
> const uint32_t elements_double = double_inputs_read >>
> VERT_ATTRIB_GENERIC0;
> +#if GEN_GEN >= 8
> +   const uint64_t half_inputs_read = vs_prog_data->half_inputs_read;
> +   const uint32_t elements_half = half_inputs_read >>
> VERT_ATTRIB_GENERIC0;
> +#endif
> const bool needs_svgs_elem = vs_prog_data->uses_vertexid ||
>  vs_prog_data->uses_instanceid ||
>  vs_prog_data->uses_basevertex ||
> @@ -125,6 +154,11 @@ emit_vertex_input(struct anv_pipeline *pipeline,
>
>  VK_IMAGE_ASPECT_COLOR_BIT,
>VK_IMAGE_TILING_LINEAR);
>
> +#if GEN_GEN >= 8
> +  if ((elements_half & (1 << desc->location)) != 0) {
> + format = adjust_16bit_format(format);
> +  }
> +#endif
>assert(desc->binding < MAX_VBS);
>
>if ((elements & (1 << desc->location)) == 0)
> --
> 2.13.6
>
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Re: [Mesa-dev] [PATCH 33/33] intel: add aubinator ui

[Kristian Høgsberg]

On Wed, Nov 1, 2017 at 2:25 PM, Lionel Landwerlin
 wrote:
> On 01/11/17 20:30, Dylan Baker wrote:
>>
>> Quoting Scott D Phillips (2017-11-01 10:30:09)
>>>
>>> Lionel Landwerlin  writes:
>>>
 On 31/10/17 21:11, Scott D Phillips wrote:
>>
>> +}
>
> [snip imgui]
>
> imgui seems to be the first instance of someone pasting a sizeable
> third
> party library into the repo.  I'm not sure how everyone feels about
> that. Unfortunately it seems like imgui isn't packaged by any distros
> that I can see either.
>
> Maybe we could do some meson wrap magic or something to pull it in
> without having to commit the code.
>
 Copying seems to be the main way anybody is using it. Are you suggesting
 a submodule?
>>>
>>> Right, something like making a 'wrap' for imgui that can go download and
>>> build the source:
>>>
>>> http://mesonbuild.com/Wrap-dependency-system-manual.html
>>>
>>> Really no idea if this is a great or terrible idea though. Dylan might
>>> have a better idea.
>>>
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>>
>> I'm really not thrilled with the idea of pulling such a large fast moving
>> project into the tree either, though there is president, we have gtest in
>> tree
>> already.
>>
>> A wrap might be a good way to build it it, especially for an optional tool
>> that
>> distros aren't expected to package. I wonder if upstream would take a
>> meson build
>> specifically for this purpose? Would you like me to follow up with them
>> and see
>> if that would be an option (meson feels [rightly] that it's preferable to
>> try to
>> get a meson build into the upstream project before adding it to wrapdb)?
>>
>> Dylan
>
>
> I'll ask but it seems the ImGui project is really not meant to be packaged
> like most software we find in Linux distros.
> There are a few glue example to work on various versions window systems and
> OpenGL/Vulkan, but these are just meant as examples.
> It's expected whoever uses it will embedded it in its project and tweak the
> few things it needs (either event plumbing or adding new
> colors-scheme/widgets).

Also, let me add that the fact that the upstream project moves fast
isn't a problem here. The usage model for Imgui is that you include a
snapshot in repo your that has the features you need and write the ui
you need with that. There's no need to update that snapshot at any
time, except if you decide you need a new feature or fixes from
upstream.

Kristian

> In our case, I wrote the Gtk3 backend, I'm pretty sure there is little
> interest in having it upstream.
>
> -
> Lionel
>
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Re: [Mesa-dev] [PATCH] i965: Disable L3 cache allocation for external buffers

[Ville Syrjälä]

On Wed, Nov 01, 2017 at 04:24:21PM +0100, Daniel Vetter wrote:
> On Tue, Oct 24, 2017 at 05:06:33PM +0100, Chris Wilson wrote:
> > Through the use of mocs, we can define the cache usage for any surface
> > used by the GPU. In particular, we can request that L3 cache be
> > allocated for either a read/write miss so that subsequent reads can be
> > fetched from cache rather than memory. A consequence of this is that if
> > we allocate a L3/LLC cacheline for a read and the object is changed in
> > main memory (e.g. a PCIe write bypassing the CPU) then the next read
> > will be serviced from the stale cache and not from the new data in
> > memory. This is an issue for external PRIME buffers where we may miss
> > the updates entirely if the image is small enough to fit within our
> > cache.
> > 
> > Currently, we have a single bit to mark all external buffers so use that
> > to tell us when it is unsafe to use a cache override in mocs and
> > fallback to the PTE value instead (which should be set to the correct
> > cache level to be coherent amongst all active parties: PRIME, scanout and
> > render). This may be refined in future to limit the override to buffers
> > outside the control of mesa; as buffers being shared between mesa
> > clients should be able to coordinate themselves without resolves.
> > 
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101691
> > Cc: Kenneth Graunke 
> > Cc: Jason Ekstrand 
> > Cc: Lyude Paul 
> > Cc: Timo Aalton 
> > Cc: Ben Widawsky 
> > Cc: Daniel Vetter 
> > ---
> >  src/intel/blorp/blorp.c  |  1 +
> >  src/intel/blorp/blorp.h  |  1 +
> >  src/intel/blorp/blorp_genX_exec.h|  2 +-
> >  src/intel/blorp/blorp_priv.h |  1 +
> >  src/mesa/drivers/dri/i965/brw_blorp.c|  1 +
> >  src/mesa/drivers/dri/i965/brw_state.h|  3 ++-
> >  src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 16 +++-
> >  7 files changed, 18 insertions(+), 7 deletions(-)
> > 
> > diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c
> > index 7cc6335f2f..459ad66652 100644
> > --- a/src/intel/blorp/blorp.c
> > +++ b/src/intel/blorp/blorp.c
> > @@ -71,6 +71,7 @@ brw_blorp_surface_info_init(struct blorp_context *blorp,
> > surf->surf->logical_level0_px.array_len));
> >  
> > info->enabled = true;
> > +   info->external = surf->external;
> >  
> > if (format == ISL_FORMAT_UNSUPPORTED)
> >format = surf->surf->format;
> > diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h
> > index 9716c66302..af056c9d52 100644
> > --- a/src/intel/blorp/blorp.h
> > +++ b/src/intel/blorp/blorp.h
> > @@ -106,6 +106,7 @@ struct blorp_surf
> > enum isl_aux_usage aux_usage;
> >  
> > union isl_color_value clear_color;
> > +   bool external;
> >  };
> >  
> >  void
> > diff --git a/src/intel/blorp/blorp_genX_exec.h 
> > b/src/intel/blorp/blorp_genX_exec.h
> > index 5389262098..18715788ff 100644
> > --- a/src/intel/blorp/blorp_genX_exec.h
> > +++ b/src/intel/blorp/blorp_genX_exec.h
> > @@ -1328,7 +1328,7 @@ blorp_emit_surface_states(struct blorp_batch *batch,
> >   blorp_emit_surface_state(batch, >src,
> >surface_maps[BLORP_TEXTURE_BT_INDEX],
> >surface_offsets[BLORP_TEXTURE_BT_INDEX],
> > -  NULL, false);
> > +  NULL, params->src.external);
> >}
> > }
> >  
> > diff --git a/src/intel/blorp/blorp_priv.h b/src/intel/blorp/blorp_priv.h
> > index c7d5d308da..f841aa7cdc 100644
> > --- a/src/intel/blorp/blorp_priv.h
> > +++ b/src/intel/blorp/blorp_priv.h
> > @@ -47,6 +47,7 @@ enum {
> >  struct brw_blorp_surface_info
> >  {
> > bool enabled;
> > +   bool external;
> >  
> > struct isl_surf surf;
> > struct blorp_address addr;
> > diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c 
> > b/src/mesa/drivers/dri/i965/brw_blorp.c
> > index ed4f9870f2..563d13a037 100644
> > --- a/src/mesa/drivers/dri/i965/brw_blorp.c
> > +++ b/src/mesa/drivers/dri/i965/brw_blorp.c
> > @@ -160,6 +160,7 @@ blorp_surf_for_miptree(struct brw_context *brw,
> >.offset = mt->offset,
> >.reloc_flags = is_render_target ? EXEC_OBJECT_WRITE : 0,
> > };
> > +   surf->external = mt->bo->external;
> >  
> > surf->aux_usage = aux_usage;
> >  
> > diff --git a/src/mesa/drivers/dri/i965/brw_state.h 
> > b/src/mesa/drivers/dri/i965/brw_state.h
> > index 8db354cf23..01c0cd12cb 100644
> > --- a/src/mesa/drivers/dri/i965/brw_state.h
> > +++ b/src/mesa/drivers/dri/i965/brw_state.h
> > @@ -342,6 +342,7 @@ void gen10_init_atoms(struct brw_context *brw);
> >   * may still respect that.
> >   */
> >  #define GEN7_MOCS_L31
> > +#define GEN7_MOCS_PTE  

Re: [Mesa-dev] [PATCH v3 43/43] anv: Enable VK_KHR_16bit_storage

[Jason Ekstrand]

On Thu, Oct 12, 2017 at 11:38 AM, Jose Maria Casanova Crespo <
jmcasan...@igalia.com> wrote:

> From: Alejandro Piñeiro 
>
> It uses VK_KHR_get_physical_device_properties2 functionality to expose
> if the extension is supported or not.
>
> v2: update due rebase against master (Alejandro)
>
> Signed-off-by: Jose Maria Casanova Crespo 
> Signed-off-by: Alejandro Piñeiro  ---
>  src/intel/vulkan/anv_device.c  | 13 +
>  src/intel/vulkan/anv_extensions.py |  1 +
>  2 files changed, 14 insertions(+)
>
> diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
> index 70db6f88be..44be45d37c 100644
> --- a/src/intel/vulkan/anv_device.c
> +++ b/src/intel/vulkan/anv_device.c
> @@ -710,6 +710,19 @@ void anv_GetPhysicalDeviceFeatures2KHR(
>   break;
>}
>
> +  case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_16BIT_STORAGE_FEATURES_KHR:
> {
> + ANV_FROM_HANDLE(anv_physical_device, pdevice, physicalDevice);
> +
> + VkPhysicalDevice16BitStorageFeaturesKHR *features =
> +(VkPhysicalDevice16BitStorageFeaturesKHR *)ext;
> +
> + features->storageBuffer16BitAccess = pdevice->info.gen >= 8;
> + features->uniformAndStorageBuffer16BitAccess =
> pdevice->info.gen >= 8;
> + features->storagePushConstant16 = pdevice->info.gen >= 8;
> + features->storageInputOutput16 = pdevice->info.gen >= 8;
>

Would you mind breaking this patch up and moving it up in the series a
bit?  In particular, can we enable SSBO and UBO 16-bit storage early and
enable push constants and inputs/outputs later on.  From my reading of
things, I think UBO and SSBO 16-bit storage is pretty close to ready but
the others may take more review (I haven't read the input/output bits much
yet).


> + break;
> +  }
> +
>default:
>   anv_debug_ignored_stype(ext->sType);
>   break;
> diff --git a/src/intel/vulkan/anv_extensions.py b/src/intel/vulkan/anv_
> extensions.py
> index a828a668d6..714c034839 100644
> --- a/src/intel/vulkan/anv_extensions.py
> +++ b/src/intel/vulkan/anv_extensions.py
> @@ -50,6 +50,7 @@ class Extension:
>  # the those extension strings, then tests dEQP-VK.api.info.instance.
> extensions
>  # and dEQP-VK.api.info.device fail due to the duplicated strings.
>  EXTENSIONS = [
> +Extension('VK_KHR_16bit_storage', 1, True),
>

We probably want to make this "device->info.gen >= 8" instead of "True"


>  Extension('VK_KHR_bind_memory2',  1, True),
>  Extension('VK_KHR_dedicated_allocation',  1, True),
>  Extension('VK_KHR_descriptor_update_template',1, True),
> --
> 2.13.6
>
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[Mesa-dev] [Bug 103539] Windows build breaks if 'sh' is not available

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=103539

Brian Paul  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |INVALID

--- Comment #2 from Brian Paul  ---
Please try the latest code.  This was fixed back in August.  Re-open this bug
if you still have trouble.

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Re: [Mesa-dev] [PATCH 33/33] intel: add aubinator ui

[Lionel Landwerlin]

On 01/11/17 20:30, Dylan Baker wrote:

Quoting Scott D Phillips (2017-11-01 10:30:09)

Lionel Landwerlin  writes:


On 31/10/17 21:11, Scott D Phillips wrote:

+}

[snip imgui]

imgui seems to be the first instance of someone pasting a sizeable third
party library into the repo.  I'm not sure how everyone feels about
that. Unfortunately it seems like imgui isn't packaged by any distros
that I can see either.

Maybe we could do some meson wrap magic or something to pull it in
without having to commit the code.


Copying seems to be the main way anybody is using it. Are you suggesting
a submodule?

Right, something like making a 'wrap' for imgui that can go download and
build the source:

http://mesonbuild.com/Wrap-dependency-system-manual.html

Really no idea if this is a great or terrible idea though. Dylan might
have a better idea.


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I'm really not thrilled with the idea of pulling such a large fast moving
project into the tree either, though there is president, we have gtest in tree
already.

A wrap might be a good way to build it it, especially for an optional tool that
distros aren't expected to package. I wonder if upstream would take a meson 
build
specifically for this purpose? Would you like me to follow up with them and see
if that would be an option (meson feels [rightly] that it's preferable to try to
get a meson build into the upstream project before adding it to wrapdb)?

Dylan


I'll ask but it seems the ImGui project is really not meant to be 
packaged like most software we find in Linux distros.
There are a few glue example to work on various versions window systems 
and OpenGL/Vulkan, but these are just meant as examples.
It's expected whoever uses it will embedded it in its project and tweak 
the few things it needs (either event plumbing or adding new 
colors-scheme/widgets).


In our case, I wrote the Gtk3 backend, I'm pretty sure there is little 
interest in having it upstream.


-
Lionel
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[Mesa-dev] [Bug 103539] Windows build breaks if 'sh' is not available

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=103539

--- Comment #1 from Charles Huber  ---
Reverting write_git_sha1_h_file() to the pre-3fd425aed7 code fixes the build
for me.

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Re: [Mesa-dev] [PATCH v3] compiler: Mark when input/ouput attribute at VS uses 16-bit (v2)

[Jason Ekstrand]

On Tue, Oct 17, 2017 at 10:05 AM, Jose Maria Casanova Crespo <
jmcasan...@igalia.com> wrote:

> New shader attribute to mark when a location has 16-bit
> value. This patch includes support on mesa glsl and nir.
>
> v2: Remove use of is_half_slot as is a duplicate of is_16bit
> (Topi Pohjolainen)
> ---
>  src/compiler/glsl_types.h  | 15 +++
>  src/compiler/nir/nir_gather_info.c | 21 ++---
>  src/compiler/shader_info.h |  2 ++
>  3 files changed, 31 insertions(+), 7 deletions(-)
>
> diff --git a/src/compiler/glsl_types.h b/src/compiler/glsl_types.h
> index 32399df351..e35e8d8f88 100644
> --- a/src/compiler/glsl_types.h
> +++ b/src/compiler/glsl_types.h
> @@ -93,6 +93,13 @@ static inline bool glsl_base_type_is_integer(enum
> glsl_base_type type)
>type == GLSL_TYPE_IMAGE;
>  }
>
> +static inline bool glsl_base_type_is_16bit(enum glsl_base_type type)
> +{
> +   return type == GLSL_TYPE_FLOAT16 ||
> +  type == GLSL_TYPE_UINT16 ||
> +  type == GLSL_TYPE_INT16;
> +}
> +
>  enum glsl_sampler_dim {
> GLSL_SAMPLER_DIM_1D = 0,
> GLSL_SAMPLER_DIM_2D,
> @@ -555,6 +562,14 @@ struct glsl_type {
> }
>
> /**
> +* Query whether or not a type is 16-bit
> +*/
> +   bool is_16bit() const
> +   {
> +  return glsl_base_type_is_16bit(base_type);
> +   }
> +
> +   /**
>  * Query whether or not a type is a non-array boolean type
>  */
> bool is_boolean() const
> diff --git a/src/compiler/nir/nir_gather_info.c
> b/src/compiler/nir/nir_gather_info.c
> index ac87bec46c..cce64f9c84 100644
> --- a/src/compiler/nir/nir_gather_info.c
> +++ b/src/compiler/nir/nir_gather_info.c
> @@ -212,14 +212,20 @@ gather_intrinsic_info(nir_intrinsic_instr *instr,
> nir_shader *shader)
>   if (!try_mask_partial_io(shader, instr->variables[0]))
>  mark_whole_variable(shader, var);
>
> - /* We need to track which input_reads bits correspond to a
> -  * dvec3/dvec4 input attribute */
> + /* We need to track which input_reads bits correspond to
> +  * dvec3/dvec4 or 16-bit  input attributes */
>   if (shader->stage == MESA_SHADER_VERTEX &&
> - var->data.mode == nir_var_shader_in &&
> - glsl_type_is_dual_slot(glsl_without_array(var->type))) {
> -for (uint i = 0; i < glsl_count_attribute_slots(var->type,
> false); i++) {
> -   int idx = var->data.location + i;
> -   shader->info.double_inputs_read |= BITFIELD64_BIT(idx);
> + var->data.mode == nir_var_shader_in) {
> +if (glsl_type_is_dual_slot(glsl_without_array(var->type))) {
> +   for (uint i = 0; i < glsl_count_attribute_slots(var->type,
> false); i++) {
> +  int idx = var->data.location + i;
> +  shader->info.double_inputs_read |= BITFIELD64_BIT(idx);
> +   }
> +} else if (glsl_get_bit_size(glsl_without_array(var->type))
> == 16) {
> +   for (uint i = 0; i < glsl_count_attribute_slots(var->type,
> false); i++) {
> +  int idx = var->data.location + i;
> +  shader->info.half_inputs_read |= BITFIELD64_BIT(idx);
> +   }
>  }
>   }
>}
> @@ -312,6 +318,7 @@ nir_shader_gather_info(nir_shader *shader,
> nir_function_impl *entrypoint)
> shader->info.outputs_written = 0;
> shader->info.outputs_read = 0;
> shader->info.double_inputs_read = 0;
> +   shader->info.half_inputs_read = 0;
> shader->info.patch_inputs_read = 0;
> shader->info.patch_outputs_written = 0;
> shader->info.system_values_read = 0;
> diff --git a/src/compiler/shader_info.h b/src/compiler/shader_info.h
> index 38413940d6..98111fa1e0 100644
> --- a/src/compiler/shader_info.h
> +++ b/src/compiler/shader_info.h
> @@ -55,6 +55,8 @@ typedef struct shader_info {
> uint64_t inputs_read;
> /* Which inputs are actually read and are double */
> uint64_t double_inputs_read;
> +   /* Which inputs are actually read and are half */
> +   uint64_t half_inputs_read;
>

Given that we're flagging this for 16-bit integers, I don't think "half" is
really appropriate.  How about just 16bit_inputs_read?


> /* Which outputs are actually written */
> uint64_t outputs_written;
> /* Which outputs are actually read */
> --
> 2.13.6
>
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Re: [Mesa-dev] [PATCH 2/3] mesa: enable ARB_texture_buffer_* extensions in the Compatibility profile

[Marek Olšák]

Hi Mark,

Can you try the attached patches instead?

Thanks,
Marek

On Wed, Nov 1, 2017 at 9:49 PM, Mark Janes  wrote:
> Dylan Baker  writes:
>
>> I haven't run the CTS tests, but both the deqp and the piglit test pass on my
>> skl with Marek's patches applied.
>
> I must have tested with only the patch 2 applied.  Running with all
> three patches in the series, I see no piglit/deqp regressions.
>
> However, GLES CTS fails thousands of ES31-CTS.functional.texture tests,
> eg:
>
> ES31-CTS.functional.texture.format.buffer.rg8i_npot
> glGetIntegerv() failed: glGetError() returned GL_INVALID_ENUM at 
> gluContextInfo.cpp:229
>
> -Mark
>
>>
>> Dylan
>>
>> Quoting Marek Olšák (2017-10-31 18:16:51)
>>> This is how I run piglit on i965:
>>> WAFFLE_GBM_DEVICE=/dev/dri/renderD128 PIGLIT_PLATFORM=gbm 
>>> piglit/bin/glinfo|head
>>> GL_RENDERER = Mesa DRI Intel(R) Ivybridge Desktop
>>>
>>> Of course I have Radeon as my main GPU.
>>>
>>> Marek
>>>
>>> On Wed, Nov 1, 2017 at 12:52 AM, Mark Janes  wrote:
>>> > No, please don't.  We can't have thousands of failures added to CI.
>>> >
>>> > Dylan, can you double check this for Marek?  I'm surprised that it
>>> > doesn't reproduce for him.
>>> >
>>> > -Mark
>>> >
>>> > Marek Olšák  writes:
>>> >
>>> >> I can't reproduce the issue on my IVB. How about I just push this and
>>> >> you guys fix i965 when you have time?
>>> >>
>>> >> Marek
>>> >>
>>> >> On Thu, Oct 26, 2017 at 5:46 PM, Mark Janes  
>>> >> wrote:
>>> >>> That fixed many issues, but:
>>> >>>
>>> >>> On deqp EGL tests, we get:
>>> >>>
>>> >>> dEQP-EGL.functional.create_context_ext.gl_42.rgba_no_depth_no_stencil
>>> >>> deqp-egl: main/api_exec.c:135: _mesa_initialize_exec_table: Assertion 
>>> >>> `ctx->Version > 0' failed.
>>> >>>
>>> >>> On ES31 CTS tests:
>>> >>> ES31-CTS.functional.texture.texture_buffer.render.as_vertex_array_as_vertex_texture_as_fragment_texture.range_size_513
>>> >>> glGetIntegerv() failed: glGetError() returned GL_INVALID_ENUM at
>>> >>> gluContextInfo.cpp:229
>>> >>>
>>> >>> on GL46 CTS (27 failures):
>>> >>> src/mesa/main/teximage.c:595: _mesa_tex_target_is_layered: Assertion
>>> >>> `!"Invalid texture target."' failed.
>>> >>>
>>> >>> Piglit fails 3.5k tests with the same `ctx->Version > 0' assertion as
>>> >>> deqp-egl.
>>> >>>
>>> >>> -Mark
>>> >>>
>>> >>> Dylan Baker  writes:
>>> >>>
>>>  I've pushed it to our CI, I'll let you know tomorrow what it looks like
>>> 
>>>  Dylan
>>> 
>>>  Quoting Marek Olšák (2017-10-25 19:52:43)
>>> > Hi Dylan,
>>> >
>>> > Can you please add this and re-test?
>>> >
>>> > diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c 
>>> > b/src/mesa/drivers/
>>> > dri/i965/intel_extensions.c
>>> > index 21cf632..4d17393 100644
>>> > --- a/src/mesa/drivers/dri/i965/intel_extensions.c
>>> > +++ b/src/mesa/drivers/dri/i965/intel_extensions.c
>>> > @@ -178,7 +178,7 @@ intelInitExtensions(struct gl_context *ctx)
>>> >ctx->Extensions.ARB_pipeline_statistics_query = true;
>>> >ctx->Extensions.ARB_sample_shading = true;
>>> >ctx->Extensions.ARB_shading_language_420pack = true;
>>> > -  if (ctx->API == API_OPENGL_CORE) {
>>> > +  if (ctx->API != API_OPENGL_COMPAT) {
>>> >   ctx->Extensions.ARB_texture_buffer_object = true;
>>> >   ctx->Extensions.ARB_texture_buffer_object_rgb32 = true;
>>> >   ctx->Extensions.ARB_texture_buffer_range = true;
>>> >
>>> >
>>> > Marek
>>> >
>>> > On Wed, Oct 25, 2017 at 11:42 PM, Dylan Baker 
>>> >  wrote:
>>> >
>>> > There are a significant number of i965 regressions from
>>> > d96c68146a781c79a23f5181d7050174f1070d90, largely related to 
>>> > texturing (I
>>> > can
>>> > send you a complete list of regressions if you care, but due to 
>>> > the large
>>> > number
>>> > of them I suspect it's something fairly simple).
>>> >
>>> > For example:
>>> > ES31-CTS.functional.texture.format.buffer.r32ui_npot
>>> >
>>> > glGetIntegerv() failed: glGetError() returned GL_INVALID_ENUM at
>>> > gluContextInfo.cpp:229
>>> >
>>> > dEQP-GLES31.functional.state_query.integer.texture_buffer_
>>> > binding_getinteger:
>>> >
>>> > glGetIntegerv(GL_TEXTURE_BUFFER_BINDING, 0x7ffee0c43834);
>>> > // data = { -555819298 }
>>> > glGetError();
>>> > // GL_INVALID_ENUM returned
>>> >  // ERROR: glGetIntegerv: glGetError() returned GL_INVALID_ENUM
>>> >
>>> > Dylan
>>> >
>>> > Quoting Emil Velikov (2017-10-24 09:30:03)
>>> > > Hi Marek,
>>> > >
>>> > > On 21 October 2017 at 13:54, Marek Olšák  
>>> 

[Mesa-dev] [Bug 103539] Windows build breaks if 'sh' is not available

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=103539

Bug ID: 103539
   Summary: Windows build breaks if 'sh' is not available
   Product: Mesa
   Version: 17.2
  Hardware: x86 (IA32)
OS: Windows (All)
Status: NEW
  Severity: major
  Priority: medium
 Component: Mesa core
  Assignee: mesa-dev@lists.freedesktop.org
  Reporter: genpfa...@gmail.com
QA Contact: mesa-dev@lists.freedesktop.org

3fd425aed7 switched write_git_sha1_h_file() in src/SConscript from Popen()ing
'git' directly to using a sh script.  Since sh isn't available on Windows the
function fails to create the git_sha1.h file and eventually breaks the build
when things like src\mesa\main\version.c try to #include it.

I'm using the mesa-17.2.4 tag (a4b72e2643) with the VS2015 toolchain.

-- 
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Re: [Mesa-dev] [PATCH 2/3] mesa: enable ARB_texture_buffer_* extensions in the Compatibility profile

[Mark Janes]

Dylan Baker  writes:

> I haven't run the CTS tests, but both the deqp and the piglit test pass on my
> skl with Marek's patches applied.

I must have tested with only the patch 2 applied.  Running with all
three patches in the series, I see no piglit/deqp regressions.

However, GLES CTS fails thousands of ES31-CTS.functional.texture tests,
eg:

ES31-CTS.functional.texture.format.buffer.rg8i_npot
glGetIntegerv() failed: glGetError() returned GL_INVALID_ENUM at 
gluContextInfo.cpp:229

-Mark

>
> Dylan
>
> Quoting Marek Olšák (2017-10-31 18:16:51)
>> This is how I run piglit on i965:
>> WAFFLE_GBM_DEVICE=/dev/dri/renderD128 PIGLIT_PLATFORM=gbm 
>> piglit/bin/glinfo|head
>> GL_RENDERER = Mesa DRI Intel(R) Ivybridge Desktop
>> 
>> Of course I have Radeon as my main GPU.
>> 
>> Marek
>> 
>> On Wed, Nov 1, 2017 at 12:52 AM, Mark Janes  wrote:
>> > No, please don't.  We can't have thousands of failures added to CI.
>> >
>> > Dylan, can you double check this for Marek?  I'm surprised that it
>> > doesn't reproduce for him.
>> >
>> > -Mark
>> >
>> > Marek Olšák  writes:
>> >
>> >> I can't reproduce the issue on my IVB. How about I just push this and
>> >> you guys fix i965 when you have time?
>> >>
>> >> Marek
>> >>
>> >> On Thu, Oct 26, 2017 at 5:46 PM, Mark Janes  
>> >> wrote:
>> >>> That fixed many issues, but:
>> >>>
>> >>> On deqp EGL tests, we get:
>> >>>
>> >>> dEQP-EGL.functional.create_context_ext.gl_42.rgba_no_depth_no_stencil
>> >>> deqp-egl: main/api_exec.c:135: _mesa_initialize_exec_table: Assertion 
>> >>> `ctx->Version > 0' failed.
>> >>>
>> >>> On ES31 CTS tests:
>> >>> ES31-CTS.functional.texture.texture_buffer.render.as_vertex_array_as_vertex_texture_as_fragment_texture.range_size_513
>> >>> glGetIntegerv() failed: glGetError() returned GL_INVALID_ENUM at
>> >>> gluContextInfo.cpp:229
>> >>>
>> >>> on GL46 CTS (27 failures):
>> >>> src/mesa/main/teximage.c:595: _mesa_tex_target_is_layered: Assertion
>> >>> `!"Invalid texture target."' failed.
>> >>>
>> >>> Piglit fails 3.5k tests with the same `ctx->Version > 0' assertion as
>> >>> deqp-egl.
>> >>>
>> >>> -Mark
>> >>>
>> >>> Dylan Baker  writes:
>> >>>
>>  I've pushed it to our CI, I'll let you know tomorrow what it looks like
>> 
>>  Dylan
>> 
>>  Quoting Marek Olšák (2017-10-25 19:52:43)
>> > Hi Dylan,
>> >
>> > Can you please add this and re-test?
>> >
>> > diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c 
>> > b/src/mesa/drivers/
>> > dri/i965/intel_extensions.c
>> > index 21cf632..4d17393 100644
>> > --- a/src/mesa/drivers/dri/i965/intel_extensions.c
>> > +++ b/src/mesa/drivers/dri/i965/intel_extensions.c
>> > @@ -178,7 +178,7 @@ intelInitExtensions(struct gl_context *ctx)
>> >ctx->Extensions.ARB_pipeline_statistics_query = true;
>> >ctx->Extensions.ARB_sample_shading = true;
>> >ctx->Extensions.ARB_shading_language_420pack = true;
>> > -  if (ctx->API == API_OPENGL_CORE) {
>> > +  if (ctx->API != API_OPENGL_COMPAT) {
>> >   ctx->Extensions.ARB_texture_buffer_object = true;
>> >   ctx->Extensions.ARB_texture_buffer_object_rgb32 = true;
>> >   ctx->Extensions.ARB_texture_buffer_range = true;
>> >
>> >
>> > Marek
>> >
>> > On Wed, Oct 25, 2017 at 11:42 PM, Dylan Baker 
>> >  wrote:
>> >
>> > There are a significant number of i965 regressions from
>> > d96c68146a781c79a23f5181d7050174f1070d90, largely related to 
>> > texturing (I
>> > can
>> > send you a complete list of regressions if you care, but due to 
>> > the large
>> > number
>> > of them I suspect it's something fairly simple).
>> >
>> > For example:
>> > ES31-CTS.functional.texture.format.buffer.r32ui_npot
>> >
>> > glGetIntegerv() failed: glGetError() returned GL_INVALID_ENUM at
>> > gluContextInfo.cpp:229
>> >
>> > dEQP-GLES31.functional.state_query.integer.texture_buffer_
>> > binding_getinteger:
>> >
>> > glGetIntegerv(GL_TEXTURE_BUFFER_BINDING, 0x7ffee0c43834);
>> > // data = { -555819298 }
>> > glGetError();
>> > // GL_INVALID_ENUM returned
>> >  // ERROR: glGetIntegerv: glGetError() returned GL_INVALID_ENUM
>> >
>> > Dylan
>> >
>> > Quoting Emil Velikov (2017-10-24 09:30:03)
>> > > Hi Marek,
>> > >
>> > > On 21 October 2017 at 13:54, Marek Olšák  
>> > wrote:
>> > > > From: Marek Olšák 
>> > > >
>> > > > We already have piglit tests testing alpha, luminance, and 
>> > intensity
>> > > > formats. They were skipped by piglit until now.
>> > > >
>> > > >