Re: [Mesa-dev] [PATCH 3/7] radeonsi: compile all TGSI compute shaders asynchronously

[Christian Inci]

This patch results into an infinite, but interruptible, hang when trying to use 
OpenCL. Not even the piglit quick_cl tests are working. It works fine after 
revert.

System info:
Gentoo AMD64 Unstable
RX 470 8GB (Polaris 10)
LLVM, Clang, Mesa incl. dependencies on Git Master.

P.S.:
OpenCL on Oland is completely broken since a few months or so (it looks like a 
bug in LLVM), but that's another story.


Message: 1
Date: Sun, 12 Mar 2017 18:16:27 +0100
From: Marek Olšák 
To: mesa-dev@lists.freedesktop.org
Subject: [Mesa-dev] [PATCH 3/7] radeonsi: compile all TGSI compute
shaders asynchronously
Message-ID: <1489338991-7561-3-git-send-email-mar...@gmail.com>
Content-Type: text/plain; charset=UTF-8

From: Marek Olšák 

required by threaded gallium
---
 src/gallium/drivers/radeonsi/si_compute.c | 125 +++---
 1 file changed, 81 insertions(+), 44 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_compute.c 
b/src/gallium/drivers/radeonsi/si_compute.c
index 5097c81..ed02f49 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -27,20 +27,25 @@
 #include "util/u_upload_mgr.h"

 #include "amd_kernel_code_t.h"
 #include "radeon/r600_cs.h"
 #include "si_pipe.h"
 #include "sid.h"

 #define MAX_GLOBAL_BUFFERS 22

 struct si_compute {
+   struct si_screen *screen;
+   struct tgsi_token *tokens;
+   struct util_queue_fence ready;
+   struct si_compiler_ctx_state compiler_ctx_state;
+
unsigned ir_type;
unsigned local_size;
unsigned private_size;
unsigned input_size;
struct si_shader shader;

struct pipe_resource *global_buffers[MAX_GLOBAL_BUFFERS];
unsigned use_code_object_v2 : 1;
unsigned variable_group_size : 1;
 };
@@ -81,85 +86,111 @@ static void code_object_to_config(const amd_kernel_code_t 
*code_object,
out_config->num_sgprs = code_object->wavefront_sgpr_count;
out_config->num_vgprs = code_object->workitem_vgpr_count;
out_config->float_mode = G_00B028_FLOAT_MODE(rsrc1);
out_config->rsrc1 = rsrc1;
out_config->lds_size = MAX2(out_config->lds_size, 
G_00B84C_LDS_SIZE(rsrc2));
out_config->rsrc2 = rsrc2;
out_config->scratch_bytes_per_wave =
align(code_object->workitem_private_segment_byte_size * 64, 
1024);
 }

+/* Asynchronous compute shader compilation. */
+static void si_create_compute_state_async(void *job, int thread_index)
+{
+   struct si_compute *program = (struct si_compute *)job;
+   struct si_shader *shader = >shader;
+   struct si_shader_selector sel;
+   LLVMTargetMachineRef tm;
+   struct pipe_debug_callback *debug = >compiler_ctx_state.debug;
+
+   if (thread_index >= 0) {
+   assert(thread_index < ARRAY_SIZE(program->screen->tm));
+   tm = program->screen->tm[thread_index];
+   if (!debug->async)
+   debug = NULL;
+   } else {
+   tm = program->compiler_ctx_state.tm;
+   }
+
+   memset(, 0, sizeof(sel));
+
+   tgsi_scan_shader(program->tokens, );
+   sel.tokens = program->tokens;
+   sel.type = PIPE_SHADER_COMPUTE;
+   sel.local_size = program->local_size;
+
+   program->shader.selector = 
+   program->shader.is_monolithic = true;
+
+   if (si_shader_create(program->screen, tm, >shader, debug)) {
+   program->shader.compilation_failed = true;
+   } else {
+   bool scratch_enabled = shader->config.scratch_bytes_per_wave > 
0;
+
+   shader->config.rsrc1 =
+   S_00B848_VGPRS((shader->config.num_vgprs - 1) / 4) |
+   S_00B848_SGPRS((shader->config.num_sgprs - 1) / 8) |
+   S_00B848_DX10_CLAMP(1) |
+   S_00B848_FLOAT_MODE(shader->config.float_mode);
+
+   shader->config.rsrc2 =
+   S_00B84C_USER_SGPR(SI_CS_NUM_USER_SGPR) |
+   S_00B84C_SCRATCH_EN(scratch_enabled) |
+   S_00B84C_TGID_X_EN(1) | S_00B84C_TGID_Y_EN(1) |
+   S_00B84C_TGID_Z_EN(1) | S_00B84C_TIDIG_COMP_CNT(2) |
+   S_00B84C_LDS_SIZE(shader->config.lds_size);
+
+   program->variable_group_size =
+   sel.info.properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] 
== 0;
+   }
+
+   FREE(program->tokens);
+   program->shader.selector = NULL;
+}
+
 static void *si_create_compute_state(
struct pipe_context *ctx,
const struct pipe_compute_state *cso)
 {
struct si_context *sctx = (struct si_context *)ctx;
struct si_screen *sscreen = (struct si_screen *)ctx->screen;
struct si_compute *program = CALLOC_STRUCT(si_compute);
-   struct si_shader *shader = >shader;
-

+   program->screen = (struct si_screen *)ctx->screen;

Re: [Mesa-dev] [PATCH] radeonsi: Bugfix needed for hashcat

[Christian Inci]

On 12/22/2016 05:07 PM, Nicolai Hähnle wrote:
> On 19.12.2016 23:26, Christian Inci wrote:
>> Hashcat needs MAX_GLOBAL_BUFFERS to be 21 or even 22 for some modes. It'll 
>> crash otherwise.
>> I'm adding an assert to see if programs need it to be even higher.
>>
>> Signed-off-by: Christian Inci <chris.bug...@broke-the-inter.net>
> 
> I'm not too familiar with OpenCL, but shouldn't there be some propagation of 
> the number of bindings to the caller and appropriate error handling? Or is 
> the number of bindings supposed to be adjusted dynamically based on 
> application need?
> 
> Either way, this can only serve as a temporary fix. The real bug is still out 
> there somewhere else.

I don't have a single clue about OpenCL. I found out that I had to change that 
#define after days of debugging. It were right in front of my eyes and I didn't 
had a clue.
Despite that OpenCL kernels on Mesa don't like "static" and "inline" (thanks 
"sed -i 's/...//g' ..."), hashcat isn't as stable (under Mesa) as I hoped.

> 
> 
>> ---
>>  src/gallium/drivers/radeonsi/si_compute.c | 3 ++-
>>  1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/src/gallium/drivers/radeonsi/si_compute.c 
>> b/src/gallium/drivers/radeonsi/si_compute.c
>> index 9d83cb3a..9bad34ed 100644
>> --- a/src/gallium/drivers/radeonsi/si_compute.c
>> +++ b/src/gallium/drivers/radeonsi/si_compute.c
>> @@ -32,7 +32,7 @@
>>  #include "si_pipe.h"
>>  #include "sid.h"
>>
>> -#define MAX_GLOBAL_BUFFERS 20
>> +#define MAX_GLOBAL_BUFFERS 22
>>
>>  struct si_compute {
>>  unsigned ir_type;
>> @@ -195,6 +195,7 @@ static void si_set_global_binding(
>>  unsigned i;
>>  struct si_context *sctx = (struct si_context*)ctx;
>>  struct si_compute *program = sctx->cs_shader_state.program;
>> +assert(n <= MAX_GLOBAL_BUFFERS);
> 
> This should check for first + n. I'm going to change this before pushing.

Thanks. My bad.

> 
> Nicolai
> 
>>
>>  if (!resources) {
>>  for (i = first; i < first + n; i++) {
>>
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[Mesa-dev] [PATCH] radeonsi: Bugfix needed for hashcat

[Christian Inci]

Hashcat needs MAX_GLOBAL_BUFFERS to be 21 or even 22 for some modes. It'll 
crash otherwise.
I'm adding an assert to see if programs need it to be even higher.

Signed-off-by: Christian Inci <chris.bug...@broke-the-inter.net>

---
 src/gallium/drivers/radeonsi/si_compute.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_compute.c 
b/src/gallium/drivers/radeonsi/si_compute.c
index 9d83cb3a..9bad34ed 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -32,7 +32,7 @@
 #include "si_pipe.h"
 #include "sid.h"

-#define MAX_GLOBAL_BUFFERS 20
+#define MAX_GLOBAL_BUFFERS 22

 struct si_compute {
unsigned ir_type;
@@ -195,6 +195,7 @@ static void si_set_global_binding(
unsigned i;
struct si_context *sctx = (struct si_context*)ctx;
struct si_compute *program = sctx->cs_shader_state.program;
+   assert(n <= MAX_GLOBAL_BUFFERS);

if (!resources) {
for (i = first; i < first + n; i++) {
-- 
2.11.0
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