On Sat, Jan 19, 2013 at 8:22 PM, Gui Iribarren g...@altermundi.net wrote:
WDR3500 is similar to WDR3600 except it doesn't have gigabit ethernet,
and has only 1 USB port.
So, this patch (over r35162) adds a new board type, based on
mach-tl-wdr4300.c but replacing ethernet config with one based on
mach-tl-wr841n-v8.c
a huge thanks goes out to Paul Fertser for hours of tireless advice!
Pending issues:
* Leds are not working at all
* ethernet ports are all scrambled up:
[Label] - soft device
[WAN] - eth1.1
[LAN1] - eth1.4
[LAN2] - eth1.3
[LAN3] - eth1.2
[LAN4] - eth0
Anyone with experience fixing those details that cares to help, will
be much appreciated!
Signed-off-by: Gui Iribarren g...@altermundi.net
Thanks-to: Paul Fertser fercer...@gmail.com
Inline patch, probably newline-broken :(
Index: target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr3500.c
===
--- target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr3500.c(revision 0)
+++ target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr3500.c(revision 0)
@@ -0,0 +1,139 @@
+/*
+ * TP-LINK TL-WDR3500 board support
+ *
+ * Copyright (C) 2012 Gabor Juhos juh...@openwrt.org
+ * Copyright (C) 2013 Gui Iribarren g...@altermundi.net
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include linux/pci.h
+#include linux/phy.h
+#include linux/gpio.h
+#include linux/platform_device.h
+#include linux/ath9k_platform.h
+#include linux/ar8216_platform.h
+
+#include asm/mach-ath79/ar71xx_regs.h
+
+#include common.h
+#include dev-ap9x-pci.h
+#include dev-eth.h
+#include dev-gpio-buttons.h
+#include dev-leds-gpio.h
+#include dev-m25p80.h
+#include dev-spi.h
+#include dev-usb.h
+#include dev-wmac.h
+#include machtypes.h
+
+#define WDR3500_GPIO_LED_USB111
+#define WDR3500_GPIO_LED_WLAN2G13
+#define WDR3500_GPIO_LED_SYSTEM14
+#define WDR3500_GPIO_LED_QSS15
+
+#define WDR3500_GPIO_BTN_WPS16
+#define WDR3500_GPIO_BTN_RFKILL17
+
+#define WDR3500_GPIO_USB1_POWER22
+
+#define WDR3500_KEYS_POLL_INTERVAL20/* msecs */
+#define WDR3500_KEYS_DEBOUNCE_INTERVAL(3 * WDR3500_KEYS_POLL_INTERVAL)
+
+#define WDR3500_MAC0_OFFSET0
+#define WDR3500_MAC1_OFFSET6
+#define WDR3500_WMAC_CALDATA_OFFSET0x1000
+#define WDR3500_PCIE_CALDATA_OFFSET0x5000
+
+static const char *wdr3500_part_probes[] = {
+tp-link,
+NULL,
+};
+
+static struct flash_platform_data wdr3500_flash_data = {
+.part_probes= wdr3500_part_probes,
+};
+
+static struct gpio_led wdr3500_leds_gpio[] __initdata = {
+{
+.name= tp-link:blue:qss,
+.gpio= WDR3500_GPIO_LED_QSS,
+.active_low= 1,
+},
+{
+.name= tp-link:blue:system,
+.gpio= WDR3500_GPIO_LED_SYSTEM,
+.active_low= 1,
+},
+{
+.name= tp-link:green:usb1,
+.gpio= WDR3500_GPIO_LED_USB1,
+.active_low= 1,
+},
+{
+.name= tp-link:blue:wlan2g,
+.gpio= WDR3500_GPIO_LED_WLAN2G,
+.active_low= 1,
+},
+};
+
+static struct gpio_keys_button wdr3500_gpio_keys[] __initdata = {
+{
+.desc= QSS button,
+.type= EV_KEY,
+.code= KEY_WPS_BUTTON,
+.debounce_interval = WDR3500_KEYS_DEBOUNCE_INTERVAL,
+.gpio= WDR3500_GPIO_BTN_WPS,
+.active_low= 1,
+},
+{
+.desc= RFKILL switch,
+.type= EV_SW,
+.code= KEY_RFKILL,
+.debounce_interval = WDR3500_KEYS_DEBOUNCE_INTERVAL,
+.gpio= WDR3500_GPIO_BTN_RFKILL,
+},
+};
+
+
+static void __init wdr3500_setup(void)
+{
+u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
+
+ath79_register_m25p80(wdr3500_flash_data);
+ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr3500_leds_gpio),
+ wdr3500_leds_gpio);
+ath79_register_gpio_keys_polled(-1, WDR3500_KEYS_POLL_INTERVAL,
+ARRAY_SIZE(wdr3500_gpio_keys),
+wdr3500_gpio_keys);
+
+ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP);
+
+ath79_register_mdio(1, 0x0);
+
+ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1);
+ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
+
+/* GMAC0 is connected to the PHY0 of the internal switch */
+ath79_switch_data.phy4_mii_en = 1;
+ath79_switch_data.phy_poll_mask = BIT(0);
+ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
+ath79_eth0_data.phy_mask = BIT(0);
+ath79_eth0_data.mii_bus_dev = ath79_mdio1_device.dev;
+ath79_register_eth(0);
+
+/* GMAC1 is connected to the internal switch */
+ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+
