date:20120607

From: Nathan Froyd 

 Nathan's original terse comment:

"Use MIPS_HFLAG_B16 to determine the address of a jump instruction when we 
need to restart a delay slot instruction."

and was not accompanied by a test case nor I have one offhand.

 However this change appears obviously correct to me, and the same 
calculation is already used in exception_resume_pc applied to ordinary, 
Debug and NMI exceptions.  This code on the other hand applies to reset 
exceptions and instruction restarts in the context of I/O.

Signed-off-by: Maciej W. Rozycki 
---

 Sent on behalf of Nathan, who's since left the company.  Please apply.

  Maciej

qemu-mips-b16.diff
Index: qemu-git-trunk/exec.c
===
--- qemu-git-trunk.orig/exec.c  2012-06-04 05:34:18.655419589 +0100
+++ qemu-git-trunk/exec.c   2012-06-04 05:42:53.295516541 +0100
@@ -4235,7 +4235,7 @@ void cpu_io_recompile(CPUArchState *env,
branch.  */
 #if defined(TARGET_MIPS)
 if ((env->hflags & MIPS_HFLAG_BMASK) != 0 && n > 1) {
-env->active_tc.PC -= 4;
+env->active_tc.PC -= (env->hflags & MIPS_HFLAG_B16 ? 2 : 4);
 env->icount_decr.u16.low++;
 env->hflags &= ~MIPS_HFLAG_BMASK;
 }
Index: qemu-git-trunk/target-mips/translate.c
===
--- qemu-git-trunk.orig/target-mips/translate.c 2012-06-04 05:42:49.475411277 
+0100
+++ qemu-git-trunk/target-mips/translate.c  2012-06-04 05:42:53.295516541 
+0100
@@ -12796,7 +12796,8 @@ void cpu_state_reset(CPUMIPSState *env)
 if (env->hflags & MIPS_HFLAG_BMASK) {
 /* If the exception was raised from a delay slot,
come back to the jump.  */
-env->CP0_ErrorEPC = env->active_tc.PC - 4;
+env->CP0_ErrorEPC = (env->active_tc.PC
+ - (env->hflags & MIPS_HFLAG_B16 ? 2 : 4));
 } else {
 env->CP0_ErrorEPC = env->active_tc.PC;
 }

[Qemu-devel] [PATCH] MIPS: Remove obsolete comment about OPC_JALX


 A while ago I made a change to make MIPS16 code use the OPC_JALS opcode 
"pinched" from microMIPS support as well as the artificial OPC_JALXS 
opcode I made up on that occasion so that the fixed 16-bit delay slot size 
of MIPS16 instructions is handled uniformly across code, just as the 
microMIPS delay slot size constraints are.  As a result of this change 
OPC_JALX is never used for MIPS16 emulation anymore, it's now only ever 
used in the standard MIPS and microMIPS modes.

 Someone was kind enough to push that change upstream on my behalf, but 
somehow the piece to update the comment accordingly was missed and not 
propagated.  Here's an update to remove the obsolete and now misleading 
comment.

Signed-off-by: Maciej W. Rozycki 
---

 Mostly obvious, please apply.

  Maciej

qemu-mips16-jal.diff
Index: qemu-git-trunk/target-mips/translate.c
===
--- qemu-git-trunk.orig/target-mips/translate.c 2012-06-04 02:38:47.0 
+0100
+++ qemu-git-trunk/target-mips/translate.c  2012-06-04 03:06:38.975449423 
+0100
@@ -69,7 +69,7 @@ enum {
 OPC_BLEZL= (0x16 << 26),
 OPC_BGTZ = (0x07 << 26),
 OPC_BGTZL= (0x17 << 26),
-OPC_JALX = (0x1D << 26),  /* MIPS 16 only */
+OPC_JALX = (0x1D << 26),
 OPC_JALXS= OPC_JALX | 0x5,
 /* Load and stores */
 OPC_LDL  = (0x1A << 26),

[Qemu-devel] [PATCH] MIPS/user: Fix reset CPU state initialization


 This change updates the CPU reset sequence to use a common piece of code 
that figures out CPU state flags, fixing the problem with MIPS_HFLAG_COP1X 
not being set where applicable that causes floating-point MADD family 
instructions (and other instructions from the MIPS IV FP subset) to trap.

 As compute_hflags is now shared between op_helper.c and translate.c, the 
function is now moved to a common header.  There are no changes to this 
function.

 The problem was seen with the 24Kf MIPS32r2 processor in user emulation.  
The new approach prevents system and user emulation from diverging -- all 
the hflags state is initialized in one place now.

Signed-off-by: Maciej W. Rozycki 
---

 This is effectively a follow-up to Nathan's FCR0 fix -- please apply.

  Maciej

qemu-mips-hflags.patch
Index: qemu-git-trunk/target-mips/cpu.h
===
--- qemu-git-trunk.orig/target-mips/cpu.h   2012-06-07 03:15:53.645461055 
+0100
+++ qemu-git-trunk/target-mips/cpu.h2012-06-07 03:18:48.345427587 +0100
@@ -753,4 +753,53 @@ static inline void cpu_pc_from_tb(CPUMIP
 env->hflags |= tb->flags & MIPS_HFLAG_BMASK;
 }
 
+static inline void compute_hflags(CPUMIPSState *env)
+{
+env->hflags &= ~(MIPS_HFLAG_COP1X | MIPS_HFLAG_64 | MIPS_HFLAG_CP0 |
+ MIPS_HFLAG_F64 | MIPS_HFLAG_FPU | MIPS_HFLAG_KSU |
+ MIPS_HFLAG_UX);
+if (!(env->CP0_Status & (1 << CP0St_EXL)) &&
+!(env->CP0_Status & (1 << CP0St_ERL)) &&
+!(env->hflags & MIPS_HFLAG_DM)) {
+env->hflags |= (env->CP0_Status >> CP0St_KSU) & MIPS_HFLAG_KSU;
+}
+#if defined(TARGET_MIPS64)
+if (((env->hflags & MIPS_HFLAG_KSU) != MIPS_HFLAG_UM) ||
+(env->CP0_Status & (1 << CP0St_PX)) ||
+(env->CP0_Status & (1 << CP0St_UX))) {
+env->hflags |= MIPS_HFLAG_64;
+}
+if (env->CP0_Status & (1 << CP0St_UX)) {
+env->hflags |= MIPS_HFLAG_UX;
+}
+#endif
+if ((env->CP0_Status & (1 << CP0St_CU0)) ||
+!(env->hflags & MIPS_HFLAG_KSU)) {
+env->hflags |= MIPS_HFLAG_CP0;
+}
+if (env->CP0_Status & (1 << CP0St_CU1)) {
+env->hflags |= MIPS_HFLAG_FPU;
+}
+if (env->CP0_Status & (1 << CP0St_FR)) {
+env->hflags |= MIPS_HFLAG_F64;
+}
+if (env->insn_flags & ISA_MIPS32R2) {
+if (env->active_fpu.fcr0 & (1 << FCR0_F64)) {
+env->hflags |= MIPS_HFLAG_COP1X;
+}
+} else if (env->insn_flags & ISA_MIPS32) {
+if (env->hflags & MIPS_HFLAG_64) {
+env->hflags |= MIPS_HFLAG_COP1X;
+}
+} else if (env->insn_flags & ISA_MIPS4) {
+/* All supported MIPS IV CPUs use the XX (CU3) to enable
+   and disable the MIPS IV extensions to the MIPS III ISA.
+   Some other MIPS IV CPUs ignore the bit, so the check here
+   would be too restrictive for them.  */
+if (env->CP0_Status & (1 << CP0St_CU3)) {
+env->hflags |= MIPS_HFLAG_COP1X;
+}
+}
+}
+
 #endif /* !defined (__MIPS_CPU_H__) */
Index: qemu-git-trunk/target-mips/op_helper.c
===
--- qemu-git-trunk.orig/target-mips/op_helper.c 2012-06-07 03:15:53.645461055 
+0100
+++ qemu-git-trunk/target-mips/op_helper.c  2012-06-07 03:18:48.345427587 
+0100
@@ -32,55 +32,6 @@
 static inline void cpu_mips_tlb_flush (CPUMIPSState *env, int flush_global);
 #endif
 
-static inline void compute_hflags(CPUMIPSState *env)
-{
-env->hflags &= ~(MIPS_HFLAG_COP1X | MIPS_HFLAG_64 | MIPS_HFLAG_CP0 |
- MIPS_HFLAG_F64 | MIPS_HFLAG_FPU | MIPS_HFLAG_KSU |
- MIPS_HFLAG_UX);
-if (!(env->CP0_Status & (1 << CP0St_EXL)) &&
-!(env->CP0_Status & (1 << CP0St_ERL)) &&
-!(env->hflags & MIPS_HFLAG_DM)) {
-env->hflags |= (env->CP0_Status >> CP0St_KSU) & MIPS_HFLAG_KSU;
-}
-#if defined(TARGET_MIPS64)
-if (((env->hflags & MIPS_HFLAG_KSU) != MIPS_HFLAG_UM) ||
-(env->CP0_Status & (1 << CP0St_PX)) ||
-(env->CP0_Status & (1 << CP0St_UX))) {
-env->hflags |= MIPS_HFLAG_64;
-}
-if (env->CP0_Status & (1 << CP0St_UX)) {
-env->hflags |= MIPS_HFLAG_UX;
-}
-#endif
-if ((env->CP0_Status & (1 << CP0St_CU0)) ||
-!(env->hflags & MIPS_HFLAG_KSU)) {
-env->hflags |= MIPS_HFLAG_CP0;
-}
-if (env->CP0_Status & (1 << CP0St_CU1)) {
-env->hflags |= MIPS_HFLAG_FPU;
-}
-if (env->CP0_Status & (1 << CP0St_FR)) {
-env->hflags |= MIPS_HFLAG_F64;
-}
-if (env->insn_flags & ISA_MIPS32R2) {
-if (env->active_fpu.fcr0 & (1 << FCR0_F64)) {
-env->hflags |= MIPS_HFLAG_COP1X;
-}
-} else if (env->insn_flags & ISA_MIPS32) {
-if (env->hflags & MIPS_HFLAG_64) {
-env->hflags |= MIPS_HFLAG_COP1X;
-}
-} else if (env->insn_flags & ISA_MIPS4) {
-/* All supported MIPS IV CPUs use the XX (CU3

[Qemu-devel] [PATCH] MIPS: Correct FCR0 initialization

From: Nathan Froyd 

 This change addresses a problem where QEMU incorrectly traps on 
floating-point MADD group instructions with SIGILL, at least while 
emulating MIPS32r2 processors.  These instructions use the COP1X major 
opcode and include ones like:

madd.d  $f2,$f4,$f2,$f6

 Here's Nathan's original analysis of the problem:

"QEMU essentially does:

  d = find_cpu (cpu_string) // get CPU definition
  fpu_init (env, d) // initialize fpu state (init FCR0, basically)
  cpu_reset (env)

...and the cpu_reset call clears all interesting state that fpu_init
setup, then proceeds to reinitialize all the CP0 registers...but not
FCR0."

 I have verified this change with system emulation running the GDB test 
suite for the mips-sde-elf target (o32, big endian, 24Kf CPU emulated), 
there were 55 progressions and no regressions.

Signed-off-by: Maciej W. Rozycki 
---

 Sent on behalf of Nathan, who's since left the company.  Please apply.

  Maciej

qemu-mips-fcr0.diff
Index: qemu-git-trunk/target-mips/translate.c
===
--- qemu-git-trunk.orig/target-mips/translate.c 2012-06-04 05:35:53.245610241 
+0100
+++ qemu-git-trunk/target-mips/translate.c  2012-06-04 05:39:26.245563823 
+0100
@@ -12776,6 +12776,7 @@ void cpu_state_reset(CPUMIPSState *env)
 env->CP0_SRSConf3 = env->cpu_model->CP0_SRSConf3;
 env->CP0_SRSConf4_rw_bitmask = env->cpu_model->CP0_SRSConf4_rw_bitmask;
 env->CP0_SRSConf4 = env->cpu_model->CP0_SRSConf4;
+env->active_fpu.fcr0 = env->cpu_model->CP1_fcr0;
 env->insn_flags = env->cpu_model->insn_flags;
 
 #if defined(CONFIG_USER_ONLY)

[Qemu-devel] [PATCH] MIPS/GDB: Correct stub handling of CP1 FIR


 The CP1 FIR register is read-only, ignore any write attempts from the GDB 
stub.

Signed-off-by: Maciej W. Rozycki 
---

 Definitely obvious, please apply.

  Maciej

qemu-mips-fir.diff
Index: qemu-git-trunk/gdbstub.c
===
--- qemu-git-trunk.orig/gdbstub.c   2012-06-08 01:11:04.0 +0100
+++ qemu-git-trunk/gdbstub.c2012-06-08 01:42:22.86558 +0100
@@ -1130,7 +1130,9 @@ static int cpu_gdb_write_register(CPUMIP
 /* set rounding mode */
 RESTORE_ROUNDING_MODE;
 break;
-case 71: env->active_fpu.fcr0 = tmp; break;
+case 71:
+/* FIR is read-only.  Ignore writes.  */
+break;
 }
 return sizeof(target_ulong);
 }

[Qemu-devel] [PATCH] MIPS/system: MTC0 single-stepping PC update fix


 Some MTC0 (and possibly other) instructions switch to the BS_STOP state
to terminate the current translation block, so that the state transition
of the simulated CPU resulting from the CP0 operation takes effect with
the following instruction.  This happens for "mtc0 ,c0_config" for
example.

 While single-stepping this has a side-effect of not advancing the PC past
the instruction just executed; subsequent single-step traps will stop at
the same instruction repeatedly.  This is obviously incorrect and (with my
limited understanding of QEMU internals) is fixed easily as below, making
the old PC be kept only for the BS_EXCP (exception condition) state.

 Example:

(gdb) stepi
0x80004d24 in _start ()
5: x/i $pc
=> 0x80004d24 <_start+364>: mfc0t1,c0_config
(gdb)
0x80004d28 in _start ()
5: x/i $pc
=> 0x80004d28 <_start+368>: li  at,-8
(gdb)
0x80004d2c in _start ()
5: x/i $pc
=> 0x80004d2c <_start+372>: and t1,t1,at
(gdb)
0x80004d30 in _start ()
5: x/i $pc
=> 0x80004d30 <_start+376>: ori t1,t1,0x3
(gdb)
0x80004d34 in _start ()
5: x/i $pc
=> 0x80004d34 <_start+380>: mtc0t1,c0_config
(gdb)
0x80004d34 in _start ()
5: x/i $pc
=> 0x80004d34 <_start+380>: mtc0t1,c0_config
(gdb)
0x80004d34 in _start ()
5: x/i $pc
=> 0x80004d34 <_start+380>: mtc0t1,c0_config
(gdb)
0x80004d34 in _start ()
5: x/i $pc
=> 0x80004d34 <_start+380>: mtc0t1,c0_config
(gdb)

-- oops!

Signed-off-by: Maciej W. Rozycki 
---

 Please apply,

  Maciej

qemu-mips-mtc0-step.diff
Index: qemu-git-trunk/target-mips/translate.c
===
--- qemu-git-trunk.orig/target-mips/translate.c 2012-06-04 04:16:57.755560324 
+0100
+++ qemu-git-trunk/target-mips/translate.c  2012-06-04 05:01:42.435594656 
+0100
@@ -12494,7 +12494,7 @@ gen_intermediate_code_internal (CPUMIPSS
 if (tb->cflags & CF_LAST_IO)
 gen_io_end();
 if (env->singlestep_enabled && ctx.bstate != BS_BRANCH) {
-save_cpu_state(&ctx, ctx.bstate == BS_NONE);
+save_cpu_state(&ctx, ctx.bstate != BS_EXCP);
 gen_helper_0i(raise_exception, EXCP_DEBUG);
 } else {
 switch (ctx.bstate) {

[Qemu-devel] [RFC] QOMification of AXI stream

2012-06-07 Thread Peter Crosthwaite

Hi all,

Im looking to QOMifying and refactoring the AXI stream interfaces
between the AXI ethernet and AXI DMA modules. I could use some
guidance on how to do this as I can think of about 6 different
solutions. Sources are hw/xilinx_axienet.c and hw/xilinx_axidma.c.

First ill start off by describing the real hardware:

Each of the two core has three interfaces (+interrupt pins):

1: Sysbus attachment for device control
2: AXI stream TX link
3: AXI stream RX link

Ethernet packet data is transferred from the ethernet device to/from
memory via the AXI stream links and the DMA core. Basically the DMA
core can be summed up as simply taking data to/from memory and putting
to/from the axi stream links. Axi stream is a trival point to point
protocol that allows for pushing 32-bit data words at a time.

>From an architecture point of view, the TX and RX links are completely
independent of each other. It doesnt make a lot of sense to have tx or
rx without the other for the ethernet with DMA case, but other
applications of the DMA could use only one of tx and rx. For this
reason I think its best we decouple the tx/rx pair. Currently it is
coupled in qemu (hw/xilinx_axdma.h):

struct XilinxDMAConnection {
void *dma;
void *client;

DMAPushFn to_dma;
DMAPushFn to_client;
};

So what im proposing is AXI stream is implemented as a unidirectional
point to point bus. The xilinx ethernet system would consist of two of
these buses one for tx, one for rx.

Onto the QOM stuff:

Currently the DMA interconnect is handled as this struct I pasted
above and a QDEV_PROP_PTR (which i understand is evil). The
interconnect mechanism obviously needs to change. So lets assume that
AXI stream is turned into a proper QEMU bus and devices can create
sub-busses which they are the tx'ing master:

s->axi_stream_master = axi_stream_create_bus(&dev->qdev, "axi_stream");

Machine models can grab the bus to attach slaves:

foo = qdev_get_child_bus(dev, "axi_stream");

Where my thinking goes pear shaped though is having proper QOMified
slaves. Each IP is a slave to both the sysbus and their respective
rx'ing AXI stream bus. This is something of a multiple inheritance
problem, I cant inherit from both SYSBUS and AXI_STREAM_SLAVE. So to
overcome this should I ...

A: Make AXI_STREAM_SLAVE an interface (not a sub-class of DEVICE). Its
kind of annoying though if someone in the future whats the create a
device thats only and axi stream slave, as they would have to
explicitly inherit from DEVICE as well.

or

B: Have the slave attachment be a device within a device. Hard part is
getting an accessor so machine models can retrieve the slave
attachment and hook it up.

Let me know what to do,

Regards,
Peter

[Qemu-devel] [PATCH] MIPS: Correct branch-likely single-stepping

From: Nathan Froyd 

 We have a problem with single-stepping branch-likely instructions.  
Here's Nathan's original note:

"[This] is a problem with single-stepping in QEMU: it manifests as
the program corrupting the register set--specifically the return
address--and going into an infinite loop.  The problem is that we were
not correctly saving state when single-stepping over branch likely
instructions.  In the program, we had this sequence:

  0x8000b328:  bnezlv0,0x8000b318
  0x8000b32c:  lw   v0,0(s1)# branch delay slot
  0x8000b330:  lw   ra,28(sp)

The cause of the problem was the QEMU sets a flag in its internal
translation state indicating that we had previously translated a branch
likely instruction.  When we generated the "skip over instruction" for a
not-taken branch, this flag was not correctly cleared for the beginning
of the next translation block.  The result was that we skipped the
instruction at 0x8000b32c (good) *and* the instruction at 0x8000b330
(bad).  $ra therefore never got restored."

 I have verified the problem is still there, here's a relevant raw GDB 
session (addresses are different, but code is essentially the same):

(gdb) continue
Continuing.

Breakpoint 2, 0x8000b460 in __libc_init_array ()
4: /x $ra = 0x8000b460
2: x/i $pc
=> 0x8000b460 <__libc_init_array+124>:  sltuv0,s0,s2
(gdb) stepi
0x8000b464 in __libc_init_array ()
4: /x $ra = 0x8000b460
2: x/i $pc
=> 0x8000b464 <__libc_init_array+128>:
bnezl   v0,0x8000b454 <__libc_init_array+112>
   0x8000b468 <__libc_init_array+132>:  lw  v0,0(s1)
(gdb)
0x8000b46c in __libc_init_array ()
4: /x $ra = 0x8000b460
2: x/i $pc
=> 0x8000b46c <__libc_init_array+136>:  lw  ra,28(sp)
(gdb)
0x8000b470 in __libc_init_array ()
4: /x $ra = 0x8000b460
2: x/i $pc
=> 0x8000b470 <__libc_init_array+140>:  lw  s2,24(sp)
(gdb)

-- oops! -- $ra still the same!  Fixed with Nathan's change:

(gdb) continue
Continuing.

Breakpoint 2, 0x8000b460 in __libc_init_array ()
4: /x $ra = 0x8000b460
2: x/i $pc
=> 0x8000b460 <__libc_init_array+124>:  sltuv0,s0,s2
(gdb) stepi
0x8000b464 in __libc_init_array ()
4: /x $ra = 0x8000b460
2: x/i $pc
=> 0x8000b464 <__libc_init_array+128>:
bnezl   v0,0x8000b454 <__libc_init_array+112>
   0x8000b468 <__libc_init_array+132>:  lw  v0,0(s1)
(gdb)
0x8000b46c in __libc_init_array ()
4: /x $ra = 0x8000b460
2: x/i $pc
=> 0x8000b46c <__libc_init_array+136>:  lw  ra,28(sp)
(gdb)
0x8000b470 in __libc_init_array ()
4: /x $ra = 0x8000891c
2: x/i $pc
=> 0x8000b470 <__libc_init_array+140>:  lw  s2,24(sp)
(gdb)

Signed-off-by: Maciej W. Rozycki 
---

 Sent on behalf of Nathan, who's since left the company.  Please apply.

  Maciej

qemu-mips-blikely.diff
Index: qemu-git-trunk/target-mips/translate.c
===
--- qemu-git-trunk.orig/target-mips/translate.c 2012-06-04 05:02:44.015407154 
+0100
+++ qemu-git-trunk/target-mips/translate.c  2012-06-04 05:02:45.355612652 
+0100
@@ -11699,11 +11699,17 @@ static void decode_opc (CPUMIPSState *en
 /* Handle blikely not taken case */
 if ((ctx->hflags & MIPS_HFLAG_BMASK_BASE) == MIPS_HFLAG_BL) {
 int l1 = gen_new_label();
+uint32_t saved_hflags;
 
 MIPS_DEBUG("blikely condition (" TARGET_FMT_lx ")", ctx->pc + 4);
 tcg_gen_brcondi_tl(TCG_COND_NE, bcond, 0, l1);
 tcg_gen_movi_i32(hflags, ctx->hflags & ~MIPS_HFLAG_BMASK);
+/* Fake saving hflags so that gen_goto_tb doesn't overwrite the
+ * hflags we saved above.  */
+saved_hflags = ctx->saved_hflags;
+ctx->saved_hflags = ctx->hflags;
 gen_goto_tb(ctx, 1, ctx->pc + 4);
+ctx->saved_hflags = saved_hflags;
 gen_set_label(l1);
 }

[Qemu-devel] [PATCH] MIPS/GDB: Correct stub handling of CP0 Status and Cause


 This change fixes the GDB stub such that write requests to the CP0 Status 
and Config registers:

1. Respect the r/w mask and do not change read-only bits.

2. Correctly execute any side effects, for example enable or disable 
   coprocessors, assert or clear software interrupts, etc.

In practice this change just abstracts code that used to live in 
helper_mtc0_status and mtc0_cause to cpu_mips_store_status and 
cpu_mips_store_cause respectively and wires the new functions to 
cpu_gdb_write_register, helper_mtc0_status, helper_mtc0_cause and 
helper_mttc0_cause as applicable.  To support that rearrangement shared 
code has been moved to a common header.

 I have verified this code manually to work correctly under GDB, I have 
checked register masks to work as expected, and the Status CU1 and FR bits 
to have the desired effects.

 I tried to trigger a software interrupt too by setting Cause to 0x300 and 
then Status to 0x201, and then making a few single steps, but that didn't 
cause the interrupt exception to be taken for some reason.  That does not 
appear to be a problem with my change though.  Perhaps there is a bug 
elsewhere.

Signed-off-by: Maciej W. Rozycki 
---

 According to checkpatch.pl this switch block in cpu_gdb_write_register 
should be rewritten, however I have refrained from doing that as a part of 
this change as it looks to me that the block is large enough to qualify 
for a separate change to do that.  Please apply.

  Maciej

qemu-mips-status.diff
Index: qemu-git-trunk/gdbstub.c
===
--- qemu-git-trunk.orig/gdbstub.c   2012-06-07 03:20:08.0 +0100
+++ qemu-git-trunk/gdbstub.c2012-06-08 01:11:04.115609380 +0100
@@ -1135,11 +1135,11 @@ static int cpu_gdb_write_register(CPUMIP
 return sizeof(target_ulong);
 }
 switch (n) {
-case 32: env->CP0_Status = tmp; break;
+case 32: cpu_mips_store_status(env, tmp); break;
 case 33: env->active_tc.LO[0] = tmp; break;
 case 34: env->active_tc.HI[0] = tmp; break;
 case 35: env->CP0_BadVAddr = tmp; break;
-case 36: env->CP0_Cause = tmp; break;
+case 36: cpu_mips_store_cause(env, tmp); break;
 case 37:
 env->active_tc.PC = tmp & ~(target_ulong)1;
 if (tmp & 1) {
Index: qemu-git-trunk/target-mips/cpu.h
===
--- qemu-git-trunk.orig/target-mips/cpu.h   2012-06-07 21:16:21.0 
+0100
+++ qemu-git-trunk/target-mips/cpu.h2012-06-08 01:27:20.245637475 +0100
@@ -802,4 +802,79 @@ static inline void compute_hflags(CPUMIP
 }
 }
 
+/* Called for updates to CP0_Status.  */
+static inline void sync_c0_status(CPUMIPSState *env, int tc)
+{
+int32_t tcstatus, *tcst;
+uint32_t v = env->CP0_Status;
+uint32_t cu, mx, asid, ksu;
+uint32_t mask = ((1 << CP0TCSt_TCU3)
+   | (1 << CP0TCSt_TCU2)
+   | (1 << CP0TCSt_TCU1)
+   | (1 << CP0TCSt_TCU0)
+   | (1 << CP0TCSt_TMX)
+   | (3 << CP0TCSt_TKSU)
+   | (0xff << CP0TCSt_TASID));
+
+cu = (v >> CP0St_CU0) & 0xf;
+mx = (v >> CP0St_MX) & 0x1;
+ksu = (v >> CP0St_KSU) & 0x3;
+asid = env->CP0_EntryHi & 0xff;
+
+tcstatus = cu << CP0TCSt_TCU0;
+tcstatus |= mx << CP0TCSt_TMX;
+tcstatus |= ksu << CP0TCSt_TKSU;
+tcstatus |= asid;
+
+if (tc == env->current_tc) {
+tcst = &env->active_tc.CP0_TCStatus;
+} else {
+tcst = &env->tcs[tc].CP0_TCStatus;
+}
+
+*tcst &= ~mask;
+*tcst |= tcstatus;
+compute_hflags(env);
+}
+
+static inline void cpu_mips_store_status(CPUMIPSState *env, target_ulong val)
+{
+uint32_t mask = env->CP0_Status_rw_bitmask;
+
+env->CP0_Status = (env->CP0_Status & ~mask) | (val & mask);
+if (env->CP0_Config3 & (1 << CP0C3_MT)) {
+sync_c0_status(env, env->current_tc);
+} else {
+compute_hflags(env);
+}
+}
+
+static inline void cpu_mips_store_cause(CPUMIPSState *env, target_ulong val)
+{
+uint32_t mask = 0x00C00300;
+uint32_t old = env->CP0_Cause;
+int i;
+
+if (env->insn_flags & ISA_MIPS32R2) {
+mask |= 1 << CP0Ca_DC;
+}
+
+env->CP0_Cause = (env->CP0_Cause & ~mask) | (val & mask);
+
+if ((old ^ env->CP0_Cause) & (1 << CP0Ca_DC)) {
+if (env->CP0_Cause & (1 << CP0Ca_DC)) {
+cpu_mips_stop_count(env);
+} else {
+cpu_mips_start_count(env);
+}
+}
+
+/* Set/reset software interrupts */
+for (i = 0 ; i < 2 ; i++) {
+if ((old ^ env->CP0_Cause) & (1 << (CP0Ca_IP + i))) {
+cpu_mips_soft_irq(env, i, env->CP0_Cause & (1 << (CP0Ca_IP + i)));
+}
+}
+}
+
 #endif /* !defined (__MIPS_CPU_H__) */
Index: qemu-git-trunk/target-mips/op_helper.c
===
--- qemu-git-trunk.orig/target-mips/op_helper.c 2012-06

[Qemu-devel] [RFC PATCH 0/1] linux-user: Issue running applications through ld.so

2012-06-07 Thread Meador Inge

Hi All,

I am running into an issue where QEMU fails to map a target executable
due to hitting the lower limit on /proc/sys/vm/mmap_min_addr.  This normally
just works because of all the nice guest base probing we have in place:

$ cat /proc/sys/vm/mmap_min_addr 
4096
$ qemu-arm ./hello.out
Hello, World!

In cases where the executable is run through the glibc loader we are not so
lucky:

$ qemu-arm /path/to/lib/ld-2.15.so --library-path /path/to/lib/ ./hello.out 
./hello.out: error while loading shared libraries: ./hello.out: failed to map
segment from shared object: Permission denied

The reason is that we successfully load the loader (since it can be put
anywhere), but later ld.so goes to map in hello.out at a fixed address
and fails because that fixed address is bellow mmap_min_addr and it is
too late to fixup the guest base.

I am able to fix the issue by probing for the guest base when needed for
shared objects.  This worked for all the test cases I threw at it
(including running the gcc and glibc test suites through QEMU).  However,
I am not all that familiar with the Linux usermode pieces and would like
some feedback.

Thoughts?
 
Meador Inge (1):
  linux-user: Probe the guest base for shared objects when needed

 linux-user/elfload.c |3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

-- 
1.7.7.6

[Qemu-devel] [RFC PATCH 1/1] linux-user: Probe the guest base for shared objects when needed

2012-06-07 Thread Meador Inge

In some cases when running a shared library directly from QEMU
(e.g. ld.so) the guest base should still be probed so that
any images loaded later at fixed addresses by the target code
can still be mapped.

Signed-off-by: Meador Inge 
---
 linux-user/elfload.c |3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index f3b1552..c71c287 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -1443,6 +1443,7 @@ static void probe_guest_base(const char *image_name,
 goto exit_errmsg;
 }
 }
+have_guest_base = 1;
 qemu_log("Relocating guest address space from 0x"
  TARGET_ABI_FMT_lx " to 0x%lx\n",
  loaddr, real_start);
@@ -1528,6 +1529,8 @@ static void load_elf_image(const char *image_name, int 
image_fd,
 
 load_addr = loaddr;
 if (ehdr->e_type == ET_DYN) {
+if (loaddr < mmap_min_addr)
+probe_guest_base(image_name, loaddr, hiaddr);
 /* The image indicates that it can be loaded anywhere.  Find a
location that can hold the memory space required.  If the
image is pre-linked, LOADDR will be non-zero.  Since we do
-- 
1.7.7.6

Re: [Qemu-devel] [PATCH v3 08/16] target-or32: Add translation routines

2012-06-07 Thread Wei-Ren Chen

On Thu, Jun 07, 2012 at 05:21:04PM -0700, Richard Henderson wrote:
> On 2012-06-07 17:00, Jia Liu wrote:
> > TCGv_i32 sr_ove = tcg_temp_new_i32();
> 
> You need tcg_temp_local_new_i32 in order to last beyond the branches.
> 
> Frankly, it's often easier to handle division and its exceptions via
> an out-of-line handler.
 ^^^

  I guess you mean helper function?

Regards,
chenwj
-- 
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj

Re: [Qemu-devel] [PATCH v3 08/16] target-or32: Add translation routines

2012-06-07 Thread Jia Liu

Hi Richard,

On Fri, Jun 8, 2012 at 8:21 AM, Richard Henderson  wrote:
> On 2012-06-07 17:00, Jia Liu wrote:
>>                 TCGv_i32 sr_ove = tcg_temp_new_i32();
>
> You need tcg_temp_local_new_i32 in order to last beyond the branches.
>
> Frankly, it's often easier to handle division and its exceptions via
> an out-of-line handler.
>

Thank you very much, you always teach me new things :-)

And, I've fix them.

>
> r~

Regards,
Jia.

[Qemu-devel] buildbot failure in qemu on block_mingw32

2012-06-07 Thread qemu

The Buildbot has detected a new failure on builder block_mingw32 while building 
qemu.
Full details are available at:
 http://buildbot.b1-systems.de/qemu/builders/block_mingw32/builds/237

Buildbot URL: http://buildbot.b1-systems.de/qemu/

Buildslave for this Build: kraxel_rhel61

Build Reason: The Nightly scheduler named 'nightly_block' triggered this build
Build Source Stamp: [branch block] HEAD
Blamelist: 

BUILD FAILED: failed compile

sincerely,
 -The Buildbot

Re: [Qemu-devel] [PATCH qom-next 6/7] qom: Add "realized" property


On 06/08/2012 03:31 AM, Andreas Färber wrote:

From: Paolo Bonzini

Since we had to move the state field from DeviceState to Object, we cannot
delay the implementation of the "realized" property.  The property is
a trigger for two actions that propagate through the composition tree.
"Realize" is called when the property becomes true, and propagates in
pre-order; realize can fail if the values of the properties are not valid.
"Unrealize" is called when the property becomes false, and propagates in
post-order; unrealize cannot fail.

Realize/unrealize is separate from reset.  Reset propagation is a thorny
issue of its own.  We expect classes that care to implement a reset method
and call it from realize or realize_children, depending on whether
pre-order or post-order is more appropriate.

This patch adds four methods (realize, realize_children, unrealize,
unrealize_children) to ObjectClass, together with a default implementation
of realize_children and unrealize_children.

Signed-off-by: Paolo Bonzini
Signed-off-by: Andreas Färber


Reviewed-by: Anthony Liguori 

Regards,

Anthony Liguori


---
  include/qemu/object.h |   20 +++
  qom/object.c  |   89 +
  2 files changed, 109 insertions(+), 0 deletions(-)

diff --git a/include/qemu/object.h b/include/qemu/object.h
index 4ea1187..05ea711 100644
--- a/include/qemu/object.h
+++ b/include/qemu/object.h
@@ -246,6 +246,10 @@ struct ObjectClass
  /*<  public>*/
  Property *props;
  const char *(*get_id)(Object *);
+void (*realize)(Object *obj, struct Error **errp);
+void (*realize_children)(Object *obj, struct Error **errp);
+void (*unrealize)(Object *obj);
+void (*unrealize_children)(Object *obj);
  };

  typedef enum ObjectState {
@@ -464,6 +468,22 @@ Object *object_new_with_type(Type type);
  void object_delete(Object *obj);

  /**
+ * object_realize_children:
+ * @obj: The object whose children should be realized.
+ *
+ * The default implementation of realize_children.
+ */
+void object_realize_children(Object *obj, struct Error **errp);
+
+/**
+ * object_unrealize_children:
+ * @obj: The object whose children should be unrealize.
+ *
+ * The default implementation of unrealize_children.
+ */
+void object_unrealize_children(Object *obj);
+
+/**
   * object_initialize_with_type:
   * @obj: A pointer to the memory to be used for the object.
   * @type: The type of the object to instantiate.
diff --git a/qom/object.c b/qom/object.c
index a639348..40bc23a 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -265,6 +265,87 @@ static void object_interface_init(Object *obj, 
InterfaceImpl *iface)
  obj->interfaces = g_slist_prepend(obj->interfaces, iface_obj);
  }

+static void object_get_realized(Object *obj, Visitor *v, void *opaque,
+const char *name, Error **errp)
+{
+bool value = object_is_realized(obj);
+
+visit_type_bool(v,&value, name, errp);
+}
+
+static void object_unrealize(Object *obj)
+{
+ObjectClass *klass = object_get_class(obj);
+
+if (klass->unrealize_children) {
+klass->unrealize_children(obj);
+}
+if (obj->state != OBJECT_STATE_INITIALIZED&&  klass->unrealize) {
+klass->unrealize(obj);
+}
+obj->state = OBJECT_STATE_INITIALIZED;
+}
+
+static int object_unrealize_one(Object *obj, void *unused)
+{
+object_unrealize(obj);
+return 0;
+}
+
+void object_unrealize_children(Object *obj)
+{
+object_child_foreach(obj, object_unrealize_one, NULL);
+}
+
+static void object_realize(Object *obj, Error **errp)
+{
+ObjectClass *klass = object_get_class(obj);
+
+if (obj->state != OBJECT_STATE_REALIZED&&  klass->realize) {
+klass->realize(obj, errp);
+}
+obj->state = OBJECT_STATE_REALIZED;
+if (klass->realize_children) {
+klass->realize_children(obj, errp);
+}
+}
+
+static int object_realize_one(Object *obj, void *errp)
+{
+Error *err = NULL;
+object_realize(obj,&err);
+if (err) {
+error_propagate((Error **)errp, err);
+return 1;
+}
+
+return 0;
+}
+
+void object_realize_children(Object *obj, Error **errp)
+{
+object_child_foreach(obj, object_realize_one, errp);
+}
+
+static void object_set_realized(Object *obj, Visitor *v, void *opaque,
+const char *name, Error **errp)
+{
+bool value;
+Error *err = NULL;
+
+visit_type_bool(v,&value, name,&err);
+if (err) {
+error_propagate(errp, err);
+return;
+}
+
+if (value) {
+object_realize(obj, errp);
+} else {
+object_unrealize(obj);
+}
+}
+
  static void object_init_with_type(Object *obj, TypeImpl *ti)
  {
  int i;
@@ -373,6 +454,8 @@ void object_unparent(Object *obj)

  static void object_deinit(Object *obj, TypeImpl *type)
  {
+object_property_set_bool(obj, false, "realized", NULL);
+
  if (type->instance_finalize) {
  type->instance_finalize(obj);

Re: [Qemu-devel] [PATCH qom-next 4/7] qdev: Move bulk of qdev-properties.c to qom/object-properties.c


On 06/08/2012 03:31 AM, Andreas Färber wrote:

From: Paolo Bonzini

Signed-off-by: Paolo Bonzini
[AF: Move to new qom/object-properties.c, update documentation.]
Signed-off-by: Andreas Färber


Reviewed-by: Anthony Liguori 

Regards,

Anthony Liguori


---
  hw/qdev-properties.c|  487 +--
  hw/qdev.c   |   47 +-
  hw/qdev.h   |   87 -
  include/qemu/object.h   |   98 ++
  qom/Makefile|2 +-
  qom/object-properties.c |  461 
  6 files changed, 607 insertions(+), 575 deletions(-)
  create mode 100644 qom/object-properties.c

diff --git a/hw/qdev-properties.c b/hw/qdev-properties.c
index 910e07f..5187604 100644
--- a/hw/qdev-properties.c
+++ b/hw/qdev-properties.c
@@ -3,392 +3,27 @@
  #include "qerror.h"
  #include "blockdev.h"

-void *object_get_prop_ptr(Object *obj, Property *prop)
-{
-void *ptr = obj;
-ptr += prop->offset;
-return ptr;
-}
-
-static uint32_t get_prop_mask(Property *prop)
-{
-assert(prop->info ==&qdev_prop_bit);
-return 0x1<<  prop->bitnr;
-}
-
-static void bit_prop_set(Object *obj, Property *props, bool val)
-{
-uint32_t *p = object_get_prop_ptr(obj, props);
-uint32_t mask = get_prop_mask(props);
-if (val)
-*p |= mask;
-else
-*p&= ~mask;
-}
-
-/* Bit */
-
-static int print_bit(Object *obj, Property *prop, char *dest, size_t len)
-{
-uint32_t *p = object_get_prop_ptr(obj, prop);
-return snprintf(dest, len, (*p&  get_prop_mask(prop)) ? "on" : "off");
-}
-
-static void get_bit(Object *obj, Visitor *v, void *opaque,
-const char *name, Error **errp)
-{
-Property *prop = opaque;
-uint32_t *p = object_get_prop_ptr(obj, prop);
-bool value = (*p&  get_prop_mask(prop)) != 0;
-
-visit_type_bool(v,&value, name, errp);
-}
-
-static void set_bit(Object *obj, Visitor *v, void *opaque,
-const char *name, Error **errp)
-{
-Property *prop = opaque;
-Error *local_err = NULL;
-bool value;
-
-if (object_is_realized(obj)) {
-error_set(errp, QERR_PERMISSION_DENIED);
-return;
-}
-
-visit_type_bool(v,&value, name,&local_err);
-if (local_err) {
-error_propagate(errp, local_err);
-return;
-}
-bit_prop_set(obj, prop, value);
-}
-
-PropertyInfo qdev_prop_bit = {
-.name  = "boolean",
-.legacy_name  = "on/off",
-.print = print_bit,
-.get   = get_bit,
-.set   = set_bit,
-};
-
-/* --- 8bit integer --- */
-
-static void get_uint8(Object *obj, Visitor *v, void *opaque,
-  const char *name, Error **errp)
-{
-Property *prop = opaque;
-uint8_t *ptr = object_get_prop_ptr(obj, prop);
-
-visit_type_uint8(v, ptr, name, errp);
-}
-
-static void set_uint8(Object *obj, Visitor *v, void *opaque,
-  const char *name, Error **errp)
-{
-Property *prop = opaque;
-uint8_t *ptr = object_get_prop_ptr(obj, prop);
-
-if (object_is_realized(obj)) {
-error_set(errp, QERR_PERMISSION_DENIED);
-return;
-}
-
-visit_type_uint8(v, ptr, name, errp);
-}
-
-PropertyInfo qdev_prop_uint8 = {
-.name  = "uint8",
-.get   = get_uint8,
-.set   = set_uint8,
-};
-
-/* --- 8bit hex value --- */
-
-static int parse_hex8(Object *obj, Property *prop, const char *str)
-{
-uint8_t *ptr = object_get_prop_ptr(obj, prop);
-char *end;
-
-if (str[0] != '0' || str[1] != 'x') {
-return -EINVAL;
-}
-
-*ptr = strtoul(str,&end, 16);
-if ((*end != '\0') || (end == str)) {
-return -EINVAL;
-}
-
-return 0;
-}
-
-static int print_hex8(Object *obj, Property *prop, char *dest, size_t len)
-{
-uint8_t *ptr = object_get_prop_ptr(obj, prop);
-return snprintf(dest, len, "0x%" PRIx8, *ptr);
-}
-
-PropertyInfo qdev_prop_hex8 = {
-.name  = "uint8",
-.legacy_name  = "hex8",
-.parse = parse_hex8,
-.print = print_hex8,
-.get   = get_uint8,
-.set   = set_uint8,
-};
-
-/* --- 16bit integer --- */
-
-static void get_uint16(Object *obj, Visitor *v, void *opaque,
-   const char *name, Error **errp)
-{
-Property *prop = opaque;
-uint16_t *ptr = object_get_prop_ptr(obj, prop);
-
-visit_type_uint16(v, ptr, name, errp);
-}
-
-static void set_uint16(Object *obj, Visitor *v, void *opaque,
-   const char *name, Error **errp)
-{
-Property *prop = opaque;
-uint16_t *ptr = object_get_prop_ptr(obj, prop);
-
-if (object_is_realized(obj)) {
-error_set(errp, QERR_PERMISSION_DENIED);
-return;
-}
-
-visit_type_uint16(v, ptr, name, errp);
-}
-
-PropertyInfo qdev_prop_uint16 = {
-.name  = "uint16",
-.get   = get_uint16,
-.set   = set_uint16,
-};
-
-/* --- 32bit integer --- */
-
-static void get_uint32(Object *obj, Visitor *v, void *opaque,
-   const char *name, Error **errp)

Re: [Qemu-devel] [PATCH qom-next 3/7] qdev: Generalize properties to Objects


On 06/08/2012 03:31 AM, Andreas Färber wrote:

From: Paolo Bonzini

The property machinery uses DeviceState arguments in a few places.
Replace this with Object so that we can push properties up.

Signed-off-by: Paolo Bonzini
[AF: Fixed indentation in set_taddr().]
Signed-off-by: Andreas Färber


Reviewed-by; Anthony Liguori 

Regards,

Anthony Liguori


---
  hw/qdev-addr.c   |   19 ++---
  hw/qdev-properties.c |  180 +
  hw/qdev.c|8 +--
  hw/qdev.h|   10 ++--
  4 files changed, 93 insertions(+), 124 deletions(-)

diff --git a/hw/qdev-addr.c b/hw/qdev-addr.c
index a3796bd..cecae59 100644
--- a/hw/qdev-addr.c
+++ b/hw/qdev-addr.c
@@ -5,26 +5,25 @@

  /* --- target physical address --- */

-static int parse_taddr(DeviceState *dev, Property *prop, const char *str)
+static int parse_taddr(Object *obj, Property *prop, const char *str)
  {
-target_phys_addr_t *ptr = qdev_get_prop_ptr(dev, prop);
+target_phys_addr_t *ptr = object_get_prop_ptr(obj, prop);

  *ptr = strtoull(str, NULL, 16);
  return 0;
  }

-static int print_taddr(DeviceState *dev, Property *prop, char *dest, size_t 
len)
+static int print_taddr(Object *obj, Property *prop, char *dest, size_t len)
  {
-target_phys_addr_t *ptr = qdev_get_prop_ptr(dev, prop);
+target_phys_addr_t *ptr = object_get_prop_ptr(obj, prop);
  return snprintf(dest, len, "0x" TARGET_FMT_plx, *ptr);
  }

  static void get_taddr(Object *obj, Visitor *v, void *opaque,
const char *name, Error **errp)
  {
-DeviceState *dev = DEVICE(obj);
  Property *prop = opaque;
-target_phys_addr_t *ptr = qdev_get_prop_ptr(dev, prop);
+target_phys_addr_t *ptr = object_get_prop_ptr(obj, prop);
  int64_t value;

  value = *ptr;
@@ -34,9 +33,8 @@ static void get_taddr(Object *obj, Visitor *v, void *opaque,
  static void set_taddr(Object *obj, Visitor *v, void *opaque,
const char *name, Error **errp)
  {
-DeviceState *dev = DEVICE(obj);
  Property *prop = opaque;
-target_phys_addr_t *ptr = qdev_get_prop_ptr(dev, prop);
+target_phys_addr_t *ptr = object_get_prop_ptr(obj, prop);
  Error *local_err = NULL;
  int64_t value;

@@ -53,9 +51,8 @@ static void set_taddr(Object *obj, Visitor *v, void *opaque,
  if ((uint64_t)value<= (uint64_t) ~(target_phys_addr_t)0) {
  *ptr = value;
  } else {
-error_set(errp, QERR_PROPERTY_VALUE_OUT_OF_RANGE,
-  dev->id?:"", name, value, (uint64_t) 0,
-  (uint64_t) ~(target_phys_addr_t)0);
+error_set(errp, QERR_INVALID_PARAMETER_VALUE,
+  name, "target_phys_addr_t");
  }
  }

diff --git a/hw/qdev-properties.c b/hw/qdev-properties.c
index 4dc03f6..910e07f 100644
--- a/hw/qdev-properties.c
+++ b/hw/qdev-properties.c
@@ -3,23 +3,23 @@
  #include "qerror.h"
  #include "blockdev.h"

-void *qdev_get_prop_ptr(DeviceState *dev, Property *prop)
+void *object_get_prop_ptr(Object *obj, Property *prop)
  {
-void *ptr = dev;
+void *ptr = obj;
  ptr += prop->offset;
  return ptr;
  }

-static uint32_t qdev_get_prop_mask(Property *prop)
+static uint32_t get_prop_mask(Property *prop)
  {
  assert(prop->info ==&qdev_prop_bit);
  return 0x1<<  prop->bitnr;
  }

-static void bit_prop_set(DeviceState *dev, Property *props, bool val)
+static void bit_prop_set(Object *obj, Property *props, bool val)
  {
-uint32_t *p = qdev_get_prop_ptr(dev, props);
-uint32_t mask = qdev_get_prop_mask(props);
+uint32_t *p = object_get_prop_ptr(obj, props);
+uint32_t mask = get_prop_mask(props);
  if (val)
  *p |= mask;
  else
@@ -28,19 +28,18 @@ static void bit_prop_set(DeviceState *dev, Property *props, 
bool val)

  /* Bit */

-static int print_bit(DeviceState *dev, Property *prop, char *dest, size_t len)
+static int print_bit(Object *obj, Property *prop, char *dest, size_t len)
  {
-uint32_t *p = qdev_get_prop_ptr(dev, prop);
-return snprintf(dest, len, (*p&  qdev_get_prop_mask(prop)) ? "on" : "off");
+uint32_t *p = object_get_prop_ptr(obj, prop);
+return snprintf(dest, len, (*p&  get_prop_mask(prop)) ? "on" : "off");
  }

  static void get_bit(Object *obj, Visitor *v, void *opaque,
  const char *name, Error **errp)
  {
-DeviceState *dev = DEVICE(obj);
  Property *prop = opaque;
-uint32_t *p = qdev_get_prop_ptr(dev, prop);
-bool value = (*p&  qdev_get_prop_mask(prop)) != 0;
+uint32_t *p = object_get_prop_ptr(obj, prop);
+bool value = (*p&  get_prop_mask(prop)) != 0;

  visit_type_bool(v,&value, name, errp);
  }
@@ -48,7 +47,6 @@ static void get_bit(Object *obj, Visitor *v, void *opaque,
  static void set_bit(Object *obj, Visitor *v, void *opaque,
  const char *name, Error **errp)
  {
-DeviceState *dev = DEVICE(obj);
  Property *prop = opaque;
  Error *local_err = NULL;
  bo

Re: [Qemu-devel] [PATCH qom-next 2/7] qom: Add get_id


On 06/08/2012 03:31 AM, Andreas Färber wrote:

From: Paolo Bonzini

Some classes may present objects differently in errors, for example if they
are not part of the composition tree or if they are not assigned an id by
the user.  Let them do this with a get_id method on Object, and use the
method consistently where a %(device) appears in the error.

Signed-off-by: Paolo Bonzini
[AF: Renamed _object_get_id() to object_instance_get_id(), avoid ?:.]
[AF: Use object_property_is_child().]
Signed-off-by: Andreas Färber


Nack.

This creates confusion IMHO.  There's a big difference between an object 
typename and the path to the object.  I don't think we should confuse the two by 
introducing a third type of name and calling it something generic like id.





---
  hw/qdev-properties.c  |6 +++---
  hw/qdev.c |   15 ++-
  include/qemu/object.h |   11 +++
  qom/object.c  |   26 +-
  4 files changed, 53 insertions(+), 5 deletions(-)

diff --git a/hw/qdev-properties.c b/hw/qdev-properties.c
index fcc0bed..4dc03f6 100644
--- a/hw/qdev-properties.c
+++ b/hw/qdev-properties.c
@@ -937,16 +937,16 @@ void error_set_from_qdev_prop_error(Error **errp, int 
ret, DeviceState *dev,
  switch (ret) {
  case -EEXIST:
  error_set(errp, QERR_PROPERTY_VALUE_IN_USE,
-  object_get_typename(OBJECT(dev)), prop->name, value);
+  object_get_id(OBJECT(dev)), prop->name, value);
  break;
  default:
  case -EINVAL:
  error_set(errp, QERR_PROPERTY_VALUE_BAD,
-  object_get_typename(OBJECT(dev)), prop->name, value);
+  object_get_id(OBJECT(dev)), prop->name, value);
  break;
  case -ENOENT:
  error_set(errp, QERR_PROPERTY_VALUE_NOT_FOUND,
-  object_get_typename(OBJECT(dev)), prop->name, value);
+  object_get_id(OBJECT(dev)), prop->name, value);
  break;
  case 0:
  break;
diff --git a/hw/qdev.c b/hw/qdev.c
index c12e151..7304e4c 100644
--- a/hw/qdev.c
+++ b/hw/qdev.c
@@ -259,7 +259,7 @@ void qdev_init_nofail(DeviceState *dev)
  {
  if (qdev_init(dev)<  0) {
  error_report("Initialization of device %s failed",
- object_get_typename(OBJECT(dev)));
+ object_get_id(OBJECT(dev)));
  exit(1);
  }
  }
@@ -716,6 +716,13 @@ static void device_finalize(Object *obj)
  }
  }

+static const char *qdev_get_id(Object *obj)
+{
+DeviceState *dev = DEVICE(obj);
+
+return dev->id != NULL ? dev->id : object_get_typename(obj);
+}
+
  static void device_class_base_init(ObjectClass *class, void *data)
  {
  DeviceClass *klass = DEVICE_CLASS(class);
@@ -746,6 +753,11 @@ Object *qdev_get_machine(void)
  return dev;
  }

+static void device_class_init(ObjectClass *class, void *data)
+{
+class->get_id = qdev_get_id;
+}
+
  static TypeInfo device_type_info = {
  .name = TYPE_DEVICE,
  .parent = TYPE_OBJECT,
@@ -753,6 +765,7 @@ static TypeInfo device_type_info = {
  .instance_init = device_initfn,
  .instance_finalize = device_finalize,
  .class_base_init = device_class_base_init,
+.class_init = device_class_init,
  .abstract = true,
  .class_size = sizeof(DeviceClass),
  };
diff --git a/include/qemu/object.h b/include/qemu/object.h
index 1606777..81e0280 100644
--- a/include/qemu/object.h
+++ b/include/qemu/object.h
@@ -239,6 +239,9 @@ struct ObjectClass
  {
  /*<  private>*/
  Type type;
+
+/*<  public>*/
+const char *(*get_id)(Object *);
  };

  typedef enum ObjectState {
@@ -507,6 +510,14 @@ Object *object_dynamic_cast(Object *obj, const char 
*typename);
  Object *object_dynamic_cast_assert(Object *obj, const char *typename);

  /**
+ * object_get_id:
+ * @obj: A derivative of #Object
+ *
+ * Returns: A string that can be used to refer to @obj.
+ */
+const char *object_get_id(Object *obj);
+
+/**
   * object_get_class:
   * @obj: A derivative of #Object
   *
diff --git a/qom/object.c b/qom/object.c
index 93e0499..02464e1 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -346,6 +346,24 @@ static void object_property_del_child(Object *obj, Object 
*child, Error **errp)
  }
  }

+static const char *object_instance_get_id(Object *obj)
+{
+ObjectProperty *prop;
+
+QTAILQ_FOREACH(prop,&obj->properties, node) {
+if (object_property_is_child(prop)&&  prop->opaque == obj) {
+return prop->name;
+}
+}
+
+return "";
+}
+
+const char *object_get_id(Object *obj)
+{
+return obj->class->get_id(obj);
+}
+


We should use a canonical path IMHO instead of returning a partial name.

Partial names are ambiguous.

Regards,

Anthony Liguori

Re: [Qemu-devel] [PATCH qom-next 1/7] qdev: Push state up to Object


On 06/08/2012 03:30 AM, Andreas Färber wrote:

From: Paolo Bonzini

qdev properties use the state member (an embryo of the "realized"
property) in order to disable setting them after a device has been
initialized.  So, in order to push qdev properties up to Object
we need to push this bit there too.

Signed-off-by: Paolo Bonzini
[AF: Rename to OBJECT_STATE_INITIALIZED and set it after instance_init.]
Signed-off-by: Andreas Färber
---
  hw/qdev-addr.c|3 ++-
  hw/qdev-properties.c  |   26 +-
  hw/qdev.c |   11 +--
  hw/qdev.h |6 --
  include/qemu/object.h |   14 ++
  qom/object.c  |7 +++
  6 files changed, 41 insertions(+), 26 deletions(-)

diff --git a/hw/qdev-addr.c b/hw/qdev-addr.c
index b711b6b..a3796bd 100644
--- a/hw/qdev-addr.c
+++ b/hw/qdev-addr.c
@@ -1,3 +1,4 @@
+#include "qemu/object.h"
  #include "qdev.h"
  #include "qdev-addr.h"
  #include "targphys.h"
@@ -39,7 +40,7 @@ static void set_taddr(Object *obj, Visitor *v, void *opaque,
  Error *local_err = NULL;
  int64_t value;

-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
  error_set(errp, QERR_PERMISSION_DENIED);
  return;
  }
diff --git a/hw/qdev-properties.c b/hw/qdev-properties.c
index 099a7aa..fcc0bed 100644
--- a/hw/qdev-properties.c
+++ b/hw/qdev-properties.c
@@ -53,7 +53,7 @@ static void set_bit(Object *obj, Visitor *v, void *opaque,
  Error *local_err = NULL;
  bool value;

-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
  error_set(errp, QERR_PERMISSION_DENIED);
  return;
  }
@@ -93,7 +93,7 @@ static void set_uint8(Object *obj, Visitor *v, void *opaque,
  Property *prop = opaque;
  uint8_t *ptr = qdev_get_prop_ptr(dev, prop);

-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
  error_set(errp, QERR_PERMISSION_DENIED);
  return;
  }
@@ -160,7 +160,7 @@ static void set_uint16(Object *obj, Visitor *v, void 
*opaque,
  Property *prop = opaque;
  uint16_t *ptr = qdev_get_prop_ptr(dev, prop);

-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
  error_set(errp, QERR_PERMISSION_DENIED);
  return;
  }
@@ -193,7 +193,7 @@ static void set_uint32(Object *obj, Visitor *v, void 
*opaque,
  Property *prop = opaque;
  uint32_t *ptr = qdev_get_prop_ptr(dev, prop);

-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
  error_set(errp, QERR_PERMISSION_DENIED);
  return;
  }
@@ -218,7 +218,7 @@ static void set_int32(Object *obj, Visitor *v, void *opaque,
  Property *prop = opaque;
  int32_t *ptr = qdev_get_prop_ptr(dev, prop);

-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
  error_set(errp, QERR_PERMISSION_DENIED);
  return;
  }
@@ -291,7 +291,7 @@ static void set_uint64(Object *obj, Visitor *v, void 
*opaque,
  Property *prop = opaque;
  uint64_t *ptr = qdev_get_prop_ptr(dev, prop);

-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
  error_set(errp, QERR_PERMISSION_DENIED);
  return;
  }
@@ -379,7 +379,7 @@ static void set_string(Object *obj, Visitor *v, void 
*opaque,
  Error *local_err = NULL;
  char *str;

-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
  error_set(errp, QERR_PERMISSION_DENIED);
  return;
  }
@@ -457,7 +457,7 @@ static void set_pointer(Object *obj, Visitor *v, Property 
*prop,
  char *str;
  int ret;

-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
  error_set(errp, QERR_PERMISSION_DENIED);
  return;
  }
@@ -626,7 +626,7 @@ static void set_vlan(Object *obj, Visitor *v, void *opaque,
  int64_t id;
  VLANState *vlan;

-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
  error_set(errp, QERR_PERMISSION_DENIED);
  return;
  }
@@ -696,7 +696,7 @@ static void set_mac(Object *obj, Visitor *v, void *opaque,
  int i, pos;
  char *str, *p;

-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
  error_set(errp, QERR_PERMISSION_DENIED);
  return;
  }
@@ -766,7 +766,7 @@ static void set_enum(Object *obj, Visitor *v, void *opaque,
  Property *prop = opaque;
  int *ptr = qdev_get_prop_ptr(dev, prop);

-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
  error_set(errp, QERR_PERMISSION_DENIED);
  return;
  }
@@ -797,7 +797,7 @@ static void set_pci_devfn(Object *obj, Visitor *v, void 
*opaque,
  Error *local_err = NULL;
  char *str;

-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
  error_set(errp, QERR_PERMISSION_

Re: [Qemu-devel] [PATCH v3 08/16] target-or32: Add translation routines

On 2012-06-07 17:00, Jia Liu wrote:
> TCGv_i32 sr_ove = tcg_temp_new_i32();

You need tcg_temp_local_new_i32 in order to last beyond the branches.

Frankly, it's often easier to handle division and its exceptions via
an out-of-line handler.


r~

Re: [Qemu-devel] [PATCH v3 08/16] target-or32: Add translation routines

2012-06-07 Thread Jia Liu

Hi Max,

Thank you for your unaided eye look :-)

I've fixed them, and, I think, it will be good if you check them
before I make V4 pacthes.
So, please, use your unaided eye again.

On Thu, Jun 7, 2012 at 12:40 AM, Max Filippov  wrote:
> Hi Jia,
>
> more comments on remaining issues visible with unaided eye.
>
> On Wed, Jun 6, 2012 at 4:27 PM, Jia Liu  wrote:
>> Add OpenRISC translation routines.
>>
>> Signed-off-by: Jia Liu 
>> ---
>
> [...]
>
>> +    case 0x0009:
>> +        switch (op1) {
>> +        case 0x03:   /*l.div*/
>> +            LOG_DIS("l.div r%d, r%d, r%d\n", rd, ra, rb);
>> +            {
>> +                TCGv_i32 sr_ove;
>> +                int lab = gen_new_label();
>> +                sr_ove = tcg_temp_new();
>> +                tcg_gen_ori_tl(cpu_sr, cpu_sr, SR_OV);
>> +                tcg_gen_ori_tl(cpu_sr, cpu_sr, SR_CY);
>> +                tcg_gen_andi_tl(sr_ove, cpu_sr, SR_OVE);
>> +                if (rb == 0) {
>> +                    tcg_gen_brcondi_tl(TCG_COND_NE, sr_ove, SR_OVE, lab);
>> +                    gen_exception(dc, EXCP_RANGE);
>> +                    gen_set_label(lab);
>> +                } else {
>> +                    if (ra == 0x && rb == 0x8000) {
>
> Cannot do that: ra and rb are register numbers, not the values
> contained in these registers.
> Hence you need to generate code that will check these combinations of
> register values.
>

case 0x03:   /*l.div*/
LOG_DIS("l.div r%d, r%d, r%d\n", rd, ra, rb);
{
int lab0 = gen_new_label();
int lab1 = gen_new_label();
int lab2 = gen_new_label();
TCGv_i32 sr_ove = tcg_temp_new_i32();
tcg_gen_andi_tl(sr_ove, cpu_sr, SR_OVE);
if (rb == 0) {
tcg_gen_ori_tl(cpu_sr, cpu_sr, SR_OV);
tcg_gen_ori_tl(cpu_sr, cpu_sr, SR_CY);
tcg_gen_brcondi_tl(TCG_COND_NE, sr_ove, SR_OVE, lab0);
gen_exception(dc, EXCP_RANGE);
gen_set_label(lab0);
} else {
tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_R[rb],
   0x, lab1);
tcg_gen_brcondi_tl(TCG_COND_NE, cpu_R[ra],
   0x, lab2);
tcg_gen_brcondi_tl(TCG_COND_NE, cpu_R[rb],
   0x8000, lab2);
gen_set_label(lab1);
tcg_gen_ori_tl(cpu_sr, cpu_sr, SR_OV);
tcg_gen_ori_tl(cpu_sr, cpu_sr, SR_CY);
tcg_gen_brcondi_tl(TCG_COND_NE, sr_ove, SR_OVE, lab2);
gen_exception(dc, EXCP_RANGE);
gen_set_label(lab2);
tcg_gen_div_tl(cpu_R[rd], cpu_R[ra], cpu_R[rb]);
}
tcg_temp_free_i32(sr_ove);
}
break;


is this right?

>> +                        tcg_gen_brcondi_tl(TCG_COND_NE, sr_ove, SR_OVE, 
>> lab);
>> +                        gen_exception(dc, EXCP_RANGE);
>> +                        gen_set_label(lab);
>> +                    } else {
>> +                        tcg_gen_div_tl(cpu_R[rd], cpu_R[ra], cpu_R[rb]);
>> +                    }
>> +                }
>> +                tcg_temp_free(sr_ove);
>> +            }
>> +            break;
>> +
>> +        default:
>> +            gen_illegal_exception(dc);
>> +            break;
>> +        }
>> +        break;
>> +
>> +    case 0x000a:
>> +        switch (op1) {
>> +        case 0x03:   /*l.divu*/
>> +            LOG_DIS("l.divu r%d, r%d, r%d\n", rd, ra, rb);
>> +            if (rb == 0) {
>> +                TCGv_i32 sr_ove;
>> +                int lab = gen_new_label();
>> +                sr_ove = tcg_temp_new();
>> +                tcg_gen_ori_tl(cpu_sr, cpu_sr, SR_OV);
>> +                tcg_gen_ori_tl(cpu_sr, cpu_sr, SR_CY);
>> +                tcg_gen_andi_tl(sr_ove, cpu_sr, SR_OVE);
>> +                tcg_gen_brcondi_tl(TCG_COND_NE, sr_ove, SR_OVE, lab);
>> +                gen_exception(dc, EXCP_RANGE);
>> +                gen_set_label(lab);
>> +                tcg_temp_free(sr_ove);
>> +            } else if (rb != 0) {
>
> 'if (rb != 0)' and the following 'else' block are redundant here.
>
> I feel that I repeatedly fail to explain what's wrong with these div/divu
> implementations; could you please add testcases for l.div and l.divu
> that divide by the register other than r0 that contains 0 value?
>

and

case 0x03:   /*l.divu*/
LOG_DIS("l.divu r%d, r%d, r%d\n", rd, ra, rb);
{
int lab0 = gen_new_label();
int lab1 = gen_new_label();
TCGv_i32 sr_ove = tcg_temp_new();
tcg_gen_andi_tl(sr_ove, cpu_sr, SR_OVE);
if (rb == 0) {
tcg_gen_ori_tl(cpu_sr, cpu_sr, SR_OV);
tcg_gen_ori_tl(cpu_

Re: [Qemu-devel] [PATCH 0/3][v17] megasas: LSI Megaraid SAS HBA emulation

Il 29/05/2012 14:22, Paolo Bonzini ha scritto:
> Il 29/05/2012 13:51, Hannes Reinecke ha scritto:
>> This is an updated patchset for megasas. Upon popular demand
>> I've split it into three parts, the header file, the emulation
>> itself, and a patch adding trace events to the emulation.
>>
>> Paolo, can you merge it via your tree? Or should I ask
>> someone else?
> 
> Yes, of course.  I'll wait for an Acked-by or a couple of weeks,
> whatever comes first.

> Acked-by: Alexander Graf 
> Tested-by: Stefan Hajnoczi 

Ok, pull request coming. :)

Paolo

Re: [Qemu-devel] [PATCH qom-next 4/7] qdev: Move bulk of qdev-properties.c to qom/object-properties.c

Il 07/06/2012 21:31, Andreas Färber ha scritto:
>  qom/Makefile|2 +-

This will conflict (trivially) with the Makefile rewrite.

Paolo

Re: [Qemu-devel] [PATCH qom-next 0/7] QOM realize, revised

Il 07/06/2012 21:30, Andreas Färber ha scritto:
> Hi Paolo,
> 
> I've modified the remainder of your static properties series, in particular:
> 
> "qdev: Push state up to Object":
> * OBJECT_STATE_CREATED -> OBJECT_STATE_INITIALIZED, to align with QOM API
> * Don't set early in object_instance_init() but in object_init_with_type()
>   after all initfns have been run.
> 
> "qom: add get_id":
> * _object_get_id() -> object_instance_get_id(), to avoid underscore
> * Avoid GCC ?: expression, suggested by malc.
> * Use newly introduced object_property_is_child() helper.
> 
> "qdev: Generalize properties to Objects":
> * Fixed indentation.
> 
> "qdev: Move bulk of qdev-properties.c to qom/object-properties.c":
> * Documentation fix: qdev_property_add_static -> object_property_add_static
> * Move from hw/qdev-properties.c to a new qom/object-properties.c
>   instead of qom/object.c.
> 
> "qom: Push static properties to Object":
> * Build fix: Adapt arm_gic_properties in hw/arm_gic.c as well.
> 
> "qom: Add "realized" property":
> * Adapted to OBJECT_STATE_INITIALIZED.
> 
> "qom: Add QERR_PROPERTY_SET_AFTER_REALIZE":
> * Redid the hw/qdev-properties.c changes in qom/object-properties.c.
> 
> If you're okay with these, I'll append them to the qom-next queue and will
> send out the PULL.

Of course, thank you very much!

Paolo

Re: [Qemu-devel] [PULL] iov* function rework (one more time)

Il 07/06/2012 19:53, Michael Tokarev ha scritto:
> 
> This is the same patchset which has been submitted, resubmitted,
> rewritten, resubmitted, split, resubmitted, merged, rewritten again,
> resubmitted and finally received a promise from Anthony to be looked
> at.  Today, months later, I'm still awaiiting for the answer, and,
> while I said before that the last resubmission was, well, last,
> since I bothered so many people so many times, I decided to break
> my promise, rebase against current qemy/master and resend it,
> now as a git pull request, to not mailbomb people again.  The rebase
> took quite some work again, since the code changed (obviously) since
> the patchset was ready before.  During rebase I reviewed all the
> commit messages too, and removed all the Cc lines they had.

I'll review the patches and hopefully send my Reviewed-by, since I
actually liked the idea.  But I'm travelling so I will only be able to
send the email on Monday.

Paolo

Re: [Qemu-devel] [PATCH v3 06/29] build: move libobj-y variable to nested Makefile.objs

Il 07/06/2012 23:10, Blue Swirl ha scritto:
>> diff --git a/target-sparc/Makefile.objs b/target-sparc/Makefile.objs
>> index c574c9e..3556d13 100644
>> --- a/target-sparc/Makefile.objs
>> +++ b/target-sparc/Makefile.objs
>> @@ -1 +1,7 @@
>> -# still empty
>> +obj-y += helper.o cpu.o
>> +obj-y += fop_helper.o cc_helper.o win_helper.o mmu_helper.o ldst_helper.o
>> +obj-$(TARGET_SPARC) += int32_helper.o
>> +obj-$(TARGET_SPARC64) += int64_helper.o
>> +obj-$(TARGET_SPARC64) += vis_helper.o
>> +
>> +$(obj)/op_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
> 
> Please remove.

Fixed, updated branch to commit 067ca6b.  Thanks.

Paolo

[Qemu-devel] [PATCH 3/9] alpha-linux-user: Handle TARGET_SSI_IEEE_RAISE_EXCEPTION properly

We weren't aggregating the exceptions, nor raising signals properly.

Signed-off-by: Richard Henderson 
---
 linux-user/syscall.c |   61 +
 1 files changed, 51 insertions(+), 10 deletions(-)

diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 539af3f..1cbbfbf 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -7699,13 +7699,13 @@ abi_long do_syscall(void *cpu_env, int num, abi_long 
arg1,
 ret = -TARGET_EOPNOTSUPP;
 switch (arg1) {
   case TARGET_SSI_IEEE_FP_CONTROL:
-  case TARGET_SSI_IEEE_RAISE_EXCEPTION:
 {
 uint64_t swcr, fpcr, orig_fpcr;
 
-if (get_user_u64 (swcr, arg2))
+if (get_user_u64 (swcr, arg2)) {
 goto efault;
-orig_fpcr = cpu_alpha_load_fpcr (cpu_env);
+}
+orig_fpcr = cpu_alpha_load_fpcr(cpu_env);
 fpcr = orig_fpcr & FPCR_DYN_MASK;
 
 /* Copied from linux ieee_swcr_to_fpcr.  */
@@ -7719,16 +7719,57 @@ abi_long do_syscall(void *cpu_env, int num, abi_long 
arg1,
 fpcr |= (swcr & SWCR_MAP_UMZ ? FPCR_UNDZ | FPCR_UNFD : 0);
 fpcr |= (~swcr & SWCR_TRAP_ENABLE_DNO) << 41;
 
-cpu_alpha_store_fpcr (cpu_env, fpcr);
+cpu_alpha_store_fpcr(cpu_env, fpcr);
 ret = 0;
+}
+break;
+
+  case TARGET_SSI_IEEE_RAISE_EXCEPTION:
+{
+uint64_t exc, fpcr, orig_fpcr;
+int si_code;
+
+if (get_user_u64(exc, arg2)) {
+goto efault;
+}
 
-if (arg1 == TARGET_SSI_IEEE_RAISE_EXCEPTION) {
-/* Old exceptions are not signaled.  */
-fpcr &= ~(orig_fpcr & FPCR_STATUS_MASK);
+orig_fpcr = cpu_alpha_load_fpcr(cpu_env);
 
-/* If any exceptions set by this call, and are unmasked,
-   send a signal.  */
-/* ??? FIXME */
+/* We only add to the exception status here.  */
+fpcr = orig_fpcr | ((exc & SWCR_STATUS_MASK) << 35);
+
+cpu_alpha_store_fpcr(cpu_env, fpcr);
+ret = 0;
+
+/* Old exceptions are not signaled.  */
+fpcr &= ~(orig_fpcr & FPCR_STATUS_MASK);
+
+/* If any exceptions set by this call,
+   and are unmasked, send a signal.  */
+si_code = 0;
+if ((fpcr & (FPCR_INE | FPCR_INED)) == FPCR_INE) {
+si_code = TARGET_FPE_FLTRES;
+}
+if ((fpcr & (FPCR_UNF | FPCR_UNFD)) == FPCR_UNF) {
+si_code = TARGET_FPE_FLTUND;
+}
+if ((fpcr & (FPCR_OVF | FPCR_OVFD)) == FPCR_OVF) {
+si_code = TARGET_FPE_FLTOVF;
+}
+if ((fpcr & (FPCR_DZE | FPCR_DZED)) == FPCR_DZE) {
+si_code = TARGET_FPE_FLTDIV;
+}
+if ((fpcr & (FPCR_INV | FPCR_INVD)) == FPCR_INV) {
+si_code = TARGET_FPE_FLTINV;
+}
+if (si_code != 0) {
+target_siginfo_t info;
+info.si_signo = SIGFPE;
+info.si_errno = 0;
+info.si_code = si_code;
+info._sifields._sigfault._addr
+= ((CPUArchState *)cpu_env)->pc;
+queue_signal((CPUArchState *)cpu_env, info.si_signo, 
&info);
 }
 }
 break;
-- 
1.7.7.6

[Qemu-devel] [PATCH 4/9] linux-user: Handle O_SYNC, O_NOATIME, O_CLOEXEC, O_PATH

And tidy up syscall_defs.h a little bit.  For each target, only
define the bits in arch/target/include/asm/fcntl.h, leaving the
others to a new asm-generic section below.

Signed-off-by: Richard Henderson 
---
 linux-user/strace.c   |   12 +++-
 linux-user/syscall.c  |   15 +++-
 linux-user/syscall_defs.h |  195 +---
 3 files changed, 118 insertions(+), 104 deletions(-)

diff --git a/linux-user/strace.c b/linux-user/strace.c
index 05a0d3e..6ec90e8 100644
--- a/linux-user/strace.c
+++ b/linux-user/strace.c
@@ -371,11 +371,21 @@ UNUSED static struct flags open_flags[] = {
 FLAG_TARGET(O_NOCTTY),
 FLAG_TARGET(O_NOFOLLOW),
 FLAG_TARGET(O_NONBLOCK),  /* also O_NDELAY */
-FLAG_TARGET(O_SYNC),
+FLAG_TARGET(O_DSYNC),
+FLAG_TARGET(__O_SYNC),
 FLAG_TARGET(O_TRUNC),
 #ifdef O_DIRECT
 FLAG_TARGET(O_DIRECT),
 #endif
+#ifdef O_NOATIME
+FLAG_TARGET(O_NOATIME),
+#endif
+#ifdef O_CLOEXEC
+FLAG_TARGET(O_CLOEXEC),
+#endif
+#ifdef O_PATH
+FLAG_TARGET(O_PATH),
+#endif
 FLAG_END,
 };
 
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 1cbbfbf..8a454cc 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -261,14 +261,27 @@ static bitmask_transtbl fcntl_flags_tbl[] = {
   { TARGET_O_TRUNC, TARGET_O_TRUNC, O_TRUNC, O_TRUNC, },
   { TARGET_O_APPEND,TARGET_O_APPEND,O_APPEND,O_APPEND,},
   { TARGET_O_NONBLOCK,  TARGET_O_NONBLOCK,  O_NONBLOCK,  O_NONBLOCK,  },
+  { TARGET_O_SYNC,  TARGET_O_DSYNC, O_SYNC,  O_DSYNC, },
   { TARGET_O_SYNC,  TARGET_O_SYNC,  O_SYNC,  O_SYNC,  },
   { TARGET_FASYNC,  TARGET_FASYNC,  FASYNC,  FASYNC,  },
   { TARGET_O_DIRECTORY, TARGET_O_DIRECTORY, O_DIRECTORY, O_DIRECTORY, },
   { TARGET_O_NOFOLLOW,  TARGET_O_NOFOLLOW,  O_NOFOLLOW,  O_NOFOLLOW,  },
-  { TARGET_O_LARGEFILE, TARGET_O_LARGEFILE, O_LARGEFILE, O_LARGEFILE, },
 #if defined(O_DIRECT)
   { TARGET_O_DIRECT,TARGET_O_DIRECT,O_DIRECT,O_DIRECT,},
 #endif
+#if defined(O_NOATIME)
+  { TARGET_O_NOATIME,   TARGET_O_NOATIME,   O_NOATIME,   O_NOATIME},
+#endif
+#if defined(O_CLOEXEC)
+  { TARGET_O_CLOEXEC,   TARGET_O_CLOEXEC,   O_CLOEXEC,   O_CLOEXEC},
+#endif
+#if defined(O_PATH)
+  { TARGET_O_PATH,  TARGET_O_PATH,  O_PATH,  O_PATH   },
+#endif
+  /* Don't terminate the list prematurely on 64-bit host+guest.  */
+#if TARGET_O_LARGEFILE != 0 || O_LARGEFILE != 0
+  { TARGET_O_LARGEFILE, TARGET_O_LARGEFILE, O_LARGEFILE, O_LARGEFILE, },
+#endif
   { 0, 0, 0, 0 }
 };
 
diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h
index 02fe4f6..974d6f5 100644
--- a/linux-user/syscall_defs.h
+++ b/linux-user/syscall_defs.h
@@ -2012,135 +2012,126 @@ struct target_statfs64 {
 #define TARGET_F_DUPFD_CLOEXEC (TARGET_F_LINUX_SPECIFIC_BASE + 6)
 #define TARGET_F_NOTIFY  (TARGET_F_LINUX_SPECIFIC_BASE+2)
 
-#if defined (TARGET_ARM)
-#define TARGET_O_ACCMODE  0003
-#define TARGET_O_RDONLY 00
-#define TARGET_O_WRONLY 01
-#define TARGET_O_RDWR   02
-#define TARGET_O_CREAT0100 /* not fcntl */
-#define TARGET_O_EXCL 0200 /* not fcntl */
-#define TARGET_O_NOCTTY   0400 /* not fcntl */
-#define TARGET_O_TRUNC   01000 /* not fcntl */
-#define TARGET_O_APPEND  02000
-#define TARGET_O_NONBLOCK04000
-#define TARGET_O_NDELAYTARGET_O_NONBLOCK
-#define TARGET_O_SYNC   01
-#define TARGET_FASYNC   02 /* fcntl, for BSD compatibility */
+#if defined(TARGET_ALPHA)
+#define TARGET_O_NONBLOCK  04
+#define TARGET_O_APPEND010
+#define TARGET_O_CREAT   01000 /* not fcntl */
+#define TARGET_O_TRUNC   02000 /* not fcntl */
+#define TARGET_O_EXCL04000 /* not fcntl */
+#define TARGET_O_NOCTTY 01 /* not fcntl */
+#define TARGET_FASYNC  02 /* fcntl, for BSD compatibility */
+#define TARGET_O_DSYNC 04
+#define TARGET_O_LARGEFILE  0  /* not necessary, always 64-bit */
+#define TARGET_O_DIRECTORY 010 /* must be a directory */
+#define TARGET_O_NOFOLLOW  020 /* don't follow links */
+#define TARGET_O_DIRECT   0200 /* direct disk access hint */
+#define TARGET_O_NOATIME  0400
+#define TARGET_O_CLOEXEC 01000
+#define TARGET___O_SYNC  02000
+#define TARGET_O_PATH04000
+#elif defined (TARGET_ARM)
 #define TARGET_O_DIRECTORY  04 /* must be a directory */
 #define TARGET_O_NOFOLLOW  010 /* don't follow links */
 #define TARGET_O_DIRECT020 /* direct disk access hint */
 #define TARGET_O_LARGEFILE 040
+#elif defined(TARGET_MIPS)
+#define TARGET_O_APPEND 0x0008
+#define TARGET_O_DSYNC  0x0010
+#define TARGET_O_NONBLOCK   0x0080
+#define TARGET_O_CREAT  0x0100  /* not fcntl */
+#define TARGET_O_TRUNC  0x0200  /* not fcntl

[Qemu-devel] [PATCH 7/9] alpha-linux-user: Fix a3 error return with v0 error bypass.

We were failing to initialize a3 for syscalls that bypass the
negative return value error check.

Signed-off-by: Richard Henderson 
---
 linux-user/main.c |   12 +---
 1 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/linux-user/main.c b/linux-user/main.c
index e81abb2..605018a 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -2758,13 +2758,11 @@ void cpu_loop(CPUAlphaState *env)
 break;
 }
 /* Syscall writes 0 to V0 to bypass error check, similar
-   to how this is handled internal to Linux kernel.  */
-if (env->ir[IR_V0] == 0) {
-env->ir[IR_V0] = sysret;
-} else {
-env->ir[IR_V0] = (sysret < 0 ? -sysret : sysret);
-env->ir[IR_A3] = (sysret < 0);
-}
+   to how this is handled internal to Linux kernel.
+   (Ab)use trapnr temporarily as boolean indicating error.  */
+trapnr = (env->ir[IR_V0] != 0 && sysret < 0);
+env->ir[IR_V0] = (trapnr ? -sysret : sysret);
+env->ir[IR_A3] = trapnr;
 break;
 case 0x86:
 /* IMB */
-- 
1.7.7.6

[Qemu-devel] [PATCH 5/9] linux-user: Allocate the right amount of space for non-fixed file maps

If we let the kernel handle the implementation of mmap_find_vma,
via an anon mmap, we must use the size as indicated by the user
and not the size truncated to the filesize.

This happens often in ld.so, where we initially mmap the file to
the size of the text+data+bss to reserve an area, then mmap+fixed
over the top to properly handle data and bss.

Signed-off-by: Richard Henderson 
---
 linux-user/mmap.c |   30 +++---
 1 files changed, 19 insertions(+), 11 deletions(-)

diff --git a/linux-user/mmap.c b/linux-user/mmap.c
index d9468fe..b412e3f 100644
--- a/linux-user/mmap.c
+++ b/linux-user/mmap.c
@@ -382,7 +382,6 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int 
prot,
  int flags, int fd, abi_ulong offset)
 {
 abi_ulong ret, end, real_start, real_end, retaddr, host_offset, host_len;
-unsigned long host_start;
 
 mmap_lock();
 #ifdef DEBUG_MMAP
@@ -421,6 +420,19 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int 
prot,
 if (len == 0)
 goto the_end;
 real_start = start & qemu_host_page_mask;
+host_offset = offset & qemu_host_page_mask;
+
+/* If the user is asking for the kernel to find a location, do that
+   before we truncate the length for mapping files below.  */
+if (!(flags & MAP_FIXED)) {
+host_len = len + offset - host_offset;
+host_len = HOST_PAGE_ALIGN(host_len);
+start = mmap_find_vma(real_start, host_len);
+if (start == (abi_ulong)-1) {
+errno = ENOMEM;
+goto fail;
+}
+}
 
 /* When mapping files into a memory area larger than the file, accesses
to pages beyond the file size will cause a SIGBUS. 
@@ -453,27 +465,23 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int 
prot,
 }
 
 if (!(flags & MAP_FIXED)) {
-abi_ulong mmap_start;
+unsigned long host_start;
 void *p;
-host_offset = offset & qemu_host_page_mask;
+
 host_len = len + offset - host_offset;
 host_len = HOST_PAGE_ALIGN(host_len);
-mmap_start = mmap_find_vma(real_start, host_len);
-if (mmap_start == (abi_ulong)-1) {
-errno = ENOMEM;
-goto fail;
-}
+
 /* Note: we prefer to control the mapping address. It is
especially important if qemu_host_page_size >
qemu_real_host_page_size */
-p = mmap(g2h(mmap_start),
- host_len, prot, flags | MAP_FIXED | MAP_ANONYMOUS, -1, 0);
+p = mmap(g2h(start), host_len, prot,
+ flags | MAP_FIXED | MAP_ANONYMOUS, -1, 0);
 if (p == MAP_FAILED)
 goto fail;
 /* update start so that it points to the file position at 'offset' */
 host_start = (unsigned long)p;
 if (!(flags & MAP_ANONYMOUS)) {
-p = mmap(g2h(mmap_start), len, prot, 
+p = mmap(g2h(start), len, prot,
  flags | MAP_FIXED, fd, host_offset);
 host_start += offset - host_offset;
 }
-- 
1.7.7.6

[Qemu-devel] [PATCH 6/9] linux-user: Translate pipe2 flags; add to strace

Signed-off-by: Richard Henderson 
---
 linux-user/strace.list |3 +++
 linux-user/syscall.c   |3 ++-
 2 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/linux-user/strace.list b/linux-user/strace.list
index a7eeaef..af3c6a0 100644
--- a/linux-user/strace.list
+++ b/linux-user/strace.list
@@ -1527,3 +1527,6 @@
 #ifdef TARGET_NR_sync_file_range2
 { TARGET_NR_sync_file_range2, "sync_file_range2", NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_pipe2
+{ TARGET_NR_pipe2, "pipe2", NULL, NULL, NULL },
+#endif
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 8a454cc..1a12f14 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -5595,7 +5595,8 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1,
 break;
 #ifdef TARGET_NR_pipe2
 case TARGET_NR_pipe2:
-ret = do_pipe(cpu_env, arg1, arg2, 1);
+ret = do_pipe(cpu_env, arg1,
+  target_to_host_bitmask(arg2, fcntl_flags_tbl), 1);
 break;
 #endif
 case TARGET_NR_times:
-- 
1.7.7.6

[Qemu-devel] [PATCH 8/9] alpha-linux-user: Properly handle the non-rt sigprocmask syscall.

Name the syscall properly for QEMU, kernel source notwithstanding.
Fix syntax errors in the code thus enabled within do_syscall.

Signed-off-by: Richard Henderson 
---
 linux-user/alpha/syscall_nr.h |2 +-
 linux-user/syscall.c  |9 +
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/linux-user/alpha/syscall_nr.h b/linux-user/alpha/syscall_nr.h
index f6284db..49648a1 100644
--- a/linux-user/alpha/syscall_nr.h
+++ b/linux-user/alpha/syscall_nr.h
@@ -46,7 +46,7 @@
 #define TARGET_NR_open  45
 #define TARGET_NR_osf_old_sigaction 46 /* not implemented */
 #define TARGET_NR_getxgid   47
-#define TARGET_NR_osf_sigprocmask   48
+#define TARGET_NR_sigprocmask   48
 #define TARGET_NR_osf_getlogin  49 /* not implemented */
 #define TARGET_NR_osf_setlogin  50 /* not implemented */
 #define TARGET_NR_acct  51
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 1a12f14..bc77b79 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -5880,12 +5880,13 @@ abi_long do_syscall(void *cpu_env, int num, abi_long 
arg1,
 mask = arg2;
 target_to_host_old_sigset(&set, &mask);
 
-ret = get_errno(sigprocmask(how, &set, &oldset));
-
-if (!is_error(ret)) {
+ret = sigprocmask(how, &set, &oldset);
+if (is_error(ret)) {
+ret = get_errno(ret);
+} else {
 host_to_target_old_sigset(&mask, &oldset);
 ret = mask;
-((CPUAlphaState *)cpu_env)->[IR_V0] = 0; /* force no error */
+((CPUAlphaState *)cpu_env)->ir[IR_V0] = 0; /* force no error */
 }
 #else
 sigset_t set, oldset, *set_ptr;
-- 
1.7.7.6

[Qemu-devel] [PATCH 9/9] alpha-linux-user: Fix the getpriority syscall

Alpha uses unbiased priority values in the syscall, with the a3
return value signaling error conditions.  Therefore, properly
interpret the libc getpriority as needed for the guest rather
than passing the host value through unchanged.

Signed-off-by: Richard Henderson 
---
 linux-user/syscall.c |   20 +++-
 1 files changed, 15 insertions(+), 5 deletions(-)

diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index bc77b79..bc65c32 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -218,7 +218,6 @@ _syscall3(int, sys_getdents, uint, fd, struct linux_dirent 
*, dirp, uint, count)
 #if defined(TARGET_NR_getdents64) && defined(__NR_getdents64)
 _syscall3(int, sys_getdents64, uint, fd, struct linux_dirent64 *, dirp, uint, 
count);
 #endif
-_syscall2(int, sys_getpriority, int, which, int, who);
 #if defined(TARGET_NR__llseek) && defined(__NR_llseek)
 _syscall5(int, _llseek,  uint,  fd, ulong, hi, ulong, lo,
   loff_t *, res, uint, wh);
@@ -6447,10 +6446,21 @@ abi_long do_syscall(void *cpu_env, int num, abi_long 
arg1,
 break;
 #endif
 case TARGET_NR_getpriority:
-/* libc does special remapping of the return value of
- * sys_getpriority() so it's just easiest to call
- * sys_getpriority() directly rather than through libc. */
-ret = get_errno(sys_getpriority(arg1, arg2));
+/* Note that negative values are valid for getpriority, so we must
+   differentiate based on errno settings.  */
+errno = 0;
+ret = getpriority(arg1, arg2);
+if (ret == -1 && errno != 0) {
+ret = get_errno(errno);
+break;
+}
+#ifdef TARGET_ALPHA
+/* Return value is the unbiased priority.  Signal no error.  */
+((CPUAlphaState *)cpu_env)->ir[IR_V0] = 0;
+#else
+/* Return value is a biased priority to avoid negative numbers.  */
+ret = 20 - ret;
+#endif
 break;
 case TARGET_NR_setpriority:
 ret = get_errno(setpriority(arg1, arg2, arg3));
-- 
1.7.7.6

[Qemu-devel] [PATCH 2/9] alpha-linux-user: Work around hosted mmap allocation problems

Signed-off-by: Richard Henderson 
---
 target-alpha/cpu.h |   11 +++
 1 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index 99f9ee1..0d87fa7 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -40,9 +40,20 @@
 
 #define TARGET_PAGE_BITS 13
 
+#ifdef CONFIG_USER_ONLY
+/* ??? The kernel likes to give addresses in high memory.  If the host has
+   more virtual address space than the guest, this can lead to impossible
+   allocations.  Honor the long-standing assumption that only kernel addrs
+   are negative, but otherwise allow allocations anywhere.  This could lead
+   to tricky emulation problems for programs doing tagged addressing, but
+   that's far fewer than encounter the impossible allocation problem.  */
+#define TARGET_PHYS_ADDR_SPACE_BITS63
+#define TARGET_VIRT_ADDR_SPACE_BITS63
+#else
 /* ??? EV4 has 34 phys addr bits, EV5 has 40, EV6 has 44.  */
 #define TARGET_PHYS_ADDR_SPACE_BITS44
 #define TARGET_VIRT_ADDR_SPACE_BITS(30 + TARGET_PAGE_BITS)
+#endif
 
 /* Alpha major type */
 enum {
-- 
1.7.7.6

[Qemu-devel] [PATCH 1/9] alpha-linux-user: Fix signal handling

Proper signal numbers were not defined, and EXCP_INTERRUPT
was unhandled, leading to all sorts of subtle confusion.

Signed-off-by: Richard Henderson 
---
 linux-user/main.c |3 +++
 linux-user/syscall_defs.h |   41 -
 2 files changed, 43 insertions(+), 1 deletions(-)

diff --git a/linux-user/main.c b/linux-user/main.c
index 49108b8..e81abb2 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -2833,6 +2833,9 @@ void cpu_loop(CPUAlphaState *env)
 case EXCP_STQ_C:
 do_store_exclusive(env, env->error_code, trapnr - EXCP_STL_C);
 break;
+case EXCP_INTERRUPT:
+/* Just indicate that signals should be handled asap.  */
+break;
 default:
 printf ("Unhandled trap: 0x%x\n", trapnr);
 cpu_dump_state(env, stderr, fprintf, 0);
diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h
index a79b67d..02fe4f6 100644
--- a/linux-user/syscall_defs.h
+++ b/linux-user/syscall_defs.h
@@ -363,7 +363,46 @@ int do_sigaction(int sig, const struct target_sigaction 
*act,
 #define TARGET_SA_RESTORER 0x0400
 #endif
 
-#if defined(TARGET_SPARC)
+#if defined(TARGET_ALPHA)
+
+#define TARGET_SIGHUP1
+#define TARGET_SIGINT2
+#define TARGET_SIGQUIT   3
+#define TARGET_SIGILL4
+#define TARGET_SIGTRAP   5
+#define TARGET_SIGABRT   6
+#define TARGET_SIGSTKFLT 7 /* actually SIGEMT */
+#define TARGET_SIGFPE8
+#define TARGET_SIGKILL   9
+#define TARGET_SIGBUS   10
+#define TARGET_SIGSEGV  11
+#define TARGET_SIGSYS   12
+#define TARGET_SIGPIPE  13
+#define TARGET_SIGALRM  14
+#define TARGET_SIGTERM  15
+#define TARGET_SIGURG   16
+#define TARGET_SIGSTOP  17
+#define TARGET_SIGTSTP  18
+#define TARGET_SIGCONT  19
+#define TARGET_SIGCHLD  20
+#define TARGET_SIGTTIN  21
+#define TARGET_SIGTTOU  22
+#define TARGET_SIGIO23
+#define TARGET_SIGXCPU  24
+#define TARGET_SIGXFSZ  25
+#define TARGET_SIGVTALRM26
+#define TARGET_SIGPROF  27
+#define TARGET_SIGWINCH 28
+#define TARGET_SIGPWR   29 /* actually SIGINFO */
+#define TARGET_SIGUSR1  30
+#define TARGET_SIGUSR2  31
+#define TARGET_SIGRTMIN 32
+
+#define TARGET_SIG_BLOCK 1
+#define TARGET_SIG_UNBLOCK   2
+#define TARGET_SIG_SETMASK   3
+
+#elif defined(TARGET_SPARC)
 
 #define TARGET_SIGHUP   1
 #define TARGET_SIGINT   2
-- 
1.7.7.6

[Qemu-devel] [PATCH v3 0/9] {alpha-}linux user improvements

Changes v2-v3:
  Fix fcntl translation table in O_CLOEXEC patch.  The O_LARGEFILE
  entry could result in an end-of-table {0,0,0,0} marker.

  Handle sigprocmask and getpriority properly for alpha.

Changes v1-v2:
  Dropped -stracefile patch.  That clearly needs more iteration in
  order to make everyone happy.  I don't want the rest of this to
  get caught up in that.

  Two patches that fix all of the mmap problems I've been able to
  find in the glibc testsuite.  The iconv tests that load lots of
  shared libraries are particularly good at triggering both problems.

  Handle O_CLOEXEC et al properly.

  Handle pipe2 properly.


r~


Richard Henderson (9):
  alpha-linux-user: Fix signal handling
  alpha-linux-user: Work around hosted mmap allocation problems
  alpha-linux-user: Handle TARGET_SSI_IEEE_RAISE_EXCEPTION properly
  linux-user: Handle O_SYNC, O_NOATIME, O_CLOEXEC, O_PATH
  linux-user: Allocate the right amount of space for non-fixed file
maps
  linux-user: Translate pipe2 flags; add to strace
  alpha-linux-user: Fix a3 error return with v0 error bypass.
  alpha-linux-user: Properly handle the non-rt sigprocmask syscall.
  alpha-linux-user: Fix the getpriority syscall

 linux-user/alpha/syscall_nr.h |2 +-
 linux-user/main.c |   15 ++--
 linux-user/mmap.c |   30 --
 linux-user/strace.c   |   12 ++-
 linux-user/strace.list|3 +
 linux-user/syscall.c  |  108 +++
 linux-user/syscall_defs.h |  236 +++--
 target-alpha/cpu.h|   11 ++
 8 files changed, 273 insertions(+), 144 deletions(-)

-- 
1.7.7.6

Re: [Qemu-devel] [PATCH v3 0/4] Standard SD host controller model

2012-06-07 Thread Peter Crosthwaite

>> http://git.chromium.org/gitweb/?p=chromiumos/third_party/qemu.git;a=commit;h=9b9c2ea8bd25be06b23a30f07262ade9190d8e95
>
> Looks like its not actually true, the first thing I noticed is that
> documentation defines mandatory 3.00 controller registers Host Control 2 and
> Preset Values, which Vincent's version doesn't implement, I'd say that his
> version complies with 2.00 spec. Version sent by Peter implements a wider
> set of SD host controller features comparing to Vincen't version.
>

There are two major deltas that I added to vincents that are now in
Igors version:

1: PIO support
2: ADMA1 supoorts

I removed from Vincents version

1: PCI support
2: the aforementioned eMMC stuff

Although this was mostly just a case of not picking those patches out
of the original series.

>> I'm guessing I at least still need to cherry-pick Vincent's eMMC support
>> bits on top since hw/sd.c and hw/blockdev.c are unmodified in this series.
>>
>> I'm cc'ing Kevin as block maintainer (PMM is on vacation). I'm hoping
>> the typos in the commit messages can be fixed when applying to either
>> branch.
>>
>> Regards,
>> Andreas
>>
>>> Changelog:
>>> Changed from v2:
>>> corrected typo errors in ADMA1 support
>>> added patches 3-4
>>> v1->v2
>>>  PATCH1:
>>>   add support for ADMA1 (I havn't tested it though).
>>>   fixed s->prnsts<->  s->pwrcon typo (thanks to Peter, strange that it
>>> even worked
>>>   before).
>>>  PATCH2:
>>>   change header prefix from "target-arm" to "exynos4210".
>>>
>>> Igor Mitsyanko (2):
>>>   hw: introduce standard SD host controller
>>>   exynos4210: introduce Exynos4210 SD host controller model
>>>
>>> Peter A. G. Crosthwaite (2):
>>>   vl.c: allow for reapeated -sd arguments
>>>   xilinx_zynq: Added sdhci controllers
>>>
>>>  Makefile.objs                   |    1 +
>>>  Makefile.target                 |    1 +
>>>  default-configs/arm-softmmu.mak |    1 +
>>>  hw/exynos4210.c                 |   20 +
>>>  hw/exynos4210_sdhci.c           |  438 +
>>>  hw/sdhci.c                      | 1306
>>> +++
>>>  hw/sdhci.h                      |  310 +
>>>  hw/xilinx_zynq.c                |   12 +
>>>  vl.c                            |    2 +-
>>>  9 files changed, 2090 insertions(+), 1 deletions(-)
>>>  create mode 100644 hw/exynos4210_sdhci.c
>>>  create mode 100644 hw/sdhci.c
>>>  create mode 100644 hw/sdhci.h
>>>
>>
>

[Qemu-devel] [PATCH 2/2] configure: report appropriate error on missing library

2012-06-07 Thread Harsh Prateek Bora


Signed-off-by: Harsh Prateek Bora 
---
 configure |3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/configure b/configure
index 76dd57f..e8f0172 100755
--- a/configure
+++ b/configure
@@ -2915,7 +2915,8 @@ if test "$softmmu" = yes ; then
   tools="$tools fsdev/virtfs-proxy-helper\$(EXESUF)"
 else
   if test "$virtfs" = yes; then
-feature_not_found "virtfs"
+echo "VirtFS is supported only on Linux and requires libcap-devel and 
libattr-devel"
+exit 1
   fi
   virtfs=no
 fi
-- 
1.7.10.2

[Qemu-devel] [PATCH 1/2] trace/simple.c: fix deprecated glib2 interface

2012-06-07 Thread Harsh Prateek Bora


Signed-off-by: Harsh Prateek Bora 
---
 trace/simple.c |5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/trace/simple.c b/trace/simple.c
index 33ae486..b4a3c6e 100644
--- a/trace/simple.c
+++ b/trace/simple.c
@@ -161,8 +161,11 @@ static void trace(TraceEventID event, uint64_t x1, 
uint64_t x2, uint64_t x3,
 }
 
 timestamp = get_clock();
-
+#if GLIB_CHECK_VERSION(2, 30, 0)
+idx = g_atomic_int_add((gint *)&trace_idx, 1) % TRACE_BUF_LEN;
+#else
 idx = g_atomic_int_exchange_and_add((gint *)&trace_idx, 1) % TRACE_BUF_LEN;
+#endif
 trace_buf[idx] = (TraceRecord){
 .event = event,
 .timestamp_ns = timestamp,
-- 
1.7.10.2

[Qemu-devel] [PATCH 0/2] Configure and build fix for VirtFS

2012-06-07 Thread Harsh Prateek Bora

Minor fixes:


1) glib2 deprecated g_atomic_int_exchange_and_add in favour of g_atomic_int_add
   since ver 2.30 and therefore build breaks with newer glib2 library.
2) Configure needs to report appropriate error on missing libraries for VirtFS.

Harsh Prateek Bora (2):
  trace/simple.c: fix deprecated glib2 interface
  configure: report appropriate error on missing library

 configure  |3 ++-
 trace/simple.c |5 -
 2 files changed, 6 insertions(+), 2 deletions(-)

-- 
1.7.10.2

Re: [Qemu-devel] [PATCH v3 06/29] build: move libobj-y variable to nested Makefile.objs

On Thu, Jun 7, 2012 at 7:39 AM, Paolo Bonzini  wrote:
> Signed-off-by: Paolo Bonzini 
> ---
>  Makefile.target                 |   41 
> +++
>  configure                       |    6 --
>  target-alpha/Makefile.objs      |    3 ++-
>  target-arm/Makefile.objs        |    4 
>  target-cris/Makefile.objs       |    5 -
>  target-i386/Makefile.objs       |    3 +++
>  target-lm32/Makefile.objs       |    4 +++-
>  target-m68k/Makefile.objs       |    3 +++
>  target-microblaze/Makefile.objs |    5 -
>  target-mips/Makefile.objs       |    4 +++-
>  target-ppc/Makefile.objs        |    4 +++-
>  target-s390x/Makefile.objs      |    4 +++-
>  target-sh4/Makefile.objs        |    4 +++-
>  target-sparc/Makefile.objs      |    8 +++-
>  target-unicore32/Makefile.objs  |    4 +++-
>  target-xtensa/Makefile.objs     |    3 +++
>  16 files changed, 55 insertions(+), 50 deletions(-)
>
> diff --git a/Makefile.target b/Makefile.target
> index c416ba5..67d5f3e 100644
> --- a/Makefile.target
> +++ b/Makefile.target
> @@ -76,41 +76,19 @@ all: $(PROGS) stap
>
>  #
>  # cpu emulator library
> -libobj-y = exec.o translate-all.o cpu-exec.o translate.o
> -libobj-y += tcg/tcg.o tcg/optimize.o
> -libobj-$(CONFIG_TCG_INTERPRETER) += tci.o
> -libobj-y += fpu/softfloat.o
> -ifneq ($(TARGET_BASE_ARCH), sparc)
> -ifneq ($(TARGET_BASE_ARCH), alpha)
> -libobj-y += op_helper.o
> -endif
> -endif
> -libobj-y += helper.o
> -ifneq ($(TARGET_BASE_ARCH), ppc)
> -libobj-y += cpu.o
> -endif
> -libobj-$(TARGET_SPARC64) += vis_helper.o
> -libobj-$(CONFIG_NEED_MMU) += mmu.o
> -libobj-$(TARGET_ARM) += neon_helper.o iwmmxt_helper.o
> -ifeq ($(TARGET_BASE_ARCH), sparc)
> -libobj-y += fop_helper.o cc_helper.o win_helper.o mmu_helper.o ldst_helper.o
> -endif
> -libobj-$(TARGET_SPARC) += int32_helper.o
> -libobj-$(TARGET_SPARC64) += int64_helper.o
> -libobj-$(TARGET_ALPHA) += int_helper.o fpu_helper.o sys_helper.o mem_helper.o
> -
> -libobj-y += disas.o
> -libobj-$(CONFIG_TCI_DIS) += tci-dis.o
> -
> +obj-y = exec.o translate-all.o cpu-exec.o translate.o
> +obj-y += tcg/tcg.o tcg/optimize.o
> +obj-$(CONFIG_TCG_INTERPRETER) += tci.o
> +obj-y += fpu/softfloat.o
> +obj-y += disas.o
> +obj-$(CONFIG_TCI_DIS) += tci-dis.o
>  obj-y += target-$(TARGET_BASE_ARCH)/
> +obj-$(CONFIG_GDBSTUB_XML) += gdbstub-xml.o
>
>  tci-dis.o: QEMU_CFLAGS += -I$(SRC_PATH)/tcg -I$(SRC_PATH)/tcg/tci
>
>  # HELPER_CFLAGS is used for all the legacy code compiled with static register
>  # variables
> -ifneq ($(TARGET_BASE_ARCH), sparc)
> -op_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
> -endif
>  user-exec.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
>
>  # Note: this is a workaround. The real fix is to avoid compiling
> @@ -130,7 +108,6 @@ obj-y += gdbstub.o thunk.o user-exec.o $(oslib-obj-y)
>  obj-y += $(addprefix ../, $(universal-obj-y))
>  obj-y += $(addprefix ../libuser/, $(user-obj-y))
>  obj-y += $(addprefix ../libdis-user/, $(libdis-y))
> -obj-y += $(libobj-y)
>
>  endif #CONFIG_LINUX_USER
>
> @@ -147,7 +124,6 @@ obj-y += gdbstub.o user-exec.o
>  obj-y += $(addprefix ../, $(universal-obj-y))
>  obj-y += $(addprefix ../libuser/, $(user-obj-y))
>  obj-y += $(addprefix ../libdis-user/, $(libdis-y))
> -obj-y += $(libobj-y)
>
>  endif #CONFIG_BSD_USER
>
> @@ -215,7 +191,6 @@ GENERATED_HEADERS += hmp-commands.h qmp-commands-old.h
>  obj-y += $(addprefix ../, $(universal-obj-y))
>  obj-y += $(addprefix ../, $(common-obj-y))
>  obj-y += $(addprefix ../libdis/, $(libdis-y))
> -obj-y += $(libobj-y)
>  obj-y += $(addprefix $(HWDIR)/, $(hw-obj-y))
>  obj-y += $(addprefix ../, $(trace-obj-y))
>
> @@ -231,8 +206,6 @@ obj-$(CONFIG_SMARTCARD_NSS) += $(addprefix ../libcacard/, 
> $(libcacard-y))
>  endif # CONFIG_BSD_USER
>  endif # CONFIG_LINUX_USER
>
> -obj-$(CONFIG_GDBSTUB_XML) += gdbstub-xml.o
> -
>  nested-vars = obj-y
>  dummy := $(call unnest-vars)
>
> diff --git a/configure b/configure
> index a2fca50..cc77700 100755
> --- a/configure
> +++ b/configure
> @@ -3911,12 +3911,6 @@ if test "$target_softmmu" = "yes" ; then
>   esac
>  fi
>
> -if test "$target_softmmu" = "yes" -a \( \
> -        "$TARGET_ARCH" = "microblaze" -o \
> -        "$TARGET_ARCH" = "cris" \) ; then
> -  echo "CONFIG_NEED_MMU=y" >> $config_target_mak
> -fi
> -
>  if test "$gprof" = "yes" ; then
>   echo "TARGET_GPROF=yes" >> $config_target_mak
>   if test "$target_linux_user" = "yes" ; then
> diff --git a/target-alpha/Makefile.objs b/target-alpha/Makefile.objs
> index c574c9e..9a72870 100644
> --- a/target-alpha/Makefile.objs
> +++ b/target-alpha/Makefile.objs
> @@ -1 +1,2 @@
> -# still empty
> +obj-y += helper.o cpu.o
> +obj-y += int_helper.o fpu_helper.o sys_helper.o mem_helper.o
> diff --git a/target-arm/Makefile.objs b/target-arm/Makefile.objs
> index f5bb920..4dcd3c5 100644
> --- a/target-arm/Makefile.objs
> +++ b/target-arm/Makefile.objs
> @@ -1 +1,5 @@
>  obj-y += arm-semi.o
> +obj-y += op_helper.o helper.o cpu.o

Re: [Qemu-devel] [PATCH 00/31] PPC: mpc8544ds: Create device tree dynamically

On Tue, Jun 5, 2012 at 11:52 PM, Alexander Graf  wrote:
> Today we have two separate places where we keep information which device
> is where:
>
>  - hw/ppce500_mpc8544ds.c to instantiate all devices
>  - pc-bios/mpc8544ds.dtb as device tree to tell the guest about devices
>
> Every time we split crucial information, things can go terribly wrong. If
> you update one file, but not the other, you can screw things up without
> realizing it quickly.
>
> The redundancy is also unnecessary, because QEMU already knows all the
> information at which addresses its devices live. So we can generate the
> device tree from the same variables - and even have the device tree adjust
> if something changes in there.
>
> The one functionality we lose with this approach is the ability to manually
> patch the device tree to contain additional devices. To still be able to do
> so easily, we introduce a new option -machine dumpdtb= that creates a
> dtb output file which can be used with -machine dtb= later. In between
> these 2 executions of QEMU, the dtb can be modified however much you like.
>
> A lot of bits in this patch set are still hardcoded. We also don't accomodate
> for dynamic creation of device tree nodes when -device is used. This requires
> a bit more QOM'ification for us to be able to loop through all devices, so we
> can dynamically create the device tree nodes for them. The basic concept 
> should
> still hold as is though.
>
>
> Alex

Please use snprintf() instead of sprintf().

>
> v1 -> v2:
>
>  - rename cell64 -> u64
>  - don't treat memory as single u64
>  - remove commit id from patch description
>  - NEW: PPC: e500: Use new MPIC dt format
>         PPC: e500: Use new SOC dt format
>         PPC: e500: Define addresses as always 64bit
>         PPC: e500: Extend address/size of / to 64bit
>         dt: Add global option to set phandle start offset
>         PPC: e500: Refactor serial dt generation
>
> Alexander Graf (31):
>  dt: allow add_subnode to create root subnodes
>  dt: add helpers for 2, 3 and 4 cell adds
>  dt: add helper for phandle references
>  dt: temporarily disable subtree creation failure check
>  dt: add helper for phandle enumeration
>  dt: add helper for empty dt creation
>  dt: add helper for phandle allocation
>  dt: add helper for 64bit cell adds
>  PPC: e500: require libfdt
>  PPC: e500: dt: create memory node dynamically
>  PPC: e500: dt: create /cpus node dynamically
>  PPC: e500: dt: create /hypervisor node dynamically
>  PPC: e500: dt: create / node dynamically
>  PPC: e500: dt: create /chosen node dynamically
>  PPC: e500: dt: create /soc8544 node dynamically
>  PPC: e500: dt: create serial nodes dynamically
>  PPC: e500: dt: create mpic node dynamically
>  PPC: e500: dt: create global-utils node dynamically
>  PPC: e500: dt: create pci node dynamically
>  PPC: e500: dt: start with empty device tree
>  dt: Add -machine dumpdtb option to dump the current dtb
>  PPC: e500: dt: use 64bit cell helper
>  PPC: e500: dt: use target_phys_addr_t for ramsize
>  PPC: e500: enable manual loading of dtb blob
>  Revert "dt: temporarily disable subtree creation failure check"
>  PPC: e500: Use new MPIC dt format
>  PPC: e500: Use new SOC dt format
>  PPC: e500: Define addresses as always 64bit
>  PPC: e500: Extend address/size of / to 64bit
>  dt: Add global option to set phandle start offset
>  PPC: e500: Refactor serial dt generation
>
>  Makefile               |    1 -
>  Makefile.target        |    2 +-
>  device_tree.c          |  134 +++-
>  device_tree.h          |   16 +++
>  hw/ppce500_mpc8544ds.c |  237 +--
>  pc-bios/mpc8544ds.dtb  |  Bin 2028 -> 0 bytes
>  pc-bios/mpc8544ds.dts  |  119 
>  qemu-config.c          |    8 ++
>  roms/openbios          |    2 +-
>  9 files changed, 365 insertions(+), 154 deletions(-)
>  delete mode 100644 pc-bios/mpc8544ds.dtb
>  delete mode 100644 pc-bios/mpc8544ds.dts
>
>

Re: [Qemu-devel] [Qemu-ppc] [PATCH 26/31] PPC: e500: Use new MPIC dt format

On Tue, Jun 5, 2012 at 11:53 PM, Alexander Graf  wrote:
> Due to popular demand, we're updating the way we generate the MPIC
> node and interrupt lines based on what the current state of art is.
>
> Requested-by: Scott Wood 
> Signed-off-by: Alexander Graf 
> ---
>  hw/ppce500_mpc8544ds.c |   33 ++---
>  roms/openbios          |    2 +-
>  2 files changed, 19 insertions(+), 16 deletions(-)
>
> diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
> index bad114c..35b470a 100644
> --- a/hw/ppce500_mpc8544ds.c
> +++ b/hw/ppce500_mpc8544ds.c
> @@ -67,18 +67,18 @@ static void pci_map_create(void *fdt, uint32_t *pci_map, 
> uint32_t mpic)
>     int i;
>     const uint32_t tmp[] = {
>                              /* IDSEL 0x11 J17 Slot 1 */
> -                             0x8800, 0x0, 0x0, 0x1, mpic, 0x2, 0x1,
> -                             0x8800, 0x0, 0x0, 0x2, mpic, 0x3, 0x1,
> -                             0x8800, 0x0, 0x0, 0x3, mpic, 0x4, 0x1,
> -                             0x8800, 0x0, 0x0, 0x4, mpic, 0x1, 0x1,
> +                             0x8800, 0x0, 0x0, 0x1, mpic, 0x2, 0x1, 0x0, 0x0,
> +                             0x8800, 0x0, 0x0, 0x2, mpic, 0x3, 0x1, 0x0, 0x0,
> +                             0x8800, 0x0, 0x0, 0x3, mpic, 0x4, 0x1, 0x0, 0x0,
> +                             0x8800, 0x0, 0x0, 0x4, mpic, 0x1, 0x1, 0x0, 0x0,
>
>                              /* IDSEL 0x12 J16 Slot 2 */
> -                             0x9000, 0x0, 0x0, 0x1, mpic, 0x3, 0x1,
> -                             0x9000, 0x0, 0x0, 0x2, mpic, 0x4, 0x1,
> -                             0x9000, 0x0, 0x0, 0x3, mpic, 0x2, 0x1,
> -                             0x9000, 0x0, 0x0, 0x4, mpic, 0x1, 0x1,
> +                             0x9000, 0x0, 0x0, 0x1, mpic, 0x3, 0x1, 0x0, 0x0,
> +                             0x9000, 0x0, 0x0, 0x2, mpic, 0x4, 0x1, 0x0, 0x0,
> +                             0x9000, 0x0, 0x0, 0x3, mpic, 0x2, 0x1, 0x0, 0x0,
> +                             0x9000, 0x0, 0x0, 0x4, mpic, 0x1, 0x1, 0x0, 0x0,
>                            };
> -    for (i = 0; i < (7 * 8); i++) {
> +    for (i = 0; i < ARRAY_SIZE(tmp); i++) {
>         pci_map[i] = cpu_to_be32(tmp[i]);
>     }
>  }
> @@ -107,7 +107,7 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
>     uint32_t mpic_ph;
>     char gutil[128];
>     char pci[128];
> -    uint32_t pci_map[7 * 8];
> +    uint32_t pci_map[9 * 8];
>     uint32_t pci_ranges[12] = { 0x200, 0x0, 0xc000, 0xc000, 0x0,
>                                 0x2000, 0x100, 0x0, 0x0, 0xe100,
>                                 0x0, 0x1 };
> @@ -249,15 +249,18 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
>             MPC8544_MPIC_REGS_BASE - MPC8544_CCSRBAR_BASE);
>     qemu_devtree_add_subnode(fdt, mpic);
>     qemu_devtree_setprop_string(fdt, mpic, "device_type", "open-pic");
> -    qemu_devtree_setprop_string(fdt, mpic, "compatible", "chrp,open-pic");
> +    qemu_devtree_setprop_string(fdt, mpic, "compatible", "fsl,mpic");
>     qemu_devtree_setprop_cell2(fdt, mpic, "reg", MPC8544_MPIC_REGS_BASE -
>                                MPC8544_CCSRBAR_BASE, 0x4);
>     qemu_devtree_setprop_cell(fdt, mpic, "#address-cells", 0);
> -    qemu_devtree_setprop_cell(fdt, mpic, "#interrupt-cells", 2);
> +    qemu_devtree_setprop_cell(fdt, mpic, "#interrupt-cells", 4);
>     mpic_ph = qemu_devtree_alloc_phandle(fdt);
>     qemu_devtree_setprop_cell(fdt, mpic, "phandle", mpic_ph);
>     qemu_devtree_setprop_cell(fdt, mpic, "linux,phandle", mpic_ph);
>     qemu_devtree_setprop(fdt, mpic, "interrupt-controller", NULL, 0);
> +    qemu_devtree_setprop(fdt, mpic, "big-endian", NULL, 0);
> +    qemu_devtree_setprop(fdt, mpic, "single-cpu-affinity", NULL, 0);
> +    qemu_devtree_setprop_cell(fdt, mpic, "last-interrupt-source", 255);
>
>     /*
>      * We have to generate ser1 first, because Linux takes the first
> @@ -273,7 +276,7 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
>                                MPC8544_CCSRBAR_BASE, 0x100);
>     qemu_devtree_setprop_cell(fdt, ser1, "cell-index", 1);
>     qemu_devtree_setprop_cell(fdt, ser1, "clock-frequency", 0);
> -    qemu_devtree_setprop_cell2(fdt, ser1, "interrupts", 42, 2);
> +    qemu_devtree_setprop_cell4(fdt, ser1, "interrupts", 42, 2, 0, 0);
>     qemu_devtree_setprop_phandle(fdt, ser1, "interrupt-parent", mpic);
>     qemu_devtree_setprop_string(fdt, "/aliases", "serial1", ser1);
>
> @@ -286,7 +289,7 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
>                                MPC8544_CCSRBAR_BASE, 0x100);
>     qemu_devtree_setprop_cell(fdt, ser0, "cell-index", 0);
>     qemu_devtree_setprop_cell(fdt, ser0, "clock-frequency", 0);
> -    qemu_devtree_setprop_cell2(fdt, ser0, "interrupts", 42, 2);
> +    qemu_devtree_setprop_cell4(fdt, ser0, "interrupts", 42, 2, 0, 0);
>     qemu_devtree_setprop_phandle(fdt, ser0, "interrupt-parent", mpic);
>     qemu_devtree_setprop

Re: [Qemu-devel] [PATCH 5/6] fdc: use LOG_UNIMP logging

On Mon, Jun 4, 2012 at 9:36 AM, Kevin Wolf  wrote:
> Am 03.06.2012 19:38, schrieb Blue Swirl:
>> Convert uses of FLOPPY_ERROR to either FLOPPY_DPRINTF
>> (for implemented cases) or to use LOG_UNIMP (unimplemented).
>>
>> Signed-off-by: Blue Swirl 
>
> I would suggest that you check the messages of those cases that became
> FLOPPY_DPRINTF(). Originally the macro printed "FLOPPY ERROR: " and now
> it's not even mentioned any more that it is an error message, making
> messages like "writing sector %d" totally misleading.

Is that an error condition at all? It looks like just debugging.

>
> If you fix that up:
>
> Acked-by: Kevin Wolf

[Qemu-devel] [PATCH qom-next 2/7] qom: Add get_id

From: Paolo Bonzini 

Some classes may present objects differently in errors, for example if they
are not part of the composition tree or if they are not assigned an id by
the user.  Let them do this with a get_id method on Object, and use the
method consistently where a %(device) appears in the error.

Signed-off-by: Paolo Bonzini 
[AF: Renamed _object_get_id() to object_instance_get_id(), avoid ?:.]
[AF: Use object_property_is_child().]
Signed-off-by: Andreas Färber 
---
 hw/qdev-properties.c  |6 +++---
 hw/qdev.c |   15 ++-
 include/qemu/object.h |   11 +++
 qom/object.c  |   26 +-
 4 files changed, 53 insertions(+), 5 deletions(-)

diff --git a/hw/qdev-properties.c b/hw/qdev-properties.c
index fcc0bed..4dc03f6 100644
--- a/hw/qdev-properties.c
+++ b/hw/qdev-properties.c
@@ -937,16 +937,16 @@ void error_set_from_qdev_prop_error(Error **errp, int 
ret, DeviceState *dev,
 switch (ret) {
 case -EEXIST:
 error_set(errp, QERR_PROPERTY_VALUE_IN_USE,
-  object_get_typename(OBJECT(dev)), prop->name, value);
+  object_get_id(OBJECT(dev)), prop->name, value);
 break;
 default:
 case -EINVAL:
 error_set(errp, QERR_PROPERTY_VALUE_BAD,
-  object_get_typename(OBJECT(dev)), prop->name, value);
+  object_get_id(OBJECT(dev)), prop->name, value);
 break;
 case -ENOENT:
 error_set(errp, QERR_PROPERTY_VALUE_NOT_FOUND,
-  object_get_typename(OBJECT(dev)), prop->name, value);
+  object_get_id(OBJECT(dev)), prop->name, value);
 break;
 case 0:
 break;
diff --git a/hw/qdev.c b/hw/qdev.c
index c12e151..7304e4c 100644
--- a/hw/qdev.c
+++ b/hw/qdev.c
@@ -259,7 +259,7 @@ void qdev_init_nofail(DeviceState *dev)
 {
 if (qdev_init(dev) < 0) {
 error_report("Initialization of device %s failed",
- object_get_typename(OBJECT(dev)));
+ object_get_id(OBJECT(dev)));
 exit(1);
 }
 }
@@ -716,6 +716,13 @@ static void device_finalize(Object *obj)
 }
 }
 
+static const char *qdev_get_id(Object *obj)
+{
+DeviceState *dev = DEVICE(obj);
+
+return dev->id != NULL ? dev->id : object_get_typename(obj);
+}
+
 static void device_class_base_init(ObjectClass *class, void *data)
 {
 DeviceClass *klass = DEVICE_CLASS(class);
@@ -746,6 +753,11 @@ Object *qdev_get_machine(void)
 return dev;
 }
 
+static void device_class_init(ObjectClass *class, void *data)
+{
+class->get_id = qdev_get_id;
+}
+
 static TypeInfo device_type_info = {
 .name = TYPE_DEVICE,
 .parent = TYPE_OBJECT,
@@ -753,6 +765,7 @@ static TypeInfo device_type_info = {
 .instance_init = device_initfn,
 .instance_finalize = device_finalize,
 .class_base_init = device_class_base_init,
+.class_init = device_class_init,
 .abstract = true,
 .class_size = sizeof(DeviceClass),
 };
diff --git a/include/qemu/object.h b/include/qemu/object.h
index 1606777..81e0280 100644
--- a/include/qemu/object.h
+++ b/include/qemu/object.h
@@ -239,6 +239,9 @@ struct ObjectClass
 {
 /*< private >*/
 Type type;
+
+/*< public >*/
+const char *(*get_id)(Object *);
 };
 
 typedef enum ObjectState {
@@ -507,6 +510,14 @@ Object *object_dynamic_cast(Object *obj, const char 
*typename);
 Object *object_dynamic_cast_assert(Object *obj, const char *typename);
 
 /**
+ * object_get_id:
+ * @obj: A derivative of #Object
+ *
+ * Returns: A string that can be used to refer to @obj.
+ */
+const char *object_get_id(Object *obj);
+
+/**
  * object_get_class:
  * @obj: A derivative of #Object
  *
diff --git a/qom/object.c b/qom/object.c
index 93e0499..02464e1 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -346,6 +346,24 @@ static void object_property_del_child(Object *obj, Object 
*child, Error **errp)
 }
 }
 
+static const char *object_instance_get_id(Object *obj)
+{
+ObjectProperty *prop;
+
+QTAILQ_FOREACH(prop, &obj->properties, node) {
+if (object_property_is_child(prop) && prop->opaque == obj) {
+return prop->name;
+}
+}
+
+return "";
+}
+
+const char *object_get_id(Object *obj)
+{
+return obj->class->get_id(obj);
+}
+
 void object_unparent(Object *obj)
 {
 if (obj->parent) {
@@ -685,7 +703,7 @@ ObjectProperty *object_property_find(Object *obj, const 
char *name,
 }
 }
 
-error_set(errp, QERR_PROPERTY_NOT_FOUND, "", name);
+error_set(errp, QERR_PROPERTY_NOT_FOUND, object_get_id(obj), name);
 return NULL;
 }
 
@@ -1249,6 +1267,11 @@ static void object_instance_init(Object *obj)
 object_property_add_str(obj, "type", qdev_get_type, NULL, NULL);
 }
 
+static void object_class_init(ObjectClass *klass, void *class_data)
+{
+klass->get_id = object_instance_get_id;
+}
+
 static void register_types(void)
 {
 static TypeInfo interface_info = {
@@ -1261,6 +1284,7 @@ static void

[Qemu-devel] [PATCH qom-next 3/7] qdev: Generalize properties to Objects

From: Paolo Bonzini 

The property machinery uses DeviceState arguments in a few places.
Replace this with Object so that we can push properties up.

Signed-off-by: Paolo Bonzini 
[AF: Fixed indentation in set_taddr().]
Signed-off-by: Andreas Färber 
---
 hw/qdev-addr.c   |   19 ++---
 hw/qdev-properties.c |  180 +
 hw/qdev.c|8 +--
 hw/qdev.h|   10 ++--
 4 files changed, 93 insertions(+), 124 deletions(-)

diff --git a/hw/qdev-addr.c b/hw/qdev-addr.c
index a3796bd..cecae59 100644
--- a/hw/qdev-addr.c
+++ b/hw/qdev-addr.c
@@ -5,26 +5,25 @@
 
 /* --- target physical address --- */
 
-static int parse_taddr(DeviceState *dev, Property *prop, const char *str)
+static int parse_taddr(Object *obj, Property *prop, const char *str)
 {
-target_phys_addr_t *ptr = qdev_get_prop_ptr(dev, prop);
+target_phys_addr_t *ptr = object_get_prop_ptr(obj, prop);
 
 *ptr = strtoull(str, NULL, 16);
 return 0;
 }
 
-static int print_taddr(DeviceState *dev, Property *prop, char *dest, size_t 
len)
+static int print_taddr(Object *obj, Property *prop, char *dest, size_t len)
 {
-target_phys_addr_t *ptr = qdev_get_prop_ptr(dev, prop);
+target_phys_addr_t *ptr = object_get_prop_ptr(obj, prop);
 return snprintf(dest, len, "0x" TARGET_FMT_plx, *ptr);
 }
 
 static void get_taddr(Object *obj, Visitor *v, void *opaque,
   const char *name, Error **errp)
 {
-DeviceState *dev = DEVICE(obj);
 Property *prop = opaque;
-target_phys_addr_t *ptr = qdev_get_prop_ptr(dev, prop);
+target_phys_addr_t *ptr = object_get_prop_ptr(obj, prop);
 int64_t value;
 
 value = *ptr;
@@ -34,9 +33,8 @@ static void get_taddr(Object *obj, Visitor *v, void *opaque,
 static void set_taddr(Object *obj, Visitor *v, void *opaque,
   const char *name, Error **errp)
 {
-DeviceState *dev = DEVICE(obj);
 Property *prop = opaque;
-target_phys_addr_t *ptr = qdev_get_prop_ptr(dev, prop);
+target_phys_addr_t *ptr = object_get_prop_ptr(obj, prop);
 Error *local_err = NULL;
 int64_t value;
 
@@ -53,9 +51,8 @@ static void set_taddr(Object *obj, Visitor *v, void *opaque,
 if ((uint64_t)value <= (uint64_t) ~(target_phys_addr_t)0) {
 *ptr = value;
 } else {
-error_set(errp, QERR_PROPERTY_VALUE_OUT_OF_RANGE,
-  dev->id?:"", name, value, (uint64_t) 0,
-  (uint64_t) ~(target_phys_addr_t)0);
+error_set(errp, QERR_INVALID_PARAMETER_VALUE,
+  name, "target_phys_addr_t");
 }
 }
 
diff --git a/hw/qdev-properties.c b/hw/qdev-properties.c
index 4dc03f6..910e07f 100644
--- a/hw/qdev-properties.c
+++ b/hw/qdev-properties.c
@@ -3,23 +3,23 @@
 #include "qerror.h"
 #include "blockdev.h"
 
-void *qdev_get_prop_ptr(DeviceState *dev, Property *prop)
+void *object_get_prop_ptr(Object *obj, Property *prop)
 {
-void *ptr = dev;
+void *ptr = obj;
 ptr += prop->offset;
 return ptr;
 }
 
-static uint32_t qdev_get_prop_mask(Property *prop)
+static uint32_t get_prop_mask(Property *prop)
 {
 assert(prop->info == &qdev_prop_bit);
 return 0x1 << prop->bitnr;
 }
 
-static void bit_prop_set(DeviceState *dev, Property *props, bool val)
+static void bit_prop_set(Object *obj, Property *props, bool val)
 {
-uint32_t *p = qdev_get_prop_ptr(dev, props);
-uint32_t mask = qdev_get_prop_mask(props);
+uint32_t *p = object_get_prop_ptr(obj, props);
+uint32_t mask = get_prop_mask(props);
 if (val)
 *p |= mask;
 else
@@ -28,19 +28,18 @@ static void bit_prop_set(DeviceState *dev, Property *props, 
bool val)
 
 /* Bit */
 
-static int print_bit(DeviceState *dev, Property *prop, char *dest, size_t len)
+static int print_bit(Object *obj, Property *prop, char *dest, size_t len)
 {
-uint32_t *p = qdev_get_prop_ptr(dev, prop);
-return snprintf(dest, len, (*p & qdev_get_prop_mask(prop)) ? "on" : "off");
+uint32_t *p = object_get_prop_ptr(obj, prop);
+return snprintf(dest, len, (*p & get_prop_mask(prop)) ? "on" : "off");
 }
 
 static void get_bit(Object *obj, Visitor *v, void *opaque,
 const char *name, Error **errp)
 {
-DeviceState *dev = DEVICE(obj);
 Property *prop = opaque;
-uint32_t *p = qdev_get_prop_ptr(dev, prop);
-bool value = (*p & qdev_get_prop_mask(prop)) != 0;
+uint32_t *p = object_get_prop_ptr(obj, prop);
+bool value = (*p & get_prop_mask(prop)) != 0;
 
 visit_type_bool(v, &value, name, errp);
 }
@@ -48,7 +47,6 @@ static void get_bit(Object *obj, Visitor *v, void *opaque,
 static void set_bit(Object *obj, Visitor *v, void *opaque,
 const char *name, Error **errp)
 {
-DeviceState *dev = DEVICE(obj);
 Property *prop = opaque;
 Error *local_err = NULL;
 bool value;
@@ -63,7 +61,7 @@ static void set_bit(Object *obj, Visitor *v, void *opaque,
 error_propagate(errp, local_err);
 return;

[Qemu-devel] CoW image commit+shrink(= make_empty) support

2012-06-07 Thread Taisuke Yamada

I attended Paolo Bonzini's qemu session ("Live Disk Operations: Juggling
Data and Trying to go Unnoticed") in LinuxCon Japan, and he adviced me
to post the bits I have regarding my question on qemu's  support on shrinking
CoW image.

Here's my problem description.

I recently designed a experimental system which holds VM master images
on a HDD and CoW snapshots on a SSD. VMs run on CoW snapshots only.
This split-image configration is done to keep VM I/Os on a SSD

As SSD capacity is rather limited, I need to do a writeback commit from SSD to
HDD time to time, and that is done during weekend/midnight. The problem is
although a commit is made, that alone won't shrink CoW image - all unused blocks
are still kept in a snapshot, and uses up space.

Patch attached is a workaround I added to cope with the problem,
but the basic problem I faced was that both QCOW2/QED format still does not
support "bdrv_make_empty" API.

Implementing the API (say, by hole punching) seemed like a lot of effort, so
I ended up creating a new CoW image, and then replace current CoW
snapshot with a new (empty) one. But I find the code ugly.

In his talk, Paolo suggested possibility of using new "live op" API for this
task, but I'm not aware of the actual API. Is there any documentation or
source code I can look at to re-implement above feature?

Best Regards,


qemu-block-refresh.patch
Description: Binary data

[Qemu-devel] [PATCH qom-next 0/7] QOM realize, revised

Hi Paolo,

I've modified the remainder of your static properties series, in particular:

"qdev: Push state up to Object":
* OBJECT_STATE_CREATED -> OBJECT_STATE_INITIALIZED, to align with QOM API
* Don't set early in object_instance_init() but in object_init_with_type()
  after all initfns have been run.

"qom: add get_id":
* _object_get_id() -> object_instance_get_id(), to avoid underscore
* Avoid GCC ?: expression, suggested by malc.
* Use newly introduced object_property_is_child() helper.

"qdev: Generalize properties to Objects":
* Fixed indentation.

"qdev: Move bulk of qdev-properties.c to qom/object-properties.c":
* Documentation fix: qdev_property_add_static -> object_property_add_static
* Move from hw/qdev-properties.c to a new qom/object-properties.c
  instead of qom/object.c.

"qom: Push static properties to Object":
* Build fix: Adapt arm_gic_properties in hw/arm_gic.c as well.

"qom: Add "realized" property":
* Adapted to OBJECT_STATE_INITIALIZED.

"qom: Add QERR_PROPERTY_SET_AFTER_REALIZE":
* Redid the hw/qdev-properties.c changes in qom/object-properties.c.

If you're okay with these, I'll append them to the qom-next queue and will
send out the PULL. Otherwise I'll split qom-next into two batches.

Available at:
https://github.com/afaerber/qemu-cpu/commits/realize

Regards,
Andreas

Cc: Paolo Bonzini 
Cc: Anthony Liguori 
Cc: malc 

Paolo Bonzini (6):
  qdev: Push state up to Object
  qom: Add get_id
  qdev: Generalize properties to Objects
  qdev: Move bulk of qdev-properties.c to qom/object-properties.c
  qom: Push static properties to Object
  qom: Add "realized" property

Peter Maydell (1):
  qom: Add QERR_PROPERTY_SET_AFTER_REALIZE

 hw/9pfs/virtio-9p-device.c|2 +-
 hw/a15mpcore.c|3 +-
 hw/a9mpcore.c |2 +-
 hw/ac97.c |2 +-
 hw/acpi_piix4.c   |2 +-
 hw/apic_common.c  |2 +-
 hw/applesmc.c |2 +-
 hw/arm11mpcore.c  |6 +-
 hw/arm_gic.c  |2 +-
 hw/arm_l2x0.c |2 +-
 hw/arm_mptimer.c  |2 +-
 hw/arm_sysctl.c   |2 +-
 hw/arm_timer.c|3 +-
 hw/armv7m.c   |3 +-
 hw/armv7m_nvic.c  |2 +-
 hw/cadence_gem.c  |2 +-
 hw/ccid-card-emulated.c   |2 +-
 hw/ccid-card-passthru.c   |2 +-
 hw/cs4231.c   |2 +-
 hw/cs4231a.c  |2 +-
 hw/debugcon.c |3 +-
 hw/ds1225y.c  |2 +-
 hw/e1000.c|2 +-
 hw/eccmemctl.c|2 +-
 hw/eepro100.c |2 +-
 hw/escc.c |2 +-
 hw/esp.c  |2 +-
 hw/etraxfs_eth.c  |3 +-
 hw/etraxfs_pic.c  |3 +-
 hw/exynos4210_combiner.c  |2 +-
 hw/exynos4210_gic.c   |3 +-
 hw/exynos4210_uart.c  |2 +-
 hw/fdc.c  |6 +-
 hw/fw_cfg.c   |2 +-
 hw/g364fb.c   |2 +-
 hw/grlib_apbuart.c|3 +-
 hw/grlib_gptimer.c|2 +-
 hw/grlib_irqmp.c  |2 +-
 hw/gus.c  |2 +-
 hw/hda-audio.c|6 +-
 hw/hpet.c |2 +-
 hw/i2c.c  |2 +-
 hw/i82374.c   |2 +-
 hw/i82378.c   |2 +-
 hw/i8254.c|2 +-
 hw/i8259_common.c |2 +-
 hw/ide/ahci.c |2 +-
 hw/ide/cmd646.c   |3 +-
 hw/ide/isa.c  |2 +-
 hw/ide/qdev.c |8 +-
 hw/integratorcp.c |3 +-
 hw/intel-hda.c|4 +-
 hw/ioh3420.c  |2 +-
 hw/ivshmem.c  |2 +-
 hw/kvm/i8254.c|2 +-
 hw/kvm/ioapic.c   |2 +-
 hw/lan9118.c  |2 +-
 hw/lance.c|2 +-
 hw/lm32_sys.c |2 +-
 hw/lm32_timer.c   |2 +-
 hw/m48t59.c   |4 +-
 hw/marvell_88w8618_audio.c|2 +-
 hw/mc146818rtc.c  |2 +-
 hw/milkymist-minimac2.c   |2 +-
 hw/milkymist-softusb.c|2 +-
 hw/milkymist-sysctl.c |2 +-
 hw/milkymist-vgafb.c  |2 +-
 hw/mipsnet.c  |2 +-
 hw/musicpal.c |2 +-
 hw/nand.c |2 +-
 hw/ne2000-isa.c   |3 +-
 hw/ne2000.c   |2 +-
 hw/omap_gpio.c|4 +-
 hw/omap_i2c.c |2 +-
 hw/omap_intc.c|4 +-
 hw/onenand.c  |2 +-
 hw/opencores_eth.c|2 +-
 hw/parallel.c |3 +-
 hw/pc_sysfw.c |2 +-
 hw/pci.c  |2 +-
 hw/pci_bridge_dev.c   |2

[Qemu-devel] [PATCH qom-next 4/7] qdev: Move bulk of qdev-properties.c to qom/object-properties.c

From: Paolo Bonzini 

Signed-off-by: Paolo Bonzini 
[AF: Move to new qom/object-properties.c, update documentation.]
Signed-off-by: Andreas Färber 
---
 hw/qdev-properties.c|  487 +--
 hw/qdev.c   |   47 +-
 hw/qdev.h   |   87 -
 include/qemu/object.h   |   98 ++
 qom/Makefile|2 +-
 qom/object-properties.c |  461 
 6 files changed, 607 insertions(+), 575 deletions(-)
 create mode 100644 qom/object-properties.c

diff --git a/hw/qdev-properties.c b/hw/qdev-properties.c
index 910e07f..5187604 100644
--- a/hw/qdev-properties.c
+++ b/hw/qdev-properties.c
@@ -3,392 +3,27 @@
 #include "qerror.h"
 #include "blockdev.h"
 
-void *object_get_prop_ptr(Object *obj, Property *prop)
-{
-void *ptr = obj;
-ptr += prop->offset;
-return ptr;
-}
-
-static uint32_t get_prop_mask(Property *prop)
-{
-assert(prop->info == &qdev_prop_bit);
-return 0x1 << prop->bitnr;
-}
-
-static void bit_prop_set(Object *obj, Property *props, bool val)
-{
-uint32_t *p = object_get_prop_ptr(obj, props);
-uint32_t mask = get_prop_mask(props);
-if (val)
-*p |= mask;
-else
-*p &= ~mask;
-}
-
-/* Bit */
-
-static int print_bit(Object *obj, Property *prop, char *dest, size_t len)
-{
-uint32_t *p = object_get_prop_ptr(obj, prop);
-return snprintf(dest, len, (*p & get_prop_mask(prop)) ? "on" : "off");
-}
-
-static void get_bit(Object *obj, Visitor *v, void *opaque,
-const char *name, Error **errp)
-{
-Property *prop = opaque;
-uint32_t *p = object_get_prop_ptr(obj, prop);
-bool value = (*p & get_prop_mask(prop)) != 0;
-
-visit_type_bool(v, &value, name, errp);
-}
-
-static void set_bit(Object *obj, Visitor *v, void *opaque,
-const char *name, Error **errp)
-{
-Property *prop = opaque;
-Error *local_err = NULL;
-bool value;
-
-if (object_is_realized(obj)) {
-error_set(errp, QERR_PERMISSION_DENIED);
-return;
-}
-
-visit_type_bool(v, &value, name, &local_err);
-if (local_err) {
-error_propagate(errp, local_err);
-return;
-}
-bit_prop_set(obj, prop, value);
-}
-
-PropertyInfo qdev_prop_bit = {
-.name  = "boolean",
-.legacy_name  = "on/off",
-.print = print_bit,
-.get   = get_bit,
-.set   = set_bit,
-};
-
-/* --- 8bit integer --- */
-
-static void get_uint8(Object *obj, Visitor *v, void *opaque,
-  const char *name, Error **errp)
-{
-Property *prop = opaque;
-uint8_t *ptr = object_get_prop_ptr(obj, prop);
-
-visit_type_uint8(v, ptr, name, errp);
-}
-
-static void set_uint8(Object *obj, Visitor *v, void *opaque,
-  const char *name, Error **errp)
-{
-Property *prop = opaque;
-uint8_t *ptr = object_get_prop_ptr(obj, prop);
-
-if (object_is_realized(obj)) {
-error_set(errp, QERR_PERMISSION_DENIED);
-return;
-}
-
-visit_type_uint8(v, ptr, name, errp);
-}
-
-PropertyInfo qdev_prop_uint8 = {
-.name  = "uint8",
-.get   = get_uint8,
-.set   = set_uint8,
-};
-
-/* --- 8bit hex value --- */
-
-static int parse_hex8(Object *obj, Property *prop, const char *str)
-{
-uint8_t *ptr = object_get_prop_ptr(obj, prop);
-char *end;
-
-if (str[0] != '0' || str[1] != 'x') {
-return -EINVAL;
-}
-
-*ptr = strtoul(str, &end, 16);
-if ((*end != '\0') || (end == str)) {
-return -EINVAL;
-}
-
-return 0;
-}
-
-static int print_hex8(Object *obj, Property *prop, char *dest, size_t len)
-{
-uint8_t *ptr = object_get_prop_ptr(obj, prop);
-return snprintf(dest, len, "0x%" PRIx8, *ptr);
-}
-
-PropertyInfo qdev_prop_hex8 = {
-.name  = "uint8",
-.legacy_name  = "hex8",
-.parse = parse_hex8,
-.print = print_hex8,
-.get   = get_uint8,
-.set   = set_uint8,
-};
-
-/* --- 16bit integer --- */
-
-static void get_uint16(Object *obj, Visitor *v, void *opaque,
-   const char *name, Error **errp)
-{
-Property *prop = opaque;
-uint16_t *ptr = object_get_prop_ptr(obj, prop);
-
-visit_type_uint16(v, ptr, name, errp);
-}
-
-static void set_uint16(Object *obj, Visitor *v, void *opaque,
-   const char *name, Error **errp)
-{
-Property *prop = opaque;
-uint16_t *ptr = object_get_prop_ptr(obj, prop);
-
-if (object_is_realized(obj)) {
-error_set(errp, QERR_PERMISSION_DENIED);
-return;
-}
-
-visit_type_uint16(v, ptr, name, errp);
-}
-
-PropertyInfo qdev_prop_uint16 = {
-.name  = "uint16",
-.get   = get_uint16,
-.set   = set_uint16,
-};
-
-/* --- 32bit integer --- */
-
-static void get_uint32(Object *obj, Visitor *v, void *opaque,
-   const char *name, Error **errp)
-{
-Property *prop = opaque;
-uint32_t *ptr = object_get_prop_ptr(obj, prop);
-
-visit_type_uint

[Qemu-devel] [PATCH qom-next 6/7] qom: Add "realized" property

From: Paolo Bonzini 

Since we had to move the state field from DeviceState to Object, we cannot
delay the implementation of the "realized" property.  The property is
a trigger for two actions that propagate through the composition tree.
"Realize" is called when the property becomes true, and propagates in
pre-order; realize can fail if the values of the properties are not valid.
"Unrealize" is called when the property becomes false, and propagates in
post-order; unrealize cannot fail.

Realize/unrealize is separate from reset.  Reset propagation is a thorny
issue of its own.  We expect classes that care to implement a reset method
and call it from realize or realize_children, depending on whether
pre-order or post-order is more appropriate.

This patch adds four methods (realize, realize_children, unrealize,
unrealize_children) to ObjectClass, together with a default implementation
of realize_children and unrealize_children.

Signed-off-by: Paolo Bonzini 
Signed-off-by: Andreas Färber 
---
 include/qemu/object.h |   20 +++
 qom/object.c  |   89 +
 2 files changed, 109 insertions(+), 0 deletions(-)

diff --git a/include/qemu/object.h b/include/qemu/object.h
index 4ea1187..05ea711 100644
--- a/include/qemu/object.h
+++ b/include/qemu/object.h
@@ -246,6 +246,10 @@ struct ObjectClass
 /*< public >*/
 Property *props;
 const char *(*get_id)(Object *);
+void (*realize)(Object *obj, struct Error **errp);
+void (*realize_children)(Object *obj, struct Error **errp);
+void (*unrealize)(Object *obj);
+void (*unrealize_children)(Object *obj);
 };
 
 typedef enum ObjectState {
@@ -464,6 +468,22 @@ Object *object_new_with_type(Type type);
 void object_delete(Object *obj);
 
 /**
+ * object_realize_children:
+ * @obj: The object whose children should be realized.
+ *
+ * The default implementation of realize_children.
+ */
+void object_realize_children(Object *obj, struct Error **errp);
+
+/**
+ * object_unrealize_children:
+ * @obj: The object whose children should be unrealize.
+ *
+ * The default implementation of unrealize_children.
+ */
+void object_unrealize_children(Object *obj);
+
+/**
  * object_initialize_with_type:
  * @obj: A pointer to the memory to be used for the object.
  * @type: The type of the object to instantiate.
diff --git a/qom/object.c b/qom/object.c
index a639348..40bc23a 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -265,6 +265,87 @@ static void object_interface_init(Object *obj, 
InterfaceImpl *iface)
 obj->interfaces = g_slist_prepend(obj->interfaces, iface_obj);
 }
 
+static void object_get_realized(Object *obj, Visitor *v, void *opaque,
+const char *name, Error **errp)
+{
+bool value = object_is_realized(obj);
+
+visit_type_bool(v, &value, name, errp);
+}
+
+static void object_unrealize(Object *obj)
+{
+ObjectClass *klass = object_get_class(obj);
+
+if (klass->unrealize_children) {
+klass->unrealize_children(obj);
+}
+if (obj->state != OBJECT_STATE_INITIALIZED && klass->unrealize) {
+klass->unrealize(obj);
+}
+obj->state = OBJECT_STATE_INITIALIZED;
+}
+
+static int object_unrealize_one(Object *obj, void *unused)
+{
+object_unrealize(obj);
+return 0;
+}
+
+void object_unrealize_children(Object *obj)
+{
+object_child_foreach(obj, object_unrealize_one, NULL);
+}
+
+static void object_realize(Object *obj, Error **errp)
+{
+ObjectClass *klass = object_get_class(obj);
+
+if (obj->state != OBJECT_STATE_REALIZED && klass->realize) {
+klass->realize(obj, errp);
+}
+obj->state = OBJECT_STATE_REALIZED;
+if (klass->realize_children) {
+klass->realize_children(obj, errp);
+}
+}
+
+static int object_realize_one(Object *obj, void *errp)
+{
+Error *err = NULL;
+object_realize(obj, &err);
+if (err) {
+error_propagate((Error **)errp, err);
+return 1;
+}
+
+return 0;
+}
+
+void object_realize_children(Object *obj, Error **errp)
+{
+object_child_foreach(obj, object_realize_one, errp);
+}
+
+static void object_set_realized(Object *obj, Visitor *v, void *opaque,
+const char *name, Error **errp)
+{
+bool value;
+Error *err = NULL;
+
+visit_type_bool(v, &value, name, &err);
+if (err) {
+error_propagate(errp, err);
+return;
+}
+
+if (value) {
+object_realize(obj, errp);
+} else {
+object_unrealize(obj);
+}
+}
+
 static void object_init_with_type(Object *obj, TypeImpl *ti)
 {
 int i;
@@ -373,6 +454,8 @@ void object_unparent(Object *obj)
 
 static void object_deinit(Object *obj, TypeImpl *type)
 {
+object_property_set_bool(obj, false, "realized", NULL);
+
 if (type->instance_finalize) {
 type->instance_finalize(obj);
 }
@@ -1277,6 +1360,9 @@ static void object_instance_init(Object *obj)
 
 object_property_add_str(obj, "type", qde

Re: [Qemu-devel] [PATCH qom-next 7/7] qom: Add QERR_PROPERTY_SET_AFTER_REALIZE

Am 07.06.2012 21:31, schrieb Andreas Färber:
> From: Peter Maydell 
> 
> Add a new QError QERR_PROPERTY_SET_AFTER_REALIZE for attempts
> to set a QOM or qdev property after the object/device has been
> realized. This allows a slightly more informative diagnostic
> than the previous "Insufficient permission" message.
> 
> Signed-off-by: Peter Maydell 
> Signed-off-by: Paolo Bonzini 
> Signed-off-by: Andreas Färber 
> ---
>  hw/qdev-properties.c|   15 ++-
>  qerror.c|4 
>  qerror.h|3 +++
>  qom/object-properties.c |   24 
>  qom/object.c|6 --
>  5 files changed, 37 insertions(+), 15 deletions(-)
[...]
> diff --git a/qom/object.c b/qom/object.c
> index 40bc23a..c8a2cd7 100644
> --- a/qom/object.c
> +++ b/qom/object.c
> @@ -817,7 +817,8 @@ void object_property_get(Object *obj, Visitor *v, const 
> char *name,
>  }
>  
>  if (!prop->get) {
> -error_set(errp, QERR_PERMISSION_DENIED);
> +error_set(errp, QERR_PROPERTY_SET_AFTER_REALIZE,
> +  object_get_id(obj), name);
>  } else {
>  prop->get(obj, v, prop->opaque, name, errp);
>  }
> @@ -832,7 +833,8 @@ void object_property_set(Object *obj, Visitor *v, const 
> char *name,
>  }
>  
>  if (!prop->set) {
> -error_set(errp, QERR_PERMISSION_DENIED);
> +error_set(errp, QERR_PROPERTY_SET_AFTER_REALIZE,
> +  object_get_id(obj), name);
>  } else {
>  prop->set(obj, v, prop->opaque, name, errp);
>  }

Hm, what does the lack of a setter have to do with realize? :)
Reverting these two hunks.

Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

[Qemu-devel] [PATCH qom-next 7/7] qom: Add QERR_PROPERTY_SET_AFTER_REALIZE

From: Peter Maydell 

Add a new QError QERR_PROPERTY_SET_AFTER_REALIZE for attempts
to set a QOM or qdev property after the object/device has been
realized. This allows a slightly more informative diagnostic
than the previous "Insufficient permission" message.

Signed-off-by: Peter Maydell 
Signed-off-by: Paolo Bonzini 
Signed-off-by: Andreas Färber 
---
 hw/qdev-properties.c|   15 ++-
 qerror.c|4 
 qerror.h|3 +++
 qom/object-properties.c |   24 
 qom/object.c|6 --
 5 files changed, 37 insertions(+), 15 deletions(-)

diff --git a/hw/qdev-properties.c b/hw/qdev-properties.c
index 7379c1c..830f3c7 100644
--- a/hw/qdev-properties.c
+++ b/hw/qdev-properties.c
@@ -76,7 +76,8 @@ static void set_pointer(Object *obj, Visitor *v, Property 
*prop,
 int ret;
 
 if (object_is_realized(obj)) {
-error_set(errp, QERR_PERMISSION_DENIED);
+error_set(errp, QERR_PROPERTY_SET_AFTER_REALIZE,
+  object_get_id(obj), name);
 return;
 }
 
@@ -242,7 +243,8 @@ static void set_vlan(Object *obj, Visitor *v, void *opaque,
 VLANState *vlan;
 
 if (object_is_realized(obj)) {
-error_set(errp, QERR_PERMISSION_DENIED);
+error_set(errp, QERR_PROPERTY_SET_AFTER_REALIZE,
+  object_get_id(obj), name);
 return;
 }
 
@@ -303,7 +305,8 @@ static void set_mac(Object *obj, Visitor *v, void *opaque,
 char *str, *p;
 
 if (object_is_realized(obj)) {
-error_set(errp, QERR_PERMISSION_DENIED);
+error_set(errp, QERR_PROPERTY_SET_AFTER_REALIZE,
+  object_get_id(obj), name);
 return;
 }
 
@@ -391,7 +394,8 @@ static void set_pci_devfn(Object *obj, Visitor *v, void 
*opaque,
 char *str;
 
 if (object_is_realized(obj)) {
-error_set(errp, QERR_PERMISSION_DENIED);
+error_set(errp, QERR_PROPERTY_SET_AFTER_REALIZE,
+  object_get_id(obj), name);
 return;
 }
 
@@ -469,7 +473,8 @@ static void set_blocksize(Object *obj, Visitor *v, void 
*opaque,
 const int64_t max = 32768;
 
 if (object_is_realized(obj)) {
-error_set(errp, QERR_PERMISSION_DENIED);
+error_set(errp, QERR_PROPERTY_SET_AFTER_REALIZE,
+  object_get_id(obj), name);
 return;
 }
 
diff --git a/qerror.c b/qerror.c
index 92c4eff..d3768cb 100644
--- a/qerror.c
+++ b/qerror.c
@@ -233,6 +233,10 @@ static const QErrorStringTable qerror_table[] = {
 .desc  = "Property '%(device).%(property)' not found",
 },
 {
+.error_fmt = QERR_PROPERTY_SET_AFTER_REALIZE,
+.desc  = "Property '%(device).%(property)' cannot be set after 
realize",
+},
+{
 .error_fmt = QERR_PROPERTY_VALUE_BAD,
 .desc  = "Property '%(device).%(property)' doesn't take value 
'%(value)'",
 },
diff --git a/qerror.h b/qerror.h
index b4c8758..b5cb730 100644
--- a/qerror.h
+++ b/qerror.h
@@ -196,6 +196,9 @@ QError *qobject_to_qerror(const QObject *obj);
 #define QERR_PROPERTY_NOT_FOUND \
 "{ 'class': 'PropertyNotFound', 'data': { 'device': %s, 'property': %s } }"
 
+#define QERR_PROPERTY_SET_AFTER_REALIZE \
+"{ 'class': 'PropertySetAfterRealize', 'data': { 'device': %s, 'property': 
%s } }"
+
 #define QERR_PROPERTY_VALUE_BAD \
 "{ 'class': 'PropertyValueBad', 'data': { 'device': %s, 'property': %s, 
'value': %s } }"
 
diff --git a/qom/object-properties.c b/qom/object-properties.c
index 6765e90..8c70e5f 100644
--- a/qom/object-properties.c
+++ b/qom/object-properties.c
@@ -50,7 +50,8 @@ static void set_bit(Object *obj, Visitor *v, void *opaque,
 bool value;
 
 if (object_is_realized(obj)) {
-error_set(errp, QERR_PERMISSION_DENIED);
+error_set(errp, QERR_PROPERTY_SET_AFTER_REALIZE,
+  object_get_id(obj), name);
 return;
 }
 
@@ -88,7 +89,8 @@ static void set_uint8(Object *obj, Visitor *v, void *opaque,
 uint8_t *ptr = object_get_prop_ptr(obj, prop);
 
 if (object_is_realized(obj)) {
-error_set(errp, QERR_PERMISSION_DENIED);
+error_set(errp, QERR_PROPERTY_SET_AFTER_REALIZE,
+  object_get_id(obj), name);
 return;
 }
 
@@ -153,7 +155,8 @@ static void set_uint16(Object *obj, Visitor *v, void 
*opaque,
 uint16_t *ptr = object_get_prop_ptr(obj, prop);
 
 if (object_is_realized(obj)) {
-error_set(errp, QERR_PERMISSION_DENIED);
+error_set(errp, QERR_PROPERTY_SET_AFTER_REALIZE,
+  object_get_id(obj), name);
 return;
 }
 
@@ -184,7 +187,8 @@ static void set_uint32(Object *obj, Visitor *v, void 
*opaque,
 uint32_t *ptr = object_get_prop_ptr(obj, prop);
 
 if (object_is_realized(obj)) {
-error_set(errp, QERR_PERMISSION_DENIED);
+error_set(errp, QERR_PROPERTY_SET_AFTER_REALIZE,
+  object_get_id(obj), name);
 return;
 }
 
@@ -207,

[Qemu-devel] [PATCH qom-next 1/7] qdev: Push state up to Object

From: Paolo Bonzini 

qdev properties use the state member (an embryo of the "realized"
property) in order to disable setting them after a device has been
initialized.  So, in order to push qdev properties up to Object
we need to push this bit there too.

Signed-off-by: Paolo Bonzini 
[AF: Rename to OBJECT_STATE_INITIALIZED and set it after instance_init.]
Signed-off-by: Andreas Färber 
---
 hw/qdev-addr.c|3 ++-
 hw/qdev-properties.c  |   26 +-
 hw/qdev.c |   11 +--
 hw/qdev.h |6 --
 include/qemu/object.h |   14 ++
 qom/object.c  |7 +++
 6 files changed, 41 insertions(+), 26 deletions(-)

diff --git a/hw/qdev-addr.c b/hw/qdev-addr.c
index b711b6b..a3796bd 100644
--- a/hw/qdev-addr.c
+++ b/hw/qdev-addr.c
@@ -1,3 +1,4 @@
+#include "qemu/object.h"
 #include "qdev.h"
 #include "qdev-addr.h"
 #include "targphys.h"
@@ -39,7 +40,7 @@ static void set_taddr(Object *obj, Visitor *v, void *opaque,
 Error *local_err = NULL;
 int64_t value;
 
-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
 error_set(errp, QERR_PERMISSION_DENIED);
 return;
 }
diff --git a/hw/qdev-properties.c b/hw/qdev-properties.c
index 099a7aa..fcc0bed 100644
--- a/hw/qdev-properties.c
+++ b/hw/qdev-properties.c
@@ -53,7 +53,7 @@ static void set_bit(Object *obj, Visitor *v, void *opaque,
 Error *local_err = NULL;
 bool value;
 
-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
 error_set(errp, QERR_PERMISSION_DENIED);
 return;
 }
@@ -93,7 +93,7 @@ static void set_uint8(Object *obj, Visitor *v, void *opaque,
 Property *prop = opaque;
 uint8_t *ptr = qdev_get_prop_ptr(dev, prop);
 
-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
 error_set(errp, QERR_PERMISSION_DENIED);
 return;
 }
@@ -160,7 +160,7 @@ static void set_uint16(Object *obj, Visitor *v, void 
*opaque,
 Property *prop = opaque;
 uint16_t *ptr = qdev_get_prop_ptr(dev, prop);
 
-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
 error_set(errp, QERR_PERMISSION_DENIED);
 return;
 }
@@ -193,7 +193,7 @@ static void set_uint32(Object *obj, Visitor *v, void 
*opaque,
 Property *prop = opaque;
 uint32_t *ptr = qdev_get_prop_ptr(dev, prop);
 
-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
 error_set(errp, QERR_PERMISSION_DENIED);
 return;
 }
@@ -218,7 +218,7 @@ static void set_int32(Object *obj, Visitor *v, void *opaque,
 Property *prop = opaque;
 int32_t *ptr = qdev_get_prop_ptr(dev, prop);
 
-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
 error_set(errp, QERR_PERMISSION_DENIED);
 return;
 }
@@ -291,7 +291,7 @@ static void set_uint64(Object *obj, Visitor *v, void 
*opaque,
 Property *prop = opaque;
 uint64_t *ptr = qdev_get_prop_ptr(dev, prop);
 
-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
 error_set(errp, QERR_PERMISSION_DENIED);
 return;
 }
@@ -379,7 +379,7 @@ static void set_string(Object *obj, Visitor *v, void 
*opaque,
 Error *local_err = NULL;
 char *str;
 
-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
 error_set(errp, QERR_PERMISSION_DENIED);
 return;
 }
@@ -457,7 +457,7 @@ static void set_pointer(Object *obj, Visitor *v, Property 
*prop,
 char *str;
 int ret;
 
-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
 error_set(errp, QERR_PERMISSION_DENIED);
 return;
 }
@@ -626,7 +626,7 @@ static void set_vlan(Object *obj, Visitor *v, void *opaque,
 int64_t id;
 VLANState *vlan;
 
-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
 error_set(errp, QERR_PERMISSION_DENIED);
 return;
 }
@@ -696,7 +696,7 @@ static void set_mac(Object *obj, Visitor *v, void *opaque,
 int i, pos;
 char *str, *p;
 
-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
 error_set(errp, QERR_PERMISSION_DENIED);
 return;
 }
@@ -766,7 +766,7 @@ static void set_enum(Object *obj, Visitor *v, void *opaque,
 Property *prop = opaque;
 int *ptr = qdev_get_prop_ptr(dev, prop);
 
-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
 error_set(errp, QERR_PERMISSION_DENIED);
 return;
 }
@@ -797,7 +797,7 @@ static void set_pci_devfn(Object *obj, Visitor *v, void 
*opaque,
 Error *local_err = NULL;
 char *str;
 
-if (dev->state != DEV_STATE_CREATED) {
+if (object_is_realized(obj)) {
 error_set(errp, QERR_PERMISSION_DENIED);
 return;
 }
@@ -867,7 +867,7 @@ static void set_blocksize(Object *obj, Visitor *v, v

[Qemu-devel] [PULL] iov* function rework (one more time)

2012-06-07 Thread Michael Tokarev

The following changes since commit 083dbf489d1b0592e910ecfb90b3858c23e49ab7:

  target-microblaze: fix swx build breakage (2012-06-07 10:12:00 +0200)

are available in the git repository at:

  git://git.corpit.ru/qemu.git mjt-iov

for you to fetch changes up to 85c5ece9bc0bd30f0573e43d1ddd756154ac6849:

  rewrite iov_send_recv() and move it to iov.c (2012-06-07 21:22:54 +0400)


Michael Tokarev (11):
  virtio-serial-bus: use correct lengths in control_out() message
  change iov_* function prototypes to be more appropriate
  rewrite iov_* functions
  consolidate qemu_iovec_memset{,_skip}() into single function and use 
existing iov_memset()
  allow qemu_iovec_from_buffer() to specify offset from which to start 
copying
  consolidate qemu_iovec_copy() and qemu_iovec_concat() and make them 
consistent
  change qemu_iovec_to_buf() to match other to,from_buf functions
  rename qemu_sendv to iov_send, change proto and move declarations to iov.h
  export iov_send_recv() and use it in iov_send() and iov_recv()
  cleanup qemu_co_sendv(), qemu_co_recvv() and friends
  rewrite iov_send_recv() and move it to iov.c

This is the same patchset which has been submitted, resubmitted,
rewritten, resubmitted, split, resubmitted, merged, rewritten again,
resubmitted and finally received a promise from Anthony to be looked
at.  Today, months later, I'm still awaiiting for the answer, and,
while I said before that the last resubmission was, well, last,
since I bothered so many people so many times, I decided to break
my promise, rebase against current qemy/master and resend it,
now as a git pull request, to not mailbomb people again.  The rebase
took quite some work again, since the code changed (obviously) since
the patchset was ready before.  During rebase I reviewed all the
commit messages too, and removed all the Cc lines they had.

As far as I remember, all comments about the patchset has been
addressed or answered, the last event was the above mentioned
promise.

I ensured that each commit in the series compiles and works (this
time I didn't perform extensive tests as before, just very basic
tests), so it is bisectable as before.

The description for the patchset is the same as before, can be found
at http://thread.gmane.org/gmane.comp.emulators.qemu/142079 .
New diffstat is below.

The patchest can be browsed online at
http://git.corpit.ru/?p=qemu.git;a=shortlog;h=refs/heads/mjt-iov

Please pull.

Thanks,

/mjt

 Makefile.objs  |2 +-
 block.c|   12 ++---
 block/curl.c   |6 +--
 block/iscsi.c  |3 +-
 block/nbd.c|   18 ---
 block/qcow.c   |4 +-
 block/qcow2.c  |   21 
 block/qed.c|   10 ++--
 block/rbd.c|4 +-
 block/sheepdog.c   |6 +--
 cutils.c   |  234 
---
 hw/9pfs/virtio-9p.c|8 +--
 hw/rtl8139.c   |2 +-
 hw/usb/core.c  |6 +--
 hw/virtio-balloon.c|4 +-
 hw/virtio-net.c|4 +-
 hw/virtio-serial-bus.c |   10 ++--
 iov.c  |  192 
---
 iov.h  |   77 ++---
 linux-aio.c|4 +-
 net.c  |2 +-
 posix-aio-compat.c |8 ++-
 qemu-common.h  |   56 ++---
 qemu-coroutine-io.c|   83 ++-
 tests/Makefile |2 +
 tests/test-iov.c   |  260 
+
 26 files changed, 620 insertions(+), 418 deletions(-)
 create mode 100644 tests/test-iov.c

Re: [Qemu-devel] [PATCH 05/13] pci: Add pci_device_route_intx_to_irq

On Thu, Jun 07, 2012 at 06:46:38PM +0200, Jan Kiszka wrote:
> On 2012-06-07 18:28, Michael S. Tsirkin wrote:
> > On Thu, Jun 07, 2012 at 05:10:17PM +0200, Jan Kiszka wrote:
> >> On 2012-06-07 16:32, Michael S. Tsirkin wrote:
> >>> On Mon, Jun 04, 2012 at 10:52:13AM +0200, Jan Kiszka wrote:
>  @@ -1089,6 +1093,14 @@ static void pci_set_irq(void *opaque, int 
>  irq_num, int level)
>   pci_change_irq_level(pci_dev, irq_num, change);
>   }
>   
>  +PCIINTxRoute pci_device_route_intx_to_irq(PCIDevice *dev, int pin)
>  +{
>  +PCIBus *bus = dev->host_bus;
>  +
>  +assert(bus->route_intx_to_irq);
>  +return bus->route_intx_to_irq(bus->irq_opaque, 
>  dev->host_intx_pin[pin]);
>  +}
>  +
>   /***/
>   /* monitor info on PCI */
>   
> >>>
> >>> Just an idea: can devices cache this result, bypassing the
> >>> intx to irq lookup on data path?
> >>
> >> That lookup is part of set_irq which we don't bypass so far and where
> >> this is generally trivial. If we want to cache the effects of set_irq as
> >> well, I guess things would become pretty complex (e.g. due to vmstate
> >> compatibility), and I'm unsure if it would buy us much.
> > 
> > This is less for performance but more for making
> > everyone use the same infrastructure rather than
> > assigned devices being the weird case.
> 
> Device assignment is weird. It bypasses all state updates as it does not
> have to bother about migratability.
> 
> Well, of course we could cache the host bridge routing result as well,
> for every device. It would have to be in addition to host_intx_pin. But
> the result would look pretty strange to me.
> 
> In any case, I would prefer to do this, if at all, on top of this
> series, specifically as it will require to touch all host bridges.

Yes that's fine.

> > 
> >>>
>  diff --git a/hw/pci.h b/hw/pci.h
>  index 5b54e2d..bbba01e 100644
>  --- a/hw/pci.h
>  +++ b/hw/pci.h
>  @@ -141,6 +141,15 @@ enum {
>   #define PCI_DEVICE_GET_CLASS(obj) \
>    OBJECT_GET_CLASS(PCIDeviceClass, (obj), TYPE_PCI_DEVICE)
>   
>  +typedef struct PCIINTxRoute {
>  +enum {
>  +PCI_INTX_ENABLED,
>  +PCI_INTX_INVERTED,
>  +PCI_INTX_DISABLED,
>  +} mode;
>  +int irq;
>  +} PCIINTxRoute;
> >>>
> >>> Is this INTX route or IRQ route?
> >>> Is the INTX enabled/disabled/inverted or the IRQ?
> >>>
> >>> I have the impression it's the IRQ, in the apic.
> >>> PCI INTX are never inverted they are always active low.
> >>
> >> This should be considered as "the route *of* an INTx", not "to some
> >> IRQ". I could call it PCIINTxToIRQRoute if you prefer, but it's a bit
> >> lengthy.
> >>
> >> Jan
> > 
> > Yes but the polarity is in apic? Or is it in host bridge?
> > 
> 
> Nope (then we would not have to bother). At least one host bridge
> (bonito) is apparently able to invert the polarity.
> 
> Jan
>

Re: [Qemu-devel] [PATCH 05/13] pci: Add pci_device_route_intx_to_irq

On 2012-06-07 18:28, Michael S. Tsirkin wrote:
> On Thu, Jun 07, 2012 at 05:10:17PM +0200, Jan Kiszka wrote:
>> On 2012-06-07 16:32, Michael S. Tsirkin wrote:
>>> On Mon, Jun 04, 2012 at 10:52:13AM +0200, Jan Kiszka wrote:
 @@ -1089,6 +1093,14 @@ static void pci_set_irq(void *opaque, int irq_num, 
 int level)
  pci_change_irq_level(pci_dev, irq_num, change);
  }
  
 +PCIINTxRoute pci_device_route_intx_to_irq(PCIDevice *dev, int pin)
 +{
 +PCIBus *bus = dev->host_bus;
 +
 +assert(bus->route_intx_to_irq);
 +return bus->route_intx_to_irq(bus->irq_opaque, 
 dev->host_intx_pin[pin]);
 +}
 +
  /***/
  /* monitor info on PCI */
  
>>>
>>> Just an idea: can devices cache this result, bypassing the
>>> intx to irq lookup on data path?
>>
>> That lookup is part of set_irq which we don't bypass so far and where
>> this is generally trivial. If we want to cache the effects of set_irq as
>> well, I guess things would become pretty complex (e.g. due to vmstate
>> compatibility), and I'm unsure if it would buy us much.
> 
> This is less for performance but more for making
> everyone use the same infrastructure rather than
> assigned devices being the weird case.

Device assignment is weird. It bypasses all state updates as it does not
have to bother about migratability.

Well, of course we could cache the host bridge routing result as well,
for every device. It would have to be in addition to host_intx_pin. But
the result would look pretty strange to me.

In any case, I would prefer to do this, if at all, on top of this
series, specifically as it will require to touch all host bridges.

> 
>>>
 diff --git a/hw/pci.h b/hw/pci.h
 index 5b54e2d..bbba01e 100644
 --- a/hw/pci.h
 +++ b/hw/pci.h
 @@ -141,6 +141,15 @@ enum {
  #define PCI_DEVICE_GET_CLASS(obj) \
   OBJECT_GET_CLASS(PCIDeviceClass, (obj), TYPE_PCI_DEVICE)
  
 +typedef struct PCIINTxRoute {
 +enum {
 +PCI_INTX_ENABLED,
 +PCI_INTX_INVERTED,
 +PCI_INTX_DISABLED,
 +} mode;
 +int irq;
 +} PCIINTxRoute;
>>>
>>> Is this INTX route or IRQ route?
>>> Is the INTX enabled/disabled/inverted or the IRQ?
>>>
>>> I have the impression it's the IRQ, in the apic.
>>> PCI INTX are never inverted they are always active low.
>>
>> This should be considered as "the route *of* an INTx", not "to some
>> IRQ". I could call it PCIINTxToIRQRoute if you prefer, but it's a bit
>> lengthy.
>>
>> Jan
> 
> Yes but the polarity is in apic? Or is it in host bridge?
> 

Nope (then we would not have to bother). At least one host bridge
(bonito) is apparently able to invert the polarity.

Jan



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Description: OpenPGP digital signature

Re: [Qemu-devel] [PATCH 05/13] pci: Add pci_device_route_intx_to_irq

On Thu, Jun 07, 2012 at 05:10:17PM +0200, Jan Kiszka wrote:
> On 2012-06-07 16:32, Michael S. Tsirkin wrote:
> > On Mon, Jun 04, 2012 at 10:52:13AM +0200, Jan Kiszka wrote:
> >> @@ -1089,6 +1093,14 @@ static void pci_set_irq(void *opaque, int irq_num, 
> >> int level)
> >>  pci_change_irq_level(pci_dev, irq_num, change);
> >>  }
> >>  
> >> +PCIINTxRoute pci_device_route_intx_to_irq(PCIDevice *dev, int pin)
> >> +{
> >> +PCIBus *bus = dev->host_bus;
> >> +
> >> +assert(bus->route_intx_to_irq);
> >> +return bus->route_intx_to_irq(bus->irq_opaque, 
> >> dev->host_intx_pin[pin]);
> >> +}
> >> +
> >>  /***/
> >>  /* monitor info on PCI */
> >>  
> > 
> > Just an idea: can devices cache this result, bypassing the
> > intx to irq lookup on data path?
> 
> That lookup is part of set_irq which we don't bypass so far and where
> this is generally trivial. If we want to cache the effects of set_irq as
> well, I guess things would become pretty complex (e.g. due to vmstate
> compatibility), and I'm unsure if it would buy us much.

This is less for performance but more for making
everyone use the same infrastructure rather than
assigned devices being the weird case.

> > 
> >> diff --git a/hw/pci.h b/hw/pci.h
> >> index 5b54e2d..bbba01e 100644
> >> --- a/hw/pci.h
> >> +++ b/hw/pci.h
> >> @@ -141,6 +141,15 @@ enum {
> >>  #define PCI_DEVICE_GET_CLASS(obj) \
> >>   OBJECT_GET_CLASS(PCIDeviceClass, (obj), TYPE_PCI_DEVICE)
> >>  
> >> +typedef struct PCIINTxRoute {
> >> +enum {
> >> +PCI_INTX_ENABLED,
> >> +PCI_INTX_INVERTED,
> >> +PCI_INTX_DISABLED,
> >> +} mode;
> >> +int irq;
> >> +} PCIINTxRoute;
> > 
> > Is this INTX route or IRQ route?
> > Is the INTX enabled/disabled/inverted or the IRQ?
> > 
> > I have the impression it's the IRQ, in the apic.
> > PCI INTX are never inverted they are always active low.
> 
> This should be considered as "the route *of* an INTx", not "to some
> IRQ". I could call it PCIINTxToIRQRoute if you prefer, but it's a bit
> lengthy.
> 
> Jan

Yes but the polarity is in apic? Or is it in host bridge?

-- 
MST

[Qemu-devel] [PULL] rtl8139,pci,msi

The following changes since commit 8cc9b43f7c5f826b39af4b012ad89bb55faac29c:

  target-microblaze: lwx/swx: first implementation (2012-06-04 10:19:46 +0200)

are available in the git repository at:

  git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_anthony

for you to fetch changes up to 11e02c393109508fde4d99650f003dd2d6029bc5:

  pci_bridge_dev: fix error path in pci_bridge_dev_initfn() (2012-06-07 
17:19:01 +0300)


rtl8139,pci,msi

This pull includes a bugfix for rtl8139 (this is independent of
Jason Wang's fix which Anthony has merged) and pci bridge hotplug bugfixes.
Further there are MSI/MSIX fixes and changes by Jan which should
also help merging device assignment down the road.

Signed-off-by: Michael S. Tsirkin 


Fernando Luis Vazquez Cao (1):
  rtl8139: honor RxOverflow flag in can_receive method

Jan Kiszka (9):
  ahci: Fix reset of MSI function
  intel-hda: Fix reset of MSI function
  ahci: Clean up reset functions
  msi: Guard msi_reset with msi_present
  msi: Invoke msi/msix_reset from PCI core
  msi: Guard msi/msix_write_config with msi_present
  msi: Invoke msi/msix_write_config from PCI core
  msi: Use msi/msix_present more consistently
  msix: Drop unused msix_bar_size

Jason Baron (2):
  qdev: release parent properties on dc->init failure
  pci_bridge_dev: fix error path in pci_bridge_dev_initfn()

Michael S. Tsirkin (1):
  shpc: unparent device before free

 hw/ide/ahci.c   | 25 +++--
 hw/ide/ahci.h   |  2 +-
 hw/ide/ich.c| 19 ---
 hw/intel-hda.c  | 12 
 hw/ioh3420.c|  3 +--
 hw/ivshmem.c|  1 -
 hw/msi.c| 11 ---
 hw/msix.c   | 23 +--
 hw/msix.h   |  2 --
 hw/pci.c|  8 
 hw/pci.h|  2 --
 hw/pci_bridge.c | 10 ++
 hw/pci_bridge_dev.c |  8 
 hw/qdev.c   |  1 +
 hw/rtl8139.c|  2 +-
 hw/shpc.c   |  1 +
 hw/virtio-pci.c |  3 ---
 hw/xio3130_downstream.c |  3 +--
 hw/xio3130_upstream.c   |  3 +--
 19 files changed, 61 insertions(+), 78 deletions(-)

Re: [Qemu-devel] [PATCH 08/10] qom: push static properties to Object

Am 23.05.2012 17:44, schrieb Paolo Bonzini:
> This patch is made much larger by the need to touch all assignments
> of props.  The interesting changes are in hw/qdev-monitor.c,
> hw/qdev-properties.c, hw/qdev.c, hw/qdev.h, include/qemu/object.h,
> qom/object.c.
> 
> Signed-off-by: Paolo Bonzini 

As previously mentioned on IRC, this needed an additional conversion for
arm_gic_properties in hw/arm_gic.c as compile fix.

/-F

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

[Qemu-devel] [PATCH] make_device_config.sh: Fix target path in generated dependency file

config-devices.mak.d is included from Makefile.target, i.e. from inside
the *-softmmu/ directory. It included the directory path, so never
applied to the actual config-devices.mak. Symptoms were spurious
dependency issues with default-configs/pci.mak.

Fix by using `basename` to strip the directory path.

Reported-by: Gerhard Wiesinger 
Signed-off-by: Andreas Färber 
---
 Seems I forgot to send this out before 1.1...

 scripts/make_device_config.sh |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/scripts/make_device_config.sh b/scripts/make_device_config.sh
index 5d14885..0778fe2 100644
--- a/scripts/make_device_config.sh
+++ b/scripts/make_device_config.sh
@@ -25,4 +25,4 @@ done
 process_includes $src > $dest
 
 cat $src $all_includes | grep -v '^include' > $dest
-echo "$1: $all_includes" > $dep
+echo "`basename $1`: $all_includes" > $dep
-- 
1.7.7

Re: [Qemu-devel] [PATCH 0/3][v17] megasas: LSI Megaraid SAS HBA emulation

On Tue, May 29, 2012 at 01:51:15PM +0200, Hannes Reinecke wrote:
> This is an updated patchset for megasas. Upon popular demand
> I've split it into three parts, the header file, the emulation
> itself, and a patch adding trace events to the emulation.
> 
> Paolo, can you merge it via your tree? Or should I ask
> someone else?
> 
> Changes since v17:
> - Fix crash when booting without Option ROM,
>   reported by Alex Graf
> 
> Changes since v16:
> - Codingstyle fixes, reported by Alex Graf
> 
> Changes since v15:
> - Move to new SCSI API
> - Use generic trace functions for DCMDs
> - Replace bitfields with defines
> - Implement CFG_READ
> - Fix enclosure ID reporting
> 
> Changes since v14:
> - Rename MPTState to MegasasState
> - Use bool type
> - Enable 64 bit PCI accesses
> - Replace raid mode string handling
> - Use common function for requests handling
> 
> Changes since v13:
> - Remove separate MSI-X BAR
> - Simplify BAR allocation
> 
> Changes since v12:
> - Fixup flag setting via properties
> - Fixup MSI-X handling
> - Disable MSI-X per default
> 
> Changes since v11:
> - Remove unneeded variables
> 
> Changes since v10:
> - Port to new device type API
> - Include suggestion from Alex Graf:
> - Remove 'inline' function declaration
> - Queue setup and interrupt enablement needs to be treated
>   independently
> - Always read in 64 bit context and just mask out the top
>   bits if required
> 
> Changes since v9:
> - Split off trace events into a separate patch
> - Do not check for max_luns in PD Info
> - Update trace events
> - Clarify license statement
> - Fixup coding style issues
> 
> Changes since v8:
> - Remove 'disable' keyword from trace definitions
> - Convert hand-crafted debugging statements with trace
>   definitions
> - Treat 'context' tag as little endian
> Changes since v7:
> - Port to new memory API
> - Port to new PCI infrastructure
> - Use fixed buffers for sense processing
> - Update to updated SCSI infrastructure
> 
> Changes since v6:
> - Preliminary patches pushed to Kevins block tree
> - Implement 64bit contexts, required for Windows7
> - Use iovecs for DCMD processing
> - Add MSI-X support
>   Latest Linux driver now happily uses MSI-X.
> - Static iovec allocation
>   We have a fixed upper number of iovecs, so we can
>   save us the allocation. Suggested by Alex Graf.
> - Update MFI header
>   Latest Linux driver has some more definitions,
>   add them
> - Fixup AEN handling
> - Update tracing details
> - Remove sdev pointer from megasas_cmd_t
> 
> Changes since v5:
> - megasas: Use tracing infrastructure instead of DPRINTF
> - megasas: Use new PCI infrastructure
> - megasas: Check for iovec mapping failure
>   cpu_map_physical_memory() might fail, so we need to check for
>   it when mapping iovecs.
> - megasas: Trace scsi buffer overflow
>   The transfer length as specified in the SCSI command might
>   disagree with the length of the iovec. We should be tracing
>   these issues.
> - megasas: Reset frames after init firmware
>   When receiving an INIT FIRMWARE command we need reset all
>   frames, otherwise some frames might point to invalid memory.
> 
> Chances since v4:
> - megasas: checkpatch.pl fixes and update to work with the
>   changed interface in scsi_req_new(). Also included the
>   suggested fixes from Alex.
> 
> Hannes Reinecke (3):
>   megasas: Add header file
>   megasas: LSI Megaraid SAS HBA emulation
>   megasas: Add trace events
> 
>  Makefile.objs   |1 +
>  default-configs/pci.mak |1 +
>  hw/megasas.c| 2198 
> +++
>  hw/mfi.h| 1248 +++
>  hw/pci_ids.h|3 +-
>  trace-events|   79 ++
>  6 files changed, 3529 insertions(+), 1 deletions(-)
>  create mode 100644 hw/megasas.c
>  create mode 100644 hw/mfi.h

Not a line-by-line review but overall it looks okay.  I also tested that
a RHEL 6 guest sees a SCSI disk.

Tested-by: Stefan Hajnoczi

Re: [Qemu-devel] [PATCH 11/13] Move pci_parse_devaddr to qdev-properties

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

Am 07.06.2012 17:11, schrieb Jan Kiszka:
> On 2012-06-07 14:57, Andreas Färber wrote:
>> These last three patches collide with Paolo's QOM properties 
>> refactoring: qdev properties are being generalized to Object and
>> on my GitHub "realize" branch are being moved to
>> qom/object-properties.c (object.c in the original series). Please
>> defer this change.
> 
> Depends on how long merging of those branches shall take. This is
> some important piece for preparing device assignment for upstream,
> thus finally closing the qemu-kvm fork. I need all this back-merged
> in qemu-kvm soon to proceed.
> 
> Can you (both) comment on the merge schedule for your patches? Are
> we talking about a week or so?

I'm working towards sending the updated patches from realize branch
today and the PULL by tomorrow. When it gets merged I cannot predict.

We could speed this up if Paolo takes a look at what I have so far,
starting at "qdev: Push state up to Object":
https://github.com/afaerber/qemu-cpu/commits/realize
- From there on I expect it's gonna be cherry-picking and rebasing again.

Maybe split your series in two? I can cc you on the PULL so that you
can rebase and immediately piggyback the property changes. ;)

Andreas

- -- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
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Re: [Qemu-devel] [PATCH v2 0/2] xen: Clean up BlockDriverState use

2012-06-07 Thread Stefano Stabellini

On Wed, 6 Jun 2012, Markus Armbruster wrote:
> Compile tested only.  Stefano, please give it a whirl.
> 
> v2: Moved a declaration to an inner block on Stefano's request.
> 
> Markus Armbruster (2):
>   xen: Don't change -drive if=xen device name during machine init
>   xen: Don't peek behind the BlockDriverState abstraction
> 
>  hw/xen_devconfig.c |   13 ++---
>  hw/xen_disk.c  |6 --
>  2 files changed, 10 insertions(+), 9 deletions(-)

I am OK with this series, however how do you intend to address Peter's
comments?

Re: [Qemu-devel] [PATCH 00/16] introduce OptsVisitor, rebase -net/-netdev parsing

Il 07/06/2012 17:29, Michael Roth ha scritto:
> For QEMU <-> X serialization/deserialization, such as a visitor which
> implements a wire encoding (QMP being the only example currently), we need to
> take care that the wire encoding is compatible with the representation
> expected by the other end (according to the QAPI schema or whatever other
> means we use to document it). This holds for QMP/JSON, and we'll need to take
> care that it holds for anything that's added in the future.

Actually the string visitor does indeed need an uint64 visitor exactly
for this reason.  Will be done before 1.2. :)

Laszlo's option visitor needs the same, but it's not in the tree.

Paolo

Re: [Qemu-devel] [PATCH 00/16] introduce OptsVisitor, rebase -net/-netdev parsing

2012-06-07 Thread Michael Roth

On Thu, Jun 07, 2012 at 01:29:54PM +0200, Laszlo Ersek wrote:
> On 06/06/12 22:09, Michael Roth wrote:
> > On Wed, Jun 06, 2012 at 06:49:19PM +0200, Laszlo Ersek wrote:
> 
> >> The fallback (*v->type_int)() call stores an int64_t, according to its
> >> prototype ("interface contract"). IMHO it shouldn't try to communicate a
> >> mathematical value outside of [INT64_MIN, INT64_MAX]; it should report
> > 
> > But the contract with visit_type_int() is maintained: it's just that
> > visit_type_uint64() is casting it's uint64_t value to int64_t (and
> > back) to make use of the fallback. It's slightly dirty, but fairly common
> > throughout the tree.
> 
> (I'm going theoretical :))
> 
> Sorry, I didn't mean what happens "around" the type_int method; I meant
> what happens inside it.
> 
> A visitor type takes some "external type" (a bag of data, structured or
> unstructured) and provides functions with scalar target types (among
> other things). One defines a native C struct in the JSON (... I'm making
> some leaps here), the generated code traverses that C type, and probes
> the "bag of data" with the corresponding visitor. A type_int call made
> to the visitor says "hey I need an int64_t for this node of the target C
> struct, with this 'path' and 'name' locator inside the external object".
> If the 'path' (= eg. visitor stack) and 'name' identify a piece of info
> in the external object that can't be represented in the requested target
> type, the visitor should report an error. I don't see much difference
> between the decimal representation of 2^63 and the string "donkey" in
> this regard if the target C "node" is an int64_t.
> 
> (Musing block ends :))

Yes, that's a good point, care must be taken when implementing a visitor to not
rely on on the fallback unless the serialized representation is compatible with
the original type. Otherwise an explicit interface for that type should
be implemented.

For QEMU <-> QEMU serialization/deserialization, there are actually unit
tests in qom-next that'll fail if this condition does not hold.

For QEMU <-> X serialization/deserialization, such as a visitor which
implements a wire encoding (QMP being the only example currently), we need to
take care that the wire encoding is compatible with the representation
expected by the other end (according to the QAPI schema or whatever other
means we use to document it). This holds for QMP/JSON, and we'll need to take
care that it holds for anything that's added in the future.

But in that case, the restriction is not a matter of whether a value
passed to visit_type_int() is within a certain range, but rather that
the encoding itself is compatible with the documented type, so enforcing
this constraint is a broader matter that cannot be checked generically, and
must be handled instead by unit tests which employ intimate knowledge of
the Visitor that's being tested, such as with tests/test-qmp-output-visitor.c.

> 
> Of course I'm fine with dropping the fourth hunk.
> 
> Thanks,
> Laszlo
>

[Qemu-devel] [Bug 1002121] Re: disk error when guest boot up via qcow2 image

Hmm, it might be related if the error happens during early boot: Could
you try if

http://thread.gmane.org/gmane.comp.emulators.kvm.devel/92036

makes a difference in your scenario?

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https://bugs.launchpad.net/bugs/1002121

Title:
  disk error when guest boot up via qcow2 image

Status in QEMU:
  New

Bug description:
  Host OS (ia32/ia32e/IA64): ia32e
  Guest OS (ia32/ia32e/IA64): ia32e
  Guest OS Type (Linux/Windows): Linux(rhel6u1)
  kvm.git Commit: 51bfd2998113e1f8ce8dcf853407b76a04b5f2a0
  qemu-kvm Commit: e54f008ef8f968cfc2f3ecab78491d180fa31efc
  Host Kernel Version:3.4.0-rc7
  Hardware: WSM-EP, Romley-EP

  
  Bug detailed description:
  --
  If I boot up a guest using qcow2 image, the guest show “disk read error”.  If 
you press some key to continue, after being automatically repaired, the guest 
can boot up.

  This should be a qemu-kvm regression.
  kvm  + qemu-kvm   =  result
  51bfd299 + e54f008e=  bad 
  51bfd299 + b320b8b7   =  good

  Note:
  1. guest rhel6u1, guest show “disk error”
 guest rhel6u2, guest show black screen
 this phenomenon occurs at the first time to create guest
  2. create guest with raw image, this phenomenon doesn’t appear.

  
  Reproduce steps:
  
  1.start up a host with kvm (commit: 51bfd299) and use qemu-kvm 
(commit:e54f008e)
  2.qemu-img create –b /share/ia32e_rhel6u1.img –f qcow2
  /root/rhel6u1.qcow
  3.qemu-system-x86_64 -mem 1024 –hda /root/rhel6u1.qcow

  Current result:
  
  Guest console shows:
  error 25:Disk read error
  Prss any key to continue...

  
  Expected result:
  
  Guest boot up correctly

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[Qemu-devel] [Bug 1003054] Re: Socket not closed when a connection ends

2012-06-07 Thread Vincent Autefage

** Changed in: qemu
   Status: New => Fix Released

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https://bugs.launchpad.net/bugs/1003054

Title:
  Socket not closed when a connection ends

Status in QEMU:
  Fix Released

Bug description:
  Hi,

  I've noticed in the QEMU monitor that when a TCP connection between to
  QEMU virtual machines is closed in one side, the other side is not
  closed. Consequence is that the network behavior is completely messed
  up in case of a reconnection.

  For instance, we consider that we have 2 virtual machines :

  $ qemu -name A -net nic vlan=0 -net socket,vlan=0,listen=127.0.0.1:7000
  $ qemu -name B -net nic vlan=0 -net socket,vlan=0,connect=127.0.0.1:7000

  If the socket of B is closed (error or machine down), the socket in A
  is not closed :

  B % host_net_remove 0 socket.0

  A % info network
e1000.0: ...
socket.0: ... (The removed connection)

  B % host_net_add socket vlan=0,connect=127.0.0.1:7000

  A % info network
e1000.0: ...
socket.0: ...  (The removed connection)
socket.1: ...  (The new connection)

  By not perform any close on sockets of A, the new communication
  between A and B is corrupted (duplicated packets, invalid
  transmission, etc.).

  In the case of the close was performed by A, B should detect a problem
  on the socket and  retry a new connection, unfortunately, this is not
  the case.

  
  Those two problems corrupt the dynamicity of a QEMU topology which could be 
strongly problematic for the development of network tools based on QEMU.


  Thanks a lot.
  Vince

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Re: [Qemu-devel] [PATCH] use --libexecdir instead of ignoring it first and reinventing it later

2012-06-07 Thread Corey Bryant


On 06/06/2012 05:11 PM, Michael Tokarev wrote:

Commit 7b93fadf3a38d1ed65ea5536a52efc2772c6e3b8 "Add basic version
of bridge helper" put the bridge helper executable into a fixed
${prefix}/libexec/ location, instead of using ${libexecdir} for
this.  At the same time, --libexecdir is being happily ignored
by ./configure.  Even more, the same patch sets unused $libexecdir
variable in the generated config-host.mak, and uses fixed string
(\${prefix}/libexecdir) for the bridge helper binary.

Fix this braindamage by introducing $libexecdir variable, using
it for the bridge helper binary, and recognizing --libexecdir.



Thanks for the patch and apologies for the trouble.

Reviewed-by: Corey Bryant 

--
Regards,
Corey



This patch is applicable to stable-1.1.

Signed-off-by: Michael Tokarev
Cc: Corey Bryant
Cc: Richa Marwaha
Cc: qemu-sta...@nongnu.org
---
  configure |   10 +++---
  1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/configure b/configure
index 38dafec..fc86803 100755
--- a/configure
+++ b/configure
@@ -169,6 +169,7 @@ datadir="\${prefix}/share"
  qemu_docdir="\${prefix}/share/doc/qemu"
  bindir="\${prefix}/bin"
  libdir="\${prefix}/lib"
+libexecdir="\${prefix}/libexec"
  includedir="\${prefix}/include"
  sysconfdir="\${prefix}/etc"
  confsuffix="/qemu"
@@ -598,6 +599,8 @@ for opt do
;;
--libdir=*) libdir="$optarg"
;;
+  --libexecdir=*) libexecdir="$optarg"
+  ;;
--includedir=*) includedir="$optarg"
;;
--datadir=*) datadir="$optarg"
@@ -608,7 +611,7 @@ for opt do
;;
--sysconfdir=*) sysconfdir="$optarg"
;;
-  --sbindir=*|--libexecdir=*|--sharedstatedir=*|--localstatedir=*|\
+  --sbindir=*|--sharedstatedir=*|--localstatedir=*|\
--oldincludedir=*|--datarootdir=*|--infodir=*|--localedir=*|\
--htmldir=*|--dvidir=*|--pdfdir=*|--psdir=*)
  # These switches are silently ignored, for compatibility with
@@ -2960,6 +2963,7 @@ echo "Install prefix$prefix"
  echo "BIOS directory`eval echo $qemu_datadir`"
  echo "binary directory  `eval echo $bindir`"
  echo "library directory `eval echo $libdir`"
+echo "libexec directory `eval echo $libexecdir`"
  echo "include directory `eval echo $includedir`"
  echo "config directory  `eval echo $sysconfdir`"
  if test "$mingw32" = "no" ; then
@@ -3064,14 +3068,14 @@ echo all:>>  $config_host_mak
  echo "prefix=$prefix">>  $config_host_mak
  echo "bindir=$bindir">>  $config_host_mak
  echo "libdir=$libdir">>  $config_host_mak
+echo "libexecdir=$libexecdir">>  $config_host_mak
  echo "includedir=$includedir">>  $config_host_mak
  echo "mandir=$mandir">>  $config_host_mak
  echo "sysconfdir=$sysconfdir">>  $config_host_mak
  echo "qemu_confdir=$qemu_confdir">>  $config_host_mak
  echo "qemu_datadir=$qemu_datadir">>  $config_host_mak
  echo "qemu_docdir=$qemu_docdir">>  $config_host_mak
-echo "libexecdir=\${prefix}/libexec">>  $config_host_mak
-echo "CONFIG_QEMU_HELPERDIR=\"$prefix/libexec\"">>  $config_host_mak
+echo "CONFIG_QEMU_HELPERDIR=\"$libexecdir\"">>  $config_host_mak

  echo "ARCH=$ARCH">>  $config_host_mak
  if test "$debug_tcg" = "yes" ; then

Re: [Qemu-devel] [PATCH 06/13] pci: Add INTx routing notifier

On 2012-06-07 15:14, Michael S. Tsirkin wrote:
> On Mon, Jun 04, 2012 at 10:52:14AM +0200, Jan Kiszka wrote:
>> This per-device notifier shall be triggered by any interrupt router
>> along the path of a device's legacy interrupt signal on routing changes.
>> For simplicity reasons and as this is a slow path anyway, no further
>> details on the routing changes are provided. Instead, the callback is
>> expected to use pci_device_get_host_irq to check the effect of the
>> change.
> 
> pci_device_get_host_irq isn't in the cards anymore, no?

Yep, must be pci_device_route_intx_to_irq. Will fix if this series
requires more than dropping patch 2. Otherwise, I would ask you to
replace it on merge.

Thanks,
Jan



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Re: [Qemu-devel] [PATCH 11/13] Move pci_parse_devaddr to qdev-properties

On 2012-06-07 14:57, Andreas Färber wrote:
> Am 04.06.2012 10:52, schrieb Jan Kiszka:
>> We will some use this function also for property parsing, so move it
>> over unmodified and rename it.
>>
>> Signed-off-by: Jan Kiszka 
> 
> These last three patches collide with Paolo's QOM properties
> refactoring: qdev properties are being generalized to Object and on my
> GitHub "realize" branch are being moved to qom/object-properties.c
> (object.c in the original series). Please defer this change.

Depends on how long merging of those branches shall take. This is some
important piece for preparing device assignment for upstream, thus
finally closing the qemu-kvm fork. I need all this back-merged in
qemu-kvm soon to proceed.

Can you (both) comment on the merge schedule for your patches? Are we
talking about a week or so?

Jan

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Re: [Qemu-devel] [PATCH 5/6] blkdebug: optionally tie errors to a specific sector

On Wed, Jun 6, 2012 at 7:10 AM, Paolo Bonzini  wrote:
> This makes blkdebug scripts more powerful, and independent of the
> exact sequence of operations performed by streaming.
>
> Signed-off-by: Paolo Bonzini 
> ---
>  block/blkdebug.c |   26 --
>  1 file changed, 24 insertions(+), 2 deletions(-)

Seems useful.

Reviewed-by: Stefan Hajnoczi

Re: [Qemu-devel] [PATCH 05/13] pci: Add pci_device_route_intx_to_irq

On 2012-06-07 16:32, Michael S. Tsirkin wrote:
> On Mon, Jun 04, 2012 at 10:52:13AM +0200, Jan Kiszka wrote:
>> @@ -1089,6 +1093,14 @@ static void pci_set_irq(void *opaque, int irq_num, 
>> int level)
>>  pci_change_irq_level(pci_dev, irq_num, change);
>>  }
>>  
>> +PCIINTxRoute pci_device_route_intx_to_irq(PCIDevice *dev, int pin)
>> +{
>> +PCIBus *bus = dev->host_bus;
>> +
>> +assert(bus->route_intx_to_irq);
>> +return bus->route_intx_to_irq(bus->irq_opaque, dev->host_intx_pin[pin]);
>> +}
>> +
>>  /***/
>>  /* monitor info on PCI */
>>  
> 
> Just an idea: can devices cache this result, bypassing the
> intx to irq lookup on data path?

That lookup is part of set_irq which we don't bypass so far and where
this is generally trivial. If we want to cache the effects of set_irq as
well, I guess things would become pretty complex (e.g. due to vmstate
compatibility), and I'm unsure if it would buy us much.

> 
>> diff --git a/hw/pci.h b/hw/pci.h
>> index 5b54e2d..bbba01e 100644
>> --- a/hw/pci.h
>> +++ b/hw/pci.h
>> @@ -141,6 +141,15 @@ enum {
>>  #define PCI_DEVICE_GET_CLASS(obj) \
>>   OBJECT_GET_CLASS(PCIDeviceClass, (obj), TYPE_PCI_DEVICE)
>>  
>> +typedef struct PCIINTxRoute {
>> +enum {
>> +PCI_INTX_ENABLED,
>> +PCI_INTX_INVERTED,
>> +PCI_INTX_DISABLED,
>> +} mode;
>> +int irq;
>> +} PCIINTxRoute;
> 
> Is this INTX route or IRQ route?
> Is the INTX enabled/disabled/inverted or the IRQ?
> 
> I have the impression it's the IRQ, in the apic.
> PCI INTX are never inverted they are always active low.

This should be considered as "the route *of* an INTx", not "to some
IRQ". I could call it PCIINTxToIRQRoute if you prefer, but it's a bit
lengthy.

Jan



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Re: [Qemu-devel] [PATCH 1/6] blkdebug: remove sync i/o events

On Wed, Jun 6, 2012 at 7:10 AM, Paolo Bonzini  wrote:
> These are unused, except (by mistake more or less) in QED.
>
> Signed-off-by: Paolo Bonzini 
> ---
>  block.h          |    2 --
>  block/blkdebug.c |    2 --
>  block/qed.c      |    2 +-
>  3 files changed, 1 insertion(+), 5 deletions(-)

Acked-by: Stefan Hajnoczi

Re: [Qemu-devel] [PATCH block-next 0/3] qemu-img check/qcow2: Allow fixing refcounts

On Wed, Jun 6, 2012 at 3:53 PM, Zhi Yong Wu  wrote:
> On Wed, Jun 6, 2012 at 6:32 PM, Stefan Hajnoczi  wrote:
>> On Fri, Jun 1, 2012 at 9:26 AM, Zhi Yong Wu  wrote:
>>> On Fri, Jun 1, 2012 at 4:06 PM, Stefan Hajnoczi  wrote:
 On Fri, Jun 1, 2012 at 6:22 AM, Zhi Yong Wu  wrote:
> On Thu, May 31, 2012 at 5:26 PM, Stefan Hajnoczi  
> wrote:
>> On Wed, May 30, 2012 at 9:31 AM, Zhi Yong Wu  
>> wrote:
>>> On Sat, May 12, 2012 at 12:48 AM, Kevin Wolf  wrote:
 A prerequisite for a "QED mode" in qcow2, which doesn't update the 
 refcount
>>> Recently some new concepts such as "QED mode" in qcow2 are seen
>>> frequencely, can anyone explain what it means? thanks.
>>
>> qcow2 has more metadata than qed.  More metadata means more write
>> operations when allocating new clusters.
>>
>> In order to overcome this performance issue qcow2 has a metadata
>> cache.  But when QEMU is launched with -drive ...,cache=writethrough
>> (the default) the metadata cache *must* be in writethrough mode
> Why must i be? If the option with -drive ..,cache=writethrough is
> specified. it means that host page cache is on while guest disk cache
> is off. Since the metadata cache exists in host page cache, not guest,
> i think that it is in writeback mode.

 Since the emulated disk write cache is off, we must ensure that guest
 writes are on disk before completing them.  Therefore we cannot cache
 metadata updates in host RAM - it would be lost on power failure but
>>> But host page cache is *on* in this mode, which means that metadata
>>> should be cached in host RAM. how do you explain this?
>>
>> cache=writethrough means that the file is opened with O_SYNC.  Every
>> single write reaches the physical disk - that's why it's called a
>> "writethrough" cache.  Read requests, however, can be satisfied from
>> the host page cache.
>>
>> In other words, cache=writethrough ensures that all data reaches the
>> disk but may give performance benefits to read-heavy workloads
>> (especially when guest RAM is much smaller than host RAM, so the host
>> page cache would have a high hit rate).
> Ah, i see now, cache=writethrough mean that host page cache is applied
> to read request, not write. thanks.

Writes are placed in the host page cache so future reads can be served
from the cache.  But O_SYNC also forces the kernel to immediately sync
the data in the host page cache to disk.

Stefan

Re: [Qemu-devel] [PATCH 02/13] pci: Fold pci_bus_new_inplace into pci_bus_new

On 2012-06-07 14:51, Andreas Färber wrote:
> Am 04.06.2012 10:52, schrieb Jan Kiszka:
>> There are no external users for this function.
>>
>> Signed-off-by: Jan Kiszka 
> 
> Nack, please take a look at my recent prep_pci RFC series. Instead of
> dropping _inplace we need to convert all PCI host controllers to
> initialize the bus in-place for the QOM realize model to work.

No problem, I can drop this patch. Was just an observation based on the
in-tree history.

Jan



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Re: [Qemu-devel] Any approach to log the file read/write (I/O data flow) like the "-d in_asm" option?

On Thu, Jun 7, 2012 at 4:24 AM, 陳韋任 (Wei-Ren Chen)
 wrote:
> On Wed, Jun 06, 2012 at 11:23:37AM +0100, Stefan Hajnoczi wrote:
>> On Sun, Jun 3, 2012 at 9:50 PM, Yue Chen  wrote:
>> > I'm doing something like a simple and lightweight REPLAY program out of
>> > QEMU, only including CPU, MEMORY, and DISK. I'm implementing it with a
>> > shadow CPU (register state), shadow memory(from?"pmemsave") and shadow
>> > ".img" file (disk).
>>
>> Why doesn't the "savevm" command provide the snapshotting you need?
>> It sounds like you're trying to do VM snapshots yourself.
>
>  Does `savevm` and reply do the same thing? :)

No.  'savevm' and 'loadvm' are purely for saving and restoring a
snapshot of the VM disk, RAM, and devices.

Replay is something that could be built on top of that snapshotting
functionality, and I think it's something along the lines of why
savevm/loadvm were added and why qcow2 has internal snapshots (before
my time but I think Fabrice was working on something like replay or
reversible debugging).  But replay is really hard for a system that
interacts with the outside world (e.g. internet).

Stefan

[Qemu-devel] [PATCH v5 2/2] net: add the support for -netdev socket, listen

2012-06-07 Thread zwu . kernel

From: Zhi Yong Wu 

The -net socket,listen option does not work with the newer -netdev
syntax:
 http://lists.gnu.org/archive/html/qemu-devel/2011-11/msg01508.html

This patch makes it work now.

For the case where one vlan has multiple listenning sockets,
the patch will also provide the support.

Supported syntax:
 1.) -net socket,listen=127.0.0.1:1234,vlan=0
 2.) -net socket,listen=127.0.0.1:1234,vlan=0 -net 
socket,listen=127.0.0.1:1235,vlan=0
 3.) -netdev socket,listen=127.0.0.1:1234,id=socket0

Changelog from v4:
 Adopted the suggestion from stefan [stefan]

 Drop the NetSocketListenState struct and add a listen_fd field
to NetSocketState.  When a -netdev socket,listen= instance is created
there will be a NetSocketState with fd=-1 and a valid listen_fd.  The
net_socket_accept() handler waits for listen_fd to become readable and
then accepts the connection.  When this state transition happens, we no
longer monitor listen_fd for incoming connections...until the client
disconnects again.

Suggested-by: Stefan Hajnoczi 
Signed-off-by: Zhi Yong Wu 
---
 net/socket.c |   58 +++---
 1 files changed, 31 insertions(+), 27 deletions(-)

diff --git a/net/socket.c b/net/socket.c
index 7194345..27e8c4e 100644
--- a/net/socket.c
+++ b/net/socket.c
@@ -35,6 +35,7 @@
 
 typedef struct NetSocketState {
 VLANClientState nc;
+int listen_fd;
 int fd;
 int state; /* 0 = getting length, 1 = getting data */
 unsigned int index;
@@ -43,12 +44,7 @@ typedef struct NetSocketState {
 struct sockaddr_in dgram_dst; /* contains inet host and port destination 
iff connectionless (SOCK_DGRAM) */
 } NetSocketState;
 
-typedef struct NetSocketListenState {
-VLANState *vlan;
-char *model;
-char *name;
-int fd;
-} NetSocketListenState;
+static void net_socket_accept(void *opaque);
 
 /* XXX: we consider we can send the whole packet without blocking */
 static ssize_t net_socket_receive(VLANClientState *nc, const uint8_t *buf, 
size_t size)
@@ -86,7 +82,16 @@ static void net_socket_send(void *opaque)
 /* end of connection */
 eoc:
 qemu_set_fd_handler(s->fd, NULL, NULL, NULL);
+qemu_set_fd_handler(s->listen_fd, net_socket_accept, NULL, s);
 closesocket(s->fd);
+
+s->fd = 0;
+s->state = 0;
+s->index = 0;
+s->packet_len = 0;
+memset(s->buf, 0, sizeof(s->buf));
+memset(s->nc.info_str, 0, sizeof(s->nc.info_str));
+
 return;
 }
 buf = buf1;
@@ -377,27 +382,28 @@ static NetSocketState *net_socket_fd_init(VLANState *vlan,
 
 static void net_socket_accept(void *opaque)
 {
-NetSocketListenState *s = opaque;
-NetSocketState *s1;
+NetSocketState *s = opaque;
 struct sockaddr_in saddr;
 socklen_t len;
 int fd;
 
 for(;;) {
 len = sizeof(saddr);
-fd = qemu_accept(s->fd, (struct sockaddr *)&saddr, &len);
+fd = qemu_accept(s->listen_fd, (struct sockaddr *)&saddr, &len);
 if (fd < 0 && errno != EINTR) {
 return;
 } else if (fd >= 0) {
+qemu_set_fd_handler(s->listen_fd, NULL, NULL, NULL);
 break;
 }
 }
-s1 = net_socket_fd_init(s->vlan, s->model, s->name, fd, 1);
-if (s1) {
-snprintf(s1->nc.info_str, sizeof(s1->nc.info_str),
- "socket: connection from %s:%d",
- inet_ntoa(saddr.sin_addr), ntohs(saddr.sin_port));
-}
+
+s->fd = fd;
+s->nc.link_down = false;
+net_socket_connect(s);
+snprintf(s->nc.info_str, sizeof(s->nc.info_str),
+ "socket: connection from %s:%d",
+ inet_ntoa(saddr.sin_addr), ntohs(saddr.sin_port));
 }
 
 static int net_socket_listen_init(VLANState *vlan,
@@ -405,19 +411,17 @@ static int net_socket_listen_init(VLANState *vlan,
   const char *name,
   const char *host_str)
 {
-NetSocketListenState *s;
-int fd, val, ret;
+VLANClientState *nc;
+NetSocketState *s;
 struct sockaddr_in saddr;
+int fd, val, ret;
 
 if (parse_host_port(&saddr, host_str) < 0)
 return -1;
 
-s = g_malloc0(sizeof(NetSocketListenState));
-
 fd = qemu_socket(PF_INET, SOCK_STREAM, 0);
 if (fd < 0) {
 perror("socket");
-g_free(s);
 return -1;
 }
 socket_set_nonblock(fd);
@@ -429,22 +433,22 @@ static int net_socket_listen_init(VLANState *vlan,
 ret = bind(fd, (struct sockaddr *)&saddr, sizeof(saddr));
 if (ret < 0) {
 perror("bind");
-g_free(s);
 closesocket(fd);
 return -1;
 }
 ret = listen(fd, 0);
 if (ret < 0) {
 perror("listen");
-g_free(s);
 closesocket(fd);
 return -1;
 }
-s->vlan = vlan;
-s->model = g_strdup(model);
-s->name = name ? g_strdup(name) : NULL;
-s->fd = fd;
-qemu_set_fd_handler(fd, net_socket_accept, NULL, s);
+
+

[Qemu-devel] [PATCH v5 1/2] net: fix the coding style

2012-06-07 Thread zwu . kernel

From: Zhi Yong Wu 

Signed-off-by: Zhi Yong Wu 
---
 net/socket.c |4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/net/socket.c b/net/socket.c
index fcd0a3c..7194345 100644
--- a/net/socket.c
+++ b/net/socket.c
@@ -301,7 +301,9 @@ static NetSocketState *net_socket_fd_init_dgram(VLANState 
*vlan,
 qemu_set_fd_handler(s->fd, net_socket_send_dgram, NULL, s);
 
 /* mcast: save bound address as dst */
-if (is_connected) s->dgram_dst=saddr;
+if (is_connected) {
+s->dgram_dst = saddr;
+}
 
 return s;
 
-- 
1.7.6

Re: [Qemu-devel] [PATCH v4] net: add the support for -netdev socket, listen

On Thu, Jun 7, 2012 at 3:16 PM, Paolo Bonzini  wrote:
> Il 07/06/2012 14:49, Zhi Yong Wu ha scritto:
>>> > Instead, drop the NetSocketListenState struct and add a listen_fd field
>>> > to NetSocketState.  When a -netdev socket,listen= instance is created
>>> > there will be a NetSocketState with fd=-1 and a valid listen_fd.  The
>> Have you considered the case where there're mulitple -net
>> socket,listen= instance in one vlan?
>
> Why should that matter?  They will have different NetSocketState and
> different listen_fds.  Each socket will discard incoming packets until
> the other side connects.

Exactly, the key is that each -netdev has its own state struct.

Stefan

[Qemu-devel] [PATCH qom-next] arm_l2x0: Rename "type" property to "cache-type"

Resolves a name conflict with the qdev "type" property that is about to
be moved to Object.

Signed-off-by: Andreas Färber 
Acked-by: Mark Langsdorf 
---
 Going to insert this in the qom-next queue
 before 'qdev: Push "type" property up to Object'.

 hw/arm_l2x0.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/hw/arm_l2x0.c b/hw/arm_l2x0.c
index 09f290c..de6a086 100644
--- a/hw/arm_l2x0.c
+++ b/hw/arm_l2x0.c
@@ -161,7 +161,7 @@ static int l2x0_priv_init(SysBusDevice *dev)
 }
 
 static Property l2x0_properties[] = {
-DEFINE_PROP_UINT32("type", l2x0_state, cache_type, 0x1c100100),
+DEFINE_PROP_UINT32("cache-type", l2x0_state, cache_type, 0x1c100100),
 DEFINE_PROP_END_OF_LIST(),
 };
 
-- 
1.7.7

Re: [Qemu-devel] [PATCH v4] net: add the support for -netdev socket, listen

2012-06-07 Thread Zhi Yong Wu

On Thu, Jun 7, 2012 at 10:16 PM, Paolo Bonzini  wrote:
> Il 07/06/2012 14:49, Zhi Yong Wu ha scritto:
>>> > Instead, drop the NetSocketListenState struct and add a listen_fd field
>>> > to NetSocketState.  When a -netdev socket,listen= instance is created
>>> > there will be a NetSocketState with fd=-1 and a valid listen_fd.  The
>> Have you considered the case where there're mulitple -net
>> socket,listen= instance in one vlan?
>
> Why should that matter?  They will have different NetSocketState and
> different listen_fds.  Each socket will discard incoming packets until
> the other side connects.
You are correct, thanks, please see next version.
>
> Paolo
>



-- 
Regards,

Zhi Yong Wu

Re: [Qemu-devel] [PATCH v2 3/3] Update simpletrace.py to support new v2 log format

On Thu, May 24, 2012 at 10:50 AM, Harsh Prateek Bora
 wrote:
> -            fields = [event[0], '%0.3f' % (delta_ns / 1000.0)]
> -            for i in xrange(1, len(event)):
> -                fields.append('%s=0x%x' % (event[i], rec[i + 1]))
> +            if rec[0] == dropped_event_id:
> +                fields = ['Dropped_Event', '%0.3f' % (delta_ns / 1000.0)]
> +                fields.append('%s=0x%x' % ("dropped_events", rec[2]))
> +            else:

Why the special case?  Can the dropped event be an event so the normal
code path pretty-prints it?

> +                fields = [event.name, '%0.3f' % (delta_ns / 1000.0)]
> +                if log_version == 0:

The global log_version variable splits the code.  A nice solution is
to encapsulate the format-specific behavior in a SimpleTraceV1 and
SimpleTraceV2 class - both provide the same interface and the code
that calls it doesn't care which exact version is used.

That said I'm happy for us to drop simpletrace v1 pretty-printing
entirely.  Users can only generate v2 files with this QEMU binary.  If
they want to view old files they also need the old trace-events file -
they might as well use the old simpletrace.py too!  Feel free to focus
on v2 only and drop the v1 support, you can add a nice error message
explaining that this file uses the v1 format and should be used with
the script that came with that QEMU binary.

> +                    for type, name in event.args:
> +                        fields.append('%s=0x%x' % (name, rec[i + 1]))
> +                        i += 1
> +                elif log_version == 2:
> +                    for type, name in event.args:
> +                        if is_string(type):
> +                             fields.append('%s=%s' % (name, rec[i + 1]))
> +                        else:
> +                             fields.append('%s=0x%x' % (name, rec[i + 1]))
> +                        i += 1
>             print ' '.join(fields)
>
>     run(Formatter())
> --
> 1.7.1.1
>
>

Re: [Qemu-devel] [PATCH v3 0/4] Standard SD host controller model

2012-06-07 Thread Igor Mitsyanko

On 06/07/2012 04:24 PM, Andreas Färber wrote:

Am 07.06.2012 07:05, schrieb Peter A. G. Crosthwaite:

[Original cover by Igor]
First patch introduces standard SD host controller model. This is accumulated
version of my previous patch I sent a while ago and a recent SDHCI patch by
Peter A. G. Crosthwaite.
Second patch introduces Exynos4210-specific SDHCI built on top of standard SDHCI
model.

[New]
Third patch changes the -sd command line argument to be repeatable, to support
multiple SD controllers in one system.
Fourth patch adds 2x SDHCI controllers to the Xilinx Zynq machine

It's good to see agreement finally being reached here. Looking forward
to testing it on my tegra branch. Vincent's version claimed compliance
to version 3.00 while this one says 2.00. What's the delta then, Igor?

http://git.chromium.org/gitweb/?p=chromiumos/third_party/qemu.git;a=commit;h=9b9c2ea8bd25be06b23a30f07262ade9190d8e95
Looks like its not actually true, the first thing I noticed is that
documentation defines mandatory 3.00 controller registers Host Control 2
and Preset Values, which Vincent's version doesn't implement, I'd say
that his version complies with 2.00 spec. Version sent by Peter
implements a wider set of SD host controller features comparing to
Vincen't version.

I'm guessing I at least still need to cherry-pick Vincent's eMMC support
bits on top since hw/sd.c and hw/blockdev.c are unmodified in this series.

I'm cc'ing Kevin as block maintainer (PMM is on vacation). I'm hoping
the typos in the commit messages can be fixed when applying to either
branch.

Regards,
Andreas

Changelog:
Changed from v2:
corrected typo errors in ADMA1 support
added patches 3-4
v1->v2
PATCH1:
add support for ADMA1 (I havn't tested it though).
fixed s->prnsts<-> s->pwrcon typo (thanks to Peter, strange that it even
worked
before).
PATCH2:
change header prefix from "target-arm" to "exynos4210".

Igor Mitsyanko (2):
hw: introduce standard SD host controller
exynos4210: introduce Exynos4210 SD host controller model

Peter A. G. Crosthwaite (2):
vl.c: allow for reapeated -sd arguments
xilinx_zynq: Added sdhci controllers

Re: [Qemu-devel] CoW image commit+shrink(= make_empty) support

2012-06-07 Thread Jeff Cody

On 06/07/2012 02:19 AM, Taisuke Yamada wrote:
> I attended Paolo Bonzini's qemu session ("Live Disk Operations: Juggling
> Data and Trying to go Unnoticed") in LinuxCon Japan, and he adviced me
> to post the bits I have regarding my question on qemu's  support on shrinking
> CoW image.
> 
> Here's my problem description.
> 
> I recently designed a experimental system which holds VM master images
> on a HDD and CoW snapshots on a SSD. VMs run on CoW snapshots only.
> This split-image configration is done to keep VM I/Os on a SSD
> 
> As SSD capacity is rather limited, I need to do a writeback commit from SSD to
> HDD time to time, and that is done during weekend/midnight. The problem is
> although a commit is made, that alone won't shrink CoW image - all unused 
> blocks
> are still kept in a snapshot, and uses up space.
> 
> Patch attached is a workaround I added to cope with the problem,
> but the basic problem I faced was that both QCOW2/QED format still does not
> support "bdrv_make_empty" API.
> 
> Implementing the API (say, by hole punching) seemed like a lot of effort, so
> I ended up creating a new CoW image, and then replace current CoW
> snapshot with a new (empty) one. But I find the code ugly.
> 
> In his talk, Paolo suggested possibility of using new "live op" API for this
> task, but I'm not aware of the actual API. Is there any documentation or
> source code I can look at to re-implement above feature?
> 
> Best Regards,

Hello Taisuke-san,

I am working on a document now for a live commit proposal, with the API
being similar to the block-stream command, but for a live commit.  Here
is what I am thinking about proposing for the command:

{ 'command': 'block-commit', 'data': { 'device': 'str', '*base': 'str',
   '*top': 'str', '*speed': 'int' } }

I think something similar to the above would be good for a 'live
commit', and it would be somewhat analogous to block streaming, but in
the other direction.

One issue I see with the patch attached, is the reliance on bdrv_close()
and a subsequent bdrv_open() - once you perform a bdrv_close(), you no
longer have the ability to safely recover from error, because it is
possible for the recovery bdrv_open() to fail for some reason.

The live block commit command I am working on operates like the block
streaming code, and like transactional commands in that the use of
bdrv_close() / bdrv_open() to change an image is avoided, so that error
recovery can be safely done by just abandoning the operation.  A key
point that needs to be done 'transactionally', is to open the base or
intermediate target image with file access mode r/w, as the backing
files are open as r/o by default.

I am going to be putting all my documentation into the qemu wiki today /
tomorrow, and I will follow up with a link to that if you like.

Thanks,
Jeff

Re: [Qemu-devel] [PATCH v2 2/3] Simpletrace v2: Add support for multiple args, strings.

On Thu, May 24, 2012 at 10:50 AM, Harsh Prateek Bora
 wrote:
> A newer tracelog format which gets rid of fixed size trace records and
> therefore allows to trace multiple arguments as well as strings in trace
> events.
>
> Sample trace:
> v9fs_version 0.000 tag=0x id=0x64 msize=0x2000 version=9P2000.L
> v9fs_version_return 6.705 tag=0x id=0x64 msize=0x2000 version=9P2000.L
> v9fs_attach 174.467 tag=0x1 id=0x68 fid=0x0 afid=0x
> uname=nobody aname=
> v9fs_attach_return 4720.454 tag=0x1 id=0x68 type=0xff80
> version=0x4f2a4dd0  path=0x220ea6
>
> Signed-off-by: Harsh Prateek Bora 
> ---
>  scripts/tracetool/backend/simple.py |   84 ++---
>  trace/simple.c                      |  229 
> ++-
>  trace/simple.h                      |   38 +-
>  3 files changed, 240 insertions(+), 111 deletions(-)

Sorry for the delay.  Mostly easy to fix comments, some care still
needed to avoid race conditions and use memory barriers in the right
places.

> diff --git a/trace/simple.c b/trace/simple.c
> index a6583d3..4e3ae65 100644
> --- a/trace/simple.c
> +++ b/trace/simple.c
> @@ -27,7 +27,7 @@
>  #define HEADER_MAGIC 0xf2b177cb0aa429b4ULL
>
>  /** Trace file version number, bump if format changes */
> -#define HEADER_VERSION 0
> +#define HEADER_VERSION 2
>
>  /** Records were dropped event ID */
>  #define DROPPED_EVENT_ID (~(uint64_t)0 - 1)
> @@ -35,23 +35,6 @@
>  /** Trace record is valid */
>  #define TRACE_RECORD_VALID ((uint64_t)1 << 63)
>
> -/** Trace buffer entry */
> -typedef struct {
> -    uint64_t event;
> -    uint64_t timestamp_ns;
> -    uint64_t x1;
> -    uint64_t x2;
> -    uint64_t x3;
> -    uint64_t x4;
> -    uint64_t x5;
> -    uint64_t x6;
> -} TraceRecord;
> -
> -enum {
> -    TRACE_BUF_LEN = 4096,
> -    TRACE_BUF_FLUSH_THRESHOLD = TRACE_BUF_LEN / 4,
> -};
> -
>  /*
>  * Trace records are written out by a dedicated thread.  The thread waits for
>  * records to become available, writes them out, and then waits again.
> @@ -62,11 +45,49 @@ static GCond *trace_empty_cond;
>  static bool trace_available;
>  static bool trace_writeout_enabled;
>
> -static TraceRecord trace_buf[TRACE_BUF_LEN];
> +enum {
> +    TRACE_BUF_LEN = 4096 * 64,
> +    TRACE_BUF_FLUSH_THRESHOLD = TRACE_BUF_LEN / 4,
> +};
> +
> +uint8_t trace_buf[TRACE_BUF_LEN];
>  static unsigned int trace_idx;
> +static unsigned int writeout_idx;
> +static uint64_t dropped_events;
>  static FILE *trace_fp;
>  static char *trace_file_name = NULL;
>
> +/* * Trace buffer entry */
> +typedef struct {
> +    uint64_t event; /*   TraceEventID */
> +    uint64_t timestamp_ns;
> +    uint32_t length;   /*    in bytes */
> +    uint32_t reserved; /*    unused */
> +    uint8_t arguments[]; /*  arguments position affects ST_REC_HDR_LEN */
> +} TraceRecord;
> +
> +typedef struct {
> +    uint64_t header_event_id; /* HEADER_EVENT_ID */
> +    uint64_t header_magic;    /* HEADER_MAGIC    */
> +    uint64_t header_version;  /* HEADER_VERSION  */
> +} TraceRecordHeader;
> +
> +/* * Trace record header length */
> +#define ST_REC_HDR_LEN sizeof(TraceRecord)

Why #define this?  It's confusing because TraceRecordHeader (notice
the word "header") is what comes to mind since this is named
ST_REC_HDR_LEN.  I suggest using sizeof(TraceRecord) explicitly in the
code and dropping this macro.

> +
> +int trace_alloc_record(TraceBufferRecord *rec, TraceEventID event, uint32_t 
> datasize);
> +static void read_from_buffer(unsigned int idx, uint8_t *dataptr, uint32_t 
> size);
> +static void write_to_buffer(unsigned int idx, uint8_t *dataptr, uint32_t 
> size);
> +void trace_mark_record_complete(TraceBufferRecord *rec);
> +
> +uint32_t safe_strlen(const char* str)
> +{
> +    if (str == NULL) {
> +        return 0;
> +    }
> +    return strlen(str);
> +}
> +
>  /**
>  * Read a trace record from the trace buffer
>  *
> @@ -75,16 +96,22 @@ static char *trace_file_name = NULL;
>  *
>  * Returns false if the record is not valid.
>  */
> -static bool get_trace_record(unsigned int idx, TraceRecord *record)
> +static bool get_trace_record(unsigned int idx, TraceRecord **recordptr)
>  {
> -    if (!(trace_buf[idx].event & TRACE_RECORD_VALID)) {
> +    uint8_t temp_rec[ST_REC_HDR_LEN];
> +    TraceRecord *record = (TraceRecord *) temp_rec;
> +    read_from_buffer(idx, temp_rec, ST_REC_HDR_LEN);
> +
> +    if (!(record->event & TRACE_RECORD_VALID)) {
>         return false;
>     }
>
>     __sync_synchronize(); /* read memory barrier before accessing record */

The need for the memory barrier is no longer clear.  Previously we
were directly accessing the trace ring buffer, and therefore needed to
ensure fields were settled before accessing them.  Now we use
read_from_buffer() which copies the data into our temporary struct on
the stack.

I think the best way of doing it is to read the event field first in a
separate step, then do the read memory barrier, and then read the rest
of the record.  This ensures

Re: [Qemu-devel] [PATCH 05/13] pci: Add pci_device_route_intx_to_irq

On Mon, Jun 04, 2012 at 10:52:13AM +0200, Jan Kiszka wrote:
> @@ -1089,6 +1093,14 @@ static void pci_set_irq(void *opaque, int irq_num, int 
> level)
>  pci_change_irq_level(pci_dev, irq_num, change);
>  }
>  
> +PCIINTxRoute pci_device_route_intx_to_irq(PCIDevice *dev, int pin)
> +{
> +PCIBus *bus = dev->host_bus;
> +
> +assert(bus->route_intx_to_irq);
> +return bus->route_intx_to_irq(bus->irq_opaque, dev->host_intx_pin[pin]);
> +}
> +
>  /***/
>  /* monitor info on PCI */
>  

Just an idea: can devices cache this result, bypassing the
intx to irq lookup on data path?

> diff --git a/hw/pci.h b/hw/pci.h
> index 5b54e2d..bbba01e 100644
> --- a/hw/pci.h
> +++ b/hw/pci.h
> @@ -141,6 +141,15 @@ enum {
>  #define PCI_DEVICE_GET_CLASS(obj) \
>   OBJECT_GET_CLASS(PCIDeviceClass, (obj), TYPE_PCI_DEVICE)
>  
> +typedef struct PCIINTxRoute {
> +enum {
> +PCI_INTX_ENABLED,
> +PCI_INTX_INVERTED,
> +PCI_INTX_DISABLED,
> +} mode;
> +int irq;
> +} PCIINTxRoute;

Is this INTX route or IRQ route?
Is the INTX enabled/disabled/inverted or the IRQ?

I have the impression it's the IRQ, in the apic.
PCI INTX are never inverted they are always active low.

Re: [Qemu-devel] [PATCH] configure: Fix build for some versions of glibc (9pfs)

2012-06-07 Thread Serge Hallyn

Quoting Stefano Stabellini (stefano.stabell...@eu.citrix.com):
> On Thu, 7 Jun 2012, Stefan Weil wrote:
> > Some versions declare open_by_handle_at, but don't define AT_EMPTY_PATH.
> > Extend the check in configure to test both preconditions.
> > 
> > Signed-off-by: Stefan Weil 
> 
> It works for me. Also I think it is a better fix than the original
> patch.

Well, it works in that it allows compilation to proceed.  It results
in ./libhw64/9pfs/virtio-9p-handle.o not being built, since AT_EMPTY_PATH
can't be found through /usr/include/fcntl.h, even though it can in
/usr/include/linux/fcntl.h.  I guess that is, unfortunately, the right
thing to do.

Oh hey, I think I've found the bug in the debian package causing
that problem.  Grr.

> Acked-by: Stefano Stabellini 

Acked-by: Serge Hallyn 

thanks,
-serge

> 
> >  configure |4 
> >  1 file changed, 4 insertions(+)
> > 
> > diff --git a/configure b/configure
> > index 799ad0f..f737f6c 100755
> > --- a/configure
> > +++ b/configure
> > @@ -2816,7 +2816,11 @@ fi
> >  open_by_hande_at=no
> >  cat > $TMPC << EOF
> >  #include 
> > +#if !defined(AT_EMPTY_PATH)
> > +# error missing definition
> > +#else
> >  int main(void) { struct file_handle fh; return open_by_handle_at(0, &fh, 
> > 0); }
> > +#endif
> >  EOF
> >  if compile_prog "" "" ; then
> >  open_by_handle_at=yes
> > -- 
> > 1.7.10
> >

Re: [Qemu-devel] [PATCH v5 5/5] add L2x0/PL310 cache controller device

2012-06-07 Thread Mark Langsdorf

Yes, that's fine by me.

--Mark Langsdorf
Calxeda, Inc.


From: Andreas Färber [afaer...@suse.de]
Sent: Thursday, June 07, 2012 8:45 AM
To: Mark Langsdorf
Cc: qemu-devel@nongnu.org; peter.mayd...@linaro.org; Rob Herring; Paolo Bonzini
Subject: Re: [Qemu-devel] [PATCH v5 5/5] add L2x0/PL310 cache controller device

Am 29.12.2011 17:19, schrieb Mark Langsdorf:
> From: Rob Herring 
>
> This is just a dummy device for ARM L2 cache controllers, based on the
> pl310. The cache type parameter can be defined by a property value
> and has a meaningful default.
>
> Signed-off-by: Rob Herring 
> Signed-off-by: Mark Langsdorf 

> diff --git a/hw/arm_l2x0.c b/hw/arm_l2x0.c
> new file mode 100644
> index 000..ba106f1
> --- /dev/null
> +++ b/hw/arm_l2x0.c
[...]
> +static SysBusDeviceInfo l2x0_info = {
> +.init = l2x0_priv_init,
> +.qdev.name = "l2x0",
> +.qdev.size = sizeof(l2x0_state),
> +.qdev.vmsd = &vmstate_l2x0,
> +.qdev.no_user = 1,
> +.qdev.props = (Property[]) {
> +DEFINE_PROP_UINT32("type", l2x0_state, cache_type, 0x1c100100),

Mark, this "type" property conflicts with a QOM refactoring by Paolo.
Mind if we rename it to "cache-type"? It always has its default value in
upstream.

Thanks,
Andreas

> +DEFINE_PROP_END_OF_LIST(),
> +},
> +.qdev.reset = l2x0_priv_reset,
> +};
> +
> +static void l2x0_register_device(void)
> +{
> +sysbus_register_withprop(&l2x0_info);
> +}
> +
> +device_init(l2x0_register_device)
> +


--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH v4] net: add the support for -netdev socket, listen

Il 07/06/2012 14:49, Zhi Yong Wu ha scritto:
>> > Instead, drop the NetSocketListenState struct and add a listen_fd field
>> > to NetSocketState.  When a -netdev socket,listen= instance is created
>> > there will be a NetSocketState with fd=-1 and a valid listen_fd.  The
> Have you considered the case where there're mulitple -net
> socket,listen= instance in one vlan?

Why should that matter?  They will have different NetSocketState and
different listen_fds.  Each socket will discard incoming packets until
the other side connects.

Paolo

Re: [Qemu-devel] [PULL v3 00/29] per-directory Makefile.objs snippets, limit vpath (ab)use

Il 07/06/2012 14:47, Anthony Liguori ha scritto:
>>>
>>>
>>> v2->v3: included patch from Anthony, added fixes for new dump mechanism
>>
>> A question: How nice does this play with `make clean`ing the old places
>> the objects were built in an existing checkout? Did you test that?
> 
> I did.  Seemed to work for me but YMMV.

Make clean uses *.o so it works nicely.

Paolo

Re: [Qemu-devel] [PATCH v3] pci: call object_unparent() before free_qdev()

2012-06-07 Thread Jason Baron

On Tue, Jun 05, 2012 at 12:52:02AM +0300, Michael S. Tsirkin wrote:
> On Mon, Jun 04, 2012 at 04:15:56PM -0400, Jason Baron wrote:
> > On Sun, May 20, 2012 at 05:57:45PM +0800, Amos Kong wrote:
> > > Start VM with 8 multiple-function block devs, hot-removing
> > > those block devs by 'device_del ...' would cause qemu abort.
> > > 
> > > | (qemu) device_del virti0-0-0
> > > | (qemu) **
> > > |ERROR:qom/object.c:389:object_delete: assertion failed: (obj->ref == 0)
> > > 
> > > It's a regression introduced by commit 57c9fafe
> > > 
> > 
> > I found a similar assertion where the parent reference isn't cleared,
> > doing:
> > 
> > (qemu) device_add pci-bridge
> > 
> > in the monitor. I posted for patches for it under:
> > 
> > Subject: [Qemu-devel] [PATCH 0/2] pci: hotplug bridge fixes
> > 
> > It's still an issue with the current tree.
> > 
> > Thanks,
> > 
> > -Jason
> 
> I pushed your patches on my tree pci branch, care to test
> there?
> 

Yes, fixes are confirmed.

Test case is quite simple:

(qemu) device_add pci_bridge

causes segfault without the 2 patches applied.

Thanks,

-Jason

Re: [Qemu-devel] Fwd: buildbot failure in qemu on fedora-mingw32

2012-06-07 Thread Stefan Weil


Am 07.06.2012 13:54, schrieb Anthony Liguori:

Luiz/Wen Congyang: ^

Regards,

Anthony Liguori 
/home/buildbot/slave-spunk/fedora-mingw32/build/dump.c:17:24: fatal


It looks like sys/procfs.h is not needed at all.
I just sent a patch which removes this and some more include statements.

Anthony, as this is a build fix, I won't send a pull request.
Please take the patch as it is (if nobody minds).

Wen, dump.c and dump.h both use a wrong license.
Would you mind changing it to GPL2+?

Regards,

Stefan W.


error: sys/procfs.h: No such file or directory
compilation terminated.
make[1]: *** [dump.o] Error 1
make: *** [subdir-i386-softmmu] Error 2

== full log ==
http://www.kraxel.org/bb/builders/fedora-mingw32/builds/130/steps/compile/logs/stdio

Re: [Qemu-devel] [PATCH] seabios: correct setting of datalow_base for large rom images

2012-06-07 Thread Jason Baron

On Tue, Jun 05, 2012 at 08:09:21PM -0400, Kevin O'Connor wrote:
> On Tue, Jun 05, 2012 at 12:09:18PM -0400, Jason Baron wrote:
> > I've been creating 256kb rom images with larger acpi tables for second level
> > buses. After a recent re-base, my rom images no longer built. Bisected to:
> > 
> > commit 46b82624c95b951e8825fab117d9352faeae0ec8
> > Author: Kevin O'Connor 
> > Date:   Sun May 13 12:10:30 2012 -0400
> > 
> > Add mechanism to declare variables as "low mem" and use for extra stack.
> > 
> > 
> > Where sec32low_top is greater than datalow_base. Currently, datalow_base is
> > calculated by subtracting a 64kb offset. Updating it to 128kb, resolved this
> > issue for me, while still continuing to create smaller rom images as 
> > expected.
> 
> Thanks.  The problem causing the build to fail is that negative
> numbers aren't encoded properly.  That's easy to fix, but it quickly
> uncovers a problem with relocations.  Some of the 16bit code has 16bit
> relocations and those wont be handled right if the integer wraps.  I
> put together a fix (see below) but it's a bit ugly.
> 

ok, yes I can confirm that the patch fixes this issue for me.

Thanks,

-Jason

Re: [Qemu-devel] [PATCH v5 5/5] add L2x0/PL310 cache controller device

Am 29.12.2011 17:19, schrieb Mark Langsdorf:
> From: Rob Herring 
> 
> This is just a dummy device for ARM L2 cache controllers, based on the
> pl310. The cache type parameter can be defined by a property value
> and has a meaningful default.
> 
> Signed-off-by: Rob Herring 
> Signed-off-by: Mark Langsdorf 

> diff --git a/hw/arm_l2x0.c b/hw/arm_l2x0.c
> new file mode 100644
> index 000..ba106f1
> --- /dev/null
> +++ b/hw/arm_l2x0.c
[...]
> +static SysBusDeviceInfo l2x0_info = {
> +.init = l2x0_priv_init,
> +.qdev.name = "l2x0",
> +.qdev.size = sizeof(l2x0_state),
> +.qdev.vmsd = &vmstate_l2x0,
> +.qdev.no_user = 1,
> +.qdev.props = (Property[]) {
> +DEFINE_PROP_UINT32("type", l2x0_state, cache_type, 0x1c100100),

Mark, this "type" property conflicts with a QOM refactoring by Paolo.
Mind if we rename it to "cache-type"? It always has its default value in
upstream.

Thanks,
Andreas

> +DEFINE_PROP_END_OF_LIST(),
> +},
> +.qdev.reset = l2x0_priv_reset,
> +};
> +
> +static void l2x0_register_device(void)
> +{
> +sysbus_register_withprop(&l2x0_info);
> +}
> +
> +device_init(l2x0_register_device)
> +


-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

[Qemu-devel] [PATCH] w32: Fix broken build (missing include file)

2012-06-07 Thread Stefan Weil

dump.c was recently added to the code. It unconditionally
includes sys/procfs which is not available with MinGW (w32, w64).

It looks like this file is not needed at all (tested on Linux),
so I removed it completely.

Some other include statements are also redundant because they are
already included in qemu-common, therefore they were removed, too.

Signed-off-by: Stefan Weil 
---

dump.* use GPL2 instead of GPL2+. Please fix that!

Regards,
Stefan Weil


 dump.c |4 
 1 file changed, 4 deletions(-)

diff --git a/dump.c b/dump.c
index 0ca14f8..f44ce47 100644
--- a/dump.c
+++ b/dump.c
@@ -12,10 +12,7 @@
  */
 
 #include "qemu-common.h"
-#include 
 #include "elf.h"
-#include 
-#include 
 #include "cpu.h"
 #include "cpu-all.h"
 #include "targphys.h"
@@ -23,7 +20,6 @@
 #include "kvm.h"
 #include "dump.h"
 #include "sysemu.h"
-#include "bswap.h"
 #include "memory_mapping.h"
 #include "error.h"
 #include "qmp-commands.h"
-- 
1.7.10

[Qemu-devel] [PATCH] bt: HCI Reset returns a Cmd Complete event.

2012-06-07 Thread Andrzej Zaborowski

HCI Reset command returns a Command Complete event, not a Command Status
event.  We need to avoid resetting the stored last command code for the
response to be fully correct.

Signed-off-by: Andrzej Zaborowski 
---
 hw/bt-hci.c |3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/hw/bt-hci.c b/hw/bt-hci.c
index a3a7fb4..8c717f9 100644
--- a/hw/bt-hci.c
+++ b/hw/bt-hci.c
@@ -1783,7 +1783,8 @@ static void bt_submit_hci(struct HCIInfo *info,
 
 case cmd_opcode_pack(OGF_HOST_CTL, OCF_RESET):
 bt_hci_reset(hci);
-bt_hci_event_status(hci, HCI_SUCCESS);
+hci->last_cmd = cpu_to_le16(cmd);
+bt_hci_event_complete_status(hci, HCI_SUCCESS);
 break;
 
 case cmd_opcode_pack(OGF_HOST_CTL, OCF_SET_EVENT_FLT):
-- 
1.7.4.4

[Qemu-devel] [PATCH] bt: Fix the bitmask in event masked check.

2012-06-07 Thread Andrzej Zaborowski

Signed-off-by: Andrzej Zaborowski 
---
 hw/bt-hci.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/hw/bt-hci.c b/hw/bt-hci.c
index 8c717f9..48cbbb5 100644
--- a/hw/bt-hci.c
+++ b/hw/bt-hci.c
@@ -442,7 +442,7 @@ static inline uint8_t *bt_hci_event_start(struct bt_hci_s 
*hci,
 }
 
 mask_byte = (evt - 1) >> 3;
-mask = 1 << ((evt - 1) & 3);
+mask = 1 << ((evt - 1) & 7);
 if (mask & bt_event_reserved_mask[mask_byte] & ~hci->event_mask[mask_byte])
 return NULL;
 
-- 
1.7.4.4

Re: [Qemu-devel] [PATCH v2] vnc: disable VNC password authentication (security type 2) when in FIPS mode

2012-06-07 Thread Paul Moore

On Thursday, June 07, 2012 12:31:25 PM Alexander Graf wrote:
> On 07.06.2012, at 05:10, Anthony Liguori wrote:
> > On 06/07/2012 06:56 AM, Paul Moore wrote:
> >> On Wednesday, June 06, 2012 01:56:52 AM Alexander Graf wrote:
> >>> The other one (FIPS) is basically a list of encryption algorithms that
> >>> are deemed OK and not crackable within seconds by anyone.
> >>> 
> >>> Only one of the 2 doesn't help much. In combination they actually
> >>> enhance security. This patch is only about FIPS though.
> >> 
> >> I don't have much to add beyond what Alex already posted.  FIPS 140-2
> >> outlines a set of security requirements for systems implementing
> >> cryptography in a variety of forms; the full requirements are likely
> >> beyond the scope here but you can always read the full specification
> >> (Google knows where to find the document).
> >> 
> >> The relevant portion appears to be annex A which lists the approved
> >> ciphers and their approved uses; DES is not listed as an approved cipher
> >> and that is the main problem we are trying to solve right now.
> > 
> > But does FIPS mandate that it's impossible for a user to use an unapproved
> > cipher?
> > 
> > IOW, is just having this feature implemented at the libvirt level good
> > enough to satisfy FIPS?  Do we really need to do this in QEMU?
>
> What would implementing it in libvirt buy us? That only stacks using libvirt
> can be FIPS certified? That any time a management stack that does not use
> libvirt they need to duplicate that code to be FIPS certified?

Once again, I think Alex summed it up nicely.

While most users probably use QEMU via libvirt, the fact remains that you can 
always run QEMU directly so simply disallowing VNC's password authentication 
doesn't really solve the FIPS problem.

-- 
paul moore
security and virtualization @ redhat

Re: [Qemu-devel] [PATCH 06/13] pci: Add INTx routing notifier