[PATCH v3 1/2] QSLIST: add atomic replace operation

2020-10-16 Thread wanghonghao
Replace a queue with another atomicly. It's useful when we need to transfer
queues between threads.

Signed-off-by: wanghonghao 
---
 include/qemu/queue.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/include/qemu/queue.h b/include/qemu/queue.h
index e029e7bf66..1f0cbdf87e 100644
--- a/include/qemu/queue.h
+++ b/include/qemu/queue.h
@@ -226,6 +226,10 @@ struct {   
 \
 (dest)->slh_first = qatomic_xchg(&(src)->slh_first, NULL);   \
 } while (/*CONSTCOND*/0)
 
+#define QSLIST_REPLACE_ATOMIC(dest, src, old) do {\
+(old)->slh_first = qatomic_xchg(&(dest)->slh_first, (src)->slh_first); 
\
+} while (/*CONSTCOND*/0)
+
 #define QSLIST_REMOVE_HEAD(head, field) do { \
 typeof((head)->slh_first) elm = (head)->slh_first;   \
 (head)->slh_first = elm->field.sle_next; \
-- 
2.24.3 (Apple Git-128)




[Bug 1900122] [NEW] Unsupported ioctl: cmd=0xffffffff80685600 when accessing /dev/video* in aarch64 guest

2020-10-16 Thread vak
Public bug reported:

**Description:**
Any attempt to work with video in aarch64 architecture emulated on x86_64 leads 
currently to the error "Function not implemented". For example:

```
# v4l2-ctl -l --verbose
Failed to open /dev/video0: Function not implemented

root@12dd9b6fcfcb:/# ll /dev/video*
crw-rw 1 root video 81, 0 Oct 16 09:23 /dev/video0
crw-rw 1 root video 81, 1 Oct 16 09:23 /dev/video1

```

**Steps to reproduce the issue:**

I have a following setup:

Host Hardware: x86_64 equipped with a webcam (tried different webcams)
Host OS: Ubuntu 20.04.1 

Guest Architecture: aarch64
Guest OS: Ubuntu 20.04 (also tried 16.x and 18.x)

Emulation: quemu-user-static (also tried binfmt)

Guest OS is running via Docker + QEMU

```
➜ cat /proc/sys/fs/binfmt_misc/qemu-aarch64
enabled
interpreter /usr/bin/qemu-aarch64-static
flags: F
offset 0
magic 7f454c46020101000200b700
mask ff00feff
```

**Results received:**
see desrciption.

**Environment:**


* QEMU version: (if you can know it):

ipxe-qemu-256k-compat-efi-roms/focal,now 1.0.0+git-20150424.a25a16d-0ubuntu4 
all [installed,automatic]
ipxe-qemu/focal-updates,now 1.0.0+git-20190109.133f4c4-0ubuntu3.2 all 
[installed,automatic]
qemu-block-extra/focal-updates,now 1:4.2-3ubuntu6.7 amd64 [installed,automatic]
qemu-kvm/focal-updates,now 1:4.2-3ubuntu6.7 amd64 [installed]
qemu-system-common/focal-updates,now 1:4.2-3ubuntu6.7 amd64 
[installed,automatic]
qemu-system-data/focal-updates,now 1:4.2-3ubuntu6.7 all [installed,automatic]
qemu-system-gui/focal-updates,now 1:4.2-3ubuntu6.7 amd64 [installed,automatic]
qemu-system-x86/focal-updates,now 1:4.2-3ubuntu6.7 amd64 [installed,automatic]
qemu-user-binfmt/focal-updates,now 1:4.2-3ubuntu6.7 amd64 [installed,automatic]
qemu-user/focal-updates,now 1:4.2-3ubuntu6.7 amd64 [installed]
qemu-utils/focal-updates,now 1:4.2-3ubuntu6.7 amd64 [installed,automatic]
qemu/focal-updates,now 1:4.2-3ubuntu6.7 amd64 [installed]

* Container application: Docker

**Output of `docker version`, `podman version` or `singularity
version`**

```
➜ docker version
Client: Docker Engine - Community
 Version:   20.10.0-beta1
 API version:   1.40
 Go version:go1.13.15
 Git commit:ac365d7
 Built: Tue Oct 13 18:15:22 2020
 OS/Arch:   linux/amd64
 Context:   default
 Experimental:  true

Server: Docker Engine - Community
 Engine:
  Version:  19.03.13
  API version:  1.40 (minimum version 1.12)
  Go version:   go1.13.15
  Git commit:   4484c46d9d
  Built:Wed Sep 16 17:01:20 2020
  OS/Arch:  linux/amd64
  Experimental: false
 containerd:
  Version:  1.4.1
  GitCommit:c623d1b36f09f8ef6536a057bd658b3aa8632828
 runc:
  Version:  1.0.0-rc92
  GitCommit:ff819c7e9184c13b7c2607fe6c30ae19403a7aff
 docker-init:
  Version:  0.18.0
  GitCommit:fec3683

```

Guest aarch64 runs in privileged mode:

`docker run --privileged --device=/dev/video0:/dev/video0 --env
DISPLAY=unix$DISPLAY -v $XAUTH:/root/.Xauthority  -v
/tmp/.X11-unix:/tmp/.X11-unix -it --rm arm64v8/ubuntu:20.04 bash`

**Additional information:**
I tried also binfmt way to register emulators. The output of `v4l-ctl` was a 
little bit different:

```
# v4l2-ctl -l
Unsupported ioctl: cmd=0x80685600
Failed to open /dev/video0: Function not implemented

```

** Affects: qemu
 Importance: Undecided
 Status: New


** Tags: aarch64 docker ioctl video

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1900122

Title:
  Unsupported ioctl: cmd=0x80685600 when accessing /dev/video*
  in aarch64 guest

Status in QEMU:
  New

Bug description:
  **Description:**
  Any attempt to work with video in aarch64 architecture emulated on x86_64 
leads currently to the error "Function not implemented". For example:

  ```
  # v4l2-ctl -l --verbose
  Failed to open /dev/video0: Function not implemented

  root@12dd9b6fcfcb:/# ll /dev/video*
  crw-rw 1 root video 81, 0 Oct 16 09:23 /dev/video0
  crw-rw 1 root video 81, 1 Oct 16 09:23 /dev/video1

  ```

  **Steps to reproduce the issue:**

  I have a following setup:

  Host Hardware: x86_64 equipped with a webcam (tried different webcams)
  Host OS: Ubuntu 20.04.1 

  Guest Architecture: aarch64
  Guest OS: Ubuntu 20.04 (also tried 16.x and 18.x)

  Emulation: quemu-user-static (also tried binfmt)

  Guest OS is running via Docker + QEMU

  ```
  ➜ cat /proc/sys/fs/binfmt_misc/qemu-aarch64
  enabled
  interpreter /usr/bin/qemu-aarch64-static
  flags: F
  offset 0
  magic 7f454c46020101000200b700
  mask ff00feff
  ```

  **Results received:**
  see desrciption.

  **Environment:**

  
  * QEMU version: (if you can know it):

  ipxe-qemu-256k-compat-efi-roms/focal,now 

Re: [PATCH] ci: include configure and meson logs in all jobs if configure fails

2020-10-16 Thread Philippe Mathieu-Daudé
Le ven. 16 oct. 2020 12:05, Paolo Bonzini  a écrit :

> Signed-off-by: Paolo Bonzini 
>

Reviewed-by: Philippe Mathieu-Daudé 

---
>  .cirrus.yml| 6 +++---
>  .gitlab-ci.yml | 6 +++---
>  .travis.yml| 8 
>  3 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/.cirrus.yml b/.cirrus.yml
> index e099da0fec..81a2960b1a 100644
> --- a/.cirrus.yml
> +++ b/.cirrus.yml
> @@ -13,7 +13,7 @@ freebsd_12_task:
>script:
>  - mkdir build
>  - cd build
> -- ../configure --enable-werror || { cat config.log; exit 1; }
> +- ../configure --enable-werror || { cat config.log
> meson-logs/meson-log.txt; exit 1; }
>  - gmake -j$(sysctl -n hw.ncpu)
>  - gmake -j$(sysctl -n hw.ncpu) check V=1
>
> @@ -27,7 +27,7 @@ macos_task:
>  - cd build
>  - ../configure --python=/usr/local/bin/python3 --enable-werror
> --extra-cflags='-Wno-error=deprecated-declarations'
> -   || { cat config.log; exit 1; }
> +   || { cat config.log meson-logs/meson-log.txt; exit 1; }
>  - gmake -j$(sysctl -n hw.ncpu)
>  - gmake check V=1
>
> @@ -41,7 +41,7 @@ macos_xcode_task:
>  - mkdir build
>  - cd build
>  - ../configure --extra-cflags='-Wno-error=deprecated-declarations'
> -   --enable-werror --cc=clang || { cat config.log; exit
> 1; }
> +   --enable-werror --cc=clang || { cat config.log
> meson-logs/meson-log.txt; exit 1; }
>  - gmake -j$(sysctl -n hw.ncpu)
>  - gmake check V=1
>
> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> index 8ffd415ca5..66ad7aa5c2 100644
> --- a/.gitlab-ci.yml
> +++ b/.gitlab-ci.yml
> @@ -32,7 +32,7 @@ include:
>  ../configure --enable-werror $CONFIGURE_ARGS
> --target-list="$TARGETS" ;
>else
>  ../configure --enable-werror $CONFIGURE_ARGS ;
> -  fi
> +  fi || { cat config.log meson-logs/meson-log.txt && exit 1; }
>  - make -j"$JOBS"
>  - if test -n "$MAKE_CHECK_ARGS";
>then
> @@ -229,7 +229,7 @@ build-tcg-disabled:
>script:
>  - mkdir build
>  - cd build
> -- ../configure --disable-tcg --audio-drv-list=""
> +- ../configure --disable-tcg --audio-drv-list="" || { cat config.log
> meson-logs/meson-log.txt && exit 1; }
>  - make -j"$JOBS"
>  - make check-unit
>  - make check-qapi-schema
> @@ -322,7 +322,7 @@ build-tci:
>  - mkdir build
>  - cd build
>  - ../configure --enable-tcg-interpreter
> ---target-list="$(for tg in $TARGETS; do echo -n ${tg}'-softmmu ';
> done)"
> +--target-list="$(for tg in $TARGETS; do echo -n ${tg}'-softmmu ';
> done)" || { cat config.log meson-logs/meson-log.txt && exit 1; }
>  - make -j"$JOBS"
>  - make run-tcg-tests-x86_64-softmmu
>  - make tests/qtest/boot-serial-test tests/qtest/cdrom-test
> tests/qtest/pxe-test
> diff --git a/.travis.yml b/.travis.yml
> index d7bfbb8bfe..a3d78171ca 100644
> --- a/.travis.yml
> +++ b/.travis.yml
> @@ -95,7 +95,7 @@ before_install:
>  # Configure step - may be overridden
>  before_script:
>- mkdir -p ${BUILD_DIR} && cd ${BUILD_DIR}
> -  - ${SRC_DIR}/configure ${BASE_CONFIG} ${CONFIG} || { cat config.log &&
> exit 1; }
> +  - ${SRC_DIR}/configure ${BASE_CONFIG} ${CONFIG} || { cat config.log
> meson-logs/meson-log.txt && exit 1; }
>
>  # Main build & test - rarely overridden - controlled by TEST_CMD
>  script:
> @@ -199,7 +199,7 @@ jobs:
>compiler: clang
>before_script:
>  - mkdir -p ${BUILD_DIR} && cd ${BUILD_DIR}
> -- ${SRC_DIR}/configure ${CONFIG}
> --extra-cflags="-fsanitize=undefined -Werror" || { cat config.log && exit
> 1; }
> +- ${SRC_DIR}/configure ${CONFIG}
> --extra-cflags="-fsanitize=undefined -Werror" || { cat config.log
> meson-logs/meson-log.txt && exit 1; }
>
>
>  - name: "Clang (other-softmmu)"
> @@ -298,7 +298,7 @@ jobs:
>  - TEST_CMD=""
>before_script:
>  - mkdir -p ${BUILD_DIR} && cd ${BUILD_DIR}
> -- ${SRC_DIR}/configure ${CONFIG} --extra-cflags="-g3 -O0
> -fsanitize=thread" || { cat config.log && exit 1; }
> +- ${SRC_DIR}/configure ${CONFIG} --extra-cflags="-g3 -O0
> -fsanitize=thread" || { cat config.log meson-logs/meson-log.txt && exit 1; }
>
>
>  # Run check-tcg against linux-user
> @@ -530,7 +530,7 @@ jobs:
>  - ls -l ${SRC_DIR}/qemu-${QEMU_VERSION}.tar.bz2
>  - tar -xf ${SRC_DIR}/qemu-${QEMU_VERSION}.tar.bz2 && cd
> qemu-${QEMU_VERSION}
>  - mkdir -p release-build && cd release-build
> -- ../configure ${BASE_CONFIG} ${CONFIG} || { cat config.log &&
> exit 1; }
> +- ../configure ${BASE_CONFIG} ${CONFIG} || { cat config.log
> meson-logs/meson-log.txt && exit 1; }
>  - make install
>allow_failures:
>  - env: UNRELIABLE=true
> --
> 2.26.2
>
>
>


Re: [RFC PATCH 00/12] hw/arm/virt: Introduce cpu and cache topology support

2020-10-16 Thread Andrew Jones
On Fri, Oct 16, 2020 at 05:40:02PM +0800, Ying Fang wrote:
> 
> 
> On 10/15/2020 3:59 PM, Andrew Jones wrote:
> > On Thu, Oct 15, 2020 at 10:07:16AM +0800, Ying Fang wrote:
> > > 
> > > 
> > > On 10/14/2020 2:08 AM, Andrew Jones wrote:
> > > > On Tue, Oct 13, 2020 at 12:11:20PM +, Zengtao (B) wrote:
> > > > > Cc valentin
> > > > > 
> > > > > > -Original Message-
> > > > > > From: Qemu-devel
> > > > > > [mailto:qemu-devel-bounces+prime.zeng=hisilicon@nongnu.org]
> > > > > > On Behalf Of Ying Fang
> > > > > > Sent: Thursday, September 17, 2020 11:20 AM
> > > > > > To: qemu-devel@nongnu.org
> > > > > > Cc: peter.mayd...@linaro.org; drjo...@redhat.com; Zhanghailiang;
> > > > > > Chenzhendong (alex); shannon.zha...@gmail.com;
> > > > > > qemu-...@nongnu.org; alistair.fran...@wdc.com; fangying;
> > > > > > imamm...@redhat.com
> > > > > > Subject: [RFC PATCH 00/12] hw/arm/virt: Introduce cpu and cache
> > > > > > topology support
> > > > > > 
> > > > > > An accurate cpu topology may help improve the cpu scheduler's
> > > > > > decision
> > > > > > making when dealing with multi-core system. So cpu topology
> > > > > > description
> > > > > > is helpful to provide guest with the right view. Cpu cache 
> > > > > > information
> > > > > > may
> > > > > > also have slight impact on the sched domain, and even userspace
> > > > > > software
> > > > > > may check the cpu cache information to do some optimizations. Thus
> > > > > > this patch
> > > > > > series is posted to provide cpu and cache topology support for arm.
> > > > > > 
> > > > > > To make the cpu topology consistent with MPIDR, an vcpu ioctl
> > > > > 
> > > > > For aarch64, the cpu topology don't depends on the MPDIR.
> > > > > See https://patchwork.kernel.org/patch/11744387/
> > > > > 
> > > > 
> > > > The topology should not be inferred from the MPIDR Aff fields,
> > > 
> > > MPIDR is abused by ARM OEM manufactures. It is only used as a
> > > identifer for a specific cpu, not representation of the topology.
> > 
> > Right, which is why I stated topology should not be inferred from
> > it.
> > 
> > > 
> > > > but MPIDR is the CPU identifier. When describing a topology
> > > > with ACPI or DT the CPU elements in the topology description
> > > > must map to actual CPUs. MPIDR is that mapping link. KVM
> > > > currently determines what the MPIDR of a VCPU is. If KVM
> > > 
> > > KVM currently assigns MPIDR with vcpu->vcpu_id which mapped
> > > into affinity levels. See reset_mpidr in sys_regs.c
> > 
> > I know, but how KVM assigns MPIDRs today is not really important
> > to KVM userspace. KVM userspace shouldn't depend on a KVM
> > algorithm, as it could change.
> > 
> > > 
> > > > userspace is going to determine the VCPU topology, then it
> > > > also needs control over the MPIDR values, otherwise it
> > > > becomes quite messy trying to get the mapping right.
> > > If we are going to control MPIDR, shall we assign MPIDR with
> > > vcpu_id or map topology hierarchy into affinity levels or any
> > > other link schema ?
> > > 
> > 
> > We can assign them to whatever we want, as long as they're
> > unique and as long as Aff0 is assigned per the GIC requirements,
> > e.g. GICv3 requires that Aff0 be from 0 to 0xf. Also, when
> > pinning VCPUs to PCPUs we should ensure that MPIDRs with matching
> > Aff3,Aff2,Aff1 fields should actually be peers with respect to
> > the GIC.
> 
> Still not clear why vCPU's MPIDR need to match pPCPU's GIC affinity.
> Maybe I should read spec for GICv3.

Look at how IPIs are efficiently sent to "peers", where the definition
of a peer is that only Aff0 differs in its MPIDR. But, gicv3's
optimizations can only handle 16 peers. If we want pinned VCPUs to
have the same performance as PCPUS, then we should maintain this
Aff0 limit.

Thanks,
drew

> 
> > 
> > We shouldn't try to encode topology in the MPIDR in any way,
> > so we might as well simply increment a counter to assign them,
> > which could possibly be the same as the VCPU ID.
> 
> Hmm, then we can leave it as it is.
> 
> > 
> > Thanks,
> > drew
> > 
> > .
> > 
> 




[PATCH] ci: include configure and meson logs in all jobs if configure fails

2020-10-16 Thread Paolo Bonzini
Signed-off-by: Paolo Bonzini 
---
 .cirrus.yml| 6 +++---
 .gitlab-ci.yml | 6 +++---
 .travis.yml| 8 
 3 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/.cirrus.yml b/.cirrus.yml
index e099da0fec..81a2960b1a 100644
--- a/.cirrus.yml
+++ b/.cirrus.yml
@@ -13,7 +13,7 @@ freebsd_12_task:
   script:
 - mkdir build
 - cd build
-- ../configure --enable-werror || { cat config.log; exit 1; }
+- ../configure --enable-werror || { cat config.log 
meson-logs/meson-log.txt; exit 1; }
 - gmake -j$(sysctl -n hw.ncpu)
 - gmake -j$(sysctl -n hw.ncpu) check V=1
 
@@ -27,7 +27,7 @@ macos_task:
 - cd build
 - ../configure --python=/usr/local/bin/python3 --enable-werror
--extra-cflags='-Wno-error=deprecated-declarations'
-   || { cat config.log; exit 1; }
+   || { cat config.log meson-logs/meson-log.txt; exit 1; }
 - gmake -j$(sysctl -n hw.ncpu)
 - gmake check V=1
 
@@ -41,7 +41,7 @@ macos_xcode_task:
 - mkdir build
 - cd build
 - ../configure --extra-cflags='-Wno-error=deprecated-declarations'
-   --enable-werror --cc=clang || { cat config.log; exit 1; }
+   --enable-werror --cc=clang || { cat config.log 
meson-logs/meson-log.txt; exit 1; }
 - gmake -j$(sysctl -n hw.ncpu)
 - gmake check V=1
 
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 8ffd415ca5..66ad7aa5c2 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -32,7 +32,7 @@ include:
 ../configure --enable-werror $CONFIGURE_ARGS --target-list="$TARGETS" ;
   else
 ../configure --enable-werror $CONFIGURE_ARGS ;
-  fi
+  fi || { cat config.log meson-logs/meson-log.txt && exit 1; }
 - make -j"$JOBS"
 - if test -n "$MAKE_CHECK_ARGS";
   then
@@ -229,7 +229,7 @@ build-tcg-disabled:
   script:
 - mkdir build
 - cd build
-- ../configure --disable-tcg --audio-drv-list=""
+- ../configure --disable-tcg --audio-drv-list="" || { cat config.log 
meson-logs/meson-log.txt && exit 1; }
 - make -j"$JOBS"
 - make check-unit
 - make check-qapi-schema
@@ -322,7 +322,7 @@ build-tci:
 - mkdir build
 - cd build
 - ../configure --enable-tcg-interpreter
---target-list="$(for tg in $TARGETS; do echo -n ${tg}'-softmmu '; 
done)"
+--target-list="$(for tg in $TARGETS; do echo -n ${tg}'-softmmu '; 
done)" || { cat config.log meson-logs/meson-log.txt && exit 1; }
 - make -j"$JOBS"
 - make run-tcg-tests-x86_64-softmmu
 - make tests/qtest/boot-serial-test tests/qtest/cdrom-test 
tests/qtest/pxe-test
diff --git a/.travis.yml b/.travis.yml
index d7bfbb8bfe..a3d78171ca 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -95,7 +95,7 @@ before_install:
 # Configure step - may be overridden
 before_script:
   - mkdir -p ${BUILD_DIR} && cd ${BUILD_DIR}
-  - ${SRC_DIR}/configure ${BASE_CONFIG} ${CONFIG} || { cat config.log && exit 
1; }
+  - ${SRC_DIR}/configure ${BASE_CONFIG} ${CONFIG} || { cat config.log 
meson-logs/meson-log.txt && exit 1; }
 
 # Main build & test - rarely overridden - controlled by TEST_CMD
 script:
@@ -199,7 +199,7 @@ jobs:
   compiler: clang
   before_script:
 - mkdir -p ${BUILD_DIR} && cd ${BUILD_DIR}
-- ${SRC_DIR}/configure ${CONFIG} --extra-cflags="-fsanitize=undefined 
-Werror" || { cat config.log && exit 1; }
+- ${SRC_DIR}/configure ${CONFIG} --extra-cflags="-fsanitize=undefined 
-Werror" || { cat config.log meson-logs/meson-log.txt && exit 1; }
 
 
 - name: "Clang (other-softmmu)"
@@ -298,7 +298,7 @@ jobs:
 - TEST_CMD=""
   before_script:
 - mkdir -p ${BUILD_DIR} && cd ${BUILD_DIR}
-- ${SRC_DIR}/configure ${CONFIG} --extra-cflags="-g3 -O0 
-fsanitize=thread" || { cat config.log && exit 1; }
+- ${SRC_DIR}/configure ${CONFIG} --extra-cflags="-g3 -O0 
-fsanitize=thread" || { cat config.log meson-logs/meson-log.txt && exit 1; }
 
 
 # Run check-tcg against linux-user
@@ -530,7 +530,7 @@ jobs:
 - ls -l ${SRC_DIR}/qemu-${QEMU_VERSION}.tar.bz2
 - tar -xf ${SRC_DIR}/qemu-${QEMU_VERSION}.tar.bz2 && cd 
qemu-${QEMU_VERSION}
 - mkdir -p release-build && cd release-build
-- ../configure ${BASE_CONFIG} ${CONFIG} || { cat config.log && exit 1; 
}
+- ../configure ${BASE_CONFIG} ${CONFIG} || { cat config.log 
meson-logs/meson-log.txt && exit 1; }
 - make install
   allow_failures:
 - env: UNRELIABLE=true
-- 
2.26.2




Re: [PATCH v8 0/5] Mac Old World ROM experiment (ppc/mac_* clean ups and loading binary ROM)

2020-10-16 Thread Mark Cave-Ayland

On 16/10/2020 00:47, BALATON Zoltan via wrote:


This is the cut down version of the earlier series omitting unfinished
patches that I plan to rework later and rebased to Mark's qemu-macppc
branch. Compared to v7 the only change is the cast to (target_ulong)
from (uint32_t) as requested by Mark in patch 1.


FWIW the reason for suggesting the cast to target_ulong is so that the same code 
works for both qemu-system-ppc and qemu-system-ppc64. For qemu-system-ppc that should 
correctly drop the sign extension from 32-bit, whilst still allowing someone to load 
a 64-bit ELF into qemu-system-ppc64 if requested.


Can you confirm that the sign extension behaviour is still correct for both 
qemu-system-ppc and qemu-system-ppc64? If so I'm happy to give it a R-B tag.



ATB,

Mark.



Re: [PATCH v2 0/2] hw/rtc/m48t59: Simplify m48t59_init()

2020-10-16 Thread Philippe Mathieu-Daudé
Le ven. 16 oct. 2020 11:39, Mark Cave-Ayland 
a écrit :

> On 15/10/2020 20:46, Philippe Mathieu-Daudé wrote:
>
> > Since v1:
> > - Do not remove mem_base in patch 1 (Laurent)
> > - Pass MemoryRegion* (new patch)
> > - Run check-qtest
> >
> > Philippe Mathieu-Daudé (2):
> >hw/rtc/m48t59: Simplify m48t59_init() removing 'io_base' argument
> >hw/rtc/m48t59: Simplify m48t59_init() passing MemoryRegion argument
> >
> >   include/hw/rtc/m48t59.h |  5 ++---
> >   hw/ppc/ppc405_boards.c  |  2 +-
> >   hw/rtc/m48t59.c | 14 +++---
> >   hw/sparc/sun4m.c|  3 ++-
> >   hw/sparc64/sun4u.c  |  7 ++-
> >   5 files changed, 10 insertions(+), 21 deletions(-)
>
> This looks good, and from what you've done here it's only a little more
> work to
> remove m48t59_init() completely. Would you mind if I try this using these
> patches as
> a starting point? :)
>

I had a look at your previous suggestion, but I have too many in flight
series waiting for 5.2, so sure go ahead!


>
> ATB,
>
> Mark.
>
>


Re: [PATCH v10 10/10] vfio: Don't issue full 2^64 unmap

2020-10-16 Thread Auger Eric
Hi Jean,

On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote:
> IOMMUs may declare memory regions spanning from 0 to UINT64_MAX. When
> attempting to deal with such region, vfio_listener_region_del() passes a
> size of 2^64 to int128_get64() which throws an assertion failure.  Even
> ignoring this, the VFIO_IOMMU_DMA_MAP ioctl cannot handle this size
> since the size field is 64-bit. Split the request in two.
> 
> Signed-off-by: Jean-Philippe Brucker 
Reviewed-by: Eric Auger 

Thanks

Eric
> ---
> For me this happens when memory_region_iommu_set_page_size_mask()
> returns an error because a hotplugged endpoint uses an incompatible page
> mask. vfio_connect_container() releases the memory listener which calls
> region_del() with the 2^64 IOMMU region. There are probably other ways
> to reach this.
> ---
>  hw/vfio/common.c | 11 +++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/hw/vfio/common.c b/hw/vfio/common.c
> index e66054b02a7..e90a89c389e 100644
> --- a/hw/vfio/common.c
> +++ b/hw/vfio/common.c
> @@ -797,6 +797,17 @@ static void vfio_listener_region_del(MemoryListener 
> *listener,
>  }
>  
>  if (try_unmap) {
> +if (llsize == int128_2_64()) {
> +/* The unmap ioctl doesn't accept a full 64-bit span. */
> +llsize = int128_rshift(llsize, 1);
> +ret = vfio_dma_unmap(container, iova, int128_get64(llsize));
> +if (ret) {
> +error_report("vfio_dma_unmap(%p, 0x%"HWADDR_PRIx", "
> + "0x%"HWADDR_PRIx") = %d (%m)",
> + container, iova, int128_get64(llsize), ret);
> +}
> +iova += int128_get64(llsize);
> +}
>  ret = vfio_dma_unmap(container, iova, int128_get64(llsize));
>  if (ret) {
>  error_report("vfio_dma_unmap(%p, 0x%"HWADDR_PRIx", "
> 




Re: [PATCH v2 04/10] softfloat: Add float_cmask and constants

2020-10-16 Thread Alex Bennée


Richard Henderson  writes:

> Testing more than one class at a time is better done with masks.
> This reduces the static branch count.
>
> Reviewed-by: David Hildenbrand 
> Signed-off-by: Richard Henderson 

Reviewed-by: Alex Bennée 

-- 
Alex Bennée



Re: [PATCH v2 03/10] softfloat: Tidy a * b + inf return

2020-10-16 Thread Alex Bennée


Richard Henderson  writes:

> No reason to set values in 'a', when we already
> have float_class_inf in 'c', and can flip that sign.
>
> Reviewed-by: David Hildenbrand 
> Signed-off-by: Richard Henderson 

Reviewed-by: Alex Bennée 

-- 
Alex Bennée



Re: [RFC PATCH 00/12] hw/arm/virt: Introduce cpu and cache topology support

2020-10-16 Thread Ying Fang




On 10/15/2020 3:59 PM, Andrew Jones wrote:

On Thu, Oct 15, 2020 at 10:07:16AM +0800, Ying Fang wrote:



On 10/14/2020 2:08 AM, Andrew Jones wrote:

On Tue, Oct 13, 2020 at 12:11:20PM +, Zengtao (B) wrote:

Cc valentin


-Original Message-
From: Qemu-devel
[mailto:qemu-devel-bounces+prime.zeng=hisilicon@nongnu.org]
On Behalf Of Ying Fang
Sent: Thursday, September 17, 2020 11:20 AM
To: qemu-devel@nongnu.org
Cc: peter.mayd...@linaro.org; drjo...@redhat.com; Zhanghailiang;
Chenzhendong (alex); shannon.zha...@gmail.com;
qemu-...@nongnu.org; alistair.fran...@wdc.com; fangying;
imamm...@redhat.com
Subject: [RFC PATCH 00/12] hw/arm/virt: Introduce cpu and cache
topology support

An accurate cpu topology may help improve the cpu scheduler's
decision
making when dealing with multi-core system. So cpu topology
description
is helpful to provide guest with the right view. Cpu cache information
may
also have slight impact on the sched domain, and even userspace
software
may check the cpu cache information to do some optimizations. Thus
this patch
series is posted to provide cpu and cache topology support for arm.

To make the cpu topology consistent with MPIDR, an vcpu ioctl


For aarch64, the cpu topology don't depends on the MPDIR.
See https://patchwork.kernel.org/patch/11744387/



The topology should not be inferred from the MPIDR Aff fields,


MPIDR is abused by ARM OEM manufactures. It is only used as a
identifer for a specific cpu, not representation of the topology.


Right, which is why I stated topology should not be inferred from
it.




but MPIDR is the CPU identifier. When describing a topology
with ACPI or DT the CPU elements in the topology description
must map to actual CPUs. MPIDR is that mapping link. KVM
currently determines what the MPIDR of a VCPU is. If KVM


KVM currently assigns MPIDR with vcpu->vcpu_id which mapped
into affinity levels. See reset_mpidr in sys_regs.c


I know, but how KVM assigns MPIDRs today is not really important
to KVM userspace. KVM userspace shouldn't depend on a KVM
algorithm, as it could change.




userspace is going to determine the VCPU topology, then it
also needs control over the MPIDR values, otherwise it
becomes quite messy trying to get the mapping right.

If we are going to control MPIDR, shall we assign MPIDR with
vcpu_id or map topology hierarchy into affinity levels or any
other link schema ?



We can assign them to whatever we want, as long as they're
unique and as long as Aff0 is assigned per the GIC requirements,
e.g. GICv3 requires that Aff0 be from 0 to 0xf. Also, when
pinning VCPUs to PCPUs we should ensure that MPIDRs with matching
Aff3,Aff2,Aff1 fields should actually be peers with respect to
the GIC.


Still not clear why vCPU's MPIDR need to match pPCPU's GIC affinity.
Maybe I should read spec for GICv3.



We shouldn't try to encode topology in the MPIDR in any way,
so we might as well simply increment a counter to assign them,
which could possibly be the same as the VCPU ID.


Hmm, then we can leave it as it is.



Thanks,
drew

.





Re: [PATCH v2 0/2] hw/rtc/m48t59: Simplify m48t59_init()

2020-10-16 Thread Mark Cave-Ayland

On 15/10/2020 20:46, Philippe Mathieu-Daudé wrote:


Since v1:
- Do not remove mem_base in patch 1 (Laurent)
- Pass MemoryRegion* (new patch)
- Run check-qtest

Philippe Mathieu-Daudé (2):
   hw/rtc/m48t59: Simplify m48t59_init() removing 'io_base' argument
   hw/rtc/m48t59: Simplify m48t59_init() passing MemoryRegion argument

  include/hw/rtc/m48t59.h |  5 ++---
  hw/ppc/ppc405_boards.c  |  2 +-
  hw/rtc/m48t59.c | 14 +++---
  hw/sparc/sun4m.c|  3 ++-
  hw/sparc64/sun4u.c  |  7 ++-
  5 files changed, 10 insertions(+), 21 deletions(-)


This looks good, and from what you've done here it's only a little more work to 
remove m48t59_init() completely. Would you mind if I try this using these patches as 
a starting point? :)



ATB,

Mark.



Re: [PATCH 0/7] build: replace ninjatool with ninja

2020-10-16 Thread Mark Cave-Ayland

On 15/10/2020 22:41, Paolo Bonzini wrote:

Il gio 15 ott 2020, 20:49 Mark Cave-Ayland > ha scritto:


Is there any reason why
https://lists.gnu.org/archive/html/qemu-devel/2020-09/msg06997.html
 still 
can't be
merged?


Because it's not the right approach. There is no reason why building firmware cannot 
be done with cross compilers, so moving those directories to Meson (not because Meson 
can't handle them; more specifically, the issue is tying the firmware build to the 
QEMU build system) is going in the wrong direction.


The "Canadian cross" scenario, where you build on Linux a mingw GCC but the compiler 
is s390, is not even enough to describe the complexity in the case of QEMU, because 
there are multiple firmware for different machines.


However we already have all the infrastructure to do such builds, we just don't use 
it for the firmware. So, instead of the patch you recalled above, the tests/tcg 
machinery should be extended into something that can be reused for firmware. As an 
aside, orchestrating this multi-compiler part of the build is what the Makefiles will 
keep on handling for the foreseeable future. As an aside to the aside, tests/tcg is 
more than underdocumented and I forget everything about it 5 minutes after looking at it.


This is not something that I will be able to work on anytime soon. But still I don't 
think that going in the wrong direction is a good idea, even if temporarily.


That's a shame, although I do appreciate the huge amount of time and effort that 
you've put into this release in order to get the Meson build up and running, and so 
why taking on another large task is going to be lower down the list :)


At the moment OpenBIOS doesn't have a docker image capable of building the required 
binaries: I did experiment with trying to use the QEMU docker images for openbios-ppc 
but whilst the binary built successfully, it did not run compared to my hand-rolled 
compilers. So there's still some debugging to be done there...



ATB,

Mark.



Re: [PATCH v10 08/10] vfio: Set IOMMU page size as per host supported page size

2020-10-16 Thread Auger Eric
Hi Jean,
On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote:
> From: Bharat Bhushan 
> 
> Set IOMMU supported page size mask same as host Linux supported page
> size mask.
> 
> Signed-off-by: Bharat Bhushan 
> Signed-off-by: Jean-Philippe Brucker 
Reviewed-by: Eric Auger 

Thanks

Eric
> ---
>  hw/vfio/common.c | 8 
>  1 file changed, 8 insertions(+)
> 
> diff --git a/hw/vfio/common.c b/hw/vfio/common.c
> index 13471ae2943..e66054b02a7 100644
> --- a/hw/vfio/common.c
> +++ b/hw/vfio/common.c
> @@ -636,6 +636,14 @@ static void vfio_listener_region_add(MemoryListener 
> *listener,
>  int128_get64(llend),
>  iommu_idx);
>  
> +ret = memory_region_iommu_set_page_size_mask(giommu->iommu,
> + container->pgsizes,
> + );
> +if (ret) {
> +g_free(giommu);
> +goto fail;
> +}
> +
>  ret = memory_region_register_iommu_notifier(section->mr, >n,
>  );
>  if (ret) {
> 




Re: [PATCH] meson: move SPHINX_ARGS references within "if build_docs"

2020-10-16 Thread Philippe Mathieu-Daudé
Le ven. 16 oct. 2020 11:15, Paolo Bonzini  a écrit :

> Signed-off-by: Paolo Bonzini 
>

Reviewed-by: Philippe Mathieu-Daudé 

---
>  tests/qapi-schema/meson.build | 88 +--
>  1 file changed, 44 insertions(+), 44 deletions(-)
>
> diff --git a/tests/qapi-schema/meson.build b/tests/qapi-schema/meson.build
> index 1f222a7a13..66c7f04cf8 100644
> --- a/tests/qapi-schema/meson.build
> +++ b/tests/qapi-schema/meson.build
> @@ -219,53 +219,53 @@ qapi_doc = custom_target('QAPI doc',
>  '-p', 'doc-good-', '@INPUT0@' ],
>   depend_files: qapi_gen_depends)
>
> -# Test the document-comment document generation code by running a test
> schema
> -# file through Sphinx's plain-text builder and comparing the result
> against
> -# a golden reference. This is in theory susceptible to failures if Sphinx
> -# changes its output, but the text output has historically been very
> stable
> -# (no changes between Sphinx 1.6 and 3.0), so it is a better bet than
> -# texinfo or HTML generation, both of which have had changes. We might
> -# need to add more sophisticated logic here in future for some sort of
> -# fuzzy comparison if future Sphinx versions produce different text,
> -# but for now the simple comparison suffices.
> -qapi_doc_out = custom_target('QAPI rST doc',
> - output: ['doc-good.txt'],
> - input: files('doc-good.json',
> 'doc-good.rst'),
> - build_by_default: build_docs,
> - depend_files: sphinx_extn_depends,
> - # We use -E to suppress Sphinx's caching,
> because
> - # we want it to always really run the QAPI
> doc
> - # generation code. It also means we don't
> - # clutter up the build dir with the cache.
> - command: [SPHINX_ARGS,
> -   '-b', 'text', '-E',
> -   '-c', meson.source_root() / 'docs',
> -   '-D', 'master_doc=doc-good',
> -   meson.current_source_dir(),
> -   meson.current_build_dir()])
> +if build_docs
> +  # Test the document-comment document generation code by running a test
> schema
> +  # file through Sphinx's plain-text builder and comparing the result
> against
> +  # a golden reference. This is in theory susceptible to failures if
> Sphinx
> +  # changes its output, but the text output has historically been very
> stable
> +  # (no changes between Sphinx 1.6 and 3.0), so it is a better bet than
> +  # texinfo or HTML generation, both of which have had changes. We might
> +  # need to add more sophisticated logic here in future for some sort of
> +  # fuzzy comparison if future Sphinx versions produce different text,
> +  # but for now the simple comparison suffices.
> +  qapi_doc_out = custom_target('QAPI rST doc',
> +   output: ['doc-good.txt'],
> +   input: files('doc-good.json',
> 'doc-good.rst'),
> +   build_by_default: true,
> +   depend_files: sphinx_extn_depends,
> +   # We use -E to suppress Sphinx's caching,
> because
> +   # we want it to always really run the QAPI
> doc
> +   # generation code. It also means we don't
> +   # clutter up the build dir with the cache.
> +   command: [SPHINX_ARGS,
> + '-b', 'text', '-E',
> + '-c', meson.source_root() /
> 'docs',
> + '-D', 'master_doc=doc-good',
> + meson.current_source_dir(),
> + meson.current_build_dir()])
>
> -# Fix possible inconsistency in line endings in generated output and
> -# in the golden reference (which could otherwise cause test failures
> -# on Windows hosts). Unfortunately diff --strip-trailing-cr
> -# is GNU-diff only. The odd-looking perl is because we must avoid
> -# using an explicit '\' character in the command arguments to
> -# a custom_target(), as Meson will unhelpfully replace it with a '/'
> -# (https://github.com/mesonbuild/meson/issues/1564)
> -qapi_doc_out_nocr = custom_target('QAPI rST doc newline-sanitized',
> -  output: ['doc-good.txt.nocr'],
> -  input: qapi_doc_out[0],
> -  build_by_default: build_docs,
> -  command: ['perl', '-pe', '$x = chr 13;
> s/$x$//', '@INPUT@'],
> -  capture: true)

Re: [PATCH v10 07/10] memory: Add interface to set iommu page size mask

2020-10-16 Thread Auger Eric
Hi Jean,

On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote:
> From: Bharat Bhushan 
> 
> Allow to set the page size mask supported by an iommu memory region.
> This enables a vIOMMU to communicate the page size granule supported by
> an assigned device, on hosts that use page sizes greater than 4kB.
> 
> Signed-off-by: Bharat Bhushan 
> Signed-off-by: Jean-Philippe Brucker 
> ---
> v10: Add errp parameter
> ---
>  include/exec/memory.h | 26 ++
>  softmmu/memory.c  | 13 +
>  2 files changed, 39 insertions(+)
> 
> diff --git a/include/exec/memory.h b/include/exec/memory.h
> index dee09851622..c2da8381bec 100644
> --- a/include/exec/memory.h
> +++ b/include/exec/memory.h
> @@ -382,6 +382,20 @@ struct IOMMUMemoryRegionClass {
>   * @iommu: the IOMMUMemoryRegion
>   */
>  int (*num_indexes)(IOMMUMemoryRegion *iommu);
> +
> +/*
> + * Set supported IOMMU page size
> + *
> + * If supported, allows to restrict the page size mask that can be 
> supported
To match other docs: Optional method:
> + * with a given IOMMU memory region. For example, to propagate host 
> physical
> + * IOMMU page size mask limitations to the virtual IOMMU.
> + *
> + * Returns 0 on success, or a negative error. In case of failure, the 
> error
> + * object must be created.
document args as done for other functions?
> + */
> + int (*iommu_set_page_size_mask)(IOMMUMemoryRegion *iommu,
> + uint64_t page_size_mask,
> + Error **errp);
>  };
>  
>  typedef struct CoalescedMemoryRange CoalescedMemoryRange;
> @@ -1389,6 +1403,18 @@ int 
> memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
>   */
>  int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr);
>  
> +/**
> + * memory_region_iommu_set_page_size_mask: set the supported page
> + * sizes for a given IOMMU memory region
> + *
> + * @iommu_mr: IOMMU memory region
> + * @page_size_mask: supported page size mask
> + * @errp: pointer to Error*, to store an error if it happens.
> + */
> +int memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion *iommu_mr,
> +   uint64_t page_size_mask,
> +   Error **errp);
> +
>  /**
>   * memory_region_name: get a memory region's name
>   *
> diff --git a/softmmu/memory.c b/softmmu/memory.c
> index fa280a19f7f..5c855a02704 100644
> --- a/softmmu/memory.c
> +++ b/softmmu/memory.c
> @@ -1811,6 +1811,19 @@ static int 
> memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr,
>  return ret;
>  }
>  
> +int memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion *iommu_mr,
> +   uint64_t page_size_mask,
> +   Error **errp)
> +{
> +IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
> +int ret = 0;
> +
> +if (imrc->iommu_set_page_size_mask) {
> +ret = imrc->iommu_set_page_size_mask(iommu_mr, page_size_mask, errp);
> +}
> +return ret;
> +}
> +
>  int memory_region_register_iommu_notifier(MemoryRegion *mr,
>IOMMUNotifier *n, Error **errp)
>  {
> 
Besides

Reviewed-by: Eric Auger 

Thanks

Eric




[PATCH] meson: move SPHINX_ARGS references within "if build_docs"

2020-10-16 Thread Paolo Bonzini
Signed-off-by: Paolo Bonzini 
---
 tests/qapi-schema/meson.build | 88 +--
 1 file changed, 44 insertions(+), 44 deletions(-)

diff --git a/tests/qapi-schema/meson.build b/tests/qapi-schema/meson.build
index 1f222a7a13..66c7f04cf8 100644
--- a/tests/qapi-schema/meson.build
+++ b/tests/qapi-schema/meson.build
@@ -219,53 +219,53 @@ qapi_doc = custom_target('QAPI doc',
 '-p', 'doc-good-', '@INPUT0@' ],
  depend_files: qapi_gen_depends)
 
-# Test the document-comment document generation code by running a test schema
-# file through Sphinx's plain-text builder and comparing the result against
-# a golden reference. This is in theory susceptible to failures if Sphinx
-# changes its output, but the text output has historically been very stable
-# (no changes between Sphinx 1.6 and 3.0), so it is a better bet than
-# texinfo or HTML generation, both of which have had changes. We might
-# need to add more sophisticated logic here in future for some sort of
-# fuzzy comparison if future Sphinx versions produce different text,
-# but for now the simple comparison suffices.
-qapi_doc_out = custom_target('QAPI rST doc',
- output: ['doc-good.txt'],
- input: files('doc-good.json', 'doc-good.rst'),
- build_by_default: build_docs,
- depend_files: sphinx_extn_depends,
- # We use -E to suppress Sphinx's caching, because
- # we want it to always really run the QAPI doc
- # generation code. It also means we don't
- # clutter up the build dir with the cache.
- command: [SPHINX_ARGS,
-   '-b', 'text', '-E',
-   '-c', meson.source_root() / 'docs',
-   '-D', 'master_doc=doc-good',
-   meson.current_source_dir(),
-   meson.current_build_dir()])
+if build_docs
+  # Test the document-comment document generation code by running a test schema
+  # file through Sphinx's plain-text builder and comparing the result against
+  # a golden reference. This is in theory susceptible to failures if Sphinx
+  # changes its output, but the text output has historically been very stable
+  # (no changes between Sphinx 1.6 and 3.0), so it is a better bet than
+  # texinfo or HTML generation, both of which have had changes. We might
+  # need to add more sophisticated logic here in future for some sort of
+  # fuzzy comparison if future Sphinx versions produce different text,
+  # but for now the simple comparison suffices.
+  qapi_doc_out = custom_target('QAPI rST doc',
+   output: ['doc-good.txt'],
+   input: files('doc-good.json', 'doc-good.rst'),
+   build_by_default: true,
+   depend_files: sphinx_extn_depends,
+   # We use -E to suppress Sphinx's caching, 
because
+   # we want it to always really run the QAPI doc
+   # generation code. It also means we don't
+   # clutter up the build dir with the cache.
+   command: [SPHINX_ARGS,
+ '-b', 'text', '-E',
+ '-c', meson.source_root() / 'docs',
+ '-D', 'master_doc=doc-good',
+ meson.current_source_dir(),
+ meson.current_build_dir()])
 
-# Fix possible inconsistency in line endings in generated output and
-# in the golden reference (which could otherwise cause test failures
-# on Windows hosts). Unfortunately diff --strip-trailing-cr
-# is GNU-diff only. The odd-looking perl is because we must avoid
-# using an explicit '\' character in the command arguments to
-# a custom_target(), as Meson will unhelpfully replace it with a '/'
-# (https://github.com/mesonbuild/meson/issues/1564)
-qapi_doc_out_nocr = custom_target('QAPI rST doc newline-sanitized',
-  output: ['doc-good.txt.nocr'],
-  input: qapi_doc_out[0],
-  build_by_default: build_docs,
-  command: ['perl', '-pe', '$x = chr 13; 
s/$x$//', '@INPUT@'],
-  capture: true)
+  # Fix possible inconsistency in line endings in generated output and
+  # in the golden reference (which could otherwise cause test failures
+  # on Windows hosts). Unfortunately diff --strip-trailing-cr
+  # is GNU-diff only. The odd-looking perl is because we 

Re: [PATCH v10 05/10] virtio-iommu: Add replay() memory region callback

2020-10-16 Thread Auger Eric
Hi Jean,

On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote:
> From: Bharat Bhushan 
> 
> Implement the replay callback to setup all mappings for a new memory
> region.
> 
> Signed-off-by: Bharat Bhushan 
> Signed-off-by: Jean-Philippe Brucker 
> ---
> v10: Homogenize tracepoint arguments
> ---
>  hw/virtio/virtio-iommu.c | 41 
>  hw/virtio/trace-events   |  1 +
>  2 files changed, 42 insertions(+)
> 
> diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c
> index 7e6e3cf5200..d2b96846134 100644
> --- a/hw/virtio/virtio-iommu.c
> +++ b/hw/virtio/virtio-iommu.c
> @@ -861,6 +861,46 @@ static gint int_cmp(gconstpointer a, gconstpointer b, 
> gpointer user_data)
>  return (ua > ub) - (ua < ub);
>  }
>  
> +static gboolean virtio_iommu_remap(gpointer key, gpointer value, gpointer 
> data)
> +{
> +VirtIOIOMMUMapping *mapping = (VirtIOIOMMUMapping *) value;
> +VirtIOIOMMUInterval *interval = (VirtIOIOMMUInterval *) key;
> +IOMMUMemoryRegion *mr = (IOMMUMemoryRegion *) data;
> +
> +trace_virtio_iommu_remap(mr->parent_obj.name, interval->low, 
> interval->high,
> + mapping->phys_addr);
> +virtio_iommu_notify_unmap(mr, interval->low, interval->high);
> +virtio_iommu_notify_map(mr, interval->low, interval->high,
> +mapping->phys_addr);
I don't get the preliminary unmap with the same data. Why isn't the map
sufficient to replay?

The default implementation only notifies for valid entries.
> +return false;
> +}
> +
> +static void virtio_iommu_replay(IOMMUMemoryRegion *mr, IOMMUNotifier *n)
> +{
> +IOMMUDevice *sdev = container_of(mr, IOMMUDevice, iommu_mr);
> +VirtIOIOMMU *s = sdev->viommu;
> +uint32_t sid;
> +VirtIOIOMMUEndpoint *ep;
> +
> +sid = virtio_iommu_get_bdf(sdev);
> +
> +qemu_mutex_lock(>mutex);
> +
> +if (!s->endpoints) {
> +goto unlock;
> +}
> +
> +ep = g_tree_lookup(s->endpoints, GUINT_TO_POINTER(sid));
> +if (!ep || !ep->domain) {
> +goto unlock;
> +}
> +
> +g_tree_foreach(ep->domain->mappings, virtio_iommu_remap, mr);
> +
> +unlock:
> +qemu_mutex_unlock(>mutex);
> +}
> +
>  static void virtio_iommu_device_realize(DeviceState *dev, Error **errp)
>  {
>  VirtIODevice *vdev = VIRTIO_DEVICE(dev);
> @@ -1091,6 +1131,7 @@ static void 
> virtio_iommu_memory_region_class_init(ObjectClass *klass,
>  IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_CLASS(klass);
>  
>  imrc->translate = virtio_iommu_translate;
> +imrc->replay = virtio_iommu_replay;
>  }
>  
>  static const TypeInfo virtio_iommu_info = {
> diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events
> index 65a48555c78..16f4729db4b 100644
> --- a/hw/virtio/trace-events
> +++ b/hw/virtio/trace-events
> @@ -108,6 +108,7 @@ virtio_iommu_report_fault(uint8_t reason, uint32_t flags, 
> uint32_t endpoint, uin
>  virtio_iommu_fill_resv_property(uint32_t devid, uint8_t subtype, uint64_t 
> start, uint64_t end) "dev= %d, type=%d start=0x%"PRIx64" end=0x%"PRIx64
>  virtio_iommu_notify_map(const char *name, uint64_t virt_start, uint64_t 
> virt_end, uint64_t phys_start) "mr=%s virt_start=0x%"PRIx64" 
> virt_end=0x%"PRIx64" phys_start=0x%"PRIx64
>  virtio_iommu_notify_unmap(const char *name, uint64_t virt_start, uint64_t 
> virt_end) "mr=%s virt_start=0x%"PRIx64" virt_end=0x%"PRIx64
> +virtio_iommu_remap(const char *name, uint64_t virt_start, uint64_t virt_end, 
> uint64_t phys_start) "mr=%s virt_start=0x%"PRIx64" virt_end=0x%"PRIx64" 
> phys_start=0x%"PRIx64
>  
>  # virtio-mem.c
>  virtio_mem_send_response(uint16_t type) "type=%" PRIu16
> 
Thanks

Eric




Re: [PATCH v5 2/2] hw/arm/sbsa-ref: add SBSA watchdog device

2020-10-16 Thread Graeme Gregory
On Thu, Oct 15, 2020 at 06:21:09PM +0300, Maxim Uvarov wrote:
> On Thu, 15 Oct 2020 at 17:12, Graeme Gregory  wrote:
> >
> > On Wed, Oct 14, 2020 at 01:04:43PM -0400, Shashi Mallela wrote:
> > > This was added as a placeholder for the virt requirement suggested by 
> > > Maxim
> > > earlier.Agreed that this fdt otherwise has no significance for sbsa-ref
> > > platform nor is being used by ACPI table created for wdt.
> > >
> > > -Shashi
> > >
> > > On Wed, 14 Oct 2020 at 05:31, Graeme Gregory <[1]gra...@nuviainc.com> 
> > > wrote:
> > >
> > > On Tue, Oct 13, 2020 at 11:16:31AM -0400, Shashi Mallela wrote:
> > > > Included the newly implemented SBSA generic watchdog device model 
> > > into
> > > > SBSA platform
> > > >
> > > > Signed-off-by: Shashi Mallela <[2]shashi.mall...@linaro.org>
> > > > ---
> > > >  hw/arm/sbsa-ref.c | 50 
> > > +++
> > > >  1 file changed, 50 insertions(+)
> > > >
> > > > diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
> > > > index 9c3a893bedfd..97ed41607119 100644
> > > > --- a/hw/arm/sbsa-ref.c
> > > > +++ b/hw/arm/sbsa-ref.c
> > > > @@ -30,6 +30,7 @@
> > > >  #include "exec/hwaddr.h"
> > > >  #include "kvm_arm.h"
> > > >  #include "hw/arm/boot.h"
> > > > +#include "hw/arm/fdt.h"
> > > >  #include "hw/block/flash.h"
> > > >  #include "hw/boards.h"
> > > >  #include "hw/ide/internal.h"
> > > > @@ -40,6 +41,7 @@
> > > >  #include "hw/qdev-properties.h"
> > > >  #include "hw/usb.h"
> > > >  #include "hw/char/pl011.h"
> > > > +#include "hw/watchdog/wdt_sbsa_gwdt.h"
> > > >  #include "net/net.h"
> > > >  #include "qom/object.h"
> > > >
> > > > @@ -64,6 +66,9 @@ enum {
> > > >  SBSA_GIC_DIST,
> > > >  SBSA_GIC_REDIST,
> > > >  SBSA_SECURE_EC,
> > > > +SBSA_GWDT,
> > > > +SBSA_GWDT_REFRESH,
> > > > +SBSA_GWDT_CONTROL,
> > > >  SBSA_SMMU,
> > > >  SBSA_UART,
> > > >  SBSA_RTC,
> > > > @@ -104,6 +109,8 @@ static const MemMapEntry sbsa_ref_memmap[] = {
> > > >  [SBSA_GIC_DIST] =   { 0x4006, 0x0001 },
> > > >  [SBSA_GIC_REDIST] = { 0x4008, 0x0400 },
> > > >  [SBSA_SECURE_EC] =  { 0x5000, 0x1000 },
> > > > +[SBSA_GWDT_REFRESH] =   { 0x5001, 0x1000 },
> > > > +[SBSA_GWDT_CONTROL] =   { 0x50011000, 0x1000 },
> > > >  [SBSA_UART] =   { 0x6000, 0x1000 },
> > > >  [SBSA_RTC] ={ 0x6001, 0x1000 },
> > > >  [SBSA_GPIO] =   { 0x6002, 0x1000 },
> > > > @@ -133,6 +140,8 @@ static const int sbsa_ref_irqmap[] = {
> > > >  [SBSA_SECURE_UART_MM] = 9,
> > > >  [SBSA_AHCI] = 10,
> > > >  [SBSA_EHCI] = 11,
> > > > +[SBSA_SMMU] = 12, /* ... to 15 */
> > > > +[SBSA_GWDT] = 16,
> > > >  };
> >
> > I guess your patch was not based on master here? You should make sure
> > you are rebased to the latest version before sending.
> >
> > > >
> > > >  static uint64_t sbsa_ref_cpu_mp_affinity(SBSAMachineState *sms, 
> > > int idx)
> > > > @@ -141,6 +150,30 @@ static uint64_t sbsa_ref_cpu_mp_affinity
> > > (SBSAMachineState *sms, int idx)
> > > >  return arm_cpu_mp_affinity(idx, clustersz);
> > > >  }
> > > >
> > > > +static void create_wdt_fdt(SBSAMachineState *sms)
> > > > +{
> > > > +char *nodename;
> > > > +const char compat[] = "arm,sbsa-gwdt";
> > > > +
> > > > +hwaddr rbase = sbsa_ref_memmap[SBSA_GWDT_REFRESH].base;
> > > > +hwaddr cbase = sbsa_ref_memmap[SBSA_GWDT_CONTROL].base;
> > > > +int irq = sbsa_ref_irqmap[SBSA_GWDT];
> > > > +
> > > > +nodename = g_strdup_printf("/watchdog@%" PRIx64, rbase);
> > > > +qemu_fdt_add_subnode(sms->fdt, nodename);
> > > > +
> > > > +qemu_fdt_setprop(sms->fdt, nodename, "compatible",
> > > > + compat, sizeof(compat));
> > > > +qemu_fdt_setprop_sized_cells(sms->fdt, nodename, "reg",
> > > > + 2, rbase, 2, SBSA_GWDT_RMMIO_SIZE,
> > > > + 2, cbase, 2, 
> > > SBSA_GWDT_CMMIO_SIZE);
> > > > +qemu_fdt_setprop_cells(sms->fdt, nodename, "interrupts",
> > > > +GIC_FDT_IRQ_TYPE_PPI, irq,
> > > > +GIC_FDT_IRQ_FLAGS_LEVEL_HI);
> > > > +qemu_fdt_setprop_cell(sms->fdt, nodename, "timeout-sec", 30);
> > > > +g_free(nodename);
> > > > +}
> > > > +
> > >
> > > Is this actually used anywhere? I ask because SBSA-ref is not a FDT
> > > booting machine and only uses FDT to transfer some dynamic info to
> > > arm-tf/edk2 and is not a full description tree. Your ACPI patch in
> > > 

Re: [PATCH] meson: Only install icons and qemu.desktop if have_system

2020-10-16 Thread Philippe Mathieu-Daudé
Le jeu. 15 oct. 2020 22:22, Bruce Rogers  a écrit :

> These files are not needed for a linux-user only install.


> Signed-off-by: Bruce Rogers 
> ---
>  ui/meson.build | 7 +--
>  1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/ui/meson.build b/ui/meson.build
> index 78ad792ffb..fb36d305ca 100644
> --- a/ui/meson.build
> +++ b/ui/meson.build
> @@ -113,8 +113,11 @@ if have_system or xkbcommon.found()
>  endif
>
>  subdir('shader')
> -subdir('icons')
>
> -install_data('qemu.desktop', install_dir: config_host['qemu_desktopdir'])
> +if have_system
>

Some tools could have an icon, QSD later?

For now:
Reviewed-by: Philippe Mathieu-Daudé 

+  subdir('icons')
> +
> +  install_data('qemu.desktop', install_dir:
> config_host['qemu_desktopdir'])
> +endif
>
>  modules += {'ui': ui_modules}
> --
> 2.28.0
>
>
>


Re: [PATCH] hax: unbreak accelerator cpu code after cpus.c split

2020-10-16 Thread Philippe Mathieu-Daudé
Le ven. 16 oct. 2020 10:03, Claudio Fontana  a écrit :

> during my split of cpus.c, code line
> "current_cpu = cpu"
> was removed by mistake, causing hax to break.
>
> This commit fixes the situation restoring it.
>
> Reported-by: Volker Rümelin 
> Fixes: e92558e4bf8059ce4f0b310afe218802b72766bc
> Signed-off-by: Claudio Fontana 
>

Reviewed-by: Philippe Mathieu-Daudé 

---
>  target/i386/hax-cpus.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/target/i386/hax-cpus.c b/target/i386/hax-cpus.c
> index 99770e590c..f72c85bd49 100644
> --- a/target/i386/hax-cpus.c
> +++ b/target/i386/hax-cpus.c
> @@ -38,6 +38,7 @@ static void *hax_cpu_thread_fn(void *arg)
>  qemu_thread_get_self(cpu->thread);
>
>  cpu->thread_id = qemu_get_thread_id();
> +current_cpu = cpu;
>  hax_init_vcpu(cpu);
>  cpu_thread_signal_created(cpu);
>  qemu_guest_random_seed_thread_part2(cpu->random_seed);
> --
> 2.26.2
>
>
>


Re: [PATCH v10 06/10] virtio-iommu: Add notify_flag_changed() memory region callback

2020-10-16 Thread Auger Eric
Hi Jean,

On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote:
> From: Bharat Bhushan 
> 
> Add notify_flag_changed() to notice when memory listeners are added and
> removed.
> 
> Signed-off-by: Bharat Bhushan 
> Signed-off-by: Jean-Philippe Brucker 
> ---
> v10:
> * Use notifier flags instead of notifiers_list
> * Homogenize tracepoints
> ---
>  hw/virtio/virtio-iommu.c | 14 ++
>  hw/virtio/trace-events   |  2 ++
>  2 files changed, 16 insertions(+)
> 
> diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c
> index d2b96846134..8823bfc804a 100644
> --- a/hw/virtio/virtio-iommu.c
> +++ b/hw/virtio/virtio-iommu.c
> @@ -901,6 +901,19 @@ unlock:
>  qemu_mutex_unlock(>mutex);
>  }
>  
> +static int virtio_iommu_notify_flag_changed(IOMMUMemoryRegion *iommu_mr,
> +IOMMUNotifierFlag old,
> +IOMMUNotifierFlag new,
> +Error **errp)
> +{
> +if (old == IOMMU_NOTIFIER_NONE) {
> +trace_virtio_iommu_notify_flag_add(iommu_mr->parent_obj.name);
> +} else if (new == IOMMU_NOTIFIER_NONE) {
> +trace_virtio_iommu_notify_flag_del(iommu_mr->parent_obj.name);
> +}
> +return 0;
> +}
> +
>  static void virtio_iommu_device_realize(DeviceState *dev, Error **errp)
>  {
>  VirtIODevice *vdev = VIRTIO_DEVICE(dev);
> @@ -1132,6 +1145,7 @@ static void 
> virtio_iommu_memory_region_class_init(ObjectClass *klass,
>  
>  imrc->translate = virtio_iommu_translate;
>  imrc->replay = virtio_iommu_replay;
> +imrc->notify_flag_changed = virtio_iommu_notify_flag_changed;
>  }
>  
>  static const TypeInfo virtio_iommu_info = {
> diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events
> index 16f4729db4b..9108992bcc3 100644
> --- a/hw/virtio/trace-events
> +++ b/hw/virtio/trace-events
> @@ -109,6 +109,8 @@ virtio_iommu_fill_resv_property(uint32_t devid, uint8_t 
> subtype, uint64_t start,
>  virtio_iommu_notify_map(const char *name, uint64_t virt_start, uint64_t 
> virt_end, uint64_t phys_start) "mr=%s virt_start=0x%"PRIx64" 
> virt_end=0x%"PRIx64" phys_start=0x%"PRIx64
>  virtio_iommu_notify_unmap(const char *name, uint64_t virt_start, uint64_t 
> virt_end) "mr=%s virt_start=0x%"PRIx64" virt_end=0x%"PRIx64
>  virtio_iommu_remap(const char *name, uint64_t virt_start, uint64_t virt_end, 
> uint64_t phys_start) "mr=%s virt_start=0x%"PRIx64" virt_end=0x%"PRIx64" 
> phys_start=0x%"PRIx64
> +virtio_iommu_notify_flag_add(const char *name) "add notifier mr=%s"
Maybe "add notifier %d to mr=%s"
> +virtio_iommu_notify_flag_del(const char *name) "del notifier mr=%s"
from?
>  
>  # virtio-mem.c
>  virtio_mem_send_response(uint16_t type) "type=%" PRIu16
> 

Besides
Acked-by: Eric Auger 

Thanks

Eric




[PATCH v5 4/4] cirrus: Enable doc build on msys2/mingw

2020-10-16 Thread Yonggang Luo
Currently rST depends on old version sphinx-2.x.
Install it by downloading it.
Remove the need of university mirror, the main repo are recovered.

Signed-off-by: Yonggang Luo 
---
 .cirrus.yml | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/.cirrus.yml b/.cirrus.yml
index 9ccd2749ce..0481d99bb6 100644
--- a/.cirrus.yml
+++ b/.cirrus.yml
@@ -76,7 +76,6 @@ windows_msys2_task:
 ((Get-Content -path 
C:\tools\msys64\etc\\post-install\\07-pacman-key.post -Raw) -replace 
'--refresh-keys', '--version') | Set-Content -Path 
C:\tools\msys64\etc\\post-install\\07-pacman-key.post
 C:\tools\msys64\usr\bin\bash.exe -lc "sed -i 
's/^CheckSpace/#CheckSpace/g' /etc/pacman.conf"
 C:\tools\msys64\usr\bin\bash.exe -lc "export"
-C:\tools\msys64\usr\bin\bash.exe -lc "grep -rl 'repo.msys2.org/' 
/etc/pacman.d/mirrorlist.* | xargs sed -i 
's/repo.msys2.org\//mirrors.tuna.tsinghua.edu.cn\/msys2\//g'"
 C:\tools\msys64\usr\bin\pacman.exe --noconfirm -Sy
 echo Y | C:\tools\msys64\usr\bin\pacman.exe --noconfirm -Suu 
--overwrite=*
 taskkill /F /FI "MODULES eq msys-2.0.dll"
@@ -112,6 +111,11 @@ windows_msys2_task:
   mingw-w64-x86_64-gnutls \
   mingw-w64-x86_64-libnfs \
   "
+bitsadmin /transfer msys_download /dynamic /download /priority 
FOREGROUND `
+  
https://repo.msys2.org/mingw/x86_64/mingw-w64-x86_64-python-sphinx-2.3.1-1-any.pkg.tar.xz
 `
+  C:\tools\mingw-w64-x86_64-python-sphinx-2.3.1-1-any.pkg.tar.xz
+C:\tools\msys64\usr\bin\bash.exe -lc "pacman --noconfirm -U 
/c/tools/mingw-w64-x86_64-python-sphinx-2.3.1-1-any.pkg.tar.xz"
+del C:\tools\mingw-w64-x86_64-python-sphinx-2.3.1-1-any.pkg.tar.xz
 C:\tools\msys64\usr\bin\bash.exe -lc "rm -rf /var/cache/pacman/pkg/*"
 cd C:\tools\msys64
 echo "Start archive"
-- 
2.28.0.windows.1




[PATCH v5 0/4] Fixes docs building on msys2/mingw

2020-10-16 Thread Yonggang Luo
V4-V5
Revise * docs: Fixes build docs on msys2/mingw
For easier to review.
Revise * meson: Move the detection logic for sphinx to meson
According Paolo's suggestion with fixes.

V3-V4
Quic fixes of
python style
if xxx:

tested locally

V2-V3
No need convert perl trick to python script anymore
after Paolo's removal of ninjatool.
Revise Meson: Move the detection logic for sphinx to meson
for pass other platform by letting SPHINX_ARGS to be empty
when build_docs are false

v1 - v2
Also move the docs configure part from
configure to meson, this also fixed the pending
ninjatool removal caused issue that docs  can
not be build under msys2/mingw

Yonggang Luo (4):
  docs: Fixes build docs on msys2/mingw
  configure: the docdir option should passed to meson as is.
  meson: Move the detection logic for sphinx to meson
  cirrus: Enable doc build on msys2/mingw

 .cirrus.yml   |  6 +++-
 configure | 62 +++
 docs/meson.build  |  4 +--
 docs/sphinx/kerneldoc.py  |  2 +-
 meson.build   | 52 +
 meson_options.txt |  5 ++-
 tests/qapi-schema/meson.build |  2 +-
 7 files changed, 64 insertions(+), 69 deletions(-)

-- 
2.28.0.windows.1




[PATCH v5 2/4] configure: the docdir option should passed to meson as is.

2020-10-16 Thread Yonggang Luo
Signed-off-by: Yonggang Luo 
---
 configure | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/configure b/configure
index 78062fb091..432ea124e1 100755
--- a/configure
+++ b/configure
@@ -968,7 +968,7 @@ for opt do
   ;;
   --with-suffix=*) qemu_suffix="$optarg"
   ;;
-  --docdir=*) qemu_docdir="$optarg"
+  --docdir=*) docdir="$optarg"
   ;;
   --sysconfdir=*) sysconfdir="$optarg"
   ;;
@@ -5710,7 +5710,6 @@ fi
 qemu_confdir="$sysconfdir/$qemu_suffix"
 qemu_moddir="$libdir/$qemu_suffix"
 qemu_datadir="$datadir/$qemu_suffix"
-qemu_docdir="$docdir/$qemu_suffix"
 qemu_localedir="$datadir/locale"
 qemu_icondir="$datadir/icons"
 qemu_desktopdir="$datadir/applications"
-- 
2.28.0.windows.1




[PATCH v5 3/4] meson: Move the detection logic for sphinx to meson

2020-10-16 Thread Yonggang Luo
Signed-off-by: Yonggang Luo 
---
 configure | 59 +++
 docs/meson.build  |  4 +--
 meson.build   | 52 ++
 meson_options.txt |  5 ++-
 tests/qapi-schema/meson.build |  2 +-
 5 files changed, 57 insertions(+), 65 deletions(-)

diff --git a/configure b/configure
index 432ea124e1..c499c968cb 100755
--- a/configure
+++ b/configure
@@ -297,7 +297,7 @@ brlapi=""
 curl=""
 iconv="auto"
 curses="auto"
-docs=""
+docs="auto"
 fdt="auto"
 netmap="no"
 sdl="auto"
@@ -819,15 +819,6 @@ do
 fi
 done
 
-sphinx_build=
-for binary in sphinx-build-3 sphinx-build
-do
-if has "$binary"
-then
-sphinx_build=$(command -v "$binary")
-break
-fi
-done
 
 # Check for ancillary tools used in testing
 genisoimage=
@@ -1223,9 +1214,9 @@ for opt do
   ;;
   --disable-crypto-afalg) crypto_afalg="no"
   ;;
-  --disable-docs) docs="no"
+  --disable-docs) docs="disabled"
   ;;
-  --enable-docs) docs="yes"
+  --enable-docs) docs="enabled"
   ;;
   --disable-vhost-net) vhost_net="no"
   ;;
@@ -4408,45 +4399,6 @@ if check_include linux/btrfs.h ; then
 btrfs=yes
 fi
 
-# If we're making warnings fatal, apply this to Sphinx runs as well
-sphinx_werror=""
-if test "$werror" = "yes"; then
-sphinx_werror="-W"
-fi
-
-# Check we have a new enough version of sphinx-build
-has_sphinx_build() {
-# This is a bit awkward but works: create a trivial document and
-# try to run it with our configuration file (which enforces a
-# version requirement). This will fail if either
-# sphinx-build doesn't exist at all or if it is too old.
-mkdir -p "$TMPDIR1/sphinx"
-touch "$TMPDIR1/sphinx/index.rst"
-"$sphinx_build" $sphinx_werror -c "$source_path/docs" \
--b html "$TMPDIR1/sphinx" \
-"$TMPDIR1/sphinx/out"  >> config.log 2>&1
-}
-
-# Check if tools are available to build documentation.
-if test "$docs" != "no" ; then
-  if has_sphinx_build; then
-sphinx_ok=yes
-  else
-sphinx_ok=no
-  fi
-  if test "$sphinx_ok" = "yes"; then
-docs=yes
-  else
-if test "$docs" = "yes" ; then
-  if has $sphinx_build && test "$sphinx_ok" != "yes"; then
-echo "Warning: $sphinx_build exists but it is either too old or uses 
too old a Python version" >&2
-  fi
-  feature_not_found "docs" "Install a Python 3 version of python-sphinx"
-fi
-docs=no
-  fi
-fi
-
 # Search for bswap_32 function
 byteswap_h=no
 cat > $TMPC << EOF
@@ -6027,9 +5979,6 @@ qemu_version=$(head $source_path/VERSION)
 echo "PKGVERSION=$pkgversion" >>$config_host_mak
 echo "SRC_PATH=$source_path" >> $config_host_mak
 echo "TARGET_DIRS=$target_list" >> $config_host_mak
-if [ "$docs" = "yes" ] ; then
-  echo "BUILD_DOCS=yes" >> $config_host_mak
-fi
 if test "$modules" = "yes"; then
   # $shacmd can generate a hash started with digit, which the compiler doesn't
   # like as an symbol. So prefix it with an underscore
@@ -6702,7 +6651,6 @@ fi
 echo "ROMS=$roms" >> $config_host_mak
 echo "MAKE=$make" >> $config_host_mak
 echo "PYTHON=$python" >> $config_host_mak
-echo "SPHINX_BUILD=$sphinx_build" >> $config_host_mak
 echo "GENISOIMAGE=$genisoimage" >> $config_host_mak
 echo "MESON=$meson" >> $config_host_mak
 echo "NINJA=$ninja" >> $config_host_mak
@@ -6984,6 +6932,7 @@ NINJA=$ninja $meson setup \
 -Dgettext=$gettext -Dxkbcommon=$xkbcommon -Du2f=$u2f \
 -Dcapstone=$capstone -Dslirp=$slirp -Dfdt=$fdt \
 -Diconv=$iconv -Dcurses=$curses \
+-Ddocs=$docs -Dsphinx_build=$sphinx_build \
 $cross_arg \
 "$PWD" "$source_path"
 
diff --git a/docs/meson.build b/docs/meson.build
index 0340d489ac..f566809a6a 100644
--- a/docs/meson.build
+++ b/docs/meson.build
@@ -37,7 +37,7 @@ if build_docs
 input: [files('conf.py'), files(manual / 'conf.py')],
 depfile: manual + '.d',
 depend_files: sphinx_extn_depends,
-command: [SPHINX_ARGS, '-Ddepfile=@DEPFILE@',
+command: SPHINX_ARGS + ['-Ddepfile=@DEPFILE@',
   '-Ddepfile_stamp=@OUTPUT0@',
   '-b', 'html', '-d', private_dir,
   input_dir, output_dir])
@@ -59,7 +59,7 @@ if build_docs
  input: this_manual,
  install: build_docs,
  install_dir: install_dirs,
- command: [SPHINX_ARGS, '-b', 'man', '-d', private_dir,
+ command: SPHINX_ARGS + ['-b', 'man', '-d', 
private_dir,
input_dir, meson.current_build_dir()])
 endif
   endforeach
diff --git a/meson.build b/meson.build
index 6cb8fe2882..70e6d59af4 100644
--- a/meson.build
+++ b/meson.build
@@ -17,7 +17,13 @@ cc = meson.get_compiler('c')
 config_host = keyval.load(meson.current_build_dir() / 'config-host.mak')
 enable_modules = 

[PATCH v5 1/4] docs: Fixes build docs on msys2/mingw

2020-10-16 Thread Yonggang Luo
meson didn't support running ../scripts/kernel-do directly
Add the perl as the first parameter

Signed-off-by: Yonggang Luo 
---
 docs/sphinx/kerneldoc.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/sphinx/kerneldoc.py b/docs/sphinx/kerneldoc.py
index 3e87940206..af130d0939 100644
--- a/docs/sphinx/kerneldoc.py
+++ b/docs/sphinx/kerneldoc.py
@@ -67,7 +67,7 @@ class KernelDocDirective(Directive):
 
 def run(self):
 env = self.state.document.settings.env
-cmd = [env.config.kerneldoc_bin, '-rst', '-enable-lineno']
+cmd = ['perl', env.config.kerneldoc_bin, '-rst', '-enable-lineno']
 
 filename = env.config.kerneldoc_srctree + '/' + self.arguments[0]
 export_file_patterns = []
-- 
2.28.0.windows.1




Re: [PATCH v4 3/4] meson: Move the detection logic for sphinx to meson

2020-10-16 Thread Yonggang Luo
On Fri, Oct 16, 2020 at 4:05 PM Paolo Bonzini  wrote:
>
> On 16/10/20 09:57, Paolo Bonzini wrote:
> > On 16/10/20 09:52, 罗勇刚(Yonggang Luo) wrote:
> >>
> >>> build_docs = false
> >>> if sphinx_build.found()
> >>>   # This is a bit awkward but works: create a trivial document and
> >>>   # try to run it with our configuration file (which enforces a
> >>>   # version requirement). This will fail if sphinx-build is too old.
> >>>   run_command('mkdir', ['-p', tmpdir / 'sphinx'])
> >>>   run_command('touch', [tmpdir / 'sphinx/index.rst'])
> >>>   sphinx_build_test_out = run_command(SPHINX_ARGS + [
> >>> '-c', meson.current_source_dir() / 'docs',
> >>> '-b', 'html', tmpdir / 'sphinx',
> >>> tmpdir / 'sphinx/out'])
> >>>   build_docs = (sphinx_build_test_out.returncode() == 0)
> >>> endif
> >> There is subtle error here, when  sphinx_build not found, there is
> >> SPHINX_ARGS  should be [],
> >> otherwise, latter place using  SPHINX_ARGS  have not found sphinx_build
> >> will cause error by meson
> >> ..
> >> I'll add
> >>
> >> else
> >>   SPHINX_ARGS  = []
> >> endif
> >
> > All uses of SPHINX_ARGS are protected by build_docs, and in turn
> > build_docs is false if "not sphinx_build.found()".  Am I missing
something?
>
> Ah there are uses in tests/ too, those should all be under "if
> build_docs" too.
Yeap, I did it before, but that changes a lot and not easy to review, you
can do it in separate patch.
Anyway setting  SPHINX_ARGS  to [] are more robust.
>
> Paolo
>


--
 此致
礼
罗勇刚
Yours
sincerely,
Yonggang Luo


Re: [PATCH] hax: unbreak accelerator cpu code after cpus.c split

2020-10-16 Thread Paolo Bonzini
On 16/10/20 10:00, Claudio Fontana wrote:
> during my split of cpus.c, code line
> "current_cpu = cpu"
> was removed by mistake, causing hax to break.
> 
> This commit fixes the situation restoring it.
> 
> Reported-by: Volker Rümelin 
> Fixes: e92558e4bf8059ce4f0b310afe218802b72766bc
> Signed-off-by: Claudio Fontana 
> ---
>  target/i386/hax-cpus.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/target/i386/hax-cpus.c b/target/i386/hax-cpus.c
> index 99770e590c..f72c85bd49 100644
> --- a/target/i386/hax-cpus.c
> +++ b/target/i386/hax-cpus.c
> @@ -38,6 +38,7 @@ static void *hax_cpu_thread_fn(void *arg)
>  qemu_thread_get_self(cpu->thread);
>  
>  cpu->thread_id = qemu_get_thread_id();
> +current_cpu = cpu;
>  hax_init_vcpu(cpu);
>  cpu_thread_signal_created(cpu);
>  qemu_guest_random_seed_thread_part2(cpu->random_seed);
> 

Queued, thanks.

Paolo




Re: [PATCH v4 3/4] meson: Move the detection logic for sphinx to meson

2020-10-16 Thread Paolo Bonzini
On 16/10/20 09:57, Paolo Bonzini wrote:
> On 16/10/20 09:52, 罗勇刚(Yonggang Luo) wrote:
>>
>>> build_docs = false
>>> if sphinx_build.found()
>>>   # This is a bit awkward but works: create a trivial document and
>>>   # try to run it with our configuration file (which enforces a
>>>   # version requirement). This will fail if sphinx-build is too old.
>>>   run_command('mkdir', ['-p', tmpdir / 'sphinx'])
>>>   run_command('touch', [tmpdir / 'sphinx/index.rst'])
>>>   sphinx_build_test_out = run_command(SPHINX_ARGS + [
>>>     '-c', meson.current_source_dir() / 'docs',
>>>     '-b', 'html', tmpdir / 'sphinx',
>>>     tmpdir / 'sphinx/out'])
>>>   build_docs = (sphinx_build_test_out.returncode() == 0)
>>> endif
>> There is subtle error here, when  sphinx_build not found, there is
>> SPHINX_ARGS  should be [],
>> otherwise, latter place using  SPHINX_ARGS  have not found sphinx_build
>> will cause error by meson
>> ..
>> I'll add
>>
>> else
>>   SPHINX_ARGS  = []  
>> endif
> 
> All uses of SPHINX_ARGS are protected by build_docs, and in turn
> build_docs is false if "not sphinx_build.found()".  Am I missing something?

Ah there are uses in tests/ too, those should all be under "if
build_docs" too.

Paolo




Re: [PATCH v10 04/10] virtio-iommu: Call memory notifiers in attach/detach

2020-10-16 Thread Auger Eric
Hi jean,

On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote:
> From: Bharat Bhushan 
> 
> Call the memory notifiers when attaching an endpoint to a domain, to
> replay existing mappings, and when detaching the endpoint, to remove all
> mappings.
> 
> Signed-off-by: Bharat Bhushan 
> Signed-off-by: Jean-Philippe Brucker 
> ---
> v10: Remove notifiers_list, rename callbacks
> ---
>  hw/virtio/virtio-iommu.c | 32 
>  1 file changed, 32 insertions(+)
> 
> diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c
> index fcdf3a819f8..7e6e3cf5200 100644
> --- a/hw/virtio/virtio-iommu.c
> +++ b/hw/virtio/virtio-iommu.c
> @@ -168,11 +168,39 @@ static void virtio_iommu_notify_unmap(IOMMUMemoryRegion 
> *mr, hwaddr virt_start,
>  memory_region_notify_iommu(mr, 0, entry);
>  }
>  
> +static gboolean virtio_iommu_notify_unmap_cb(gpointer key, gpointer value,
> + gpointer data)
> +{
> +VirtIOIOMMUInterval *interval = (VirtIOIOMMUInterval *) key;
> +IOMMUMemoryRegion *mr = (IOMMUMemoryRegion *) data;
> +
> +virtio_iommu_notify_unmap(mr, interval->low, interval->high);
> +
> +return false;
> +}
> +
> +static gboolean virtio_iommu_notify_map_cb(gpointer key, gpointer value,
> +   gpointer data)
> +{
> +VirtIOIOMMUMapping *mapping = (VirtIOIOMMUMapping *) value;
> +VirtIOIOMMUInterval *interval = (VirtIOIOMMUInterval *) key;
> +IOMMUMemoryRegion *mr = (IOMMUMemoryRegion *) data;
> +
> +virtio_iommu_notify_map(mr, interval->low, interval->high,
> +mapping->phys_addr);
Here also I think we should apply the mapping->flags.
> +
> +return false;
> +}
> +
>  static void virtio_iommu_detach_endpoint_from_domain(VirtIOIOMMUEndpoint *ep)
>  {
> +VirtIOIOMMUDomain *domain = ep->domain;
> +
>  if (!ep->domain) {
>  return;
>  }
> +g_tree_foreach(domain->mappings, virtio_iommu_notify_unmap_cb,
> +   ep->iommu_mr);
>  QLIST_REMOVE(ep, next);
>  ep->domain = NULL;
>  }
> @@ -315,6 +343,10 @@ static int virtio_iommu_attach(VirtIOIOMMU *s,
>  
>  ep->domain = domain;
>  
> +/* Replay domain mappings on the associated memory region */
> +g_tree_foreach(domain->mappings, virtio_iommu_notify_map_cb,
> +   ep->iommu_mr);
> +
>  return VIRTIO_IOMMU_S_OK;
>  }
>  
> 
Thanks

Eric




Re: [PULL 07/37] cpus: extract out hax-specific code to target/i386/

2020-10-16 Thread Claudio Fontana
On 10/16/20 8:48 AM, Volker Rümelin wrote:
>> From: Claudio Fontana 
>>
>> register a "CpusAccel" interface for HAX as well.
>>
> 
>> diff --git a/softmmu/cpus.c b/softmmu/cpus.c
>> index 9fa73735a2..900fff827a 100644
>> --- a/softmmu/cpus.c
>> +++ b/softmmu/cpus.c
>> @@ -416,35 +403,6 @@ void qemu_wait_io_event(CPUState *cpu)
>>  qemu_wait_io_event_common(cpu);
>>  }
>>  
>> -static void *qemu_hax_cpu_thread_fn(void *arg)
>> -{
>> -CPUState *cpu = arg;
>> -int r;
>> -
>> -rcu_register_thread();
>> -qemu_mutex_lock_iothread();
>> -qemu_thread_get_self(cpu->thread);
>> -
>> -cpu->thread_id = qemu_get_thread_id();
>> -current_cpu = cpu;
> 
> Hi Claudio,
> 
> is there a reason why you removed current_cpu = cpu; from hax_cpu_thread_fn() 
> when you moved that function to target/i386/hax-cpus.c? This change broke HAX 
> on Windows. Adding back that line makes it work again.


Hello Volker, I see the change in the history and it was clearly an ugly 
mistake on my part.
There was no reason or intention to remove the current_cpu = cpu assignment

The fix seems indeed to just + current_cpu = cpu;
and I will send a patch momentarily that does just that,

but I don't know of any CI coverage for Windows + hax currently,
so it would be good if you could spin the change to verify that it fixes the 
problem.

Ciao,

Claudio

> 
> The simplest reproducer is:
> $ ./qemu-system-x86_64.exe -machine pc,accel=hax -smp 2 -display gtk
> HAX is working and emulator runs in fast virt mode.
> 
> Then the QEMU window opens and shows 'Guest has not initialized the display 
> (yet).' forever.
> 
> A look at the Windows Task Manager suggests one thread is busy looping.
> 
> With best regards,
> Volker
> 
>> -hax_init_vcpu(cpu);
>> -cpu_thread_signal_created(cpu);
>> -qemu_guest_random_seed_thread_part2(cpu->random_seed);
>> -
>> -do {
>> -if (cpu_can_run(cpu)) {
>> -r = hax_smp_cpu_exec(cpu);
>> -if (r == EXCP_DEBUG) {
>> -cpu_handle_guest_debug(cpu);
>> -}
>> -}
>> -
>> -qemu_wait_io_event(cpu);
>> -} while (!cpu->unplug || cpu_can_run(cpu));
>> -rcu_unregister_thread();
>> -return NULL;
>> -}
>> -
>>  /* The HVF-specific vCPU thread function. This one should only run when the 
>> host
>>   * CPU supports the VMX "unrestricted guest" feature. */
>>  static void *qemu_hvf_cpu_thread_fn(void *arg)
>>




Re: [PATCH v4 3/4] meson: Move the detection logic for sphinx to meson

2020-10-16 Thread Yonggang Luo
On Fri, Oct 16, 2020 at 3:57 PM Paolo Bonzini  wrote:
>
> On 16/10/20 09:52, 罗勇刚(Yonggang Luo) wrote:
> >
> >> build_docs = false
> >> if sphinx_build.found()
> >>   # This is a bit awkward but works: create a trivial document and
> >>   # try to run it with our configuration file (which enforces a
> >>   # version requirement). This will fail if sphinx-build is too old.
> >>   run_command('mkdir', ['-p', tmpdir / 'sphinx'])
> >>   run_command('touch', [tmpdir / 'sphinx/index.rst'])
> >>   sphinx_build_test_out = run_command(SPHINX_ARGS + [
> >> '-c', meson.current_source_dir() / 'docs',
> >> '-b', 'html', tmpdir / 'sphinx',
> >> tmpdir / 'sphinx/out'])
> >>   build_docs = (sphinx_build_test_out.returncode() == 0)
> >> endif
> > There is subtle error here, when  sphinx_build not found, there is
> > SPHINX_ARGS  should be [],
> > otherwise, latter place using  SPHINX_ARGS  have not found sphinx_build
> > will cause error by meson
> > ..
> > I'll add
> >
> > else
> >   SPHINX_ARGS  = []
> > endif
>
> All uses of SPHINX_ARGS are protected by build_docs, and in turn
> build_docs is false if "not sphinx_build.found()".  Am I missing
something?
>
> Paolo
>
Rfer to
https://github.com/lygstate/qemu/runs/1261141240?check_suite_focus=true

--
 此致
礼
罗勇刚
Yours
sincerely,
Yonggang Luo


[PATCH] hax: unbreak accelerator cpu code after cpus.c split

2020-10-16 Thread Claudio Fontana
during my split of cpus.c, code line
"current_cpu = cpu"
was removed by mistake, causing hax to break.

This commit fixes the situation restoring it.

Reported-by: Volker Rümelin 
Fixes: e92558e4bf8059ce4f0b310afe218802b72766bc
Signed-off-by: Claudio Fontana 
---
 target/i386/hax-cpus.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/i386/hax-cpus.c b/target/i386/hax-cpus.c
index 99770e590c..f72c85bd49 100644
--- a/target/i386/hax-cpus.c
+++ b/target/i386/hax-cpus.c
@@ -38,6 +38,7 @@ static void *hax_cpu_thread_fn(void *arg)
 qemu_thread_get_self(cpu->thread);
 
 cpu->thread_id = qemu_get_thread_id();
+current_cpu = cpu;
 hax_init_vcpu(cpu);
 cpu_thread_signal_created(cpu);
 qemu_guest_random_seed_thread_part2(cpu->random_seed);
-- 
2.26.2




Re: [PATCH v10 03/10] virtio-iommu: Add memory notifiers for map/unmap

2020-10-16 Thread Auger Eric
Hi Jean,

On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote:
> From: Bharat Bhushan 
> 
> Extend VIRTIO_IOMMU_T_MAP/UNMAP request to notify memory listeners. It
> will call VFIO notifier to map/unmap regions in the physical IOMMU.
> 
> Signed-off-by: Bharat Bhushan 
> Signed-off-by: Eric Auger 
> Signed-off-by: Jean-Philippe Brucker 
> ---
> v10:
> * Use the flags from IOMMUMemoryRegion
> * Pass virt_start/virt_end rather than size, to avoid dealing with
>   overflow and for consistency.
> ---
>  hw/virtio/virtio-iommu.c | 53 
>  hw/virtio/trace-events   |  2 ++
>  2 files changed, 55 insertions(+)
> 
> diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c
> index 33115e82186..fcdf3a819f8 100644
> --- a/hw/virtio/virtio-iommu.c
> +++ b/hw/virtio/virtio-iommu.c
> @@ -125,6 +125,49 @@ static gint interval_cmp(gconstpointer a, gconstpointer 
> b, gpointer user_data)
>  }
>  }
>  
> +static void virtio_iommu_notify_map(IOMMUMemoryRegion *mr, hwaddr virt_start,
> +hwaddr virt_end, hwaddr paddr)
> +{
> +IOMMUTLBEntry entry;
> +IOMMUNotifierFlag flags = mr->iommu_notify_flags;
> +
> +if (!(flags & IOMMU_NOTIFIER_MAP)) {
> +return;
> +}
> +
> +trace_virtio_iommu_notify_map(mr->parent_obj.name, virt_start, virt_end,
> +  paddr);
> +
> +entry.target_as = _space_memory;
> +entry.addr_mask = virt_end - virt_start;
> +entry.iova = virt_start;
> +entry.perm = IOMMU_RW;
logically you should be able to cascade the struct virtio_iommu_req_map
*req flags field instead.
> +entry.translated_addr = paddr;
> +
> +memory_region_notify_iommu(mr, 0, entry);
> +}
> +
> +static void virtio_iommu_notify_unmap(IOMMUMemoryRegion *mr, hwaddr 
> virt_start,
> +  hwaddr virt_end)
> +{
> +IOMMUTLBEntry entry;
> +IOMMUNotifierFlag flags = mr->iommu_notify_flags;
> +
> +if (!(flags & IOMMU_NOTIFIER_UNMAP)) {
> +return;
> +}
> +
> +trace_virtio_iommu_notify_unmap(mr->parent_obj.name, virt_start, 
> virt_end);
> +
> +entry.target_as = _space_memory;
> +entry.addr_mask = virt_end - virt_start;
> +entry.iova = virt_start;
> +entry.perm = IOMMU_NONE;
> +entry.translated_addr = 0;
> +
> +memory_region_notify_iommu(mr, 0, entry);
> +}
> +
>  static void virtio_iommu_detach_endpoint_from_domain(VirtIOIOMMUEndpoint *ep)
>  {
>  if (!ep->domain) {
> @@ -315,6 +358,7 @@ static int virtio_iommu_map(VirtIOIOMMU *s,
>  VirtIOIOMMUDomain *domain;
>  VirtIOIOMMUInterval *interval;
>  VirtIOIOMMUMapping *mapping;
> +VirtIOIOMMUEndpoint *ep;
>  
>  if (flags & ~VIRTIO_IOMMU_MAP_F_MASK) {
>  return VIRTIO_IOMMU_S_INVAL;
> @@ -344,6 +388,10 @@ static int virtio_iommu_map(VirtIOIOMMU *s,
>  
>  g_tree_insert(domain->mappings, interval, mapping);
>  
> +QLIST_FOREACH(ep, >endpoint_list, next) {
> +virtio_iommu_notify_map(ep->iommu_mr, virt_start, virt_end, 
> phys_start);
> +}
> +
>  return VIRTIO_IOMMU_S_OK;
>  }
>  
> @@ -356,6 +404,7 @@ static int virtio_iommu_unmap(VirtIOIOMMU *s,
>  VirtIOIOMMUMapping *iter_val;
>  VirtIOIOMMUInterval interval, *iter_key;
>  VirtIOIOMMUDomain *domain;
> +VirtIOIOMMUEndpoint *ep;
>  int ret = VIRTIO_IOMMU_S_OK;
>  
>  trace_virtio_iommu_unmap(domain_id, virt_start, virt_end);
> @@ -373,6 +422,10 @@ static int virtio_iommu_unmap(VirtIOIOMMU *s,
>  uint64_t current_high = iter_key->high;
>  
>  if (interval.low <= current_low && interval.high >= current_high) {
> +QLIST_FOREACH(ep, >endpoint_list, next) {
> +virtio_iommu_notify_unmap(ep->iommu_mr, current_low,
> +  current_high);
> +}
>  g_tree_remove(domain->mappings, iter_key);
>  trace_virtio_iommu_unmap_done(domain_id, current_low, 
> current_high);
>  } else {
> diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events
> index cf1e59de302..65a48555c78 100644
> --- a/hw/virtio/trace-events
> +++ b/hw/virtio/trace-events
> @@ -106,6 +106,8 @@ virtio_iommu_put_domain(uint32_t domain_id) "Free 
> domain=%d"
>  virtio_iommu_translate_out(uint64_t virt_addr, uint64_t phys_addr, uint32_t 
> sid) "0x%"PRIx64" -> 0x%"PRIx64 " for sid=%d"
>  virtio_iommu_report_fault(uint8_t reason, uint32_t flags, uint32_t endpoint, 
> uint64_t addr) "FAULT reason=%d flags=%d endpoint=%d address =0x%"PRIx64
>  virtio_iommu_fill_resv_property(uint32_t devid, uint8_t subtype, uint64_t 
> start, uint64_t end) "dev= %d, type=%d start=0x%"PRIx64" end=0x%"PRIx64
> +virtio_iommu_notify_map(const char *name, uint64_t virt_start, uint64_t 
> virt_end, uint64_t phys_start) "mr=%s virt_start=0x%"PRIx64" 
> virt_end=0x%"PRIx64" phys_start=0x%"PRIx64
> +virtio_iommu_notify_unmap(const char *name, uint64_t virt_start, uint64_t 
> virt_end) "mr=%s 

Re: [PATCH v4 3/4] meson: Move the detection logic for sphinx to meson

2020-10-16 Thread Yonggang Luo
On Fri, Oct 16, 2020 at 3:57 PM Paolo Bonzini  wrote:
>
> On 16/10/20 09:52, 罗勇刚(Yonggang Luo) wrote:
> >
> >> build_docs = false
> >> if sphinx_build.found()
> >>   # This is a bit awkward but works: create a trivial document and
> >>   # try to run it with our configuration file (which enforces a
> >>   # version requirement). This will fail if sphinx-build is too old.
> >>   run_command('mkdir', ['-p', tmpdir / 'sphinx'])
> >>   run_command('touch', [tmpdir / 'sphinx/index.rst'])
> >>   sphinx_build_test_out = run_command(SPHINX_ARGS + [
> >> '-c', meson.current_source_dir() / 'docs',
> >> '-b', 'html', tmpdir / 'sphinx',
> >> tmpdir / 'sphinx/out'])
> >>   build_docs = (sphinx_build_test_out.returncode() == 0)
> >> endif
> > There is subtle error here, when  sphinx_build not found, there is
> > SPHINX_ARGS  should be [],
> > otherwise, latter place using  SPHINX_ARGS  have not found sphinx_build
> > will cause error by meson
> > ..
> > I'll add
> >
> > else
> >   SPHINX_ARGS  = []
> > endif
>
> All uses of SPHINX_ARGS are protected by build_docs, and in turn
> build_docs is false if "not sphinx_build.found()".  Am I missing
something?
Not all protected, missed in qapi/schema tests
>
> Paolo
>


--
 此致
礼
罗勇刚
Yours
sincerely,
Yonggang Luo


Re: [PATCH v4 3/4] meson: Move the detection logic for sphinx to meson

2020-10-16 Thread Paolo Bonzini
On 16/10/20 09:52, 罗勇刚(Yonggang Luo) wrote:
> 
>> build_docs = false
>> if sphinx_build.found()
>>   # This is a bit awkward but works: create a trivial document and
>>   # try to run it with our configuration file (which enforces a
>>   # version requirement). This will fail if sphinx-build is too old.
>>   run_command('mkdir', ['-p', tmpdir / 'sphinx'])
>>   run_command('touch', [tmpdir / 'sphinx/index.rst'])
>>   sphinx_build_test_out = run_command(SPHINX_ARGS + [
>>     '-c', meson.current_source_dir() / 'docs',
>>     '-b', 'html', tmpdir / 'sphinx',
>>     tmpdir / 'sphinx/out'])
>>   build_docs = (sphinx_build_test_out.returncode() == 0)
>> endif
> There is subtle error here, when  sphinx_build not found, there is
> SPHINX_ARGS  should be [],
> otherwise, latter place using  SPHINX_ARGS  have not found sphinx_build
> will cause error by meson
> ..
> I'll add
> 
> else
>   SPHINX_ARGS  = []  
> endif

All uses of SPHINX_ARGS are protected by build_docs, and in turn
build_docs is false if "not sphinx_build.found()".  Am I missing something?

Paolo




Re: [PATCH v4 3/4] meson: Move the detection logic for sphinx to meson

2020-10-16 Thread Yonggang Luo
On Fri, Oct 16, 2020 at 3:46 PM Paolo Bonzini  wrote:
>
> Here is a better way to write the meson test:
>
> if get_option('sphinx_build') == ''
>   sphinx_build = find_program(['sphinx-build-3', 'sphinx-build'],
>   required: get_option('docs'))
> else
>   sphinx_build = find_program(get_option('sphinx_build'),
>   required: get_option('docs'))
> endif
>
> SPHINX_ARGS = [sphinx_build]
> # If we're making warnings fatal, apply this to Sphinx runs as well
> if get_option('werror')
>   SPHINX_TEST_ARGS += [ '-W' ]
> endif
>
> # Check if tools are available to build documentation.
> build_docs = false
> if sphinx_build.found()
>   # This is a bit awkward but works: create a trivial document and
>   # try to run it with our configuration file (which enforces a
>   # version requirement). This will fail if sphinx-build is too old.
>   run_command('mkdir', ['-p', tmpdir / 'sphinx'])
>   run_command('touch', [tmpdir / 'sphinx/index.rst'])
>   sphinx_build_test_out = run_command(SPHINX_ARGS + [
> '-c', meson.current_source_dir() / 'docs',
> '-b', 'html', tmpdir / 'sphinx',
> tmpdir / 'sphinx/out'])
>   build_docs = (sphinx_build_test_out.returncode() == 0)
> endif
There is subtle error here, when  sphinx_build not found, there is
SPHINX_ARGS  should be [],
otherwise, latter place using  SPHINX_ARGS  have not found sphinx_build
will cause error by meson
..
I'll add

else
  SPHINX_ARGS  = []
endif

>
> if not build_docs
>   if sphinx_build_option != ''
> warning('@0@ exists but it is either too old or uses too old a Python
version'.format(sphinx_build_option))
>   endif
>   if get_option('docs').enabled()
> error('Install a Python 3 version of python-sphinx')
>   endif
> endif
>
>
>
> On 16/10/20 00:06, Yonggang Luo wrote:
> > Signed-off-by: Yonggang Luo 
> > ---
> >  configure | 59 +++---
> >  docs/meson.build  |  4 +--
> >  meson.build   | 60 +++
> >  meson_options.txt |  5 ++-
> >  tests/qapi-schema/meson.build |  2 +-
> >  5 files changed, 64 insertions(+), 66 deletions(-)
> >
> > diff --git a/configure b/configure
> > index 1ce31f97b4..ff593a8542 100755
> > --- a/configure
> > +++ b/configure
> > @@ -297,7 +297,7 @@ brlapi=""
> >  curl=""
> >  iconv="auto"
> >  curses="auto"
> > -docs=""
> > +docs="auto"
> >  fdt="auto"
> >  netmap="no"
> >  sdl="auto"
> > @@ -822,15 +822,6 @@ do
> >  fi
> >  done
> >
> > -sphinx_build=
> > -for binary in sphinx-build-3 sphinx-build
> > -do
> > -if has "$binary"
> > -then
> > -sphinx_build=$(command -v "$binary")
> > -break
> > -fi
> > -done
> >
> >  # Check for ancillary tools used in testing
> >  genisoimage=
> > @@ -1226,9 +1217,9 @@ for opt do
> >;;
> >--disable-crypto-afalg) crypto_afalg="no"
> >;;
> > -  --disable-docs) docs="no"
> > +  --disable-docs) docs="disabled"
> >;;
> > -  --enable-docs) docs="yes"
> > +  --enable-docs) docs="enabled"
> >;;
> >--disable-vhost-net) vhost_net="no"
> >;;
> > @@ -4413,45 +4404,6 @@ if check_include linux/btrfs.h ; then
> >  btrfs=yes
> >  fi
> >
> > -# If we're making warnings fatal, apply this to Sphinx runs as well
> > -sphinx_werror=""
> > -if test "$werror" = "yes"; then
> > -sphinx_werror="-W"
> > -fi
> > -
> > -# Check we have a new enough version of sphinx-build
> > -has_sphinx_build() {
> > -# This is a bit awkward but works: create a trivial document and
> > -# try to run it with our configuration file (which enforces a
> > -# version requirement). This will fail if either
> > -# sphinx-build doesn't exist at all or if it is too old.
> > -mkdir -p "$TMPDIR1/sphinx"
> > -touch "$TMPDIR1/sphinx/index.rst"
> > -"$sphinx_build" $sphinx_werror -c "$source_path/docs" \
> > --b html "$TMPDIR1/sphinx" \
> > -"$TMPDIR1/sphinx/out"  >> config.log 2>&1
> > -}
> > -
> > -# Check if tools are available to build documentation.
> > -if test "$docs" != "no" ; then
> > -  if has_sphinx_build; then
> > -sphinx_ok=yes
> > -  else
> > -sphinx_ok=no
> > -  fi
> > -  if test "$sphinx_ok" = "yes"; then
> > -docs=yes
> > -  else
> > -if test "$docs" = "yes" ; then
> > -  if has $sphinx_build && test "$sphinx_ok" != "yes"; then
> > -echo "Warning: $sphinx_build exists but it is either too old
or uses too old a Python version" >&2
> > -  fi
> > -  feature_not_found "docs" "Install a Python 3 version of
python-sphinx"
> > -fi
> > -docs=no
> > -  fi
> > -fi
> > -
> >  # Search for bswap_32 function
> >  byteswap_h=no
> >  cat > $TMPC << EOF
> > @@ -6087,9 +6039,6 @@ qemu_version=$(head $source_path/VERSION)
> >  echo "PKGVERSION=$pkgversion" >>$config_host_mak
> >  echo "SRC_PATH=$source_path" >> $config_host_mak
> >  echo "TARGET_DIRS=$target_list" >> $config_host_mak
> > -if [ 

Re: [PATCH v4 3/4] meson: Move the detection logic for sphinx to meson

2020-10-16 Thread Paolo Bonzini
Here is a better way to write the meson test:

if get_option('sphinx_build') == ''
  sphinx_build = find_program(['sphinx-build-3', 'sphinx-build'],
  required: get_option('docs'))
else
  sphinx_build = find_program(get_option('sphinx_build'),
  required: get_option('docs'))
endif

SPHINX_ARGS = [sphinx_build]
# If we're making warnings fatal, apply this to Sphinx runs as well
if get_option('werror')
  SPHINX_TEST_ARGS += [ '-W' ]
endif

# Check if tools are available to build documentation.
build_docs = false
if sphinx_build.found()
  # This is a bit awkward but works: create a trivial document and
  # try to run it with our configuration file (which enforces a
  # version requirement). This will fail if sphinx-build is too old.
  run_command('mkdir', ['-p', tmpdir / 'sphinx'])
  run_command('touch', [tmpdir / 'sphinx/index.rst'])
  sphinx_build_test_out = run_command(SPHINX_ARGS + [
'-c', meson.current_source_dir() / 'docs',
'-b', 'html', tmpdir / 'sphinx',
tmpdir / 'sphinx/out'])
  build_docs = (sphinx_build_test_out.returncode() == 0)
endif

if not build_docs
  if sphinx_build_option != ''
warning('@0@ exists but it is either too old or uses too old a Python 
version'.format(sphinx_build_option))
  endif
  if get_option('docs').enabled()
error('Install a Python 3 version of python-sphinx')
  endif
endif



On 16/10/20 00:06, Yonggang Luo wrote:
> Signed-off-by: Yonggang Luo 
> ---
>  configure | 59 +++---
>  docs/meson.build  |  4 +--
>  meson.build   | 60 +++
>  meson_options.txt |  5 ++-
>  tests/qapi-schema/meson.build |  2 +-
>  5 files changed, 64 insertions(+), 66 deletions(-)
> 
> diff --git a/configure b/configure
> index 1ce31f97b4..ff593a8542 100755
> --- a/configure
> +++ b/configure
> @@ -297,7 +297,7 @@ brlapi=""
>  curl=""
>  iconv="auto"
>  curses="auto"
> -docs=""
> +docs="auto"
>  fdt="auto"
>  netmap="no"
>  sdl="auto"
> @@ -822,15 +822,6 @@ do
>  fi
>  done
>  
> -sphinx_build=
> -for binary in sphinx-build-3 sphinx-build
> -do
> -if has "$binary"
> -then
> -sphinx_build=$(command -v "$binary")
> -break
> -fi
> -done
>  
>  # Check for ancillary tools used in testing
>  genisoimage=
> @@ -1226,9 +1217,9 @@ for opt do
>;;
>--disable-crypto-afalg) crypto_afalg="no"
>;;
> -  --disable-docs) docs="no"
> +  --disable-docs) docs="disabled"
>;;
> -  --enable-docs) docs="yes"
> +  --enable-docs) docs="enabled"
>;;
>--disable-vhost-net) vhost_net="no"
>;;
> @@ -4413,45 +4404,6 @@ if check_include linux/btrfs.h ; then
>  btrfs=yes
>  fi
>  
> -# If we're making warnings fatal, apply this to Sphinx runs as well
> -sphinx_werror=""
> -if test "$werror" = "yes"; then
> -sphinx_werror="-W"
> -fi
> -
> -# Check we have a new enough version of sphinx-build
> -has_sphinx_build() {
> -# This is a bit awkward but works: create a trivial document and
> -# try to run it with our configuration file (which enforces a
> -# version requirement). This will fail if either
> -# sphinx-build doesn't exist at all or if it is too old.
> -mkdir -p "$TMPDIR1/sphinx"
> -touch "$TMPDIR1/sphinx/index.rst"
> -"$sphinx_build" $sphinx_werror -c "$source_path/docs" \
> --b html "$TMPDIR1/sphinx" \
> -"$TMPDIR1/sphinx/out"  >> config.log 2>&1
> -}
> -
> -# Check if tools are available to build documentation.
> -if test "$docs" != "no" ; then
> -  if has_sphinx_build; then
> -sphinx_ok=yes
> -  else
> -sphinx_ok=no
> -  fi
> -  if test "$sphinx_ok" = "yes"; then
> -docs=yes
> -  else
> -if test "$docs" = "yes" ; then
> -  if has $sphinx_build && test "$sphinx_ok" != "yes"; then
> -echo "Warning: $sphinx_build exists but it is either too old or uses 
> too old a Python version" >&2
> -  fi
> -  feature_not_found "docs" "Install a Python 3 version of python-sphinx"
> -fi
> -docs=no
> -  fi
> -fi
> -
>  # Search for bswap_32 function
>  byteswap_h=no
>  cat > $TMPC << EOF
> @@ -6087,9 +6039,6 @@ qemu_version=$(head $source_path/VERSION)
>  echo "PKGVERSION=$pkgversion" >>$config_host_mak
>  echo "SRC_PATH=$source_path" >> $config_host_mak
>  echo "TARGET_DIRS=$target_list" >> $config_host_mak
> -if [ "$docs" = "yes" ] ; then
> -  echo "BUILD_DOCS=yes" >> $config_host_mak
> -fi
>  if test "$modules" = "yes"; then
># $shacmd can generate a hash started with digit, which the compiler 
> doesn't
># like as an symbol. So prefix it with an underscore
> @@ -6794,7 +6743,6 @@ fi
>  echo "ROMS=$roms" >> $config_host_mak
>  echo "MAKE=$make" >> $config_host_mak
>  echo "PYTHON=$python" >> $config_host_mak
> -echo "SPHINX_BUILD=$sphinx_build" >> $config_host_mak
>  echo "GENISOIMAGE=$genisoimage" >> $config_host_mak
>  echo "MESON=$meson" >> $config_host_mak
>  

Re: [PATCH v10 02/10] virtio-iommu: Store memory region in endpoint struct

2020-10-16 Thread Auger Eric
Hi Jean,

On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote:
> Store the memory region associated to each endpoint into the endpoint
> structure, to allow efficient memory notification on map/unmap.
> 
> Signed-off-by: Jean-Philippe Brucker 
Acked-by: Eric Auger 

> ---
> Not super confident about the reconstruct_endpoint() change since I
> haven't tested migration yet. Does it make sense?
It sounds good to me. I tested migration with vhost and this works properly.

Eric
> ---
>  hw/virtio/virtio-iommu.c | 11 ++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c
> index 543fbbb24fb..33115e82186 100644
> --- a/hw/virtio/virtio-iommu.c
> +++ b/hw/virtio/virtio-iommu.c
> @@ -49,6 +49,7 @@ typedef struct VirtIOIOMMUDomain {
>  typedef struct VirtIOIOMMUEndpoint {
>  uint32_t id;
>  VirtIOIOMMUDomain *domain;
> +IOMMUMemoryRegion *iommu_mr;
>  QLIST_ENTRY(VirtIOIOMMUEndpoint) next;
>  } VirtIOIOMMUEndpoint;
>  
> @@ -137,16 +138,19 @@ static VirtIOIOMMUEndpoint 
> *virtio_iommu_get_endpoint(VirtIOIOMMU *s,
>uint32_t ep_id)
>  {
>  VirtIOIOMMUEndpoint *ep;
> +IOMMUMemoryRegion *mr;
>  
>  ep = g_tree_lookup(s->endpoints, GUINT_TO_POINTER(ep_id));
>  if (ep) {
>  return ep;
>  }
> -if (!virtio_iommu_mr(s, ep_id)) {
> +mr = virtio_iommu_mr(s, ep_id);
> +if (!mr) {
>  return NULL;
>  }
>  ep = g_malloc0(sizeof(*ep));
>  ep->id = ep_id;
> +ep->iommu_mr = mr;
>  trace_virtio_iommu_get_endpoint(ep_id);
>  g_tree_insert(s->endpoints, GUINT_TO_POINTER(ep_id), ep);
>  return ep;
> @@ -927,9 +931,14 @@ static gboolean reconstruct_endpoints(gpointer key, 
> gpointer value,
>  VirtIOIOMMU *s = (VirtIOIOMMU *)data;
>  VirtIOIOMMUDomain *d = (VirtIOIOMMUDomain *)value;
>  VirtIOIOMMUEndpoint *iter;
> +IOMMUMemoryRegion *mr;
>  
>  QLIST_FOREACH(iter, >endpoint_list, next) {
> +mr = virtio_iommu_mr(s, iter->id);
> +assert(mr);
> +
>  iter->domain = d;
> +iter->iommu_mr = mr;
>  g_tree_insert(s->endpoints, GUINT_TO_POINTER(iter->id), iter);
>  }
>  return false; /* continue the domain traversal */
> 




Re: [PATCH v10 01/10] virtio-iommu: Fix virtio_iommu_mr()

2020-10-16 Thread Auger Eric
Hi Jean,

On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote:
> Due to an invalid mask, virtio_iommu_mr() may return the wrong memory
> region. It hasn't been too problematic so far because the function was
> only used to test existence of an endpoint, but that is about to change.
> 
> Fixes: cfb42188b24d ("virtio-iommu: Implement attach/detach command")
> Signed-off-by: Jean-Philippe Brucker 
Maybe add
CC: QEMU Stable 

Acked-by: Eric Auger 

Thanks

Eric

> ---
>  hw/virtio/virtio-iommu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c
> index a91fa2f674c..543fbbb24fb 100644
> --- a/hw/virtio/virtio-iommu.c
> +++ b/hw/virtio/virtio-iommu.c
> @@ -101,7 +101,7 @@ static IOMMUMemoryRegion *virtio_iommu_mr(VirtIOIOMMU *s, 
> uint32_t sid)
>  bus_n = PCI_BUS_NUM(sid);
>  iommu_pci_bus = iommu_find_iommu_pcibus(s, bus_n);
>  if (iommu_pci_bus) {
> -devfn = sid & PCI_DEVFN_MAX;
> +devfn = sid & (PCI_DEVFN_MAX - 1);
>  dev = iommu_pci_bus->pbdev[devfn];
>  if (dev) {
>  return >iommu_mr;
> 




Re: [PATCH] meson: Only install icons and qemu.desktop if have_system

2020-10-16 Thread Paolo Bonzini
On 15/10/20 22:18, Bruce Rogers wrote:
> These files are not needed for a linux-user only install.
> 
> Signed-off-by: Bruce Rogers 
> ---
>  ui/meson.build | 7 +--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/ui/meson.build b/ui/meson.build
> index 78ad792ffb..fb36d305ca 100644
> --- a/ui/meson.build
> +++ b/ui/meson.build
> @@ -113,8 +113,11 @@ if have_system or xkbcommon.found()
>  endif
>  
>  subdir('shader')
> -subdir('icons')
>  
> -install_data('qemu.desktop', install_dir: config_host['qemu_desktopdir'])
> +if have_system
> +  subdir('icons')
> +
> +  install_data('qemu.desktop', install_dir: config_host['qemu_desktopdir'])
> +endif
>  
>  modules += {'ui': ui_modules}
> 

Queued, thanks.

Paolo




Re: [PATCH V14 0/8] mips: Add Loongson-3 machine support

2020-10-16 Thread no-reply
Patchew URL: 
https://patchew.org/QEMU/1602831120-3377-1-git-send-email-che...@lemote.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 1602831120-3377-1-git-send-email-che...@lemote.com
Subject: [PATCH V14 0/8] mips: Add Loongson-3 machine support

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag] patchew/1602831120-3377-1-git-send-email-che...@lemote.com 
-> patchew/1602831120-3377-1-git-send-email-che...@lemote.com
Switched to a new branch 'test'
d292df4 docs/system: Update MIPS machine documentation
4e63ead hw/mips: Add Loongson-3 machine support
1bf0737 hw/mips: Add Loongson-3 boot parameter helpers
bd43b2f hw/mips: Implement fw_cfg_arch_key_name()
f93634a target/mips: Add loongson-ext lsdc2 group of instructions
b55eee0 target/mips: Add loongson-ext lswc2 group of instructions (Part 2)
2c2eaaa target/mips: Add loongson-ext lswc2 group of instructions (Part 1)
ab68efd target/mips: Fix PageMask with variable page size

=== OUTPUT BEGIN ===
1/8 Checking commit ab68efdc70ef (target/mips: Fix PageMask with variable page 
size)
2/8 Checking commit 2c2eaaabbd3a (target/mips: Add loongson-ext lswc2 group of 
instructions (Part 1))
3/8 Checking commit b55eee07bfbe (target/mips: Add loongson-ext lswc2 group of 
instructions (Part 2))
4/8 Checking commit f93634a586de (target/mips: Add loongson-ext lsdc2 group of 
instructions)
5/8 Checking commit bd43b2ff95e9 (hw/mips: Implement fw_cfg_arch_key_name())
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#16: 
new file mode 100644

total: 0 errors, 1 warnings, 60 lines checked

Patch 5/8 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/8 Checking commit 1bf0737aee8c (hw/mips: Add Loongson-3 boot parameter 
helpers)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#15: 
new file mode 100644

WARNING: line over 80 characters
#47: FILE: hw/mips/loongson3_bootp.c:28:
+static struct efi_cpuinfo_loongson *init_cpu_info(void *g_cpuinfo, uint64_t 
cpu_freq)

WARNING: line over 80 characters
#66: FILE: hw/mips/loongson3_bootp.c:47:
+static struct efi_memory_map_loongson *init_memory_map(void *g_map, uint64_t 
ram_size)

total: 0 errors, 3 warnings, 394 lines checked

Patch 6/8 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
7/8 Checking commit 4e63ead64501 (hw/mips: Add Loongson-3 machine support)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#80: 
new file mode 100644

ERROR: line over 90 characters
#151: FILE: hw/mips/loongson3_virt.c:67:
+ * 3, 
http://www.anheng.com.cn/loongson/firmware-nonfree/uefi/loongson3-virt/bios_loongson3.bin

ERROR: line over 90 characters
#152: FILE: hw/mips/loongson3_virt.c:68:
+ * 4, 
http://mirrors.ustc.edu.cn/loongson/firmware-nonfree/uefi/loongson3-virt/bios_loongson3.bin

ERROR: line over 90 characters
#153: FILE: hw/mips/loongson3_virt.c:69:
+ * 5, 
http://mirrors.nju.edu.cn/loongson/firmware-nonfree/uefi/loongson3-virt/bios_loongson3.bin

ERROR: line over 90 characters
#154: FILE: hw/mips/loongson3_virt.c:70:
+ * 6, 
https://mirrors.tuna.tsinghua.edu.cn/loongson/firmware-nonfree/uefi/loongson3-virt/bios_loongson3.bin

ERROR: line over 90 characters
#155: FILE: hw/mips/loongson3_virt.c:71:
+ * 7, 
https://mirrors.bfsu.edu.cn/loongson/firmware-nonfree/uefi/loongson3-virt/bios_loongson3.bin

ERROR: line over 90 characters
#156: FILE: hw/mips/loongson3_virt.c:72:
+ * 8, 
https://mirrors.cloud.tencent.com/loongson/firmware-nonfree/uefi/loongson3-virt/bios_loongson3.bin

WARNING: line over 80 characters
#204: FILE: hw/mips/loongson3_virt.c:120:
+static void loongson3_pm_write(void *opaque, hwaddr addr, uint64_t val, 
unsigned size)

WARNING: line over 80 characters
#279: FILE: hw/mips/loongson3_virt.c:195:
+loaderparams.a2 = cpu_mips_phys_to_kseg0(NULL, 
loader_rommap[LOADER_PARAM].base);

WARNING: line over 80 characters
#361: FILE: hw/mips/loongson3_virt.c:277:
+fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, 
(uint16_t)current_machine->smp.max_cpus);

WARNING: line over 80 characters
#409: FILE: hw/mips/loongson3_virt.c:325:
+sprintf(highmemenv, "%ld", (unsigned long)(loaderparams.ram_size / MiB) - 
256);

WARNING: line over 80 characters
#495: FILE: hw/mips/loongson3_virt.c:411:
+static inline void loongson3_virt_devices_init(MachineState *machine, 
DeviceState *pic)

WARNING: line over 80 characters
#526: FILE: hw/mips/loongson3_virt.c:442:
+   

[PATCH V14 5/8] hw/mips: Implement fw_cfg_arch_key_name()

2020-10-16 Thread Huacai Chen
Implement fw_cfg_arch_key_name(), which returns the name of a
mips-specific key.

Reviewed-by: Philippe Mathieu-Daudé 
Signed-off-by: Huacai Chen 
Co-developed-by: Jiaxun Yang 
---
 hw/mips/fw_cfg.c| 35 +++
 hw/mips/fw_cfg.h| 19 +++
 hw/mips/meson.build |  2 +-
 3 files changed, 55 insertions(+), 1 deletion(-)
 create mode 100644 hw/mips/fw_cfg.c
 create mode 100644 hw/mips/fw_cfg.h

diff --git a/hw/mips/fw_cfg.c b/hw/mips/fw_cfg.c
new file mode 100644
index 00..67c4a74f4b
--- /dev/null
+++ b/hw/mips/fw_cfg.c
@@ -0,0 +1,35 @@
+/*
+ * QEMU fw_cfg helpers (MIPS specific)
+ *
+ * Copyright (c) 2020 Lemote, Inc.
+ *
+ * Author:
+ *   Huacai Chen (che...@lemote.com)
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#include "qemu/osdep.h"
+#include "hw/mips/fw_cfg.h"
+#include "hw/nvram/fw_cfg.h"
+
+const char *fw_cfg_arch_key_name(uint16_t key)
+{
+static const struct {
+uint16_t key;
+const char *name;
+} fw_cfg_arch_wellknown_keys[] = {
+{FW_CFG_MACHINE_VERSION, "machine_version"},
+{FW_CFG_CPU_FREQ, "cpu_frequency"},
+};
+
+for (size_t i = 0; i < ARRAY_SIZE(fw_cfg_arch_wellknown_keys); i++) {
+if (fw_cfg_arch_wellknown_keys[i].key == key) {
+return fw_cfg_arch_wellknown_keys[i].name;
+}
+}
+return NULL;
+}
diff --git a/hw/mips/fw_cfg.h b/hw/mips/fw_cfg.h
new file mode 100644
index 00..e317d5b9a3
--- /dev/null
+++ b/hw/mips/fw_cfg.h
@@ -0,0 +1,19 @@
+/*
+ * QEMU fw_cfg helpers (MIPS specific)
+ *
+ * Copyright (c) 2020 Huacai Chen
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#ifndef HW_MIPS_FW_CFG_H
+#define HW_MIPS_FW_CFG_H
+
+#include "hw/boards.h"
+#include "hw/nvram/fw_cfg.h"
+
+/* Data for BIOS to identify machine */
+#define FW_CFG_MACHINE_VERSION  (FW_CFG_ARCH_LOCAL + 0)
+#define FW_CFG_CPU_FREQ (FW_CFG_ARCH_LOCAL + 1)
+
+#endif
diff --git a/hw/mips/meson.build b/hw/mips/meson.build
index 46294b7382..c98391ce99 100644
--- a/hw/mips/meson.build
+++ b/hw/mips/meson.build
@@ -1,5 +1,5 @@
 mips_ss = ss.source_set()
-mips_ss.add(files('addr.c', 'mips_int.c'))
+mips_ss.add(files('addr.c', 'mips_int.c', 'fw_cfg.c'))
 mips_ss.add(when: 'CONFIG_FULOONG', if_true: files('fuloong2e.c'))
 mips_ss.add(when: 'CONFIG_JAZZ', if_true: files('jazz.c'))
 mips_ss.add(when: 'CONFIG_MALTA', if_true: files('gt64xxx_pci.c', 'malta.c'))
-- 
2.17.2




Re: [PATCH v2 1/3] macio: don't reference serial_hd() directly within the device

2020-10-16 Thread Mark Cave-Ayland

On 16/10/2020 01:16, David Gibson wrote:


On Tue, Oct 13, 2020 at 12:49:20PM +0100, Mark Cave-Ayland wrote:

Instead use qdev_prop_set_chr() to configure the ESCC serial chardevs at the
Mac Old World and New World machine level.

Also remove the now obsolete comment referring to the use of serial_hd() and
the setting of user_creatable to false accordingly.

Signed-off-by: Mark Cave-Ayland 


Applied to ppc-for-5.2, thanks.


Ah okay, I was planning to send a separate qemu-macppc pull request myself with these 
patches plus some cherry-picks from Zoltan's patchset after some more testing. Does 
this mean you would prefer to take the patches directly yourself?



ATB,

Mark.



[PATCH V14 4/8] target/mips: Add loongson-ext lsdc2 group of instructions

2020-10-16 Thread Huacai Chen
From: Jiaxun Yang 

LDC2/SDC2 opcodes have been rewritten as "load & store with offset"
group of instructions by loongson-ext ASE.

This patch add implementation of these instructions:
gslbx: load 1 bytes to GPR
gslhx: load 2 bytes to GPR
gslwx: load 4 bytes to GPR
gsldx: load 8 bytes to GPR
gslwxc1: load 4 bytes to FPR
gsldxc1: load 8 bytes to FPR
gssbx: store 1 bytes from GPR
gsshx: store 2 bytes from GPR
gsswx: store 4 bytes from GPR
gssdx: store 8 bytes from GPR
gsswxc1: store 4 bytes from FPR
gssdxc1: store 8 bytes from FPR

Details of Loongson-EXT is here:
https://github.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md

Signed-off-by: Jiaxun Yang 
Signed-off-by: Huacai Chen 
---
 target/mips/translate.c | 179 
 1 file changed, 179 insertions(+)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 25321d3c17..b2ce323e39 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -484,6 +484,24 @@ enum {
 OPC_GSSDRC1 = 0x7 | OPC_GSSHFS,
 };
 
+/* Loongson EXT LDC2/SDC2 opcodes */
+#define MASK_LOONGSON_LSDC2(op)   (MASK_OP_MAJOR(op) | (op & 0x7))
+
+enum {
+OPC_GSLBX  = 0x0 | OPC_LDC2,
+OPC_GSLHX  = 0x1 | OPC_LDC2,
+OPC_GSLWX  = 0x2 | OPC_LDC2,
+OPC_GSLDX  = 0x3 | OPC_LDC2,
+OPC_GSLWXC1= 0x6 | OPC_LDC2,
+OPC_GSLDXC1= 0x7 | OPC_LDC2,
+OPC_GSSBX  = 0x0 | OPC_SDC2,
+OPC_GSSHX  = 0x1 | OPC_SDC2,
+OPC_GSSWX  = 0x2 | OPC_SDC2,
+OPC_GSSDX  = 0x3 | OPC_SDC2,
+OPC_GSSWXC1= 0x6 | OPC_SDC2,
+OPC_GSSDXC1= 0x7 | OPC_SDC2,
+};
+
 /* BSHFL opcodes */
 #define MASK_BSHFL(op)  (MASK_SPECIAL3(op) | (op & (0x1F << 6)))
 
@@ -6172,6 +6190,165 @@ static void gen_loongson_lswc2(DisasContext *ctx, int 
rt,
 tcg_temp_free(t0);
 }
 
+/* Loongson EXT LDC2/SDC2 */
+static void gen_loongson_lsdc2(DisasContext *ctx, int rt,
+   int rs, int rd)
+{
+int offset = sextract32(ctx->opcode, 3, 8);
+uint32_t opc = MASK_LOONGSON_LSDC2(ctx->opcode);
+TCGv t0, t1;
+TCGv_i32 fp0;
+
+/* Pre-conditions */
+switch (opc) {
+case OPC_GSLBX:
+case OPC_GSLHX:
+case OPC_GSLWX:
+case OPC_GSLDX:
+/* prefetch, implement as NOP */
+if (rt == 0) {
+return;
+}
+break;
+case OPC_GSSBX:
+case OPC_GSSHX:
+case OPC_GSSWX:
+case OPC_GSSDX:
+break;
+case OPC_GSLWXC1:
+#if defined(TARGET_MIPS64)
+case OPC_GSLDXC1:
+#endif
+check_cp1_enabled(ctx);
+/* prefetch, implement as NOP */
+if (rt == 0) {
+return;
+}
+break;
+case OPC_GSSWXC1:
+#if defined(TARGET_MIPS64)
+case OPC_GSSDXC1:
+#endif
+check_cp1_enabled(ctx);
+break;
+default:
+MIPS_INVAL("loongson_lsdc2");
+generate_exception_end(ctx, EXCP_RI);
+return;
+break;
+}
+
+t0 = tcg_temp_new();
+
+gen_base_offset_addr(ctx, t0, rs, offset);
+gen_op_addr_add(ctx, t0, cpu_gpr[rd], t0);
+
+switch (opc) {
+case OPC_GSLBX:
+tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx, MO_SB);
+gen_store_gpr(t0, rt);
+break;
+case OPC_GSLHX:
+tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx, MO_TESW |
+ctx->default_tcg_memop_mask);
+gen_store_gpr(t0, rt);
+break;
+case OPC_GSLWX:
+gen_base_offset_addr(ctx, t0, rs, offset);
+if (rd) {
+gen_op_addr_add(ctx, t0, cpu_gpr[rd], t0);
+}
+tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx, MO_TESL |
+ctx->default_tcg_memop_mask);
+gen_store_gpr(t0, rt);
+break;
+#if defined(TARGET_MIPS64)
+case OPC_GSLDX:
+gen_base_offset_addr(ctx, t0, rs, offset);
+if (rd) {
+gen_op_addr_add(ctx, t0, cpu_gpr[rd], t0);
+}
+tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx, MO_TEQ |
+ctx->default_tcg_memop_mask);
+gen_store_gpr(t0, rt);
+break;
+#endif
+case OPC_GSLWXC1:
+check_cp1_enabled(ctx);
+gen_base_offset_addr(ctx, t0, rs, offset);
+if (rd) {
+gen_op_addr_add(ctx, t0, cpu_gpr[rd], t0);
+}
+fp0 = tcg_temp_new_i32();
+tcg_gen_qemu_ld_i32(fp0, t0, ctx->mem_idx, MO_TESL |
+ctx->default_tcg_memop_mask);
+gen_store_fpr32(ctx, fp0, rt);
+tcg_temp_free_i32(fp0);
+break;
+#if defined(TARGET_MIPS64)
+case OPC_GSLDXC1:
+check_cp1_enabled(ctx);
+gen_base_offset_addr(ctx, t0, rs, offset);
+if (rd) {
+gen_op_addr_add(ctx, t0, cpu_gpr[rd], t0);
+}
+tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx, MO_TEQ |
+ctx->default_tcg_memop_mask);
+gen_store_fpr64(ctx, t0, rt);
+break;
+#endif
+case OPC_GSSBX:
+t1 = 

[PATCH V14 8/8] docs/system: Update MIPS machine documentation

2020-10-16 Thread Huacai Chen
Add Loongson-3A CPU models and Loongson-3 based machine description.

Signed-off-by: Huacai Chen 
---
 docs/system/cpu-models-mips.rst.inc | 10 --
 docs/system/target-mips.rst | 10 ++
 2 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/docs/system/cpu-models-mips.rst.inc 
b/docs/system/cpu-models-mips.rst.inc
index 499b5b6fed..02cc4bb884 100644
--- a/docs/system/cpu-models-mips.rst.inc
+++ b/docs/system/cpu-models-mips.rst.inc
@@ -48,11 +48,17 @@ across all desired hosts.
 ``I6400``
 MIPS64 Processor (Release 6, 2014)
 
+``Loongson-2E``
+MIPS64 Processor (Loongson 2, 2006)
+
 ``Loongson-2F``
 MIPS64 Processor (Loongson 2, 2008)
 
-``Loongson-2E``
-MIPS64 Processor (Loongson 2, 2006)
+``Loongson-3A1000``
+MIPS64 Processor (Loongson 3, 2010)
+
+``Loongson-3A4000``
+MIPS64 Processor (Loongson 3, 2018)
 
 ``mips64dspr2``
 MIPS64 Processor (Release 2, 2006)
diff --git a/docs/system/target-mips.rst b/docs/system/target-mips.rst
index cd2a931edf..138441bdec 100644
--- a/docs/system/target-mips.rst
+++ b/docs/system/target-mips.rst
@@ -84,6 +84,16 @@ The Fuloong 2E emulation supports:
 
 -  RTL8139D as a network card chipset
 
+The Loongson-3 virtual platform emulation supports:
+
+-  Loongson 3A CPU
+
+-  LIOINTC as interrupt controller
+
+-  GPEX and virtio as peripheral devices
+
+-  Both KVM and TCG supported
+
 The mipssim pseudo board emulation provides an environment similar to
 what the proprietary MIPS emulator uses for running Linux. It supports:
 
-- 
2.17.2




[PATCH V14 3/8] target/mips: Add loongson-ext lswc2 group of instructions (Part 2)

2020-10-16 Thread Huacai Chen
From: Jiaxun Yang 

LWC2 & SWC2 have been rewritten by Loongson EXT vendor ASE
as "load/store quad word" and "shifted load/store" groups of
instructions.

This patch add implementation of these instructions:
gslwlc1: similar to lwl but RT is FPR instead of GPR
gslwrc1: similar to lwr but RT is FPR instead of GPR
gsldlc1: similar to ldl but RT is FPR instead of GPR
gsldrc1: similar to ldr but RT is FPR instead of GPR
gsswlc1: similar to swl but RT is FPR instead of GPR
gsswrc1: similar to swr but RT is FPR instead of GPR
gssdlc1: similar to sdl but RT is FPR instead of GPR
gssdrc1: similar to sdr but RT is FPR instead of GPR

Details of Loongson-EXT is here:
https://github.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md

Signed-off-by: Jiaxun Yang 
Signed-off-by: Huacai Chen 
---
 target/mips/translate.c | 178 
 1 file changed, 178 insertions(+)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 20a7f36c7c..25321d3c17 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -471,6 +471,19 @@ enum {
 OPC_GSSHFS  = OPC_SWC2,
 };
 
+/* Loongson EXT shifted load/store opcodes */
+#define MASK_LOONGSON_GSSHFLS(op) (MASK_OP_MAJOR(op) | (op & 0xc03f))
+enum {
+OPC_GSLWLC1 = 0x4 | OPC_GSSHFL,
+OPC_GSLWRC1 = 0x5 | OPC_GSSHFL,
+OPC_GSLDLC1 = 0x6 | OPC_GSSHFL,
+OPC_GSLDRC1 = 0x7 | OPC_GSSHFL,
+OPC_GSSWLC1 = 0x4 | OPC_GSSHFS,
+OPC_GSSWRC1 = 0x5 | OPC_GSSHFS,
+OPC_GSSDLC1 = 0x6 | OPC_GSSHFS,
+OPC_GSSDRC1 = 0x7 | OPC_GSSHFS,
+};
+
 /* BSHFL opcodes */
 #define MASK_BSHFL(op)  (MASK_SPECIAL3(op) | (op & (0x1F << 6)))
 
@@ -5930,6 +5943,7 @@ static void gen_loongson_lswc2(DisasContext *ctx, int rt,
 int lsq_rt1 = ctx->opcode & 0x1f;
 int lsq_offset = sextract32(ctx->opcode, 6, 9) << 4;
 #endif
+int shf_offset = sextract32(ctx->opcode, 6, 8);
 
 t0 = tcg_temp_new();
 
@@ -5986,6 +6000,170 @@ static void gen_loongson_lswc2(DisasContext *ctx, int 
rt,
 tcg_temp_free(t1);
 break;
 #endif
+case OPC_GSSHFL:
+switch (MASK_LOONGSON_GSSHFLS(ctx->opcode)) {
+case OPC_GSLWLC1:
+check_cp1_enabled(ctx);
+gen_base_offset_addr(ctx, t0, rs, shf_offset);
+t1 = tcg_temp_new();
+tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, MO_UB);
+tcg_gen_andi_tl(t1, t0, 3);
+#ifndef TARGET_WORDS_BIGENDIAN
+tcg_gen_xori_tl(t1, t1, 3);
+#endif
+tcg_gen_shli_tl(t1, t1, 3);
+tcg_gen_andi_tl(t0, t0, ~3);
+tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx, MO_TEUL);
+tcg_gen_shl_tl(t0, t0, t1);
+t2 = tcg_const_tl(-1);
+tcg_gen_shl_tl(t2, t2, t1);
+fp0 = tcg_temp_new_i32();
+gen_load_fpr32(ctx, fp0, rt);
+tcg_gen_ext_i32_tl(t1, fp0);
+tcg_gen_andc_tl(t1, t1, t2);
+tcg_temp_free(t2);
+tcg_gen_or_tl(t0, t0, t1);
+tcg_temp_free(t1);
+#if defined(TARGET_MIPS64)
+tcg_gen_extrl_i64_i32(fp0, t0);
+#else
+tcg_gen_ext32s_tl(fp0, t0);
+#endif
+gen_store_fpr32(ctx, fp0, rt);
+tcg_temp_free_i32(fp0);
+break;
+case OPC_GSLWRC1:
+check_cp1_enabled(ctx);
+gen_base_offset_addr(ctx, t0, rs, shf_offset);
+t1 = tcg_temp_new();
+tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, MO_UB);
+tcg_gen_andi_tl(t1, t0, 3);
+#ifdef TARGET_WORDS_BIGENDIAN
+tcg_gen_xori_tl(t1, t1, 3);
+#endif
+tcg_gen_shli_tl(t1, t1, 3);
+tcg_gen_andi_tl(t0, t0, ~3);
+tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx, MO_TEUL);
+tcg_gen_shr_tl(t0, t0, t1);
+tcg_gen_xori_tl(t1, t1, 31);
+t2 = tcg_const_tl(0xfffeull);
+tcg_gen_shl_tl(t2, t2, t1);
+fp0 = tcg_temp_new_i32();
+gen_load_fpr32(ctx, fp0, rt);
+tcg_gen_ext_i32_tl(t1, fp0);
+tcg_gen_and_tl(t1, t1, t2);
+tcg_temp_free(t2);
+tcg_gen_or_tl(t0, t0, t1);
+tcg_temp_free(t1);
+#if defined(TARGET_MIPS64)
+tcg_gen_extrl_i64_i32(fp0, t0);
+#else
+tcg_gen_ext32s_tl(fp0, t0);
+#endif
+gen_store_fpr32(ctx, fp0, rt);
+tcg_temp_free_i32(fp0);
+break;
+#if defined(TARGET_MIPS64)
+case OPC_GSLDLC1:
+check_cp1_enabled(ctx);
+gen_base_offset_addr(ctx, t0, rs, shf_offset);
+t1 = tcg_temp_new();
+tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, MO_UB);
+tcg_gen_andi_tl(t1, t0, 7);
+#ifndef TARGET_WORDS_BIGENDIAN
+tcg_gen_xori_tl(t1, t1, 7);
+#endif
+tcg_gen_shli_tl(t1, t1, 3);
+tcg_gen_andi_tl(t0, t0, ~7);
+tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx, MO_TEQ);
+tcg_gen_shl_tl(t0, t0, 

[PATCH V14 6/8] hw/mips: Add Loongson-3 boot parameter helpers

2020-10-16 Thread Huacai Chen
Preparing to add Loongson-3 machine support, add Loongson-3's LEFI (a
UEFI-like interface for BIOS-Kernel boot parameters) helpers first.

Signed-off-by: Huacai Chen 
Co-developed-by: Jiaxun Yang 
---
 hw/mips/loongson3_bootp.c | 162 +++
 hw/mips/loongson3_bootp.h | 225 ++
 hw/mips/meson.build   |   1 +
 3 files changed, 388 insertions(+)
 create mode 100644 hw/mips/loongson3_bootp.c
 create mode 100644 hw/mips/loongson3_bootp.h

diff --git a/hw/mips/loongson3_bootp.c b/hw/mips/loongson3_bootp.c
new file mode 100644
index 00..eab6f51a01
--- /dev/null
+++ b/hw/mips/loongson3_bootp.c
@@ -0,0 +1,162 @@
+/*
+ * LEFI (a UEFI-like interface for BIOS-Kernel boot parameters) helpers
+ *
+ * Copyright (c) 2017-2020 Huacai Chen (che...@lemote.com)
+ * Copyright (c) 2017-2020 Jiaxun Yang 
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see .
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/units.h"
+#include "qemu/cutils.h"
+#include "cpu.h"
+#include "hw/boards.h"
+#include "hw/mips/loongson3_bootp.h"
+
+static struct efi_cpuinfo_loongson *init_cpu_info(void *g_cpuinfo, uint64_t 
cpu_freq)
+{
+struct efi_cpuinfo_loongson *c = g_cpuinfo;
+
+stl_le_p(>cputype, Loongson_3A);
+stl_le_p(>processor_id, MIPS_CPU(first_cpu)->env.CP0_PRid);
+if (cpu_freq > UINT_MAX) {
+stl_le_p(>cpu_clock_freq, UINT_MAX);
+} else {
+stl_le_p(>cpu_clock_freq, cpu_freq);
+}
+
+stw_le_p(>cpu_startup_core_id, 0);
+stl_le_p(>nr_cpus, current_machine->smp.cpus);
+stl_le_p(>total_node, (current_machine->smp.cpus + 3) / 4);
+
+return c;
+}
+
+static struct efi_memory_map_loongson *init_memory_map(void *g_map, uint64_t 
ram_size)
+{
+struct efi_memory_map_loongson *emap = g_map;
+
+stl_le_p(>nr_map, 2);
+stl_le_p(>mem_freq, 3);
+
+stl_le_p(>map[0].node_id, 0);
+stl_le_p(>map[0].mem_type, 1);
+stq_le_p(>map[0].mem_start, 0x0);
+stl_le_p(>map[0].mem_size, 240);
+
+stl_le_p(>map[1].node_id, 0);
+stl_le_p(>map[1].mem_type, 2);
+stq_le_p(>map[1].mem_start, 0x9000);
+stl_le_p(>map[1].mem_size, (ram_size / MiB) - 256);
+
+return emap;
+}
+
+static struct system_loongson *init_system_loongson(void *g_system)
+{
+struct system_loongson *s = g_system;
+
+stl_le_p(>ccnuma_smp, 0);
+stl_le_p(>sing_double_channel, 1);
+stl_le_p(>nr_uarts, 1);
+stl_le_p(>uarts[0].iotype, 2);
+stl_le_p(>uarts[0].int_offset, 2);
+stl_le_p(>uarts[0].uartclk, 2500); /* Random value */
+stq_le_p(>uarts[0].uart_base, virt_memmap[VIRT_UART].base);
+
+return s;
+}
+
+static struct irq_source_routing_table *init_irq_source(void *g_irq_source)
+{
+struct irq_source_routing_table *irq_info = g_irq_source;
+
+stl_le_p(_info->node_id, 0);
+stl_le_p(_info->PIC_type, 0);
+stw_le_p(_info->dma_mask_bits, 64);
+stq_le_p(_info->pci_mem_start_addr, virt_memmap[VIRT_PCIE_MMIO].base);
+stq_le_p(_info->pci_mem_end_addr, virt_memmap[VIRT_PCIE_MMIO].base +
+  virt_memmap[VIRT_PCIE_MMIO].size - 
1);
+stq_le_p(_info->pci_io_start_addr, virt_memmap[VIRT_PCIE_PIO].base);
+
+return irq_info;
+}
+
+static struct interface_info *init_interface_info(void *g_interface)
+{
+struct interface_info *interface = g_interface;
+
+stw_le_p(>vers, 0x01);
+strpadcpy(interface->description, 64, "UEFI_Version_v1.0", '\0');
+
+return interface;
+}
+
+static struct board_devices *board_devices_info(void *g_board)
+{
+struct board_devices *bd = g_board;
+
+strpadcpy(bd->name, 64, "Loongson-3A-VIRT-1w-V1.00-demo", '\0');
+
+return bd;
+}
+
+static struct loongson_special_attribute *init_special_info(void *g_special)
+{
+struct loongson_special_attribute *special = g_special;
+
+strpadcpy(special->special_name, 64, "2017-10-12", '\0');
+
+return special;
+}
+
+void init_loongson_params(struct loongson_params *lp, void *p,
+  uint64_t cpu_freq, uint64_t ram_size)
+{
+stq_le_p(>cpu_offset,
+  (uintptr_t)init_cpu_info(p, cpu_freq) - (uintptr_t)lp);
+p += ROUND_UP(sizeof(struct efi_cpuinfo_loongson), 64);
+
+stq_le_p(>memory_offset,
+  (uintptr_t)init_memory_map(p, ram_size) - (uintptr_t)lp);
+p += ROUND_UP(sizeof(struct 

[PATCH V14 7/8] hw/mips: Add Loongson-3 machine support

2020-10-16 Thread Huacai Chen
Add Loongson-3 based machine support, it use liointc as the interrupt
controler and use GPEX as the pci controller. Currently it can work with
both TCG and KVM.

As the machine model is not based on any exiting physical hardware, the
name of the machine is "loongson3-virt". It may be superseded in future
by a real machine model. If this happens, then a regular deprecation
procedure shall occur for "loongson3-virt" machine.

We now already have a full functional Linux kernel (based on Linux-5.4.x
LTS, the kvm host side and guest side have both been upstream for Linux-
5.9, but Linux-5.9 has not been released yet) here:

https://github.com/chenhuacai/linux

Of course the upstream kernel is also usable (though it is "unstable"
now):

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

How to use QEMU/Loongson-3?
1, Download kernel source from the above URL;
2, Build a kernel with arch/mips/configs/loongson3_defconfig;
3, Boot a Loongson-3A4000 host with this kernel (for KVM mode);
4, Build QEMU-master with this patchset;
5, modprobe kvm (only necessary for KVM mode);
6, Use QEMU with TCG:
   qemu-system-mips64el -M loongson3-virt,accel=tcg -cpu Loongson-3A1000 
-kernel  -append ...
   Use QEMU with KVM:
   qemu-system-mips64el -M loongson3-virt,accel=kvm -cpu Loongson-3A4000 
-kernel  -append ...

   The "-cpu" parameter is optional here and QEMU will use the correct type for 
TCG/KVM automatically.

Signed-off-by: Huacai Chen 
Co-developed-by: Jiaxun Yang 
---
 default-configs/devices/mips64el-softmmu.mak |   1 +
 hw/mips/Kconfig  |  12 +
 hw/mips/loongson3_virt.c | 615 +++
 hw/mips/meson.build  |   2 +-
 4 files changed, 629 insertions(+), 1 deletion(-)
 create mode 100644 hw/mips/loongson3_virt.c

diff --git a/default-configs/devices/mips64el-softmmu.mak 
b/default-configs/devices/mips64el-softmmu.mak
index 9f8a3ef156..26c660a05c 100644
--- a/default-configs/devices/mips64el-softmmu.mak
+++ b/default-configs/devices/mips64el-softmmu.mak
@@ -3,6 +3,7 @@
 include mips-softmmu-common.mak
 CONFIG_IDE_VIA=y
 CONFIG_FULOONG=y
+CONFIG_LOONGSON3V=y
 CONFIG_ATI_VGA=y
 CONFIG_RTL8139_PCI=y
 CONFIG_JAZZ=y
diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig
index 67d39c56a4..6562b346ab 100644
--- a/hw/mips/Kconfig
+++ b/hw/mips/Kconfig
@@ -45,6 +45,18 @@ config FULOONG
 bool
 select PCI_BONITO
 
+config LOONGSON3V
+bool
+select PCKBD
+select SERIAL
+select GOLDFISH_RTC
+select LOONGSON_LIOINTC
+select PCI_DEVICES
+select PCI_EXPRESS_GENERIC_BRIDGE
+select VIRTIO_VGA
+select QXL if SPICE
+select MSI_NONBROKEN
+
 config MIPS_CPS
 bool
 select PTIMER
diff --git a/hw/mips/loongson3_virt.c b/hw/mips/loongson3_virt.c
new file mode 100644
index 00..c298a16793
--- /dev/null
+++ b/hw/mips/loongson3_virt.c
@@ -0,0 +1,627 @@
+/*
+ * Generic Loongson-3 Platform support
+ *
+ * Copyright (c) 2017-2020 Huacai Chen (che...@lemote.com)
+ * Copyright (c) 2017-2020 Jiaxun Yang 
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see .
+ */
+
+/*
+ * Generic virtualized PC Platform based on Loongson-3 CPU (MIPS64R2 with
+ * extensions, 800~2000MHz)
+ */
+
+#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "qemu/units.h"
+#include "qemu/cutils.h"
+#include "qapi/error.h"
+#include "cpu.h"
+#include "elf.h"
+#include "kvm_mips.h"
+#include "hw/boards.h"
+#include "hw/char/serial.h"
+#include "hw/mips/mips.h"
+#include "hw/mips/cpudevs.h"
+#include "hw/mips/fw_cfg.h"
+#include "hw/mips/loongson3_bootp.h"
+#include "hw/misc/unimp.h"
+#include "hw/intc/i8259.h"
+#include "hw/loader.h"
+#include "hw/isa/superio.h"
+#include "hw/pci/msi.h"
+#include "hw/pci/pci.h"
+#include "hw/pci/pci_host.h"
+#include "hw/pci-host/gpex.h"
+#include "hw/rtc/mc146818rtc.h"
+#include "hw/usb.h"
+#include "net/net.h"
+#include "exec/address-spaces.h"
+#include "sysemu/kvm.h"
+#include "sysemu/qtest.h"
+#include "sysemu/reset.h"
+#include "sysemu/runstate.h"
+#include "qemu/log.h"
+#include "qemu/error-report.h"
+
+#define PM_CNTL_MODE  0x10
+
+#define LOONGSON_MAX_VCPUS  16
+
+/*
+ * Loongson-3's virtual machine BIOS can be obtained here:
+ * 1, https://github.com/loongson-community/firmware-nonfree
+ * 2, http://dev.lemote.com:8000/files/firmware/UEFI/KVM/bios_loongson3.bin
+ * 

[PATCH V14 2/8] target/mips: Add loongson-ext lswc2 group of instructions (Part 1)

2020-10-16 Thread Huacai Chen
From: Jiaxun Yang 

LWC2 & SWC2 have been rewritten by Loongson EXT vendor ASE
as "load/store quad word" and "shifted load/store" groups of
instructions.

This patch add implementation of these instructions:
gslq: load 16 bytes to GPR
gssq: store 16 bytes from GPR
gslqc1: load 16 bytes to FPR
gssqc1: store 16 bytes from FPR

Details of Loongson-EXT is here:
https://github.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md

Signed-off-by: Jiaxun Yang 
Signed-off-by: Huacai Chen 
---
 target/mips/translate.c | 86 +
 1 file changed, 86 insertions(+)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 398edf7289..20a7f36c7c 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -460,6 +460,17 @@ enum {
 R6_OPC_SCD = 0x27 | OPC_SPECIAL3,
 };
 
+/* Loongson EXT load/store quad word opcodes */
+#define MASK_LOONGSON_GSLSQ(op)   (MASK_OP_MAJOR(op) | (op & 0x8020))
+enum {
+OPC_GSLQ= 0x0020 | OPC_LWC2,
+OPC_GSLQC1  = 0x8020 | OPC_LWC2,
+OPC_GSSHFL  = OPC_LWC2,
+OPC_GSSQ= 0x0020 | OPC_SWC2,
+OPC_GSSQC1  = 0x8020 | OPC_SWC2,
+OPC_GSSHFS  = OPC_SWC2,
+};
+
 /* BSHFL opcodes */
 #define MASK_BSHFL(op)  (MASK_SPECIAL3(op) | (op & (0x1F << 6)))
 
@@ -5910,6 +5921,79 @@ no_rd:
 tcg_temp_free_i64(t1);
 }
 
+static void gen_loongson_lswc2(DisasContext *ctx, int rt,
+   int rs, int rd)
+{
+TCGv t0, t1, t2;
+TCGv_i32 fp0;
+#if defined(TARGET_MIPS64)
+int lsq_rt1 = ctx->opcode & 0x1f;
+int lsq_offset = sextract32(ctx->opcode, 6, 9) << 4;
+#endif
+
+t0 = tcg_temp_new();
+
+switch (MASK_LOONGSON_GSLSQ(ctx->opcode)) {
+#if defined(TARGET_MIPS64)
+case OPC_GSLQ:
+t1 = tcg_temp_new();
+gen_base_offset_addr(ctx, t0, rs, lsq_offset);
+tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, MO_TEQ |
+ctx->default_tcg_memop_mask);
+gen_base_offset_addr(ctx, t0, rs, lsq_offset + 8);
+tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx, MO_TEQ |
+ctx->default_tcg_memop_mask);
+gen_store_gpr(t1, rt);
+gen_store_gpr(t0, lsq_rt1);
+tcg_temp_free(t1);
+break;
+case OPC_GSLQC1:
+check_cp1_enabled(ctx);
+t1 = tcg_temp_new();
+gen_base_offset_addr(ctx, t0, rs, lsq_offset);
+tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, MO_TEQ |
+ctx->default_tcg_memop_mask);
+gen_base_offset_addr(ctx, t0, rs, lsq_offset + 8);
+tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx, MO_TEQ |
+ctx->default_tcg_memop_mask);
+gen_store_fpr64(ctx, t1, rt);
+gen_store_fpr64(ctx, t0, lsq_rt1);
+tcg_temp_free(t1);
+break;
+case OPC_GSSQ:
+t1 = tcg_temp_new();
+gen_base_offset_addr(ctx, t0, rs, lsq_offset);
+gen_load_gpr(t1, rt);
+tcg_gen_qemu_st_tl(t1, t0, ctx->mem_idx, MO_TEQ |
+ctx->default_tcg_memop_mask);
+gen_base_offset_addr(ctx, t0, rs, lsq_offset + 8);
+gen_load_gpr(t1, lsq_rt1);
+tcg_gen_qemu_st_tl(t1, t0, ctx->mem_idx, MO_TEQ |
+ctx->default_tcg_memop_mask);
+tcg_temp_free(t1);
+break;
+case OPC_GSSQC1:
+check_cp1_enabled(ctx);
+t1 = tcg_temp_new();
+gen_base_offset_addr(ctx, t0, rs, lsq_offset);
+gen_load_fpr64(ctx, t1, rt);
+tcg_gen_qemu_st_tl(t1, t0, ctx->mem_idx, MO_TEQ |
+ctx->default_tcg_memop_mask);
+gen_base_offset_addr(ctx, t0, rs, lsq_offset + 8);
+gen_load_fpr64(ctx, t1, lsq_rt1);
+tcg_gen_qemu_st_tl(t1, t0, ctx->mem_idx, MO_TEQ |
+ctx->default_tcg_memop_mask);
+tcg_temp_free(t1);
+break;
+#endif
+default:
+MIPS_INVAL("loongson_gslsq");
+generate_exception_end(ctx, EXCP_RI);
+break;
+}
+tcg_temp_free(t0);
+}
+
 /* Traps */
 static void gen_trap(DisasContext *ctx, uint32_t opc,
  int rs, int rt, int16_t imm)
@@ -30774,6 +30858,8 @@ static void decode_opc(CPUMIPSState *env, DisasContext 
*ctx)
 /* OPC_BC, OPC_BALC */
 gen_compute_compact_branch(ctx, op, 0, 0,
sextract32(ctx->opcode << 2, 0, 28));
+} else if (ctx->insn_flags & ASE_LEXT) {
+gen_loongson_lswc2(ctx, rt, rs, rd);
 } else {
 /* OPC_LWC2, OPC_SWC2 */
 /* COP2: Not implemented. */
-- 
2.17.2




Re: [PATCH v2 2/3] grackle: use qdev gpios for PCI IRQs

2020-10-16 Thread Mark Cave-Ayland

On 16/10/2020 07:45, Howard Spoelstra wrote:


Hi,

I see compilation of the current ppc-for-5.2 branch fail with:

../hw/pci-host/grackle.c: In function ‘grackle_realize’:
../hw/pci-host/grackle.c:68:11: error: ‘GrackleState’ has no member named ‘pic’
    68 |     if (!s->pic) {
       |           ^~
make: *** [Makefile.ninja:1741: libcommon.fa.p/hw_pci-host_grackle.c.o] Error 1

Best,
Howard


I see - as per the cover letter, my series is a replacement for Phil's original patch 
at https://lists.gnu.org/archive/html/qemu-devel/2020-10/msg02988.html (the PIC link 
is now completely removed), so the solution here is to drop patch 7daac97 
"hw/pci-host/grackle: Verify PIC link is properly set".



ATB,

Mark.



[PATCH V14 0/8] mips: Add Loongson-3 machine support

2020-10-16 Thread Huacai Chen
Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while
Loongson-3A R4 is the newest and its ISA is almost the superset of all
others. To reduce complexity, in QEMU we just define two CPU types:

1, "Loongson-3A1000" CPU which is corresponding to Loongson-3A R1. It is
   suitable for TCG because Loongson-3A R1 has fewest ASE.
2, "Loongson-3A4000" CPU which is corresponding to Loongson-3A R4. It is
   suitable for KVM because Loongson-3A R4 has the VZ ASE.

Loongson-3 lacks English documents. I've tried to translated them with
translate.google.com, and the machine translated documents (together
with their original Chinese versions) are available here.

Loongson-3A R1 (Loongson-3A1000)
User Manual Part 1:
http://ftp.godson.ac.cn/lemote/3A1000_p1.pdf
http://ftp.godson.ac.cn/lemote/Loongson3A1000_processor_user_manual_P1.pdf 
(Chinese Version)
User Manual Part 2:
http://ftp.godson.ac.cn/lemote/3A1000_p2.pdf
http://ftp.godson.ac.cn/lemote/Loongson3A1000_processor_user_manual_P2.pdf 
(Chinese Version)

Loongson-3A R2 (Loongson-3A2000)
User Manual Part 1:
http://ftp.godson.ac.cn/lemote/3A2000_p1.pdf
http://ftp.godson.ac.cn/lemote/Loongson3A2000_user1.pdf (Chinese Version)
User Manual Part 2:
http://ftp.godson.ac.cn/lemote/3A2000_p2.pdf
http://ftp.godson.ac.cn/lemote/Loongson3A2000_user2.pdf (Chinese Version)

Loongson-3A R3 (Loongson-3A3000)
User Manual Part 1:
http://ftp.godson.ac.cn/lemote/3A3000_p1.pdf
http://ftp.godson.ac.cn/lemote/Loongson3A3000_3B3000usermanual1.pdf (Chinese 
Version)
User Manual Part 2:
http://ftp.godson.ac.cn/lemote/3A3000_p2.pdf
http://ftp.godson.ac.cn/lemote/Loongson3A3000_3B3000usermanual2.pdf (Chinese 
Version)

Loongson-3A R4 (Loongson-3A4000)
User Manual Part 1:
http://ftp.godson.ac.cn/lemote/3A4000_p1.pdf
http://ftp.godson.ac.cn/lemote/3A4000user.pdf (Chinese Version)
User Manual Part 2:
I'm sorry that it is unavailable now.

And human-translated documents (W.I.P) are available here now:
https://github.com/loongson-community/docs/tree/master/English-translation-of-Loongson-manual

Both KVM and TCG are available now!

We now already have a full functional Linux kernel (based on Linux-5.4.x
LTS, the kvm host side and guest side have both been upstream for Linux-
5.9, but Linux-5.9 has not been released yet) here:

https://github.com/chenhuacai/linux

Of course the upstream kernel is also usable (though it is "unstable"
now):

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

How to use QEMU/Loongson-3?
1, Download kernel source from the above URL;
2, Build a kernel with arch/mips/configs/loongson3_{def,hpc}config;
3, Boot a Loongson-3A4000 host with this kernel (for KVM mode);
4, Build QEMU-master with this patchset;
5, modprobe kvm (only necessary for KVM mode);
6, Use QEMU with TCG:
   qemu-system-mips64el -M loongson3-virt,accel=tcg -cpu Loongson-3A1000 
-kernel  -append ...
   Use QEMU with KVM:
   qemu-system-mips64el -M loongson3-virt,accel=kvm -cpu Loongson-3A4000 
-kernel  -append ...

   The "-cpu" parameter is optional here and QEMU will use the correct type for 
TCG/KVM automatically.

V1 -> V2:
1, Add a cover letter;
2, Improve CPU definitions;
3, Remove LS7A-related things (Use GPEX instead);
4, Add a description of how to run QEMU/Loongson-3.

V2 -> V3:
1, Fix all possible checkpatch.pl errors and warnings.

V3 -> V4:
1, Sync code with upstream;
2, Remove merged patches;
3, Fix build failure without CONFIG_KVM;
4, Add Reviewed-by: Aleksandar Markovic .

V4 -> V5:
1, Improve coding style;
2, Remove merged patches;
3, Rename machine name from "loongson3" to "loongson3-virt";
4, Rework the "loongson3-virt" machine to drop any ISA things;
5, Rework "hw/mips: Implement the kvm_type() hook in MachineClass";
6, Add Jiaxun Yang as a reviewer of Loongson-3.

V5 -> V6:
1, Fix license preamble;
2, Improve commit messages;
3, Add hw/intc/loongson_liointc.c to MAINTAINERS;
4, Fix all possible checkpatch.pl errors and warnings.

V7 and V8 have only one patch (machine definition) with some minor improvements.

V8 -> V9:
1, Update KVM type definition from kernel;
2, Fix PageMask with variable page size for TCG;
3, Add TCG support (add Loongson-EXT instructions).

V9 -> V10:
1, Split fw_cfg to a separate patch;
2, Split boot parameters definition to a local header;
3, Update MIPS machine documentation;
4, Many other improvements suggested by Philippe Mathieu-Daudé.

V10 -> V11:
1, Fix some typos;
2, Add Reviewed-by: Philippe Mathieu-Daudé .

V11 -> V12:
1, Split boot parameter helpers to loongson3_bootp.c;
2, Support both BE and LE host (Loongson guests are always LE).

V12 -> V13:
1, Sync code with upstream;
2, Re-enable KVM support for MIPS in meson;

V13 -> V14:
1, Remove merged patches;
2, Split boot parameter helpers to a separate patch;
4, Many other improvements suggested by Philippe Mathieu-Daudé.

Huacai Chen and Jiaxun Yang (8):
 target/mips: Fix PageMask with 

[PATCH V14 1/8] target/mips: Fix PageMask with variable page size

2020-10-16 Thread Huacai Chen
From: Jiaxun Yang 

Our current code assumed the target page size is always 4k
when handling PageMask and VPN2, however, variable page size
was just added to mips target and that's no longer true.

Fixes: ee3863b9d414 ("target/mips: Support variable page size")
Signed-off-by: Jiaxun Yang 
Signed-off-by: Huacai Chen 
---
 target/mips/cp0_helper.c | 36 +---
 target/mips/cpu.h|  1 +
 2 files changed, 30 insertions(+), 7 deletions(-)

diff --git a/target/mips/cp0_helper.c b/target/mips/cp0_helper.c
index de64add038..f3478d826b 100644
--- a/target/mips/cp0_helper.c
+++ b/target/mips/cp0_helper.c
@@ -867,13 +867,35 @@ void helper_mtc0_memorymapid(CPUMIPSState *env, 
target_ulong arg1)
 
 void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask)
 {
-uint64_t mask = arg1 >> (TARGET_PAGE_BITS + 1);
-if (!(env->insn_flags & ISA_MIPS32R6) || (arg1 == ~0) ||
-(mask == 0x || mask == 0x0003 || mask == 0x000F ||
- mask == 0x003F || mask == 0x00FF || mask == 0x03FF ||
- mask == 0x0FFF || mask == 0x3FFF || mask == 0x)) {
-env->CP0_PageMask = arg1 & (0x1FFF & (TARGET_PAGE_MASK << 1));
+unsigned long mask;
+int maskbits;
+
+if (env->insn_flags & ISA_MIPS32R6) {
+return;
+}
+/* Don't care MASKX as we don't support 1KB page */
+mask = extract32((uint32_t)arg1, CP0PM_MASK, 16);
+maskbits = find_first_zero_bit(, 32);
+
+/* Ensure no more set bit after first zero */
+if (mask >> maskbits) {
+goto invalid;
+}
+/* We don't support VTLB entry smaller than target page */
+if ((maskbits + 12) < TARGET_PAGE_BITS) {
+goto invalid;
 }
+env->CP0_PageMask = mask << CP0PM_MASK;
+
+return;
+
+invalid:
+/*
+ * When invalid, ensure the value is bigger than or equal to
+ * the minimal but smaller than or equal to the maxium.
+ */
+maskbits = MIN(16, MAX(maskbits, TARGET_PAGE_BITS - 12));
+env->CP0_PageMask = ((1 << (16 + 1)) - 1) << CP0PM_MASK;
 }
 
 void helper_mtc0_pagemask(CPUMIPSState *env, target_ulong arg1)
@@ -1104,7 +1126,7 @@ void helper_mthc0_saar(CPUMIPSState *env, target_ulong 
arg1)
 void helper_mtc0_entryhi(CPUMIPSState *env, target_ulong arg1)
 {
 target_ulong old, val, mask;
-mask = (TARGET_PAGE_MASK << 1) | env->CP0_EntryHi_ASID_mask;
+mask = ~((1 << 14) - 1) | env->CP0_EntryHi_ASID_mask;
 if (((env->CP0_Config4 >> CP0C4_IE) & 0x3) >= 2) {
 mask |= 1 << CP0EnHi_EHINV;
 }
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 7cf7f5239f..9c8bb23807 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -618,6 +618,7 @@ struct CPUMIPSState {
  * CP0 Register 5
  */
 int32_t CP0_PageMask;
+#define CP0PM_MASK 13
 int32_t CP0_PageGrain_rw_bitmask;
 int32_t CP0_PageGrain;
 #define CP0PG_RIE 31
-- 
2.17.2




Re: [PULL 07/37] cpus: extract out hax-specific code to target/i386/

2020-10-16 Thread Volker Rümelin
> From: Claudio Fontana 
>
> register a "CpusAccel" interface for HAX as well.
>

> diff --git a/softmmu/cpus.c b/softmmu/cpus.c
> index 9fa73735a2..900fff827a 100644
> --- a/softmmu/cpus.c
> +++ b/softmmu/cpus.c
> @@ -416,35 +403,6 @@ void qemu_wait_io_event(CPUState *cpu)
>  qemu_wait_io_event_common(cpu);
>  }
>  
> -static void *qemu_hax_cpu_thread_fn(void *arg)
> -{
> -CPUState *cpu = arg;
> -int r;
> -
> -rcu_register_thread();
> -qemu_mutex_lock_iothread();
> -qemu_thread_get_self(cpu->thread);
> -
> -cpu->thread_id = qemu_get_thread_id();
> -current_cpu = cpu;

Hi Claudio,

is there a reason why you removed current_cpu = cpu; from hax_cpu_thread_fn() 
when you moved that function to target/i386/hax-cpus.c? This change broke HAX 
on Windows. Adding back that line makes it work again.

The simplest reproducer is:
$ ./qemu-system-x86_64.exe -machine pc,accel=hax -smp 2 -display gtk
HAX is working and emulator runs in fast virt mode.

Then the QEMU window opens and shows 'Guest has not initialized the display 
(yet).' forever.

A look at the Windows Task Manager suggests one thread is busy looping.

With best regards,
Volker

> -hax_init_vcpu(cpu);
> -cpu_thread_signal_created(cpu);
> -qemu_guest_random_seed_thread_part2(cpu->random_seed);
> -
> -do {
> -if (cpu_can_run(cpu)) {
> -r = hax_smp_cpu_exec(cpu);
> -if (r == EXCP_DEBUG) {
> -cpu_handle_guest_debug(cpu);
> -}
> -}
> -
> -qemu_wait_io_event(cpu);
> -} while (!cpu->unplug || cpu_can_run(cpu));
> -rcu_unregister_thread();
> -return NULL;
> -}
> -
>  /* The HVF-specific vCPU thread function. This one should only run when the 
> host
>   * CPU supports the VMX "unrestricted guest" feature. */
>  static void *qemu_hvf_cpu_thread_fn(void *arg)
>



Re: [PATCH v2 2/3] grackle: use qdev gpios for PCI IRQs

2020-10-16 Thread Howard Spoelstra
On Fri, Oct 16, 2020 at 2:30 AM David Gibson 
wrote:

> On Tue, Oct 13, 2020 at 12:49:21PM +0100, Mark Cave-Ayland wrote:
> > Currently an object link property is used to pass a reference to the
> Heathrow
> > PIC into the PCI host bridge so that grackle_init_irqs() can connect the
> PCI
> > IRQs to the PIC itself.
> >
> > This can be simplified by defining the PCI IRQs as qdev gpios and then
> wiring
> > up the PCI IRQs to the PIC in the Old World machine init function.
> >
> > Signed-off-by: Mark Cave-Ayland 
>
> Applied to ppc-for-5.2.
>
> > ---
> >  hw/pci-host/grackle.c | 19 ++-
> >  hw/ppc/mac_oldworld.c |  7 +--
> >  2 files changed, 7 insertions(+), 19 deletions(-)
> >
> > diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c
> > index 57c29b20af..b05facf463 100644
> > --- a/hw/pci-host/grackle.c
> > +++ b/hw/pci-host/grackle.c
> > @@ -28,7 +28,6 @@
> >  #include "hw/ppc/mac.h"
> >  #include "hw/qdev-properties.h"
> >  #include "hw/pci/pci.h"
> > -#include "hw/intc/heathrow_pic.h"
> >  #include "hw/irq.h"
> >  #include "qapi/error.h"
> >  #include "qemu/module.h"
> > @@ -41,7 +40,6 @@ struct GrackleState {
> >  PCIHostState parent_obj;
> >
> >  uint32_t ofw_addr;
> > -HeathrowState *pic;
> >  qemu_irq irqs[4];
> >  MemoryRegion pci_mmio;
> >  MemoryRegion pci_hole;
> > @@ -62,15 +60,6 @@ static void pci_grackle_set_irq(void *opaque, int
> irq_num, int level)
> >  qemu_set_irq(s->irqs[irq_num], level);
> >  }
> >
> > -static void grackle_init_irqs(GrackleState *s)
> > -{
> > -int i;
> > -
> > -for (i = 0; i < ARRAY_SIZE(s->irqs); i++) {
> > -s->irqs[i] = qdev_get_gpio_in(DEVICE(s->pic), 0x15 + i);
> > -}
> > -}
> > -
> >  static void grackle_realize(DeviceState *dev, Error **errp)
> >  {
> >  GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(dev);
> > @@ -85,7 +74,6 @@ static void grackle_realize(DeviceState *dev, Error
> **errp)
> >   0, 4, TYPE_PCI_BUS);
> >
> >  pci_create_simple(phb->bus, 0, "grackle");
> > -grackle_init_irqs(s);
> >  }
> >
> >  static void grackle_init(Object *obj)
> > @@ -106,15 +94,12 @@ static void grackle_init(Object *obj)
> >  memory_region_init_io(>data_mem, obj, _host_data_le_ops,
> >DEVICE(obj), "pci-data-idx", 0x1000);
> >
> > -object_property_add_link(obj, "pic", TYPE_HEATHROW,
> > - (Object **) >pic,
> > - qdev_prop_allow_set_link_before_realize,
> > - 0);
> > -
> >  sysbus_init_mmio(sbd, >conf_mem);
> >  sysbus_init_mmio(sbd, >data_mem);
> >  sysbus_init_mmio(sbd, >pci_hole);
> >  sysbus_init_mmio(sbd, >pci_io);
> > +
> > +qdev_init_gpio_out(DEVICE(obj), s->irqs, ARRAY_SIZE(s->irqs));
> >  }
> >
> >  static void grackle_pci_realize(PCIDevice *d, Error **errp)
> > diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
> > index d6a76d06dc..05e46ee6fe 100644
> > --- a/hw/ppc/mac_oldworld.c
> > +++ b/hw/ppc/mac_oldworld.c
> > @@ -253,10 +253,9 @@ static void ppc_heathrow_init(MachineState *machine)
> >  /* Grackle PCI host bridge */
> >  dev = qdev_new(TYPE_GRACKLE_PCI_HOST_BRIDGE);
> >  qdev_prop_set_uint32(dev, "ofw-addr", 0x8000);
> > -object_property_set_link(OBJECT(dev), "pic", OBJECT(pic_dev),
> > - _abort);
> >  s = SYS_BUS_DEVICE(dev);
> >  sysbus_realize_and_unref(s, _fatal);
> > +
> >  sysbus_mmio_map(s, 0, GRACKLE_BASE);
> >  sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x20);
> >  /* PCI hole */
> > @@ -266,6 +265,10 @@ static void ppc_heathrow_init(MachineState *machine)
> >  memory_region_add_subregion(get_system_memory(), 0xfe00,
> >  sysbus_mmio_get_region(s, 3));
> >
> > +for (i = 0; i < 4; i++) {
> > +qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(pic_dev, 0x15 +
> i));
> > +}
> > +
> >  pci_bus = PCI_HOST_BRIDGE(dev)->bus;
> >
> >  pci_vga_init(pci_bus);
>
>
> Hi,

I see compilation of the current ppc-for-5.2 branch fail with:

../hw/pci-host/grackle.c: In function ‘grackle_realize’:
../hw/pci-host/grackle.c:68:11: error: ‘GrackleState’ has no member named
‘pic’
   68 | if (!s->pic) {
  |   ^~
make: *** [Makefile.ninja:1741: libcommon.fa.p/hw_pci-host_grackle.c.o]
Error 1

Best,
Howard


[Bug 1856834] Re: PCI broken in qemu ppc e500 in v2.12.0 and other versions

2020-10-16 Thread Andrej Krutak
Not even reverting the patch worked for me, and it's still broken on
qemu 5.1.

For example:

~/OSS/qemu/ppc-softmmu/qemu-system-ppc -machine mpc8544ds -nographic
-cpu e500mc -serial mon:stdio -kernel zImage -initrd rootfs.ird -append
'console=ttyS0,115200' -device e1000,netdev=main -netdev
hubport,hubid=0,id=main -net tap,ifname=tap0 -device virtio-balloon-pci
-device virtio-rng-pci  -device virtio-blk-pci-transitional,drive=drive0
-drive file=disk,if=none,id=drive0,format=raw

causes the linux kernel to freeze after probing the virtio_blk device:

virtio_rng: probe of virtio1 failed with error -22
virtio_blk virtio2: [vda] 131072 512-byte logical blocks (67.1 MB/64.0 MiB)

Not specifying the virtio-blk-pci device makes the system boot, but
still all but the first (e1000) PCI devices seem to not probe.

It seems I can trace this behavior at least to version 2.4.1, probably
even sooner (can't make my linux boot on those, so I'm unsure...).

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1856834

Title:
  PCI broken in qemu ppc e500 in v2.12.0 and other versions

Status in QEMU:
  New

Bug description:
  The same qemu -M mpc... command that works on qemu-system-ppc version
  2.8.0 freezes guest on bootup and shows error for qemu-system-ppc
  version 4.2.0release and 4.19dirtygit:

  qemu-system-ppc: virtio-blk failed to set guest notifier (-24), ensure -accel 
kvm is set.
  qemu-system-ppc: virtio_bus_start_ioeventfd: failed. Fallback to userspace 
(slower).

  ends/freezes at:
  nbd: registered device at major 43
   vda:

  I'm using -drive file=/home/me/rawimage.dd,if=virtio and works fine in
  version 2.8.0 installed with apt-get install (Ubuntu 17.04) and also
  with 2.8.0 official release from git/github that I compiled/built
  myself. But both of the newer releases fail on the same exact machine
  same config.

  I also noticed that qemu-2.8.0 was fine with mtd but the newer ones I tried 
weren't, ie gave
  qemu-system-ppc: -drive if=mtd: machine type does not support 
if=mtd,bus=0,unit=0
  (but I removed -drive if=mtd since wasn't using it anyway)

  I also tried on windows but I think virtio doesn't work on windows
  hosts at all? On windows host it fails the same way, even version 2.12
  as well as 4.1.10...

  used:
  ./configure --prefix=/opt/... --enable-fdt --enable-kvm --enable-debug

  (basically all steps the same on same exact system same config, yet
  2.8.0 works fine whether apt-get installed or built from source while
  the others I built, 4.19/4.2.0 or 2.12/4.1.10(win) don't.)

  In case newer qemu versions act weird on various kernels, I did try with both 
vmlinuz-4.10.0-19-generic and vmlinuz-4.13.12-041312-generic (I didn't compile 
them but I can provide config-..files. This is on Ubuntu 17.04 x86_64 host 
emulating e500v2 cpm guest, ie -M mpc... GUEST kernel 2.6.32.44 which is why I 
can't use -M ppce500 instead..)
  tx
   ecs

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[PATCH V2 10/10] net/colo-compare.c: Increase default queued packet scan frequency

2020-10-16 Thread Zhang Chen
From: Zhang Chen 

In my test, use this default parameter looks better.

Signed-off-by: Zhang Chen 
---
 net/colo-compare.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/colo-compare.c b/net/colo-compare.c
index 0c87fd9e33..337025b44f 100644
--- a/net/colo-compare.c
+++ b/net/colo-compare.c
@@ -52,7 +52,7 @@ static NotifierList colo_compare_notifiers =
 #define COLO_COMPARE_FREE_PRIMARY 0x01
 #define COLO_COMPARE_FREE_SECONDARY   0x02
 
-#define REGULAR_PACKET_CHECK_MS 3000
+#define REGULAR_PACKET_CHECK_MS 1000
 #define DEFAULT_TIME_OUT_MS 3000
 
 /* #define DEBUG_COLO_PACKETS */
-- 
2.17.1




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