Re: [PATCH-for-5.0 04/12] hw/arm/stm32fx05_soc: Add missing error-propagation code
On Wed, 25 Mar 2020 at 19:18, Philippe Mathieu-Daudé wrote: > > Patch created mechanically by running: > > $ spatch \ > --macro-file scripts/cocci-macro-file.h --include-headers \ > --sp-file > scripts/coccinelle/object_property_missing_error_propagate.cocci \ > --keep-comments --smpl-spacing --in-place --dir hw > > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/arm/stm32f205_soc.c | 4 > hw/arm/stm32f405_soc.c | 4 > 2 files changed, 8 insertions(+) Reviewed-by: Peter Maydell thanks -- PMM
Re: [PATCH-for-5.0 04/12] hw/arm/stm32fx05_soc: Add missing error-propagation code
On Wed, Mar 25, 2020 at 12:22 PM Philippe Mathieu-Daudé wrote:
>
> Patch created mechanically by running:
>
> $ spatch \
> --macro-file scripts/cocci-macro-file.h --include-headers \
> --sp-file
> scripts/coccinelle/object_property_missing_error_propagate.cocci \
> --keep-comments --smpl-spacing --in-place --dir hw
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Alistair
> ---
> hw/arm/stm32f205_soc.c | 4
> hw/arm/stm32f405_soc.c | 4
> 2 files changed, 8 insertions(+)
>
> diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
> index 118c342559..1d80f91dd7 100644
> --- a/hw/arm/stm32f205_soc.c
> +++ b/hw/arm/stm32f205_soc.c
> @@ -83,113 +83,117 @@ static void stm32f205_soc_initfn(Object *obj)
> static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
> {
> STM32F205State *s = STM32F205_SOC(dev_soc);
> DeviceState *dev, *armv7m;
> SysBusDevice *busdev;
> Error *err = NULL;
> int i;
>
> MemoryRegion *system_memory = get_system_memory();
> MemoryRegion *sram = g_new(MemoryRegion, 1);
> MemoryRegion *flash = g_new(MemoryRegion, 1);
> MemoryRegion *flash_alias = g_new(MemoryRegion, 1);
>
> memory_region_init_rom(flash, OBJECT(dev_soc), "STM32F205.flash",
> FLASH_SIZE, _fatal);
> memory_region_init_alias(flash_alias, OBJECT(dev_soc),
> "STM32F205.flash.alias", flash, 0, FLASH_SIZE);
>
> memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, flash);
> memory_region_add_subregion(system_memory, 0, flash_alias);
>
> memory_region_init_ram(sram, NULL, "STM32F205.sram", SRAM_SIZE,
> _fatal);
> memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram);
>
> armv7m = DEVICE(>armv7m);
> qdev_prop_set_uint32(armv7m, "num-irq", 96);
> qdev_prop_set_string(armv7m, "cpu-type", s->cpu_type);
> qdev_prop_set_bit(armv7m, "enable-bitband", true);
> object_property_set_link(OBJECT(>armv7m), OBJECT(get_system_memory()),
> "memory", _abort);
> object_property_set_bool(OBJECT(>armv7m), true, "realized", );
> if (err != NULL) {
> error_propagate(errp, err);
> return;
> }
>
> /* System configuration controller */
> dev = DEVICE(>syscfg);
> object_property_set_bool(OBJECT(>syscfg), true, "realized", );
> if (err != NULL) {
> error_propagate(errp, err);
> return;
> }
> busdev = SYS_BUS_DEVICE(dev);
> sysbus_mmio_map(busdev, 0, 0x40013800);
> sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, 71));
>
> /* Attach UART (uses USART registers) and USART controllers */
> for (i = 0; i < STM_NUM_USARTS; i++) {
> dev = DEVICE(&(s->usart[i]));
> qdev_prop_set_chr(dev, "chardev", serial_hd(i));
> object_property_set_bool(OBJECT(>usart[i]), true, "realized",
> );
> if (err != NULL) {
> error_propagate(errp, err);
> return;
> }
> busdev = SYS_BUS_DEVICE(dev);
> sysbus_mmio_map(busdev, 0, usart_addr[i]);
> sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m,
> usart_irq[i]));
> }
>
> /* Timer 2 to 5 */
> for (i = 0; i < STM_NUM_TIMERS; i++) {
> dev = DEVICE(&(s->timer[i]));
> qdev_prop_set_uint64(dev, "clock-frequency", 10);
> object_property_set_bool(OBJECT(>timer[i]), true, "realized",
> );
> if (err != NULL) {
> error_propagate(errp, err);
> return;
> }
> busdev = SYS_BUS_DEVICE(dev);
> sysbus_mmio_map(busdev, 0, timer_addr[i]);
> sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m,
> timer_irq[i]));
> }
>
> /* ADC 1 to 3 */
> object_property_set_int(OBJECT(s->adc_irqs), STM_NUM_ADCS,
> "num-lines", );
> +if (err) {
> +error_propagate(errp, err);
> +return;
> +}
> object_property_set_bool(OBJECT(s->adc_irqs), true, "realized", );
> if (err != NULL) {
> error_propagate(errp, err);
> return;
> }
> qdev_connect_gpio_out(DEVICE(s->adc_irqs), 0,
>qdev_get_gpio_in(armv7m, ADC_IRQ));
>
> for (i = 0; i < STM_NUM_ADCS; i++) {
> dev = DEVICE(&(s->adc[i]));
> object_property_set_bool(OBJECT(>adc[i]), true, "realized", );
> if (err != NULL) {
> error_propagate(errp, err);
> return;
> }
> busdev = SYS_BUS_DEVICE(dev);
> sysbus_mmio_map(busdev, 0, adc_addr[i]);
> sysbus_connect_irq(busdev, 0,
> qdev_get_gpio_in(DEVICE(s->adc_irqs), i));
> }
>
> /* SPI 1 and 2 */
> for (i = 0; i < STM_NUM_SPIS; i++) {
> dev = DEVICE(&(s->spi[i]));
>
[PATCH-for-5.0 04/12] hw/arm/stm32fx05_soc: Add missing error-propagation code
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/object_property_missing_error_propagate.cocci \
--keep-comments --smpl-spacing --in-place --dir hw
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/stm32f205_soc.c | 4
hw/arm/stm32f405_soc.c | 4
2 files changed, 8 insertions(+)
diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
index 118c342559..1d80f91dd7 100644
--- a/hw/arm/stm32f205_soc.c
+++ b/hw/arm/stm32f205_soc.c
@@ -83,113 +83,117 @@ static void stm32f205_soc_initfn(Object *obj)
static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
{
STM32F205State *s = STM32F205_SOC(dev_soc);
DeviceState *dev, *armv7m;
SysBusDevice *busdev;
Error *err = NULL;
int i;
MemoryRegion *system_memory = get_system_memory();
MemoryRegion *sram = g_new(MemoryRegion, 1);
MemoryRegion *flash = g_new(MemoryRegion, 1);
MemoryRegion *flash_alias = g_new(MemoryRegion, 1);
memory_region_init_rom(flash, OBJECT(dev_soc), "STM32F205.flash",
FLASH_SIZE, _fatal);
memory_region_init_alias(flash_alias, OBJECT(dev_soc),
"STM32F205.flash.alias", flash, 0, FLASH_SIZE);
memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, flash);
memory_region_add_subregion(system_memory, 0, flash_alias);
memory_region_init_ram(sram, NULL, "STM32F205.sram", SRAM_SIZE,
_fatal);
memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram);
armv7m = DEVICE(>armv7m);
qdev_prop_set_uint32(armv7m, "num-irq", 96);
qdev_prop_set_string(armv7m, "cpu-type", s->cpu_type);
qdev_prop_set_bit(armv7m, "enable-bitband", true);
object_property_set_link(OBJECT(>armv7m), OBJECT(get_system_memory()),
"memory", _abort);
object_property_set_bool(OBJECT(>armv7m), true, "realized", );
if (err != NULL) {
error_propagate(errp, err);
return;
}
/* System configuration controller */
dev = DEVICE(>syscfg);
object_property_set_bool(OBJECT(>syscfg), true, "realized", );
if (err != NULL) {
error_propagate(errp, err);
return;
}
busdev = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(busdev, 0, 0x40013800);
sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, 71));
/* Attach UART (uses USART registers) and USART controllers */
for (i = 0; i < STM_NUM_USARTS; i++) {
dev = DEVICE(&(s->usart[i]));
qdev_prop_set_chr(dev, "chardev", serial_hd(i));
object_property_set_bool(OBJECT(>usart[i]), true, "realized", );
if (err != NULL) {
error_propagate(errp, err);
return;
}
busdev = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(busdev, 0, usart_addr[i]);
sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, usart_irq[i]));
}
/* Timer 2 to 5 */
for (i = 0; i < STM_NUM_TIMERS; i++) {
dev = DEVICE(&(s->timer[i]));
qdev_prop_set_uint64(dev, "clock-frequency", 10);
object_property_set_bool(OBJECT(>timer[i]), true, "realized", );
if (err != NULL) {
error_propagate(errp, err);
return;
}
busdev = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(busdev, 0, timer_addr[i]);
sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, timer_irq[i]));
}
/* ADC 1 to 3 */
object_property_set_int(OBJECT(s->adc_irqs), STM_NUM_ADCS,
"num-lines", );
+if (err) {
+error_propagate(errp, err);
+return;
+}
object_property_set_bool(OBJECT(s->adc_irqs), true, "realized", );
if (err != NULL) {
error_propagate(errp, err);
return;
}
qdev_connect_gpio_out(DEVICE(s->adc_irqs), 0,
qdev_get_gpio_in(armv7m, ADC_IRQ));
for (i = 0; i < STM_NUM_ADCS; i++) {
dev = DEVICE(&(s->adc[i]));
object_property_set_bool(OBJECT(>adc[i]), true, "realized", );
if (err != NULL) {
error_propagate(errp, err);
return;
}
busdev = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(busdev, 0, adc_addr[i]);
sysbus_connect_irq(busdev, 0,
qdev_get_gpio_in(DEVICE(s->adc_irqs), i));
}
/* SPI 1 and 2 */
for (i = 0; i < STM_NUM_SPIS; i++) {
dev = DEVICE(&(s->spi[i]));
object_property_set_bool(OBJECT(>spi[i]), true, "realized", );
if (err != NULL) {
error_propagate(errp, err);
return;
}
busdev = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(busdev, 0, spi_addr[i]);
sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, spi_irq[i]));
}
}
diff --git
