Re: [PATCH 8/9] target/arm: Enable FPSCR.QC bit for MVE

[Peter Maydell]

On Mon, 24 May 2021 at 17:59, Richard Henderson
 wrote:
>
> On 5/20/21 8:28 AM, Peter Maydell wrote:
> > MVE has an FPSCR.QC bit similar to the A-profile Neon one;
> > when MVE is implemented make the bit writeable.
> >
> > Signed-off-by: Peter Maydell
> > ---
> >   target/arm/vfp_helper.c | 3 ++-
> >   1 file changed, 2 insertions(+), 1 deletion(-)
>
> Reviewed-by: Richard Henderson 

There's a followon bit to this patch which I didn't notice
at first, which is that the handling of ARM_VFP_FPSCR_NZCVQC
in the "fp_sysreg" code also needs to be updated to read/write
the QC bit (currently it has TODO comments about this.)
Given that this patch is currently a one-liner I think I'll
just respin it as a single patch with all the accesses to QC fixed.

thanks
-- PMM

Re: [PATCH 8/9] target/arm: Enable FPSCR.QC bit for MVE

[Richard Henderson]

On 5/20/21 8:28 AM, Peter Maydell wrote:

MVE has an FPSCR.QC bit similar to the A-profile Neon one;
when MVE is implemented make the bit writeable.

Signed-off-by: Peter Maydell
---
  target/arm/vfp_helper.c | 3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)


Reviewed-by: Richard Henderson 

r~

[PATCH 8/9] target/arm: Enable FPSCR.QC bit for MVE

[Peter Maydell]

MVE has an FPSCR.QC bit similar to the A-profile Neon one;
when MVE is implemented make the bit writeable.

Signed-off-by: Peter Maydell 
---
 target/arm/vfp_helper.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c
index e0886ab5a56..11e1e087e81 100644
--- a/target/arm/vfp_helper.c
+++ b/target/arm/vfp_helper.c
@@ -220,7 +220,8 @@ void HELPER(vfp_set_fpscr)(CPUARMState *env, uint32_t val)
  FPCR_LTPSIZE_LENGTH);
 }
 
-if (arm_feature(env, ARM_FEATURE_NEON)) {
+if (arm_feature(env, ARM_FEATURE_NEON) ||
+cpu_isar_feature(aa32_mve, cpu)) {
 /*
  * The bit we set within fpscr_q is arbitrary; the register as a
  * whole being zero/non-zero is what counts.
-- 
2.20.1