Re: [Qemu-devel] [PATCH for-2.5 01/30] m68k: define m680x0 CPUs and features

[Laurent Vivier]

Le 12/08/2015 01:13, Richard Henderson a écrit :
 On 08/09/2015 01:13 PM, Laurent Vivier wrote:
  INSN(undef, , , CF_ISA_A);
 +INSN(undef, , , M68000);
  INSN(arith_im,  0080, fff8, CF_ISA_A);
 +INSN(arith_im,  , ff00, M68000);
 +INSN(undef, 00c0, ffc0, M68000);
  INSN(bitrev,00c0, fff8, CF_ISA_APLUSC);
  INSN(bitop_reg, 0100, f1c0, CF_ISA_A);
 +INSN(bitop_reg, 0100, f1c0, M68000);
  INSN(bitop_reg, 0140, f1c0, CF_ISA_A);
 +INSN(bitop_reg, 0140, f1c0, M68000);
 
 There's a *lot* of repetition in here.
 
 Can we also introduce a BASE() macro that's like INSN() except that it doesn't
 bother checking m68k_feature?  That way if both CF_ISA_A and M68000 are set, 
 we
 don't have to duplicate the entry.

Thank you, good idea.

Laurent

Re: [Qemu-devel] [PATCH for-2.5 01/30] m68k: define m680x0 CPUs and features

[Richard Henderson]

On 08/09/2015 01:13 PM, Laurent Vivier wrote:
  INSN(undef, , , CF_ISA_A);
 +INSN(undef, , , M68000);
  INSN(arith_im,  0080, fff8, CF_ISA_A);
 +INSN(arith_im,  , ff00, M68000);
 +INSN(undef, 00c0, ffc0, M68000);
  INSN(bitrev,00c0, fff8, CF_ISA_APLUSC);
  INSN(bitop_reg, 0100, f1c0, CF_ISA_A);
 +INSN(bitop_reg, 0100, f1c0, M68000);
  INSN(bitop_reg, 0140, f1c0, CF_ISA_A);
 +INSN(bitop_reg, 0140, f1c0, M68000);

There's a *lot* of repetition in here.

Can we also introduce a BASE() macro that's like INSN() except that it doesn't
bother checking m68k_feature?  That way if both CF_ISA_A and M68000 are set, we
don't have to duplicate the entry.


r~

[Qemu-devel] [PATCH for-2.5 01/30] m68k: define m680x0 CPUs and features

[Laurent Vivier]

This patch defines five new Motorola 680x0 family CPUs:

- M68K_CPUID_M68000,
- M68K_CPUID_M68020,
- M68K_CPUID_M68030,
- M68K_CPUID_M68040,
- M68K_CPUID_M68060

And seven new features:

- M68K_FEATURE_SCALED_INDEX, scaled address index register
- M68K_FEATURE_LONG_MULDIV, 32bit multiply/divide
- M68K_FEATURE_QUAD_MULDIV, 64bit multiply/divide
- M68K_FEATURE_BCCL, long conditional branches
- M68K_FEATURE_BITFIELD, bit field instructions
- M68K_FEATURE_FPU, FPU instructions
- M68K_FEATURE_CAS, cas instruction

Original patche from Andreas Schwab sch...@linux-m68k.org
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
 target-m68k/cpu.c   | 54 ++
 target-m68k/cpu.h   | 10 ++-
 target-m68k/translate.c | 70 +
 3 files changed, 133 insertions(+), 1 deletion(-)

diff --git a/target-m68k/cpu.c b/target-m68k/cpu.c
index 4f246da..f3f4b71 100644
--- a/target-m68k/cpu.c
+++ b/target-m68k/cpu.c
@@ -90,6 +90,55 @@ static void m5206_cpu_initfn(Object *obj)
 m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
 }
 
+static void m68000_cpu_initfn(Object *obj)
+{
+M68kCPU *cpu = M68K_CPU(obj);
+CPUM68KState *env = cpu-env;
+
+m68k_set_feature(env, M68K_FEATURE_M68000);
+m68k_set_feature(env, M68K_FEATURE_USP);
+m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
+}
+
+static void m68020_cpu_initfn(Object *obj)
+{
+M68kCPU *cpu = M68K_CPU(obj);
+CPUM68KState *env = cpu-env;
+
+m68k_set_feature(env, M68K_FEATURE_M68000);
+m68k_set_feature(env, M68K_FEATURE_USP);
+m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
+m68k_set_feature(env, M68K_FEATURE_QUAD_MULDIV);
+m68k_set_feature(env, M68K_FEATURE_BRAL);
+m68k_set_feature(env, M68K_FEATURE_BCCL);
+m68k_set_feature(env, M68K_FEATURE_BITFIELD);
+m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
+m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
+m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
+m68k_set_feature(env, M68K_FEATURE_FPU);
+m68k_set_feature(env, M68K_FEATURE_CAS);
+}
+#define m68030_cpu_initfn m68020_cpu_initfn
+#define m68040_cpu_initfn m68020_cpu_initfn
+
+static void m68060_cpu_initfn(Object *obj)
+{
+M68kCPU *cpu = M68K_CPU(obj);
+CPUM68KState *env = cpu-env;
+
+m68k_set_feature(env, M68K_FEATURE_M68000);
+m68k_set_feature(env, M68K_FEATURE_USP);
+m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
+m68k_set_feature(env, M68K_FEATURE_BRAL);
+m68k_set_feature(env, M68K_FEATURE_BCCL);
+m68k_set_feature(env, M68K_FEATURE_BITFIELD);
+m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
+m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
+m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
+m68k_set_feature(env, M68K_FEATURE_FPU);
+m68k_set_feature(env, M68K_FEATURE_CAS);
+}
+
 static void m5208_cpu_initfn(Object *obj)
 {
 M68kCPU *cpu = M68K_CPU(obj);
@@ -140,6 +189,11 @@ typedef struct M68kCPUInfo {
 } M68kCPUInfo;
 
 static const M68kCPUInfo m68k_cpus[] = {
+{ .name = m68000, .instance_init = m68000_cpu_initfn },
+{ .name = m68020, .instance_init = m68020_cpu_initfn },
+{ .name = m68030, .instance_init = m68030_cpu_initfn },
+{ .name = m68040, .instance_init = m68040_cpu_initfn },
+{ .name = m68060, .instance_init = m68060_cpu_initfn },
 { .name = m5206, .instance_init = m5206_cpu_initfn },
 { .name = m5208, .instance_init = m5208_cpu_initfn },
 { .name = cfv4e, .instance_init = cfv4e_cpu_initfn },
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index 9a62f6c..bcfd864 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -179,6 +179,7 @@ void do_m68k_semihosting(CPUM68KState *env, int nr);
ISA revisions mentioned.  */
 
 enum m68k_features {
+M68K_FEATURE_M68000,
 M68K_FEATURE_CF_ISA_A,
 M68K_FEATURE_CF_ISA_B, /* (ISA B or C).  */
 M68K_FEATURE_CF_ISA_APLUSC, /* BIT/BITREV, FF1, STRLDSR (ISA A+ or C).  */
@@ -189,7 +190,14 @@ enum m68k_features {
 M68K_FEATURE_CF_EMAC_B, /* Revision B EMAC (dual accumulate).  */
 M68K_FEATURE_USP, /* User Stack Pointer.  (ISA A+, B or C).  */
 M68K_FEATURE_EXT_FULL, /* 68020+ full extension word.  */
-M68K_FEATURE_WORD_INDEX /* word sized address index registers.  */
+M68K_FEATURE_WORD_INDEX, /* word sized address index registers.  */
+M68K_FEATURE_SCALED_INDEX, /* scaled address index registers.  */
+M68K_FEATURE_LONG_MULDIV, /* 32 bit multiply/divide. */
+M68K_FEATURE_QUAD_MULDIV, /* 64 bit multiply/divide. */
+M68K_FEATURE_BCCL,/* Long conditional branches.  */
+M68K_FEATURE_BITFIELD,/* Bit field insns.  */
+M68K_FEATURE_FPU,
+M68K_FEATURE_CAS
 };
 
 static inline int m68k_feature(CPUM68KState *env, int feature)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index a57d241..ca8d10c 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@