Re: [PATCH v5 0/6] ppc/e500: Add support for two types of flash, cleanup
Am 1. November 2022 17:43:46 UTC schrieb "Philippe Mathieu-Daudé" : >On 1/11/22 17:58, Philippe Mathieu-Daudé wrote: >> On 1/11/22 17:01, Bernhard Beschow wrote: >>> Am 1. November 2022 10:41:51 UTC schrieb Bernhard Beschow >>> : On Mon, Oct 31, 2022 at 12:54 PM Philippe Mathieu-Daudé wrote: > This is a respin of Bernhard's v4 with Freescale eSDHC implemented > as an 'UNIMP' region. See v4 cover here: > > https://lore.kernel.org/qemu-devel/20221018210146.193159-1-shen...@gmail.com/ > >>> Hi Phil, >>> >>> Is there a chance to get this in for 7.2? >> >> Well 1/ can you review patch #1 and 2/ we need to figure out what to do with >> patch #2 :) Can you point me to the CCSR datasheet? > >Maybe I found it, I'm looking at the "MPC8544E PowerQUICC III Integrated Host >Processor Family Reference Manual, Rev. 1". This document looks similar to mine: https://www.nxp.com/docs/en/reference-manual/MPC8569ERM.pdf Best regards, Bernhard
Re: [PATCH v5 0/6] ppc/e500: Add support for two types of flash, cleanup
On 1/11/22 18:43, Philippe Mathieu-Daudé wrote: On 1/11/22 17:58, Philippe Mathieu-Daudé wrote: On 1/11/22 17:01, Bernhard Beschow wrote: Am 1. November 2022 10:41:51 UTC schrieb Bernhard Beschow : On Mon, Oct 31, 2022 at 12:54 PM Philippe Mathieu-Daudé wrote: This is a respin of Bernhard's v4 with Freescale eSDHC implemented as an 'UNIMP' region. See v4 cover here: https://lore.kernel.org/qemu-devel/20221018210146.193159-1-shen...@gmail.com/ Hi Phil, Is there a chance to get this in for 7.2? Well 1/ can you review patch #1 and 2/ we need to figure out what to do with patch #2 :) Can you point me to the CCSR datasheet? Maybe I found it, I'm looking at the "MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1". On "Table 2-11. CCSR Block Base Address Map" I see the 0x2_7000–0x3_0FFF region marked as 'Reserved'. How does the eSDHC end mapped there?
Re: [PATCH v5 0/6] ppc/e500: Add support for two types of flash, cleanup
On 1/11/22 17:58, Philippe Mathieu-Daudé wrote: On 1/11/22 17:01, Bernhard Beschow wrote: Am 1. November 2022 10:41:51 UTC schrieb Bernhard Beschow : On Mon, Oct 31, 2022 at 12:54 PM Philippe Mathieu-Daudé wrote: This is a respin of Bernhard's v4 with Freescale eSDHC implemented as an 'UNIMP' region. See v4 cover here: https://lore.kernel.org/qemu-devel/20221018210146.193159-1-shen...@gmail.com/ Hi Phil, Is there a chance to get this in for 7.2? Well 1/ can you review patch #1 and 2/ we need to figure out what to do with patch #2 :) Can you point me to the CCSR datasheet? Maybe I found it, I'm looking at the "MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1".
Re: [PATCH v5 0/6] ppc/e500: Add support for two types of flash, cleanup
On 1/11/22 17:01, Bernhard Beschow wrote:
Am 1. November 2022 10:41:51 UTC schrieb Bernhard Beschow :
On Mon, Oct 31, 2022 at 12:54 PM Philippe Mathieu-Daudé
wrote:
This is a respin of Bernhard's v4 with Freescale eSDHC implemented
as an 'UNIMP' region. See v4 cover here:
https://lore.kernel.org/qemu-devel/20221018210146.193159-1-shen...@gmail.com/
Only tested with the ppce500 machine (no further regression testing).
Since v4:
- Do not rename ESDHC_* definitions to USDHC_*
- Do not modify SDHCIState structure
Works beautifully, both for the buildroot load and for my proprietary load.
So:
Tested-by: Bernhard Beschow
Bernhard Beschow (4):
hw/block/pflash_cfi0{1, 2}: Error out if device length isn't a power
of two
docs/system/ppc/ppce500: Use qemu-system-ppc64 across the board(s)
hw/ppc/e500: Implement pflash handling
hw/ppc/e500: Add Freescale eSDHC to e500plat
Philippe Mathieu-Daudé (2):
hw/sd/sdhci: MMIO region is implemented in 32-bit accesses
hw/sd/sdhci: Map host controller interface in host endianess
Hi Phil,
Is there a chance to get this in for 7.2?
Well 1/ can you review patch #1 and 2/ we need to figure out what to do
with patch #2 :) Can you point me to the CCSR datasheet?
Re: [PATCH v5 0/6] ppc/e500: Add support for two types of flash, cleanup
Am 1. November 2022 10:41:51 UTC schrieb Bernhard Beschow :
>On Mon, Oct 31, 2022 at 12:54 PM Philippe Mathieu-Daudé
>wrote:
>
>> This is a respin of Bernhard's v4 with Freescale eSDHC implemented
>> as an 'UNIMP' region. See v4 cover here:
>>
>> https://lore.kernel.org/qemu-devel/20221018210146.193159-1-shen...@gmail.com/
>>
>> Only tested with the ppce500 machine (no further regression testing).
>>
>> Since v4:
>> - Do not rename ESDHC_* definitions to USDHC_*
>> - Do not modify SDHCIState structure
>>
>
>Works beautifully, both for the buildroot load and for my proprietary load.
>So:
>Tested-by: Bernhard Beschow
>
>>
>> Bernhard Beschow (4):
>> hw/block/pflash_cfi0{1, 2}: Error out if device length isn't a power
>> of two
>> docs/system/ppc/ppce500: Use qemu-system-ppc64 across the board(s)
>> hw/ppc/e500: Implement pflash handling
>> hw/ppc/e500: Add Freescale eSDHC to e500plat
>>
>> Philippe Mathieu-Daudé (2):
>> hw/sd/sdhci: MMIO region is implemented in 32-bit accesses
>> hw/sd/sdhci: Map host controller interface in host endianess
Hi Phil,
Is there a chance to get this in for 7.2?
Best regards,
Bernhard
>>
>> docs/system/ppc/ppce500.rst | 38 +--
>> hw/block/pflash_cfi01.c | 8 ++-
>> hw/block/pflash_cfi02.c | 5 ++
>> hw/ppc/Kconfig | 3 +
>> hw/ppc/e500.c | 127 +++-
>> hw/ppc/e500.h | 1 +
>> hw/ppc/e500plat.c | 1 +
>> hw/sd/sdhci.c | 6 +-
>> 8 files changed, 180 insertions(+), 9 deletions(-)
>>
>> --
>> 2.37.3
>>
>>
Re: [PATCH v5 0/6] ppc/e500: Add support for two types of flash, cleanup
On Mon, Oct 31, 2022 at 12:54 PM Philippe Mathieu-Daudé
wrote:
> This is a respin of Bernhard's v4 with Freescale eSDHC implemented
> as an 'UNIMP' region. See v4 cover here:
>
> https://lore.kernel.org/qemu-devel/20221018210146.193159-1-shen...@gmail.com/
>
> Only tested with the ppce500 machine (no further regression testing).
>
> Since v4:
> - Do not rename ESDHC_* definitions to USDHC_*
> - Do not modify SDHCIState structure
>
Works beautifully, both for the buildroot load and for my proprietary load.
So:
Tested-by: Bernhard Beschow
>
> Bernhard Beschow (4):
> hw/block/pflash_cfi0{1, 2}: Error out if device length isn't a power
> of two
> docs/system/ppc/ppce500: Use qemu-system-ppc64 across the board(s)
> hw/ppc/e500: Implement pflash handling
> hw/ppc/e500: Add Freescale eSDHC to e500plat
>
> Philippe Mathieu-Daudé (2):
> hw/sd/sdhci: MMIO region is implemented in 32-bit accesses
> hw/sd/sdhci: Map host controller interface in host endianess
>
> docs/system/ppc/ppce500.rst | 38 +--
> hw/block/pflash_cfi01.c | 8 ++-
> hw/block/pflash_cfi02.c | 5 ++
> hw/ppc/Kconfig | 3 +
> hw/ppc/e500.c | 127 +++-
> hw/ppc/e500.h | 1 +
> hw/ppc/e500plat.c | 1 +
> hw/sd/sdhci.c | 6 +-
> 8 files changed, 180 insertions(+), 9 deletions(-)
>
> --
> 2.37.3
>
>
