[Qemu-devel] [PATCH] target-moxie: Add gdbstub support
This patch adds gdbstub support for the moxie target port.
Signed-off-by: Anthony Green gr...@moxielogic.com
---
target-moxie/Makefile.objs | 1 +
target-moxie/cpu.c | 3 +++
target-moxie/cpu.h | 2 ++
target-moxie/gdbstub.c | 56 ++
4 files changed, 62 insertions(+)
create mode 100644 target-moxie/gdbstub.c
diff --git a/target-moxie/Makefile.objs b/target-moxie/Makefile.objs
index 6381d4d..9a690fb 100644
--- a/target-moxie/Makefile.objs
+++ b/target-moxie/Makefile.objs
@@ -1,2 +1,3 @@
obj-y += translate.o helper.o machine.o cpu.o machine.o
+obj-y += gdbstub.o
obj-$(CONFIG_SOFTMMU) += mmu.o
diff --git a/target-moxie/cpu.c b/target-moxie/cpu.c
index 484ecc2..e3b7995 100644
--- a/target-moxie/cpu.c
+++ b/target-moxie/cpu.c
@@ -102,10 +102,13 @@ static void moxie_cpu_class_init(ObjectClass *oc, void
*data)
cc-do_interrupt = moxie_cpu_do_interrupt;
cc-dump_state = moxie_cpu_dump_state;
cc-set_pc = moxie_cpu_set_pc;
+cc-gdb_read_register = moxie_cpu_gdb_read_register;
+cc-gdb_write_register = moxie_cpu_gdb_write_register;
#ifndef CONFIG_USER_ONLY
cc-get_phys_page_debug = moxie_cpu_get_phys_page_debug;
cc-vmsd = vmstate_moxie_cpu;
#endif
+cc-gdb_num_core_regs = 16 + 1;
}
static void moxielite_initfn(Object *obj)
diff --git a/target-moxie/cpu.h b/target-moxie/cpu.h
index 5ce14b5..140cbe3 100644
--- a/target-moxie/cpu.h
+++ b/target-moxie/cpu.h
@@ -119,6 +119,8 @@ void moxie_cpu_do_interrupt(CPUState *cs);
void moxie_cpu_dump_state(CPUState *cpu, FILE *f,
fprintf_function cpu_fprintf, int flags);
hwaddr moxie_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+int moxie_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int moxie_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void moxie_translate_init(void);
int cpu_moxie_signal_handler(int host_signum, void *pinfo,
void *puc);
diff --git a/target-moxie/gdbstub.c b/target-moxie/gdbstub.c
new file mode 100644
index 000..956d8a4
--- /dev/null
+++ b/target-moxie/gdbstub.c
@@ -0,0 +1,56 @@
+/*
+ * Moxie GDB server stub
+ *
+ * Copyright (c) 2013 Anthony Green
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see http://www.gnu.org/licenses/.
+ */
+#include config.h
+#include qemu-common.h
+#include exec/gdbstub.h
+
+#define NUM_CORE_REGS (16 + 1)
+
+int moxie_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+{
+MoxieCPU *cpu = MOXIE_CPU(cs);
+CPUMoxieState *env = cpu-env;
+
+if (n 16) {
+return gdb_get_reg32(mem_buf, env-gregs[n]);
+} else if (n == 16) {
+return gdb_get_reg32(mem_buf, env-pc);
+}
+return 0;
+}
+
+int moxie_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
+{
+MoxieCPU *cpu = MOXIE_CPU(cs);
+CPUMoxieState *env = cpu-env;
+uint32_t tmp;
+
+if (n NUM_CORE_REGS) {
+return 0;
+}
+
+tmp = ldl_p(mem_buf);
+
+if (n 16) {
+env-gregs[n] = tmp;
+} else {
+env-pc = tmp;
+}
+return 4;
+}
--
1.8.3.1
[Qemu-devel] [PATCH] target-moxie: Add moxie Marin SoC support
This adds initial support for the Marin SoC, including the SoC's uart
interface.
Signed-off-by: Anthony Green gr...@moxielogic.com
---
default-configs/moxie-softmmu.mak | 1 +
hw/char/Makefile.objs | 1 +
hw/char/marin-uart.c | 198 ++
hw/moxie/Makefile.objs| 2 +-
hw/moxie/marin.c | 167
5 files changed, 368 insertions(+), 1 deletion(-)
create mode 100644 hw/char/marin-uart.c
create mode 100644 hw/moxie/marin.c
diff --git a/default-configs/moxie-softmmu.mak
b/default-configs/moxie-softmmu.mak
index 1a95476..65a21de 100644
--- a/default-configs/moxie-softmmu.mak
+++ b/default-configs/moxie-softmmu.mak
@@ -1,5 +1,6 @@
# Default configuration for moxie-softmmu
CONFIG_MC146818RTC=y
+CONFIG_MOXIE=y
CONFIG_SERIAL=y
CONFIG_VGA=y
diff --git a/hw/char/Makefile.objs b/hw/char/Makefile.objs
index cbd6a00..48bc5d0 100644
--- a/hw/char/Makefile.objs
+++ b/hw/char/Makefile.objs
@@ -14,6 +14,7 @@ obj-$(CONFIG_COLDFIRE) += mcf_uart.o
obj-$(CONFIG_OMAP) += omap_uart.o
obj-$(CONFIG_SH4) += sh_serial.o
obj-$(CONFIG_PSERIES) += spapr_vty.o
+obj-$(CONFIG_MOXIE) += marin-uart.o
common-obj-$(CONFIG_ETRAXFS) += etraxfs_ser.o
common-obj-$(CONFIG_ISA_DEBUG) += debugcon.o
diff --git a/hw/char/marin-uart.c b/hw/char/marin-uart.c
new file mode 100644
index 000..f0d46d4
--- /dev/null
+++ b/hw/char/marin-uart.c
@@ -0,0 +1,198 @@
+/*
+ * QEMU model of the Marin UART.
+ *
+ * Copyright (c) 2013 Anthony Green gr...@moxielogic.com
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see http://www.gnu.org/licenses/.
+ *
+ */
+
+#include hw/hw.h
+#include hw/sysbus.h
+#include trace.h
+#include sysemu/char.h
+#include qemu/error-report.h
+
+enum {
+R_RXREADY = 0,
+R_TXREADY,
+R_RXBYTE,
+R_TXBYTE,
+R_MAX
+};
+
+#define TYPE_MARIN_UART marin-uart
+#define MARIN_UART(obj) OBJECT_CHECK(MarinUartState, (obj), TYPE_MARIN_UART)
+
+struct MarinUartState {
+SysBusDevice busdev;
+MemoryRegion regs_region;
+CharDriverState *chr;
+qemu_irq irq;
+
+uint16_t regs[R_MAX];
+};
+typedef struct MarinUartState MarinUartState;
+
+static void uart_update_irq(MarinUartState *s)
+{
+}
+
+static uint64_t uart_read(void *opaque, hwaddr addr,
+ unsigned size)
+{
+MarinUartState *s = opaque;
+uint32_t r = 0;
+
+addr = 1;
+switch (addr) {
+case R_RXREADY:
+r = s-regs[R_RXREADY];
+break;
+case R_TXREADY:
+r = 1;
+break;
+case R_TXBYTE:
+r = s-regs[R_TXBYTE];
+break;
+case R_RXBYTE:
+r = s-regs[R_RXBYTE];
+s-regs[R_RXREADY] = 0;
+qemu_chr_accept_input(s-chr);
+break;
+default:
+error_report(marin_uart: read access to unknown register 0x
+TARGET_FMT_plx, addr 1);
+break;
+}
+
+return r;
+}
+
+static void uart_write(void *opaque, hwaddr addr, uint64_t value,
+ unsigned size)
+{
+MarinUartState *s = opaque;
+unsigned char ch = value;
+
+addr = 1;
+switch (addr) {
+case R_TXBYTE:
+if (s-chr) {
+qemu_chr_fe_write(s-chr, ch, 1);
+}
+break;
+
+default:
+error_report(marin_uart: write access to unknown register 0x
+TARGET_FMT_plx, addr 1);
+break;
+}
+
+uart_update_irq(s);
+}
+
+static const MemoryRegionOps uart_mmio_ops = {
+.read = uart_read,
+.write = uart_write,
+.valid = {
+.min_access_size = 2,
+.max_access_size = 2,
+},
+.endianness = DEVICE_NATIVE_ENDIAN,
+};
+
+static void uart_rx(void *opaque, const uint8_t *buf, int size)
+{
+MarinUartState *s = opaque;
+
+s-regs[R_RXBYTE] = *buf;
+s-regs[R_RXREADY] = 1;
+
+uart_update_irq(s);
+}
+
+static int uart_can_rx(void *opaque)
+{
+MarinUartState *s = opaque;
+
+return !(s-regs[R_RXREADY]);
+}
+
+static void uart_event(void *opaque, int event)
+{
+}
+
+static void marin_uart_reset(DeviceState *d)
+{
+MarinUartState *s = MARIN_UART(d);
+int i;
+
+for (i = 0; i R_MAX; i++) {
+s-regs[i] = 0;
+}
+}
+
+static int marin_uart_init(SysBusDevice *dev)
+{
+MarinUartState *s = MARIN_UART(dev);
+
+sysbus_init_irq(dev, s-irq);
+
+memory_region_init_io(s-regs_region
[Qemu-devel] ping.. Re: [PATCH moxie] Fix bug in tlb_fill.
This patch still needs to be applied. There was some follow-up
discussion on this patch back in May, but none of it negates the fact
that this patch needs to be applied.
Thanks!
AG
Anthony Green gr...@moxielogic.com writes:
Fix a simple bug in tlb_fill for moxie. The port was mostly working
before, which is why I only really noticed it recently. Thanks to
@jcmvbkbc for tracking it down.
Signed-off-by: Anthony Green gr...@moxielogic.com
---
target-moxie/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-moxie/helper.c b/target-moxie/helper.c
index 6e0ac2a..6c36c49 100644
--- a/target-moxie/helper.c
+++ b/target-moxie/helper.c
@@ -55,8 +55,8 @@ void tlb_fill(CPUMoxieState *env, target_ulong addr, int
is_write, int mmu_idx,
if (retaddr) {
cpu_restore_state(env, retaddr);
}
+ cpu_loop_exit(env);
}
-cpu_loop_exit(env);
}
void helper_raise_exception(CPUMoxieState *env, int ex)
Re: [Qemu-devel] [PATCH] target-moxie: Use new qemu_ld/st opcodes
Richard Henderson r...@twiddle.net writes: Strict search-and-replace, since the moxie port does nothing complicated. Cc: Anthony Green gr...@moxielogic.com Signed-off-by: Richard Henderson r...@twiddle.net --- target-moxie/translate.c | 52 1 file changed, 26 insertions(+), 26 deletions(-) Untested, since there's no openrisc images at http://wiki.qemu.org/Testing, but it's certainly a simple enough change. Thanks Richard. I've tested this patch and it's fine. I don't have any disk images to post yet. However, I do have some firmware. It's only about 5k, and normally lives in the FPGA hosting Moxie, but it's useful as a quick test for qemu as well... $ cat ./hello.srec | ./moxie-softmmu/qemu-system-moxie --nographic --machine marin --kernel ./bootrom.elf MOXIE On-Chip Bootloader v2.0 Copyright (c) 2013 Anthony Green gr...@moxielogic.com Waiting for an S-Record Download or Remote GDB Connection... Jumping to code at 0x3000. Hello World! I see that the QEMU repo includes some firmware already. Should I submit this one as well? Thanks, AG
Re: [Qemu-devel] [PATCH] target-moxie: Use new qemu_ld/st opcodes
Richard Henderson r...@twiddle.net writes: Strict search-and-replace, since the moxie port does nothing complicated. Cc: Anthony Green gr...@moxielogic.com Signed-off-by: Richard Henderson r...@twiddle.net --- target-moxie/translate.c | 52 1 file changed, 26 insertions(+), 26 deletions(-) Untested, since there's no openrisc images at http://wiki.qemu.org/Testing, but it's certainly a simple enough change. As previously mentioned (was unaware of the Tested-by protocol) Tested-by: Anthony Green gr...@moxielogic.com Thanks, AG r~ diff --git a/target-moxie/translate.c b/target-moxie/translate.c index a93196f..f3d614e 100644 --- a/target-moxie/translate.c +++ b/target-moxie/translate.c @@ -294,12 +294,12 @@ static int decode_opc(MoxieCPU *cpu, DisasContext *ctx) /* Make space for the static chain and return address. */ tcg_gen_subi_i32(t2, REG(1), 8); tcg_gen_mov_i32(REG(1), t2); -tcg_gen_qemu_st32(t1, REG(1), ctx-memidx); +tcg_gen_qemu_st_i32(t1, REG(1), ctx-memidx, MO_TEUL); /* Push the current frame pointer. */ tcg_gen_subi_i32(t2, REG(1), 4); tcg_gen_mov_i32(REG(1), t2); -tcg_gen_qemu_st32(REG(0), REG(1), ctx-memidx); +tcg_gen_qemu_st_i32(REG(0), REG(1), ctx-memidx, MO_TEUL); /* Set the pc and $fp. */ tcg_gen_mov_i32(REG(0), REG(1)); @@ -321,14 +321,14 @@ static int decode_opc(MoxieCPU *cpu, DisasContext *ctx) tcg_gen_mov_i32(REG(1), REG(0)); /* Pop the frame pointer. */ -tcg_gen_qemu_ld32u(REG(0), REG(1), ctx-memidx); +tcg_gen_qemu_ld_i32(REG(0), REG(1), ctx-memidx, MO_TEUL); tcg_gen_addi_i32(t1, REG(1), 4); tcg_gen_mov_i32(REG(1), t1); /* Pop the return address and skip over the static chain slot. */ -tcg_gen_qemu_ld32u(cpu_pc, REG(1), ctx-memidx); +tcg_gen_qemu_ld_i32(cpu_pc, REG(1), ctx-memidx, MO_TEUL); tcg_gen_addi_i32(t1, REG(1), 8); tcg_gen_mov_i32(REG(1), t1); @@ -356,7 +356,7 @@ static int decode_opc(MoxieCPU *cpu, DisasContext *ctx) TCGv t1 = tcg_temp_new_i32(); tcg_gen_subi_i32(t1, REG(a), 4); tcg_gen_mov_i32(REG(a), t1); -tcg_gen_qemu_st32(REG(b), REG(a), ctx-memidx); +tcg_gen_qemu_st_i32(REG(b), REG(a), ctx-memidx, MO_TEUL); tcg_temp_free_i32(t1); } break; @@ -366,7 +366,7 @@ static int decode_opc(MoxieCPU *cpu, DisasContext *ctx) int b = opcode 0xf; TCGv t1 = tcg_temp_new_i32(); -tcg_gen_qemu_ld32u(REG(b), REG(a), ctx-memidx); +tcg_gen_qemu_ld_i32(REG(b), REG(a), ctx-memidx, MO_TEUL); tcg_gen_addi_i32(t1, REG(a), 4); tcg_gen_mov_i32(REG(a), t1); tcg_temp_free_i32(t1); @@ -378,7 +378,7 @@ static int decode_opc(MoxieCPU *cpu, DisasContext *ctx) TCGv ptr = tcg_temp_new_i32(); tcg_gen_movi_i32(ptr, cpu_ldl_code(env, ctx-pc+2)); -tcg_gen_qemu_ld32u(REG(reg), ptr, ctx-memidx); +tcg_gen_qemu_ld_i32(REG(reg), ptr, ctx-memidx, MO_TEUL); tcg_temp_free_i32(ptr); length = 6; @@ -390,7 +390,7 @@ static int decode_opc(MoxieCPU *cpu, DisasContext *ctx) TCGv ptr = tcg_temp_new_i32(); tcg_gen_movi_i32(ptr, cpu_ldl_code(env, ctx-pc+2)); -tcg_gen_qemu_st32(REG(val), ptr, ctx-memidx); +tcg_gen_qemu_st_i32(REG(val), ptr, ctx-memidx, MO_TEUL); tcg_temp_free_i32(ptr); length = 6; @@ -401,7 +401,7 @@ static int decode_opc(MoxieCPU *cpu, DisasContext *ctx) int src = opcode 0xf; int dest = (opcode 4) 0xf; -tcg_gen_qemu_ld32u(REG(dest), REG(src), ctx-memidx); +tcg_gen_qemu_ld_i32(REG(dest), REG(src), ctx-memidx, MO_TEUL); } break; case 0x0b: /* st.l */ @@ -409,7 +409,7 @@ static int decode_opc(MoxieCPU *cpu, DisasContext *ctx) int dest = (opcode 4) 0xf; int val = opcode 0xf; -tcg_gen_qemu_st32(REG(val), REG(dest), ctx-memidx); +tcg_gen_qemu_st_i32(REG(val), REG(dest), ctx-memidx, MO_TEUL); } break; case 0x0c: /* ldo.l */ @@ -420,7 +420,7 @@ static int decode_opc(MoxieCPU *cpu, DisasContext *ctx) TCGv t1 = tcg_temp_new_i32(); TCGv t2
Re: [Qemu-devel] [PATCH] target-moxie: Add moxie Marin SoC support
Peter - thank you for taking the time to review my patch. Comments
below.
Peter Crosthwaite peter.crosthwa...@xilinx.com writes:
Hi Anthony,
On Sun, Dec 15, 2013 at 1:59 PM, Anthony Green gr...@moxielogic.com wrote:
This adds initial support for the Marin SoC, including the SoC's uart
interface.
Signed-off-by: Anthony Green gr...@moxielogic.com
---
default-configs/moxie-softmmu.mak | 1 +
hw/char/Makefile.objs | 1 +
hw/char/marin-uart.c | 198 ++
hw/moxie/Makefile.objs| 2 +-
hw/moxie/marin.c | 167
This should be at least two patches. One for the UART device and one
for your SoC. Maybe more depending on the descision regarding SoC v
board (see comment below).
Ok, I can split these.
5 files changed, 368 insertions(+), 1 deletion(-)
create mode 100644 hw/char/marin-uart.c
create mode 100644 hw/moxie/marin.c
diff --git a/default-configs/moxie-softmmu.mak
b/default-configs/moxie-softmmu.mak
index 1a95476..65a21de 100644
--- a/default-configs/moxie-softmmu.mak
+++ b/default-configs/moxie-softmmu.mak
@@ -1,5 +1,6 @@
# Default configuration for moxie-softmmu
CONFIG_MC146818RTC=y
+CONFIG_MOXIE=y
CONFIG_SERIAL=y
CONFIG_VGA=y
diff --git a/hw/char/Makefile.objs b/hw/char/Makefile.objs
index cbd6a00..48bc5d0 100644
--- a/hw/char/Makefile.objs
+++ b/hw/char/Makefile.objs
@@ -14,6 +14,7 @@ obj-$(CONFIG_COLDFIRE) += mcf_uart.o
obj-$(CONFIG_OMAP) += omap_uart.o
obj-$(CONFIG_SH4) += sh_serial.o
obj-$(CONFIG_PSERIES) += spapr_vty.o
+obj-$(CONFIG_MOXIE) += marin-uart.o
common-obj-$(CONFIG_ETRAXFS) += etraxfs_ser.o
common-obj-$(CONFIG_ISA_DEBUG) += debugcon.o
diff --git a/hw/char/marin-uart.c b/hw/char/marin-uart.c
new file mode 100644
index 000..f0d46d4
--- /dev/null
+++ b/hw/char/marin-uart.c
@@ -0,0 +1,198 @@
+/*
+ * QEMU model of the Marin UART.
+ *
+ * Copyright (c) 2013 Anthony Green gr...@moxielogic.com
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see
http://www.gnu.org/licenses/.
+ *
+ */
+
+#include hw/hw.h
+#include hw/sysbus.h
+#include trace.h
+#include sysemu/char.h
+#include qemu/error-report.h
+
+enum {
+R_RXREADY = 0,
+R_TXREADY,
+R_RXBYTE,
+R_TXBYTE,
+R_MAX
+};
+
+#define TYPE_MARIN_UART marin-uart
+#define MARIN_UART(obj) OBJECT_CHECK(MarinUartState, (obj), TYPE_MARIN_UART)
+
+struct MarinUartState {
Check your QoM conventions coding style.
http://wiki.qemu.org/QOMConventions
Thanks for the pointer.
/* private */
+SysBusDevice busdev;
SysBusDevice parent_obj;
/* public */
+MemoryRegion regs_region;
+CharDriverState *chr;
+qemu_irq irq;
+
+uint16_t regs[R_MAX];
+};
+typedef struct MarinUartState MarinUartState;
+
You could just do the typedefing in the struct decl above to save this
LOC.
Yes.
+static void uart_update_irq(MarinUartState *s)
+{
+}
Why the NOP function?
Place holder for a WIP. I'll remove it. The Marin SoC has an interrupt
controller as well. but I haven't modeled it in QEMU yet.
+
+static uint64_t uart_read(void *opaque, hwaddr addr,
+ unsigned size)
+{
+MarinUartState *s = opaque;
+uint32_t r = 0;
+
+addr = 1;
+switch (addr) {
+case R_RXREADY:
+r = s-regs[R_RXREADY];
You do kind of defeat the purpose of arrayified regs, if you just
index them all one by one maually. Can you have a default of r =
s-regs[addr]? ...
I suppose you could, but even if you fix the R_TXREADY special case,
you'd still have to handle the R_RXBYTE special case, and the range test
currently handled by 'default'. I don't think it's much savings, and
the current switch statement is simpler to understand IMO.
+break;
+case R_TXREADY:
+r = 1;
which is then overriden by this exceptional case.
+break;
+case R_TXBYTE:
+r = s-regs[R_TXBYTE];
+break;
+case R_RXBYTE:
+r = s-regs[R_RXBYTE];
+s-regs[R_RXREADY] = 0;
+qemu_chr_accept_input(s-chr);
Do you need a NULL guard on s-chr here?
I can add one.
+break;
+default:
+error_report(marin_uart: read access to unknown register 0x
+TARGET_FMT_plx, addr 1);
+break
[Qemu-devel] [PATCH v2 0/2] Add Moxie Marin SoC support
I've broken my recent submission into two patches and incorporated feedback from Peter's review. Here they come... Anthony Green (2): Add UART for Moxie Marin SoC Add Marin SoC support default-configs/moxie-softmmu.mak | 1 + hw/char/Makefile.objs | 1 + hw/char/marin-uart.c | 200 ++ hw/moxie/Makefile.objs| 2 +- hw/moxie/marin.c | 166 +++ 5 files changed, 369 insertions(+), 1 deletion(-) create mode 100644 hw/char/marin-uart.c create mode 100644 hw/moxie/marin.c -- 1.8.3.1
[Qemu-devel] [PATCH v2 1/2] Add UART for Moxie Marin SoC
This patch adds the Marin UART device.
Signed-off-by: Anthony Green gr...@moxielogic.com
---
default-configs/moxie-softmmu.mak | 1 +
hw/char/Makefile.objs | 1 +
hw/char/marin-uart.c | 200 ++
3 files changed, 202 insertions(+)
create mode 100644 hw/char/marin-uart.c
diff --git a/default-configs/moxie-softmmu.mak
b/default-configs/moxie-softmmu.mak
index 1a95476..65a21de 100644
--- a/default-configs/moxie-softmmu.mak
+++ b/default-configs/moxie-softmmu.mak
@@ -1,5 +1,6 @@
# Default configuration for moxie-softmmu
CONFIG_MC146818RTC=y
+CONFIG_MOXIE=y
CONFIG_SERIAL=y
CONFIG_VGA=y
diff --git a/hw/char/Makefile.objs b/hw/char/Makefile.objs
index cbd6a00..48bc5d0 100644
--- a/hw/char/Makefile.objs
+++ b/hw/char/Makefile.objs
@@ -14,6 +14,7 @@ obj-$(CONFIG_COLDFIRE) += mcf_uart.o
obj-$(CONFIG_OMAP) += omap_uart.o
obj-$(CONFIG_SH4) += sh_serial.o
obj-$(CONFIG_PSERIES) += spapr_vty.o
+obj-$(CONFIG_MOXIE) += marin-uart.o
common-obj-$(CONFIG_ETRAXFS) += etraxfs_ser.o
common-obj-$(CONFIG_ISA_DEBUG) += debugcon.o
diff --git a/hw/char/marin-uart.c b/hw/char/marin-uart.c
new file mode 100644
index 000..b3606a2
--- /dev/null
+++ b/hw/char/marin-uart.c
@@ -0,0 +1,200 @@
+/*
+ * QEMU model of the Marin UART.
+ *
+ * Copyright (c) 2013 Anthony Green gr...@moxielogic.com
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see http://www.gnu.org/licenses/.
+ *
+ */
+
+#include hw/hw.h
+#include hw/sysbus.h
+#include trace.h
+#include sysemu/char.h
+#include qemu/error-report.h
+
+enum {
+R_RXREADY = 0,
+R_TXREADY,
+R_RXBYTE,
+R_TXBYTE,
+R_MAX
+};
+
+#define TYPE_MARIN_UART marin-uart
+#define MARIN_UART(obj) OBJECT_CHECK(MarinUartState, (obj), TYPE_MARIN_UART)
+
+typedef struct MarinUartState {
+/* private */
+SysBusDevice parent_obj;
+
+/* public */
+MemoryRegion regs_region;
+CharDriverState *chr;
+qemu_irq irq;
+uint16_t regs[R_MAX];
+} MarinUartState;
+
+static uint64_t uart_read(void *opaque, hwaddr addr,
+ unsigned size)
+{
+MarinUartState *s = opaque;
+uint32_t r = 0;
+
+addr = 1;
+switch (addr) {
+case R_RXREADY:
+r = s-regs[R_RXREADY];
+break;
+case R_TXREADY:
+r = 1;
+break;
+case R_TXBYTE:
+r = s-regs[R_TXBYTE];
+break;
+case R_RXBYTE:
+r = s-regs[R_RXBYTE];
+s-regs[R_RXREADY] = 0;
+if (s-chr) {
+qemu_chr_accept_input(s-chr);
+}
+break;
+default:
+qemu_log_mask(LOG_GUEST_ERROR,
+marin_uart: read access to unknown register 0x
+TARGET_FMT_plx, addr 1);
+break;
+}
+
+return r;
+}
+
+static void uart_write(void *opaque, hwaddr addr, uint64_t value,
+ unsigned size)
+{
+MarinUartState *s = opaque;
+unsigned char ch = value;
+
+addr = 1;
+switch (addr) {
+case R_TXBYTE:
+if (s-chr) {
+qemu_chr_fe_write(s-chr, ch, 1);
+}
+break;
+
+default:
+qemu_log_mask(LOG_GUEST_ERROR,
+marin_uart: write access to unknown register 0x
+TARGET_FMT_plx, addr 1);
+break;
+}
+}
+
+static const MemoryRegionOps uart_mmio_ops = {
+.read = uart_read,
+.write = uart_write,
+.valid = {
+.min_access_size = 2,
+.max_access_size = 2,
+},
+.endianness = DEVICE_NATIVE_ENDIAN,
+};
+
+static void uart_rx(void *opaque, const uint8_t *buf, int size)
+{
+MarinUartState *s = opaque;
+
+s-regs[R_RXBYTE] = *buf;
+s-regs[R_RXREADY] = 1;
+}
+
+static int uart_can_rx(void *opaque)
+{
+MarinUartState *s = opaque;
+
+return !(s-regs[R_RXREADY]);
+}
+
+static void uart_event(void *opaque, int event)
+{
+}
+
+static void marin_uart_reset(DeviceState *d)
+{
+MarinUartState *s = MARIN_UART(d);
+int i;
+
+for (i = 0; i R_MAX; i++) {
+s-regs[i] = 0;
+}
+s-regs[R_TXREADY] = 1;
+}
+
+static void marin_uart_realize(DeviceState *dev, Error **errp)
+{
+MarinUartState *s = MARIN_UART(dev);
+
+s-chr = qemu_char_get_next_serial();
+if (s-chr) {
+qemu_chr_add_handlers(s-chr, uart_can_rx, uart_rx, uart_event, s);
+}
+}
+
+static void marin_uart_init(Object *obj)
+{
+SysBusDevice *sbd = SYS_BUS_DEVICE
[Qemu-devel] [PATCH v2 2/2] Add Marin SoC support
And here is the base SoC support...
Signed-off-by: Anthony Green gr...@moxielogic.com
---
hw/moxie/Makefile.objs | 2 +-
hw/moxie/marin.c | 166 +
2 files changed, 167 insertions(+), 1 deletion(-)
create mode 100644 hw/moxie/marin.c
diff --git a/hw/moxie/Makefile.objs b/hw/moxie/Makefile.objs
index bfc9001..4fa3b30 100644
--- a/hw/moxie/Makefile.objs
+++ b/hw/moxie/Makefile.objs
@@ -1,2 +1,2 @@
# moxie boards
-obj-y += moxiesim.o
+obj-y += moxiesim.o marin.o
diff --git a/hw/moxie/marin.c b/hw/moxie/marin.c
new file mode 100644
index 000..09837ae
--- /dev/null
+++ b/hw/moxie/marin.c
@@ -0,0 +1,166 @@
+/*
+ * QEMU/marin SoC emulation
+ *
+ * Emulates the FPGA-hosted Marin SoC
+ *
+ * Copyright (c) 2013 Anthony Green
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include hw/sysbus.h
+#include hw/hw.h
+#include hw/boards.h
+#include hw/loader.h
+#include exec/address-spaces.h
+
+typedef struct {
+uint64_t ram_size;
+const char *kernel_filename;
+const char *kernel_cmdline;
+const char *initrd_filename;
+} LoaderParams;
+
+static void load_kernel(MoxieCPU *cpu, LoaderParams *loader_params)
+{
+uint64_t entry, kernel_low, kernel_high;
+long kernel_size;
+long initrd_size;
+ram_addr_t initrd_offset;
+
+kernel_size = load_elf(loader_params-kernel_filename, NULL, NULL,
+ entry, kernel_low, kernel_high, 1,
+ ELF_MACHINE, 0);
+
+if (!kernel_size) {
+error_report(Could not load kernel '%s',
+ loader_params-kernel_filename);
+exit(1);
+}
+
+/* load initrd */
+initrd_size = 0;
+initrd_offset = 0;
+if (loader_params-initrd_filename) {
+initrd_size = get_image_size(loader_params-initrd_filename);
+if (initrd_size 0) {
+initrd_offset = (kernel_high + ~TARGET_PAGE_MASK)
+ TARGET_PAGE_MASK;
+if (initrd_offset + initrd_size loader_params-ram_size) {
+error_report(Memory too small for initial ram disk '%s',
+ loader_params-initrd_filename);
+exit(1);
+}
+initrd_size = load_image_targphys(loader_params-initrd_filename,
+ initrd_offset,
+ ram_size);
+}
+if (initrd_size == (target_ulong)-1) {
+error_report(Could not load initial ram disk '%s',
+ loader_params-initrd_filename);
+exit(1);
+}
+}
+}
+
+static void main_cpu_reset(void *opaque)
+{
+MoxieCPU *cpu = opaque;
+
+cpu_reset(CPU(cpu));
+}
+
+static inline DeviceState *marin_uart_create(hwaddr base,
+qemu_irq irq)
+{
+DeviceState *dev;
+
+dev = qdev_create(NULL, marin-uart);
+qdev_init_nofail(dev);
+sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
+
+return dev;
+}
+
+static void marin_init(QEMUMachineInitArgs *args)
+{
+MoxieCPU *cpu = NULL;
+ram_addr_t ram_size = args-ram_size;
+const char *cpu_model = args-cpu_model;
+const char *kernel_filename = args-kernel_filename;
+const char *kernel_cmdline = args-kernel_cmdline;
+const char *initrd_filename = args-initrd_filename;
+CPUMoxieState *env;
+MemoryRegion *address_space_mem = get_system_memory();
+MemoryRegion *ocram = g_new(MemoryRegion, 1);
+MemoryRegion *ram = g_new(MemoryRegion, 1);
+MemoryRegion *rom = g_new(MemoryRegion, 1);
+hwaddr ram_base = 0x3000;
+LoaderParams loader_params;
+
+/* Init CPUs. */
+if (cpu_model == NULL) {
+cpu_model = MoxieLite-moxie-cpu;
+}
+cpu = cpu_moxie_init(cpu_model);
+if (!cpu) {
+error_report(Unable to find CPU definition);
+exit(1);
+}
+env = cpu-env
Re: [Qemu-devel] ping.. Re: [PATCH moxie] Fix bug in tlb_fill.
Peter Maydell peter.mayd...@linaro.org writes: On 15 December 2013 18:51, Andreas Färber afaer...@suse.de wrote: And since this is purely in target-moxie I would suggest to simply send a pull as target maintainer once you have someone trustworthy's Reviewed-by and it doesn't break `make check`, similar to how it's done for OpenRISC. Yes, this makes sense to me, especially since Anthony has a number of other moxie patches on list at this point. According to this page... http://wiki.qemu.org/Contribute/SubmitAPullRequest ...I need to get a key signed by a member of the QEMU community in person. Are there any QEMU hackers in the Toronto area? AG
Re: [Qemu-devel] [PATCH] target-moxie: Add moxie Marin SoC support
Andreas Färber afaer...@suse.de writes: The Marin SoC currently runs on two boards: the Nexys3 (Xilinx) and DE-2 (Altera). They are pretty much identical from the software side of things. Marin currently provides the UART, PIC, 7 segment display and timer devices, as well as various memory controllers. There's no useful distinction between SoC and board at this time. I'd like to keep it simple as per my patch rather than try to factor them out prematurely. I thought I've seen a number of odd embedded systems already, but I'm having trouble understanding your combination of SoC and FPGA: Xilinx and Altera both have SoCs combining a Cortex-A9 with an FPGA. But your reference to Xilinx and Altera boards rather sounds as if Moxie is used as a soft-core processor on the FPGA? In that case the term SoC would be really confusing to me... Can you clarify or aid with some links? Moxie is an architecture. MoxieLite is one implementation of that architecture (non-pipelined, resource-light). Marin is a kind of SoC - the combination of the MoxieLite core along with various peripherals and controllers. http://github.com/atgreen/moxie-cores It is similar, in a way, to the Miklymist SoC, which uses an LM32 soft-core (and is supported by qemu). The Xilinx and Altera parts with Cortex-A9 cores are similar, except that that Cortex-A9 is an on-chip ASIC, instead of a soft SoC. AG
[Qemu-devel] [PATCH moxie 4/5] Add sample moxie system
Add a simple moxie target, similar to what we have in the gdb simulator today.
Signed-off-by: Anthony Green gr...@moxielogic.com
---
hw/moxie/Makefile.objs | 5 ++
hw/moxiesim.c | 200 +
include/sysemu/arch_init.h | 1 +
3 files changed, 206 insertions(+)
create mode 100644 hw/moxie/Makefile.objs
create mode 100644 hw/moxiesim.c
diff --git a/hw/moxie/Makefile.objs b/hw/moxie/Makefile.objs
new file mode 100644
index 000..2963363
--- /dev/null
+++ b/hw/moxie/Makefile.objs
@@ -0,0 +1,5 @@
+# moxie boards
+obj-y = moxiesim.o serial.o mc146818rtc.o vga.o
+obj-$(CONFIG_FDT) += device_tree.o
+
+obj-y := $(addprefix ../,$(obj-y))
diff --git a/hw/moxiesim.c b/hw/moxiesim.c
new file mode 100644
index 000..feae538
--- /dev/null
+++ b/hw/moxiesim.c
@@ -0,0 +1,200 @@
+/*
+ * QEMU/moxiesim emulation
+ *
+ * Emulates a very simple machine model similiar to the one use by the
+ * GDB moxie simulator.
+ *
+ * Copyright (c) 2008, 2009, 2010 Anthony Green
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the
Software), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include sysbus.h
+#include hw.h
+#include pc.h
+#include isa.h
+#include net/net.h
+#include sysemu/sysemu.h
+#include boards.h
+#include loader.h
+#include serial.h
+#include exec/address-spaces.h
+
+#define PHYS_MEM_BASE 0x8000
+
+static struct _loaderparams {
+int ram_size;
+const char *kernel_filename;
+const char *kernel_cmdline;
+const char *initrd_filename;
+} loaderparams;
+
+static void load_kernel (CPUMoxieState *env)
+{
+uint64_t entry, kernel_low, kernel_high;
+long kernel_size;
+long initrd_size;
+ram_addr_t initrd_offset;
+
+kernel_size = load_elf(loaderparams.kernel_filename, NULL, NULL,
+ entry, kernel_low, kernel_high, 1,
ELF_MACHINE, 0);
+if (kernel_size = 0)
+ env-pc = (unsigned) entry;
+else
+ {
+fprintf(stderr, qemu: could not load kernel '%s'\n,
+loaderparams.kernel_filename);
+exit(1);
+ }
+
+/* load initrd */
+initrd_size = 0;
+initrd_offset = 0;
+if (loaderparams.initrd_filename) {
+initrd_size = get_image_size (loaderparams.initrd_filename);
+if (initrd_size 0) {
+initrd_offset = (kernel_high + ~TARGET_PAGE_MASK)
TARGET_PAGE_MASK;
+if (initrd_offset + initrd_size loaderparams.ram_size) {
+fprintf(stderr,
+qemu: memory too small for initial ram disk '%s'\n,
+loaderparams.initrd_filename);
+exit(1);
+}
+initrd_size = load_image_targphys(loaderparams.initrd_filename,
+ initrd_offset,
+ ram_size);
+}
+if (initrd_size == (target_ulong) -1) {
+fprintf(stderr, qemu: could not load initial ram disk '%s'\n,
+loaderparams.initrd_filename);
+exit(1);
+}
+}
+}
+
+static void main_cpu_reset(void *opaque)
+{
+MoxieCPU *cpu = opaque;
+
+cpu_reset(CPU(cpu));
+}
+
+static inline DeviceState *
+moxie_intc_create(hwaddr base, qemu_irq irq, int kind_of_intr)
+{
+DeviceState *dev;
+
+dev = qdev_create(NULL, moxie,intc);
+qdev_prop_set_uint32(dev, kind-of-intr, kind_of_intr);
+qdev_init_nofail(dev);
+sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
+return dev;
+}
+
+static void moxiesim_init(QEMUMachineInitArgs *args)
+{
+MoxieCPU *cpu = NULL;
+ram_addr_t ram_size = args-ram_size;
+const char *cpu_model = args-cpu_model;
+const char *kernel_filename = args-kernel_filename;
+const char *kernel_cmdline = args-kernel_cmdline;
+const char *initrd_filename = args-initrd_filename;
+CPUMoxieState *env;
+MemoryRegion *address_space_mem = get_system_memory
[Qemu-devel] [PATCH moxie 1/5] New processor port
Hello qemu maintainers, I have been maintaining a qemu port for moxie on github for a few years now, and would now like to submit it upstream. Moxie is a soft-core architecture, similar to lm32 and microblaze. The GNU toolchain has supported moxie for several years now. The qemu port is very basic, but sufficient to bring up a uClinux kernel port. Thank you, Anthony Green Signed-off-by: Anthony Green gr...@moxielogic.com --- MAINTAINERS | 5 + 1 file changed, 5 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 21043e4..b970159 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -91,6 +91,11 @@ M: Aurelien Jarno aurel...@aurel32.net S: Odd Fixes F: target-mips/ +Moxie +M: Anthony Green gr...@moxielogic.com +S: Maintained +F: target-moxie/ + PowerPC M: Alexander Graf ag...@suse.de L: qemu-...@nongnu.org
[Qemu-devel] [PATCH moxie 2/5] Add moxie disassembler
This patch adds the disassembler logic for moxie.
Signed-off-by: Anthony Green gr...@moxielogic.com
---
disas.c | 6 +
disas/Makefile.objs | 1 +
disas/moxie.c | 369
include/disas/bfd.h | 2 +
4 files changed, 378 insertions(+)
create mode 100644 disas/moxie.c
diff --git a/disas.c b/disas.c
index a46faee..74d3ba0 100644
--- a/disas.c
+++ b/disas.c
@@ -256,6 +256,9 @@ void target_disas(FILE *out, CPUArchState *env,
target_ulong code,
#elif defined(TARGET_MICROBLAZE)
s.info.mach = bfd_arch_microblaze;
print_insn = print_insn_microblaze;
+#elif defined(TARGET_MOXIE)
+ s.info.mach = bfd_arch_moxie;
+ print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
@@ -462,6 +465,9 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
#elif defined(TARGET_S390X)
s.info.mach = bfd_mach_s390_64;
print_insn = print_insn_s390;
+#elif defined(TARGET_MOXIE)
+ s.info.mach = bfd_arch_moxie;
+ print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
diff --git a/disas/Makefile.objs b/disas/Makefile.objs
index ed75f9a..3b1e77a 100644
--- a/disas/Makefile.objs
+++ b/disas/Makefile.objs
@@ -7,6 +7,7 @@ common-obj-$(CONFIG_IA64_DIS) += ia64.o
common-obj-$(CONFIG_M68K_DIS) += m68k.o
common-obj-$(CONFIG_MICROBLAZE_DIS) += microblaze.o
common-obj-$(CONFIG_MIPS_DIS) += mips.o
+common-obj-$(CONFIG_MOXIE_DIS) += moxie.o
common-obj-$(CONFIG_PPC_DIS) += ppc.o
common-obj-$(CONFIG_S390_DIS) += s390.o
common-obj-$(CONFIG_SH4_DIS) += sh4.o
diff --git a/disas/moxie.c b/disas/moxie.c
new file mode 100644
index 000..20ae0eb
--- /dev/null
+++ b/disas/moxie.c
@@ -0,0 +1,369 @@
+/* Disassemble moxie instructions.
+ Copyright 2009
+ Free Software Foundation, Inc.
+
+ This file is part of the GNU opcodes library.
+
+ This library is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+#include stdio.h
+#define STATIC_TABLE
+#define DEFINE_TABLE
+
+#include disas/bfd.h
+
+static void *stream;
+
+/* Form 1 instructions come in different flavors:
+
+ Some have no arguments (MOXIE_F1_NARG)
+ Some only use the A operand (MOXIE_F1_A)
+ Some use A and B registers (MOXIE_F1_AB)
+ Some use A and consume a 4 byte immediate value (MOXIE_F1_A4)
+ Some use just a 4 byte immediate value (MOXIE_F1_4)
+ Some use just a 4 byte memory address (MOXIE_F1_M)
+ Some use B and an indirect A (MOXIE_F1_AiB)
+ Some use A and an indirect B (MOXIE_F1_ABi)
+ Some consume a 4 byte immediate value and use X (MOXIE_F1_4A)
+ Some use B and an indirect A plus 4 bytes (MOXIE_F1_AiB4)
+ Some use A and an indirect B plus 4 bytes (MOXIE_F1_ABi4)
+
+ Form 2 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F2_NARG)
+ Some use the A register and an 8-bit value (MOXIE_F2_A8V)
+
+ Form 3 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F3_NARG)
+ Some have a 10-bit PC relative operand (MOXIE_F3_PCREL). */
+
+#define MOXIE_F1_NARG 0x100
+#define MOXIE_F1_A 0x101
+#define MOXIE_F1_AB 0x102
+/* #define MOXIE_F1_ABC 0x103 */
+#define MOXIE_F1_A4 0x104
+#define MOXIE_F1_4 0x105
+#define MOXIE_F1_AiB 0x106
+#define MOXIE_F1_ABi 0x107
+#define MOXIE_F1_4A 0x108
+#define MOXIE_F1_AiB4 0x109
+#define MOXIE_F1_ABi4 0x10a
+#define MOXIE_F1_M 0x10b
+
+#define MOXIE_F2_NARG 0x200
+#define MOXIE_F2_A8V 0x201
+
+#define MOXIE_F3_NARG 0x300
+#define MOXIE_F3_PCREL 0x301
+
+typedef struct moxie_opc_info_t {
+ short opcode;
+ unsigned itype;
+ const char * name;
+} moxie_opc_info_t;
+
+extern const moxie_opc_info_t moxie_form1_opc_info[64];
+extern const moxie_opc_info_t moxie_form2_opc_info[4];
+extern const moxie_opc_info_t moxie_form3_opc_info[16];
+
+/* The moxie processor's 16-bit instructions come in two forms:
+
+ FORM 1 instructions start with a 0 bit...
+
+ 0ooo
+ 0 F
+
+ ooo - form 1 opcode number
+ - operand A
+
[Qemu-devel] [PATCH moxie 5/5] Top level changes for moxie port
The final patch adds top level changes in support of the new moxie port.
Thanks,
AG
Signed-off-by: Anthony Green gr...@moxielogic.com
---
hw/moxie/Makefile.objs | 5 ++
hw/moxiesim.c | 200 +
include/sysemu/arch_init.h | 1 +
3 files changed, 206 insertions(+)
create mode 100644 hw/moxie/Makefile.objs
create mode 100644 hw/moxiesim.c
diff --git a/hw/moxie/Makefile.objs b/hw/moxie/Makefile.objs
new file mode 100644
index 000..2963363
--- /dev/null
+++ b/hw/moxie/Makefile.objs
@@ -0,0 +1,5 @@
+# moxie boards
+obj-y = moxiesim.o serial.o mc146818rtc.o vga.o
+obj-$(CONFIG_FDT) += device_tree.o
+
+obj-y := $(addprefix ../,$(obj-y))
diff --git a/hw/moxiesim.c b/hw/moxiesim.c
new file mode 100644
index 000..feae538
--- /dev/null
+++ b/hw/moxiesim.c
@@ -0,0 +1,200 @@
+/*
+ * QEMU/moxiesim emulation
+ *
+ * Emulates a very simple machine model similiar to the one use by the
+ * GDB moxie simulator.
+ *
+ * Copyright (c) 2008, 2009, 2010 Anthony Green
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the
Software), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include sysbus.h
+#include hw.h
+#include pc.h
+#include isa.h
+#include net/net.h
+#include sysemu/sysemu.h
+#include boards.h
+#include loader.h
+#include serial.h
+#include exec/address-spaces.h
+
+#define PHYS_MEM_BASE 0x8000
+
+static struct _loaderparams {
+ int ram_size;
+ const char *kernel_filename;
+ const char *kernel_cmdline;
+ const char *initrd_filename;
+} loaderparams;
+
+static void load_kernel (CPUMoxieState *env)
+{
+ uint64_t entry, kernel_low, kernel_high;
+ long kernel_size;
+ long initrd_size;
+ ram_addr_t initrd_offset;
+
+ kernel_size = load_elf(loaderparams.kernel_filename, NULL, NULL,
+ entry, kernel_low, kernel_high, 1,
ELF_MACHINE, 0);
+ if (kernel_size = 0)
+ env-pc = (unsigned) entry;
+ else
+ {
+ fprintf(stderr, qemu: could not load kernel '%s'\n,
+ loaderparams.kernel_filename);
+ exit(1);
+ }
+
+ /* load initrd */
+ initrd_size = 0;
+ initrd_offset = 0;
+ if (loaderparams.initrd_filename) {
+ initrd_size = get_image_size (loaderparams.initrd_filename);
+ if (initrd_size 0) {
+ initrd_offset = (kernel_high + ~TARGET_PAGE_MASK)
TARGET_PAGE_MASK;
+ if (initrd_offset + initrd_size loaderparams.ram_size) {
+ fprintf(stderr,
+ qemu: memory too small for initial ram disk '%s'\n,
+ loaderparams.initrd_filename);
+ exit(1);
+ }
+ initrd_size = load_image_targphys(loaderparams.initrd_filename,
+ initrd_offset,
+ ram_size);
+ }
+ if (initrd_size == (target_ulong) -1) {
+ fprintf(stderr, qemu: could not load initial ram disk '%s'\n,
+ loaderparams.initrd_filename);
+ exit(1);
+ }
+ }
+}
+
+static void main_cpu_reset(void *opaque)
+{
+ MoxieCPU *cpu = opaque;
+
+ cpu_reset(CPU(cpu));
+}
+
+static inline DeviceState *
+moxie_intc_create(hwaddr base, qemu_irq irq, int kind_of_intr)
+{
+ DeviceState *dev;
+
+ dev = qdev_create(NULL, moxie,intc);
+ qdev_prop_set_uint32(dev, kind-of-intr, kind_of_intr);
+ qdev_init_nofail(dev);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
+ return dev;
+}
+
+static void moxiesim_init(QEMUMachineInitArgs *args)
+{
+ MoxieCPU *cpu = NULL;
+ ram_addr_t ram_size = args-ram_size;
+ const char *cpu_model = args-cpu_model;
+ const char *kernel_filename = args-kernel_filename;
+ const char *kernel_cmdline = args-kernel_cmdline;
+ const char *initrd_filename = args-initrd_filename;
+ CPUMoxieState *env;
+ MemoryRegion *address_space_mem = get_system_memory
[Qemu-devel] [PATCH moxie 5/5] Add top level changes for moxie port
Signed-off-by: Anthony Green gr...@moxielogic.com
---
hw/moxie/Makefile.objs | 5 ++
hw/moxiesim.c | 200 +
include/sysemu/arch_init.h | 1 +
3 files changed, 206 insertions(+)
create mode 100644 hw/moxie/Makefile.objs
create mode 100644 hw/moxiesim.c
diff --git a/hw/moxie/Makefile.objs b/hw/moxie/Makefile.objs
new file mode 100644
index 000..2963363
--- /dev/null
+++ b/hw/moxie/Makefile.objs
@@ -0,0 +1,5 @@
+# moxie boards
+obj-y = moxiesim.o serial.o mc146818rtc.o vga.o
+obj-$(CONFIG_FDT) += device_tree.o
+
+obj-y := $(addprefix ../,$(obj-y))
diff --git a/hw/moxiesim.c b/hw/moxiesim.c
new file mode 100644
index 000..feae538
--- /dev/null
+++ b/hw/moxiesim.c
@@ -0,0 +1,200 @@
+/*
+ * QEMU/moxiesim emulation
+ *
+ * Emulates a very simple machine model similiar to the one use by the
+ * GDB moxie simulator.
+ *
+ * Copyright (c) 2008, 2009, 2010 Anthony Green
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the
Software), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include sysbus.h
+#include hw.h
+#include pc.h
+#include isa.h
+#include net/net.h
+#include sysemu/sysemu.h
+#include boards.h
+#include loader.h
+#include serial.h
+#include exec/address-spaces.h
+
+#define PHYS_MEM_BASE 0x8000
+
+static struct _loaderparams {
+int ram_size;
+const char *kernel_filename;
+const char *kernel_cmdline;
+const char *initrd_filename;
+} loaderparams;
+
+static void load_kernel (CPUMoxieState *env)
+{
+uint64_t entry, kernel_low, kernel_high;
+long kernel_size;
+long initrd_size;
+ram_addr_t initrd_offset;
+
+kernel_size = load_elf(loaderparams.kernel_filename, NULL, NULL,
+ entry, kernel_low, kernel_high, 1,
ELF_MACHINE, 0);
+if (kernel_size = 0)
+ env-pc = (unsigned) entry;
+else
+ {
+fprintf(stderr, qemu: could not load kernel '%s'\n,
+loaderparams.kernel_filename);
+exit(1);
+ }
+
+/* load initrd */
+initrd_size = 0;
+initrd_offset = 0;
+if (loaderparams.initrd_filename) {
+initrd_size = get_image_size (loaderparams.initrd_filename);
+if (initrd_size 0) {
+initrd_offset = (kernel_high + ~TARGET_PAGE_MASK)
TARGET_PAGE_MASK;
+if (initrd_offset + initrd_size loaderparams.ram_size) {
+fprintf(stderr,
+qemu: memory too small for initial ram disk '%s'\n,
+loaderparams.initrd_filename);
+exit(1);
+}
+initrd_size = load_image_targphys(loaderparams.initrd_filename,
+ initrd_offset,
+ ram_size);
+}
+if (initrd_size == (target_ulong) -1) {
+fprintf(stderr, qemu: could not load initial ram disk '%s'\n,
+loaderparams.initrd_filename);
+exit(1);
+}
+}
+}
+
+static void main_cpu_reset(void *opaque)
+{
+MoxieCPU *cpu = opaque;
+
+cpu_reset(CPU(cpu));
+}
+
+static inline DeviceState *
+moxie_intc_create(hwaddr base, qemu_irq irq, int kind_of_intr)
+{
+DeviceState *dev;
+
+dev = qdev_create(NULL, moxie,intc);
+qdev_prop_set_uint32(dev, kind-of-intr, kind_of_intr);
+qdev_init_nofail(dev);
+sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
+return dev;
+}
+
+static void moxiesim_init(QEMUMachineInitArgs *args)
+{
+MoxieCPU *cpu = NULL;
+ram_addr_t ram_size = args-ram_size;
+const char *cpu_model = args-cpu_model;
+const char *kernel_filename = args-kernel_filename;
+const char *kernel_cmdline = args-kernel_cmdline;
+const char *initrd_filename = args-initrd_filename;
+CPUMoxieState *env;
+MemoryRegion *address_space_mem = get_system_memory();
+MemoryRegion *ram = g_new(MemoryRegion, 1);
+MemoryRegion *rom = g_new(MemoryRegion
[Qemu-devel] [PATCH moxie 2/5] Add moxie disassembler
This patch adds the disassembler logic for moxie.
From 57158c29b2956d03c5948b530fa476e26c893000 Mon Sep 17 00:00:00 2001
From: Anthony Green gr...@moxielogic.com
Date: Wed, 13 Feb 2013 16:44:45 -0500
Subject: [PATCH 2/5] Add moxie disassembler
Signed-off-by: Anthony Green gr...@moxielogic.com
---
disas.c | 6 +
disas/Makefile.objs | 1 +
disas/moxie.c | 369
include/disas/bfd.h | 2 +
4 files changed, 378 insertions(+)
create mode 100644 disas/moxie.c
diff --git a/disas.c b/disas.c
index a46faee..74d3ba0 100644
--- a/disas.c
+++ b/disas.c
@@ -256,6 +256,9 @@ void target_disas(FILE *out, CPUArchState *env,
target_ulong code,
#elif defined(TARGET_MICROBLAZE)
s.info.mach = bfd_arch_microblaze;
print_insn = print_insn_microblaze;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
@@ -462,6 +465,9 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
#elif defined(TARGET_S390X)
s.info.mach = bfd_mach_s390_64;
print_insn = print_insn_s390;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
diff --git a/disas/Makefile.objs b/disas/Makefile.objs
index ed75f9a..3b1e77a 100644
--- a/disas/Makefile.objs
+++ b/disas/Makefile.objs
@@ -7,6 +7,7 @@ common-obj-$(CONFIG_IA64_DIS) += ia64.o
common-obj-$(CONFIG_M68K_DIS) += m68k.o
common-obj-$(CONFIG_MICROBLAZE_DIS) += microblaze.o
common-obj-$(CONFIG_MIPS_DIS) += mips.o
+common-obj-$(CONFIG_MOXIE_DIS) += moxie.o
common-obj-$(CONFIG_PPC_DIS) += ppc.o
common-obj-$(CONFIG_S390_DIS) += s390.o
common-obj-$(CONFIG_SH4_DIS) += sh4.o
diff --git a/disas/moxie.c b/disas/moxie.c
new file mode 100644
index 000..20ae0eb
--- /dev/null
+++ b/disas/moxie.c
@@ -0,0 +1,369 @@
+/* Disassemble moxie instructions.
+ Copyright 2009
+ Free Software Foundation, Inc.
+
+ This file is part of the GNU opcodes library.
+
+ This library is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+#include stdio.h
+#define STATIC_TABLE
+#define DEFINE_TABLE
+
+#include disas/bfd.h
+
+static void *stream;
+
+/* Form 1 instructions come in different flavors:
+
+ Some have no arguments (MOXIE_F1_NARG)
+ Some only use the A operand (MOXIE_F1_A)
+ Some use A and B registers (MOXIE_F1_AB)
+ Some use A and consume a 4 byte immediate value (MOXIE_F1_A4)
+ Some use just a 4 byte immediate value (MOXIE_F1_4)
+ Some use just a 4 byte memory address (MOXIE_F1_M)
+ Some use B and an indirect A(MOXIE_F1_AiB)
+ Some use A and an indirect B(MOXIE_F1_ABi)
+ Some consume a 4 byte immediate value and use X (MOXIE_F1_4A)
+ Some use B and an indirect A plus 4 bytes (MOXIE_F1_AiB4)
+ Some use A and an indirect B plus 4 bytes (MOXIE_F1_ABi4)
+
+ Form 2 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F2_NARG)
+ Some use the A register and an 8-bit value (MOXIE_F2_A8V)
+
+ Form 3 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F3_NARG)
+ Some have a 10-bit PC relative operand (MOXIE_F3_PCREL). */
+
+#define MOXIE_F1_NARG 0x100
+#define MOXIE_F1_A0x101
+#define MOXIE_F1_AB 0x102
+/* #define MOXIE_F1_ABC 0x103 */
+#define MOXIE_F1_A4 0x104
+#define MOXIE_F1_40x105
+#define MOXIE_F1_AiB 0x106
+#define MOXIE_F1_ABi 0x107
+#define MOXIE_F1_4A 0x108
+#define MOXIE_F1_AiB4 0x109
+#define MOXIE_F1_ABi4 0x10a
+#define MOXIE_F1_M0x10b
+
+#define MOXIE_F2_NARG 0x200
+#define MOXIE_F2_A8V 0x201
+
+#define MOXIE_F3_NARG 0x300
+#define MOXIE_F3_PCREL 0x301
+
+typedef struct moxie_opc_info_t {
+ short opcode;
+ unsigned itype;
+ const char * name;
+} moxie_opc_info_t;
+
+extern const moxie_opc_info_t moxie_form1_opc_info[64];
+extern const moxie_opc_info_t moxie_form2_opc_info[4];
+extern const moxie_opc_info_t moxie_form3_opc_info[16];
+
+/* The moxie processor's 16-bit
[Qemu-devel] [PATCH moxie 1/5] New port contribution
Hello qemu maintainers, I have been maintaining a qemu port for moxie on github for a few years now, and would now like to submit it upstream. Moxie is a soft-core architecture, similar to lm32 and microblaze. The GNU toolchain has supported moxie for several years now. The qemu port is very basic, but sufficient to bring up a uClinux kernel port. Thank you, Anthony Green From aaa3802f785954ddafd696a1ed61ea40ea59db5f Mon Sep 17 00:00:00 2001 From: Anthony Green gr...@moxielogic.com Date: Wed, 13 Feb 2013 16:43:46 -0500 Subject: [PATCH 1/5] Add myself as moxie maintainer Signed-off-by: Anthony Green gr...@moxielogic.com --- MAINTAINERS | 5 + 1 file changed, 5 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 21043e4..b970159 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -91,6 +91,11 @@ M: Aurelien Jarno aurel...@aurel32.net S: Odd Fixes F: target-mips/ +Moxie +M: Anthony Green gr...@moxielogic.com +S: Maintained +F: target-moxie/ + PowerPC M: Alexander Graf ag...@suse.de L: qemu-...@nongnu.org -- 1.8.1.2
Re: [Qemu-devel] [PATCH moxie 4/5] Add sample moxie system
Thanks to you and everybody else for the detailed feedback. I really appreciate the time you put into this. I've cleaned up the formatting and licensing, and will address the other comments when I repost my patches in the new few days. Thanks, AG On Thu, Feb 14, 2013 at 7:08 AM, Andreas Färber afaer...@suse.de wrote: Am 13.02.2013 23:27, schrieb Anthony Green: Add a simple moxie target, similar to what we have in the gdb simulator today. Signed-off-by: Anthony Green gr...@moxielogic.com --- hw/moxie/Makefile.objs | 5 ++ hw/moxiesim.c | 200 + include/sysemu/arch_init.h | 1 + 3 files changed, 206 insertions(+) create mode 100644 hw/moxie/Makefile.objs create mode 100644 hw/moxiesim.c Patch has Coding Style issues and is line-wrapped, i.e. broken. Please place your moxie-specific board in hw/moxie/. In Makefile.objs just place obj-y = moxiesim.o below the $(addprefix ...) line. Also respect C99 by not using underscore at the beginning of identifiers (e.g., struct _loaderparams - struct LoaderParams). Are you aware that your loaderparams truncate ram_size from ram_addr_t to int? If you don't want to use ram_addr_t there you might want to use [u]int64_t. Again some overuses of CPUMoxieState, please fix. Please make your QEMUMachine static, it is not needed elsewhere. Please drop semicolon after machine_init() macro, it's not a statement. Please add a comma after QEMU_ARCH_MOXIE enum entry so that further architectures can more easily be added. Are pic_info and irq_info really needed? If so, they would be candidates to place in stubs/ directory instead. There's #if 0'ed code. If there's a question about that, please label as RFC rather than PATCH. Otherwise please drop. Regards, Andreas -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
[Qemu-devel] [PATCH v2 3/4] Add sample moxie system
Signed-off-by: Anthony Green gr...@moxielogic.com
---
hw/moxie/Makefile.objs | 6 ++
hw/moxie/moxiesim.c| 175 +
include/sysemu/arch_init.h | 1 +
3 files changed, 182 insertions(+)
create mode 100644 hw/moxie/Makefile.objs
create mode 100644 hw/moxie/moxiesim.c
diff --git a/hw/moxie/Makefile.objs b/hw/moxie/Makefile.objs
new file mode 100644
index 000..873c680
--- /dev/null
+++ b/hw/moxie/Makefile.objs
@@ -0,0 +1,6 @@
+# moxie boards
+obj-y = serial.o mc146818rtc.o vga.o
+obj-$(CONFIG_FDT) += device_tree.o
+
+obj-y := $(addprefix ../,$(obj-y))
+obj-y += moxiesim.o
\ No newline at end of file
diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c
new file mode 100644
index 000..3b04f5e
--- /dev/null
+++ b/hw/moxie/moxiesim.c
@@ -0,0 +1,175 @@
+/*
+ * QEMU/moxiesim emulation
+ *
+ * Emulates a very simple machine model similiar to the one use by the
+ * GDB moxie simulator.
+ *
+ * Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include hw/sysbus.h
+#include hw/hw.h
+#include hw/pc.h
+#include hw/isa.h
+#include net/net.h
+#include sysemu/sysemu.h
+#include hw/boards.h
+#include hw/loader.h
+#include hw/serial.h
+#include exec/address-spaces.h
+
+#define PHYS_MEM_BASE 0x8000
+
+static struct loaderparams {
+uint64_t ram_size;
+const char *kernel_filename;
+const char *kernel_cmdline;
+const char *initrd_filename;
+} loaderparams;
+
+static void load_kernel(MoxieCPU *cpu)
+{
+uint64_t entry, kernel_low, kernel_high;
+long kernel_size;
+long initrd_size;
+ram_addr_t initrd_offset;
+kernel_size = load_elf(loaderparams.kernel_filename, NULL, NULL,
+ entry, kernel_low, kernel_high, 1,
+ ELF_MACHINE, 0);
+if (kernel_size = 0) {
+cpu-env.pc = (unsigned) entry;
+} else {
+fprintf(stderr, qemu: could not load kernel '%s'\n,
+loaderparams.kernel_filename);
+exit(1);
+}
+
+/* load initrd */
+initrd_size = 0;
+initrd_offset = 0;
+if (loaderparams.initrd_filename) {
+initrd_size = get_image_size(loaderparams.initrd_filename);
+if (initrd_size 0) {
+initrd_offset = (kernel_high + ~TARGET_PAGE_MASK)
+ TARGET_PAGE_MASK;
+if (initrd_offset + initrd_size loaderparams.ram_size) {
+fprintf(stderr,
+qemu: memory too small for initial ram disk '%s'\n,
+loaderparams.initrd_filename);
+exit(1);
+}
+initrd_size = load_image_targphys(loaderparams.initrd_filename,
+ initrd_offset,
+ ram_size);
+}
+if (initrd_size == (target_ulong)-1) {
+fprintf(stderr, qemu: could not load initial ram disk '%s'\n,
+loaderparams.initrd_filename);
+exit(1);
+}
+}
+}
+
+static void main_cpu_reset(void *opaque)
+{
+MoxieCPU *cpu = opaque;
+
+cpu_reset(CPU(cpu));
+}
+
+static inline DeviceState *
+moxie_intc_create(hwaddr base, qemu_irq irq, int kind_of_intr)
+{
+DeviceState *dev;
+
+dev = qdev_create(NULL, moxie,intc);
+qdev_prop_set_uint32(dev, kind-of-intr, kind_of_intr);
+qdev_init_nofail(dev);
+sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
+return dev;
+}
+
+static void moxiesim_init(QEMUMachineInitArgs *args)
+{
+MoxieCPU *cpu = NULL;
+ram_addr_t ram_size = args-ram_size;
+const char *cpu_model = args-cpu_model;
+const char *kernel_filename = args-kernel_filename;
+const char *kernel_cmdline = args-kernel_cmdline;
+const char *initrd_filename = args-initrd_filename;
+CPUMoxieState *env;
+MemoryRegion
[Qemu-devel] [PATCH v2 2/4] Add moxie disassembler
Signed-off-by: Anthony Green gr...@moxielogic.com
---
disas.c | 6 +
disas/Makefile.objs | 1 +
disas/moxie.c | 360
3 files changed, 367 insertions(+)
create mode 100644 disas/moxie.c
diff --git a/disas.c b/disas.c
index a46faee..74d3ba0 100644
--- a/disas.c
+++ b/disas.c
@@ -256,6 +256,9 @@ void target_disas(FILE *out, CPUArchState *env,
target_ulong code,
#elif defined(TARGET_MICROBLAZE)
s.info.mach = bfd_arch_microblaze;
print_insn = print_insn_microblaze;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
@@ -462,6 +465,9 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
#elif defined(TARGET_S390X)
s.info.mach = bfd_mach_s390_64;
print_insn = print_insn_s390;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
diff --git a/disas/Makefile.objs b/disas/Makefile.objs
index ed75f9a..3b1e77a 100644
--- a/disas/Makefile.objs
+++ b/disas/Makefile.objs
@@ -7,6 +7,7 @@ common-obj-$(CONFIG_IA64_DIS) += ia64.o
common-obj-$(CONFIG_M68K_DIS) += m68k.o
common-obj-$(CONFIG_MICROBLAZE_DIS) += microblaze.o
common-obj-$(CONFIG_MIPS_DIS) += mips.o
+common-obj-$(CONFIG_MOXIE_DIS) += moxie.o
common-obj-$(CONFIG_PPC_DIS) += ppc.o
common-obj-$(CONFIG_S390_DIS) += s390.o
common-obj-$(CONFIG_SH4_DIS) += sh4.o
diff --git a/disas/moxie.c b/disas/moxie.c
new file mode 100644
index 000..4c5f180
--- /dev/null
+++ b/disas/moxie.c
@@ -0,0 +1,360 @@
+/* Disassemble moxie instructions.
+ Copyright (c) 2009 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see http://www.gnu.org/licenses/. */
+
+#include stdio.h
+#define STATIC_TABLE
+#define DEFINE_TABLE
+
+#include disas/bfd.h
+
+static void *stream;
+
+/* Form 1 instructions come in different flavors:
+
+ Some have no arguments (MOXIE_F1_NARG)
+ Some only use the A operand (MOXIE_F1_A)
+ Some use A and B registers (MOXIE_F1_AB)
+ Some use A and consume a 4 byte immediate value (MOXIE_F1_A4)
+ Some use just a 4 byte immediate value (MOXIE_F1_4)
+ Some use just a 4 byte memory address (MOXIE_F1_M)
+ Some use B and an indirect A(MOXIE_F1_AiB)
+ Some use A and an indirect B(MOXIE_F1_ABi)
+ Some consume a 4 byte immediate value and use X (MOXIE_F1_4A)
+ Some use B and an indirect A plus 4 bytes (MOXIE_F1_AiB4)
+ Some use A and an indirect B plus 4 bytes (MOXIE_F1_ABi4)
+
+ Form 2 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F2_NARG)
+ Some use the A register and an 8-bit value (MOXIE_F2_A8V)
+
+ Form 3 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F3_NARG)
+ Some have a 10-bit PC relative operand (MOXIE_F3_PCREL). */
+
+#define MOXIE_F1_NARG 0x100
+#define MOXIE_F1_A0x101
+#define MOXIE_F1_AB 0x102
+/* #define MOXIE_F1_ABC 0x103 */
+#define MOXIE_F1_A4 0x104
+#define MOXIE_F1_40x105
+#define MOXIE_F1_AiB 0x106
+#define MOXIE_F1_ABi 0x107
+#define MOXIE_F1_4A 0x108
+#define MOXIE_F1_AiB4 0x109
+#define MOXIE_F1_ABi4 0x10a
+#define MOXIE_F1_M0x10b
+
+#define MOXIE_F2_NARG 0x200
+#define MOXIE_F2_A8V 0x201
+
+#define MOXIE_F3_NARG 0x300
+#define MOXIE_F3_PCREL 0x301
+
+typedef struct moxie_opc_info_t {
+short opcode;
+unsigned itype;
+const char * name;
+} moxie_opc_info_t;
+
+extern const moxie_opc_info_t moxie_form1_opc_info[64];
+extern const moxie_opc_info_t moxie_form2_opc_info[4];
+extern const moxie_opc_info_t moxie_form3_opc_info[16];
+
+/* The moxie processor's 16-bit instructions come in two forms:
+
+ FORM 1 instructions start with a 0 bit...
+
+ 0ooo
+ 0 F
+
+ ooo - form 1 opcode number
+ - operand A
+ - operand B
+
+ FORM 2 instructions start with bits 10...
+
+ 10oo
+ 0 F
+
+ oo - form 2 opcode number
+ - operand A
+ - 8
[Qemu-devel] [PATCH v2 4/4] Add top level changes for moxie
Signed-off-by: Anthony Green gr...@moxielogic.com
---
MAINTAINERS | 5 +
arch_init.c | 2 ++
configure | 12 +++-
cpu-exec.c| 2 ++
default-configs/moxie-softmmu.mak | 2 ++
qapi-schema.json | 6 +++---
6 files changed, 25 insertions(+), 4 deletions(-)
create mode 100644 default-configs/moxie-softmmu.mak
diff --git a/MAINTAINERS b/MAINTAINERS
index 21043e4..b970159 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -91,6 +91,11 @@ M: Aurelien Jarno aurel...@aurel32.net
S: Odd Fixes
F: target-mips/
+Moxie
+M: Anthony Green gr...@moxielogic.com
+S: Maintained
+F: target-moxie/
+
PowerPC
M: Alexander Graf ag...@suse.de
L: qemu-...@nongnu.org
diff --git a/arch_init.c b/arch_init.c
index 8da868b..f82ed2d 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -85,6 +85,8 @@ int graphic_depth = 15;
#define QEMU_ARCH QEMU_ARCH_MICROBLAZE
#elif defined(TARGET_MIPS)
#define QEMU_ARCH QEMU_ARCH_MIPS
+#elif defined(TARGET_MOXIE)
+#define QEMU_ARCH QEMU_ARCH_MOXIE
#elif defined(TARGET_OPENRISC)
#define QEMU_ARCH QEMU_ARCH_OPENRISC
#elif defined(TARGET_PPC)
diff --git a/configure b/configure
index dcaa67c..02d75db 100755
--- a/configure
+++ b/configure
@@ -955,6 +955,7 @@ mips-softmmu \
mipsel-softmmu \
mips64-softmmu \
mips64el-softmmu \
+moxie-softmmu \
or32-softmmu \
ppc-softmmu \
ppcemb-softmmu \
@@ -3898,7 +3899,7 @@ target_arch2=`echo $target | cut -d '-' -f 1`
target_bigendian=no
case $target_arch2 in
-
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
+
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
target_bigendian=yes
;;
esac
@@ -4003,6 +4004,11 @@ case $target_arch2 in
echo TARGET_ABI_MIPSN64=y $config_target_mak
target_long_alignment=8
;;
+ moxie)
+TARGET_ARCH=moxie
+bflt=yes
+target_phys_bits=32
+ ;;
or32)
TARGET_ARCH=openrisc
TARGET_BASE_ARCH=openrisc
@@ -4247,6 +4253,10 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
echo CONFIG_MIPS_DIS=y $config_target_mak
echo CONFIG_MIPS_DIS=y config-all-disas.mak
;;
+ moxie*)
+echo CONFIG_MOXIE_DIS=y $config_target_mak
+echo CONFIG_MOXIE_DIS=y config-all-disas.mak
+ ;;
or32)
echo CONFIG_OPENRISC_DIS=y $config_target_mak
echo CONFIG_OPENRISC_DIS=y config-all-disas.mak
diff --git a/cpu-exec.c b/cpu-exec.c
index afbe497..ba7ea41 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -221,6 +221,7 @@ int cpu_exec(CPUArchState *env)
#elif defined(TARGET_LM32)
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_CRIS)
@@ -655,6 +656,7 @@ int cpu_exec(CPUArchState *env)
| env-cc_dest | (env-cc_x 4);
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_ALPHA)
diff --git a/default-configs/moxie-softmmu.mak
b/default-configs/moxie-softmmu.mak
new file mode 100644
index 000..d378363
--- /dev/null
+++ b/default-configs/moxie-softmmu.mak
@@ -0,0 +1,2 @@
+# Default configuration for moxie-softmmu
+
diff --git a/qapi-schema.json b/qapi-schema.json
index cd7ea25..cf5cd60 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -2944,9 +2944,9 @@
##
{ 'enum': 'TargetType',
'data': [ 'alpha', 'arm', 'cris', 'i386', 'lm32', 'm68k', 'microblazeel',
-'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'or32',
-'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4', 'sparc64',
-'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
+'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'moxie',
+'or32', 'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4',
+'sparc64', 'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
##
# @TargetInfo:
--
1.8.1.2
[Qemu-devel] [PATCH v2 0/4] Moxie CPU target port
This is my resubmission of the moxie port. Thank you for all of the feedback on my first attempt. I believe that these patches address all of the reviewer comments, with the exception of some of rth's code refactoring suggestions around cmp and branch instructions. I'll work on that after approval. Also note that I relicensed the disassembler code, since I am the sole author, but it still doesn't pass checkpatch.pl cleanly because it is based on binutils formatting conventions. Thank you! AG Anthony Green (4): Add moxie target code Add moxie disassembler Add sample moxie system Add top level changes for moxie MAINTAINERS |5 + arch_init.c |2 + configure | 12 +- cpu-exec.c|2 + default-configs/moxie-softmmu.mak |2 + disas.c |6 + disas/Makefile.objs |1 + disas/moxie.c | 360 hw/moxie/Makefile.objs|6 + hw/moxie/moxiesim.c | 175 ++ include/sysemu/arch_init.h|1 + qapi-schema.json |6 +- target-moxie/Makefile.objs|2 + target-moxie/cpu.c| 177 ++ target-moxie/cpu.h| 222 target-moxie/helper.c | 102 target-moxie/helper.h |6 + target-moxie/machine.c| 11 + target-moxie/mmu.c| 37 ++ target-moxie/mmu.h| 19 + target-moxie/op_helper.c | 80 +++ target-moxie/translate.c | 1084 + 22 files changed, 2314 insertions(+), 4 deletions(-) create mode 100644 default-configs/moxie-softmmu.mak create mode 100644 disas/moxie.c create mode 100644 hw/moxie/Makefile.objs create mode 100644 hw/moxie/moxiesim.c create mode 100644 target-moxie/Makefile.objs create mode 100644 target-moxie/cpu.c create mode 100644 target-moxie/cpu.h create mode 100644 target-moxie/helper.c create mode 100644 target-moxie/helper.h create mode 100644 target-moxie/machine.c create mode 100644 target-moxie/mmu.c create mode 100644 target-moxie/mmu.h create mode 100644 target-moxie/op_helper.c create mode 100644 target-moxie/translate.c -- 1.8.1.2
[Qemu-devel] [PATCH moxie] Fix bug in tlb_fill.
Fix a simple bug in tlb_fill for moxie. The port was mostly working
before, which is why I only really noticed it recently. Thanks to
@jcmvbkbc for tracking it down.
Signed-off-by: Anthony Green gr...@moxielogic.com
---
target-moxie/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-moxie/helper.c b/target-moxie/helper.c
index 6e0ac2a..6c36c49 100644
--- a/target-moxie/helper.c
+++ b/target-moxie/helper.c
@@ -55,8 +55,8 @@ void tlb_fill(CPUMoxieState *env, target_ulong addr, int
is_write, int mmu_idx,
if (retaddr) {
cpu_restore_state(env, retaddr);
}
+ cpu_loop_exit(env);
}
-cpu_loop_exit(env);
}
void helper_raise_exception(CPUMoxieState *env, int ex)
--
1.8.1.4
[Qemu-devel] [PATCH v3 0/4] Moxie CPU target port
One of the patches in v2 of this patch set was botched. This one is clean. Sorry about that, and thanks in advance... Anthony Green Anthony Green (4): Add moxie target code Add moxie disassembler Add sample moxie system Add top level changes for moxie MAINTAINERS |5 + arch_init.c |2 + configure | 12 +- cpu-exec.c|2 + default-configs/moxie-softmmu.mak |2 + disas.c |6 + disas/Makefile.objs |1 + disas/moxie.c | 360 hw/moxie/Makefile.objs|6 + hw/moxie/moxiesim.c | 175 ++ include/disas/bfd.h | 66 +-- include/sysemu/arch_init.h|1 + qapi-schema.json |6 +- target-moxie/Makefile.objs|2 + target-moxie/cpu.c| 177 ++ target-moxie/cpu.h| 222 target-moxie/helper.c | 102 target-moxie/helper.h |6 + target-moxie/machine.c| 11 + target-moxie/mmu.c| 37 ++ target-moxie/mmu.h| 19 + target-moxie/op_helper.c | 80 +++ target-moxie/translate.c | 1084 + 23 files changed, 2348 insertions(+), 36 deletions(-) create mode 100644 default-configs/moxie-softmmu.mak create mode 100644 disas/moxie.c create mode 100644 hw/moxie/Makefile.objs create mode 100644 hw/moxie/moxiesim.c create mode 100644 target-moxie/Makefile.objs create mode 100644 target-moxie/cpu.c create mode 100644 target-moxie/cpu.h create mode 100644 target-moxie/helper.c create mode 100644 target-moxie/helper.h create mode 100644 target-moxie/machine.c create mode 100644 target-moxie/mmu.c create mode 100644 target-moxie/mmu.h create mode 100644 target-moxie/op_helper.c create mode 100644 target-moxie/translate.c -- 1.8.1.2
[Qemu-devel] [PATCH v3 3/4] Add sample moxie system
Signed-off-by: Anthony Green gr...@moxielogic.com
---
hw/moxie/Makefile.objs | 6 ++
hw/moxie/moxiesim.c| 175 +
include/sysemu/arch_init.h | 1 +
3 files changed, 182 insertions(+)
create mode 100644 hw/moxie/Makefile.objs
create mode 100644 hw/moxie/moxiesim.c
diff --git a/hw/moxie/Makefile.objs b/hw/moxie/Makefile.objs
new file mode 100644
index 000..873c680
--- /dev/null
+++ b/hw/moxie/Makefile.objs
@@ -0,0 +1,6 @@
+# moxie boards
+obj-y = serial.o mc146818rtc.o vga.o
+obj-$(CONFIG_FDT) += device_tree.o
+
+obj-y := $(addprefix ../,$(obj-y))
+obj-y += moxiesim.o
\ No newline at end of file
diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c
new file mode 100644
index 000..3b04f5e
--- /dev/null
+++ b/hw/moxie/moxiesim.c
@@ -0,0 +1,175 @@
+/*
+ * QEMU/moxiesim emulation
+ *
+ * Emulates a very simple machine model similiar to the one use by the
+ * GDB moxie simulator.
+ *
+ * Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include hw/sysbus.h
+#include hw/hw.h
+#include hw/pc.h
+#include hw/isa.h
+#include net/net.h
+#include sysemu/sysemu.h
+#include hw/boards.h
+#include hw/loader.h
+#include hw/serial.h
+#include exec/address-spaces.h
+
+#define PHYS_MEM_BASE 0x8000
+
+static struct loaderparams {
+uint64_t ram_size;
+const char *kernel_filename;
+const char *kernel_cmdline;
+const char *initrd_filename;
+} loaderparams;
+
+static void load_kernel(MoxieCPU *cpu)
+{
+uint64_t entry, kernel_low, kernel_high;
+long kernel_size;
+long initrd_size;
+ram_addr_t initrd_offset;
+kernel_size = load_elf(loaderparams.kernel_filename, NULL, NULL,
+ entry, kernel_low, kernel_high, 1,
+ ELF_MACHINE, 0);
+if (kernel_size = 0) {
+cpu-env.pc = (unsigned) entry;
+} else {
+fprintf(stderr, qemu: could not load kernel '%s'\n,
+loaderparams.kernel_filename);
+exit(1);
+}
+
+/* load initrd */
+initrd_size = 0;
+initrd_offset = 0;
+if (loaderparams.initrd_filename) {
+initrd_size = get_image_size(loaderparams.initrd_filename);
+if (initrd_size 0) {
+initrd_offset = (kernel_high + ~TARGET_PAGE_MASK)
+ TARGET_PAGE_MASK;
+if (initrd_offset + initrd_size loaderparams.ram_size) {
+fprintf(stderr,
+qemu: memory too small for initial ram disk '%s'\n,
+loaderparams.initrd_filename);
+exit(1);
+}
+initrd_size = load_image_targphys(loaderparams.initrd_filename,
+ initrd_offset,
+ ram_size);
+}
+if (initrd_size == (target_ulong)-1) {
+fprintf(stderr, qemu: could not load initial ram disk '%s'\n,
+loaderparams.initrd_filename);
+exit(1);
+}
+}
+}
+
+static void main_cpu_reset(void *opaque)
+{
+MoxieCPU *cpu = opaque;
+
+cpu_reset(CPU(cpu));
+}
+
+static inline DeviceState *
+moxie_intc_create(hwaddr base, qemu_irq irq, int kind_of_intr)
+{
+DeviceState *dev;
+
+dev = qdev_create(NULL, moxie,intc);
+qdev_prop_set_uint32(dev, kind-of-intr, kind_of_intr);
+qdev_init_nofail(dev);
+sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
+return dev;
+}
+
+static void moxiesim_init(QEMUMachineInitArgs *args)
+{
+MoxieCPU *cpu = NULL;
+ram_addr_t ram_size = args-ram_size;
+const char *cpu_model = args-cpu_model;
+const char *kernel_filename = args-kernel_filename;
+const char *kernel_cmdline = args-kernel_cmdline;
+const char *initrd_filename = args-initrd_filename;
+CPUMoxieState *env;
+MemoryRegion
[Qemu-devel] [PATCH v3 2/4] Add moxie disassembler
Signed-off-by: Anthony Green gr...@moxielogic.com
---
disas.c | 6 +
disas/Makefile.objs | 1 +
disas/moxie.c | 360
include/disas/bfd.h | 66 +-
4 files changed, 401 insertions(+), 32 deletions(-)
create mode 100644 disas/moxie.c
diff --git a/disas.c b/disas.c
index a46faee..74d3ba0 100644
--- a/disas.c
+++ b/disas.c
@@ -256,6 +256,9 @@ void target_disas(FILE *out, CPUArchState *env,
target_ulong code,
#elif defined(TARGET_MICROBLAZE)
s.info.mach = bfd_arch_microblaze;
print_insn = print_insn_microblaze;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
@@ -462,6 +465,9 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
#elif defined(TARGET_S390X)
s.info.mach = bfd_mach_s390_64;
print_insn = print_insn_s390;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
diff --git a/disas/Makefile.objs b/disas/Makefile.objs
index ed75f9a..3b1e77a 100644
--- a/disas/Makefile.objs
+++ b/disas/Makefile.objs
@@ -7,6 +7,7 @@ common-obj-$(CONFIG_IA64_DIS) += ia64.o
common-obj-$(CONFIG_M68K_DIS) += m68k.o
common-obj-$(CONFIG_MICROBLAZE_DIS) += microblaze.o
common-obj-$(CONFIG_MIPS_DIS) += mips.o
+common-obj-$(CONFIG_MOXIE_DIS) += moxie.o
common-obj-$(CONFIG_PPC_DIS) += ppc.o
common-obj-$(CONFIG_S390_DIS) += s390.o
common-obj-$(CONFIG_SH4_DIS) += sh4.o
diff --git a/disas/moxie.c b/disas/moxie.c
new file mode 100644
index 000..4c5f180
--- /dev/null
+++ b/disas/moxie.c
@@ -0,0 +1,360 @@
+/* Disassemble moxie instructions.
+ Copyright (c) 2009 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see http://www.gnu.org/licenses/. */
+
+#include stdio.h
+#define STATIC_TABLE
+#define DEFINE_TABLE
+
+#include disas/bfd.h
+
+static void *stream;
+
+/* Form 1 instructions come in different flavors:
+
+ Some have no arguments (MOXIE_F1_NARG)
+ Some only use the A operand (MOXIE_F1_A)
+ Some use A and B registers (MOXIE_F1_AB)
+ Some use A and consume a 4 byte immediate value (MOXIE_F1_A4)
+ Some use just a 4 byte immediate value (MOXIE_F1_4)
+ Some use just a 4 byte memory address (MOXIE_F1_M)
+ Some use B and an indirect A(MOXIE_F1_AiB)
+ Some use A and an indirect B(MOXIE_F1_ABi)
+ Some consume a 4 byte immediate value and use X (MOXIE_F1_4A)
+ Some use B and an indirect A plus 4 bytes (MOXIE_F1_AiB4)
+ Some use A and an indirect B plus 4 bytes (MOXIE_F1_ABi4)
+
+ Form 2 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F2_NARG)
+ Some use the A register and an 8-bit value (MOXIE_F2_A8V)
+
+ Form 3 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F3_NARG)
+ Some have a 10-bit PC relative operand (MOXIE_F3_PCREL). */
+
+#define MOXIE_F1_NARG 0x100
+#define MOXIE_F1_A0x101
+#define MOXIE_F1_AB 0x102
+/* #define MOXIE_F1_ABC 0x103 */
+#define MOXIE_F1_A4 0x104
+#define MOXIE_F1_40x105
+#define MOXIE_F1_AiB 0x106
+#define MOXIE_F1_ABi 0x107
+#define MOXIE_F1_4A 0x108
+#define MOXIE_F1_AiB4 0x109
+#define MOXIE_F1_ABi4 0x10a
+#define MOXIE_F1_M0x10b
+
+#define MOXIE_F2_NARG 0x200
+#define MOXIE_F2_A8V 0x201
+
+#define MOXIE_F3_NARG 0x300
+#define MOXIE_F3_PCREL 0x301
+
+typedef struct moxie_opc_info_t {
+short opcode;
+unsigned itype;
+const char * name;
+} moxie_opc_info_t;
+
+extern const moxie_opc_info_t moxie_form1_opc_info[64];
+extern const moxie_opc_info_t moxie_form2_opc_info[4];
+extern const moxie_opc_info_t moxie_form3_opc_info[16];
+
+/* The moxie processor's 16-bit instructions come in two forms:
+
+ FORM 1 instructions start with a 0 bit...
+
+ 0ooo
+ 0 F
+
+ ooo - form 1 opcode number
+ - operand A
+ - operand B
+
+ FORM 2 instructions start with bits 10...
+
+ 10oo
+ 0 F
+
+ oo - form 2
[Qemu-devel] [PATCH v3 4/4] Add top level changes for moxie
Signed-off-by: Anthony Green gr...@moxielogic.com
---
MAINTAINERS | 5 +
arch_init.c | 2 ++
configure | 12 +++-
cpu-exec.c| 2 ++
default-configs/moxie-softmmu.mak | 2 ++
qapi-schema.json | 6 +++---
6 files changed, 25 insertions(+), 4 deletions(-)
create mode 100644 default-configs/moxie-softmmu.mak
diff --git a/MAINTAINERS b/MAINTAINERS
index 21043e4..b970159 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -91,6 +91,11 @@ M: Aurelien Jarno aurel...@aurel32.net
S: Odd Fixes
F: target-mips/
+Moxie
+M: Anthony Green gr...@moxielogic.com
+S: Maintained
+F: target-moxie/
+
PowerPC
M: Alexander Graf ag...@suse.de
L: qemu-...@nongnu.org
diff --git a/arch_init.c b/arch_init.c
index 8da868b..f82ed2d 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -85,6 +85,8 @@ int graphic_depth = 15;
#define QEMU_ARCH QEMU_ARCH_MICROBLAZE
#elif defined(TARGET_MIPS)
#define QEMU_ARCH QEMU_ARCH_MIPS
+#elif defined(TARGET_MOXIE)
+#define QEMU_ARCH QEMU_ARCH_MOXIE
#elif defined(TARGET_OPENRISC)
#define QEMU_ARCH QEMU_ARCH_OPENRISC
#elif defined(TARGET_PPC)
diff --git a/configure b/configure
index dcaa67c..02d75db 100755
--- a/configure
+++ b/configure
@@ -955,6 +955,7 @@ mips-softmmu \
mipsel-softmmu \
mips64-softmmu \
mips64el-softmmu \
+moxie-softmmu \
or32-softmmu \
ppc-softmmu \
ppcemb-softmmu \
@@ -3898,7 +3899,7 @@ target_arch2=`echo $target | cut -d '-' -f 1`
target_bigendian=no
case $target_arch2 in
-
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
+
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
target_bigendian=yes
;;
esac
@@ -4003,6 +4004,11 @@ case $target_arch2 in
echo TARGET_ABI_MIPSN64=y $config_target_mak
target_long_alignment=8
;;
+ moxie)
+TARGET_ARCH=moxie
+bflt=yes
+target_phys_bits=32
+ ;;
or32)
TARGET_ARCH=openrisc
TARGET_BASE_ARCH=openrisc
@@ -4247,6 +4253,10 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
echo CONFIG_MIPS_DIS=y $config_target_mak
echo CONFIG_MIPS_DIS=y config-all-disas.mak
;;
+ moxie*)
+echo CONFIG_MOXIE_DIS=y $config_target_mak
+echo CONFIG_MOXIE_DIS=y config-all-disas.mak
+ ;;
or32)
echo CONFIG_OPENRISC_DIS=y $config_target_mak
echo CONFIG_OPENRISC_DIS=y config-all-disas.mak
diff --git a/cpu-exec.c b/cpu-exec.c
index afbe497..ba7ea41 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -221,6 +221,7 @@ int cpu_exec(CPUArchState *env)
#elif defined(TARGET_LM32)
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_CRIS)
@@ -655,6 +656,7 @@ int cpu_exec(CPUArchState *env)
| env-cc_dest | (env-cc_x 4);
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_ALPHA)
diff --git a/default-configs/moxie-softmmu.mak
b/default-configs/moxie-softmmu.mak
new file mode 100644
index 000..d378363
--- /dev/null
+++ b/default-configs/moxie-softmmu.mak
@@ -0,0 +1,2 @@
+# Default configuration for moxie-softmmu
+
diff --git a/qapi-schema.json b/qapi-schema.json
index cd7ea25..cf5cd60 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -2944,9 +2944,9 @@
##
{ 'enum': 'TargetType',
'data': [ 'alpha', 'arm', 'cris', 'i386', 'lm32', 'm68k', 'microblazeel',
-'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'or32',
-'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4', 'sparc64',
-'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
+'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'moxie',
+'or32', 'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4',
+'sparc64', 'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
##
# @TargetInfo:
--
1.8.1.2
Re: [Qemu-devel] [PATCH moxie 3/5] Moxie target code
On Thu, Feb 14, 2013 at 6:19 PM, Richard Henderson r...@twiddle.net wrote:
On 02/13/2013 02:26 PM, Anthony Green wrote:
+case 0x03: /* jsra */
+ {
+/* Load the stack pointer into T0. */
+TCGv t1 = new_tmp();
+TCGv t2 = new_tmp();
+
+tcg_gen_movi_i32(t1, ctx-pc+6);
+
+/* Make space for the static chain and return address. */
+tcg_gen_subi_i32(t2, REG(1), 8);
+tcg_gen_mov_i32(REG(1), t2);
+tcg_gen_qemu_st32(t1, REG(1), ctx-memidx);
+
+/* Push the current frame pointer. */
+tcg_gen_subi_i32(t2, REG(1), 4);
+tcg_gen_mov_i32(REG(1), t2);
+tcg_gen_qemu_st32(REG(0), REG(1), ctx-memidx);
There are two exceptions that can be taken here, for the two stores.
Are you certain that REG(1) should be updated before both are handled?
Should the write to REG(1) be delayed until after the second store?
You raise a good point, but that's approximately how the hardware works today.
We write to $sp midway through the multi-cycle jsr instruction (before
the second write).
https://github.com/atgreen/moxie-cores/blob/master/cores/MoxieLite/moxielite.vhd#L932
Something to put on the TODO list for both hw and qemu.
+case 0x04: /* ret */
+ {
+TCGv t1 = new_tmp();
+
+/* The new $sp is the old $fp. */
+tcg_gen_mov_i32(REG(1), REG(0));
+
+/* Pop the frame pointer. */
+tcg_gen_qemu_ld32u(REG(0), REG(1), ctx-memidx);
+tcg_gen_addi_i32(t1, REG(1), 4);
+tcg_gen_mov_i32(REG(1), t1);
+
+
+/* Pop the return address and skip over the static chain
+ slot. */
+tcg_gen_qemu_ld32u(cpu_pc, REG(1), ctx-memidx);
+tcg_gen_addi_i32(t1, REG(1), 8);
+tcg_gen_mov_i32(REG(1), t1);
Similarly, should any global variable be updated before the second load?
Same comments apply to JSR and SWI.
Same answer applies.
Thanks,
AG
[Qemu-devel] [PATCH v4 0/4] Moxie CPU port
This version addresses Richard's latest set of comments re: translate.c. http://lists.gnu.org/archive/html/qemu-devel/2013-02/msg05035.html Thanks! AG Anthony Green (4): Add moxie target code Add moxie disassembler Add sample moxie system Add top level changes for moxie MAINTAINERS |5 + arch_init.c |2 + configure | 12 +- cpu-exec.c|2 + default-configs/moxie-softmmu.mak |2 + disas.c |6 + disas/Makefile.objs |1 + disas/moxie.c | 360 + hw/moxie/Makefile.objs|6 + hw/moxie/moxiesim.c | 175 +++ include/disas/bfd.h | 66 +-- include/sysemu/arch_init.h|1 + qapi-schema.json |6 +- target-moxie/Makefile.objs|2 + target-moxie/cpu.c| 177 +++ target-moxie/cpu.h| 222 target-moxie/helper.c | 100 target-moxie/helper.h |6 + target-moxie/machine.c| 11 + target-moxie/mmu.c| 37 ++ target-moxie/mmu.h| 19 + target-moxie/op_helper.c | 80 +++ target-moxie/translate.c | 1042 + 23 files changed, 2304 insertions(+), 36 deletions(-) create mode 100644 default-configs/moxie-softmmu.mak create mode 100644 disas/moxie.c create mode 100644 hw/moxie/Makefile.objs create mode 100644 hw/moxie/moxiesim.c create mode 100644 target-moxie/Makefile.objs create mode 100644 target-moxie/cpu.c create mode 100644 target-moxie/cpu.h create mode 100644 target-moxie/helper.c create mode 100644 target-moxie/helper.h create mode 100644 target-moxie/machine.c create mode 100644 target-moxie/mmu.c create mode 100644 target-moxie/mmu.h create mode 100644 target-moxie/op_helper.c create mode 100644 target-moxie/translate.c -- 1.8.1.2
[Qemu-devel] [PATCH v4 2/4] Add moxie disassembler
Signed-off-by: Anthony Green gr...@moxielogic.com
---
disas.c | 6 +
disas/Makefile.objs | 1 +
disas/moxie.c | 360
include/disas/bfd.h | 66 +-
4 files changed, 401 insertions(+), 32 deletions(-)
create mode 100644 disas/moxie.c
diff --git a/disas.c b/disas.c
index a46faee..74d3ba0 100644
--- a/disas.c
+++ b/disas.c
@@ -256,6 +256,9 @@ void target_disas(FILE *out, CPUArchState *env,
target_ulong code,
#elif defined(TARGET_MICROBLAZE)
s.info.mach = bfd_arch_microblaze;
print_insn = print_insn_microblaze;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
@@ -462,6 +465,9 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
#elif defined(TARGET_S390X)
s.info.mach = bfd_mach_s390_64;
print_insn = print_insn_s390;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
diff --git a/disas/Makefile.objs b/disas/Makefile.objs
index ed75f9a..3b1e77a 100644
--- a/disas/Makefile.objs
+++ b/disas/Makefile.objs
@@ -7,6 +7,7 @@ common-obj-$(CONFIG_IA64_DIS) += ia64.o
common-obj-$(CONFIG_M68K_DIS) += m68k.o
common-obj-$(CONFIG_MICROBLAZE_DIS) += microblaze.o
common-obj-$(CONFIG_MIPS_DIS) += mips.o
+common-obj-$(CONFIG_MOXIE_DIS) += moxie.o
common-obj-$(CONFIG_PPC_DIS) += ppc.o
common-obj-$(CONFIG_S390_DIS) += s390.o
common-obj-$(CONFIG_SH4_DIS) += sh4.o
diff --git a/disas/moxie.c b/disas/moxie.c
new file mode 100644
index 000..4c5f180
--- /dev/null
+++ b/disas/moxie.c
@@ -0,0 +1,360 @@
+/* Disassemble moxie instructions.
+ Copyright (c) 2009 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see http://www.gnu.org/licenses/. */
+
+#include stdio.h
+#define STATIC_TABLE
+#define DEFINE_TABLE
+
+#include disas/bfd.h
+
+static void *stream;
+
+/* Form 1 instructions come in different flavors:
+
+ Some have no arguments (MOXIE_F1_NARG)
+ Some only use the A operand (MOXIE_F1_A)
+ Some use A and B registers (MOXIE_F1_AB)
+ Some use A and consume a 4 byte immediate value (MOXIE_F1_A4)
+ Some use just a 4 byte immediate value (MOXIE_F1_4)
+ Some use just a 4 byte memory address (MOXIE_F1_M)
+ Some use B and an indirect A(MOXIE_F1_AiB)
+ Some use A and an indirect B(MOXIE_F1_ABi)
+ Some consume a 4 byte immediate value and use X (MOXIE_F1_4A)
+ Some use B and an indirect A plus 4 bytes (MOXIE_F1_AiB4)
+ Some use A and an indirect B plus 4 bytes (MOXIE_F1_ABi4)
+
+ Form 2 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F2_NARG)
+ Some use the A register and an 8-bit value (MOXIE_F2_A8V)
+
+ Form 3 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F3_NARG)
+ Some have a 10-bit PC relative operand (MOXIE_F3_PCREL). */
+
+#define MOXIE_F1_NARG 0x100
+#define MOXIE_F1_A0x101
+#define MOXIE_F1_AB 0x102
+/* #define MOXIE_F1_ABC 0x103 */
+#define MOXIE_F1_A4 0x104
+#define MOXIE_F1_40x105
+#define MOXIE_F1_AiB 0x106
+#define MOXIE_F1_ABi 0x107
+#define MOXIE_F1_4A 0x108
+#define MOXIE_F1_AiB4 0x109
+#define MOXIE_F1_ABi4 0x10a
+#define MOXIE_F1_M0x10b
+
+#define MOXIE_F2_NARG 0x200
+#define MOXIE_F2_A8V 0x201
+
+#define MOXIE_F3_NARG 0x300
+#define MOXIE_F3_PCREL 0x301
+
+typedef struct moxie_opc_info_t {
+short opcode;
+unsigned itype;
+const char * name;
+} moxie_opc_info_t;
+
+extern const moxie_opc_info_t moxie_form1_opc_info[64];
+extern const moxie_opc_info_t moxie_form2_opc_info[4];
+extern const moxie_opc_info_t moxie_form3_opc_info[16];
+
+/* The moxie processor's 16-bit instructions come in two forms:
+
+ FORM 1 instructions start with a 0 bit...
+
+ 0ooo
+ 0 F
+
+ ooo - form 1 opcode number
+ - operand A
+ - operand B
+
+ FORM 2 instructions start with bits 10...
+
+ 10oo
+ 0 F
+
+ oo - form 2
[Qemu-devel] [PATCH v4 3/4] Add sample moxie system
Signed-off-by: Anthony Green gr...@moxielogic.com
---
hw/moxie/Makefile.objs | 6 ++
hw/moxie/moxiesim.c| 175 +
include/sysemu/arch_init.h | 1 +
3 files changed, 182 insertions(+)
create mode 100644 hw/moxie/Makefile.objs
create mode 100644 hw/moxie/moxiesim.c
diff --git a/hw/moxie/Makefile.objs b/hw/moxie/Makefile.objs
new file mode 100644
index 000..873c680
--- /dev/null
+++ b/hw/moxie/Makefile.objs
@@ -0,0 +1,6 @@
+# moxie boards
+obj-y = serial.o mc146818rtc.o vga.o
+obj-$(CONFIG_FDT) += device_tree.o
+
+obj-y := $(addprefix ../,$(obj-y))
+obj-y += moxiesim.o
\ No newline at end of file
diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c
new file mode 100644
index 000..3b04f5e
--- /dev/null
+++ b/hw/moxie/moxiesim.c
@@ -0,0 +1,175 @@
+/*
+ * QEMU/moxiesim emulation
+ *
+ * Emulates a very simple machine model similiar to the one use by the
+ * GDB moxie simulator.
+ *
+ * Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include hw/sysbus.h
+#include hw/hw.h
+#include hw/pc.h
+#include hw/isa.h
+#include net/net.h
+#include sysemu/sysemu.h
+#include hw/boards.h
+#include hw/loader.h
+#include hw/serial.h
+#include exec/address-spaces.h
+
+#define PHYS_MEM_BASE 0x8000
+
+static struct loaderparams {
+uint64_t ram_size;
+const char *kernel_filename;
+const char *kernel_cmdline;
+const char *initrd_filename;
+} loaderparams;
+
+static void load_kernel(MoxieCPU *cpu)
+{
+uint64_t entry, kernel_low, kernel_high;
+long kernel_size;
+long initrd_size;
+ram_addr_t initrd_offset;
+kernel_size = load_elf(loaderparams.kernel_filename, NULL, NULL,
+ entry, kernel_low, kernel_high, 1,
+ ELF_MACHINE, 0);
+if (kernel_size = 0) {
+cpu-env.pc = (unsigned) entry;
+} else {
+fprintf(stderr, qemu: could not load kernel '%s'\n,
+loaderparams.kernel_filename);
+exit(1);
+}
+
+/* load initrd */
+initrd_size = 0;
+initrd_offset = 0;
+if (loaderparams.initrd_filename) {
+initrd_size = get_image_size(loaderparams.initrd_filename);
+if (initrd_size 0) {
+initrd_offset = (kernel_high + ~TARGET_PAGE_MASK)
+ TARGET_PAGE_MASK;
+if (initrd_offset + initrd_size loaderparams.ram_size) {
+fprintf(stderr,
+qemu: memory too small for initial ram disk '%s'\n,
+loaderparams.initrd_filename);
+exit(1);
+}
+initrd_size = load_image_targphys(loaderparams.initrd_filename,
+ initrd_offset,
+ ram_size);
+}
+if (initrd_size == (target_ulong)-1) {
+fprintf(stderr, qemu: could not load initial ram disk '%s'\n,
+loaderparams.initrd_filename);
+exit(1);
+}
+}
+}
+
+static void main_cpu_reset(void *opaque)
+{
+MoxieCPU *cpu = opaque;
+
+cpu_reset(CPU(cpu));
+}
+
+static inline DeviceState *
+moxie_intc_create(hwaddr base, qemu_irq irq, int kind_of_intr)
+{
+DeviceState *dev;
+
+dev = qdev_create(NULL, moxie,intc);
+qdev_prop_set_uint32(dev, kind-of-intr, kind_of_intr);
+qdev_init_nofail(dev);
+sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
+return dev;
+}
+
+static void moxiesim_init(QEMUMachineInitArgs *args)
+{
+MoxieCPU *cpu = NULL;
+ram_addr_t ram_size = args-ram_size;
+const char *cpu_model = args-cpu_model;
+const char *kernel_filename = args-kernel_filename;
+const char *kernel_cmdline = args-kernel_cmdline;
+const char *initrd_filename = args-initrd_filename;
+CPUMoxieState *env;
+MemoryRegion
[Qemu-devel] [PATCH v4 1/4] Add moxie target code
Signed-off-by: Anthony Green gr...@moxielogic.com
---
target-moxie/Makefile.objs |2 +
target-moxie/cpu.c | 177
target-moxie/cpu.h | 222 ++
target-moxie/helper.c | 100 +
target-moxie/helper.h |6 +
target-moxie/machine.c | 11 +
target-moxie/mmu.c | 37 ++
target-moxie/mmu.h | 19 +
target-moxie/op_helper.c | 80
target-moxie/translate.c | 1042
10 files changed, 1696 insertions(+)
create mode 100644 target-moxie/Makefile.objs
create mode 100644 target-moxie/cpu.c
create mode 100644 target-moxie/cpu.h
create mode 100644 target-moxie/helper.c
create mode 100644 target-moxie/helper.h
create mode 100644 target-moxie/machine.c
create mode 100644 target-moxie/mmu.c
create mode 100644 target-moxie/mmu.h
create mode 100644 target-moxie/op_helper.c
create mode 100644 target-moxie/translate.c
diff --git a/target-moxie/Makefile.objs b/target-moxie/Makefile.objs
new file mode 100644
index 000..1c8c921
--- /dev/null
+++ b/target-moxie/Makefile.objs
@@ -0,0 +1,2 @@
+obj-y += translate.o op_helper.o helper.o machine.o cpu.o
+obj-$(CONFIG_SOFTMMU) += mmu.o
diff --git a/target-moxie/cpu.c b/target-moxie/cpu.c
new file mode 100644
index 000..2a4a4f3
--- /dev/null
+++ b/target-moxie/cpu.c
@@ -0,0 +1,177 @@
+/*
+ * QEMU Moxie CPU
+ *
+ * Copyright (c) 2013 Anthony Green
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see
+ * http://www.gnu.org/licenses/lgpl-2.1.html
+ */
+
+#include cpu.h
+#include qemu-common.h
+#include migration/vmstate.h
+
+static void moxie_cpu_reset(CPUState *s)
+{
+MoxieCPU *cpu = MOXIE_CPU(s);
+MoxieCPUClass *mcc = MOXIE_CPU_GET_CLASS(cpu);
+CPUMoxieState *env = cpu-env;
+
+if (qemu_loglevel_mask(CPU_LOG_RESET)) {
+qemu_log(CPU Reset (CPU %d)\n, s-cpu_index);
+log_cpu_state(env, 0);
+}
+
+mcc-parent_reset(s);
+
+memset(env, 0, offsetof(CPUMoxieState, breakpoints));
+env-pc = 0x1000;
+
+tlb_flush(env, 1);
+}
+
+static void moxie_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+MoxieCPU *cpu = MOXIE_CPU(dev);
+MoxieCPUClass *occ = MOXIE_CPU_GET_CLASS(dev);
+
+qemu_init_vcpu(cpu-env);
+cpu_reset(CPU(cpu));
+
+occ-parent_realize(dev, errp);
+}
+
+static void moxie_cpu_initfn(Object *obj)
+{
+CPUState *cs = CPU(obj);
+MoxieCPU *cpu = MOXIE_CPU(obj);
+static int inited;
+
+cs-env_ptr = cpu-env;
+cpu_exec_init(cpu-env);
+
+if (tcg_enabled() !inited) {
+inited = 1;
+moxie_translate_init();
+}
+}
+
+static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model)
+{
+ObjectClass *oc;
+
+if (cpu_model == NULL) {
+return NULL;
+}
+
+oc = object_class_by_name(cpu_model);
+if (oc != NULL (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) ||
+ object_class_is_abstract(oc))) {
+return NULL;
+}
+return oc;
+}
+
+static const VMStateDescription vmstate_moxie_cpu = {
+.name = cpu,
+.unmigratable = 1,
+};
+
+static void moxie_cpu_class_init(ObjectClass *oc, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(oc);
+CPUClass *cc = CPU_CLASS(oc);
+MoxieCPUClass *mcc = MOXIE_CPU_CLASS(oc);
+
+mcc-parent_realize = dc-realize;
+dc-realize = moxie_cpu_realizefn;
+
+mcc-parent_reset = cc-reset;
+cc-reset = moxie_cpu_reset;
+
+cc-class_by_name = moxie_cpu_class_by_name;
+
+dc-vmsd = vmstate_moxie_cpu;
+}
+
+static void moxielite_initfn(Object *obj)
+{
+/* Set cpu feature flags */
+}
+
+static void moxie_any_initfn(Object *obj)
+{
+/* Set cpu feature flags */
+}
+
+typedef struct MoxieCPUInfo {
+const char *name;
+void (*initfn)(Object *obj);
+} MoxieCPUInfo;
+
+static const MoxieCPUInfo moxie_cpus[] = {
+{ .name = MoxieLite, .initfn = moxielite_initfn },
+{ .name = any,.initfn = moxie_any_initfn },
+};
+
+MoxieCPU *cpu_moxie_init(const char *cpu_model)
+{
+MoxieCPU *cpu;
+ObjectClass *oc;
+
+oc = moxie_cpu_class_by_name(cpu_model);
+if (oc == NULL) {
+return NULL;
+}
+cpu = MOXIE_CPU(object_new(object_class_get_name(oc)));
+cpu-env.cpu_model_str = cpu_model;
+
+object_property_set_bool(OBJECT(cpu), true, realized, NULL);
+
+return cpu;
+}
+
+static void cpu_register(const
[Qemu-devel] [PATCH v4 4/4] Add top level changes for moxie
Signed-off-by: Anthony Green gr...@moxielogic.com
---
MAINTAINERS | 5 +
arch_init.c | 2 ++
configure | 12 +++-
cpu-exec.c| 2 ++
default-configs/moxie-softmmu.mak | 2 ++
qapi-schema.json | 6 +++---
6 files changed, 25 insertions(+), 4 deletions(-)
create mode 100644 default-configs/moxie-softmmu.mak
diff --git a/MAINTAINERS b/MAINTAINERS
index 21043e4..b970159 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -91,6 +91,11 @@ M: Aurelien Jarno aurel...@aurel32.net
S: Odd Fixes
F: target-mips/
+Moxie
+M: Anthony Green gr...@moxielogic.com
+S: Maintained
+F: target-moxie/
+
PowerPC
M: Alexander Graf ag...@suse.de
L: qemu-...@nongnu.org
diff --git a/arch_init.c b/arch_init.c
index 8da868b..f82ed2d 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -85,6 +85,8 @@ int graphic_depth = 15;
#define QEMU_ARCH QEMU_ARCH_MICROBLAZE
#elif defined(TARGET_MIPS)
#define QEMU_ARCH QEMU_ARCH_MIPS
+#elif defined(TARGET_MOXIE)
+#define QEMU_ARCH QEMU_ARCH_MOXIE
#elif defined(TARGET_OPENRISC)
#define QEMU_ARCH QEMU_ARCH_OPENRISC
#elif defined(TARGET_PPC)
diff --git a/configure b/configure
index dcaa67c..02d75db 100755
--- a/configure
+++ b/configure
@@ -955,6 +955,7 @@ mips-softmmu \
mipsel-softmmu \
mips64-softmmu \
mips64el-softmmu \
+moxie-softmmu \
or32-softmmu \
ppc-softmmu \
ppcemb-softmmu \
@@ -3898,7 +3899,7 @@ target_arch2=`echo $target | cut -d '-' -f 1`
target_bigendian=no
case $target_arch2 in
-
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
+
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
target_bigendian=yes
;;
esac
@@ -4003,6 +4004,11 @@ case $target_arch2 in
echo TARGET_ABI_MIPSN64=y $config_target_mak
target_long_alignment=8
;;
+ moxie)
+TARGET_ARCH=moxie
+bflt=yes
+target_phys_bits=32
+ ;;
or32)
TARGET_ARCH=openrisc
TARGET_BASE_ARCH=openrisc
@@ -4247,6 +4253,10 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
echo CONFIG_MIPS_DIS=y $config_target_mak
echo CONFIG_MIPS_DIS=y config-all-disas.mak
;;
+ moxie*)
+echo CONFIG_MOXIE_DIS=y $config_target_mak
+echo CONFIG_MOXIE_DIS=y config-all-disas.mak
+ ;;
or32)
echo CONFIG_OPENRISC_DIS=y $config_target_mak
echo CONFIG_OPENRISC_DIS=y config-all-disas.mak
diff --git a/cpu-exec.c b/cpu-exec.c
index afbe497..ba7ea41 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -221,6 +221,7 @@ int cpu_exec(CPUArchState *env)
#elif defined(TARGET_LM32)
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_CRIS)
@@ -655,6 +656,7 @@ int cpu_exec(CPUArchState *env)
| env-cc_dest | (env-cc_x 4);
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_ALPHA)
diff --git a/default-configs/moxie-softmmu.mak
b/default-configs/moxie-softmmu.mak
new file mode 100644
index 000..d378363
--- /dev/null
+++ b/default-configs/moxie-softmmu.mak
@@ -0,0 +1,2 @@
+# Default configuration for moxie-softmmu
+
diff --git a/qapi-schema.json b/qapi-schema.json
index cd7ea25..cf5cd60 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -2944,9 +2944,9 @@
##
{ 'enum': 'TargetType',
'data': [ 'alpha', 'arm', 'cris', 'i386', 'lm32', 'm68k', 'microblazeel',
-'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'or32',
-'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4', 'sparc64',
-'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
+'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'moxie',
+'or32', 'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4',
+'sparc64', 'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
##
# @TargetInfo:
--
1.8.1.2
Re: [Qemu-devel] [PATCH v4 1/4] Add moxie target code
Peter - thanks for reviewing this.
On Thu, Feb 28, 2013 at 6:06 AM, Peter Maydell peter.mayd...@linaro.org wrote:
On 27 February 2013 22:09, Anthony Green gr...@moxielogic.com wrote:
+static const VMStateDescription vmstate_moxie_cpu = {
+.name = cpu,
+.unmigratable = 1,
+};
Since this is a new CPU it should just go ahead and implement
migration support.
I think I did this. See next patch.
+/* The dynamic value of the DELAY_SLOT_TRUE flag determines whether the jump
+ * after the delay slot should be taken or not. It is calculated from SR_T.
+ *
+ * It is unclear if it is permitted to modify the SR_T flag in a delay slot.
+ * The use of DELAY_SLOT_TRUE flag makes us accept such SR_T modification.
+ */
Is the Moxie really an SH-4 clone which has cloned this particular
SH-4 issue, or have you just copied this comment incorrectly
from the target-sh4 code? Do all of the copied constants really
also apply?
A fair bit of this was cut-n-paste. It's all cleaned up now. Moxie
has no delay slots.
+case 0x31: /* div.l */
+{
+int a = (opcode 4) 0xf;
+int b = opcode 0xf;
+tcg_gen_div_i32(REG(a), REG(a), REG(b));
Didn't Richard mention the problem of exceptions on division
in review of an earlier version of this patch?
Current hardware doesn't trap on divide by zero, so I don't mind this
failing now. The exception processing mechanism will be implemented
soon at which time I'll clean this up.
I'll post the new series in a few minutes
Thanks again,
AG
[Qemu-devel] [PATCH v5 0/4] Moxie CPU port
This version addresses all of what I understood to be required changes by Peter Maydell. Again, I thank everybody who invested time into reviewing this. It's definitely in much better shape now. AG Anthony Green (4): Add moxie target code Add moxie disassembler Add sample moxie system Add top level changes for moxie MAINTAINERS |5 + arch_init.c |2 + configure | 12 +- cpu-exec.c|2 + default-configs/moxie-softmmu.mak |2 + disas.c |6 + disas/Makefile.objs |1 + disas/moxie.c | 360 + hw/moxie/Makefile.objs|6 + hw/moxie/moxiesim.c | 175 +++ include/disas/bfd.h | 66 +-- include/sysemu/arch_init.h|1 + qapi-schema.json |6 +- target-moxie/Makefile.objs|2 + target-moxie/cpu.c| 174 +++ target-moxie/cpu.h| 169 ++ target-moxie/helper.c | 100 target-moxie/helper.h |6 + target-moxie/machine.c| 27 + target-moxie/mmu.c| 37 ++ target-moxie/mmu.h| 19 + target-moxie/op_helper.c | 64 +++ target-moxie/translate.c | 1019 + 23 files changed, 2225 insertions(+), 36 deletions(-) create mode 100644 default-configs/moxie-softmmu.mak create mode 100644 disas/moxie.c create mode 100644 hw/moxie/Makefile.objs create mode 100644 hw/moxie/moxiesim.c create mode 100644 target-moxie/Makefile.objs create mode 100644 target-moxie/cpu.c create mode 100644 target-moxie/cpu.h create mode 100644 target-moxie/helper.c create mode 100644 target-moxie/helper.h create mode 100644 target-moxie/machine.c create mode 100644 target-moxie/mmu.c create mode 100644 target-moxie/mmu.h create mode 100644 target-moxie/op_helper.c create mode 100644 target-moxie/translate.c -- 1.8.1.2
[Qemu-devel] [PATCH v5 1/4] Add moxie target code
Signed-off-by: Anthony Green gr...@moxielogic.com
---
target-moxie/Makefile.objs |2 +
target-moxie/cpu.c | 174
target-moxie/cpu.h | 169
target-moxie/helper.c | 100 +
target-moxie/helper.h |6 +
target-moxie/machine.c | 27 ++
target-moxie/mmu.c | 37 ++
target-moxie/mmu.h | 19 +
target-moxie/op_helper.c | 64 +++
target-moxie/translate.c | 1019
10 files changed, 1617 insertions(+)
create mode 100644 target-moxie/Makefile.objs
create mode 100644 target-moxie/cpu.c
create mode 100644 target-moxie/cpu.h
create mode 100644 target-moxie/helper.c
create mode 100644 target-moxie/helper.h
create mode 100644 target-moxie/machine.c
create mode 100644 target-moxie/mmu.c
create mode 100644 target-moxie/mmu.h
create mode 100644 target-moxie/op_helper.c
create mode 100644 target-moxie/translate.c
diff --git a/target-moxie/Makefile.objs b/target-moxie/Makefile.objs
new file mode 100644
index 000..130db4c
--- /dev/null
+++ b/target-moxie/Makefile.objs
@@ -0,0 +1,2 @@
+obj-y += translate.o op_helper.o helper.o machine.o cpu.o machine.o
+obj-$(CONFIG_SOFTMMU) += mmu.o
diff --git a/target-moxie/cpu.c b/target-moxie/cpu.c
new file mode 100644
index 000..83b3946
--- /dev/null
+++ b/target-moxie/cpu.c
@@ -0,0 +1,174 @@
+/*
+ * QEMU Moxie CPU
+ *
+ * Copyright (c) 2013 Anthony Green
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see
+ * http://www.gnu.org/licenses/lgpl-2.1.html
+ */
+
+#include cpu.h
+#include qemu-common.h
+#include migration/vmstate.h
+
+static void moxie_cpu_reset(CPUState *s)
+{
+MoxieCPU *cpu = MOXIE_CPU(s);
+MoxieCPUClass *mcc = MOXIE_CPU_GET_CLASS(cpu);
+CPUMoxieState *env = cpu-env;
+
+if (qemu_loglevel_mask(CPU_LOG_RESET)) {
+qemu_log(CPU Reset (CPU %d)\n, s-cpu_index);
+log_cpu_state(env, 0);
+}
+
+mcc-parent_reset(s);
+
+memset(env, 0, offsetof(CPUMoxieState, breakpoints));
+env-pc = 0x1000;
+
+tlb_flush(env, 1);
+}
+
+static void moxie_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+MoxieCPU *cpu = MOXIE_CPU(dev);
+MoxieCPUClass *occ = MOXIE_CPU_GET_CLASS(dev);
+
+qemu_init_vcpu(cpu-env);
+cpu_reset(CPU(cpu));
+
+occ-parent_realize(dev, errp);
+}
+
+static void moxie_cpu_initfn(Object *obj)
+{
+CPUState *cs = CPU(obj);
+MoxieCPU *cpu = MOXIE_CPU(obj);
+static int inited;
+
+cs-env_ptr = cpu-env;
+cpu_exec_init(cpu-env);
+
+if (tcg_enabled() !inited) {
+inited = 1;
+moxie_translate_init();
+}
+}
+
+static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model)
+{
+ObjectClass *oc;
+
+if (cpu_model == NULL) {
+return NULL;
+}
+
+oc = object_class_by_name(cpu_model);
+if (oc != NULL (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) ||
+ object_class_is_abstract(oc))) {
+return NULL;
+}
+return oc;
+}
+
+extern const VMStateDescription vmstate_moxie_cpu;
+
+static void moxie_cpu_class_init(ObjectClass *oc, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(oc);
+CPUClass *cc = CPU_CLASS(oc);
+MoxieCPUClass *mcc = MOXIE_CPU_CLASS(oc);
+
+mcc-parent_realize = dc-realize;
+dc-realize = moxie_cpu_realizefn;
+
+mcc-parent_reset = cc-reset;
+cc-reset = moxie_cpu_reset;
+
+cc-class_by_name = moxie_cpu_class_by_name;
+
+dc-vmsd = vmstate_moxie_cpu;
+}
+
+static void moxielite_initfn(Object *obj)
+{
+/* Set cpu feature flags */
+}
+
+static void moxie_any_initfn(Object *obj)
+{
+/* Set cpu feature flags */
+}
+
+typedef struct MoxieCPUInfo {
+const char *name;
+void (*initfn)(Object *obj);
+} MoxieCPUInfo;
+
+static const MoxieCPUInfo moxie_cpus[] = {
+{ .name = MoxieLite, .initfn = moxielite_initfn },
+{ .name = any,.initfn = moxie_any_initfn },
+};
+
+MoxieCPU *cpu_moxie_init(const char *cpu_model)
+{
+MoxieCPU *cpu;
+ObjectClass *oc;
+
+oc = moxie_cpu_class_by_name(cpu_model);
+if (oc == NULL) {
+return NULL;
+}
+cpu = MOXIE_CPU(object_new(object_class_get_name(oc)));
+cpu-env.cpu_model_str = cpu_model;
+
+object_property_set_bool(OBJECT(cpu), true, realized, NULL);
+
+return cpu;
+}
+
+static void cpu_register(const MoxieCPUInfo *info)
+{
+TypeInfo
[Qemu-devel] [PATCH v5 2/4] Add moxie disassembler
Signed-off-by: Anthony Green gr...@moxielogic.com
---
disas.c | 6 +
disas/Makefile.objs | 1 +
disas/moxie.c | 360
include/disas/bfd.h | 66 +-
4 files changed, 401 insertions(+), 32 deletions(-)
create mode 100644 disas/moxie.c
diff --git a/disas.c b/disas.c
index a46faee..74d3ba0 100644
--- a/disas.c
+++ b/disas.c
@@ -256,6 +256,9 @@ void target_disas(FILE *out, CPUArchState *env,
target_ulong code,
#elif defined(TARGET_MICROBLAZE)
s.info.mach = bfd_arch_microblaze;
print_insn = print_insn_microblaze;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
@@ -462,6 +465,9 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
#elif defined(TARGET_S390X)
s.info.mach = bfd_mach_s390_64;
print_insn = print_insn_s390;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
diff --git a/disas/Makefile.objs b/disas/Makefile.objs
index ed75f9a..3b1e77a 100644
--- a/disas/Makefile.objs
+++ b/disas/Makefile.objs
@@ -7,6 +7,7 @@ common-obj-$(CONFIG_IA64_DIS) += ia64.o
common-obj-$(CONFIG_M68K_DIS) += m68k.o
common-obj-$(CONFIG_MICROBLAZE_DIS) += microblaze.o
common-obj-$(CONFIG_MIPS_DIS) += mips.o
+common-obj-$(CONFIG_MOXIE_DIS) += moxie.o
common-obj-$(CONFIG_PPC_DIS) += ppc.o
common-obj-$(CONFIG_S390_DIS) += s390.o
common-obj-$(CONFIG_SH4_DIS) += sh4.o
diff --git a/disas/moxie.c b/disas/moxie.c
new file mode 100644
index 000..4c5f180
--- /dev/null
+++ b/disas/moxie.c
@@ -0,0 +1,360 @@
+/* Disassemble moxie instructions.
+ Copyright (c) 2009 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see http://www.gnu.org/licenses/. */
+
+#include stdio.h
+#define STATIC_TABLE
+#define DEFINE_TABLE
+
+#include disas/bfd.h
+
+static void *stream;
+
+/* Form 1 instructions come in different flavors:
+
+ Some have no arguments (MOXIE_F1_NARG)
+ Some only use the A operand (MOXIE_F1_A)
+ Some use A and B registers (MOXIE_F1_AB)
+ Some use A and consume a 4 byte immediate value (MOXIE_F1_A4)
+ Some use just a 4 byte immediate value (MOXIE_F1_4)
+ Some use just a 4 byte memory address (MOXIE_F1_M)
+ Some use B and an indirect A(MOXIE_F1_AiB)
+ Some use A and an indirect B(MOXIE_F1_ABi)
+ Some consume a 4 byte immediate value and use X (MOXIE_F1_4A)
+ Some use B and an indirect A plus 4 bytes (MOXIE_F1_AiB4)
+ Some use A and an indirect B plus 4 bytes (MOXIE_F1_ABi4)
+
+ Form 2 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F2_NARG)
+ Some use the A register and an 8-bit value (MOXIE_F2_A8V)
+
+ Form 3 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F3_NARG)
+ Some have a 10-bit PC relative operand (MOXIE_F3_PCREL). */
+
+#define MOXIE_F1_NARG 0x100
+#define MOXIE_F1_A0x101
+#define MOXIE_F1_AB 0x102
+/* #define MOXIE_F1_ABC 0x103 */
+#define MOXIE_F1_A4 0x104
+#define MOXIE_F1_40x105
+#define MOXIE_F1_AiB 0x106
+#define MOXIE_F1_ABi 0x107
+#define MOXIE_F1_4A 0x108
+#define MOXIE_F1_AiB4 0x109
+#define MOXIE_F1_ABi4 0x10a
+#define MOXIE_F1_M0x10b
+
+#define MOXIE_F2_NARG 0x200
+#define MOXIE_F2_A8V 0x201
+
+#define MOXIE_F3_NARG 0x300
+#define MOXIE_F3_PCREL 0x301
+
+typedef struct moxie_opc_info_t {
+short opcode;
+unsigned itype;
+const char * name;
+} moxie_opc_info_t;
+
+extern const moxie_opc_info_t moxie_form1_opc_info[64];
+extern const moxie_opc_info_t moxie_form2_opc_info[4];
+extern const moxie_opc_info_t moxie_form3_opc_info[16];
+
+/* The moxie processor's 16-bit instructions come in two forms:
+
+ FORM 1 instructions start with a 0 bit...
+
+ 0ooo
+ 0 F
+
+ ooo - form 1 opcode number
+ - operand A
+ - operand B
+
+ FORM 2 instructions start with bits 10...
+
+ 10oo
+ 0 F
+
+ oo - form 2
[Qemu-devel] [PATCH v5 3/4] Add sample moxie system
Signed-off-by: Anthony Green gr...@moxielogic.com
---
hw/moxie/Makefile.objs | 6 ++
hw/moxie/moxiesim.c| 175 +
include/sysemu/arch_init.h | 1 +
3 files changed, 182 insertions(+)
create mode 100644 hw/moxie/Makefile.objs
create mode 100644 hw/moxie/moxiesim.c
diff --git a/hw/moxie/Makefile.objs b/hw/moxie/Makefile.objs
new file mode 100644
index 000..873c680
--- /dev/null
+++ b/hw/moxie/Makefile.objs
@@ -0,0 +1,6 @@
+# moxie boards
+obj-y = serial.o mc146818rtc.o vga.o
+obj-$(CONFIG_FDT) += device_tree.o
+
+obj-y := $(addprefix ../,$(obj-y))
+obj-y += moxiesim.o
\ No newline at end of file
diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c
new file mode 100644
index 000..3b04f5e
--- /dev/null
+++ b/hw/moxie/moxiesim.c
@@ -0,0 +1,175 @@
+/*
+ * QEMU/moxiesim emulation
+ *
+ * Emulates a very simple machine model similiar to the one use by the
+ * GDB moxie simulator.
+ *
+ * Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include hw/sysbus.h
+#include hw/hw.h
+#include hw/pc.h
+#include hw/isa.h
+#include net/net.h
+#include sysemu/sysemu.h
+#include hw/boards.h
+#include hw/loader.h
+#include hw/serial.h
+#include exec/address-spaces.h
+
+#define PHYS_MEM_BASE 0x8000
+
+static struct loaderparams {
+uint64_t ram_size;
+const char *kernel_filename;
+const char *kernel_cmdline;
+const char *initrd_filename;
+} loaderparams;
+
+static void load_kernel(MoxieCPU *cpu)
+{
+uint64_t entry, kernel_low, kernel_high;
+long kernel_size;
+long initrd_size;
+ram_addr_t initrd_offset;
+kernel_size = load_elf(loaderparams.kernel_filename, NULL, NULL,
+ entry, kernel_low, kernel_high, 1,
+ ELF_MACHINE, 0);
+if (kernel_size = 0) {
+cpu-env.pc = (unsigned) entry;
+} else {
+fprintf(stderr, qemu: could not load kernel '%s'\n,
+loaderparams.kernel_filename);
+exit(1);
+}
+
+/* load initrd */
+initrd_size = 0;
+initrd_offset = 0;
+if (loaderparams.initrd_filename) {
+initrd_size = get_image_size(loaderparams.initrd_filename);
+if (initrd_size 0) {
+initrd_offset = (kernel_high + ~TARGET_PAGE_MASK)
+ TARGET_PAGE_MASK;
+if (initrd_offset + initrd_size loaderparams.ram_size) {
+fprintf(stderr,
+qemu: memory too small for initial ram disk '%s'\n,
+loaderparams.initrd_filename);
+exit(1);
+}
+initrd_size = load_image_targphys(loaderparams.initrd_filename,
+ initrd_offset,
+ ram_size);
+}
+if (initrd_size == (target_ulong)-1) {
+fprintf(stderr, qemu: could not load initial ram disk '%s'\n,
+loaderparams.initrd_filename);
+exit(1);
+}
+}
+}
+
+static void main_cpu_reset(void *opaque)
+{
+MoxieCPU *cpu = opaque;
+
+cpu_reset(CPU(cpu));
+}
+
+static inline DeviceState *
+moxie_intc_create(hwaddr base, qemu_irq irq, int kind_of_intr)
+{
+DeviceState *dev;
+
+dev = qdev_create(NULL, moxie,intc);
+qdev_prop_set_uint32(dev, kind-of-intr, kind_of_intr);
+qdev_init_nofail(dev);
+sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
+return dev;
+}
+
+static void moxiesim_init(QEMUMachineInitArgs *args)
+{
+MoxieCPU *cpu = NULL;
+ram_addr_t ram_size = args-ram_size;
+const char *cpu_model = args-cpu_model;
+const char *kernel_filename = args-kernel_filename;
+const char *kernel_cmdline = args-kernel_cmdline;
+const char *initrd_filename = args-initrd_filename;
+CPUMoxieState *env;
+MemoryRegion
[Qemu-devel] [PATCH v5 4/4] Add top level changes for moxie
Signed-off-by: Anthony Green gr...@moxielogic.com
---
MAINTAINERS | 5 +
arch_init.c | 2 ++
configure | 12 +++-
cpu-exec.c| 2 ++
default-configs/moxie-softmmu.mak | 2 ++
qapi-schema.json | 6 +++---
6 files changed, 25 insertions(+), 4 deletions(-)
create mode 100644 default-configs/moxie-softmmu.mak
diff --git a/MAINTAINERS b/MAINTAINERS
index 21043e4..b970159 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -91,6 +91,11 @@ M: Aurelien Jarno aurel...@aurel32.net
S: Odd Fixes
F: target-mips/
+Moxie
+M: Anthony Green gr...@moxielogic.com
+S: Maintained
+F: target-moxie/
+
PowerPC
M: Alexander Graf ag...@suse.de
L: qemu-...@nongnu.org
diff --git a/arch_init.c b/arch_init.c
index 8da868b..f82ed2d 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -85,6 +85,8 @@ int graphic_depth = 15;
#define QEMU_ARCH QEMU_ARCH_MICROBLAZE
#elif defined(TARGET_MIPS)
#define QEMU_ARCH QEMU_ARCH_MIPS
+#elif defined(TARGET_MOXIE)
+#define QEMU_ARCH QEMU_ARCH_MOXIE
#elif defined(TARGET_OPENRISC)
#define QEMU_ARCH QEMU_ARCH_OPENRISC
#elif defined(TARGET_PPC)
diff --git a/configure b/configure
index dcaa67c..02d75db 100755
--- a/configure
+++ b/configure
@@ -955,6 +955,7 @@ mips-softmmu \
mipsel-softmmu \
mips64-softmmu \
mips64el-softmmu \
+moxie-softmmu \
or32-softmmu \
ppc-softmmu \
ppcemb-softmmu \
@@ -3898,7 +3899,7 @@ target_arch2=`echo $target | cut -d '-' -f 1`
target_bigendian=no
case $target_arch2 in
-
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
+
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
target_bigendian=yes
;;
esac
@@ -4003,6 +4004,11 @@ case $target_arch2 in
echo TARGET_ABI_MIPSN64=y $config_target_mak
target_long_alignment=8
;;
+ moxie)
+TARGET_ARCH=moxie
+bflt=yes
+target_phys_bits=32
+ ;;
or32)
TARGET_ARCH=openrisc
TARGET_BASE_ARCH=openrisc
@@ -4247,6 +4253,10 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
echo CONFIG_MIPS_DIS=y $config_target_mak
echo CONFIG_MIPS_DIS=y config-all-disas.mak
;;
+ moxie*)
+echo CONFIG_MOXIE_DIS=y $config_target_mak
+echo CONFIG_MOXIE_DIS=y config-all-disas.mak
+ ;;
or32)
echo CONFIG_OPENRISC_DIS=y $config_target_mak
echo CONFIG_OPENRISC_DIS=y config-all-disas.mak
diff --git a/cpu-exec.c b/cpu-exec.c
index afbe497..ba7ea41 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -221,6 +221,7 @@ int cpu_exec(CPUArchState *env)
#elif defined(TARGET_LM32)
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_CRIS)
@@ -655,6 +656,7 @@ int cpu_exec(CPUArchState *env)
| env-cc_dest | (env-cc_x 4);
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_ALPHA)
diff --git a/default-configs/moxie-softmmu.mak
b/default-configs/moxie-softmmu.mak
new file mode 100644
index 000..d378363
--- /dev/null
+++ b/default-configs/moxie-softmmu.mak
@@ -0,0 +1,2 @@
+# Default configuration for moxie-softmmu
+
diff --git a/qapi-schema.json b/qapi-schema.json
index cd7ea25..cf5cd60 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -2944,9 +2944,9 @@
##
{ 'enum': 'TargetType',
'data': [ 'alpha', 'arm', 'cris', 'i386', 'lm32', 'm68k', 'microblazeel',
-'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'or32',
-'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4', 'sparc64',
-'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
+'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'moxie',
+'or32', 'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4',
+'sparc64', 'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
##
# @TargetInfo:
--
1.8.1.2
[Qemu-devel] [PATCH v6 0/4] Moxie CPU port
Here's the latest incarnation of the moxie patch set. I believe I've addressed all of the major concerns and then some. I ended up implementing moxie's new exception semantics so now division by zero and illegal instructions both trap to an exception handler routine. I was able to test this with a little C/asm code and it works nicely. Thanks! AG Anthony Green (4): Add moxie target code Add moxie disassembler Add sample moxie system Add top level changes for moxie MAINTAINERS |5 + arch_init.c |2 + configure |9 +- cpu-exec.c|2 + default-configs/moxie-softmmu.mak |2 + disas.c |6 + disas/Makefile.objs |1 + disas/moxie.c | 360 + hw/moxie/Makefile.objs|6 + hw/moxie/moxiesim.c | 174 +++ include/disas/bfd.h |2 + include/sysemu/arch_init.h|1 + qapi-schema.json |6 +- target-moxie/Makefile.objs|2 + target-moxie/cpu.c| 172 +++ target-moxie/cpu.h| 170 +++ target-moxie/helper.c | 97 target-moxie/helper.h |9 + target-moxie/machine.c| 27 + target-moxie/machine.h|2 + target-moxie/mmu.c| 36 ++ target-moxie/mmu.h| 19 + target-moxie/op_helper.c | 90 target-moxie/translate.c | 1003 + 24 files changed, 2199 insertions(+), 4 deletions(-) create mode 100644 default-configs/moxie-softmmu.mak create mode 100644 disas/moxie.c create mode 100644 hw/moxie/Makefile.objs create mode 100644 hw/moxie/moxiesim.c create mode 100644 target-moxie/Makefile.objs create mode 100644 target-moxie/cpu.c create mode 100644 target-moxie/cpu.h create mode 100644 target-moxie/helper.c create mode 100644 target-moxie/helper.h create mode 100644 target-moxie/machine.c create mode 100644 target-moxie/machine.h create mode 100644 target-moxie/mmu.c create mode 100644 target-moxie/mmu.h create mode 100644 target-moxie/op_helper.c create mode 100644 target-moxie/translate.c -- 1.8.1.2
[Qemu-devel] [PATCH v6 2/4] Add moxie disassembler
Signed-off-by: Anthony Green gr...@moxielogic.com
---
disas.c | 6 +
disas/Makefile.objs | 1 +
disas/moxie.c | 360
include/disas/bfd.h | 2 +
4 files changed, 369 insertions(+)
create mode 100644 disas/moxie.c
diff --git a/disas.c b/disas.c
index a46faee..74d3ba0 100644
--- a/disas.c
+++ b/disas.c
@@ -256,6 +256,9 @@ void target_disas(FILE *out, CPUArchState *env,
target_ulong code,
#elif defined(TARGET_MICROBLAZE)
s.info.mach = bfd_arch_microblaze;
print_insn = print_insn_microblaze;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
@@ -462,6 +465,9 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
#elif defined(TARGET_S390X)
s.info.mach = bfd_mach_s390_64;
print_insn = print_insn_s390;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
diff --git a/disas/Makefile.objs b/disas/Makefile.objs
index ed75f9a..3b1e77a 100644
--- a/disas/Makefile.objs
+++ b/disas/Makefile.objs
@@ -7,6 +7,7 @@ common-obj-$(CONFIG_IA64_DIS) += ia64.o
common-obj-$(CONFIG_M68K_DIS) += m68k.o
common-obj-$(CONFIG_MICROBLAZE_DIS) += microblaze.o
common-obj-$(CONFIG_MIPS_DIS) += mips.o
+common-obj-$(CONFIG_MOXIE_DIS) += moxie.o
common-obj-$(CONFIG_PPC_DIS) += ppc.o
common-obj-$(CONFIG_S390_DIS) += s390.o
common-obj-$(CONFIG_SH4_DIS) += sh4.o
diff --git a/disas/moxie.c b/disas/moxie.c
new file mode 100644
index 000..4c5f180
--- /dev/null
+++ b/disas/moxie.c
@@ -0,0 +1,360 @@
+/* Disassemble moxie instructions.
+ Copyright (c) 2009 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see http://www.gnu.org/licenses/. */
+
+#include stdio.h
+#define STATIC_TABLE
+#define DEFINE_TABLE
+
+#include disas/bfd.h
+
+static void *stream;
+
+/* Form 1 instructions come in different flavors:
+
+ Some have no arguments (MOXIE_F1_NARG)
+ Some only use the A operand (MOXIE_F1_A)
+ Some use A and B registers (MOXIE_F1_AB)
+ Some use A and consume a 4 byte immediate value (MOXIE_F1_A4)
+ Some use just a 4 byte immediate value (MOXIE_F1_4)
+ Some use just a 4 byte memory address (MOXIE_F1_M)
+ Some use B and an indirect A(MOXIE_F1_AiB)
+ Some use A and an indirect B(MOXIE_F1_ABi)
+ Some consume a 4 byte immediate value and use X (MOXIE_F1_4A)
+ Some use B and an indirect A plus 4 bytes (MOXIE_F1_AiB4)
+ Some use A and an indirect B plus 4 bytes (MOXIE_F1_ABi4)
+
+ Form 2 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F2_NARG)
+ Some use the A register and an 8-bit value (MOXIE_F2_A8V)
+
+ Form 3 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F3_NARG)
+ Some have a 10-bit PC relative operand (MOXIE_F3_PCREL). */
+
+#define MOXIE_F1_NARG 0x100
+#define MOXIE_F1_A0x101
+#define MOXIE_F1_AB 0x102
+/* #define MOXIE_F1_ABC 0x103 */
+#define MOXIE_F1_A4 0x104
+#define MOXIE_F1_40x105
+#define MOXIE_F1_AiB 0x106
+#define MOXIE_F1_ABi 0x107
+#define MOXIE_F1_4A 0x108
+#define MOXIE_F1_AiB4 0x109
+#define MOXIE_F1_ABi4 0x10a
+#define MOXIE_F1_M0x10b
+
+#define MOXIE_F2_NARG 0x200
+#define MOXIE_F2_A8V 0x201
+
+#define MOXIE_F3_NARG 0x300
+#define MOXIE_F3_PCREL 0x301
+
+typedef struct moxie_opc_info_t {
+short opcode;
+unsigned itype;
+const char * name;
+} moxie_opc_info_t;
+
+extern const moxie_opc_info_t moxie_form1_opc_info[64];
+extern const moxie_opc_info_t moxie_form2_opc_info[4];
+extern const moxie_opc_info_t moxie_form3_opc_info[16];
+
+/* The moxie processor's 16-bit instructions come in two forms:
+
+ FORM 1 instructions start with a 0 bit...
+
+ 0ooo
+ 0 F
+
+ ooo - form 1 opcode number
+ - operand A
+ - operand B
+
+ FORM 2 instructions start with bits 10...
+
+ 10oo
+ 0 F
+
+ oo - form 2 opcode number
+
[Qemu-devel] [PATCH v6 4/4] Add top level changes for moxie
Signed-off-by: Anthony Green gr...@moxielogic.com
---
MAINTAINERS | 5 +
arch_init.c | 2 ++
configure | 9 -
cpu-exec.c| 2 ++
default-configs/moxie-softmmu.mak | 2 ++
qapi-schema.json | 6 +++---
6 files changed, 22 insertions(+), 4 deletions(-)
create mode 100644 default-configs/moxie-softmmu.mak
diff --git a/MAINTAINERS b/MAINTAINERS
index 21043e4..b970159 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -91,6 +91,11 @@ M: Aurelien Jarno aurel...@aurel32.net
S: Odd Fixes
F: target-mips/
+Moxie
+M: Anthony Green gr...@moxielogic.com
+S: Maintained
+F: target-moxie/
+
PowerPC
M: Alexander Graf ag...@suse.de
L: qemu-...@nongnu.org
diff --git a/arch_init.c b/arch_init.c
index 8daeafa..ddae1b7 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -85,6 +85,8 @@ int graphic_depth = 15;
#define QEMU_ARCH QEMU_ARCH_MICROBLAZE
#elif defined(TARGET_MIPS)
#define QEMU_ARCH QEMU_ARCH_MIPS
+#elif defined(TARGET_MOXIE)
+#define QEMU_ARCH QEMU_ARCH_MOXIE
#elif defined(TARGET_OPENRISC)
#define QEMU_ARCH QEMU_ARCH_OPENRISC
#elif defined(TARGET_PPC)
diff --git a/configure b/configure
index 19738ac..ae5b3bc 100755
--- a/configure
+++ b/configure
@@ -958,6 +958,7 @@ mips-softmmu \
mipsel-softmmu \
mips64-softmmu \
mips64el-softmmu \
+moxie-softmmu \
or32-softmmu \
ppc-softmmu \
ppcemb-softmmu \
@@ -3913,7 +3914,7 @@ target_arch2=`echo $target | cut -d '-' -f 1`
target_bigendian=no
case $target_arch2 in
-
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
+
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
target_bigendian=yes
;;
esac
@@ -4018,6 +4019,8 @@ case $target_arch2 in
echo TARGET_ABI_MIPSN64=y $config_target_mak
target_long_alignment=8
;;
+ moxie)
+ ;;
or32)
TARGET_ARCH=openrisc
TARGET_BASE_ARCH=openrisc
@@ -4262,6 +4265,10 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
echo CONFIG_MIPS_DIS=y $config_target_mak
echo CONFIG_MIPS_DIS=y config-all-disas.mak
;;
+ moxie*)
+echo CONFIG_MOXIE_DIS=y $config_target_mak
+echo CONFIG_MOXIE_DIS=y config-all-disas.mak
+ ;;
or32)
echo CONFIG_OPENRISC_DIS=y $config_target_mak
echo CONFIG_OPENRISC_DIS=y config-all-disas.mak
diff --git a/cpu-exec.c b/cpu-exec.c
index afbe497..ba7ea41 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -221,6 +221,7 @@ int cpu_exec(CPUArchState *env)
#elif defined(TARGET_LM32)
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_CRIS)
@@ -655,6 +656,7 @@ int cpu_exec(CPUArchState *env)
| env-cc_dest | (env-cc_x 4);
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_ALPHA)
diff --git a/default-configs/moxie-softmmu.mak
b/default-configs/moxie-softmmu.mak
new file mode 100644
index 000..d378363
--- /dev/null
+++ b/default-configs/moxie-softmmu.mak
@@ -0,0 +1,2 @@
+# Default configuration for moxie-softmmu
+
diff --git a/qapi-schema.json b/qapi-schema.json
index 28b070f..233ea1b 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -2994,9 +2994,9 @@
##
{ 'enum': 'TargetType',
'data': [ 'alpha', 'arm', 'cris', 'i386', 'lm32', 'm68k', 'microblazeel',
-'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'or32',
-'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4', 'sparc64',
-'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
+'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'moxie',
+'or32', 'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4',
+'sparc64', 'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
##
# @TargetInfo:
--
1.8.1.2
[Qemu-devel] [PATCH v6 1/4] Add moxie target code
Signed-off-by: Anthony Green gr...@moxielogic.com
---
target-moxie/Makefile.objs |2 +
target-moxie/cpu.c | 172
target-moxie/cpu.h | 170
target-moxie/helper.c | 97 +
target-moxie/helper.h |9 +
target-moxie/machine.c | 27 ++
target-moxie/machine.h |2 +
target-moxie/mmu.c | 36 ++
target-moxie/mmu.h | 19 +
target-moxie/op_helper.c | 90
target-moxie/translate.c | 1003
11 files changed, 1627 insertions(+)
create mode 100644 target-moxie/Makefile.objs
create mode 100644 target-moxie/cpu.c
create mode 100644 target-moxie/cpu.h
create mode 100644 target-moxie/helper.c
create mode 100644 target-moxie/helper.h
create mode 100644 target-moxie/machine.c
create mode 100644 target-moxie/machine.h
create mode 100644 target-moxie/mmu.c
create mode 100644 target-moxie/mmu.h
create mode 100644 target-moxie/op_helper.c
create mode 100644 target-moxie/translate.c
diff --git a/target-moxie/Makefile.objs b/target-moxie/Makefile.objs
new file mode 100644
index 000..130db4c
--- /dev/null
+++ b/target-moxie/Makefile.objs
@@ -0,0 +1,2 @@
+obj-y += translate.o op_helper.o helper.o machine.o cpu.o machine.o
+obj-$(CONFIG_SOFTMMU) += mmu.o
diff --git a/target-moxie/cpu.c b/target-moxie/cpu.c
new file mode 100644
index 000..c17d3f0
--- /dev/null
+++ b/target-moxie/cpu.c
@@ -0,0 +1,172 @@
+/*
+ * QEMU Moxie CPU
+ *
+ * Copyright (c) 2013 Anthony Green
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see http://www.gnu.org/licenses/.
+ */
+
+#include cpu.h
+#include qemu-common.h
+#include migration/vmstate.h
+#include machine.h
+
+static void moxie_cpu_reset(CPUState *s)
+{
+MoxieCPU *cpu = MOXIE_CPU(s);
+MoxieCPUClass *mcc = MOXIE_CPU_GET_CLASS(cpu);
+CPUMoxieState *env = cpu-env;
+
+if (qemu_loglevel_mask(CPU_LOG_RESET)) {
+qemu_log(CPU Reset (CPU %d)\n, s-cpu_index);
+log_cpu_state(env, 0);
+}
+
+mcc-parent_reset(s);
+
+memset(env, 0, offsetof(CPUMoxieState, breakpoints));
+env-pc = 0x1000;
+
+tlb_flush(env, 1);
+}
+
+static void moxie_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+MoxieCPU *cpu = MOXIE_CPU(dev);
+MoxieCPUClass *occ = MOXIE_CPU_GET_CLASS(dev);
+
+qemu_init_vcpu(cpu-env);
+cpu_reset(CPU(cpu));
+
+occ-parent_realize(dev, errp);
+}
+
+static void moxie_cpu_initfn(Object *obj)
+{
+CPUState *cs = CPU(obj);
+MoxieCPU *cpu = MOXIE_CPU(obj);
+static int inited;
+
+cs-env_ptr = cpu-env;
+cpu_exec_init(cpu-env);
+
+if (tcg_enabled() !inited) {
+inited = 1;
+moxie_translate_init();
+}
+}
+
+static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model)
+{
+ObjectClass *oc;
+
+if (cpu_model == NULL) {
+return NULL;
+}
+
+oc = object_class_by_name(cpu_model);
+if (oc != NULL (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) ||
+ object_class_is_abstract(oc))) {
+return NULL;
+}
+return oc;
+}
+
+static void moxie_cpu_class_init(ObjectClass *oc, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(oc);
+CPUClass *cc = CPU_CLASS(oc);
+MoxieCPUClass *mcc = MOXIE_CPU_CLASS(oc);
+
+mcc-parent_realize = dc-realize;
+dc-realize = moxie_cpu_realizefn;
+
+mcc-parent_reset = cc-reset;
+cc-reset = moxie_cpu_reset;
+
+cc-class_by_name = moxie_cpu_class_by_name;
+
+dc-vmsd = vmstate_moxie_cpu;
+}
+
+static void moxielite_initfn(Object *obj)
+{
+/* Set cpu feature flags */
+}
+
+static void moxie_any_initfn(Object *obj)
+{
+/* Set cpu feature flags */
+}
+
+typedef struct MoxieCPUInfo {
+const char *name;
+void (*initfn)(Object *obj);
+} MoxieCPUInfo;
+
+static const MoxieCPUInfo moxie_cpus[] = {
+{ .name = MoxieLite, .initfn = moxielite_initfn },
+{ .name = any,.initfn = moxie_any_initfn },
+};
+
+MoxieCPU *cpu_moxie_init(const char *cpu_model)
+{
+MoxieCPU *cpu;
+ObjectClass *oc;
+
+oc = moxie_cpu_class_by_name(cpu_model);
+if (oc == NULL) {
+return NULL;
+}
+cpu = MOXIE_CPU(object_new(object_class_get_name(oc)));
+cpu-env.cpu_model_str = cpu_model;
+
+object_property_set_bool(OBJECT(cpu), true, realized, NULL);
+
+return cpu;
+}
+
+static void cpu_register(const MoxieCPUInfo *info
[Qemu-devel] [PATCH v6 3/4] Add sample moxie system
Signed-off-by: Anthony Green gr...@moxielogic.com
---
hw/moxie/Makefile.objs | 6 ++
hw/moxie/moxiesim.c| 174 +
include/sysemu/arch_init.h | 1 +
3 files changed, 181 insertions(+)
create mode 100644 hw/moxie/Makefile.objs
create mode 100644 hw/moxie/moxiesim.c
diff --git a/hw/moxie/Makefile.objs b/hw/moxie/Makefile.objs
new file mode 100644
index 000..d0772d1
--- /dev/null
+++ b/hw/moxie/Makefile.objs
@@ -0,0 +1,6 @@
+# moxie boards
+obj-y = serial.o mc146818rtc.o vga.o
+obj-$(CONFIG_FDT) += device_tree.o
+
+obj-y := $(addprefix ../,$(obj-y))
+obj-y += moxiesim.o
diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c
new file mode 100644
index 000..e1e88a9
--- /dev/null
+++ b/hw/moxie/moxiesim.c
@@ -0,0 +1,174 @@
+/*
+ * QEMU/moxiesim emulation
+ *
+ * Emulates a very simple machine model similiar to the one use by the
+ * GDB moxie simulator.
+ *
+ * Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include hw/sysbus.h
+#include hw/hw.h
+#include hw/pc.h
+#include hw/isa.h
+#include net/net.h
+#include sysemu/sysemu.h
+#include hw/boards.h
+#include hw/loader.h
+#include hw/serial.h
+#include exec/address-spaces.h
+
+#define PHYS_MEM_BASE 0x8000
+
+typedef struct {
+uint64_t ram_size;
+const char *kernel_filename;
+const char *kernel_cmdline;
+const char *initrd_filename;
+} LoaderParams;
+
+static void load_kernel(MoxieCPU *cpu, LoaderParams *loader_params)
+{
+uint64_t entry, kernel_low, kernel_high;
+long kernel_size;
+long initrd_size;
+ram_addr_t initrd_offset;
+
+kernel_size = load_elf(loader_params-kernel_filename, NULL, NULL,
+ entry, kernel_low, kernel_high, 1,
+ ELF_MACHINE, 0);
+
+if (!kernel_size) {
+fprintf(stderr, qemu: could not load kernel '%s'\n,
+loader_params-kernel_filename);
+exit(1);
+}
+
+/* load initrd */
+initrd_size = 0;
+initrd_offset = 0;
+if (loader_params-initrd_filename) {
+initrd_size = get_image_size(loader_params-initrd_filename);
+if (initrd_size 0) {
+initrd_offset = (kernel_high + ~TARGET_PAGE_MASK)
+ TARGET_PAGE_MASK;
+if (initrd_offset + initrd_size loader_params-ram_size) {
+fprintf(stderr,
+qemu: memory too small for initial ram disk '%s'\n,
+loader_params-initrd_filename);
+exit(1);
+}
+initrd_size = load_image_targphys(loader_params-initrd_filename,
+ initrd_offset,
+ ram_size);
+}
+if (initrd_size == (target_ulong)-1) {
+fprintf(stderr, qemu: could not load initial ram disk '%s'\n,
+loader_params-initrd_filename);
+exit(1);
+}
+}
+}
+
+static void main_cpu_reset(void *opaque)
+{
+MoxieCPU *cpu = opaque;
+
+cpu_reset(CPU(cpu));
+}
+
+static inline DeviceState *
+moxie_intc_create(hwaddr base, qemu_irq irq, int kind_of_intr)
+{
+DeviceState *dev;
+
+dev = qdev_create(NULL, moxie,intc);
+qdev_prop_set_uint32(dev, kind-of-intr, kind_of_intr);
+qdev_init_nofail(dev);
+sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
+return dev;
+}
+
+static void moxiesim_init(QEMUMachineInitArgs *args)
+{
+MoxieCPU *cpu = NULL;
+ram_addr_t ram_size = args-ram_size;
+const char *cpu_model = args-cpu_model;
+const char *kernel_filename = args-kernel_filename;
+const char *kernel_cmdline = args-kernel_cmdline;
+const char *initrd_filename = args-initrd_filename;
+CPUMoxieState *env;
+MemoryRegion *address_space_mem = get_system_memory();
+MemoryRegion
[Qemu-devel] [PATCH v7 0/4] Moxie CPU port
This version consolidates the helper file (helper.c op_helper.c) and addresses the signed division of INT_MIN by -1 issue (which is now == 0x800). Hopefully this is looking much better to everybody now. Thanks! AG Anthony Green (4): Add moxie target code Add moxie disassembler Add sample moxie system Add top level changes for moxie MAINTAINERS |5 + arch_init.c |2 + configure |9 +- cpu-exec.c|2 + default-configs/moxie-softmmu.mak |2 + disas.c |6 + disas/Makefile.objs |1 + disas/moxie.c | 360 + hw/moxie/Makefile.objs|6 + hw/moxie/moxiesim.c | 174 +++ include/disas/bfd.h | 66 +-- include/sysemu/arch_init.h|1 + qapi-schema.json |6 +- target-moxie/Makefile.objs|2 + target-moxie/cpu.c| 172 +++ target-moxie/cpu.h| 170 +++ target-moxie/helper.c | 170 +++ target-moxie/helper.h |9 + target-moxie/machine.c| 27 + target-moxie/machine.h|2 + target-moxie/mmu.c| 36 ++ target-moxie/mmu.h| 19 + target-moxie/translate.c | 1003 + 23 files changed, 2214 insertions(+), 36 deletions(-) create mode 100644 default-configs/moxie-softmmu.mak create mode 100644 disas/moxie.c create mode 100644 hw/moxie/Makefile.objs create mode 100644 hw/moxie/moxiesim.c create mode 100644 target-moxie/Makefile.objs create mode 100644 target-moxie/cpu.c create mode 100644 target-moxie/cpu.h create mode 100644 target-moxie/helper.c create mode 100644 target-moxie/helper.h create mode 100644 target-moxie/machine.c create mode 100644 target-moxie/machine.h create mode 100644 target-moxie/mmu.c create mode 100644 target-moxie/mmu.h create mode 100644 target-moxie/translate.c -- 1.8.1.4
[Qemu-devel] [PATCH v7 3/4] Add sample moxie system
Signed-off-by: Anthony Green gr...@moxielogic.com
---
hw/moxie/Makefile.objs | 6 ++
hw/moxie/moxiesim.c| 174 +
include/sysemu/arch_init.h | 1 +
3 files changed, 181 insertions(+)
create mode 100644 hw/moxie/Makefile.objs
create mode 100644 hw/moxie/moxiesim.c
diff --git a/hw/moxie/Makefile.objs b/hw/moxie/Makefile.objs
new file mode 100644
index 000..d0772d1
--- /dev/null
+++ b/hw/moxie/Makefile.objs
@@ -0,0 +1,6 @@
+# moxie boards
+obj-y = serial.o mc146818rtc.o vga.o
+obj-$(CONFIG_FDT) += device_tree.o
+
+obj-y := $(addprefix ../,$(obj-y))
+obj-y += moxiesim.o
diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c
new file mode 100644
index 000..e1e88a9
--- /dev/null
+++ b/hw/moxie/moxiesim.c
@@ -0,0 +1,174 @@
+/*
+ * QEMU/moxiesim emulation
+ *
+ * Emulates a very simple machine model similiar to the one use by the
+ * GDB moxie simulator.
+ *
+ * Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include hw/sysbus.h
+#include hw/hw.h
+#include hw/pc.h
+#include hw/isa.h
+#include net/net.h
+#include sysemu/sysemu.h
+#include hw/boards.h
+#include hw/loader.h
+#include hw/serial.h
+#include exec/address-spaces.h
+
+#define PHYS_MEM_BASE 0x8000
+
+typedef struct {
+uint64_t ram_size;
+const char *kernel_filename;
+const char *kernel_cmdline;
+const char *initrd_filename;
+} LoaderParams;
+
+static void load_kernel(MoxieCPU *cpu, LoaderParams *loader_params)
+{
+uint64_t entry, kernel_low, kernel_high;
+long kernel_size;
+long initrd_size;
+ram_addr_t initrd_offset;
+
+kernel_size = load_elf(loader_params-kernel_filename, NULL, NULL,
+ entry, kernel_low, kernel_high, 1,
+ ELF_MACHINE, 0);
+
+if (!kernel_size) {
+fprintf(stderr, qemu: could not load kernel '%s'\n,
+loader_params-kernel_filename);
+exit(1);
+}
+
+/* load initrd */
+initrd_size = 0;
+initrd_offset = 0;
+if (loader_params-initrd_filename) {
+initrd_size = get_image_size(loader_params-initrd_filename);
+if (initrd_size 0) {
+initrd_offset = (kernel_high + ~TARGET_PAGE_MASK)
+ TARGET_PAGE_MASK;
+if (initrd_offset + initrd_size loader_params-ram_size) {
+fprintf(stderr,
+qemu: memory too small for initial ram disk '%s'\n,
+loader_params-initrd_filename);
+exit(1);
+}
+initrd_size = load_image_targphys(loader_params-initrd_filename,
+ initrd_offset,
+ ram_size);
+}
+if (initrd_size == (target_ulong)-1) {
+fprintf(stderr, qemu: could not load initial ram disk '%s'\n,
+loader_params-initrd_filename);
+exit(1);
+}
+}
+}
+
+static void main_cpu_reset(void *opaque)
+{
+MoxieCPU *cpu = opaque;
+
+cpu_reset(CPU(cpu));
+}
+
+static inline DeviceState *
+moxie_intc_create(hwaddr base, qemu_irq irq, int kind_of_intr)
+{
+DeviceState *dev;
+
+dev = qdev_create(NULL, moxie,intc);
+qdev_prop_set_uint32(dev, kind-of-intr, kind_of_intr);
+qdev_init_nofail(dev);
+sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
+return dev;
+}
+
+static void moxiesim_init(QEMUMachineInitArgs *args)
+{
+MoxieCPU *cpu = NULL;
+ram_addr_t ram_size = args-ram_size;
+const char *cpu_model = args-cpu_model;
+const char *kernel_filename = args-kernel_filename;
+const char *kernel_cmdline = args-kernel_cmdline;
+const char *initrd_filename = args-initrd_filename;
+CPUMoxieState *env;
+MemoryRegion *address_space_mem = get_system_memory();
+MemoryRegion
[Qemu-devel] [PATCH v7 2/4] Add moxie disassembler
Signed-off-by: Anthony Green gr...@moxielogic.com
---
disas.c | 6 +
disas/Makefile.objs | 1 +
disas/moxie.c | 360
include/disas/bfd.h | 66 +-
4 files changed, 401 insertions(+), 32 deletions(-)
create mode 100644 disas/moxie.c
diff --git a/disas.c b/disas.c
index a46faee..74d3ba0 100644
--- a/disas.c
+++ b/disas.c
@@ -256,6 +256,9 @@ void target_disas(FILE *out, CPUArchState *env,
target_ulong code,
#elif defined(TARGET_MICROBLAZE)
s.info.mach = bfd_arch_microblaze;
print_insn = print_insn_microblaze;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
@@ -462,6 +465,9 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
#elif defined(TARGET_S390X)
s.info.mach = bfd_mach_s390_64;
print_insn = print_insn_s390;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
diff --git a/disas/Makefile.objs b/disas/Makefile.objs
index ed75f9a..3b1e77a 100644
--- a/disas/Makefile.objs
+++ b/disas/Makefile.objs
@@ -7,6 +7,7 @@ common-obj-$(CONFIG_IA64_DIS) += ia64.o
common-obj-$(CONFIG_M68K_DIS) += m68k.o
common-obj-$(CONFIG_MICROBLAZE_DIS) += microblaze.o
common-obj-$(CONFIG_MIPS_DIS) += mips.o
+common-obj-$(CONFIG_MOXIE_DIS) += moxie.o
common-obj-$(CONFIG_PPC_DIS) += ppc.o
common-obj-$(CONFIG_S390_DIS) += s390.o
common-obj-$(CONFIG_SH4_DIS) += sh4.o
diff --git a/disas/moxie.c b/disas/moxie.c
new file mode 100644
index 000..4c5f180
--- /dev/null
+++ b/disas/moxie.c
@@ -0,0 +1,360 @@
+/* Disassemble moxie instructions.
+ Copyright (c) 2009 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see http://www.gnu.org/licenses/. */
+
+#include stdio.h
+#define STATIC_TABLE
+#define DEFINE_TABLE
+
+#include disas/bfd.h
+
+static void *stream;
+
+/* Form 1 instructions come in different flavors:
+
+ Some have no arguments (MOXIE_F1_NARG)
+ Some only use the A operand (MOXIE_F1_A)
+ Some use A and B registers (MOXIE_F1_AB)
+ Some use A and consume a 4 byte immediate value (MOXIE_F1_A4)
+ Some use just a 4 byte immediate value (MOXIE_F1_4)
+ Some use just a 4 byte memory address (MOXIE_F1_M)
+ Some use B and an indirect A(MOXIE_F1_AiB)
+ Some use A and an indirect B(MOXIE_F1_ABi)
+ Some consume a 4 byte immediate value and use X (MOXIE_F1_4A)
+ Some use B and an indirect A plus 4 bytes (MOXIE_F1_AiB4)
+ Some use A and an indirect B plus 4 bytes (MOXIE_F1_ABi4)
+
+ Form 2 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F2_NARG)
+ Some use the A register and an 8-bit value (MOXIE_F2_A8V)
+
+ Form 3 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F3_NARG)
+ Some have a 10-bit PC relative operand (MOXIE_F3_PCREL). */
+
+#define MOXIE_F1_NARG 0x100
+#define MOXIE_F1_A0x101
+#define MOXIE_F1_AB 0x102
+/* #define MOXIE_F1_ABC 0x103 */
+#define MOXIE_F1_A4 0x104
+#define MOXIE_F1_40x105
+#define MOXIE_F1_AiB 0x106
+#define MOXIE_F1_ABi 0x107
+#define MOXIE_F1_4A 0x108
+#define MOXIE_F1_AiB4 0x109
+#define MOXIE_F1_ABi4 0x10a
+#define MOXIE_F1_M0x10b
+
+#define MOXIE_F2_NARG 0x200
+#define MOXIE_F2_A8V 0x201
+
+#define MOXIE_F3_NARG 0x300
+#define MOXIE_F3_PCREL 0x301
+
+typedef struct moxie_opc_info_t {
+short opcode;
+unsigned itype;
+const char * name;
+} moxie_opc_info_t;
+
+extern const moxie_opc_info_t moxie_form1_opc_info[64];
+extern const moxie_opc_info_t moxie_form2_opc_info[4];
+extern const moxie_opc_info_t moxie_form3_opc_info[16];
+
+/* The moxie processor's 16-bit instructions come in two forms:
+
+ FORM 1 instructions start with a 0 bit...
+
+ 0ooo
+ 0 F
+
+ ooo - form 1 opcode number
+ - operand A
+ - operand B
+
+ FORM 2 instructions start with bits 10...
+
+ 10oo
+ 0 F
+
+ oo - form 2
[Qemu-devel] [PATCH v7 1/4] Add moxie target code
Signed-off-by: Anthony Green gr...@moxielogic.com
---
target-moxie/Makefile.objs |2 +
target-moxie/cpu.c | 172
target-moxie/cpu.h | 170
target-moxie/helper.c | 170
target-moxie/helper.h |9 +
target-moxie/machine.c | 27 ++
target-moxie/machine.h |2 +
target-moxie/mmu.c | 36 ++
target-moxie/mmu.h | 19 +
target-moxie/translate.c | 1003
10 files changed, 1610 insertions(+)
create mode 100644 target-moxie/Makefile.objs
create mode 100644 target-moxie/cpu.c
create mode 100644 target-moxie/cpu.h
create mode 100644 target-moxie/helper.c
create mode 100644 target-moxie/helper.h
create mode 100644 target-moxie/machine.c
create mode 100644 target-moxie/machine.h
create mode 100644 target-moxie/mmu.c
create mode 100644 target-moxie/mmu.h
create mode 100644 target-moxie/translate.c
diff --git a/target-moxie/Makefile.objs b/target-moxie/Makefile.objs
new file mode 100644
index 000..6381d4d
--- /dev/null
+++ b/target-moxie/Makefile.objs
@@ -0,0 +1,2 @@
+obj-y += translate.o helper.o machine.o cpu.o machine.o
+obj-$(CONFIG_SOFTMMU) += mmu.o
diff --git a/target-moxie/cpu.c b/target-moxie/cpu.c
new file mode 100644
index 000..c17d3f0
--- /dev/null
+++ b/target-moxie/cpu.c
@@ -0,0 +1,172 @@
+/*
+ * QEMU Moxie CPU
+ *
+ * Copyright (c) 2013 Anthony Green
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see http://www.gnu.org/licenses/.
+ */
+
+#include cpu.h
+#include qemu-common.h
+#include migration/vmstate.h
+#include machine.h
+
+static void moxie_cpu_reset(CPUState *s)
+{
+MoxieCPU *cpu = MOXIE_CPU(s);
+MoxieCPUClass *mcc = MOXIE_CPU_GET_CLASS(cpu);
+CPUMoxieState *env = cpu-env;
+
+if (qemu_loglevel_mask(CPU_LOG_RESET)) {
+qemu_log(CPU Reset (CPU %d)\n, s-cpu_index);
+log_cpu_state(env, 0);
+}
+
+mcc-parent_reset(s);
+
+memset(env, 0, offsetof(CPUMoxieState, breakpoints));
+env-pc = 0x1000;
+
+tlb_flush(env, 1);
+}
+
+static void moxie_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+MoxieCPU *cpu = MOXIE_CPU(dev);
+MoxieCPUClass *occ = MOXIE_CPU_GET_CLASS(dev);
+
+qemu_init_vcpu(cpu-env);
+cpu_reset(CPU(cpu));
+
+occ-parent_realize(dev, errp);
+}
+
+static void moxie_cpu_initfn(Object *obj)
+{
+CPUState *cs = CPU(obj);
+MoxieCPU *cpu = MOXIE_CPU(obj);
+static int inited;
+
+cs-env_ptr = cpu-env;
+cpu_exec_init(cpu-env);
+
+if (tcg_enabled() !inited) {
+inited = 1;
+moxie_translate_init();
+}
+}
+
+static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model)
+{
+ObjectClass *oc;
+
+if (cpu_model == NULL) {
+return NULL;
+}
+
+oc = object_class_by_name(cpu_model);
+if (oc != NULL (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) ||
+ object_class_is_abstract(oc))) {
+return NULL;
+}
+return oc;
+}
+
+static void moxie_cpu_class_init(ObjectClass *oc, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(oc);
+CPUClass *cc = CPU_CLASS(oc);
+MoxieCPUClass *mcc = MOXIE_CPU_CLASS(oc);
+
+mcc-parent_realize = dc-realize;
+dc-realize = moxie_cpu_realizefn;
+
+mcc-parent_reset = cc-reset;
+cc-reset = moxie_cpu_reset;
+
+cc-class_by_name = moxie_cpu_class_by_name;
+
+dc-vmsd = vmstate_moxie_cpu;
+}
+
+static void moxielite_initfn(Object *obj)
+{
+/* Set cpu feature flags */
+}
+
+static void moxie_any_initfn(Object *obj)
+{
+/* Set cpu feature flags */
+}
+
+typedef struct MoxieCPUInfo {
+const char *name;
+void (*initfn)(Object *obj);
+} MoxieCPUInfo;
+
+static const MoxieCPUInfo moxie_cpus[] = {
+{ .name = MoxieLite, .initfn = moxielite_initfn },
+{ .name = any,.initfn = moxie_any_initfn },
+};
+
+MoxieCPU *cpu_moxie_init(const char *cpu_model)
+{
+MoxieCPU *cpu;
+ObjectClass *oc;
+
+oc = moxie_cpu_class_by_name(cpu_model);
+if (oc == NULL) {
+return NULL;
+}
+cpu = MOXIE_CPU(object_new(object_class_get_name(oc)));
+cpu-env.cpu_model_str = cpu_model;
+
+object_property_set_bool(OBJECT(cpu), true, realized, NULL);
+
+return cpu;
+}
+
+static void cpu_register(const MoxieCPUInfo *info)
+{
+TypeInfo type_info = {
+.parent = TYPE_MOXIE_CPU,
+.instance_size
[Qemu-devel] [PATCH v7 4/4] Add top level changes for moxie
Signed-off-by: Anthony Green gr...@moxielogic.com
---
MAINTAINERS | 5 +
arch_init.c | 2 ++
configure | 9 -
cpu-exec.c| 2 ++
default-configs/moxie-softmmu.mak | 2 ++
qapi-schema.json | 6 +++---
6 files changed, 22 insertions(+), 4 deletions(-)
create mode 100644 default-configs/moxie-softmmu.mak
diff --git a/MAINTAINERS b/MAINTAINERS
index 21043e4..b970159 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -91,6 +91,11 @@ M: Aurelien Jarno aurel...@aurel32.net
S: Odd Fixes
F: target-mips/
+Moxie
+M: Anthony Green gr...@moxielogic.com
+S: Maintained
+F: target-moxie/
+
PowerPC
M: Alexander Graf ag...@suse.de
L: qemu-...@nongnu.org
diff --git a/arch_init.c b/arch_init.c
index 8daeafa..ddae1b7 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -85,6 +85,8 @@ int graphic_depth = 15;
#define QEMU_ARCH QEMU_ARCH_MICROBLAZE
#elif defined(TARGET_MIPS)
#define QEMU_ARCH QEMU_ARCH_MIPS
+#elif defined(TARGET_MOXIE)
+#define QEMU_ARCH QEMU_ARCH_MOXIE
#elif defined(TARGET_OPENRISC)
#define QEMU_ARCH QEMU_ARCH_OPENRISC
#elif defined(TARGET_PPC)
diff --git a/configure b/configure
index 19738ac..ae5b3bc 100755
--- a/configure
+++ b/configure
@@ -958,6 +958,7 @@ mips-softmmu \
mipsel-softmmu \
mips64-softmmu \
mips64el-softmmu \
+moxie-softmmu \
or32-softmmu \
ppc-softmmu \
ppcemb-softmmu \
@@ -3913,7 +3914,7 @@ target_arch2=`echo $target | cut -d '-' -f 1`
target_bigendian=no
case $target_arch2 in
-
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
+
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
target_bigendian=yes
;;
esac
@@ -4018,6 +4019,8 @@ case $target_arch2 in
echo TARGET_ABI_MIPSN64=y $config_target_mak
target_long_alignment=8
;;
+ moxie)
+ ;;
or32)
TARGET_ARCH=openrisc
TARGET_BASE_ARCH=openrisc
@@ -4262,6 +4265,10 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
echo CONFIG_MIPS_DIS=y $config_target_mak
echo CONFIG_MIPS_DIS=y config-all-disas.mak
;;
+ moxie*)
+echo CONFIG_MOXIE_DIS=y $config_target_mak
+echo CONFIG_MOXIE_DIS=y config-all-disas.mak
+ ;;
or32)
echo CONFIG_OPENRISC_DIS=y $config_target_mak
echo CONFIG_OPENRISC_DIS=y config-all-disas.mak
diff --git a/cpu-exec.c b/cpu-exec.c
index afbe497..ba7ea41 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -221,6 +221,7 @@ int cpu_exec(CPUArchState *env)
#elif defined(TARGET_LM32)
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_CRIS)
@@ -655,6 +656,7 @@ int cpu_exec(CPUArchState *env)
| env-cc_dest | (env-cc_x 4);
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_ALPHA)
diff --git a/default-configs/moxie-softmmu.mak
b/default-configs/moxie-softmmu.mak
new file mode 100644
index 000..d378363
--- /dev/null
+++ b/default-configs/moxie-softmmu.mak
@@ -0,0 +1,2 @@
+# Default configuration for moxie-softmmu
+
diff --git a/qapi-schema.json b/qapi-schema.json
index 28b070f..233ea1b 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -2994,9 +2994,9 @@
##
{ 'enum': 'TargetType',
'data': [ 'alpha', 'arm', 'cris', 'i386', 'lm32', 'm68k', 'microblazeel',
-'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'or32',
-'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4', 'sparc64',
-'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
+'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'moxie',
+'or32', 'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4',
+'sparc64', 'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
##
# @TargetInfo:
--
1.8.1.4
[Qemu-devel] [PATCH v8 0/4] Moxie CPU port
Here's version 8. This one includes Blue's typedef usage suggestion, and gen_tb_start()/gen_tb_end() as required by Peter Maydell's recent 'get rid of cpu_tb_unlink()' patch series. Please consider this version for inclusion in qemu. Thanks! AG Anthony Green (4): Add moxie target code Add moxie disassembler Add sample moxie system Add top level changes for moxie MAINTAINERS |5 + arch_init.c |2 + configure |9 +- cpu-exec.c|2 + default-configs/moxie-softmmu.mak |2 + disas.c |6 + disas/Makefile.objs |1 + disas/moxie.c | 360 + hw/moxie/Makefile.objs|6 + hw/moxie/moxiesim.c | 174 +++ include/disas/bfd.h |2 + include/sysemu/arch_init.h|1 + qapi-schema.json |6 +- target-moxie/Makefile.objs|2 + target-moxie/cpu.c| 172 +++ target-moxie/cpu.h| 172 +++ target-moxie/helper.c | 170 +++ target-moxie/helper.h |9 + target-moxie/machine.c| 27 + target-moxie/machine.h|2 + target-moxie/mmu.c| 36 ++ target-moxie/mmu.h| 19 + target-moxie/translate.c | 1012 + 23 files changed, 2193 insertions(+), 4 deletions(-) create mode 100644 default-configs/moxie-softmmu.mak create mode 100644 disas/moxie.c create mode 100644 hw/moxie/Makefile.objs create mode 100644 hw/moxie/moxiesim.c create mode 100644 target-moxie/Makefile.objs create mode 100644 target-moxie/cpu.c create mode 100644 target-moxie/cpu.h create mode 100644 target-moxie/helper.c create mode 100644 target-moxie/helper.h create mode 100644 target-moxie/machine.c create mode 100644 target-moxie/machine.h create mode 100644 target-moxie/mmu.c create mode 100644 target-moxie/mmu.h create mode 100644 target-moxie/translate.c -- 1.8.1.4
[Qemu-devel] [PATCH v8 2/4] Add moxie disassembler
Signed-off-by: Anthony Green gr...@moxielogic.com
---
disas.c | 6 +
disas/Makefile.objs | 1 +
disas/moxie.c | 360
include/disas/bfd.h | 2 +
4 files changed, 369 insertions(+)
create mode 100644 disas/moxie.c
diff --git a/disas.c b/disas.c
index a46faee..74d3ba0 100644
--- a/disas.c
+++ b/disas.c
@@ -256,6 +256,9 @@ void target_disas(FILE *out, CPUArchState *env,
target_ulong code,
#elif defined(TARGET_MICROBLAZE)
s.info.mach = bfd_arch_microblaze;
print_insn = print_insn_microblaze;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
@@ -462,6 +465,9 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
#elif defined(TARGET_S390X)
s.info.mach = bfd_mach_s390_64;
print_insn = print_insn_s390;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
diff --git a/disas/Makefile.objs b/disas/Makefile.objs
index ed75f9a..3b1e77a 100644
--- a/disas/Makefile.objs
+++ b/disas/Makefile.objs
@@ -7,6 +7,7 @@ common-obj-$(CONFIG_IA64_DIS) += ia64.o
common-obj-$(CONFIG_M68K_DIS) += m68k.o
common-obj-$(CONFIG_MICROBLAZE_DIS) += microblaze.o
common-obj-$(CONFIG_MIPS_DIS) += mips.o
+common-obj-$(CONFIG_MOXIE_DIS) += moxie.o
common-obj-$(CONFIG_PPC_DIS) += ppc.o
common-obj-$(CONFIG_S390_DIS) += s390.o
common-obj-$(CONFIG_SH4_DIS) += sh4.o
diff --git a/disas/moxie.c b/disas/moxie.c
new file mode 100644
index 000..4c5f180
--- /dev/null
+++ b/disas/moxie.c
@@ -0,0 +1,360 @@
+/* Disassemble moxie instructions.
+ Copyright (c) 2009 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see http://www.gnu.org/licenses/. */
+
+#include stdio.h
+#define STATIC_TABLE
+#define DEFINE_TABLE
+
+#include disas/bfd.h
+
+static void *stream;
+
+/* Form 1 instructions come in different flavors:
+
+ Some have no arguments (MOXIE_F1_NARG)
+ Some only use the A operand (MOXIE_F1_A)
+ Some use A and B registers (MOXIE_F1_AB)
+ Some use A and consume a 4 byte immediate value (MOXIE_F1_A4)
+ Some use just a 4 byte immediate value (MOXIE_F1_4)
+ Some use just a 4 byte memory address (MOXIE_F1_M)
+ Some use B and an indirect A(MOXIE_F1_AiB)
+ Some use A and an indirect B(MOXIE_F1_ABi)
+ Some consume a 4 byte immediate value and use X (MOXIE_F1_4A)
+ Some use B and an indirect A plus 4 bytes (MOXIE_F1_AiB4)
+ Some use A and an indirect B plus 4 bytes (MOXIE_F1_ABi4)
+
+ Form 2 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F2_NARG)
+ Some use the A register and an 8-bit value (MOXIE_F2_A8V)
+
+ Form 3 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F3_NARG)
+ Some have a 10-bit PC relative operand (MOXIE_F3_PCREL). */
+
+#define MOXIE_F1_NARG 0x100
+#define MOXIE_F1_A0x101
+#define MOXIE_F1_AB 0x102
+/* #define MOXIE_F1_ABC 0x103 */
+#define MOXIE_F1_A4 0x104
+#define MOXIE_F1_40x105
+#define MOXIE_F1_AiB 0x106
+#define MOXIE_F1_ABi 0x107
+#define MOXIE_F1_4A 0x108
+#define MOXIE_F1_AiB4 0x109
+#define MOXIE_F1_ABi4 0x10a
+#define MOXIE_F1_M0x10b
+
+#define MOXIE_F2_NARG 0x200
+#define MOXIE_F2_A8V 0x201
+
+#define MOXIE_F3_NARG 0x300
+#define MOXIE_F3_PCREL 0x301
+
+typedef struct moxie_opc_info_t {
+short opcode;
+unsigned itype;
+const char * name;
+} moxie_opc_info_t;
+
+extern const moxie_opc_info_t moxie_form1_opc_info[64];
+extern const moxie_opc_info_t moxie_form2_opc_info[4];
+extern const moxie_opc_info_t moxie_form3_opc_info[16];
+
+/* The moxie processor's 16-bit instructions come in two forms:
+
+ FORM 1 instructions start with a 0 bit...
+
+ 0ooo
+ 0 F
+
+ ooo - form 1 opcode number
+ - operand A
+ - operand B
+
+ FORM 2 instructions start with bits 10...
+
+ 10oo
+ 0 F
+
+ oo - form 2 opcode number
+
[Qemu-devel] [PATCH v8 1/4] Add moxie target code
Signed-off-by: Anthony Green gr...@moxielogic.com
---
target-moxie/Makefile.objs |2 +
target-moxie/cpu.c | 172
target-moxie/cpu.h | 172
target-moxie/helper.c | 170
target-moxie/helper.h |9 +
target-moxie/machine.c | 27 ++
target-moxie/machine.h |2 +
target-moxie/mmu.c | 36 ++
target-moxie/mmu.h | 19 +
target-moxie/translate.c | 1012
10 files changed, 1621 insertions(+)
create mode 100644 target-moxie/Makefile.objs
create mode 100644 target-moxie/cpu.c
create mode 100644 target-moxie/cpu.h
create mode 100644 target-moxie/helper.c
create mode 100644 target-moxie/helper.h
create mode 100644 target-moxie/machine.c
create mode 100644 target-moxie/machine.h
create mode 100644 target-moxie/mmu.c
create mode 100644 target-moxie/mmu.h
create mode 100644 target-moxie/translate.c
diff --git a/target-moxie/Makefile.objs b/target-moxie/Makefile.objs
new file mode 100644
index 000..6381d4d
--- /dev/null
+++ b/target-moxie/Makefile.objs
@@ -0,0 +1,2 @@
+obj-y += translate.o helper.o machine.o cpu.o machine.o
+obj-$(CONFIG_SOFTMMU) += mmu.o
diff --git a/target-moxie/cpu.c b/target-moxie/cpu.c
new file mode 100644
index 000..c17d3f0
--- /dev/null
+++ b/target-moxie/cpu.c
@@ -0,0 +1,172 @@
+/*
+ * QEMU Moxie CPU
+ *
+ * Copyright (c) 2013 Anthony Green
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see http://www.gnu.org/licenses/.
+ */
+
+#include cpu.h
+#include qemu-common.h
+#include migration/vmstate.h
+#include machine.h
+
+static void moxie_cpu_reset(CPUState *s)
+{
+MoxieCPU *cpu = MOXIE_CPU(s);
+MoxieCPUClass *mcc = MOXIE_CPU_GET_CLASS(cpu);
+CPUMoxieState *env = cpu-env;
+
+if (qemu_loglevel_mask(CPU_LOG_RESET)) {
+qemu_log(CPU Reset (CPU %d)\n, s-cpu_index);
+log_cpu_state(env, 0);
+}
+
+mcc-parent_reset(s);
+
+memset(env, 0, offsetof(CPUMoxieState, breakpoints));
+env-pc = 0x1000;
+
+tlb_flush(env, 1);
+}
+
+static void moxie_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+MoxieCPU *cpu = MOXIE_CPU(dev);
+MoxieCPUClass *occ = MOXIE_CPU_GET_CLASS(dev);
+
+qemu_init_vcpu(cpu-env);
+cpu_reset(CPU(cpu));
+
+occ-parent_realize(dev, errp);
+}
+
+static void moxie_cpu_initfn(Object *obj)
+{
+CPUState *cs = CPU(obj);
+MoxieCPU *cpu = MOXIE_CPU(obj);
+static int inited;
+
+cs-env_ptr = cpu-env;
+cpu_exec_init(cpu-env);
+
+if (tcg_enabled() !inited) {
+inited = 1;
+moxie_translate_init();
+}
+}
+
+static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model)
+{
+ObjectClass *oc;
+
+if (cpu_model == NULL) {
+return NULL;
+}
+
+oc = object_class_by_name(cpu_model);
+if (oc != NULL (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) ||
+ object_class_is_abstract(oc))) {
+return NULL;
+}
+return oc;
+}
+
+static void moxie_cpu_class_init(ObjectClass *oc, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(oc);
+CPUClass *cc = CPU_CLASS(oc);
+MoxieCPUClass *mcc = MOXIE_CPU_CLASS(oc);
+
+mcc-parent_realize = dc-realize;
+dc-realize = moxie_cpu_realizefn;
+
+mcc-parent_reset = cc-reset;
+cc-reset = moxie_cpu_reset;
+
+cc-class_by_name = moxie_cpu_class_by_name;
+
+dc-vmsd = vmstate_moxie_cpu;
+}
+
+static void moxielite_initfn(Object *obj)
+{
+/* Set cpu feature flags */
+}
+
+static void moxie_any_initfn(Object *obj)
+{
+/* Set cpu feature flags */
+}
+
+typedef struct MoxieCPUInfo {
+const char *name;
+void (*initfn)(Object *obj);
+} MoxieCPUInfo;
+
+static const MoxieCPUInfo moxie_cpus[] = {
+{ .name = MoxieLite, .initfn = moxielite_initfn },
+{ .name = any,.initfn = moxie_any_initfn },
+};
+
+MoxieCPU *cpu_moxie_init(const char *cpu_model)
+{
+MoxieCPU *cpu;
+ObjectClass *oc;
+
+oc = moxie_cpu_class_by_name(cpu_model);
+if (oc == NULL) {
+return NULL;
+}
+cpu = MOXIE_CPU(object_new(object_class_get_name(oc)));
+cpu-env.cpu_model_str = cpu_model;
+
+object_property_set_bool(OBJECT(cpu), true, realized, NULL);
+
+return cpu;
+}
+
+static void cpu_register(const MoxieCPUInfo *info)
+{
+TypeInfo type_info = {
+.parent = TYPE_MOXIE_CPU,
+.instance_size
[Qemu-devel] [PATCH v8 4/4] Add top level changes for moxie
Signed-off-by: Anthony Green gr...@moxielogic.com
---
MAINTAINERS | 5 +
arch_init.c | 2 ++
configure | 9 -
cpu-exec.c| 2 ++
default-configs/moxie-softmmu.mak | 2 ++
qapi-schema.json | 6 +++---
6 files changed, 22 insertions(+), 4 deletions(-)
create mode 100644 default-configs/moxie-softmmu.mak
diff --git a/MAINTAINERS b/MAINTAINERS
index 21043e4..b970159 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -91,6 +91,11 @@ M: Aurelien Jarno aurel...@aurel32.net
S: Odd Fixes
F: target-mips/
+Moxie
+M: Anthony Green gr...@moxielogic.com
+S: Maintained
+F: target-moxie/
+
PowerPC
M: Alexander Graf ag...@suse.de
L: qemu-...@nongnu.org
diff --git a/arch_init.c b/arch_init.c
index 8daeafa..ddae1b7 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -85,6 +85,8 @@ int graphic_depth = 15;
#define QEMU_ARCH QEMU_ARCH_MICROBLAZE
#elif defined(TARGET_MIPS)
#define QEMU_ARCH QEMU_ARCH_MIPS
+#elif defined(TARGET_MOXIE)
+#define QEMU_ARCH QEMU_ARCH_MOXIE
#elif defined(TARGET_OPENRISC)
#define QEMU_ARCH QEMU_ARCH_OPENRISC
#elif defined(TARGET_PPC)
diff --git a/configure b/configure
index 19738ac..ae5b3bc 100755
--- a/configure
+++ b/configure
@@ -958,6 +958,7 @@ mips-softmmu \
mipsel-softmmu \
mips64-softmmu \
mips64el-softmmu \
+moxie-softmmu \
or32-softmmu \
ppc-softmmu \
ppcemb-softmmu \
@@ -3913,7 +3914,7 @@ target_arch2=`echo $target | cut -d '-' -f 1`
target_bigendian=no
case $target_arch2 in
-
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
+
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
target_bigendian=yes
;;
esac
@@ -4018,6 +4019,8 @@ case $target_arch2 in
echo TARGET_ABI_MIPSN64=y $config_target_mak
target_long_alignment=8
;;
+ moxie)
+ ;;
or32)
TARGET_ARCH=openrisc
TARGET_BASE_ARCH=openrisc
@@ -4262,6 +4265,10 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
echo CONFIG_MIPS_DIS=y $config_target_mak
echo CONFIG_MIPS_DIS=y config-all-disas.mak
;;
+ moxie*)
+echo CONFIG_MOXIE_DIS=y $config_target_mak
+echo CONFIG_MOXIE_DIS=y config-all-disas.mak
+ ;;
or32)
echo CONFIG_OPENRISC_DIS=y $config_target_mak
echo CONFIG_OPENRISC_DIS=y config-all-disas.mak
diff --git a/cpu-exec.c b/cpu-exec.c
index 9092145..12060f4 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -236,6 +236,7 @@ int cpu_exec(CPUArchState *env)
#elif defined(TARGET_LM32)
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_CRIS)
@@ -686,6 +687,7 @@ int cpu_exec(CPUArchState *env)
| env-cc_dest | (env-cc_x 4);
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_ALPHA)
diff --git a/default-configs/moxie-softmmu.mak
b/default-configs/moxie-softmmu.mak
new file mode 100644
index 000..d378363
--- /dev/null
+++ b/default-configs/moxie-softmmu.mak
@@ -0,0 +1,2 @@
+# Default configuration for moxie-softmmu
+
diff --git a/qapi-schema.json b/qapi-schema.json
index 28b070f..233ea1b 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -2994,9 +2994,9 @@
##
{ 'enum': 'TargetType',
'data': [ 'alpha', 'arm', 'cris', 'i386', 'lm32', 'm68k', 'microblazeel',
-'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'or32',
-'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4', 'sparc64',
-'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
+'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'moxie',
+'or32', 'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4',
+'sparc64', 'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
##
# @TargetInfo:
--
1.8.1.4
[Qemu-devel] [PATCH v8 3/4] Add sample moxie system
Signed-off-by: Anthony Green gr...@moxielogic.com
---
hw/moxie/Makefile.objs | 6 ++
hw/moxie/moxiesim.c| 174 +
include/sysemu/arch_init.h | 1 +
3 files changed, 181 insertions(+)
create mode 100644 hw/moxie/Makefile.objs
create mode 100644 hw/moxie/moxiesim.c
diff --git a/hw/moxie/Makefile.objs b/hw/moxie/Makefile.objs
new file mode 100644
index 000..d0772d1
--- /dev/null
+++ b/hw/moxie/Makefile.objs
@@ -0,0 +1,6 @@
+# moxie boards
+obj-y = serial.o mc146818rtc.o vga.o
+obj-$(CONFIG_FDT) += device_tree.o
+
+obj-y := $(addprefix ../,$(obj-y))
+obj-y += moxiesim.o
diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c
new file mode 100644
index 000..e1e88a9
--- /dev/null
+++ b/hw/moxie/moxiesim.c
@@ -0,0 +1,174 @@
+/*
+ * QEMU/moxiesim emulation
+ *
+ * Emulates a very simple machine model similiar to the one use by the
+ * GDB moxie simulator.
+ *
+ * Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include hw/sysbus.h
+#include hw/hw.h
+#include hw/pc.h
+#include hw/isa.h
+#include net/net.h
+#include sysemu/sysemu.h
+#include hw/boards.h
+#include hw/loader.h
+#include hw/serial.h
+#include exec/address-spaces.h
+
+#define PHYS_MEM_BASE 0x8000
+
+typedef struct {
+uint64_t ram_size;
+const char *kernel_filename;
+const char *kernel_cmdline;
+const char *initrd_filename;
+} LoaderParams;
+
+static void load_kernel(MoxieCPU *cpu, LoaderParams *loader_params)
+{
+uint64_t entry, kernel_low, kernel_high;
+long kernel_size;
+long initrd_size;
+ram_addr_t initrd_offset;
+
+kernel_size = load_elf(loader_params-kernel_filename, NULL, NULL,
+ entry, kernel_low, kernel_high, 1,
+ ELF_MACHINE, 0);
+
+if (!kernel_size) {
+fprintf(stderr, qemu: could not load kernel '%s'\n,
+loader_params-kernel_filename);
+exit(1);
+}
+
+/* load initrd */
+initrd_size = 0;
+initrd_offset = 0;
+if (loader_params-initrd_filename) {
+initrd_size = get_image_size(loader_params-initrd_filename);
+if (initrd_size 0) {
+initrd_offset = (kernel_high + ~TARGET_PAGE_MASK)
+ TARGET_PAGE_MASK;
+if (initrd_offset + initrd_size loader_params-ram_size) {
+fprintf(stderr,
+qemu: memory too small for initial ram disk '%s'\n,
+loader_params-initrd_filename);
+exit(1);
+}
+initrd_size = load_image_targphys(loader_params-initrd_filename,
+ initrd_offset,
+ ram_size);
+}
+if (initrd_size == (target_ulong)-1) {
+fprintf(stderr, qemu: could not load initial ram disk '%s'\n,
+loader_params-initrd_filename);
+exit(1);
+}
+}
+}
+
+static void main_cpu_reset(void *opaque)
+{
+MoxieCPU *cpu = opaque;
+
+cpu_reset(CPU(cpu));
+}
+
+static inline DeviceState *
+moxie_intc_create(hwaddr base, qemu_irq irq, int kind_of_intr)
+{
+DeviceState *dev;
+
+dev = qdev_create(NULL, moxie,intc);
+qdev_prop_set_uint32(dev, kind-of-intr, kind_of_intr);
+qdev_init_nofail(dev);
+sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
+return dev;
+}
+
+static void moxiesim_init(QEMUMachineInitArgs *args)
+{
+MoxieCPU *cpu = NULL;
+ram_addr_t ram_size = args-ram_size;
+const char *cpu_model = args-cpu_model;
+const char *kernel_filename = args-kernel_filename;
+const char *kernel_cmdline = args-kernel_cmdline;
+const char *initrd_filename = args-initrd_filename;
+CPUMoxieState *env;
+MemoryRegion *address_space_mem = get_system_memory();
+MemoryRegion
Re: [Qemu-devel] [PATCH v8 0/4] Moxie CPU port
Ping. Thanks, AG On Mon, Mar 4, 2013 at 7:29 AM, Anthony Green gr...@moxielogic.com wrote: Here's version 8. This one includes Blue's typedef usage suggestion, and gen_tb_start()/gen_tb_end() as required by Peter Maydell's recent 'get rid of cpu_tb_unlink()' patch series. Please consider this version for inclusion in qemu. Thanks! AG Anthony Green (4): Add moxie target code Add moxie disassembler Add sample moxie system Add top level changes for moxie MAINTAINERS |5 + arch_init.c |2 + configure |9 +- cpu-exec.c|2 + default-configs/moxie-softmmu.mak |2 + disas.c |6 + disas/Makefile.objs |1 + disas/moxie.c | 360 + hw/moxie/Makefile.objs|6 + hw/moxie/moxiesim.c | 174 +++ include/disas/bfd.h |2 + include/sysemu/arch_init.h|1 + qapi-schema.json |6 +- target-moxie/Makefile.objs|2 + target-moxie/cpu.c| 172 +++ target-moxie/cpu.h| 172 +++ target-moxie/helper.c | 170 +++ target-moxie/helper.h |9 + target-moxie/machine.c| 27 + target-moxie/machine.h|2 + target-moxie/mmu.c| 36 ++ target-moxie/mmu.h| 19 + target-moxie/translate.c | 1012 + 23 files changed, 2193 insertions(+), 4 deletions(-) create mode 100644 default-configs/moxie-softmmu.mak create mode 100644 disas/moxie.c create mode 100644 hw/moxie/Makefile.objs create mode 100644 hw/moxie/moxiesim.c create mode 100644 target-moxie/Makefile.objs create mode 100644 target-moxie/cpu.c create mode 100644 target-moxie/cpu.h create mode 100644 target-moxie/helper.c create mode 100644 target-moxie/helper.h create mode 100644 target-moxie/machine.c create mode 100644 target-moxie/machine.h create mode 100644 target-moxie/mmu.c create mode 100644 target-moxie/mmu.h create mode 100644 target-moxie/translate.c -- 1.8.1.4
[Qemu-devel] [PATCH v9 0/4] Moxie CPU port
This version of the patch implements 3 changes... 1. Blue's suggestion of lazy CC calculation, dramatically simplifying the branching code. 2. Blue's suggestion of turning brk instruction into an exception. 3. Richard's div helper cpu_restore_state suggestion. Please consider merging this version of the patch. Thank you, AG Anthony Green (4): Add moxie target code Add moxie disassembler Add sample moxie system Add top level changes for moxie MAINTAINERS | 5 + arch_init.c | 2 + configure | 9 +- cpu-exec.c| 2 + default-configs/moxie-softmmu.mak | 2 + disas.c | 6 + disas/Makefile.objs | 1 + disas/moxie.c | 360 +++ hw/moxie/Makefile.objs| 6 + hw/moxie/moxiesim.c | 174 include/disas/bfd.h | 2 + include/sysemu/arch_init.h| 1 + qapi-schema.json | 6 +- target-moxie/Makefile.objs| 2 + target-moxie/cpu.c| 172 +++ target-moxie/cpu.h| 169 +++ target-moxie/helper.c | 171 +++ target-moxie/helper.h | 10 + target-moxie/machine.c| 28 ++ target-moxie/machine.h| 2 + target-moxie/mmu.c| 36 ++ target-moxie/mmu.h| 19 + target-moxie/translate.c | 918 ++ 23 files changed, 2099 insertions(+), 4 deletions(-) create mode 100644 default-configs/moxie-softmmu.mak create mode 100644 disas/moxie.c create mode 100644 hw/moxie/Makefile.objs create mode 100644 hw/moxie/moxiesim.c create mode 100644 target-moxie/Makefile.objs create mode 100644 target-moxie/cpu.c create mode 100644 target-moxie/cpu.h create mode 100644 target-moxie/helper.c create mode 100644 target-moxie/helper.h create mode 100644 target-moxie/machine.c create mode 100644 target-moxie/machine.h create mode 100644 target-moxie/mmu.c create mode 100644 target-moxie/mmu.h create mode 100644 target-moxie/translate.c -- 1.8.1.4
[Qemu-devel] [PATCH v9 2/4] Add moxie disassembler
Signed-off-by: Anthony Green gr...@moxielogic.com
---
disas.c | 6 +
disas/Makefile.objs | 1 +
disas/moxie.c | 360
include/disas/bfd.h | 2 +
4 files changed, 369 insertions(+)
create mode 100644 disas/moxie.c
diff --git a/disas.c b/disas.c
index a46faee..74d3ba0 100644
--- a/disas.c
+++ b/disas.c
@@ -256,6 +256,9 @@ void target_disas(FILE *out, CPUArchState *env,
target_ulong code,
#elif defined(TARGET_MICROBLAZE)
s.info.mach = bfd_arch_microblaze;
print_insn = print_insn_microblaze;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
@@ -462,6 +465,9 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
#elif defined(TARGET_S390X)
s.info.mach = bfd_mach_s390_64;
print_insn = print_insn_s390;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
diff --git a/disas/Makefile.objs b/disas/Makefile.objs
index ed75f9a..3b1e77a 100644
--- a/disas/Makefile.objs
+++ b/disas/Makefile.objs
@@ -7,6 +7,7 @@ common-obj-$(CONFIG_IA64_DIS) += ia64.o
common-obj-$(CONFIG_M68K_DIS) += m68k.o
common-obj-$(CONFIG_MICROBLAZE_DIS) += microblaze.o
common-obj-$(CONFIG_MIPS_DIS) += mips.o
+common-obj-$(CONFIG_MOXIE_DIS) += moxie.o
common-obj-$(CONFIG_PPC_DIS) += ppc.o
common-obj-$(CONFIG_S390_DIS) += s390.o
common-obj-$(CONFIG_SH4_DIS) += sh4.o
diff --git a/disas/moxie.c b/disas/moxie.c
new file mode 100644
index 000..4c5f180
--- /dev/null
+++ b/disas/moxie.c
@@ -0,0 +1,360 @@
+/* Disassemble moxie instructions.
+ Copyright (c) 2009 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see http://www.gnu.org/licenses/. */
+
+#include stdio.h
+#define STATIC_TABLE
+#define DEFINE_TABLE
+
+#include disas/bfd.h
+
+static void *stream;
+
+/* Form 1 instructions come in different flavors:
+
+ Some have no arguments (MOXIE_F1_NARG)
+ Some only use the A operand (MOXIE_F1_A)
+ Some use A and B registers (MOXIE_F1_AB)
+ Some use A and consume a 4 byte immediate value (MOXIE_F1_A4)
+ Some use just a 4 byte immediate value (MOXIE_F1_4)
+ Some use just a 4 byte memory address (MOXIE_F1_M)
+ Some use B and an indirect A(MOXIE_F1_AiB)
+ Some use A and an indirect B(MOXIE_F1_ABi)
+ Some consume a 4 byte immediate value and use X (MOXIE_F1_4A)
+ Some use B and an indirect A plus 4 bytes (MOXIE_F1_AiB4)
+ Some use A and an indirect B plus 4 bytes (MOXIE_F1_ABi4)
+
+ Form 2 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F2_NARG)
+ Some use the A register and an 8-bit value (MOXIE_F2_A8V)
+
+ Form 3 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F3_NARG)
+ Some have a 10-bit PC relative operand (MOXIE_F3_PCREL). */
+
+#define MOXIE_F1_NARG 0x100
+#define MOXIE_F1_A0x101
+#define MOXIE_F1_AB 0x102
+/* #define MOXIE_F1_ABC 0x103 */
+#define MOXIE_F1_A4 0x104
+#define MOXIE_F1_40x105
+#define MOXIE_F1_AiB 0x106
+#define MOXIE_F1_ABi 0x107
+#define MOXIE_F1_4A 0x108
+#define MOXIE_F1_AiB4 0x109
+#define MOXIE_F1_ABi4 0x10a
+#define MOXIE_F1_M0x10b
+
+#define MOXIE_F2_NARG 0x200
+#define MOXIE_F2_A8V 0x201
+
+#define MOXIE_F3_NARG 0x300
+#define MOXIE_F3_PCREL 0x301
+
+typedef struct moxie_opc_info_t {
+short opcode;
+unsigned itype;
+const char * name;
+} moxie_opc_info_t;
+
+extern const moxie_opc_info_t moxie_form1_opc_info[64];
+extern const moxie_opc_info_t moxie_form2_opc_info[4];
+extern const moxie_opc_info_t moxie_form3_opc_info[16];
+
+/* The moxie processor's 16-bit instructions come in two forms:
+
+ FORM 1 instructions start with a 0 bit...
+
+ 0ooo
+ 0 F
+
+ ooo - form 1 opcode number
+ - operand A
+ - operand B
+
+ FORM 2 instructions start with bits 10...
+
+ 10oo
+ 0 F
+
+ oo - form 2 opcode number
+
[Qemu-devel] [PATCH v9 1/4] Add moxie target code
Signed-off-by: Anthony Green gr...@moxielogic.com
---
target-moxie/Makefile.objs | 2 +
target-moxie/cpu.c | 172 +
target-moxie/cpu.h | 169 +
target-moxie/helper.c | 171 +
target-moxie/helper.h | 10 +
target-moxie/machine.c | 28 ++
target-moxie/machine.h | 2 +
target-moxie/mmu.c | 36 ++
target-moxie/mmu.h | 19 +
target-moxie/translate.c | 918 +
10 files changed, 1527 insertions(+)
create mode 100644 target-moxie/Makefile.objs
create mode 100644 target-moxie/cpu.c
create mode 100644 target-moxie/cpu.h
create mode 100644 target-moxie/helper.c
create mode 100644 target-moxie/helper.h
create mode 100644 target-moxie/machine.c
create mode 100644 target-moxie/machine.h
create mode 100644 target-moxie/mmu.c
create mode 100644 target-moxie/mmu.h
create mode 100644 target-moxie/translate.c
diff --git a/target-moxie/Makefile.objs b/target-moxie/Makefile.objs
new file mode 100644
index 000..6381d4d
--- /dev/null
+++ b/target-moxie/Makefile.objs
@@ -0,0 +1,2 @@
+obj-y += translate.o helper.o machine.o cpu.o machine.o
+obj-$(CONFIG_SOFTMMU) += mmu.o
diff --git a/target-moxie/cpu.c b/target-moxie/cpu.c
new file mode 100644
index 000..c17d3f0
--- /dev/null
+++ b/target-moxie/cpu.c
@@ -0,0 +1,172 @@
+/*
+ * QEMU Moxie CPU
+ *
+ * Copyright (c) 2013 Anthony Green
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see http://www.gnu.org/licenses/.
+ */
+
+#include cpu.h
+#include qemu-common.h
+#include migration/vmstate.h
+#include machine.h
+
+static void moxie_cpu_reset(CPUState *s)
+{
+MoxieCPU *cpu = MOXIE_CPU(s);
+MoxieCPUClass *mcc = MOXIE_CPU_GET_CLASS(cpu);
+CPUMoxieState *env = cpu-env;
+
+if (qemu_loglevel_mask(CPU_LOG_RESET)) {
+qemu_log(CPU Reset (CPU %d)\n, s-cpu_index);
+log_cpu_state(env, 0);
+}
+
+mcc-parent_reset(s);
+
+memset(env, 0, offsetof(CPUMoxieState, breakpoints));
+env-pc = 0x1000;
+
+tlb_flush(env, 1);
+}
+
+static void moxie_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+MoxieCPU *cpu = MOXIE_CPU(dev);
+MoxieCPUClass *occ = MOXIE_CPU_GET_CLASS(dev);
+
+qemu_init_vcpu(cpu-env);
+cpu_reset(CPU(cpu));
+
+occ-parent_realize(dev, errp);
+}
+
+static void moxie_cpu_initfn(Object *obj)
+{
+CPUState *cs = CPU(obj);
+MoxieCPU *cpu = MOXIE_CPU(obj);
+static int inited;
+
+cs-env_ptr = cpu-env;
+cpu_exec_init(cpu-env);
+
+if (tcg_enabled() !inited) {
+inited = 1;
+moxie_translate_init();
+}
+}
+
+static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model)
+{
+ObjectClass *oc;
+
+if (cpu_model == NULL) {
+return NULL;
+}
+
+oc = object_class_by_name(cpu_model);
+if (oc != NULL (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) ||
+ object_class_is_abstract(oc))) {
+return NULL;
+}
+return oc;
+}
+
+static void moxie_cpu_class_init(ObjectClass *oc, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(oc);
+CPUClass *cc = CPU_CLASS(oc);
+MoxieCPUClass *mcc = MOXIE_CPU_CLASS(oc);
+
+mcc-parent_realize = dc-realize;
+dc-realize = moxie_cpu_realizefn;
+
+mcc-parent_reset = cc-reset;
+cc-reset = moxie_cpu_reset;
+
+cc-class_by_name = moxie_cpu_class_by_name;
+
+dc-vmsd = vmstate_moxie_cpu;
+}
+
+static void moxielite_initfn(Object *obj)
+{
+/* Set cpu feature flags */
+}
+
+static void moxie_any_initfn(Object *obj)
+{
+/* Set cpu feature flags */
+}
+
+typedef struct MoxieCPUInfo {
+const char *name;
+void (*initfn)(Object *obj);
+} MoxieCPUInfo;
+
+static const MoxieCPUInfo moxie_cpus[] = {
+{ .name = MoxieLite, .initfn = moxielite_initfn },
+{ .name = any,.initfn = moxie_any_initfn },
+};
+
+MoxieCPU *cpu_moxie_init(const char *cpu_model)
+{
+MoxieCPU *cpu;
+ObjectClass *oc;
+
+oc = moxie_cpu_class_by_name(cpu_model);
+if (oc == NULL) {
+return NULL;
+}
+cpu = MOXIE_CPU(object_new(object_class_get_name(oc)));
+cpu-env.cpu_model_str = cpu_model;
+
+object_property_set_bool(OBJECT(cpu), true, realized, NULL);
+
+return cpu;
+}
+
+static void cpu_register(const MoxieCPUInfo *info)
+{
+TypeInfo type_info = {
+.parent = TYPE_MOXIE_CPU,
+.instance_size = sizeof
[Qemu-devel] [PATCH v9 3/4] Add sample moxie system
Signed-off-by: Anthony Green gr...@moxielogic.com
---
hw/moxie/Makefile.objs | 6 ++
hw/moxie/moxiesim.c| 174 +
include/sysemu/arch_init.h | 1 +
3 files changed, 181 insertions(+)
create mode 100644 hw/moxie/Makefile.objs
create mode 100644 hw/moxie/moxiesim.c
diff --git a/hw/moxie/Makefile.objs b/hw/moxie/Makefile.objs
new file mode 100644
index 000..d0772d1
--- /dev/null
+++ b/hw/moxie/Makefile.objs
@@ -0,0 +1,6 @@
+# moxie boards
+obj-y = serial.o mc146818rtc.o vga.o
+obj-$(CONFIG_FDT) += device_tree.o
+
+obj-y := $(addprefix ../,$(obj-y))
+obj-y += moxiesim.o
diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c
new file mode 100644
index 000..e1e88a9
--- /dev/null
+++ b/hw/moxie/moxiesim.c
@@ -0,0 +1,174 @@
+/*
+ * QEMU/moxiesim emulation
+ *
+ * Emulates a very simple machine model similiar to the one use by the
+ * GDB moxie simulator.
+ *
+ * Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include hw/sysbus.h
+#include hw/hw.h
+#include hw/pc.h
+#include hw/isa.h
+#include net/net.h
+#include sysemu/sysemu.h
+#include hw/boards.h
+#include hw/loader.h
+#include hw/serial.h
+#include exec/address-spaces.h
+
+#define PHYS_MEM_BASE 0x8000
+
+typedef struct {
+uint64_t ram_size;
+const char *kernel_filename;
+const char *kernel_cmdline;
+const char *initrd_filename;
+} LoaderParams;
+
+static void load_kernel(MoxieCPU *cpu, LoaderParams *loader_params)
+{
+uint64_t entry, kernel_low, kernel_high;
+long kernel_size;
+long initrd_size;
+ram_addr_t initrd_offset;
+
+kernel_size = load_elf(loader_params-kernel_filename, NULL, NULL,
+ entry, kernel_low, kernel_high, 1,
+ ELF_MACHINE, 0);
+
+if (!kernel_size) {
+fprintf(stderr, qemu: could not load kernel '%s'\n,
+loader_params-kernel_filename);
+exit(1);
+}
+
+/* load initrd */
+initrd_size = 0;
+initrd_offset = 0;
+if (loader_params-initrd_filename) {
+initrd_size = get_image_size(loader_params-initrd_filename);
+if (initrd_size 0) {
+initrd_offset = (kernel_high + ~TARGET_PAGE_MASK)
+ TARGET_PAGE_MASK;
+if (initrd_offset + initrd_size loader_params-ram_size) {
+fprintf(stderr,
+qemu: memory too small for initial ram disk '%s'\n,
+loader_params-initrd_filename);
+exit(1);
+}
+initrd_size = load_image_targphys(loader_params-initrd_filename,
+ initrd_offset,
+ ram_size);
+}
+if (initrd_size == (target_ulong)-1) {
+fprintf(stderr, qemu: could not load initial ram disk '%s'\n,
+loader_params-initrd_filename);
+exit(1);
+}
+}
+}
+
+static void main_cpu_reset(void *opaque)
+{
+MoxieCPU *cpu = opaque;
+
+cpu_reset(CPU(cpu));
+}
+
+static inline DeviceState *
+moxie_intc_create(hwaddr base, qemu_irq irq, int kind_of_intr)
+{
+DeviceState *dev;
+
+dev = qdev_create(NULL, moxie,intc);
+qdev_prop_set_uint32(dev, kind-of-intr, kind_of_intr);
+qdev_init_nofail(dev);
+sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
+return dev;
+}
+
+static void moxiesim_init(QEMUMachineInitArgs *args)
+{
+MoxieCPU *cpu = NULL;
+ram_addr_t ram_size = args-ram_size;
+const char *cpu_model = args-cpu_model;
+const char *kernel_filename = args-kernel_filename;
+const char *kernel_cmdline = args-kernel_cmdline;
+const char *initrd_filename = args-initrd_filename;
+CPUMoxieState *env;
+MemoryRegion *address_space_mem = get_system_memory();
+MemoryRegion
[Qemu-devel] [PATCH v9 4/4] Add top level changes for moxie
Signed-off-by: Anthony Green gr...@moxielogic.com
---
MAINTAINERS | 5 +
arch_init.c | 2 ++
configure | 9 -
cpu-exec.c| 2 ++
default-configs/moxie-softmmu.mak | 2 ++
qapi-schema.json | 6 +++---
6 files changed, 22 insertions(+), 4 deletions(-)
create mode 100644 default-configs/moxie-softmmu.mak
diff --git a/MAINTAINERS b/MAINTAINERS
index 2439614..c8036c0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -91,6 +91,11 @@ M: Aurelien Jarno aurel...@aurel32.net
S: Odd Fixes
F: target-mips/
+Moxie
+M: Anthony Green gr...@moxielogic.com
+S: Maintained
+F: target-moxie/
+
PowerPC
M: Alexander Graf ag...@suse.de
L: qemu-...@nongnu.org
diff --git a/arch_init.c b/arch_init.c
index 8daeafa..ddae1b7 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -85,6 +85,8 @@ int graphic_depth = 15;
#define QEMU_ARCH QEMU_ARCH_MICROBLAZE
#elif defined(TARGET_MIPS)
#define QEMU_ARCH QEMU_ARCH_MIPS
+#elif defined(TARGET_MOXIE)
+#define QEMU_ARCH QEMU_ARCH_MOXIE
#elif defined(TARGET_OPENRISC)
#define QEMU_ARCH QEMU_ARCH_OPENRISC
#elif defined(TARGET_PPC)
diff --git a/configure b/configure
index 2f98c5a..da7e407 100755
--- a/configure
+++ b/configure
@@ -958,6 +958,7 @@ mips-softmmu \
mipsel-softmmu \
mips64-softmmu \
mips64el-softmmu \
+moxie-softmmu \
or32-softmmu \
ppc-softmmu \
ppcemb-softmmu \
@@ -3917,7 +3918,7 @@ target_arch2=`echo $target | cut -d '-' -f 1`
target_bigendian=no
case $target_arch2 in
-
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
+
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
target_bigendian=yes
;;
esac
@@ -4023,6 +4024,8 @@ case $target_arch2 in
echo TARGET_ABI_MIPSN64=y $config_target_mak
target_long_alignment=8
;;
+ moxie)
+ ;;
or32)
TARGET_ARCH=openrisc
TARGET_BASE_ARCH=openrisc
@@ -4267,6 +4270,10 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
echo CONFIG_MIPS_DIS=y $config_target_mak
echo CONFIG_MIPS_DIS=y config-all-disas.mak
;;
+ moxie*)
+echo CONFIG_MOXIE_DIS=y $config_target_mak
+echo CONFIG_MOXIE_DIS=y config-all-disas.mak
+ ;;
or32)
echo CONFIG_OPENRISC_DIS=y $config_target_mak
echo CONFIG_OPENRISC_DIS=y config-all-disas.mak
diff --git a/cpu-exec.c b/cpu-exec.c
index 9092145..12060f4 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -236,6 +236,7 @@ int cpu_exec(CPUArchState *env)
#elif defined(TARGET_LM32)
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_CRIS)
@@ -686,6 +687,7 @@ int cpu_exec(CPUArchState *env)
| env-cc_dest | (env-cc_x 4);
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_ALPHA)
diff --git a/default-configs/moxie-softmmu.mak
b/default-configs/moxie-softmmu.mak
new file mode 100644
index 000..d378363
--- /dev/null
+++ b/default-configs/moxie-softmmu.mak
@@ -0,0 +1,2 @@
+# Default configuration for moxie-softmmu
+
diff --git a/qapi-schema.json b/qapi-schema.json
index 28b070f..233ea1b 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -2994,9 +2994,9 @@
##
{ 'enum': 'TargetType',
'data': [ 'alpha', 'arm', 'cris', 'i386', 'lm32', 'm68k', 'microblazeel',
-'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'or32',
-'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4', 'sparc64',
-'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
+'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'moxie',
+'or32', 'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4',
+'sparc64', 'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
##
# @TargetInfo:
--
1.8.1.4
[Qemu-devel] [PATCH v10 2/4] Add moxie disassembler
Signed-off-by: Anthony Green gr...@moxielogic.com
---
disas.c | 6 +
disas/Makefile.objs | 1 +
disas/moxie.c | 360
include/disas/bfd.h | 2 +
4 files changed, 369 insertions(+)
create mode 100644 disas/moxie.c
diff --git a/disas.c b/disas.c
index a46faee..74d3ba0 100644
--- a/disas.c
+++ b/disas.c
@@ -256,6 +256,9 @@ void target_disas(FILE *out, CPUArchState *env,
target_ulong code,
#elif defined(TARGET_MICROBLAZE)
s.info.mach = bfd_arch_microblaze;
print_insn = print_insn_microblaze;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
@@ -462,6 +465,9 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
#elif defined(TARGET_S390X)
s.info.mach = bfd_mach_s390_64;
print_insn = print_insn_s390;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
diff --git a/disas/Makefile.objs b/disas/Makefile.objs
index ed75f9a..3b1e77a 100644
--- a/disas/Makefile.objs
+++ b/disas/Makefile.objs
@@ -7,6 +7,7 @@ common-obj-$(CONFIG_IA64_DIS) += ia64.o
common-obj-$(CONFIG_M68K_DIS) += m68k.o
common-obj-$(CONFIG_MICROBLAZE_DIS) += microblaze.o
common-obj-$(CONFIG_MIPS_DIS) += mips.o
+common-obj-$(CONFIG_MOXIE_DIS) += moxie.o
common-obj-$(CONFIG_PPC_DIS) += ppc.o
common-obj-$(CONFIG_S390_DIS) += s390.o
common-obj-$(CONFIG_SH4_DIS) += sh4.o
diff --git a/disas/moxie.c b/disas/moxie.c
new file mode 100644
index 000..4c5f180
--- /dev/null
+++ b/disas/moxie.c
@@ -0,0 +1,360 @@
+/* Disassemble moxie instructions.
+ Copyright (c) 2009 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see http://www.gnu.org/licenses/. */
+
+#include stdio.h
+#define STATIC_TABLE
+#define DEFINE_TABLE
+
+#include disas/bfd.h
+
+static void *stream;
+
+/* Form 1 instructions come in different flavors:
+
+ Some have no arguments (MOXIE_F1_NARG)
+ Some only use the A operand (MOXIE_F1_A)
+ Some use A and B registers (MOXIE_F1_AB)
+ Some use A and consume a 4 byte immediate value (MOXIE_F1_A4)
+ Some use just a 4 byte immediate value (MOXIE_F1_4)
+ Some use just a 4 byte memory address (MOXIE_F1_M)
+ Some use B and an indirect A(MOXIE_F1_AiB)
+ Some use A and an indirect B(MOXIE_F1_ABi)
+ Some consume a 4 byte immediate value and use X (MOXIE_F1_4A)
+ Some use B and an indirect A plus 4 bytes (MOXIE_F1_AiB4)
+ Some use A and an indirect B plus 4 bytes (MOXIE_F1_ABi4)
+
+ Form 2 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F2_NARG)
+ Some use the A register and an 8-bit value (MOXIE_F2_A8V)
+
+ Form 3 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F3_NARG)
+ Some have a 10-bit PC relative operand (MOXIE_F3_PCREL). */
+
+#define MOXIE_F1_NARG 0x100
+#define MOXIE_F1_A0x101
+#define MOXIE_F1_AB 0x102
+/* #define MOXIE_F1_ABC 0x103 */
+#define MOXIE_F1_A4 0x104
+#define MOXIE_F1_40x105
+#define MOXIE_F1_AiB 0x106
+#define MOXIE_F1_ABi 0x107
+#define MOXIE_F1_4A 0x108
+#define MOXIE_F1_AiB4 0x109
+#define MOXIE_F1_ABi4 0x10a
+#define MOXIE_F1_M0x10b
+
+#define MOXIE_F2_NARG 0x200
+#define MOXIE_F2_A8V 0x201
+
+#define MOXIE_F3_NARG 0x300
+#define MOXIE_F3_PCREL 0x301
+
+typedef struct moxie_opc_info_t {
+short opcode;
+unsigned itype;
+const char * name;
+} moxie_opc_info_t;
+
+extern const moxie_opc_info_t moxie_form1_opc_info[64];
+extern const moxie_opc_info_t moxie_form2_opc_info[4];
+extern const moxie_opc_info_t moxie_form3_opc_info[16];
+
+/* The moxie processor's 16-bit instructions come in two forms:
+
+ FORM 1 instructions start with a 0 bit...
+
+ 0ooo
+ 0 F
+
+ ooo - form 1 opcode number
+ - operand A
+ - operand B
+
+ FORM 2 instructions start with bits 10...
+
+ 10oo
+ 0 F
+
+ oo - form 2 opcode number
+
[Qemu-devel] [PATCH v10 3/4] Add sample moxie system
Signed-off-by: Anthony Green gr...@moxielogic.com
---
hw/moxie/Makefile.objs | 6 ++
hw/moxie/moxiesim.c| 174 +
include/sysemu/arch_init.h | 1 +
3 files changed, 181 insertions(+)
create mode 100644 hw/moxie/Makefile.objs
create mode 100644 hw/moxie/moxiesim.c
diff --git a/hw/moxie/Makefile.objs b/hw/moxie/Makefile.objs
new file mode 100644
index 000..d0772d1
--- /dev/null
+++ b/hw/moxie/Makefile.objs
@@ -0,0 +1,6 @@
+# moxie boards
+obj-y = serial.o mc146818rtc.o vga.o
+obj-$(CONFIG_FDT) += device_tree.o
+
+obj-y := $(addprefix ../,$(obj-y))
+obj-y += moxiesim.o
diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c
new file mode 100644
index 000..e1e88a9
--- /dev/null
+++ b/hw/moxie/moxiesim.c
@@ -0,0 +1,174 @@
+/*
+ * QEMU/moxiesim emulation
+ *
+ * Emulates a very simple machine model similiar to the one use by the
+ * GDB moxie simulator.
+ *
+ * Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include hw/sysbus.h
+#include hw/hw.h
+#include hw/pc.h
+#include hw/isa.h
+#include net/net.h
+#include sysemu/sysemu.h
+#include hw/boards.h
+#include hw/loader.h
+#include hw/serial.h
+#include exec/address-spaces.h
+
+#define PHYS_MEM_BASE 0x8000
+
+typedef struct {
+uint64_t ram_size;
+const char *kernel_filename;
+const char *kernel_cmdline;
+const char *initrd_filename;
+} LoaderParams;
+
+static void load_kernel(MoxieCPU *cpu, LoaderParams *loader_params)
+{
+uint64_t entry, kernel_low, kernel_high;
+long kernel_size;
+long initrd_size;
+ram_addr_t initrd_offset;
+
+kernel_size = load_elf(loader_params-kernel_filename, NULL, NULL,
+ entry, kernel_low, kernel_high, 1,
+ ELF_MACHINE, 0);
+
+if (!kernel_size) {
+fprintf(stderr, qemu: could not load kernel '%s'\n,
+loader_params-kernel_filename);
+exit(1);
+}
+
+/* load initrd */
+initrd_size = 0;
+initrd_offset = 0;
+if (loader_params-initrd_filename) {
+initrd_size = get_image_size(loader_params-initrd_filename);
+if (initrd_size 0) {
+initrd_offset = (kernel_high + ~TARGET_PAGE_MASK)
+ TARGET_PAGE_MASK;
+if (initrd_offset + initrd_size loader_params-ram_size) {
+fprintf(stderr,
+qemu: memory too small for initial ram disk '%s'\n,
+loader_params-initrd_filename);
+exit(1);
+}
+initrd_size = load_image_targphys(loader_params-initrd_filename,
+ initrd_offset,
+ ram_size);
+}
+if (initrd_size == (target_ulong)-1) {
+fprintf(stderr, qemu: could not load initial ram disk '%s'\n,
+loader_params-initrd_filename);
+exit(1);
+}
+}
+}
+
+static void main_cpu_reset(void *opaque)
+{
+MoxieCPU *cpu = opaque;
+
+cpu_reset(CPU(cpu));
+}
+
+static inline DeviceState *
+moxie_intc_create(hwaddr base, qemu_irq irq, int kind_of_intr)
+{
+DeviceState *dev;
+
+dev = qdev_create(NULL, moxie,intc);
+qdev_prop_set_uint32(dev, kind-of-intr, kind_of_intr);
+qdev_init_nofail(dev);
+sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
+return dev;
+}
+
+static void moxiesim_init(QEMUMachineInitArgs *args)
+{
+MoxieCPU *cpu = NULL;
+ram_addr_t ram_size = args-ram_size;
+const char *cpu_model = args-cpu_model;
+const char *kernel_filename = args-kernel_filename;
+const char *kernel_cmdline = args-kernel_cmdline;
+const char *initrd_filename = args-initrd_filename;
+CPUMoxieState *env;
+MemoryRegion *address_space_mem = get_system_memory();
+MemoryRegion
[Qemu-devel] [PATCH v10 4/4] Add top level changes for moxie
Signed-off-by: Anthony Green gr...@moxielogic.com
---
MAINTAINERS | 5 +
arch_init.c | 2 ++
configure | 9 -
cpu-exec.c| 2 ++
default-configs/moxie-softmmu.mak | 2 ++
qapi-schema.json | 6 +++---
6 files changed, 22 insertions(+), 4 deletions(-)
create mode 100644 default-configs/moxie-softmmu.mak
diff --git a/MAINTAINERS b/MAINTAINERS
index 0ca7e1d..db14ffc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -91,6 +91,11 @@ M: Aurelien Jarno aurel...@aurel32.net
S: Odd Fixes
F: target-mips/
+Moxie
+M: Anthony Green gr...@moxielogic.com
+S: Maintained
+F: target-moxie/
+
PowerPC
M: Alexander Graf ag...@suse.de
L: qemu-...@nongnu.org
diff --git a/arch_init.c b/arch_init.c
index 8daeafa..ddae1b7 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -85,6 +85,8 @@ int graphic_depth = 15;
#define QEMU_ARCH QEMU_ARCH_MICROBLAZE
#elif defined(TARGET_MIPS)
#define QEMU_ARCH QEMU_ARCH_MIPS
+#elif defined(TARGET_MOXIE)
+#define QEMU_ARCH QEMU_ARCH_MOXIE
#elif defined(TARGET_OPENRISC)
#define QEMU_ARCH QEMU_ARCH_OPENRISC
#elif defined(TARGET_PPC)
diff --git a/configure b/configure
index 2f98c5a..da7e407 100755
--- a/configure
+++ b/configure
@@ -958,6 +958,7 @@ mips-softmmu \
mipsel-softmmu \
mips64-softmmu \
mips64el-softmmu \
+moxie-softmmu \
or32-softmmu \
ppc-softmmu \
ppcemb-softmmu \
@@ -3917,7 +3918,7 @@ target_arch2=`echo $target | cut -d '-' -f 1`
target_bigendian=no
case $target_arch2 in
-
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
+
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
target_bigendian=yes
;;
esac
@@ -4023,6 +4024,8 @@ case $target_arch2 in
echo TARGET_ABI_MIPSN64=y $config_target_mak
target_long_alignment=8
;;
+ moxie)
+ ;;
or32)
TARGET_ARCH=openrisc
TARGET_BASE_ARCH=openrisc
@@ -4267,6 +4270,10 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
echo CONFIG_MIPS_DIS=y $config_target_mak
echo CONFIG_MIPS_DIS=y config-all-disas.mak
;;
+ moxie*)
+echo CONFIG_MOXIE_DIS=y $config_target_mak
+echo CONFIG_MOXIE_DIS=y config-all-disas.mak
+ ;;
or32)
echo CONFIG_OPENRISC_DIS=y $config_target_mak
echo CONFIG_OPENRISC_DIS=y config-all-disas.mak
diff --git a/cpu-exec.c b/cpu-exec.c
index 9092145..12060f4 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -236,6 +236,7 @@ int cpu_exec(CPUArchState *env)
#elif defined(TARGET_LM32)
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_CRIS)
@@ -686,6 +687,7 @@ int cpu_exec(CPUArchState *env)
| env-cc_dest | (env-cc_x 4);
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_ALPHA)
diff --git a/default-configs/moxie-softmmu.mak
b/default-configs/moxie-softmmu.mak
new file mode 100644
index 000..d378363
--- /dev/null
+++ b/default-configs/moxie-softmmu.mak
@@ -0,0 +1,2 @@
+# Default configuration for moxie-softmmu
+
diff --git a/qapi-schema.json b/qapi-schema.json
index 28b070f..233ea1b 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -2994,9 +2994,9 @@
##
{ 'enum': 'TargetType',
'data': [ 'alpha', 'arm', 'cris', 'i386', 'lm32', 'm68k', 'microblazeel',
-'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'or32',
-'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4', 'sparc64',
-'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
+'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'moxie',
+'or32', 'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4',
+'sparc64', 'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
##
# @TargetInfo:
--
1.8.1.4
[Qemu-devel] [PATCH v10 1/4] Add moxie target code
Signed-off-by: Anthony Green gr...@moxielogic.com
---
target-moxie/Makefile.objs | 2 +
target-moxie/cpu.c | 172 +
target-moxie/cpu.h | 169 +
target-moxie/helper.c | 171 +
target-moxie/helper.h | 9 +
target-moxie/machine.c | 28 ++
target-moxie/machine.h | 1 +
target-moxie/mmu.c | 36 ++
target-moxie/mmu.h | 19 +
target-moxie/translate.c | 926 +
10 files changed, 1533 insertions(+)
create mode 100644 target-moxie/Makefile.objs
create mode 100644 target-moxie/cpu.c
create mode 100644 target-moxie/cpu.h
create mode 100644 target-moxie/helper.c
create mode 100644 target-moxie/helper.h
create mode 100644 target-moxie/machine.c
create mode 100644 target-moxie/machine.h
create mode 100644 target-moxie/mmu.c
create mode 100644 target-moxie/mmu.h
create mode 100644 target-moxie/translate.c
diff --git a/target-moxie/Makefile.objs b/target-moxie/Makefile.objs
new file mode 100644
index 000..6381d4d
--- /dev/null
+++ b/target-moxie/Makefile.objs
@@ -0,0 +1,2 @@
+obj-y += translate.o helper.o machine.o cpu.o machine.o
+obj-$(CONFIG_SOFTMMU) += mmu.o
diff --git a/target-moxie/cpu.c b/target-moxie/cpu.c
new file mode 100644
index 000..c17d3f0
--- /dev/null
+++ b/target-moxie/cpu.c
@@ -0,0 +1,172 @@
+/*
+ * QEMU Moxie CPU
+ *
+ * Copyright (c) 2013 Anthony Green
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see http://www.gnu.org/licenses/.
+ */
+
+#include cpu.h
+#include qemu-common.h
+#include migration/vmstate.h
+#include machine.h
+
+static void moxie_cpu_reset(CPUState *s)
+{
+MoxieCPU *cpu = MOXIE_CPU(s);
+MoxieCPUClass *mcc = MOXIE_CPU_GET_CLASS(cpu);
+CPUMoxieState *env = cpu-env;
+
+if (qemu_loglevel_mask(CPU_LOG_RESET)) {
+qemu_log(CPU Reset (CPU %d)\n, s-cpu_index);
+log_cpu_state(env, 0);
+}
+
+mcc-parent_reset(s);
+
+memset(env, 0, offsetof(CPUMoxieState, breakpoints));
+env-pc = 0x1000;
+
+tlb_flush(env, 1);
+}
+
+static void moxie_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+MoxieCPU *cpu = MOXIE_CPU(dev);
+MoxieCPUClass *occ = MOXIE_CPU_GET_CLASS(dev);
+
+qemu_init_vcpu(cpu-env);
+cpu_reset(CPU(cpu));
+
+occ-parent_realize(dev, errp);
+}
+
+static void moxie_cpu_initfn(Object *obj)
+{
+CPUState *cs = CPU(obj);
+MoxieCPU *cpu = MOXIE_CPU(obj);
+static int inited;
+
+cs-env_ptr = cpu-env;
+cpu_exec_init(cpu-env);
+
+if (tcg_enabled() !inited) {
+inited = 1;
+moxie_translate_init();
+}
+}
+
+static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model)
+{
+ObjectClass *oc;
+
+if (cpu_model == NULL) {
+return NULL;
+}
+
+oc = object_class_by_name(cpu_model);
+if (oc != NULL (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) ||
+ object_class_is_abstract(oc))) {
+return NULL;
+}
+return oc;
+}
+
+static void moxie_cpu_class_init(ObjectClass *oc, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(oc);
+CPUClass *cc = CPU_CLASS(oc);
+MoxieCPUClass *mcc = MOXIE_CPU_CLASS(oc);
+
+mcc-parent_realize = dc-realize;
+dc-realize = moxie_cpu_realizefn;
+
+mcc-parent_reset = cc-reset;
+cc-reset = moxie_cpu_reset;
+
+cc-class_by_name = moxie_cpu_class_by_name;
+
+dc-vmsd = vmstate_moxie_cpu;
+}
+
+static void moxielite_initfn(Object *obj)
+{
+/* Set cpu feature flags */
+}
+
+static void moxie_any_initfn(Object *obj)
+{
+/* Set cpu feature flags */
+}
+
+typedef struct MoxieCPUInfo {
+const char *name;
+void (*initfn)(Object *obj);
+} MoxieCPUInfo;
+
+static const MoxieCPUInfo moxie_cpus[] = {
+{ .name = MoxieLite, .initfn = moxielite_initfn },
+{ .name = any,.initfn = moxie_any_initfn },
+};
+
+MoxieCPU *cpu_moxie_init(const char *cpu_model)
+{
+MoxieCPU *cpu;
+ObjectClass *oc;
+
+oc = moxie_cpu_class_by_name(cpu_model);
+if (oc == NULL) {
+return NULL;
+}
+cpu = MOXIE_CPU(object_new(object_class_get_name(oc)));
+cpu-env.cpu_model_str = cpu_model;
+
+object_property_set_bool(OBJECT(cpu), true, realized, NULL);
+
+return cpu;
+}
+
+static void cpu_register(const MoxieCPUInfo *info)
+{
+TypeInfo type_info = {
+.parent = TYPE_MOXIE_CPU,
+.instance_size = sizeof
[Qemu-devel] [PATCH v10 0/4] Moxie CPU port
This version of the patch includes a bug fix and some formatting fixes identified by Blue Swirl here: http://lists.gnu.org/archive/html/qemu-devel/2013-03/msg01530.html Please consider applying this version of the patch series. Thanks! AG Anthony Green (4): Add moxie target code Add moxie disassembler Add sample moxie system Add top level changes for moxie MAINTAINERS | 5 + arch_init.c | 2 + configure | 9 +- cpu-exec.c| 2 + default-configs/moxie-softmmu.mak | 2 + disas.c | 6 + disas/Makefile.objs | 1 + disas/moxie.c | 360 +++ hw/moxie/Makefile.objs| 6 + hw/moxie/moxiesim.c | 174 +++ include/disas/bfd.h | 2 + include/sysemu/arch_init.h| 1 + qapi-schema.json | 6 +- target-moxie/Makefile.objs| 2 + target-moxie/cpu.c| 172 +++ target-moxie/cpu.h| 169 +++ target-moxie/helper.c | 171 +++ target-moxie/helper.h | 9 + target-moxie/machine.c| 28 ++ target-moxie/machine.h| 1 + target-moxie/mmu.c| 36 ++ target-moxie/mmu.h| 19 + target-moxie/translate.c | 926 ++ 23 files changed, 2105 insertions(+), 4 deletions(-) create mode 100644 default-configs/moxie-softmmu.mak create mode 100644 disas/moxie.c create mode 100644 hw/moxie/Makefile.objs create mode 100644 hw/moxie/moxiesim.c create mode 100644 target-moxie/Makefile.objs create mode 100644 target-moxie/cpu.c create mode 100644 target-moxie/cpu.h create mode 100644 target-moxie/helper.c create mode 100644 target-moxie/helper.h create mode 100644 target-moxie/machine.c create mode 100644 target-moxie/machine.h create mode 100644 target-moxie/mmu.c create mode 100644 target-moxie/mmu.h create mode 100644 target-moxie/translate.c -- 1.8.1.4
Re: [Qemu-devel] [PATCH v10 0/4] Moxie CPU port
Ping! Thanks, AG On Sun, Mar 10, 2013 at 10:07 AM, Anthony Green gr...@moxielogic.com wrote: This version of the patch includes a bug fix and some formatting fixes identified by Blue Swirl here: http://lists.gnu.org/archive/html/qemu-devel/2013-03/msg01530.html Please consider applying this version of the patch series. Thanks! AG Anthony Green (4): Add moxie target code Add moxie disassembler Add sample moxie system Add top level changes for moxie MAINTAINERS | 5 + arch_init.c | 2 + configure | 9 +- cpu-exec.c| 2 + default-configs/moxie-softmmu.mak | 2 + disas.c | 6 + disas/Makefile.objs | 1 + disas/moxie.c | 360 +++ hw/moxie/Makefile.objs| 6 + hw/moxie/moxiesim.c | 174 +++ include/disas/bfd.h | 2 + include/sysemu/arch_init.h| 1 + qapi-schema.json | 6 +- target-moxie/Makefile.objs| 2 + target-moxie/cpu.c| 172 +++ target-moxie/cpu.h| 169 +++ target-moxie/helper.c | 171 +++ target-moxie/helper.h | 9 + target-moxie/machine.c| 28 ++ target-moxie/machine.h| 1 + target-moxie/mmu.c| 36 ++ target-moxie/mmu.h| 19 + target-moxie/translate.c | 926 ++ 23 files changed, 2105 insertions(+), 4 deletions(-) create mode 100644 default-configs/moxie-softmmu.mak create mode 100644 disas/moxie.c create mode 100644 hw/moxie/Makefile.objs create mode 100644 hw/moxie/moxiesim.c create mode 100644 target-moxie/Makefile.objs create mode 100644 target-moxie/cpu.c create mode 100644 target-moxie/cpu.h create mode 100644 target-moxie/helper.c create mode 100644 target-moxie/helper.h create mode 100644 target-moxie/machine.c create mode 100644 target-moxie/machine.h create mode 100644 target-moxie/mmu.c create mode 100644 target-moxie/mmu.h create mode 100644 target-moxie/translate.c -- 1.8.1.4
[Qemu-devel] [PATCH v11 0/4] Moxie CPU port
This version of the patch addresses recent changes in the upstream qemu sources (where interrupt_request resides). Please consider applying this version of the patch. Thank you! AG Anthony Green (4): Add moxie target code Add moxie disassembler Add sample moxie system Add top level changes for moxie MAINTAINERS | 5 + arch_init.c | 2 + configure | 9 +- cpu-exec.c| 2 + default-configs/moxie-softmmu.mak | 2 + disas.c | 6 + disas/Makefile.objs | 1 + disas/moxie.c | 360 +++ hw/moxie/Makefile.objs| 6 + hw/moxie/moxiesim.c | 174 +++ include/disas/bfd.h | 2 + include/sysemu/arch_init.h| 1 + qapi-schema.json | 6 +- target-moxie/Makefile.objs| 2 + target-moxie/cpu.c| 172 +++ target-moxie/cpu.h| 167 +++ target-moxie/helper.c | 171 +++ target-moxie/helper.h | 9 + target-moxie/machine.c| 28 ++ target-moxie/machine.h| 1 + target-moxie/mmu.c| 36 ++ target-moxie/mmu.h| 19 + target-moxie/translate.c | 926 ++ 23 files changed, 2103 insertions(+), 4 deletions(-) create mode 100644 default-configs/moxie-softmmu.mak create mode 100644 disas/moxie.c create mode 100644 hw/moxie/Makefile.objs create mode 100644 hw/moxie/moxiesim.c create mode 100644 target-moxie/Makefile.objs create mode 100644 target-moxie/cpu.c create mode 100644 target-moxie/cpu.h create mode 100644 target-moxie/helper.c create mode 100644 target-moxie/helper.h create mode 100644 target-moxie/machine.c create mode 100644 target-moxie/machine.h create mode 100644 target-moxie/mmu.c create mode 100644 target-moxie/mmu.h create mode 100644 target-moxie/translate.c -- 1.8.1.4
[Qemu-devel] [PATCH v11 3/4] Add sample moxie system
Signed-off-by: Anthony Green gr...@moxielogic.com
---
hw/moxie/Makefile.objs | 6 ++
hw/moxie/moxiesim.c| 174 +
include/sysemu/arch_init.h | 1 +
3 files changed, 181 insertions(+)
create mode 100644 hw/moxie/Makefile.objs
create mode 100644 hw/moxie/moxiesim.c
diff --git a/hw/moxie/Makefile.objs b/hw/moxie/Makefile.objs
new file mode 100644
index 000..d0772d1
--- /dev/null
+++ b/hw/moxie/Makefile.objs
@@ -0,0 +1,6 @@
+# moxie boards
+obj-y = serial.o mc146818rtc.o vga.o
+obj-$(CONFIG_FDT) += device_tree.o
+
+obj-y := $(addprefix ../,$(obj-y))
+obj-y += moxiesim.o
diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c
new file mode 100644
index 000..e1e88a9
--- /dev/null
+++ b/hw/moxie/moxiesim.c
@@ -0,0 +1,174 @@
+/*
+ * QEMU/moxiesim emulation
+ *
+ * Emulates a very simple machine model similiar to the one use by the
+ * GDB moxie simulator.
+ *
+ * Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include hw/sysbus.h
+#include hw/hw.h
+#include hw/pc.h
+#include hw/isa.h
+#include net/net.h
+#include sysemu/sysemu.h
+#include hw/boards.h
+#include hw/loader.h
+#include hw/serial.h
+#include exec/address-spaces.h
+
+#define PHYS_MEM_BASE 0x8000
+
+typedef struct {
+uint64_t ram_size;
+const char *kernel_filename;
+const char *kernel_cmdline;
+const char *initrd_filename;
+} LoaderParams;
+
+static void load_kernel(MoxieCPU *cpu, LoaderParams *loader_params)
+{
+uint64_t entry, kernel_low, kernel_high;
+long kernel_size;
+long initrd_size;
+ram_addr_t initrd_offset;
+
+kernel_size = load_elf(loader_params-kernel_filename, NULL, NULL,
+ entry, kernel_low, kernel_high, 1,
+ ELF_MACHINE, 0);
+
+if (!kernel_size) {
+fprintf(stderr, qemu: could not load kernel '%s'\n,
+loader_params-kernel_filename);
+exit(1);
+}
+
+/* load initrd */
+initrd_size = 0;
+initrd_offset = 0;
+if (loader_params-initrd_filename) {
+initrd_size = get_image_size(loader_params-initrd_filename);
+if (initrd_size 0) {
+initrd_offset = (kernel_high + ~TARGET_PAGE_MASK)
+ TARGET_PAGE_MASK;
+if (initrd_offset + initrd_size loader_params-ram_size) {
+fprintf(stderr,
+qemu: memory too small for initial ram disk '%s'\n,
+loader_params-initrd_filename);
+exit(1);
+}
+initrd_size = load_image_targphys(loader_params-initrd_filename,
+ initrd_offset,
+ ram_size);
+}
+if (initrd_size == (target_ulong)-1) {
+fprintf(stderr, qemu: could not load initial ram disk '%s'\n,
+loader_params-initrd_filename);
+exit(1);
+}
+}
+}
+
+static void main_cpu_reset(void *opaque)
+{
+MoxieCPU *cpu = opaque;
+
+cpu_reset(CPU(cpu));
+}
+
+static inline DeviceState *
+moxie_intc_create(hwaddr base, qemu_irq irq, int kind_of_intr)
+{
+DeviceState *dev;
+
+dev = qdev_create(NULL, moxie,intc);
+qdev_prop_set_uint32(dev, kind-of-intr, kind_of_intr);
+qdev_init_nofail(dev);
+sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
+return dev;
+}
+
+static void moxiesim_init(QEMUMachineInitArgs *args)
+{
+MoxieCPU *cpu = NULL;
+ram_addr_t ram_size = args-ram_size;
+const char *cpu_model = args-cpu_model;
+const char *kernel_filename = args-kernel_filename;
+const char *kernel_cmdline = args-kernel_cmdline;
+const char *initrd_filename = args-initrd_filename;
+CPUMoxieState *env;
+MemoryRegion *address_space_mem = get_system_memory();
+MemoryRegion
[Qemu-devel] [PATCH v11 2/4] Add moxie disassembler
Signed-off-by: Anthony Green gr...@moxielogic.com
---
disas.c | 6 +
disas/Makefile.objs | 1 +
disas/moxie.c | 360
include/disas/bfd.h | 2 +
4 files changed, 369 insertions(+)
create mode 100644 disas/moxie.c
diff --git a/disas.c b/disas.c
index a46faee..74d3ba0 100644
--- a/disas.c
+++ b/disas.c
@@ -256,6 +256,9 @@ void target_disas(FILE *out, CPUArchState *env,
target_ulong code,
#elif defined(TARGET_MICROBLAZE)
s.info.mach = bfd_arch_microblaze;
print_insn = print_insn_microblaze;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
@@ -462,6 +465,9 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
#elif defined(TARGET_S390X)
s.info.mach = bfd_mach_s390_64;
print_insn = print_insn_s390;
+#elif defined(TARGET_MOXIE)
+s.info.mach = bfd_arch_moxie;
+print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
s.info.mach = bfd_mach_lm32;
print_insn = print_insn_lm32;
diff --git a/disas/Makefile.objs b/disas/Makefile.objs
index ed75f9a..3b1e77a 100644
--- a/disas/Makefile.objs
+++ b/disas/Makefile.objs
@@ -7,6 +7,7 @@ common-obj-$(CONFIG_IA64_DIS) += ia64.o
common-obj-$(CONFIG_M68K_DIS) += m68k.o
common-obj-$(CONFIG_MICROBLAZE_DIS) += microblaze.o
common-obj-$(CONFIG_MIPS_DIS) += mips.o
+common-obj-$(CONFIG_MOXIE_DIS) += moxie.o
common-obj-$(CONFIG_PPC_DIS) += ppc.o
common-obj-$(CONFIG_S390_DIS) += s390.o
common-obj-$(CONFIG_SH4_DIS) += sh4.o
diff --git a/disas/moxie.c b/disas/moxie.c
new file mode 100644
index 000..4c5f180
--- /dev/null
+++ b/disas/moxie.c
@@ -0,0 +1,360 @@
+/* Disassemble moxie instructions.
+ Copyright (c) 2009 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see http://www.gnu.org/licenses/. */
+
+#include stdio.h
+#define STATIC_TABLE
+#define DEFINE_TABLE
+
+#include disas/bfd.h
+
+static void *stream;
+
+/* Form 1 instructions come in different flavors:
+
+ Some have no arguments (MOXIE_F1_NARG)
+ Some only use the A operand (MOXIE_F1_A)
+ Some use A and B registers (MOXIE_F1_AB)
+ Some use A and consume a 4 byte immediate value (MOXIE_F1_A4)
+ Some use just a 4 byte immediate value (MOXIE_F1_4)
+ Some use just a 4 byte memory address (MOXIE_F1_M)
+ Some use B and an indirect A(MOXIE_F1_AiB)
+ Some use A and an indirect B(MOXIE_F1_ABi)
+ Some consume a 4 byte immediate value and use X (MOXIE_F1_4A)
+ Some use B and an indirect A plus 4 bytes (MOXIE_F1_AiB4)
+ Some use A and an indirect B plus 4 bytes (MOXIE_F1_ABi4)
+
+ Form 2 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F2_NARG)
+ Some use the A register and an 8-bit value (MOXIE_F2_A8V)
+
+ Form 3 instructions also come in different flavors:
+
+ Some have no arguments (MOXIE_F3_NARG)
+ Some have a 10-bit PC relative operand (MOXIE_F3_PCREL). */
+
+#define MOXIE_F1_NARG 0x100
+#define MOXIE_F1_A0x101
+#define MOXIE_F1_AB 0x102
+/* #define MOXIE_F1_ABC 0x103 */
+#define MOXIE_F1_A4 0x104
+#define MOXIE_F1_40x105
+#define MOXIE_F1_AiB 0x106
+#define MOXIE_F1_ABi 0x107
+#define MOXIE_F1_4A 0x108
+#define MOXIE_F1_AiB4 0x109
+#define MOXIE_F1_ABi4 0x10a
+#define MOXIE_F1_M0x10b
+
+#define MOXIE_F2_NARG 0x200
+#define MOXIE_F2_A8V 0x201
+
+#define MOXIE_F3_NARG 0x300
+#define MOXIE_F3_PCREL 0x301
+
+typedef struct moxie_opc_info_t {
+short opcode;
+unsigned itype;
+const char * name;
+} moxie_opc_info_t;
+
+extern const moxie_opc_info_t moxie_form1_opc_info[64];
+extern const moxie_opc_info_t moxie_form2_opc_info[4];
+extern const moxie_opc_info_t moxie_form3_opc_info[16];
+
+/* The moxie processor's 16-bit instructions come in two forms:
+
+ FORM 1 instructions start with a 0 bit...
+
+ 0ooo
+ 0 F
+
+ ooo - form 1 opcode number
+ - operand A
+ - operand B
+
+ FORM 2 instructions start with bits 10...
+
+ 10oo
+ 0 F
+
+ oo - form 2 opcode number
+
[Qemu-devel] [PATCH v11 1/4] Add moxie target code
Signed-off-by: Anthony Green gr...@moxielogic.com
---
target-moxie/Makefile.objs | 2 +
target-moxie/cpu.c | 172 +
target-moxie/cpu.h | 167
target-moxie/helper.c | 171 +
target-moxie/helper.h | 9 +
target-moxie/machine.c | 28 ++
target-moxie/machine.h | 1 +
target-moxie/mmu.c | 36 ++
target-moxie/mmu.h | 19 +
target-moxie/translate.c | 926 +
10 files changed, 1531 insertions(+)
create mode 100644 target-moxie/Makefile.objs
create mode 100644 target-moxie/cpu.c
create mode 100644 target-moxie/cpu.h
create mode 100644 target-moxie/helper.c
create mode 100644 target-moxie/helper.h
create mode 100644 target-moxie/machine.c
create mode 100644 target-moxie/machine.h
create mode 100644 target-moxie/mmu.c
create mode 100644 target-moxie/mmu.h
create mode 100644 target-moxie/translate.c
diff --git a/target-moxie/Makefile.objs b/target-moxie/Makefile.objs
new file mode 100644
index 000..6381d4d
--- /dev/null
+++ b/target-moxie/Makefile.objs
@@ -0,0 +1,2 @@
+obj-y += translate.o helper.o machine.o cpu.o machine.o
+obj-$(CONFIG_SOFTMMU) += mmu.o
diff --git a/target-moxie/cpu.c b/target-moxie/cpu.c
new file mode 100644
index 000..c17d3f0
--- /dev/null
+++ b/target-moxie/cpu.c
@@ -0,0 +1,172 @@
+/*
+ * QEMU Moxie CPU
+ *
+ * Copyright (c) 2013 Anthony Green
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see http://www.gnu.org/licenses/.
+ */
+
+#include cpu.h
+#include qemu-common.h
+#include migration/vmstate.h
+#include machine.h
+
+static void moxie_cpu_reset(CPUState *s)
+{
+MoxieCPU *cpu = MOXIE_CPU(s);
+MoxieCPUClass *mcc = MOXIE_CPU_GET_CLASS(cpu);
+CPUMoxieState *env = cpu-env;
+
+if (qemu_loglevel_mask(CPU_LOG_RESET)) {
+qemu_log(CPU Reset (CPU %d)\n, s-cpu_index);
+log_cpu_state(env, 0);
+}
+
+mcc-parent_reset(s);
+
+memset(env, 0, offsetof(CPUMoxieState, breakpoints));
+env-pc = 0x1000;
+
+tlb_flush(env, 1);
+}
+
+static void moxie_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+MoxieCPU *cpu = MOXIE_CPU(dev);
+MoxieCPUClass *occ = MOXIE_CPU_GET_CLASS(dev);
+
+qemu_init_vcpu(cpu-env);
+cpu_reset(CPU(cpu));
+
+occ-parent_realize(dev, errp);
+}
+
+static void moxie_cpu_initfn(Object *obj)
+{
+CPUState *cs = CPU(obj);
+MoxieCPU *cpu = MOXIE_CPU(obj);
+static int inited;
+
+cs-env_ptr = cpu-env;
+cpu_exec_init(cpu-env);
+
+if (tcg_enabled() !inited) {
+inited = 1;
+moxie_translate_init();
+}
+}
+
+static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model)
+{
+ObjectClass *oc;
+
+if (cpu_model == NULL) {
+return NULL;
+}
+
+oc = object_class_by_name(cpu_model);
+if (oc != NULL (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) ||
+ object_class_is_abstract(oc))) {
+return NULL;
+}
+return oc;
+}
+
+static void moxie_cpu_class_init(ObjectClass *oc, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(oc);
+CPUClass *cc = CPU_CLASS(oc);
+MoxieCPUClass *mcc = MOXIE_CPU_CLASS(oc);
+
+mcc-parent_realize = dc-realize;
+dc-realize = moxie_cpu_realizefn;
+
+mcc-parent_reset = cc-reset;
+cc-reset = moxie_cpu_reset;
+
+cc-class_by_name = moxie_cpu_class_by_name;
+
+dc-vmsd = vmstate_moxie_cpu;
+}
+
+static void moxielite_initfn(Object *obj)
+{
+/* Set cpu feature flags */
+}
+
+static void moxie_any_initfn(Object *obj)
+{
+/* Set cpu feature flags */
+}
+
+typedef struct MoxieCPUInfo {
+const char *name;
+void (*initfn)(Object *obj);
+} MoxieCPUInfo;
+
+static const MoxieCPUInfo moxie_cpus[] = {
+{ .name = MoxieLite, .initfn = moxielite_initfn },
+{ .name = any,.initfn = moxie_any_initfn },
+};
+
+MoxieCPU *cpu_moxie_init(const char *cpu_model)
+{
+MoxieCPU *cpu;
+ObjectClass *oc;
+
+oc = moxie_cpu_class_by_name(cpu_model);
+if (oc == NULL) {
+return NULL;
+}
+cpu = MOXIE_CPU(object_new(object_class_get_name(oc)));
+cpu-env.cpu_model_str = cpu_model;
+
+object_property_set_bool(OBJECT(cpu), true, realized, NULL);
+
+return cpu;
+}
+
+static void cpu_register(const MoxieCPUInfo *info)
+{
+TypeInfo type_info = {
+.parent = TYPE_MOXIE_CPU,
+.instance_size = sizeof
[Qemu-devel] [PATCH v11 4/4] Add top level changes for moxie
Signed-off-by: Anthony Green gr...@moxielogic.com
---
MAINTAINERS | 5 +
arch_init.c | 2 ++
configure | 9 -
cpu-exec.c| 2 ++
default-configs/moxie-softmmu.mak | 2 ++
qapi-schema.json | 6 +++---
6 files changed, 22 insertions(+), 4 deletions(-)
create mode 100644 default-configs/moxie-softmmu.mak
diff --git a/MAINTAINERS b/MAINTAINERS
index 0ca7e1d..db14ffc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -91,6 +91,11 @@ M: Aurelien Jarno aurel...@aurel32.net
S: Odd Fixes
F: target-mips/
+Moxie
+M: Anthony Green gr...@moxielogic.com
+S: Maintained
+F: target-moxie/
+
PowerPC
M: Alexander Graf ag...@suse.de
L: qemu-...@nongnu.org
diff --git a/arch_init.c b/arch_init.c
index 98e2bc6..e8ade9e 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -85,6 +85,8 @@ int graphic_depth = 15;
#define QEMU_ARCH QEMU_ARCH_MICROBLAZE
#elif defined(TARGET_MIPS)
#define QEMU_ARCH QEMU_ARCH_MIPS
+#elif defined(TARGET_MOXIE)
+#define QEMU_ARCH QEMU_ARCH_MOXIE
#elif defined(TARGET_OPENRISC)
#define QEMU_ARCH QEMU_ARCH_OPENRISC
#elif defined(TARGET_PPC)
diff --git a/configure b/configure
index 46a7594..c3f33a9 100755
--- a/configure
+++ b/configure
@@ -961,6 +961,7 @@ mips-softmmu \
mipsel-softmmu \
mips64-softmmu \
mips64el-softmmu \
+moxie-softmmu \
or32-softmmu \
ppc-softmmu \
ppcemb-softmmu \
@@ -3946,7 +3947,7 @@ target_arch2=`echo $target | cut -d '-' -f 1`
target_bigendian=no
case $target_arch2 in
-
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
+
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
target_bigendian=yes
;;
esac
@@ -4050,6 +4051,8 @@ case $target_arch2 in
echo TARGET_ABI_MIPSN64=y $config_target_mak
target_long_alignment=8
;;
+ moxie)
+ ;;
or32)
TARGET_ARCH=openrisc
TARGET_BASE_ARCH=openrisc
@@ -4287,6 +4290,10 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
echo CONFIG_MIPS_DIS=y $config_target_mak
echo CONFIG_MIPS_DIS=y config-all-disas.mak
;;
+ moxie*)
+echo CONFIG_MOXIE_DIS=y $config_target_mak
+echo CONFIG_MOXIE_DIS=y config-all-disas.mak
+ ;;
or32)
echo CONFIG_OPENRISC_DIS=y $config_target_mak
echo CONFIG_OPENRISC_DIS=y config-all-disas.mak
diff --git a/cpu-exec.c b/cpu-exec.c
index 94fedc5..b87c1c0 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -240,6 +240,7 @@ int cpu_exec(CPUArchState *env)
#elif defined(TARGET_LM32)
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_CRIS)
@@ -692,6 +693,7 @@ int cpu_exec(CPUArchState *env)
| env-cc_dest | (env-cc_x 4);
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_ALPHA)
diff --git a/default-configs/moxie-softmmu.mak
b/default-configs/moxie-softmmu.mak
new file mode 100644
index 000..d378363
--- /dev/null
+++ b/default-configs/moxie-softmmu.mak
@@ -0,0 +1,2 @@
+# Default configuration for moxie-softmmu
+
diff --git a/qapi-schema.json b/qapi-schema.json
index fdaa9da..088f4e1 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -2994,9 +2994,9 @@
##
{ 'enum': 'TargetType',
'data': [ 'alpha', 'arm', 'cris', 'i386', 'lm32', 'm68k', 'microblazeel',
-'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'or32',
-'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4', 'sparc64',
-'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
+'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'moxie',
+'or32', 'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4',
+'sparc64', 'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
##
# @TargetInfo:
--
1.8.1.4
[Qemu-devel] [PATCH] Remove device_tree.o from hw/moxie/Makefile.objs.
Here's a fix for the build problem identified by Aurelien Jano here: http://lists.gnu.org/archive/html/qemu-devel/2013-03/msg04177.html I hadn't tested with FDT enabled recently. Thanks! AG Signed-off-by: Anthony Green gr...@moxielogic.com --- hw/moxie/Makefile.objs | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/moxie/Makefile.objs b/hw/moxie/Makefile.objs index d0772d1..a5f1742 100644 --- a/hw/moxie/Makefile.objs +++ b/hw/moxie/Makefile.objs @@ -1,6 +1,5 @@ # moxie boards obj-y = serial.o mc146818rtc.o vga.o -obj-$(CONFIG_FDT) += device_tree.o obj-y := $(addprefix ../,$(obj-y)) obj-y += moxiesim.o -- 1.8.1.4
Re: [Qemu-devel] [PATCH] target-moxie: Fix pointer-to-integer conversion (MinGW-w64)
Hi Stefan,
This change is fine by me.
It's not clear to me, as the author/maintainer of the moxie port, what
my responsibility/authority is. Do I simply reply to patches like
this with...
Looks good to me.
Signed-off-by: Anthony Green gr...@moxielogic.com
And then somebody commits it to the tree?
Thanks!
AG
On Sun, Mar 24, 2013 at 4:04 AM, Stefan Weil s...@weilnetz.de wrote:
The type cast must use tcg_target_long instead of long.
This makes a difference for hosts where sizeof(long) != sizeof(void *).
Cc: Anthony Green gr...@moxielogic.com
Cc: Blue Swirl blauwir...@gmail.com
Signed-off-by: Stefan Weil s...@weilnetz.de
---
target-moxie/translate.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-moxie/translate.c b/target-moxie/translate.c
index 34f166e..cc02bd3 100644
--- a/target-moxie/translate.c
+++ b/target-moxie/translate.c
@@ -133,7 +133,7 @@ static inline void gen_goto_tb(CPUMoxieState *env,
DisasContext *ctx,
!ctx-singlestep_enabled) {
tcg_gen_goto_tb(n);
tcg_gen_movi_i32(cpu_pc, dest);
-tcg_gen_exit_tb((long) tb + n);
+tcg_gen_exit_tb((tcg_target_long)tb + n);
} else {
tcg_gen_movi_i32(cpu_pc, dest);
if (ctx-singlestep_enabled) {
--
1.7.10.4
Re: [Qemu-devel] [PATCH] target-moxie: set do_interrupt to a target-specific helper function
Hi Dunrong,
I can't reproduce the segfault, but your patch still looks right to
me. Thanks!
Signed-of-by: Anthony Green gr...@moxielogic.com
AG
On Sat, Mar 30, 2013 at 9:35 PM, Dunrong Huang huan...@cloud-times.com wrote:
The value of do_interrupt member of CPUClass shoule be set to a
target-specific function, or it will lead to a segfault like below:
$ moxie-softmmu/qemu-system-moxie -M moxiesim
Segmentation fault
Cc: Anthony Green gr...@moxielogic.com
Cc: Blue Swirl blauwir...@gmail.com
Cc: Andreas Färber afaer...@suse.de
Signed-off-by: Dunrong Huang huan...@cloud-times.com
---
target-moxie/cpu.c| 1 +
target-moxie/cpu.h| 2 +-
target-moxie/helper.c | 7 +--
3 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/target-moxie/cpu.c b/target-moxie/cpu.c
index c17d3f0..c0855f0 100644
--- a/target-moxie/cpu.c
+++ b/target-moxie/cpu.c
@@ -98,6 +98,7 @@ static void moxie_cpu_class_init(ObjectClass *oc, void
*data)
cc-class_by_name = moxie_cpu_class_by_name;
dc-vmsd = vmstate_moxie_cpu;
+cc-do_interrupt = moxie_cpu_do_interrupt;
}
static void moxielite_initfn(Object *obj)
diff --git a/target-moxie/cpu.h b/target-moxie/cpu.h
index b96236f..988729a 100644
--- a/target-moxie/cpu.h
+++ b/target-moxie/cpu.h
@@ -117,7 +117,7 @@ static inline MoxieCPU *moxie_env_get_cpu(CPUMoxieState
*env)
MoxieCPU *cpu_moxie_init(const char *cpu_model);
int cpu_moxie_exec(CPUMoxieState *s);
-void do_interrupt(CPUMoxieState *env);
+void moxie_cpu_do_interrupt(CPUState *cs);
void moxie_translate_init(void);
int cpu_moxie_signal_handler(int host_signum, void *pinfo,
void *puc);
diff --git a/target-moxie/helper.c b/target-moxie/helper.c
index 8604ce8..6e0ac2a 100644
--- a/target-moxie/helper.c
+++ b/target-moxie/helper.c
@@ -102,7 +102,7 @@ void helper_debug(CPUMoxieState *env)
#if defined(CONFIG_USER_ONLY)
-void do_interrupt(CPUState *env)
+void moxie_cpu_do_interrupt(CPUState *env)
{
env-exception_index = -1;
}
@@ -147,8 +147,11 @@ int cpu_moxie_handle_mmu_fault(CPUMoxieState *env,
target_ulong address,
}
-void do_interrupt(CPUMoxieState *env)
+void moxie_cpu_do_interrupt(CPUState *cs)
{
+MoxieCPU *cpu = MOXIE_CPU(cs);
+CPUMoxieState *env = cpu-env;
+
switch (env-exception_index) {
case MOXIE_EX_BREAK:
break;
--
1.8.1.5
Re: [Qemu-devel] [PATCH] target-moxie: set do_interrupt to a target-specific helper function
Hi Andreas, On Sun, Mar 31, 2013 at 1:01 PM, Andreas Färber afaer...@suse.de wrote: That exception_index is used once from CPUMoxieState and once from CPUState is telling me something is fishy here... Are any test images available? I have some basic RTEMS based test apps, but nothing that generates an interrupt (just exceptions). That's because Hooking up cc-do_interrupt is the correct thing to do though, so that could be sorted out later, ...I just implemented a basic interrupt controller and timer interrupt device in an FPGA-based SoC last week ( http://moxielogic.org/blog/?p=734 ). Let me implement this platform support in QEMU, and maybe these issues will sort themselves out as I do the work. Thanks, AG Reviewed-by: Andreas Färber afaer...@suse.de Andreas -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
