date:20111223

CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 08:07:40 UTC 2011

Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: trap.h

Log Message:
Add various new exceptions from MTE/32R2/64R2/DSP.


To generate a diff of this commit:
cvs rdiff -u -r1.15.96.1 -r1.15.96.2 src/sys/arch/mips/include/trap.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/include/trap.h
diff -u src/sys/arch/mips/include/trap.h:1.15.96.1 src/sys/arch/mips/include/trap.h:1.15.96.2
--- src/sys/arch/mips/include/trap.h:1.15.96.1	Fri Apr 29 08:26:22 2011
+++ src/sys/arch/mips/include/trap.h	Fri Dec 23 08:07:40 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: trap.h,v 1.15.96.1 2011/04/29 08:26:22 matt Exp $	*/
+/*	$NetBSD: trap.h,v 1.15.96.2 2011/12/23 08:07:40 matt Exp $	*/
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -65,8 +65,22 @@
 #define	T_TRAP			13	/* Trap instruction */
 #define	T_VCEI			14	/* Virtual coherency exception */
 #define	T_FPE			15	/* Floating point exception */
+#define	T_IMPL0			16	/* Implementation dependent */
+#define	T_IMPL1			17	/* Implementation dependent */
+#define	T_C2E			18	/* Reserved for precise COP2 exception */
+#define	T_TLBRI			19	/* TLB Read-Inhibit exception */
+#define	T_TLBXI			20	/* TLB Execution-Inhibit exception */
+#define	T__RSRVRD21		21	/* Reserved */
+#define	T_MDMX			22	/* MDMX Unusable exception */
 #define	T_WATCH			23	/* Watch address reference */
-#define T_VCED			31	/* Virtual coherency data */
+#define	T_MCHECK		24	/* Machine Check */
+#define	T_THREAD		25	/* Thread (MT ASE) Exceptions */
+#define	T_DSPDIS		26	/* DSP ASE State Disabled */
+#define	T__RSRVRD27		27	/* Reserved */
+#define	T__RSRVRD28		28	/* Reserved */
+#define	T__RSRVRD29		29	/* Reserved */
+#define	T_CACHEERR		30	/* Cache Errror */
+#define	T_VCED			31	/* Virtual coherency data (Reserved) */
 
 #define	T_USER			0x20	/* user-mode flag or'ed with type */

CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 08:09:08 UTC 2011

Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: locore.h

Log Message:
add more mipsNN_cp0_config{3,4,5,6,7}_{read,write}.
Add mips3_cp0_random_read().
Add L3 encoding for RMI.


To generate a diff of this commit:
cvs rdiff -u -r1.78.36.1.2.30 -r1.78.36.1.2.31 \
src/sys/arch/mips/include/locore.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/include/locore.h
diff -u src/sys/arch/mips/include/locore.h:1.78.36.1.2.30 src/sys/arch/mips/include/locore.h:1.78.36.1.2.31
--- src/sys/arch/mips/include/locore.h:1.78.36.1.2.30	Thu May 26 19:21:55 2011
+++ src/sys/arch/mips/include/locore.h	Fri Dec 23 08:09:08 2011
@@ -146,7 +146,19 @@ void	mips3_cp0_config_write(uint32_t);
 uint32_t mipsNN_cp0_config1_read(void);
 void	mipsNN_cp0_config1_write(uint32_t);
 uint32_t mipsNN_cp0_config2_read(void);
+void	mipsNN_cp0_config2_write(uint32_t);
 uint32_t mipsNN_cp0_config3_read(void);
+void	mipsNN_cp0_config3_write(uint32_t);
+uint32_t mipsNN_cp0_config4_read(void);
+void	mipsNN_cp0_config4_write(uint32_t);
+uint32_t mipsNN_cp0_config5_read(void);
+void	mipsNN_cp0_config5_write(uint32_t);
+uint32_t mipsNN_cp0_config6_read(void);
+void	mipsNN_cp0_config6_write(uint32_t);
+uint32_t mipsNN_cp0_config7_read(void);
+void	mipsNN_cp0_config7_write(uint32_t);
+uint64_t mips64_cp0_config7_read(void);
+void	mips64_cp0_config7_write(uint32_t);
 
 uintptr_t mipsNN_cp0_watchlo_read(u_int);
 void	mipsNN_cp0_watchlo_write(u_int, uintptr_t);
@@ -162,6 +174,8 @@ void	mipsNN_cp0_userlocal_write(void *);
 uint32_t mips3_cp0_count_read(void);
 void	mips3_cp0_count_write(uint32_t);
 
+uint32_t mips3_cp0_random_read(void);
+
 uint32_t mips3_cp0_wired_read(void);
 void	mips3_cp0_wired_write(uint32_t);
 void	mips3_cp0_pg_mask_write(uint32_t);
@@ -560,34 +574,38 @@ struct pridtab {
 # define  CIDFL_RMI_TYPE_XLS		1
 # define  CIDFL_RMI_TYPE_XLP		2
 #define MIPS_CIDFL_RMI_THREADS_MASK	__BITS(6,3)
-# define MIPS_CIDFL_RMI_THREADS_SHIFT	3
 #define MIPS_CIDFL_RMI_CORES_MASK	__BITS(10,7)
-# define MIPS_CIDFL_RMI_CORES_SHIFT	7
 # define LOG2_1	0
 # define LOG2_2	1
 # define LOG2_4	2
 # define LOG2_8	3
 # define MIPS_CIDFL_RMI_CPUS(ncores, nthreads)\
-		((LOG2_ ## ncores  MIPS_CIDFL_RMI_CORES_SHIFT)	\
-		|(LOG2_ ## nthreads  MIPS_CIDFL_RMI_THREADS_SHIFT))
+		(__SHIFTIN(LOG2_ ## ncores, MIPS_CIDFL_RMI_CORES_MASK)	\
+		|__SHIFTIN(LOG2_ ## nthreads, MIPS_CIDFL_RMI_THREADS_MASK))
 # define MIPS_CIDFL_RMI_NTHREADS(cidfl)	\
-		(1  (((cidfl)  MIPS_CIDFL_RMI_THREADS_MASK)		\
-			 MIPS_CIDFL_RMI_THREADS_SHIFT))
+		(1  __SHIFTOUT((cidfl), MIPS_CIDFL_RMI_THREADS_MASK))
 # define MIPS_CIDFL_RMI_NCORES(cidfl)	\
-		(1  (((cidfl)  MIPS_CIDFL_RMI_CORES_MASK)		\
-			 MIPS_CIDFL_RMI_CORES_SHIFT))
+		(1  __SHIFTOUT((cidfl), MIPS_CIDFL_RMI_CORES_MASK))
 #define MIPS_CIDFL_RMI_L2SZ_MASK	__BITS(14,11)
-# define MIPS_CIDFL_RMI_L2SZ_SHIFT	11
 # define RMI_L2SZ_256KB	 0
 # define RMI_L2SZ_512KB  1
 # define RMI_L2SZ_1MB2
 # define RMI_L2SZ_2MB3
 # define RMI_L2SZ_4MB4
 # define MIPS_CIDFL_RMI_L2(l2sz)	\
-		(RMI_L2SZ_ ## l2sz  MIPS_CIDFL_RMI_L2SZ_SHIFT)
+		__SHIFTIN(RMI_L2SZ_ ## l2sz, MIPS_CIDFL_RMI_L2SZ_MASK)
 # define MIPS_CIDFL_RMI_L2SZ(cidfl)	\
-		((256*1024)  (((cidfl)  MIPS_CIDFL_RMI_L2SZ_MASK)	\
-			 MIPS_CIDFL_RMI_L2SZ_SHIFT))
+		((256*1024)  __SHIFTOUT((cidfl), MIPS_CIDFL_RMI_L2SZ_MASK))
+#define MIPS_CIDFL_RMI_L3SZ_MASK	__BITS(18,15)
+# define RMI_L3SZ_256KB	 0
+# define RMI_L3SZ_512KB  1
+# define RMI_L3SZ_1MB2
+# define RMI_L3SZ_2MB3
+# define RMI_L3SZ_4MB4
+# define MIPS_CIDFL_RMI_L3(l3sz)	\
+		__SHIFTIN(RMI_L3SZ_ ## l3sz, MIPS_CIDFL_RMI_L3SZ_MASK)
+# define MIPS_CIDFL_RMI_L3SZ(cidfl)	\
+		((256*1024)  __SHIFTOUT((cidfl), MIPS_CIDFL_RMI_L3SZ_MASK))
 
 #endif	/* _KERNEL */
 #endif	/* _MIPS_LOCORE_H */

CVS commit: src/sys/arch/mips/mips

2011-12-23 Thread Izumi Tsutsui

Module Name:src
Committed By:   tsutsui
Date:   Fri Dec 23 10:01:33 UTC 2011

Modified Files:
src/sys/arch/mips/mips: locore_mips1.S

Log Message:
- use correct ASID bits in MIPS_COP_0_TLB_HI
- save/restore current PID in tlb_invalidate_all() and cpu_switch_resume()
  as mipsX_subr.S does


To generate a diff of this commit:
cvs rdiff -u -r1.82 -r1.83 src/sys/arch/mips/mips/locore_mips1.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/mips/locore_mips1.S
diff -u src/sys/arch/mips/mips/locore_mips1.S:1.82 src/sys/arch/mips/mips/locore_mips1.S:1.83
--- src/sys/arch/mips/mips/locore_mips1.S:1.82	Sat May  7 19:15:48 2011
+++ src/sys/arch/mips/mips/locore_mips1.S	Fri Dec 23 10:01:33 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore_mips1.S,v 1.82 2011/05/07 19:15:48 tsutsui Exp $	*/
+/*	$NetBSD: locore_mips1.S,v 1.83 2011/12/23 10:01:33 tsutsui Exp $	*/
 
 /*
  * Copyright (c) 1992, 1993
@@ -1265,7 +1265,8 @@ LEAF(MIPSX(tlb_invalidate_asids))
 
 	mfc0	ta0, MIPS_COP_0_TLB_HI		# get va and ASID
 	nop
-	and	ta0, ta0, PG_ASID		# mask off ASID
+	and	ta0, MIPS1_TLB_PID 		# mask off ASID
+	srl	ta0, MIPS1_TLB_PID_SHIFT
 	sltu	ta1, ta0, a0			#  asid_lo
 	bnez	ta1, 2f# yes, next tlb entry
 	 nop
@@ -1299,7 +1300,8 @@ LEAF(MIPSX(tlb_invalidate_all))
 	mfc0	v1, MIPS_COP_0_STATUS		# save the status register.
 	mtc0	zero, MIPS_COP_0_STATUS		# disable interrupts
 
-	li	t1, MIPS_KSEG0_START
+	mfc0	t0, MIPS_COP_0_TLB_HI		# save current PID
+	li	t1, MIPS_KSEG0_START		# invalid address
 	mtc0	t1, MIPS_COP_0_TLB_HI		# make entryHi invalid
 	mtc0	zero, MIPS_COP_0_TLB_LOW	# zero out entryLo
 
@@ -1313,6 +1315,7 @@ LEAF(MIPSX(tlb_invalidate_all))
 	bne	t1, a0, 1b
 	 tlbwi	# invalidate the entry
 
+	mtc0	t0, MIPS_COP_0_TLB_HI		# restore PID
 	j	ra
 	 mtc0	v1, MIPS_COP_0_STATUS		# restore status register
 END(MIPSX(tlb_invalidate_all))
@@ -1350,8 +1353,9 @@ LEAF(MIPSX(tlb_record_asids))
 
 	mfc0	t0, MIPS_COP_0_TLB_HI		# get va and ASID
 	nop
-	and	t0, PG_ASID			# mask off ASID
-	srl	t0, MIPS1_TLB_INDEX_SHIFT	# shift to low bits
+	and	t0, MIPS1_TLB_PID
+	srl	t0, MIPS1_TLB_PID_SHIFT		# shift to low bits
+	and	t0, a1# focus on asid_mask
 
 	srl	a2, t0, 3 + LONG_SCALESHIFT	# drop low 5 bits
 	sll	a2, LONG_SCALESHIFT		# make an index for the bitmap
@@ -1545,6 +1549,8 @@ LEAF_NOPROFILE(MIPSX(cpu_switch_resume))
 	blt	s0, s2, resume
 	nop
 
+	mfc0	t3, MIPS_COP_0_TLB_HI		# save PID
+	nop
 	mtc0	s0, MIPS_COP_0_TLB_HI		# VPN = va
 	nop
 	tlbp	# probe 1st VPN
@@ -1586,6 +1592,8 @@ entry1set:
 	mtc0	a2, MIPS_COP_0_TLB_LOW		# 2nd PFN w/ PG_G
 	nop
 	tlbwi	# set TLB entry #1
+	nop
+	mfc0	t3, MIPS_COP_0_TLB_HI		# restore PID
 
 resume:
 	j	ra

CVS commit: src/sys/netinet

2011-12-23 Thread Christos Zoulas

Module Name:src
Committed By:   christos
Date:   Fri Dec 23 15:31:17 UTC 2011

Modified Files:
src/sys/netinet: ip_icmp.h

Log Message:
add missing icmp types.


To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.27 src/sys/netinet/ip_icmp.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/netinet/ip_icmp.h
diff -u src/sys/netinet/ip_icmp.h:1.26 src/sys/netinet/ip_icmp.h:1.27
--- src/sys/netinet/ip_icmp.h:1.26	Sat Jun 26 10:24:29 2010
+++ src/sys/netinet/ip_icmp.h	Fri Dec 23 10:31:16 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: ip_icmp.h,v 1.26 2010/06/26 14:24:29 kefren Exp $	*/
+/*	$NetBSD: ip_icmp.h,v 1.27 2011/12/23 15:31:16 christos Exp $	*/
 
 /*
  * Copyright (c) 1982, 1986, 1993
@@ -150,6 +150,7 @@ struct icmp {
 #define		ICMP_REDIRECT_HOST	1		/* for host */
 #define		ICMP_REDIRECT_TOSNET	2		/* for tos and net */
 #define		ICMP_REDIRECT_TOSHOST	3		/* for tos and host */
+#define	ICMP_ALTHOSTADDR	6		/* alternative host address */
 #define	ICMP_ECHO		8		/* echo service */
 #define	ICMP_ROUTERADVERT	9		/* router advertisement */
 #define	ICMP_ROUTERSOLICIT	10		/* router solicitation */
@@ -164,8 +165,16 @@ struct icmp {
 #define	ICMP_IREQREPLY		16		/* information reply */
 #define	ICMP_MASKREQ		17		/* address mask request */
 #define	ICMP_MASKREPLY		18		/* address mask reply */
+#define	ICMP_TRACEROUTE		30		/* traceroute */
+#define	ICMP_DATACONVERR	31		/* data conversion error */
+#define	ICMP_MOBILE_REDIRECT	32		/* mobile redirect */
+#define	ICMP_IPV6_WHEREAREYOU	33		/* ipv6 where are you */
+#define	ICMP_IPV6_IAMHERE	34		/* ipv6 i am here */
+#define	ICMP_MOBILE_REGREQUEST	35		/* mobile registration req */
+#define	ICMP_MOBILE_REGREPLY	36		/* mobile registration reply */
+#define	ICMP_PHOTURIS		40		/* security */
 
-#define	ICMP_MAXTYPE		18
+#define	ICMP_MAXTYPE		40
 
 #define	ICMP_INFOTYPE(type) \
 	((type) == ICMP_ECHOREPLY || (type) == ICMP_ECHO || \

CVS commit: src/sys/arch/hppa

2011-12-23 Thread Nick Hudson

Module Name:src
Committed By:   skrll
Date:   Fri Dec 23 16:35:01 UTC 2011

Modified Files:
src/sys/arch/hppa/hppa: pmap.c
src/sys/arch/hppa/include: pmap.h

Log Message:
Define PMAP_NEED_PROCWR and provide pmap_procwr so that the i-cache is
synchronised with the d-cache appropriately.


To generate a diff of this commit:
cvs rdiff -u -r1.83 -r1.84 src/sys/arch/hppa/hppa/pmap.c
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/hppa/include/pmap.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/hppa/hppa/pmap.c
diff -u src/sys/arch/hppa/hppa/pmap.c:1.83 src/sys/arch/hppa/hppa/pmap.c:1.84
--- src/sys/arch/hppa/hppa/pmap.c:1.83	Fri Dec 16 12:45:04 2011
+++ src/sys/arch/hppa/hppa/pmap.c	Fri Dec 23 16:35:00 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: pmap.c,v 1.83 2011/12/16 12:45:04 skrll Exp $	*/
+/*	$NetBSD: pmap.c,v 1.84 2011/12/23 16:35:00 skrll Exp $	*/
 
 /*-
  * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
@@ -65,7 +65,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: pmap.c,v 1.83 2011/12/16 12:45:04 skrll Exp $);
+__KERNEL_RCSID(0, $NetBSD: pmap.c,v 1.84 2011/12/23 16:35:00 skrll Exp $);
 
 #include opt_cputype.h
 
@@ -1587,6 +1587,18 @@ pmap_activate(struct lwp *l)
 		mtctl(pmap-pm_pid, CR_PIDR2);
 }
 
+void
+pmap_procwr(struct proc *p, vaddr_t va, size_t len)
+{
+	pmap_t pmap = p-p_vmspace-vm_map.pmap;
+
+	fdcache(pmap-pm_space, va, len);
+	sync_caches();
+	ficache(pmap-pm_space, va, len);
+	sync_caches();
+
+}
+
 static inline void
 pmap_flush_page(struct vm_page *pg, bool purge)
 {

Index: src/sys/arch/hppa/include/pmap.h
diff -u src/sys/arch/hppa/include/pmap.h:1.32 src/sys/arch/hppa/include/pmap.h:1.33
--- src/sys/arch/hppa/include/pmap.h:1.32	Fri Dec 16 13:38:44 2011
+++ src/sys/arch/hppa/include/pmap.h	Fri Dec 23 16:35:00 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: pmap.h,v 1.32 2011/12/16 13:38:44 skrll Exp $	*/
+/*	$NetBSD: pmap.h,v 1.33 2011/12/23 16:35:00 skrll Exp $	*/
 
 /*	$OpenBSD: pmap.h,v 1.35 2007/12/14 18:32:23 deraadt Exp $	*/
 
@@ -48,6 +48,8 @@
 
 #ifdef	_KERNEL
 
+#define PMAP_NEED_PROCWR
+
 struct pmap {
 	struct uvm_object pm_obj;	/* object (lck by object lock) */
 #define	pm_lock	pm_obj.vmobjlock
@@ -148,6 +150,8 @@ void pmap_write_protect(struct pmap *, v
 void pmap_remove(struct pmap *pmap, vaddr_t sva, vaddr_t eva);
 void pmap_page_remove(struct vm_page *pg);
 
+void pmap_procwr(struct proc *, vaddr_t, size_t);
+
 static inline void
 pmap_deactivate(struct lwp *l)
 {

CVS commit: src/sys/arch/hppa/hppa

2011-12-23 Thread Nick Hudson

Module Name:src
Committed By:   skrll
Date:   Fri Dec 23 16:38:51 UTC 2011

Modified Files:
src/sys/arch/hppa/hppa: pmap.c

Log Message:
Whitespace.


To generate a diff of this commit:
cvs rdiff -u -r1.84 -r1.85 src/sys/arch/hppa/hppa/pmap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/hppa/hppa/pmap.c
diff -u src/sys/arch/hppa/hppa/pmap.c:1.84 src/sys/arch/hppa/hppa/pmap.c:1.85
--- src/sys/arch/hppa/hppa/pmap.c:1.84	Fri Dec 23 16:35:00 2011
+++ src/sys/arch/hppa/hppa/pmap.c	Fri Dec 23 16:38:50 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: pmap.c,v 1.84 2011/12/23 16:35:00 skrll Exp $	*/
+/*	$NetBSD: pmap.c,v 1.85 2011/12/23 16:38:50 skrll Exp $	*/
 
 /*-
  * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
@@ -65,7 +65,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: pmap.c,v 1.84 2011/12/23 16:35:00 skrll Exp $);
+__KERNEL_RCSID(0, $NetBSD: pmap.c,v 1.85 2011/12/23 16:38:50 skrll Exp $);
 
 #include opt_cputype.h
 
@@ -1596,7 +1596,6 @@ pmap_procwr(struct proc *p, vaddr_t va, 
 	sync_caches();
 	ficache(pmap-pm_space, va, len);
 	sync_caches();
-
 }
 
 static inline void

CVS commit: src/lib/libtelnet

2011-12-23 Thread Christos Zoulas

Module Name:src
Committed By:   christos
Date:   Fri Dec 23 16:48:16 UTC 2011

Modified Files:
src/lib/libtelnet: encrypt.c

Log Message:
Avoid buffer overflow, reported by Colin Percival at FreeBSD


To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/lib/libtelnet/encrypt.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/lib/libtelnet/encrypt.c
diff -u src/lib/libtelnet/encrypt.c:1.14 src/lib/libtelnet/encrypt.c:1.15
--- src/lib/libtelnet/encrypt.c:1.14	Wed Jan 17 18:24:22 2007
+++ src/lib/libtelnet/encrypt.c	Fri Dec 23 11:48:16 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: encrypt.c,v 1.14 2007/01/17 23:24:22 hubertf Exp $	*/
+/*	$NetBSD: encrypt.c,v 1.15 2011/12/23 16:48:16 christos Exp $	*/
 
 /*-
  * Copyright (c) 1991, 1993
@@ -33,7 +33,7 @@
 #if 0
 static char sccsid[] = @(#)encrypt.c	8.2 (Berkeley) 5/30/95;
 #else
-__RCSID($NetBSD: encrypt.c,v 1.14 2007/01/17 23:24:22 hubertf Exp $);
+__RCSID($NetBSD: encrypt.c,v 1.15 2011/12/23 16:48:16 christos Exp $);
 #endif /* not lint */
 
 /*
@@ -765,6 +765,8 @@ encrypt_keyid(kp, keyid, len)
 		if (ep-keyid)
 			(void)(*ep-keyid)(dir, kp-keyid, kp-keylen);
 
+	} else if (len  sizeof(kp-keyid)) {
+		return;
 	} else if ((len != kp-keylen) ||
 		   (memcmp(keyid, kp-keyid, len) != 0)) {
 		/*

CVS commit: src/libexec/telnetd

2011-12-23 Thread Christos Zoulas

Module Name:src
Committed By:   christos
Date:   Fri Dec 23 16:56:54 UTC 2011

Modified Files:
src/libexec/telnetd: state.c

Log Message:
there is a macro for that, use it.


To generate a diff of this commit:
cvs rdiff -u -r1.27 -r1.28 src/libexec/telnetd/state.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/libexec/telnetd/state.c
diff -u src/libexec/telnetd/state.c:1.27 src/libexec/telnetd/state.c:1.28
--- src/libexec/telnetd/state.c:1.27	Wed Feb 21 16:14:07 2007
+++ src/libexec/telnetd/state.c	Fri Dec 23 11:56:54 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: state.c,v 1.27 2007/02/21 21:14:07 hubertf Exp $	*/
+/*	$NetBSD: state.c,v 1.28 2011/12/23 16:56:54 christos Exp $	*/
 
 /*
  * Copyright (c) 1989, 1993
@@ -34,7 +34,7 @@
 #if 0
 static char sccsid[] = @(#)state.c	8.5 (Berkeley) 5/30/95;
 #else
-__RCSID($NetBSD: state.c,v 1.27 2007/02/21 21:14:07 hubertf Exp $);
+__RCSID($NetBSD: state.c,v 1.28 2011/12/23 16:56:54 christos Exp $);
 #endif
 #endif /* not lint */
 
@@ -1212,7 +1212,7 @@ suboption(void)
 		 * Process suboption buffer of slc's
 		 */
 		start_slc(1);
-		do_opt_slc(subpointer, subend - subpointer);
+		do_opt_slc(subpointer, SB_LEN());
 		(void) end_slc(0);
 		break;
 	} else if (request == LM_MODE) {

CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 17:55:50 UTC 2011

Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h

Log Message:
Correct XLP processor ids, add 1074K processor id.  Increase ASID space
to 10 bits for MIPS3+ cpus.


To generate a diff of this commit:
cvs rdiff -u -r1.74.28.22 -r1.74.28.23 src/sys/arch/mips/include/cpuregs.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/include/cpuregs.h
diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.22 src/sys/arch/mips/include/cpuregs.h:1.74.28.23
--- src/sys/arch/mips/include/cpuregs.h:1.74.28.22	Fri Nov  4 04:29:32 2011
+++ src/sys/arch/mips/include/cpuregs.h	Fri Dec 23 17:55:50 2011
@@ -693,7 +693,7 @@
 #define	MIPS1_TLB_PID_SHIFT		6
 
 #define	MIPS3_TLB_VPN2			0xe000
-#define	MIPS3_TLB_ASID			0x00ff
+#define	MIPS3_TLB_ASID			0x03ff
 
 #define	MIPS1_TLB_VIRT_PAGE_NUM		MIPS1_TLB_VPN
 #define	MIPS3_TLB_VIRT_PAGE_NUM		MIPS3_TLB_VPN2
@@ -732,7 +732,11 @@
 #if (MIPS3 + MIPS4 + MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2 + MIPS64_RMIXL + MIPS64R2_RMIXL) != 0  MIPS1 == 0
 #define	MIPS_TLB_PID_SHIFT		0
 #define	MIPS_TLB_PID			MIPS3_TLB_PID
+#if (MIPS3 + MIPS4) != 0
 #define	MIPS_TLB_NUM_PIDS		MIPS3_TLB_NUM_ASIDS
+#else
+#define	MIPS_TLB_NUM_PIDS		mips_options.mips_num_tlb_asids
+#endif
 #endif
 
 
@@ -874,6 +878,7 @@
 #define	MIPS_24KE	0x96	/* MIPS 24KEc			ISA 32  Rel 2 */
 #define	MIPS_74K	0x97	/* MIPS 74Kc/74Kf		ISA 32  Rel 2 */
 #define	MIPS_1004K	0x99	/* MIPS 1004Kc/1004Kf		ISA 32  Rel 2 */
+#define	MIPS_1074K	0x9a	/* MIPS 1074K			ISA 32  Rel 2 */
 
 /*
  * Alchemy (company ID 3) use the processor ID field to donote the CPU core
@@ -908,13 +913,8 @@
 /*
  * CPU processor IDs for company ID == 12 (RMI)
  */
-#define	MIPS_XLP832	0x10	/* RMI XLP832	 		ISA 64  Rel 2 */
-#define	MIPS_XLP816	0x14	/* RMI XLP816	 		ISA 64  Rel 2 */
-#define	MIPS_XLP432	0x90	/* RMI XLP432	 		ISA 64  Rel 2 */
-#define	MIPS_XLP416	0x94	/* RMI XLP416	 		ISA 64  Rel 2 */
-#define	MIPS_XLP316	0xd4	/* RMI XLP316	 		ISA 64  Rel 2 */
-#define	MIPS_XLP308	0xd5	/* RMI XLP308	 		ISA 64  Rel 2 */
-#define	MIPS_XLP304	0xd7	/* RMI XLP304	 		ISA 64  Rel 2 */
+#define	MIPS_XLP8XX	0x10	/* RMI XLP8XX/XLP4XX 		ISA 64  Rel 2 */
+#define	MIPS_XLP3XX	0x11	/* RMI XLP3XX	 		ISA 64  Rel 2 */
 #define	MIPS_XLR308B	0x06	/* RMI XLR308-B	 		ISA 64  */
 #define	MIPS_XLR508B	0x07	/* RMI XLR508-B	 		ISA 64  */
 #define	MIPS_XLR516B	0x08	/* RMI XLR516-B	 		ISA 64  */
@@ -957,8 +957,5 @@
 #ifdef MIPS64_SB1
 #include mips/sb1regs.h
 #endif
-#if (MIPS64_XLR + MIPS64_XLS + MIPS64_XLP)  0
-#include mips/rmi/rmixlreg.h
-#endif
 
 #endif /* _MIPS_CPUREGS_H_ */

CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 17:58:20 UTC 2011

Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: pci_machdep.h

Log Message:
Add conditional support for __PCI_BUS_DEVORDER, __HAVE_PCI_CONF_HOOK, and
__PCI_DEV_FUNCORDER (new).


To generate a diff of this commit:
cvs rdiff -u -r1.4.96.2 -r1.4.96.3 src/sys/arch/mips/include/pci_machdep.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/include/pci_machdep.h
diff -u src/sys/arch/mips/include/pci_machdep.h:1.4.96.2 src/sys/arch/mips/include/pci_machdep.h:1.4.96.3
--- src/sys/arch/mips/include/pci_machdep.h:1.4.96.2	Sun Sep 13 03:29:36 2009
+++ src/sys/arch/mips/include/pci_machdep.h	Fri Dec 23 17:58:20 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_machdep.h,v 1.4.96.2 2009/09/13 03:29:36 cliff Exp $ */
+/* $NetBSD: pci_machdep.h,v 1.4.96.3 2011/12/23 17:58:20 matt Exp $ */
 
 /*
  * Copyright (c) 1996 Carnegie-Mellon University.
@@ -74,6 +74,15 @@ struct mips_pci_chipset {
 	void		(*pc_conf_interrupt)(void *, int, int, int,
 			int, int *);
 
+#ifdef __PCI_BUS_DEVORDER
+	int		(*pc_bus_devorder)(void *, int, char *);
+#endif
+#ifdef __PCI_DEV_FUNCORDER
+	bool		(*pc_dev_funcorder)(void *, int, int, int, char *);
+#endif
+#ifdef __HAVE_PCI_CONF_HOOK
+	int		(*pc_conf_hook)(void *, int, int, int, pcireg_t);
+#endif
 #ifdef __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH
 	void		*(*pc_pciide_compat_intr_establish)(void *,
 			device_t, struct pci_attach_args *, int,
@@ -108,6 +117,19 @@ struct mips_pci_chipset {
 (*(c)-pc_intr_disestablish)((c)-pc_intr_v, (iv))
 #define	pci_conf_interrupt(c, b, d, p, s, lp)\
 (*(c)-pc_conf_interrupt)((c)-pc_intr_v, (b), (d), (p), (s), (lp))
+#ifdef __PCI_BUS_DEVORDER
+#define	pci_bus_devorder(c, b, d)	\
+(*(c)-pc_bus_devorder)((c)-pc_intr_v, (b), (d))
+#endif
+#ifdef __PCI_DEV_FUNCORDER
+#define	pci_dev_funcorder(c, b, d, nf, f)\
+(*(c)-pc_dev_funcorder)((c)-pc_intr_v, (b), (d), (nf), (f))
+#endif
+#ifdef __HAVE_PCI_CONF_HOOK
+#define	pci_conf_hook(c, b, d, f, id)\
+(*(c)-pc_conf_hook)((c)-pc_intr_v, (b), (d), (f), (id))
+#endif
+
 
 /*
  * mips-specific PCI functions.

CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 18:49:03 UTC 2011

Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cache.h

Log Message:
Add multiple inclusion protection.
Add separate variable for dealing with icache virtual aliases


To generate a diff of this commit:
cvs rdiff -u -r1.9.96.4 -r1.9.96.5 src/sys/arch/mips/include/cache.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/include/cache.h
diff -u src/sys/arch/mips/include/cache.h:1.9.96.4 src/sys/arch/mips/include/cache.h:1.9.96.5
--- src/sys/arch/mips/include/cache.h:1.9.96.4	Thu May 26 19:21:55 2011
+++ src/sys/arch/mips/include/cache.h	Fri Dec 23 18:49:02 2011
@@ -35,6 +35,9 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
+#ifndef _MIPS_CACHE_H_
+#define _MIPS_CACHE_H_
+
 /*
  * Cache operations.
  *
@@ -207,16 +210,29 @@ struct mips_cache_info {
 	u_int mci_dcache_align_mask;
 
 	u_int mci_cache_prefer_mask;
-#if (MIPS2 + MIPS3 + MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2 + MIPS64_RMIXL | MIPS64R2_RMIXL)  0
+#if (MIPS2 + MIPS3 + MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2)
 	u_int mci_cache_alias_mask;
+	u_int mci_icache_alias_mask;
 
 	bool mci_cache_virtual_alias;
+	bool mci_icache_virtual_alias;
 
 #define	MIPS_CACHE_ALIAS_MASK		mips_cache_info.mci_cache_alias_mask
 #define	MIPS_CACHE_VIRTUAL_ALIAS	mips_cache_info.mci_cache_virtual_alias
-#elif defined(MIPS1)
+#define	MIPS_ICACHE_ALIAS_MASK		mips_cache_info.mci_icache_alias_mask
+#define	MIPS_ICACHE_VIRTUAL_ALIAS	mips_cache_info.mci_icache_virtual_alias
+#elif (MIPS1 + MIPS64_RMIXL + MIPS64R2_RMIXL)  0
 #define	MIPS_CACHE_ALIAS_MASK		0
 #define	MIPS_CACHE_VIRTUAL_ALIAS	false
+#if (MIPS64R2_RMIXL)  0
+	u_int mci_icache_alias_mask;
+	bool mci_icache_virtual_alias;
+#define	MIPS_ICACHE_ALIAS_MASK		mips_cache_info.mci_icache_alias_mask
+#define	MIPS_ICACHE_VIRTUAL_ALIAS	mips_cache_info.mci_icache_virtual_alias
+#else
+#define	MIPS_ICACHE_ALIAS_MASK		0
+#define	MIPS_ICACHE_VIRTUAL_ALIAS	false
+#endif
 #else
 #error mci_cache screw up
 #endif
@@ -287,3 +303,5 @@ void	mips_config_cache(void);
 void	mips_dcache_compute_align(void);
 
 #include mips/cache_mipsNN.h
+
+#endif /* _MIPS_CACHE_H_ */

CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 18:50:36 UTC 2011

Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: mips3_pte.h

Log Message:
Base various #defines, etc. on PAGE_SHIFT instead of using separate
ENABLE_MIPS_*_PAGE defines.


To generate a diff of this commit:
cvs rdiff -u -r1.23.38.7 -r1.23.38.8 src/sys/arch/mips/include/mips3_pte.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/include/mips3_pte.h
diff -u src/sys/arch/mips/include/mips3_pte.h:1.23.38.7 src/sys/arch/mips/include/mips3_pte.h:1.23.38.8
--- src/sys/arch/mips/include/mips3_pte.h:1.23.38.7	Fri Dec  2 00:01:37 2011
+++ src/sys/arch/mips/include/mips3_pte.h	Fri Dec 23 18:50:35 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: mips3_pte.h,v 1.23.38.7 2011/12/02 00:01:37 matt Exp $	*/
+/*	$NetBSD: mips3_pte.h,v 1.23.38.8 2011/12/23 18:50:35 matt Exp $	*/
 
 /*
  * Copyright (c) 1992, 1993
@@ -78,6 +78,7 @@
 
 #ifndef _MIPS_MIPS3_PTE_H_
 #define _MIPS_MIPS3_PTE_H_
+
 /*
  * R4000 hardware page table entry
  */
@@ -106,20 +107,28 @@ unsigned int 	pg_g:1,			/* HW: ignore as
 #define MIPS3_PG_WIRED	0x8000	/* SW */
 #define MIPS3_PG_RO	0x4000	/* SW */
 
-#ifdef ENABLE_MIPS_16KB_PAGE
-#define	MIPS3_PG_SVPN	0xc000	/* Software page no mask */
-#define	MIPS3_PG_HVPN	0x8000	/* Hardware page no mask */
-#define	MIPS3_PG_ODDPG	0x4000	/* Odd even pte entry */
-#elif defined(ENABLE_MIPS_8KB_PAGE)
-#define	MIPS3_PG_SVPN	0xe000	/* Software page no mask */
-#define	MIPS3_PG_HVPN	0xe000	/* Hardware page no mask */
-#define	MIPS3_PG_NEXT	0x0040	/* next PFN */
-#elif defined(ENABLE_MIPS_4KB_PAGE) || 1
-#define	MIPS3_PG_SVPN	0xf000	/* Software page no mask */
-#define	MIPS3_PG_HVPN	0xe000	/* Hardware page no mask */
-#define	MIPS3_PG_ODDPG	0x1000	/* Odd even pte entry */
+#ifndef PAGE_SHIFT
+#error PAGE_SHIFT is not defined
+#endif
+#define	MIPS3_PG_SVPN	(0x  PAGE_SHIFT)
+		/* Software page # mask */
+#if PAGE_SHIFT  1
+#define	MIPS3_PG_HVPN	MIPS3_PG_SVPN		/* Hardware page # mask */
+#if !defined(_LOCORE)
+#define	MIPS3_PG_NEXT	(1U  (PAGE_SHIFT - MIPS3_PG_SHIFT - 1))
+		/* next PFN */
+#elif defined(MIPS_4100)
+#define	MIPS3_PG_NEXT	(1U  (PAGE_SHIFT - MIPS3_4100_PG_SHIFT - 1))
+		/* next PFN */
+#else
+#define	MIPS3_PG_NEXT	(1U  (PAGE_SHIFT - MIPS3_DEFAULT_PG_SHIFT - 1))
+		/* next PFN */
+#endif
+#else
+#define	MIPS3_PG_HVPN	(MIPS3_PG_SVPN  1)	/* Hardware page # mask */
+#define	MIPS3_PG_ODDPG	(1U  PAGE_SHIFT)	/* Odd even pte entry */
 #endif
-#define	MIPS3_PG_ASID	0x00ff	/* Address space ID */
+#define	MIPS3_PG_ASID	0x03ff	/* Address space ID */
 #define	MIPS3_PG_G	0x0001	/* Global; ignore ASID if in lo0  lo1 */
 #define	MIPS3_PG_V	0x0002	/* Valid */
 #define	MIPS3_PG_NV	0x
@@ -214,7 +223,7 @@ CTASSERT(MIPS3_PG_SIZE_TO_MASK(8192) == 
 #define	MIPS4100_PG_SIZE_MASK_TO_SIZE(pg_mask)	\
 pg_mask) | 0x07ff) + 1) / 2)
 
-#define	MIPS4100_PG_SIZE_TO_MASK(pg_size)		\
+#define	MIPS4100_PG_SIZE_TO_MASK(pg_size)	\
 pg_size) * 2) - 1)  ~0x07ff)
 
 #endif /* !_MIPS_MIPS3_PTE_H_ */

CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 18:52:33 UTC 2011

Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h

Log Message:
Make CPUISMIPS3 deal with MIPS32R2 and MIPS64R2
Add mips_num_tlb_asids.
Allow a caller to cpu_identify to supply a cpuname (or NULL).


To generate a diff of this commit:
cvs rdiff -u -r1.90.16.38 -r1.90.16.39 src/sys/arch/mips/include/cpu.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/include/cpu.h
diff -u src/sys/arch/mips/include/cpu.h:1.90.16.38 src/sys/arch/mips/include/cpu.h:1.90.16.39
--- src/sys/arch/mips/include/cpu.h:1.90.16.38	Sat Dec  3 01:56:55 2011
+++ src/sys/arch/mips/include/cpu.h	Fri Dec 23 18:52:32 2011
@@ -260,6 +260,7 @@ struct mips_options {
 	u_int mips_cpu_mhz; /* CPU speed in MHz, estimated by mc_cpuspeed(). */
 	u_int mips_cpu_flags;
 	u_int mips_num_tlb_entries;
+	u_int mips_num_tlb_asids;
 	mips_prid_t mips_cpu_id;
 	mips_prid_t mips_fpu_id;
 	bool mips_has_r4k_mmu;
@@ -399,8 +400,7 @@ extern struct mips_options mips_options;
 #define	MIPS_HAS_LLADDR		((mips_options.mips_cpu_flags  CPU_MIPS_NO_LLADDR) == 0)
 
 /* This test is ... rather bogus */
-#define	CPUISMIPS3	((mips_options.mips_cpu_arch  \
-	(CPU_ARCH_MIPS3 | CPU_ARCH_MIPS4 | CPU_ARCH_MIPS32 | CPU_ARCH_MIPS64)) != 0)
+#define	CPUISMIPS3	((mips_options.mips_cpu_arch  (CPU_ARCH_MIPS3 | CPU_ARCH_MIPS4 | CPU_ARCH_MIPS32 | CPU_ARCH_MIPS64 | CPU_ARCH_MIPS32R2 | CPU_ARCH_MIPS64R2 )) != 0)
 
 /* And these aren't much better while the previous test exists as is... */
 #define	CPUISMIPS4	((mips_options.mips_cpu_arch  CPU_ARCH_MIPS4) != 0)
@@ -641,7 +641,7 @@ void	fpusave_cpu(struct cpu_info *);
 /* mips_machdep.c */
 void	dumpsys(void);
 int	savectx(struct pcb *);
-void	cpu_identify(device_t);
+void	cpu_identify(device_t, const char *);
 
 /* locore*.S */
 int	badaddr(void *, size_t);

CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 18:54:50 UTC 2011

Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: mips_param.h vmparam.h

Log Message:
Use MIPS_PAGE_SHIFT to define the page size to be used from a config file.
Add support for tracking which colors have been used for an EXECPAGE.


To generate a diff of this commit:
cvs rdiff -u -r1.23.78.8 -r1.23.78.9 src/sys/arch/mips/include/mips_param.h
cvs rdiff -u -r1.41.28.22 -r1.41.28.23 src/sys/arch/mips/include/vmparam.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/include/mips_param.h
diff -u src/sys/arch/mips/include/mips_param.h:1.23.78.8 src/sys/arch/mips/include/mips_param.h:1.23.78.9
--- src/sys/arch/mips/include/mips_param.h:1.23.78.8	Sat Dec  3 01:44:04 2011
+++ src/sys/arch/mips/include/mips_param.h	Fri Dec 23 18:54:50 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: mips_param.h,v 1.23.78.8 2011/12/03 01:44:04 matt Exp $	*/
+/*	$NetBSD: mips_param.h,v 1.23.78.9 2011/12/23 18:54:50 matt Exp $	*/
 
 #ifdef _KERNEL
 #include machine/cpu.h
@@ -39,17 +39,25 @@
 #define	SSIZE		1		/* initial stack size/NBPG */
 #define	SINCR		1		/* increment of stack/NBPG */
 
-#if defined(ENABLE_MIPS_16KB_PAGE) || defined(ENABLE_MIPS_8KB_PAGE)
+#ifdef PAGE_SHIFT
+#if MIPS_PAGE_SHIFT != PAGE_SHIFT
+#error MIPS_PAGE_SHIFT != PAGE_SHIFT
+#endif
+#elif defined(MIPS_PAGE_SHIFT)
+#define	PAGE_SHIFT	MIPS_PAGE_SHIFT
+#else
+#define	PAGE_SHIFT	12
+#endif
+
+#if PAGE_SHIFT  1
 #define	UPAGES		1		/* pages of u-area */
-#define	USPACE		(UPAGES*NBPG)	/* size of u-area in bytes */
-#elif defined(ENABLE_MIPS_4KB_PAGE) || 1
+#else
 #define	UPAGES		2		/* pages of u-area */
-#define	USPACE		(UPAGES*NBPG)	/* size of u-area in bytes */
 #define	USPACE_ALIGN	USPACE		/* make sure it starts on a even VA */
-#else
-#error ENABLE_MIPS_xKB_PAGE not defined
 #endif
 
+#define	USPACE		(UPAGES*NBPG)	/* size of u-area in bytes */
+
 #ifndef MSGBUFSIZE
 #define MSGBUFSIZE	NBPG		/* default message buffer size */
 #endif
@@ -73,13 +81,7 @@
 #define	ALIGN(p)	(((uintptr_t)(p) + ALIGNBYTES)  ~ALIGNBYTES)
 #define ALIGNED_POINTER(p,t)	uintptr_t)(p))  (sizeof(t)-1)) == 0)
 
-#ifdef ENABLE_MIPS_16KB_PAGE
-#define	PGSHIFT		14		/* LOG2(NBPG) */
-#elif defined(ENABLE_MIPS_8KB_PAGE)
-#define	PGSHIFT		13		/* LOG2(NBPG) */
-#else
-#define	PGSHIFT		12		/* LOG2(NBPG) */
-#endif
+#define	PGSHIFT		PAGE_SHIFT	/* LOG2(NBPG) */
 #define	NBPG		(1  PGSHIFT)	/* bytes/page */
 #define	PGOFSET		(NBPG-1)	/* byte offset into page */
 #define	NPTEPG		(NBPG/4)

Index: src/sys/arch/mips/include/vmparam.h
diff -u src/sys/arch/mips/include/vmparam.h:1.41.28.22 src/sys/arch/mips/include/vmparam.h:1.41.28.23
--- src/sys/arch/mips/include/vmparam.h:1.41.28.22	Fri Dec  2 00:01:37 2011
+++ src/sys/arch/mips/include/vmparam.h	Fri Dec 23 18:54:50 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: vmparam.h,v 1.41.28.22 2011/12/02 00:01:37 matt Exp $	*/
+/*	$NetBSD: vmparam.h,v 1.41.28.23 2011/12/23 18:54:50 matt Exp $	*/
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -51,17 +51,13 @@
  */
 
 /*
- * We normally use a 4K page but may use 16K on MIPS systems.
+ * We normally use a 4K page but may use 8K, 16K, or 32K on MIPS systems.
  * Override PAGE_* definitions to compile-time constants.
  */
-#ifdef ENABLE_MIPS_16KB_PAGE
-#define	PAGE_SHIFT	14
-#elif defined(ENABLE_MIPS_8KB_PAGE)
-#define	PAGE_SHIFT	13
-#elif defined(ENABLE_MIPS_4KB_PAGE) || 1
-#define	PAGE_SHIFT	12
+#ifdef MIPS_PAGE_SHIFT
+#define	PAGE_SHIFT	MIPS_PAGE_SHIFT
 #else
-#error ENABLE_MIPS_xKB_PAGE not defined
+#define	PAGE_SHIFT	12
 #endif
 #define	PAGE_SIZE	(1  PAGE_SHIFT)
 #define	PAGE_MASK	(PAGE_SIZE - 1)
@@ -177,7 +173,7 @@
 #ifdef ENABLE_MIPS_TX3900
 #define VM_MAX_KERNEL_ADDRESS	((vaddr_t)-0x0100)	/* 0xFF00 */
 #else
-#define VM_MAX_KERNEL_ADDRESS	((vaddr_t)-0x4000)	/* 0xC000 */
+#define VM_MAX_KERNEL_ADDRESS	((vaddr_t)-0x8000)	/* 0xFFF08000 */
 #endif
 #endif
 #define VM_MAXUSER32_ADDRESS	((vaddr_t)(1UL  31))/* 0x8000 */
@@ -238,14 +234,21 @@ typedef struct pv_entry {
 #define	PG_MD_MODIFIED		0x0002	/* page has been modified */
 #define	PG_MD_REFERENCED	0x0004	/* page has been recently referenced */
 #define	PG_MD_POOLPAGE		0x0008	/* page is used as a poolpage */
-#define	PG_MD_EXECPAGE		0x0010	/* page is exec mapped */
+#define	PG_MD_EXECPAGE_SHIFT	8
+#define	PG_MD_EXECPAGE(va)	\
+	__BIT(PG_MD_EXECPAGE_SHIFT + atop(va  MIPS_ICACHE_ALIAS_MASK))
+ 	/* page (color) is exec mapped */
+#define	PG_MD_EXECPAGE_ANY	(0xff  PG_MD_EXECPAGE_SHIFT)
+	/* page is exec mapped */
 
 #define	PG_MD_CACHED_P(md)	(((md)-pvh_attrs  PG_MD_UNCACHED) == 0)
 #define	PG_MD_UNCACHED_P(md)	(((md)-pvh_attrs  PG_MD_UNCACHED) != 0)
 #define	PG_MD_MODIFIED_P(md)	(((md)-pvh_attrs  PG_MD_MODIFIED) != 0)
 #define	PG_MD_REFERENCED_P(md)	(((md)-pvh_attrs  PG_MD_REFERENCED) != 0)
 #define

CVS commit: src/sys/netinet

2011-12-23 Thread Christos Zoulas

Module Name:src
Committed By:   christos
Date:   Fri Dec 23 19:08:50 UTC 2011

Modified Files:
src/sys/netinet: ip_icmp.h

Log Message:
make ICMP_MAXTYPE 18 again to unbreak stats.


To generate a diff of this commit:
cvs rdiff -u -r1.27 -r1.28 src/sys/netinet/ip_icmp.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/netinet/ip_icmp.h
diff -u src/sys/netinet/ip_icmp.h:1.27 src/sys/netinet/ip_icmp.h:1.28
--- src/sys/netinet/ip_icmp.h:1.27	Fri Dec 23 10:31:16 2011
+++ src/sys/netinet/ip_icmp.h	Fri Dec 23 14:08:50 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: ip_icmp.h,v 1.27 2011/12/23 15:31:16 christos Exp $	*/
+/*	$NetBSD: ip_icmp.h,v 1.28 2011/12/23 19:08:50 christos Exp $	*/
 
 /*
  * Copyright (c) 1982, 1986, 1993
@@ -174,7 +174,7 @@ struct icmp {
 #define	ICMP_MOBILE_REGREPLY	36		/* mobile registration reply */
 #define	ICMP_PHOTURIS		40		/* security */
 
-#define	ICMP_MAXTYPE		40
+#define	ICMP_MAXTYPE		18		/* XXX: for icmp stats */
 
 #define	ICMP_INFOTYPE(type) \
 	((type) == ICMP_ECHOREPLY || (type) == ICMP_ECHO || \

CVS commit: src/share/man/man9

2011-12-23 Thread Mindaugas Rasiukevicius

Module Name:src
Committed By:   rmind
Date:   Fri Dec 23 20:51:50 UTC 2011

Modified Files:
src/share/man/man9: npf_ncode.9

Log Message:
Sync with reality a little.


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/share/man/man9/npf_ncode.9

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/share/man/man9/npf_ncode.9
diff -u src/share/man/man9/npf_ncode.9:1.6 src/share/man/man9/npf_ncode.9:1.7
--- src/share/man/man9/npf_ncode.9:1.6	Sun Jan 30 07:02:23 2011
+++ src/share/man/man9/npf_ncode.9	Fri Dec 23 20:51:50 2011
@@ -1,4 +1,4 @@
-.\	$NetBSD: npf_ncode.9,v 1.6 2011/01/30 07:02:23 rmind Exp $
+.\	$NetBSD: npf_ncode.9,v 1.7 2011/12/23 20:51:50 rmind Exp $
 .\
 .\ Copyright (c) 2009-2011 The NetBSD Foundation, Inc.
 .\ All rights reserved.
@@ -27,7 +27,7 @@
 .\ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 .\ POSSIBILITY OF SUCH DAMAGE.
 .\
-.Dd January 30, 2011
+.Dd December 23, 2011
 .Dt NPF_NCODE 9
 .Os
 .Sh NAME
@@ -222,13 +222,13 @@ Read Ethernet type in the frame, handle 
 the value passed in the argument.
 Return value to advance to layer 3 header in R3.
 .\ -
-.It Sy 0x90 NPF_OPCODE_IP4MASK s/d, network address, subnet mask
-Match passed network address with subnet mask against source or destination
+.It Sy 0x90 NPF_OPCODE_IP4MASK s/d, network address, subnet
+Match passed network address with subnet against source or destination
 address in the IPv4 header.
 Address and mask should be in network byte order.
 Value of first argument indicates whether source (if 0x1) or destination
 (if 0x0) address should be matched.
-.It Sy 0x91 NPF_OPCODE_IP4TABLE s/d, table id
+.It Sy 0x91 NPF_OPCODE_TABLE s/d, table id
 Match the source or destination address with NPF table contents
 specified by table ID.
 Value of the first argument indicates whether source (if 0x1) or
@@ -242,6 +242,13 @@ If comparison is required, the type and 
 lower 16 bits.
 The higher 8 bits represent type, and the lower 8 bits code number.
 .\ -
+.It Sy 0x93 NPF_OPCODE_IP4MASK s/d, network address, subnet
+Match passed network address with subnet against source or destination
+address in the IPv6 header.
+Address and mask should be in network byte order.
+Value of first argument indicates whether source (if 0x1) or destination
+(if 0x0) address should be matched.
+.\ -
 .It Sy 0xa0 NPF_OPCODE_TCP_PORTS s/d, port range
 Match the TCP source or destination port with a specified port range.
 The higher 16 bits of the second argument represent the from and

CVS commit: src/share/man/man9

2011-12-23 Thread Mindaugas Rasiukevicius

Module Name:src
Committed By:   rmind
Date:   Fri Dec 23 20:53:31 UTC 2011

Modified Files:
src/share/man/man9: npf_ncode.9

Log Message:
Amend previous.


To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/share/man/man9/npf_ncode.9

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/share/man/man9/npf_ncode.9
diff -u src/share/man/man9/npf_ncode.9:1.7 src/share/man/man9/npf_ncode.9:1.8
--- src/share/man/man9/npf_ncode.9:1.7	Fri Dec 23 20:51:50 2011
+++ src/share/man/man9/npf_ncode.9	Fri Dec 23 20:53:31 2011
@@ -1,4 +1,4 @@
-.\	$NetBSD: npf_ncode.9,v 1.7 2011/12/23 20:51:50 rmind Exp $
+.\	$NetBSD: npf_ncode.9,v 1.8 2011/12/23 20:53:31 rmind Exp $
 .\
 .\ Copyright (c) 2009-2011 The NetBSD Foundation, Inc.
 .\ All rights reserved.
@@ -242,7 +242,7 @@ If comparison is required, the type and 
 lower 16 bits.
 The higher 8 bits represent type, and the lower 8 bits code number.
 .\ -
-.It Sy 0x93 NPF_OPCODE_IP4MASK s/d, network address, subnet
+.It Sy 0x93 NPF_OPCODE_IP6MASK s/d, network address, subnet
 Match passed network address with subnet against source or destination
 address in the IPv6 header.
 Address and mask should be in network byte order.

CVS commit: src/sys/netinet

2011-12-23 Thread James Chacon

Module Name:src
Committed By:   jmc
Date:   Fri Dec 23 22:03:00 UTC 2011

Modified Files:
src/sys/netinet: ip_icmp.h

Log Message:
Include the ICMP_PHOTURIS error codes if we're going to define ICMP_PHOTURIS


To generate a diff of this commit:
cvs rdiff -u -r1.28 -r1.29 src/sys/netinet/ip_icmp.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/netinet/ip_icmp.h
diff -u src/sys/netinet/ip_icmp.h:1.28 src/sys/netinet/ip_icmp.h:1.29
--- src/sys/netinet/ip_icmp.h:1.28	Fri Dec 23 19:08:50 2011
+++ src/sys/netinet/ip_icmp.h	Fri Dec 23 22:03:00 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: ip_icmp.h,v 1.28 2011/12/23 19:08:50 christos Exp $	*/
+/*	$NetBSD: ip_icmp.h,v 1.29 2011/12/23 22:03:00 jmc Exp $	*/
 
 /*
  * Copyright (c) 1982, 1986, 1993
@@ -173,6 +173,9 @@ struct icmp {
 #define	ICMP_MOBILE_REGREQUEST	35		/* mobile registration req */
 #define	ICMP_MOBILE_REGREPLY	36		/* mobile registration reply */
 #define	ICMP_PHOTURIS		40		/* security */
+#define		ICMP_PHOTURIS_UNKNOWN_INDEX	1	/* Bad index */
+#define		ICMP_PHOTURIS_AUTH_FAILED	2	/* Auth failed */
+#define		ICMP_PHOTURIS_DECRYPT_FAILED	3	/* Decrypt failed */
 
 #define	ICMP_MAXTYPE		18		/* XXX: for icmp stats */

CVS commit: [matt-nb5-mips64] src/sys/arch/mips

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 22:31:30 UTC 2011

Modified Files:
src/sys/arch/mips/conf [matt-nb5-mips64]: files.mips
src/sys/arch/mips/include [matt-nb5-mips64]: pmap.h
src/sys/arch/mips/mips [matt-nb5-mips64]: pmap.c pmap_tlb.c
Added Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: pmap_syncicache.c

Log Message:
Split syncicache functions into separate file: pmap_syncicache.
Support up to 1024 ASIDs.
Always use atomic ops for manipulating pm_shootdown_pending
Nuke PMAP_POOLPAGE_DEBUG
defparam MIPS_PAGE_SHIFT
Track colors of execpages.


To generate a diff of this commit:
cvs rdiff -u -r1.58.24.17 -r1.58.24.18 src/sys/arch/mips/conf/files.mips
cvs rdiff -u -r1.54.26.19 -r1.54.26.20 src/sys/arch/mips/include/pmap.h
cvs rdiff -u -r1.179.16.34 -r1.179.16.35 src/sys/arch/mips/mips/pmap.c
cvs rdiff -u -r0 -r1.1.2.1 src/sys/arch/mips/mips/pmap_syncicache.c
cvs rdiff -u -r1.1.2.20 -r1.1.2.21 src/sys/arch/mips/mips/pmap_tlb.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/conf/files.mips
diff -u src/sys/arch/mips/conf/files.mips:1.58.24.17 src/sys/arch/mips/conf/files.mips:1.58.24.18
--- src/sys/arch/mips/conf/files.mips:1.58.24.17	Fri Dec  2 00:01:37 2011
+++ src/sys/arch/mips/conf/files.mips	Fri Dec 23 22:31:30 2011
@@ -3,8 +3,6 @@
 
 defflag	opt_cputype.h		NOFPU FPEMUL
 MIPS64_SB1
-ENABLE_MIPS_16KB_PAGE
-ENABLE_MIPS_8KB_PAGE
 ENABLE_MIPS_KSEGX
 MIPS64_XLP MIPS64_XLR MIPS64_XLS
 	# and the rest...
@@ -15,9 +13,10 @@ defflag	opt_cputype.h		NOFPU FPEMUL
 	# ENABLE_MIPS_TX3900
 	# ENABLE_MIPS_R4700
 	# ENABLE_MIPS_R3NKK
-defflag	opt_mips_cache.h		MIPS3_NO_PV_UNCACHED
-	ENABLE_MIPS4_CACHE_R10K
-defflag opt_mips3_wired.h		ENABLE_MIPS3_WIRED_MAP
+defparam opt_cputype.h		MIPS_PAGE_SHIFT
+defflag	opt_mips_cache.h	MIPS3_NO_PV_UNCACHED
+ENABLE_MIPS4_CACHE_R10K
+defflag opt_mips3_wired.h	ENABLE_MIPS3_WIRED_MAP
 
 defflag	opt_ddb.h		DDB_TRACE
 defflag	opt_ddb.h		MIPS_DDB_WATCH
@@ -47,6 +46,7 @@ file	arch/mips/mips/kgdb_machdep.c		kgdb
 file	arch/mips/mips/mem.c
 file	arch/mips/mips/pmap.c
 file	arch/mips/mips/pmap_segtab.c
+file	arch/mips/mips/pmap_syncicache.c
 file	arch/mips/mips/pmap_tlb.c
 file	arch/mips/mips/trap.c			# trap handlers
 file	arch/mips/mips/syscall.c		# syscall entries

Index: src/sys/arch/mips/include/pmap.h
diff -u src/sys/arch/mips/include/pmap.h:1.54.26.19 src/sys/arch/mips/include/pmap.h:1.54.26.20
--- src/sys/arch/mips/include/pmap.h:1.54.26.19	Sat Dec  3 01:56:55 2011
+++ src/sys/arch/mips/include/pmap.h	Fri Dec 23 22:31:30 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: pmap.h,v 1.54.26.19 2011/12/03 01:56:55 matt Exp $	*/
+/*	$NetBSD: pmap.h,v 1.54.26.20 2011/12/23 22:31:30 matt Exp $	*/
 
 /*
  * Copyright (c) 1992, 1993
@@ -201,25 +201,26 @@ struct pmap_tlb_info {
 	uint32_t ti_asid_mask;
 	uint32_t ti_asid_max;
 	LIST_HEAD(, pmap_asid_info) ti_pais; /* list of active ASIDs */
+	uint32_t ti_syncicache_bitmap;	/* page indices needing a syncicache */
+	struct evcnt ti_evcnt_syncicache_asts;
+	struct evcnt ti_evcnt_syncicache_all;
+	struct evcnt ti_evcnt_syncicache_pages;
+	struct evcnt ti_evcnt_syncicache_desired;
+	struct evcnt ti_evcnt_syncicache_duplicate;
 #ifdef MULTIPROCESSOR
 	kmutex_t *ti_hwlock;
 	pmap_t ti_victim;
-	uint32_t ti_synci_page_bitmap;	/* page indices needing a syncicache */
 	uint32_t ti_cpu_mask;		/* bitmask of CPUs sharing this TLB */
 	enum tlb_invalidate_op ti_tlbinvop;
 	u_int ti_index;
 #define tlbinfo_index(ti)	((ti)-ti_index)
-	struct evcnt ti_evcnt_synci_asts;
-	struct evcnt ti_evcnt_synci_all;
-	struct evcnt ti_evcnt_synci_pages;
-	struct evcnt ti_evcnt_synci_deferred;
-	struct evcnt ti_evcnt_synci_desired;
-	struct evcnt ti_evcnt_synci_duplicate;
+	struct evcnt ti_evcnt_syncipage_deferred;
 #else
 #define tlbinfo_index(ti)	(0)
 #endif
 	struct evcnt ti_evcnt_asid_reinits;
-	u_long ti_asid_bitmap[256 / (sizeof(u_long) * 8)];
+	struct evcnt ti_evcnt_asid_reclaims;
+	u_long ti_asid_bitmap[1024 / (sizeof(u_long) * 8)];
 };
 
 #ifdef	_KERNEL
@@ -237,6 +238,8 @@ extern struct pmap_tlb_info pmap_tlb0_in
 extern struct pmap_tlb_info *pmap_tlbs[MAXCPUS];
 extern u_int pmap_ntlbs;
 #endif
+extern u_int pmap_syncipage_page_mask;
+extern u_int pmap_syncipage_map_mask;
 extern paddr_t mips_avail_start;
 extern paddr_t mips_avail_end;
 extern vaddr_t mips_virtual_end;
@@ -261,10 +264,12 @@ void	pmap_procwr(struct proc *, vaddr_t,
 void	pmap_tlb_shootdown_process(void);
 bool	pmap_tlb_shootdown_bystanders(pmap_t pmap);
 void	pmap_tlb_info_attach(struct pmap_tlb_info *, struct cpu_info *);
-void	pmap_tlb_syncicache_ast(struct cpu_info *);
-void	pmap_tlb_syncicache_wanted(struct cpu_info *);
-void	pmap_tlb_syncicache(vaddr_t, uint32_t);
+void	pmap_syncicache_wanted(struct cpu_info *);
+void	pmap_syncicache(uint32_t, uint32_t);
 #endif
+void	pmap_syncicache_page(struct

CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 22:33:21 UTC 2011

Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: trap.c

Log Message:
Cleanup AST processing.


To generate a diff of this commit:
cvs rdiff -u -r1.217.12.38 -r1.217.12.39 src/sys/arch/mips/mips/trap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/mips/trap.c
diff -u src/sys/arch/mips/mips/trap.c:1.217.12.38 src/sys/arch/mips/mips/trap.c:1.217.12.39
--- src/sys/arch/mips/mips/trap.c:1.217.12.38	Fri Dec 23 06:49:03 2011
+++ src/sys/arch/mips/mips/trap.c	Fri Dec 23 22:33:20 2011
@@ -655,21 +655,25 @@ trap(uint32_t status, uint32_t cause, va
 
 /*
  * Handle asynchronous software traps.
- * This is called from MachUserIntr() either to deliver signals or
- * to make involuntary context switch (preemption).
+ * This is called on the return to userspace to flush icache, deliver signals,
+ * or to make involuntary context switch (preemption).  If astpending wasn't
+ * set, we wouldn't have been called so make at least pass through the
+ * function.
  */
 void
 ast(void)
 {
 	struct lwp * const l = curlwp;
-	u_int astpending;
 
-	while ((astpending = l-l_md.md_astpending) != 0) {
-		//uvmexp.softs++;
+	do {
 		l-l_md.md_astpending = 0;
 
 #ifdef MULTIPROCESSOR
-		{
+		/*
+		 * Before returning to userland, if some icache page indicies
+		 * have been marked bad then flush them from the icache.
+		 */
+		if (MIPS_HAS_R4K_MMU) {
 			kpreempt_disable();
 			struct cpu_info * const ci = l-l_cpu;
 			if (ci-ci_tlb_info-ti_synci_page_bitmap != 0)
@@ -691,7 +695,7 @@ ast(void)
 			 */
 			preempt();
 		}
-	}
+	} while (l-l_md.md_astpending != 0);
 }

CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 22:45:27 UTC 2011

Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: mips_machdep.c

Log Message:
add entries for MIPS 1074K and RMI XLP3XX and XLP8XX.
for mipsNN, use TLB random register in case there are more than 64 TLB entries.
Add cpuname argument to cpu_identify.  Fix bug in mips_page_physaddr.
Print out number of ASIDs in cpu_identify.


To generate a diff of this commit:
cvs rdiff -u -r1.205.4.1.2.1.2.55 -r1.205.4.1.2.1.2.56 \
src/sys/arch/mips/mips/mips_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/mips/mips_machdep.c
diff -u src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.55 src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.56
--- src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.55	Tue Dec 13 07:34:29 2011
+++ src/sys/arch/mips/mips/mips_machdep.c	Fri Dec 23 22:45:27 2011
@@ -259,6 +259,8 @@ extern const mips_locore_jumpvec_t mips6
 void std_splsw_test(void);
 #endif
 
+CTASSERT(CPU_ARCH_MIPS64R2 / CPU_ARCH_MIPS64 == CPU_ARCH_MIPS32R2 / CPU_ARCH_MIPS32);
+
 mips_locore_jumpvec_t mips_locore_jumpvec;
 
 struct locoresw mips_locoresw;
@@ -471,6 +473,13 @@ static const struct pridtab cputab[] = {
 	  MIPS_CP0FL_CONFIG | MIPS_CP0FL_CONFIG1 | MIPS_CP0FL_CONFIG2 |
 	  MIPS_CP0FL_CONFIG3 | MIPS_CP0FL_CONFIG7,
 	  0, 34K },
+	{ MIPS_PRID_CID_MTI, MIPS_1004K, -1, -1,	-1, 0,
+	  MIPS32_FLAGS | CPU_MIPS_DOUBLE_COUNT,
+	  MIPS_CP0FL_USE |
+	  MIPS_CP0FL_EBASE | MIPS_CP0FL_USERLOCAL | MIPS_CP0FL_HWRENA |
+	  MIPS_CP0FL_CONFIG | MIPS_CP0FL_CONFIG1 | MIPS_CP0FL_CONFIG2 |
+	  MIPS_CP0FL_CONFIG3 | MIPS_CP0FL_CONFIG7,
+	  0, 1004K },
 	{ MIPS_PRID_CID_MTI, MIPS_74K, -1, -1,	-1, 0,
 	  MIPS32_FLAGS | CPU_MIPS_DOUBLE_COUNT,
 	  MIPS_CP0FL_USE |
@@ -478,13 +487,13 @@ static const struct pridtab cputab[] = {
 	  MIPS_CP0FL_CONFIG | MIPS_CP0FL_CONFIG1 | MIPS_CP0FL_CONFIG2 |
 	  MIPS_CP0FL_CONFIG3 | MIPS_CP0FL_CONFIG6 | MIPS_CP0FL_CONFIG7,
 	  0, 74K },
-	{ MIPS_PRID_CID_MTI, MIPS_1004K, -1, -1,	-1, 0,
+	{ MIPS_PRID_CID_MTI, MIPS_1074K, -1, -1,	-1, 0,
 	  MIPS32_FLAGS | CPU_MIPS_DOUBLE_COUNT,
 	  MIPS_CP0FL_USE |
 	  MIPS_CP0FL_EBASE | MIPS_CP0FL_USERLOCAL | MIPS_CP0FL_HWRENA |
 	  MIPS_CP0FL_CONFIG | MIPS_CP0FL_CONFIG1 | MIPS_CP0FL_CONFIG2 |
 	  MIPS_CP0FL_CONFIG3 | MIPS_CP0FL_CONFIG6 | MIPS_CP0FL_CONFIG7,
-	  0, 1004K },
+	  0, 1074K },
 
 	{ MIPS_PRID_CID_ALCHEMY, MIPS_AU_REV1, -1, MIPS_AU1000, -1, 0,
 	  MIPS32_FLAGS | CPU_MIPS_NO_WAIT | CPU_MIPS_I_D_CACHE_COHERENT, 0, 0,
@@ -616,6 +625,30 @@ static const struct pridtab cputab[] = {
 	  CIDFL_RMI_TYPE_XLS|MIPS_CIDFL_RMI_CPUS(1,4)|MIPS_CIDFL_RMI_L2(256KB),
 	  XLS104		},
 
+	{ MIPS_PRID_CID_RMI, MIPS_XLP3XX, -1, -1, -1, 0,
+	  MIPS64_FLAGS | CPU_MIPS_D_CACHE_COHERENT | CPU_MIPS_NO_LLADDR |
+	  CPU_MIPS_I_D_CACHE_COHERENT | CPU_MIPS_HAVE_MxCR,
+	  MIPS_CP0FL_USE |
+	  MIPS_CP0FL_EBASE | MIPS_CP0FL_USERLOCAL | MIPS_CP0FL_HWRENA |
+	  MIPS_CP0FL_EIRR | MIPS_CP0FL_EIMR |
+	  MIPS_CP0FL_CONFIG | MIPS_CP0FL_CONFIG1 | MIPS_CP0FL_CONFIG2 |
+	  MIPS_CP0FL_CONFIG3 | MIPS_CP0FL_CONFIG6 | MIPS_CP0FL_CONFIG7,
+	  CIDFL_RMI_TYPE_XLP | MIPS_CIDFL_RMI_CPUS(1,4) |
+	  MIPS_CIDFL_RMI_L2(512KB) | MIPS_CIDFL_RMI_L3(1MB),
+	  XLP3XX		},
+
+	{ MIPS_PRID_CID_RMI, MIPS_XLP8XX, -1, -1, -1, 0,
+	  MIPS64_FLAGS | CPU_MIPS_D_CACHE_COHERENT | CPU_MIPS_NO_LLADDR |
+	  CPU_MIPS_I_D_CACHE_COHERENT | CPU_MIPS_HAVE_MxCR,
+	  MIPS_CP0FL_USE |
+	  MIPS_CP0FL_EBASE | MIPS_CP0FL_USERLOCAL | MIPS_CP0FL_HWRENA |
+	  MIPS_CP0FL_EIRR | MIPS_CP0FL_EIMR |
+	  MIPS_CP0FL_CONFIG | MIPS_CP0FL_CONFIG1 | MIPS_CP0FL_CONFIG2 |
+	  MIPS_CP0FL_CONFIG3 | MIPS_CP0FL_CONFIG6 | MIPS_CP0FL_CONFIG7,
+	  CIDFL_RMI_TYPE_XLP | MIPS_CIDFL_RMI_CPUS(8,4) |
+	  MIPS_CIDFL_RMI_L2(512KB) | MIPS_CIDFL_RMI_L3(1MB),
+	  XLP8XX		},
+
 	{ 0, 0, 0,0, 0, 0,
 	  0, 0, 0,NULL			}
 };
@@ -1176,7 +1209,7 @@ mips_vector_init(const struct splsw *spl
 		case MIPSNN_CFG_AR_REV1:
 			break;
 		case MIPSNN_CFG_AR_REV2:
-			opts-mips_cpu_arch += CPU_ARCH_MIPS32R2 - CPU_ARCH_MIPS32;
+			opts-mips_cpu_arch *= CPU_ARCH_MIPS32R2 / CPU_ARCH_MIPS32;
 			break;
 		default:
 			printf(WARNING: MIPS32/64 arch revision %d 
@@ -1187,7 +1220,15 @@ mips_vector_init(const struct splsw *spl
 		/* figure out MMU type (and number of TLB entries) */
 		switch (MIPSNN_GET(CFG_MT, cfg)) {
 		case MIPSNN_CFG_MT_TLB:
-			opts-mips_num_tlb_entries = MIPSNN_CFG1_MS(cfg1);
+			/*
+			 * Use the larger value from TLB random instead or the
+			 * CFG1 value (in case the number of TLB entries
+			 * exceeds what can be encoded in CFG1).
+			 */
+			mips3_cp0_wired_write(0); /* force random to reset */
+			uint32_t cfg_ms = MIPSNN_CFG1_MS(cfg1);
+			uint32_t tlb_random = mips3_cp0_random_read() + 1;
+			opts-mips_num_tlb_entries = MAX(cfg_ms, tlb_random);
 			break;
 		case MIPSNN_CFG_MT_NONE:
 		case MIPSNN_CFG_MT_BAT:
@@ -1274,6 +1315,7 @@

CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 22:47:26 UTC 2011

Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: cache.c

Log Message:
Add code to deal SDcache settings in CFG2.
Add support for CFG7 handling for MTI cores.
Cleanup cache alias handling.


To generate a diff of this commit:
cvs rdiff -u -r1.33.96.7 -r1.33.96.8 src/sys/arch/mips/mips/cache.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/mips/cache.c
diff -u src/sys/arch/mips/mips/cache.c:1.33.96.7 src/sys/arch/mips/mips/cache.c:1.33.96.8
--- src/sys/arch/mips/mips/cache.c:1.33.96.7	Fri Nov  4 07:43:37 2011
+++ src/sys/arch/mips/mips/cache.c	Fri Dec 23 22:47:26 2011
@@ -374,9 +374,10 @@ mips_config_cache_prehistoric(void)
 
 		mips3_get_cache_config(csizebase);
 
-		if (mci-mci_picache_size  PAGE_SIZE ||
-		mci-mci_pdcache_size  PAGE_SIZE)
-			/* no VCE support if there is no L2 cache */
+		/* no VCE support if there is no L2 cache */
+		if (mci-mci_picache_size  PAGE_SIZE)
+			mci-mci_icache_virtual_alias = true;
+		if (mci-mci_pdcache_size  PAGE_SIZE)
 			mci-mci_cache_virtual_alias = true;
 
 		switch (mci-mci_picache_line_size) {
@@ -452,8 +453,9 @@ primary_cache_is_2way:
 
 		mips3_get_cache_config(csizebase);
 
-		if ((mci-mci_picache_size / mci-mci_picache_ways)  PAGE_SIZE ||
-		(mci-mci_pdcache_size / mci-mci_pdcache_ways)  PAGE_SIZE)
+		if (mci-mci_picache_size / mci-mci_picache_ways  PAGE_SIZE)
+			mci-mci_icache_virtual_alias = true;
+		if (mci-mci_pdcache_size / mci-mci_pdcache_ways  PAGE_SIZE)
 			mci-mci_cache_virtual_alias = true;
 
 		switch (mci-mci_picache_line_size) {
@@ -582,11 +584,17 @@ primary_cache_is_2way:
 		KASSERT(mci-mci_picache_ways != 0);
 		mci-mci_picache_way_size = (mci-mci_picache_size / mci-mci_picache_ways);
 		mci-mci_picache_way_mask = mci-mci_picache_way_size - 1;
+		if (mci-mci_icache_virtual_alias)
+			mci-mci_icache_alias_mask =
+			   mci-mci_picache_way_mask  -PAGE_SIZE;
 	}
 	if (mci-mci_pdcache_size) {
 		KASSERT(mci-mci_pdcache_ways != 0);
 		mci-mci_pdcache_way_size = (mci-mci_pdcache_size / mci-mci_pdcache_ways);
 		mci-mci_pdcache_way_mask = mci-mci_pdcache_way_size - 1;
+		if (mci-mci_cache_virtual_alias)
+			mci-mci_cache_alias_mask =
+			mci-mci_picache_way_mask  -PAGE_SIZE;
 	}
 
 	mips_dcache_compute_align();
@@ -621,7 +629,8 @@ primary_cache_is_2way:
 		(MIPS3_MAX_PCACHE_SIZE - 1)  ~PAGE_MASK;	/* va[14:12] */
 		mci-mci_cache_prefer_mask = MIPS3_MAX_PCACHE_SIZE - 1;
 
-		mci-mci_cache_virtual_alias = 0;
+		mci-mci_icache_virtual_alias = false;
+		mci-mci_cache_virtual_alias = false;
 		/* FALLTHROUGH */
 	case MIPS_R4600:
 #ifdef ENABLE_MIPS_R4700
@@ -825,8 +834,10 @@ mips3_get_cache_config(int csizebase)
 	mci-mci_pdcache_line_size = MIPS3_CONFIG_CACHE_L1_LSIZE(config,
 	MIPS3_CONFIG_DB);
 
+	mci-mci_icache_alias_mask =
+	(mci-mci_picache_size / mci-mci_picache_ways - 1)  -PAGE_SHIFT;
 	mci-mci_cache_alias_mask =
-	((mci-mci_pdcache_size / mci-mci_pdcache_ways) - 1)  ~PAGE_MASK;
+	(mci-mci_pdcache_size / mci-mci_pdcache_ways - 1)  -PAGE_SHIFT;
 	mci-mci_cache_prefer_mask =
 	max(mci-mci_pdcache_size, mci-mci_picache_size) - 1;
 	uvmexp.ncolors = (mci-mci_cache_alias_mask  PAGE_SHIFT) + 1;
@@ -895,6 +906,7 @@ mips_config_cache_modern(uint32_t cpu_id
 {
 	struct mips_cache_info * const mci = mips_cache_info;
 	struct mips_cache_ops * const mco = mips_cache_ops;
+	struct mips_options * const opts = mips_options;
 	/* MIPS32/MIPS64, use coprocessor 0 config registers */
 	uint32_t cfg, cfg1;
 
@@ -966,29 +978,29 @@ mips_config_cache_modern(uint32_t cpu_id
 
 #define CACHE_DEBUG
 #ifdef CACHE_DEBUG
-	printf(MIPS32/64 params: cpu arch: %d\n, mips_options.mips_cpu_arch);
-	printf(MIPS32/64 params: TLB entries: %d\n, mips_options.mips_num_tlb_entries);
+	printf(MIPS32/64 params: cpu arch: %d\n, opts-mips_cpu_arch);
+	printf(MIPS32/64 params: TLB entries: %d\n, opts-mips_num_tlb_entries);
 	if (mci-mci_picache_line_size == 0)
 		printf(MIPS32/64 params: no Icache\n);
 	else {
-		printf(MIPS32/64 params: Icache: line = %d, total = %d, 
-		ways = %d\n, mci-mci_picache_line_size,
+		printf(MIPS32/64 params: %s: line=%d, total=%d, 
+		ways=%d, sets=%d, colors=%d\n, Icache,
+		mci-mci_picache_line_size,
 		mci-mci_picache_way_size * mci-mci_picache_ways,
-		mci-mci_picache_ways);
-		printf(\t\t sets = %d\n, (mci-mci_picache_way_size *
-		mci-mci_picache_ways / mci-mci_picache_line_size) /
-		mci-mci_picache_ways);
+		mci-mci_picache_ways,
+		mci-mci_picache_way_size / mci-mci_picache_line_size,
+		mci-mci_picache_way_size  PAGE_SHIFT);
 	}
 	if (mci-mci_pdcache_line_size == 0)
 		printf(MIPS32/64 params: no Dcache\n);
 	else {
-		printf(MIPS32/64 params: Dcache: line = %d, total = %d, 
-		ways = %d\n, mci-mci_pdcache_line_size,
+		printf(MIPS32/64 params: %s: line=%d,

CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 22:48:07 UTC 2011

Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: genassym.cf

Log Message:
Add MIPS1_PG_SHIFT


To generate a diff of this commit:
cvs rdiff -u -r1.44.12.30 -r1.44.12.31 src/sys/arch/mips/mips/genassym.cf

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/mips/genassym.cf
diff -u src/sys/arch/mips/mips/genassym.cf:1.44.12.30 src/sys/arch/mips/mips/genassym.cf:1.44.12.31
--- src/sys/arch/mips/mips/genassym.cf:1.44.12.30	Sat Dec  3 01:56:55 2011
+++ src/sys/arch/mips/mips/genassym.cf	Fri Dec 23 22:48:07 2011
@@ -145,6 +145,7 @@ define	MIPSX_FLUSHICACHE	0
 define	PG_ASID			PG_ASID
 define	MIPS1_PG_G		MIPS1_PG_G
 define	MIPS1_PG_V		MIPS1_PG_V
+define	MIPS1_PG_SHIFT		MIPS1_PG_SHIFT
 define	MIPS3_PG_G		MIPS3_PG_G
 define	MIPS3_PG_V		MIPS3_PG_V
 define	MIPS3_PG_D		MIPS3_PG_D

CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 22:51:29 UTC 2011

Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: locore_mips3.S

Log Message:
Add mips3_cp0_random_read.
Add mipsNN_cp0_config{1-7}_{read,write}.


To generate a diff of this commit:
cvs rdiff -u -r1.93.38.13 -r1.93.38.14 src/sys/arch/mips/mips/locore_mips3.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/mips/locore_mips3.S
diff -u src/sys/arch/mips/mips/locore_mips3.S:1.93.38.13 src/sys/arch/mips/mips/locore_mips3.S:1.93.38.14
--- src/sys/arch/mips/mips/locore_mips3.S:1.93.38.13	Thu May 26 19:21:56 2011
+++ src/sys/arch/mips/mips/locore_mips3.S	Fri Dec 23 22:51:29 2011
@@ -234,7 +234,7 @@ END(mips3_cp0_config_write)
 
 #if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2 + MIPS64_RMIXL + MIPS64R2_RMIXL)  0
 	.set push
-#ifdef _LP64
+#if (MIPS64 + MIPS64R2 + MIPS64_RMIXL + MIPS64R2_RMIXL)  0
 	.set mips64
 #else
 	.set mips32
@@ -251,16 +251,6 @@ LEAF(mipsNN_cp0_config1_read)
 END(mipsNN_cp0_config1_read)
 
 /*
- * uint32_t mipsNN_cp0_config1_write(uint32_t)
- *
- *	Set the current value of the CP0 Config (Select 1) register.
- */
-LEAF(mipsNN_cp0_config1_write)
-	mtc0	v0, MIPS_COP_0_CONFIG, 1
-	JR_HB_RA
-END(mipsNN_cp0_config1_write)
-
-/*
  * uint32_t mipsNN_cp0_config2_read(void)
  *
  *	Return the current value of the CP0 Config (Select 2) register.
@@ -283,6 +273,145 @@ LEAF(mipsNN_cp0_config3_read)
 END(mipsNN_cp0_config3_read)
 
 /*
+ * uint32_t mipsNN_cp0_config4_read(void)
+ *
+ *	Return the current value of the CP0 Config (Select 4) register.
+ */
+LEAF(mipsNN_cp0_config4_read)
+	mfc0	v0, MIPS_COP_0_CONFIG, 4
+	j	ra
+	 nop
+END(mipsNN_cp0_config4_read)
+
+/*
+ * uint32_t mipsNN_cp0_config5_read(void)
+ *
+ *	Return the current value of the CP0 Config (Select 5) register.
+ */
+LEAF(mipsNN_cp0_config5_read)
+	mfc0	v0, MIPS_COP_0_CONFIG, 5
+	j	ra
+	 nop
+END(mipsNN_cp0_config5_read)
+
+/*
+ * uint32_t mipsNN_cp0_config6_read(void)
+ *
+ *	Return the current value of the CP0 Config (Select 6) register.
+ */
+LEAF(mipsNN_cp0_config6_read)
+	mfc0	v0, MIPS_COP_0_CONFIG, 6
+	j	ra
+	 nop
+END(mipsNN_cp0_config6_read)
+
+/*
+ * uint32_t mipsNN_cp0_config7_read(void)
+ *
+ *	Return the current value of the CP0 Config (Select 7) register.
+ */
+LEAF(mipsNN_cp0_config7_read)
+	mfc0	v0, MIPS_COP_0_CONFIG, 7
+	j	ra
+	 nop
+END(mipsNN_cp0_config7_read)
+
+#if (MIPS64 + MIPS64R2 + MIPS64_RMIXL + MIPS64R2_RMIXL)  0
+/*
+ * uint32_t mips64_cp0_config7_read(void)
+ *
+ *	Return the current value of the CP0 Config (Select 7) register.
+ */
+LEAF(mips64_cp0_config7_read)
+	dmfc0	v0, MIPS_COP_0_CONFIG, 7
+	j	ra
+	 nop
+END(mips64_cp0_config7_read)
+#endif
+
+/*
+ * uint32_t mipsNN_cp0_config1_write(uint32_t)
+ *
+ *	Set the current value of the CP0 Config (Select 1) register.
+ */
+LEAF(mipsNN_cp0_config1_write)
+	mtc0	a0, MIPS_COP_0_CONFIG, 1
+	JR_HB_RA
+END(mipsNN_cp0_config1_write)
+
+/*
+ * uint32_t mipsNN_cp0_config2_write(uint32_t)
+ *
+ *	Set the current value of the CP0 Config (Select 2) register.
+ */
+LEAF(mipsNN_cp0_config2_write)
+	mtc0	a0, MIPS_COP_0_CONFIG, 2
+	JR_HB_RA
+END(mipsNN_cp0_config2_write)
+
+/*
+ * uint32_t mipsNN_cp0_config3_write(uint32_t)
+ *
+ *	Set the current value of the CP0 Config (Select 3) register.
+ */
+LEAF(mipsNN_cp0_config3_write)
+	mtc0	a0, MIPS_COP_0_CONFIG, 3
+	JR_HB_RA
+END(mipsNN_cp0_config3_write)
+
+/*
+ * uint32_t mipsNN_cp0_config4_write(uint32_t)
+ *
+ *	Set the current value of the CP0 Config (Select 4) register.
+ */
+LEAF(mipsNN_cp0_config4_write)
+	mtc0	a0, MIPS_COP_0_CONFIG, 4
+	JR_HB_RA
+END(mipsNN_cp0_config4_write)
+
+/*
+ * uint32_t mipsNN_cp0_config5_write(uint32_t)
+ *
+ *	Set the current value of the CP0 Config (Select 5) register.
+ */
+LEAF(mipsNN_cp0_config5_write)
+	mtc0	a0, MIPS_COP_0_CONFIG, 5
+	JR_HB_RA
+END(mipsNN_cp0_config5_write)
+
+/*
+ * uint32_t mipsNN_cp0_config6_write(uint32_t)
+ *
+ *	Set the current value of the CP0 Config (Select 6) register.
+ */
+LEAF(mipsNN_cp0_config6_write)
+	mtc0	a0, MIPS_COP_0_CONFIG, 6
+	JR_HB_RA
+END(mipsNN_cp0_config6_write)
+
+/*
+ * uint32_t mipsNN_cp0_config7_write(uint32_t)
+ *
+ *	Set the current value of the CP0 Config (Select 7) register.
+ */
+LEAF(mipsNN_cp0_config7_write)
+	mtc0	a0, MIPS_COP_0_CONFIG, 7
+	JR_HB_RA
+END(mipsNN_cp0_config7_write)
+
+#if (MIPS64 + MIPS64R2 + MIPS64_RMIXL + MIPS64R2_RMIXL)  0
+/*
+ * uint32_t mips64_cp0_config7_write(uint32_t)
+ *
+ *	Set the current value of the CP0 Config (Select 7) register.
+ */
+LEAF(mips64_cp0_config7_write)
+	dmtc0	a0, MIPS_COP_0_CONFIG, 7
+	JR_HB_RA
+END(mips64_cp0_config7_write)
+#endif
+
+/*
  * uintptr_t mipsNN_cp0_watchlo_read(u_int sel)
  *
  *	Return the current value of the selected CP0 Watchlo register.
@@ -447,6 +576,17 @@ LEAF(mips3_cp0_count_write)
 END(mips3_cp0_count_write)
 
 /*
+ * uint32_t mips3_cp0_random_read(void)
+ *
+ *	Return

CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 23:12:08 UTC 2011

Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: mips_machdep.c

Log Message:
Fix MIPS1 typo.


To generate a diff of this commit:
cvs rdiff -u -r1.205.4.1.2.1.2.56 -r1.205.4.1.2.1.2.57 \
src/sys/arch/mips/mips/mips_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/mips/mips_machdep.c
diff -u src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.56 src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.57
--- src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.56	Fri Dec 23 22:45:27 2011
+++ src/sys/arch/mips/mips/mips_machdep.c	Fri Dec 23 23:12:08 2011
@@ -1315,7 +1315,7 @@ mips_vector_init(const struct splsw *spl
 	switch (opts-mips_cpu_arch) {
 #if defined(MIPS1)
 	case CPU_ARCH_MIPS1:
-		opts-mips_num_tlb_asids = MIPS1_NUM_TLB_PIDS;
+		opts-mips_num_tlb_asids = MIPS1_TLB_NUM_PIDS;
 		(*mips1_locore_vec.ljv_tlb_invalidate_all)();
 		mips1_vector_init(splsw);
 		mips_locoresw = mips1_locoresw;

CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 23:12:34 UTC 2011

Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: locore_mips1.S

Log Message:
Add support for 4KB pages.


To generate a diff of this commit:
cvs rdiff -u -r1.64.26.1.2.13 -r1.64.26.1.2.14 \
src/sys/arch/mips/mips/locore_mips1.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/mips/locore_mips1.S
diff -u src/sys/arch/mips/mips/locore_mips1.S:1.64.26.1.2.13 src/sys/arch/mips/mips/locore_mips1.S:1.64.26.1.2.14
--- src/sys/arch/mips/mips/locore_mips1.S:1.64.26.1.2.13	Fri Apr 29 08:26:26 2011
+++ src/sys/arch/mips/mips/locore_mips1.S	Fri Dec 23 23:12:34 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore_mips1.S,v 1.64.26.1.2.13 2011/04/29 08:26:26 matt Exp $	*/
+/*	$NetBSD: locore_mips1.S,v 1.64.26.1.2.14 2011/12/23 23:12:34 matt Exp $	*/
 
 /*
  * Copyright (c) 1992, 1993
@@ -104,21 +104,28 @@ VECTOR(MIPSX(utlb_miss), unknown)
 	andi	k0, (NBPG-4)			#0d: k0=page table offset
 	PTR_ADDU k1, k0#0e: k1=pte address
 	INT_L	k0, 0(k1)			#0f: k0=lo0 pte
+#if PGSHIFT  MIPS1_PG_SHIFT
+	_MFC0	k1, MIPS_COP_0_BAD_VADDR	#10: k1=bad address (again)
+	beqz	k0, MIPSX(invalidpte)		#11: dont load invalid entries
+	 andi	k1, (NBPG-4096)			#12: intra page offset
+	PTR_ADDU k0, k1#13: add to pte
+#else
 	nop	#10: load delay
 	beqz	k0, MIPSX(invalidpte)		#11: dont load invalid entries
 	 nop	#12  branch delay
-	mtc0	k0, MIPS_COP_0_TLB_LOW		#13: lo0 is loaded
-	nop	#14: load delay
-	tlbwr	#15: update TLB
+#endif
+	mtc0	k0, MIPS_COP_0_TLB_LOW		#14: lo0 is loaded
+	nop	#15: load delay
+	tlbwr	#16: update TLB
 1:
-	_MFC0	k1, MIPS_COP_0_EXC_PC		#16: get return address
-	nop	#17: load delay
-	j	k1#18: return from
-	 rfe	#19:exception
+	_MFC0	k1, MIPS_COP_0_EXC_PC		#17: get return address
+	nop	#18: load delay
+	j	k1#10: return from
+	 rfe	#1a:exception
 MIPSX(nopagetable):
 MIPSX(invalidpte):
-	j	MIPSX(slowfault)		#1a: handle the rest
-	 nop	#1b: branch delay
+	j	MIPSX(slowfault)		#1b: handle the rest
+	 nop	#1c: branch delay
 	.set	at
 VECTOR_END(MIPSX(utlb_miss))
 
@@ -1018,6 +1025,12 @@ LEAF_NOPROFILE(MIPSX(kern_tlb_miss))
 	PTR_SLL	k0, 2# compute offset from index
 	PTR_ADDU k1, k0
 	INT_L	k0, 0(k1)			# get PTE entry
+#if PGSHIFT  MIPS1_PG_SHIFT
+	mfc0	k1, MIPS_COP_0_BAD_VADDR	# get bad address (again)
+	nop	# - delay slot -
+	andi	k1, (NBPG-4096)			# get intrapage offset
+	PTR_ADDU k0, k1# add to PTE
+#endif
 	_MFC0	k1, MIPS_COP_0_EXC_PC		# get return address
 	mtc0	k0, MIPS_COP_0_TLB_LOW		# save PTE entry
 	and	k0, MIPS1_PG_V			# check for valid PTE entry
@@ -1105,11 +1118,11 @@ END(MIPSX(tlb_set_asid))
 
 /*--
  *
- * mipsN_tlb_update --
+ * mipsN_tlb_update_addr --
  *
  *	Update the TLB if highreg is found; otherwise, do_nothing
  *
- *	int mipsN_tlb_update(vaddr_t va, register_t lowreg)
+ *	int mipsN_tlb_update_addr(vaddr_t va, register_t lowreg)
  *
  * Results:
  *	 0 if skipped, = 0 if updated
@@ -1119,12 +1132,16 @@ END(MIPSX(tlb_set_asid))
  *
  *--
  */
-LEAF(MIPSX(tlb_update))
+LEAF(MIPSX(tlb_update_addr))
 	mfc0	v1, MIPS_COP_0_STATUS		# save the status register
 	mtc0	zero, MIPS_COP_0_STATUS		# disable interrupts
 	nop
 	mfc0	t0, MIPS_COP_0_TLB_HI		# save current PID
 	nop
+#if PGSHIFT  MIPS1_PG_SHIFT
+	li	a2, -NBPG
+#endif
+1:
 	mtc0	a0, MIPS_COP_0_TLB_HI		# set entryhi
 	nop
 	tlbp	# probe the existence
@@ -1134,10 +1151,21 @@ LEAF(MIPSX(tlb_update))
 	 nop
 	tlbwi	# update slot found
 2:
+#if PGSHIFT  MIPS1_PG_SHIFT
+	/*
+	 * Each page could be mapped by multiple TLB entries so we need
+	 * to check each possibile address.
+	 */
+	PTR_ADDU a2, 1  MIPS1_PG_SHIFT
+	PTR_ADDU a1, 1  MIPS1_PG_SHIFT
+	bltz	a2, 1b
+	 PTR_ADDU a0, 1  MIPS1_PG_SHIFT
+#endif
+	
 	mtc0	t0, MIPS_COP_0_TLB_HI		# restore current PID
 	j	ra
 	mtc0	v1, MIPS_COP_0_STATUS
-END(MIPSX(tlb_update))
+END(MIPSX(tlb_update_addr))
 
 /*--
  *
@@ -1217,20 +1245,33 @@ LEAF(MIPSX(tlb_invalidate_addr))
 	mfc0	v1, MIPS_COP_0_STATUS		# save status register
 	mtc0	zero, MIPS_COP_0_STATUS		# disable interrupts
 	mfc0	t0, MIPS_COP_0_TLB_HI		# save current PID
-	nop
-
+	li	t1, MIPS_KSEG0_START		# load invalid address (delay)
+#if PGSHIFT  MIPS1_PG_SHIFT
+	li	a2, -NBPG
+#endif
+1:
 	mtc0	a0, MIPS_COP_0_TLB_HI		# look for addr  PID
 	nop
 	tlbp	# probe the entry in question
-	mfc0	a0, MIPS_COP_0_TLB_INDEX	# see what we got
-	li	t1, MIPS_KSEG0_START		# load invalid address
-	bltz	a0, 1f# index  0 then skip
+	mfc0	a1, MIPS_COP_0_TLB_INDEX	# see what we got
+	nop
+	bltz	a1, 2f# index  0 then skip
 	 nop
 	mtc0	t1, MIPS_COP_0_TLB_HI		# make entryHi invalid

CVS commit: [matt-nb5-mips64] src/sys/arch

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 23:24:44 UTC 2011

Modified Files:
src/sys/arch/algor/algor [matt-nb5-mips64]: cpu.c
src/sys/arch/arc/arc [matt-nb5-mips64]: cpu.c
src/sys/arch/cobalt/cobalt [matt-nb5-mips64]: cpu.c
src/sys/arch/evbmips/evbmips [matt-nb5-mips64]: cpu.c
src/sys/arch/ews4800mips/ews4800mips [matt-nb5-mips64]: cpu.c
src/sys/arch/hpcmips/hpcmips [matt-nb5-mips64]: cpu.c
src/sys/arch/mipsco/mipsco [matt-nb5-mips64]: cpu.c
src/sys/arch/newsmips/newsmips [matt-nb5-mips64]: cpu.c
src/sys/arch/pmax/pmax [matt-nb5-mips64]: cpu.c
src/sys/arch/sbmips/sbmips [matt-nb5-mips64]: cpu.c
src/sys/arch/sgimips/sgimips [matt-nb5-mips64]: cpu.c

Log Message:
Change usage to cpu_identify(self, NULL);


To generate a diff of this commit:
cvs rdiff -u -r1.6.96.1 -r1.6.96.2 src/sys/arch/algor/algor/cpu.c
cvs rdiff -u -r1.16.14.1 -r1.16.14.2 src/sys/arch/arc/arc/cpu.c
cvs rdiff -u -r1.10.16.1 -r1.10.16.2 src/sys/arch/cobalt/cobalt/cpu.c
cvs rdiff -u -r1.2.4.3 -r1.2.4.4 src/sys/arch/evbmips/evbmips/cpu.c
cvs rdiff -u -r1.3.22.1 -r1.3.22.2 src/sys/arch/ews4800mips/ews4800mips/cpu.c
cvs rdiff -u -r1.15.28.2 -r1.15.28.3 src/sys/arch/hpcmips/hpcmips/cpu.c
cvs rdiff -u -r1.7.96.1 -r1.7.96.2 src/sys/arch/mipsco/mipsco/cpu.c
cvs rdiff -u -r1.11.96.1 -r1.11.96.2 src/sys/arch/newsmips/newsmips/cpu.c
cvs rdiff -u -r1.24.96.1 -r1.24.96.2 src/sys/arch/pmax/pmax/cpu.c
cvs rdiff -u -r1.18.16.9 -r1.18.16.10 src/sys/arch/sbmips/sbmips/cpu.c
cvs rdiff -u -r1.21.36.4 -r1.21.36.5 src/sys/arch/sgimips/sgimips/cpu.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/algor/algor/cpu.c
diff -u src/sys/arch/algor/algor/cpu.c:1.6.96.1 src/sys/arch/algor/algor/cpu.c:1.6.96.2
--- src/sys/arch/algor/algor/cpu.c:1.6.96.1	Wed Jan 13 21:16:12 2010
+++ src/sys/arch/algor/algor/cpu.c	Fri Dec 23 23:24:43 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpu.c,v 1.6.96.1 2010/01/13 21:16:12 matt Exp $	*/
+/*	$NetBSD: cpu.c,v 1.6.96.2 2011/12/23 23:24:43 matt Exp $	*/
 
 /*
  * Copyright (c) 1994, 1995 Carnegie-Mellon University.
@@ -28,7 +28,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: cpu.c,v 1.6.96.1 2010/01/13 21:16:12 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: cpu.c,v 1.6.96.2 2011/12/23 23:24:43 matt Exp $);
 
 #include sys/param.h
 #include sys/device.h
@@ -64,5 +64,5 @@ cpu_attach(device_t parent, device_t sel
 	self-dv_private = ci;
 
 	aprint_normal(: );
-	cpu_identify(self);
+	cpu_identify(self, NULL);
 }

Index: src/sys/arch/arc/arc/cpu.c
diff -u src/sys/arch/arc/arc/cpu.c:1.16.14.1 src/sys/arch/arc/arc/cpu.c:1.16.14.2
--- src/sys/arch/arc/arc/cpu.c:1.16.14.1	Wed Jan 13 21:16:13 2010
+++ src/sys/arch/arc/arc/cpu.c	Fri Dec 23 23:24:43 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpu.c,v 1.16.14.1 2010/01/13 21:16:13 matt Exp $	*/
+/*	$NetBSD: cpu.c,v 1.16.14.2 2011/12/23 23:24:43 matt Exp $	*/
 /*	$OpenBSD: cpu.c,v 1.8 1997/04/19 17:19:41 pefo Exp $ */
 
 /*
@@ -34,7 +34,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: cpu.c,v 1.16.14.1 2010/01/13 21:16:13 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: cpu.c,v 1.16.14.2 2011/12/23 23:24:43 matt Exp $);
 
 #include sys/param.h
 #include sys/systm.h
@@ -79,5 +79,5 @@ cpuattach(device_t parent, device_t self
 
 	aprint_normal(: );
 
-	cpu_identify(self);
+	cpu_identify(self, NULL);
 }

Index: src/sys/arch/cobalt/cobalt/cpu.c
diff -u src/sys/arch/cobalt/cobalt/cpu.c:1.10.16.1 src/sys/arch/cobalt/cobalt/cpu.c:1.10.16.2
--- src/sys/arch/cobalt/cobalt/cpu.c:1.10.16.1	Wed Jan 13 21:16:13 2010
+++ src/sys/arch/cobalt/cobalt/cpu.c	Fri Dec 23 23:24:43 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpu.c,v 1.10.16.1 2010/01/13 21:16:13 matt Exp $	*/
+/*	$NetBSD: cpu.c,v 1.10.16.2 2011/12/23 23:24:43 matt Exp $	*/
 
 /*
  * Copyright (c) 1994, 1995 Carnegie-Mellon University.
@@ -28,7 +28,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: cpu.c,v 1.10.16.1 2010/01/13 21:16:13 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: cpu.c,v 1.10.16.2 2011/12/23 23:24:43 matt Exp $);
 
 #include sys/param.h
 #include sys/device.h
@@ -62,5 +62,5 @@ cpu_attach(device_t parent, device_t sel
 	self-dv_private = ci;
 
 	aprint_normal(: );
-	cpu_identify(self);
+	cpu_identify(self, NULL);
 }

Index: src/sys/arch/evbmips/evbmips/cpu.c
diff -u src/sys/arch/evbmips/evbmips/cpu.c:1.2.4.3 src/sys/arch/evbmips/evbmips/cpu.c:1.2.4.4
--- src/sys/arch/evbmips/evbmips/cpu.c:1.2.4.3	Thu Mar 11 08:19:41 2010
+++ src/sys/arch/evbmips/evbmips/cpu.c	Fri Dec 23 23:24:43 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpu.c,v 1.2.4.3 2010/03/11 08:19:41 matt Exp $	*/
+/*	$NetBSD: cpu.c,v 1.2.4.4 2011/12/23 23:24:43 matt Exp $	*/
 
 /*
  * Copyright 2002 Wasabi Systems, Inc.
@@ -36,7 +36,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: cpu.c,v 1.2.4.3 2010/03/11 08:19:41 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: cpu.c,v 1.2.4.4

CVS commit: [matt-nb5-mips64] src/sys/arch/pmax/pmax

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 23:25:43 UTC 2011

Modified Files:
src/sys/arch/pmax/pmax [matt-nb5-mips64]: machdep.c

Log Message:
Update to new world order.  GENERIC boots on gxemul 3max emulation.


To generate a diff of this commit:
cvs rdiff -u -r1.223.8.1.2.9 -r1.223.8.1.2.10 \
src/sys/arch/pmax/pmax/machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/pmax/pmax/machdep.c
diff -u src/sys/arch/pmax/pmax/machdep.c:1.223.8.1.2.9 src/sys/arch/pmax/pmax/machdep.c:1.223.8.1.2.10
--- src/sys/arch/pmax/pmax/machdep.c:1.223.8.1.2.9	Wed Dec 29 00:22:01 2010
+++ src/sys/arch/pmax/pmax/machdep.c	Fri Dec 23 23:25:42 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: machdep.c,v 1.223.8.1.2.9 2010/12/29 00:22:01 matt Exp $	*/
+/*	$NetBSD: machdep.c,v 1.223.8.1.2.10 2011/12/23 23:25:42 matt Exp $	*/
 
 /*
  * Copyright (c) 1992, 1993
@@ -77,7 +77,7 @@
  */
 
 #include sys/cdefs.h			/* RCS ID  Copyright macro defns */
-__KERNEL_RCSID(0, $NetBSD: machdep.c,v 1.223.8.1.2.9 2010/12/29 00:22:01 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: machdep.c,v 1.223.8.1.2.10 2011/12/23 23:25:42 matt Exp $);
 
 #include fs_mfs.h
 #include opt_ddb.h
@@ -149,14 +149,6 @@ phys_ram_seg_t	mem_clusters[VM_PHYSSEG_M
  * that is safe for use on the interrupt stack; it can be made
  * higher to block network software interrupts after panics.
  */
-/*
- * safepri is a safe priority for sleep to set for a spin-wait
- * during autoconfiguration or after a panic.
- * Used as an argument to splx().
- * XXX disables interrupt 5 to disable mips3 on-chip clock, which also
- * disables mips1 FPU interrupts.
- */
-int	safepri = MIPS3_PSL_LOWIPL;	/* XXX */
 
 void	mach_init(int, int32_t *, int, intptr_t, u_int, char *); /* XXX */
 
@@ -284,7 +276,7 @@ mach_init(int argc, int32_t *argv32, int
 	 * Initialize locore-function vector.
 	 * Clear out the I and D caches.
 	 */
-	mips_vector_init(NULL);
+	mips_vector_init(NULL, false);
 
 	/*
 	 * We know the CPU type now.  Initialize our DMA tags (might
@@ -505,9 +497,10 @@ lookup_bootinfo(int type)
 void
 cpu_reboot(int howto, char *bootstr)
 {
+	struct pcb * const pcb = lwp_getpcb(curlwp);
 
 	/* take a snap shot before clobbering any registers */
-	savectx(curlwp-l_addr);
+	savectx(pcb);
 
 #ifdef DEBUG
 	if (panicstr)

CVS commit: [matt-nb5-mips64] src/sys/arch/evbmips/conf

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 23:32:51 UTC 2011

Modified Files:
src/sys/arch/evbmips/conf [matt-nb5-mips64]: files.rmixl

Log Message:
Include sdmmc files.


To generate a diff of this commit:
cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/evbmips/conf/files.rmixl

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/evbmips/conf/files.rmixl
diff -u src/sys/arch/evbmips/conf/files.rmixl:1.1.2.5 src/sys/arch/evbmips/conf/files.rmixl:1.1.2.6
--- src/sys/arch/evbmips/conf/files.rmixl:1.1.2.5	Fri Feb  5 07:39:52 2010
+++ src/sys/arch/evbmips/conf/files.rmixl	Fri Dec 23 23:32:51 2011
@@ -1,4 +1,4 @@
-#	$NetBSD: files.rmixl,v 1.1.2.5 2010/02/05 07:39:52 matt Exp $
+#	$NetBSD: files.rmixl,v 1.1.2.6 2011/12/23 23:32:51 matt Exp $
 
 file	arch/evbmips/rmixl/autoconf.c
 file	arch/evbmips/rmixl/machdep.c
@@ -30,6 +30,9 @@ include dev/pckbport/files.pckbport
 # Machine-independent USB device support
 include dev/usb/files.usb
 
+# Machine-independent SD/MMC support
+include dev/sdmmc/files.sdmmc
+
 # Memory Disk
 file	dev/md_root.cmemory_disk_hooks

CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Fri Dec 23 23:40:00 UTC 2011

Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: mipsX_subr.S

Log Message:
Rework the tlb routines to more consistend on register usage.
Always try to keep TLB_INDEX invalid (to cause unintended tlbwi to fail).


To generate a diff of this commit:
cvs rdiff -u -r1.26.36.1.2.51 -r1.26.36.1.2.52 \
src/sys/arch/mips/mips/mipsX_subr.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/mips/mipsX_subr.S
diff -u src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1.2.51 src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1.2.52
--- src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1.2.51	Tue Dec 13 07:14:51 2011
+++ src/sys/arch/mips/mips/mipsX_subr.S	Fri Dec 23 23:40:00 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: mipsX_subr.S,v 1.26.36.1.2.51 2011/12/13 07:14:51 matt Exp $	*/
+/*	$NetBSD: mipsX_subr.S,v 1.26.36.1.2.52 2011/12/23 23:40:00 matt Exp $	*/
 
 /*
  * Copyright 2002 Wasabi Systems, Inc.
@@ -1538,14 +1538,21 @@ NESTED_NOPROFILE(MIPSX(cache_exception),
 	PTR_LA	k0, panic			# return to panic
 	PTR_LA	a0, 9f# panicstr
 	_MFC0	a1, MIPS_COP_0_ERROR_PC
-#if (MIPS64_RMIXL + MIPS64R2_RMIXL)  0
-	.set	push
-	.set	arch=xlr
+#if (MIPS64_RMIXL)  0
 	li	k1, 0x309	/* L1D_CACHE_ERROR_LOG */
 	mfcr	a2, k1
 	li	k1, 0x30b	/* L1D_CACHE_INTERRUPT */
 	mfcr	a3, k1
-	.set	pop
+#if defined(__mips_o32)
+#error O32 not supported.
+#endif
+	mfc0	a4, MIPS_COP_0_STATUS
+	mfc0	a5, MIPS_COP_0_CAUSE
+#elif (MIPS64R2_RMIXL)  0
+	li	k1, 0x308	/* LSU_CERR_LOG0 */
+	mfcr	a3, k1
+	li	k1, 0x309	/* LSU_CERR_LOG1 */
+	mfcr	a2, k1
 #if defined(__mips_o32)
 #error O32 not supported.
 #endif
@@ -1567,8 +1574,8 @@ NESTED_NOPROFILE(MIPSX(cache_exception),
 
 	eret
 
-#if defined(MIPS64_XLS)
-	MSG(cache error @ EPC %#lx\nL1D_CACHE_ERROR_LOG %#lx\nL1D_CACHE_INTERRUPT %#lx\nstatus %#x, cause %#x);
+#if (MIPS64_RMIXL + MIPS64R2_RMIXL)  0
+	MSG(cache error @ EPC %#llx\nL1D_CACHE_ERROR_LOG %#llx\nL1D_CACHE_INTERRUPT %#lx\nstatus %#x, cause %#x);
 #else
 	MSG(cache error @ EPC 0x%x ErrCtl 0x%x CacheErr 0x%x);
 #endif
@@ -1915,7 +1922,7 @@ LEAF(MIPSX(tlb_update_addr))
 #endif
 	li	v0, (MIPS3_PG_HVPN | MIPS3_PG_ASID)
 	and	a0, a0, v0
-	_MFC0	t0, MIPS_COP_0_TLB_HI		# Save current PID
+	_MFC0	t0, MIPS_COP_0_TLB_HI		# Save current ASID
 	_MTC0	a0, MIPS_COP_0_TLB_HI		# Init high reg
 	COP0_SYNC
 	and	a2, a1, MIPS3_PG_G		# Copy global bit
@@ -1972,7 +1979,7 @@ LEAF(MIPSX(tlb_update_addr))
 	nop	# use the TLB.
 	nop
 #endif
-	_MTC0	t0, MIPS_COP_0_TLB_HI		# restore PID
+	_MTC0	t0, MIPS_COP_0_TLB_HI		# restore ASID
 	COP0_SYNC
 #if defined(MULTIPROCESSOR)  (MIPS64_RMIXL + MIPS64R2_RMIXL)  0
 	INT_S	zero, 0(ta3)
@@ -2008,33 +2015,35 @@ LEAF(MIPSX(tlb_read_indexed))
 	bnez	v0, 1b
 	 nop
 #endif
-	mfc0	ta2, MIPS_COP_0_TLB_PG_MASK	# save current pgMask
+	_MFC0	ta0, MIPS_COP_0_TLB_HI		# Get current ASID
+	mfc0	ta1, MIPS_COP_0_TLB_PG_MASK	# save current pgMask
+	mfc0	ta2, MIPS_COP_0_TLB_INDEX	# save the index register
 #ifdef MIPS3
 	nop
 #endif
-	_MFC0	t0, MIPS_COP_0_TLB_HI		# Get current PID
 
 	mtc0	a0, MIPS_COP_0_TLB_INDEX	# Set the index register
 	COP0_SYNC
 	tlbr	# Read from the TLB
 	COP0_SYNC
-	mfc0	t2, MIPS_COP_0_TLB_PG_MASK	# fetch the pgMask
-	_MFC0	t3, MIPS_COP_0_TLB_HI		# fetch the hi entry
-	_MFC0	ta0, MIPS_COP_0_TLB_LO0		# See what we got
-	_MFC0	ta1, MIPS_COP_0_TLB_LO1		# See what we got
-	_MTC0	t0, MIPS_COP_0_TLB_HI		# restore PID
-	mtc0	ta2, MIPS_COP_0_TLB_PG_MASK	# restore pgMask
+	mfc0	t3, MIPS_COP_0_TLB_PG_MASK	# fetch the pgMask
+	_MFC0	t2, MIPS_COP_0_TLB_HI		# fetch the hi entry
+	_MFC0	t1, MIPS_COP_0_TLB_LO1		# See what we got
+	_MFC0	t0, MIPS_COP_0_TLB_LO0		# See what we got
+	_MTC0	ta0, MIPS_COP_0_TLB_HI		# restore ASID
+	mtc0	ta1, MIPS_COP_0_TLB_PG_MASK	# restore pgMask
+	mtc0	ta2, MIPS_COP_0_TLB_INDEX	# make sure index is invalid
 	COP0_SYNC
 #if defined(MULTIPROCESSOR)  (MIPS64_RMIXL + MIPS64R2_RMIXL)  0
 	INT_S	zero, 0(ta3)			# unlock the tlb
 #endif
 	mtc0	v1, MIPS_COP_0_STATUS		# Restore the status register
 	COP0_SYNC
-	PTR_S	t3, TLBMASK_HI(a1)
-	INT_S	ta0, TLBMASK_LO0(a1)
-	INT_S	ta1, TLBMASK_LO1(a1)
+	PTR_S	t2, TLBMASK_HI(a1)
+	INT_S	t1, TLBMASK_LO1(a1)
+	INT_S	t0, TLBMASK_LO0(a1)
 	j	ra
-	 INT_S	t2, TLBMASK_MASK(a1)
+	 INT_S	t3, TLBMASK_MASK(a1)
 END(MIPSX(tlb_read_indexed))
 
 /*--
@@ -2057,19 +2066,24 @@ LEAF_NOPROFILE(MIPSX(tlb_invalidate_addr
 #endif
 
 	li	v0, (MIPS3_PG_HVPN | MIPS3_PG_ASID)
-	_MFC0	t0, MIPS_COP_0_TLB_HI		# save current ASID
-	mfc0	t3, MIPS_COP_0_TLB_PG_MASK	# save current pgMask
+	_MFC0	ta0, MIPS_COP_0_TLB_HI		# save current ASID
+	mfc0	ta1, MIPS_COP_0_TLB_PG_MASK	# save current pgMask
+	mfc0	ta2, MIPS_COP_0_TLB_INDEX	# see what we got
 	and	a0, v0# make sure valid entryHi
 	_MTC0	a0, MIPS_COP_0_TLB_HI		# look for the vaddr  ASID
 	COP0_SYNC

CVS commit: [matt-nb5-mips64] src/distrib/evbmips/instkernel/ramdisk

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Sat Dec 24 00:45:01 UTC 2011

Modified Files:
src/distrib/evbmips/instkernel/ramdisk [matt-nb5-mips64]: Makefile

Log Message:
Add ld0/ld1 to list of devices to make


To generate a diff of this commit:
cvs rdiff -u -r1.2.24.1 -r1.2.24.2 \
src/distrib/evbmips/instkernel/ramdisk/Makefile

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/distrib/evbmips/instkernel/ramdisk/Makefile
diff -u src/distrib/evbmips/instkernel/ramdisk/Makefile:1.2.24.1 src/distrib/evbmips/instkernel/ramdisk/Makefile:1.2.24.2
--- src/distrib/evbmips/instkernel/ramdisk/Makefile:1.2.24.1	Wed Aug 26 05:36:57 2009
+++ src/distrib/evbmips/instkernel/ramdisk/Makefile	Sat Dec 24 00:45:00 2011
@@ -1,4 +1,4 @@
-#	$NetBSD: Makefile,v 1.2.24.1 2009/08/26 05:36:57 matt Exp $
+#	$NetBSD: Makefile,v 1.2.24.2 2011/12/24 00:45:00 matt Exp $
 
 .include bsd.own.mk
 .include ${NETBSDSRCDIR}/distrib/common/Makefile.distrib
@@ -27,6 +27,7 @@ IMAGEDEPENDS=	${CRUNCHBIN} \
 		${NETBSDSRCDIR}/distrib/common/services
 
 MAKEDEVTARGETS= std md0 wd0 wd1 wd2 wd3 cd0 cd1 sd0 sd1 sd2 sd3 st0 pty0 ttyv0
+MAKEDEVTARGETS+= ld0 ld1
 
 # Use stubs to eliminate some large stuff from libc
 HACKSRC=	${DISTRIBDIR}/utils/libhack

CVS commit: [matt-nb5-mips64] src/distrib/evbmips/instkernel/ramdisk

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Sat Dec 24 00:45:25 UTC 2011

Modified Files:
src/distrib/evbmips/instkernel/ramdisk [matt-nb5-mips64]: list

Log Message:
Add date, ps, sysctl, and vmstat


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.3.8.1 src/distrib/evbmips/instkernel/ramdisk/list

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/distrib/evbmips/instkernel/ramdisk/list
diff -u src/distrib/evbmips/instkernel/ramdisk/list:1.3 src/distrib/evbmips/instkernel/ramdisk/list:1.3.8.1
--- src/distrib/evbmips/instkernel/ramdisk/list:1.3	Tue May  6 15:32:06 2008
+++ src/distrib/evbmips/instkernel/ramdisk/list	Sat Dec 24 00:45:25 2011
@@ -1,10 +1,11 @@
-#	$NetBSD: list,v 1.3 2008/05/06 15:32:06 dyoung Exp $
+#	$NetBSD: list,v 1.3.8.1 2011/12/24 00:45:25 matt Exp $
 
 SRCDIRS	bin sbin usr.bin/less usr.bin usr.sbin gnu/usr.bin
 
 PROG	bin/cat
 PROG	bin/chmod
 PROG	bin/cp
+PROG	bin/date
 PROG	bin/dd
 PROG	bin/df
 PROG	bin/ed
@@ -13,6 +14,7 @@ PROG	bin/ls
 PROG	bin/mkdir
 PROG	bin/mv
 PROG	bin/pax		usr/bin/tar
+PROG	bin/ps
 PROG	bin/pwd
 PROG	bin/rm
 PROG	bin/rmdir
@@ -40,6 +42,7 @@ PROG	sbin/route
 PROG	sbin/shutdown
 PROG	sbin/slattach
 PROG	sbin/swapctl
+PROG	sbin/sysctl
 PROG	sbin/umount
 
 PROG	usr/bin/ftp
@@ -47,13 +50,14 @@ PROG	usr/bin/gzip	usr/bin/gunzip usr/bin
 PROG	usr/bin/less	usr/bin/more
 PROG	usr/bin/sed
 PROG	usr/bin/tset
+PROG	usr/bin/vmstat
 
 PROG	usr/sbin/chown	usr/bin/chgrp
 PROG	usr/sbin/chroot
 
 SPECIAL	ping	srcdir	distrib/utils/x_ping
 
-LIBS	libhack.o -lbz2 -ledit -lutil -lcurses -ltermcap -lrmt -lcrypt -ll -lm -lz -lprop
+LIBS	libhack.o -lbz2 -ledit -lutil -lcurses -ltermcap -lkvm -lrmt -lcrypt -ll -lm -lz -lprop
 
 # init invokes the shell as -sh
 ARGVLN	sh -sh

CVS commit: [matt-nb5-mips64] src/gnu/dist/gcc4/gcc/config/mips

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Sat Dec 24 01:14:48 UTC 2011

Modified Files:
src/gnu/dist/gcc4/gcc/config/mips [matt-nb5-mips64]: mips.md

Log Message:
Add missing ISA_MIPS64R2 case


To generate a diff of this commit:
cvs rdiff -u -r1.1.1.3 -r1.1.1.3.10.1 \
src/gnu/dist/gcc4/gcc/config/mips/mips.md

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/gnu/dist/gcc4/gcc/config/mips/mips.md
diff -u src/gnu/dist/gcc4/gcc/config/mips/mips.md:1.1.1.3 src/gnu/dist/gcc4/gcc/config/mips/mips.md:1.1.1.3.10.1
--- src/gnu/dist/gcc4/gcc/config/mips/mips.md:1.1.1.3	Sun Aug 31 09:34:49 2008
+++ src/gnu/dist/gcc4/gcc/config/mips/mips.md	Sat Dec 24 01:14:47 2011
@@ -1036,7 +1036,8 @@
   || TARGET_MIPS9000
   || ISA_MIPS32
   || ISA_MIPS32R2
-  || ISA_MIPS64)
+  || ISA_MIPS64
+  || ISA_MIPS64R2)
 return mul\t%0,%1,%2;
   return mult\t%0,%1,%2;
 }

CVS commit: [matt-nb5-mips64] src/gnu/dist/binutils/opcodes

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Sat Dec 24 01:17:26 UTC 2011

Modified Files:
src/gnu/dist/binutils/opcodes [matt-nb5-mips64]: mips-opc.c

Log Message:
Add pause instruction (mips32r2 - sll $0,$0,5).


To generate a diff of this commit:
cvs rdiff -u -r1.1.1.3.32.5 -r1.1.1.3.32.6 \
src/gnu/dist/binutils/opcodes/mips-opc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/gnu/dist/binutils/opcodes/mips-opc.c
diff -u src/gnu/dist/binutils/opcodes/mips-opc.c:1.1.1.3.32.5 src/gnu/dist/binutils/opcodes/mips-opc.c:1.1.1.3.32.6
--- src/gnu/dist/binutils/opcodes/mips-opc.c:1.1.1.3.32.5	Fri Dec  2 10:08:44 2011
+++ src/gnu/dist/binutils/opcodes/mips-opc.c	Sat Dec 24 01:17:25 2011
@@ -145,6 +145,7 @@ const struct mips_opcode mips_builtin_op
 {nop, , 0x, 0x, 0,  	INSN2_ALIAS,	I1  }, /* sll */
 {ssnop,   , 0x0040, 0x, 0,  	INSN2_ALIAS,	I32|N55	}, /* sll */
 {ehb, , 0x00c0, 0x, 0,  	INSN2_ALIAS,	I33	}, /* sll */
+{pause, ,   0x0140, 0x, 0,  	INSN2_ALIAS,	I33	}, /* sll */
 {li,  t,j,  0x2400, 0xffe0, WR_t,			INSN2_ALIAS,	I1	}, /* addiu */
 {li,	t,i,	0x3400, 0xffe0, WR_t,			INSN2_ALIAS,	I1	}, /* ori */
 {li,  t,I,	0,(int) M_LI,	INSN_MACRO,		0,		I1	},

CVS commit: [matt-nb5-mips64] src/sys/dev/pci

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Sat Dec 24 01:22:44 UTC 2011

Modified Files:
src/sys/dev/pci [matt-nb5-mips64]: pcidevs

Log Message:
Add NetLogic(RMI) XLP devices


To generate a diff of this commit:
cvs rdiff -u -r1.962.4.1.4.4 -r1.962.4.1.4.5 src/sys/dev/pci/pcidevs

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/pcidevs
diff -u src/sys/dev/pci/pcidevs:1.962.4.1.4.4 src/sys/dev/pci/pcidevs:1.962.4.1.4.5
--- src/sys/dev/pci/pcidevs:1.962.4.1.4.4	Mon May 10 06:55:25 2010
+++ src/sys/dev/pci/pcidevs	Sat Dec 24 01:22:44 2011
@@ -1,4 +1,4 @@
-$NetBSD: pcidevs,v 1.962.4.1.4.4 2010/05/10 06:55:25 matt Exp $
+$NetBSD: pcidevs,v 1.962.4.1.4.5 2011/12/24 01:22:44 matt Exp $
 
 /*
  * Copyright (c) 1995, 1996 Christopher G. Demetriou
@@ -602,6 +602,7 @@ vendor S2IO		0x17d5	S2io Technologies
 vendor LINKSYS2		0x17fe	Linksys
 vendor RALINK		0x1814	Ralink Technologies
 vendor RMI		0x182e	Raza Microelectronics Inc.
+vendor NETLOGIC		0x184e	NetLogic Microsystems
 vendor BBELEC		0x1896	B  B Electronics
 vendor ATTANSIC		0x1969	Attansic Technologies
 vendor EVE		0x1adb	EVE
@@ -2233,6 +2234,7 @@ product INTEL 82801J_D_BM_LM	0x10de	i825
 product INTEL 82801J_D_BM_LF	0x10df	i82567LF-3 LAN Controller
 product INTEL 82575GB_QUAD_COPPER_PM 0x10e2 i82575GB Quad-1000baseT Ethernet (PM)
 product INTEL 82801I_BM		0x10e5	i82567LM-4 LAN Controller
+product INTEL 82576_QUAD_COPPER	0x10e8	82576 quad-1000BaseT Ethernet
 product INTEL PCH_M_LM		0x10ea	PCH LAN (82577LM) Controller
 product INTEL PCH_M_LC		0x10eb	PCH LAN (82577LC) Controller
 product INTEL PCH_D_DM		0x10ef	PCH LAN (82578DM) Controller
@@ -2900,12 +2902,39 @@ product MYSON MTD803	0x0803	MTD803 3-in-
 product NDC NCP130		0x0130 NCP130 Wireless NIC
 product NDC NCP130A2		0x0131 NCP130 rev A2 Wireless NIC
 
-/* NetVin products - XXX better descriptions */
-product NETVIN 5000	0x5000	5000 Ethernet
-
 /* NetBoost (now Intel) products */
 product NETBOOST POLICY	0x	Policy Accelerator
 
+/* NetLogic (now Broadcom?) products */
+product NETLOGIC XLP_SBC	0x1001	XLP System Bridge controller
+product NETLOGIC XLP_ICI	0x1002	XLP Inter-Chip interconnect
+product NETLOGIC XLP_PIC	0x1003	XLP Programmable Interrupt controller
+product NETLOGIC XLP_PCIROOT	0x1004	XLP PCI-Express RootComplex/Endpoint port
+product NETLOGIC XLP_INTERLAKEN	0x1005	XLP Interlaken LA interface
+product NETLOGIC XLP_DEVUSB	0x1006	XLP Device USB controller
+product NETLOGIC XLP_EHCIUSB	0x1007	XLP EHCI USB controller
+product NETLOGIC XLP_OHCIUSB	0x1008	XLP OHCI USB controller
+product NETLOGIC XLP_NAE	0x1009	XLP Network Acceleration engine
+product NETLOGIC XLP_POE	0x100A	XLP Packet Ordering engine
+product NETLOGIC XLP_FMN	0x100B	XLP Fast Messaging Network
+product NETLOGIC XLP_RAID	0x100C	XLP Data Transfer and RAID engine
+product NETLOGIC XLP_SAE	0x100D	XLP Security accelerator
+product NETLOGIC XLP_PKE	0x100E	XLP RSA/ECC accelerator
+product NETLOGIC XLP_CDE	0x100F	XLP Compress/Decompression engine
+product NETLOGIC XLP_UART	0x1010	XLP UART controller
+product NETLOGIC XLP_I2C	0x1011	XLP I2C controller
+product NETLOGIC XLP_GPIO	0x1012	XLP GPIO controller
+product NETLOGIC XLP_SYSTEM	0x1013	XLP System controller
+product NETLOGIC XLP_JTAG	0x1014	XLP JTAG interface
+product NETLOGIC XLP_NOR	0x1015	XLP NOR flash controller
+product NETLOGIC XLP_NAND	0x1016	XLP NAND flash controller
+product NETLOGIC XLP_SPI	0x1017	XLP SPI controller
+product NETLOGIC XLP_SDHC	0x1018	XLP eMMC/SD/SDIO controller
+product NETLOGIC XLP_AHCISATA	0x101a	XLP AHCI SATA controller
+
+/* NetVin products - XXX better descriptions */
+product NETVIN 5000	0x5000	5000 Ethernet
+
 /* Newbridge / Tundra products */
 product NEWBRIDGE CA91CX42		0x	Universe VME bridge
 product NEWBRIDGE CA91L826A		0x0826	QSpan II PCI bridge

CVS commit: [matt-nb5-mips64] src/sys/dev/pci

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Sat Dec 24 01:23:34 UTC 2011

Modified Files:
src/sys/dev/pci [matt-nb5-mips64]: pcidevs.h pcidevs_data.h

Log Message:
Regen.


To generate a diff of this commit:
cvs rdiff -u -r1.963.4.1.4.4 -r1.963.4.1.4.5 src/sys/dev/pci/pcidevs.h
cvs rdiff -u -r1.962.4.1.4.4 -r1.962.4.1.4.5 src/sys/dev/pci/pcidevs_data.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/pcidevs.h
diff -u src/sys/dev/pci/pcidevs.h:1.963.4.1.4.4 src/sys/dev/pci/pcidevs.h:1.963.4.1.4.5
--- src/sys/dev/pci/pcidevs.h:1.963.4.1.4.4	Mon May 10 06:55:44 2010
+++ src/sys/dev/pci/pcidevs.h	Sat Dec 24 01:23:12 2011
@@ -1,10 +1,10 @@
-/*	$NetBSD: pcidevs.h,v 1.963.4.1.4.4 2010/05/10 06:55:44 matt Exp $	*/
+/*	$NetBSD: pcidevs.h,v 1.963.4.1.4.5 2011/12/24 01:23:12 matt Exp $	*/
 
 /*
  * THIS FILE AUTOMATICALLY GENERATED.  DO NOT EDIT.
  *
  * generated from:
- *	NetBSD: pcidevs,v 1.962.4.1.4.4 2010/05/10 06:55:25 matt Exp
+ *	NetBSD: pcidevs,v 1.962.4.1.4.5 2011/12/24 01:22:44 matt Exp
  */
 
 /*
@@ -609,6 +609,7 @@
 #define	PCI_VENDOR_LINKSYS2	0x17fe		/* Linksys */
 #define	PCI_VENDOR_RALINK	0x1814		/* Ralink Technologies */
 #define	PCI_VENDOR_RMI	0x182e		/* Raza Microelectronics Inc. */
+#define	PCI_VENDOR_NETLOGIC	0x184e		/* NetLogic Microsystems */
 #define	PCI_VENDOR_BBELEC	0x1896		/* B  B Electronics */
 #define	PCI_VENDOR_ATTANSIC	0x1969		/* Attansic Technologies */
 #define	PCI_VENDOR_EVE	0x1adb		/* EVE */
@@ -2240,6 +2241,7 @@
 #define	PCI_PRODUCT_INTEL_82801J_D_BM_LF	0x10df		/* i82567LF-3 LAN Controller */
 #define	PCI_PRODUCT_INTEL_82575GB_QUAD_COPPER_PM	0x10e2		/* i82575GB Quad-1000baseT Ethernet (PM) */
 #define	PCI_PRODUCT_INTEL_82801I_BM	0x10e5		/* i82567LM-4 LAN Controller */
+#define	PCI_PRODUCT_INTEL_82576_QUAD_COPPER	0x10e8		/* 82576 quad-1000BaseT Ethernet */
 #define	PCI_PRODUCT_INTEL_PCH_M_LM	0x10ea		/* PCH LAN (82577LM) Controller */
 #define	PCI_PRODUCT_INTEL_PCH_M_LC	0x10eb		/* PCH LAN (82577LC) Controller */
 #define	PCI_PRODUCT_INTEL_PCH_D_DM	0x10ef		/* PCH LAN (82578DM) Controller */
@@ -2907,12 +2909,39 @@
 #define	PCI_PRODUCT_NDC_NCP130	0x0130		/* NCP130 Wireless NIC */
 #define	PCI_PRODUCT_NDC_NCP130A2	0x0131		/* NCP130 rev A2 Wireless NIC */
 
-/* NetVin products - XXX better descriptions */
-#define	PCI_PRODUCT_NETVIN_5000	0x5000		/* 5000 Ethernet */
-
 /* NetBoost (now Intel) products */
 #define	PCI_PRODUCT_NETBOOST_POLICY	0x		/* Policy Accelerator */
 
+/* NetLogic (now Broadcom?) products */
+#define	PCI_PRODUCT_NETLOGIC_XLP_SBC	0x1001		/* XLP System Bridge controller */
+#define	PCI_PRODUCT_NETLOGIC_XLP_ICI	0x1002		/* XLP Inter-Chip interconnect */
+#define	PCI_PRODUCT_NETLOGIC_XLP_PIC	0x1003		/* XLP Programmable Interrupt controller */
+#define	PCI_PRODUCT_NETLOGIC_XLP_PCIROOT	0x1004		/* XLP PCI-Express RootComplex/Endpoint port */
+#define	PCI_PRODUCT_NETLOGIC_XLP_INTERLAKEN	0x1005		/* XLP Interlaken LA interface */
+#define	PCI_PRODUCT_NETLOGIC_XLP_DEVUSB	0x1006		/* XLP Device USB controller */
+#define	PCI_PRODUCT_NETLOGIC_XLP_EHCIUSB	0x1007		/* XLP EHCI USB controller */
+#define	PCI_PRODUCT_NETLOGIC_XLP_OHCIUSB	0x1008		/* XLP OHCI USB controller */
+#define	PCI_PRODUCT_NETLOGIC_XLP_NAE	0x1009		/* XLP Network Acceleration engine */
+#define	PCI_PRODUCT_NETLOGIC_XLP_POE	0x100A		/* XLP Packet Ordering engine */
+#define	PCI_PRODUCT_NETLOGIC_XLP_FMN	0x100B		/* XLP Fast Messaging Network */
+#define	PCI_PRODUCT_NETLOGIC_XLP_RAID	0x100C		/* XLP Data Transfer and RAID engine */
+#define	PCI_PRODUCT_NETLOGIC_XLP_SAE	0x100D		/* XLP Security accelerator */
+#define	PCI_PRODUCT_NETLOGIC_XLP_PKE	0x100E		/* XLP RSA/ECC accelerator */
+#define	PCI_PRODUCT_NETLOGIC_XLP_CDE	0x100F		/* XLP Compress/Decompression engine */
+#define	PCI_PRODUCT_NETLOGIC_XLP_UART	0x1010		/* XLP UART controller */
+#define	PCI_PRODUCT_NETLOGIC_XLP_I2C	0x1011		/* XLP I2C controller */
+#define	PCI_PRODUCT_NETLOGIC_XLP_GPIO	0x1012		/* XLP GPIO controller */
+#define	PCI_PRODUCT_NETLOGIC_XLP_SYSTEM	0x1013		/* XLP System controller */
+#define	PCI_PRODUCT_NETLOGIC_XLP_JTAG	0x1014		/* XLP JTAG interface */
+#define	PCI_PRODUCT_NETLOGIC_XLP_NOR	0x1015		/* XLP NOR flash controller */
+#define	PCI_PRODUCT_NETLOGIC_XLP_NAND	0x1016		/* XLP NAND flash controller */
+#define	PCI_PRODUCT_NETLOGIC_XLP_SPI	0x1017		/* XLP SPI controller */
+#define	PCI_PRODUCT_NETLOGIC_XLP_SDHC	0x1018		/* XLP eMMC/SD/SDIO controller */
+#define	PCI_PRODUCT_NETLOGIC_XLP_AHCISATA	0x101a		/* XLP AHCI SATA controller */
+
+/* NetVin products - XXX better descriptions */
+#define	PCI_PRODUCT_NETVIN_5000	0x5000		/* 5000 Ethernet */
+
 /* Newbridge / Tundra products */
 #define	PCI_PRODUCT_NEWBRIDGE_CA91CX42	0x		/* Universe VME bridge */
 #define	PCI_PRODUCT_NEWBRIDGE_CA91L826A	0x0826		/* QSpan II PCI bridge */

Index: src/sys/dev/pci/pcidevs_data.h
diff -u src/sys/dev/pci/pcidevs_data.h:1.962.4.1.4.4

CVS commit: [matt-nb5-mips64] src/sys/dev/pci

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Sat Dec 24 01:24:44 UTC 2011

Modified Files:
src/sys/dev/pci [matt-nb5-mips64]: pci.c

Log Message:
Add support for __PCI_DEV_FUNCORDER


To generate a diff of this commit:
cvs rdiff -u -r1.119.4.1 -r1.119.4.1.4.1 src/sys/dev/pci/pci.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/pci.c
diff -u src/sys/dev/pci/pci.c:1.119.4.1 src/sys/dev/pci/pci.c:1.119.4.1.4.1
--- src/sys/dev/pci/pci.c:1.119.4.1	Thu Nov 20 02:40:59 2008
+++ src/sys/dev/pci/pci.c	Sat Dec 24 01:24:44 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: pci.c,v 1.119.4.1 2008/11/20 02:40:59 snj Exp $	*/
+/*	$NetBSD: pci.c,v 1.119.4.1.4.1 2011/12/24 01:24:44 matt Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996, 1997, 1998
@@ -36,7 +36,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: pci.c,v 1.119.4.1 2008/11/20 02:40:59 snj Exp $);
+__KERNEL_RCSID(0, $NetBSD: pci.c,v 1.119.4.1.4.1 2011/12/24 01:24:44 matt Exp $);
 
 #include opt_pci.h
 
@@ -533,7 +533,24 @@ pci_enumerate_bus(struct pci_softc *sc, 
 		else
 			nfunctions = PCI_HDRTYPE_MULTIFN(bhlcr) ? 8 : 1;
 
+#ifdef __PCI_DEV_FUNCORDER
+		char funcs[8];
+		int j;
+		for (j = 0; j  nfunctions; j++) {
+			funcs[j] = j;
+		}
+		if (j  __arraycount(funcs))
+			funcs[j] = -1;
+		if (nfunctions  1) {
+			pci_dev_funcorder(sc-sc_pc, sc-sc_bus, device,
+			nfunctions, funcs);
+		}
+		for (j = 0;
+		 j  8  (function = funcs[j])  8  function = 0;
+		 j++) {
+#else
 		for (function = 0; function  nfunctions; function++) {
+#endif
 			if ((locators[PCICF_FUNCTION] != PCICF_FUNCTION_DEFAULT)
 			 (locators[PCICF_FUNCTION] != function))
 continue;

CVS commit: [matt-nb5-mips64] src/sys/dev/pci

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Sat Dec 24 01:25:51 UTC 2011

Modified Files:
src/sys/dev/pci [matt-nb5-mips64]: pciconf.c

Log Message:
Fix problem when alignment of a device is  then the alignment of the bus
bus spaces provided.


To generate a diff of this commit:
cvs rdiff -u -r1.30 -r1.30.52.1 src/sys/dev/pci/pciconf.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/pciconf.c
diff -u src/sys/dev/pci/pciconf.c:1.30 src/sys/dev/pci/pciconf.c:1.30.52.1
--- src/sys/dev/pci/pciconf.c:1.30	Thu May 24 15:57:58 2007
+++ src/sys/dev/pci/pciconf.c	Sat Dec 24 01:25:51 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: pciconf.c,v 1.30 2007/05/24 15:57:58 briggs Exp $	*/
+/*	$NetBSD: pciconf.c,v 1.30.52.1 2011/12/24 01:25:51 matt Exp $	*/
 
 /*
  * Copyright 2001 Wasabi Systems, Inc.
@@ -65,7 +65,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: pciconf.c,v 1.30 2007/05/24 15:57:58 briggs Exp $);
+__KERNEL_RCSID(0, $NetBSD: pciconf.c,v 1.30.52.1 2011/12/24 01:25:51 matt Exp $);
 
 #include opt_pci.h
 
@@ -130,6 +130,9 @@ typedef struct _s_pciconf_bus_t {
 	int		swiz;
 	int		io_32bit;
 	int		pmem_64bit;
+	int		io_align;
+	int		mem_align;
+	int		pmem_align;
 
 	int		ndevs;
 	pciconf_dev_t	device[MAX_CONF_DEV];
@@ -328,6 +331,10 @@ query_bus(pciconf_bus_t *parent, pciconf
 	pb-parent_bus = parent;
 	alloc_busno(parent, pb);
 
+	pb-mem_align = 0x10;	/* 1M alignment */
+	pb-pmem_align = 0x10;	/* 1M alignment */
+	pb-io_align = 0x1000;		/* 4K alignment */
+
 	set_busreg(parent-pc, pd-tag, parent-busno, pb-busno, 0xff);
 
 	pb-swiz = parent-swiz + dev;
@@ -374,12 +381,14 @@ query_bus(pciconf_bus_t *parent, pciconf
 			printf(pciconf: too many I/O windows\n);
 			goto err;
 		}
-		pb-io_total |= 0xfff;	/* Round up */
+		pb-io_total |= pb-io_align - 1; /* Round up */
 		pi = get_io_desc(parent, pb-io_total);
 		pi-dev = pd;
 		pi-reg = 0;
 		pi-size = pb-io_total;
-		pi-align = 0x1000;	/* 4K alignment */
+		pi-align = pb-io_align;	/* 4K min alignment */
+		if (parent-io_align  pb-io_align)
+			parent-io_align = pb-io_align;
 		pi-prefetch = 0;
 		parent-niowin++;
 		parent-io_total += pb-io_total;
@@ -390,12 +399,14 @@ query_bus(pciconf_bus_t *parent, pciconf
 			printf(pciconf: too many MEM windows\n);
 			goto err;
 		}
-		pb-mem_total |= 0xf;	/* Round up */
+		pb-mem_total |= pb-mem_align-1; /* Round up */
 		pm = get_mem_desc(parent, pb-mem_total);
 		pm-dev = pd;
 		pm-reg = 0;
 		pm-size = pb-mem_total;
-		pm-align = 0x10;	/* 1M alignment */
+		pm-align = pb-mem_align;	/* 1M min alignment */
+		if (parent-mem_align  pb-mem_align)
+			parent-mem_align = pb-mem_align;
 		pm-prefetch = 0;
 		parent-nmemwin++;
 		parent-mem_total += pb-mem_total;
@@ -406,12 +417,14 @@ query_bus(pciconf_bus_t *parent, pciconf
 			printf(pciconf: too many MEM windows\n);
 			goto err;
 		}
-		pb-pmem_total |= 0xf;	/* Round up */
+		pb-pmem_total |= pb-pmem_align-1; /* Round up */
 		pm = get_mem_desc(parent, pb-pmem_total);
 		pm-dev = pd;
 		pm-reg = 0;
 		pm-size = pb-pmem_total;
-		pm-align = 0x10;		/* 1M alignment */
+		pm-align = pb-pmem_align;	/* 1M alignment */
+		if (parent-pmem_align  pb-pmem_align)
+			parent-pmem_align = pb-pmem_align;
 		pm-prefetch = 1;
 		parent-nmemwin++;
 		parent-pmem_total += pb-pmem_total;
@@ -551,6 +564,8 @@ pci_do_device_query(pciconf_bus_t *pb, p
 			pi-reg = br;
 			pi-size = (u_int64_t) size;
 			pi-align = 4;
+			if (pb-io_align  pi-size)
+pb-io_align = pi-size;
 			pi-prefetch = 0;
 			if (pci_conf_debug) {
 print_tag(pb-pc, tag);
@@ -594,7 +609,7 @@ pci_do_device_query(pciconf_bus_t *pb, p
 			} else {
 if (pci_conf_debug) {
 	print_tag(pb-pc, tag);
-	printf(MEM%d BAR 0x%x has size %lx\n,
+	printf(MEM%d BAR 0x%x has size %#lx\n,
 	PCI_MAPREG_MEM_TYPE(mask) ==
 		PCI_MAPREG_MEM_TYPE_64BIT ?
 		64 : 32, br, (unsigned long)size);
@@ -620,8 +635,12 @@ pci_do_device_query(pciconf_bus_t *pb, p
 			pb-nmemwin++;
 			if (pm-prefetch) {
 pb-pmem_total += size;
+if (pb-pmem_align  pm-size)
+	pb-pmem_align = pm-size;
 			} else {
 pb-mem_total += size;
+if (pb-mem_align  pm-size)
+	pb-mem_align = pm-size;
 			}
 		}
 	}
@@ -682,12 +701,12 @@ pci_allocate_range(struct extent *ex, u_
 
 	r = extent_alloc(ex, amt, align, 0, EX_NOWAIT, addr);
 	if (r) {
-		addr = (u_long) -1;
-		printf(extent_alloc(%p, % PRIu64 , %d) returned %d\n,
+		printf(extent_alloc(%p, %# PRIx64 , %#x) returned %d\n,
 		ex, amt, align, r);
 		extent_print(ex);
+		return ~0ULL;
 	}
-	return (pcireg_t) addr;
+	return addr;
 }
 
 static int
@@ -703,7 +722,7 @@ setup_iowins(pciconf_bus_t *pb)
 		pd = pi-dev;
 		pi-address = pci_allocate_range(pb-ioext, pi-size,
 		pi-align);
-		if (pi-address == -1) {
+		if (~pi-address == 0) {
 			print_tag(pd-pc, pd-tag);
 			printf(Failed to allocate PCI I/O space (%

CVS commit: [matt-nb5-mips64] src/sys/dev/pci

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Sat Dec 24 01:28:02 UTC 2011

Modified Files:
src/sys/dev/pci [matt-nb5-mips64]: ppb.c

Log Message:
Pull latest from -HEAD.
Add printing bus lanes and speed.


To generate a diff of this commit:
cvs rdiff -u -r1.39.18.2 -r1.39.18.3 src/sys/dev/pci/ppb.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/ppb.c
diff -u src/sys/dev/pci/ppb.c:1.39.18.2 src/sys/dev/pci/ppb.c:1.39.18.3
--- src/sys/dev/pci/ppb.c:1.39.18.2	Thu Jan 28 17:42:37 2010
+++ src/sys/dev/pci/ppb.c	Sat Dec 24 01:28:02 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: ppb.c,v 1.39.18.2 2010/01/28 17:42:37 matt Exp $	*/
+/*	$NetBSD: ppb.c,v 1.39.18.3 2011/12/24 01:28:02 matt Exp $	*/
 
 /*
  * Copyright (c) 1996, 1998 Christopher G. Demetriou.  All rights reserved.
@@ -31,7 +31,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: ppb.c,v 1.39.18.2 2010/01/28 17:42:37 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: ppb.c,v 1.39.18.3 2011/12/24 01:28:02 matt Exp $);
 
 #include sys/param.h
 #include sys/systm.h
@@ -43,6 +43,10 @@ __KERNEL_RCSID(0, $NetBSD: ppb.c,v 1.39
 #include dev/pci/ppbreg.h
 #include dev/pci/pcidevs.h
 
+#define	PCI_PCIE_SLCSR_NOTIFY_MASK	\
+	(PCI_PCIE_SLCSR_ABE | PCI_PCIE_SLCSR_PFE | PCI_PCIE_SLCSR_MSE |	\
+	 PCI_PCIE_SLCSR_PDE | PCI_PCIE_SLCSR_CCE | PCI_PCIE_SLCSR_HPE)
+
 struct ppb_softc {
 	device_t sc_dev;		/* generic device glue */
 	pci_chipset_tag_t sc_pc;	/* our PCI chipset... */
@@ -89,15 +93,81 @@ ppb_fix_pcie(device_t self)
 off, reg))
 		return; /* Not a PCIe device */
 
-	if ((reg  0x000f) != 0x0001) {
-		aprint_normal_dev(self, unsupported PCI Express version\n);
+	aprint_normal_dev(self, PCI Express );
+	switch (reg  PCI_PCIE_XCAP_VER_MASK) {
+	case PCI_PCIE_XCAP_VER_1_0:
+		aprint_normal(1.0);
+		break;
+	case PCI_PCIE_XCAP_VER_2_0:
+		aprint_normal(2.0);
+		break;
+	default:
+		aprint_normal_dev(self,
+		version unsupported (0x% PRIxMAX )\n,
+		__SHIFTOUT(reg, PCI_PCIE_XCAP_VER_MASK));
 		return;
 	}
-	reg = pci_conf_read(sc-sc_pc, sc-sc_tag, off + 0x18);
-	if (reg  0x003f) {
-		aprint_normal_dev(self, disabling notification events\n);
-		reg = ~0x003f;
-		pci_conf_write(sc-sc_pc, sc-sc_tag, off + 0x18, reg);
+	aprint_normal( );
+	switch (reg  PCI_PCIE_XCAP_TYPE_MASK) {
+	case PCI_PCIE_XCAP_TYPE_PCIE_DEV:
+		aprint_normal(PCI-E Endpoint device);
+		break;
+	case PCI_PCIE_XCAP_TYPE_PCI_DEV:
+		aprint_normal(Legacy PCI-E Endpoint device);
+		break;
+	case PCI_PCIE_XCAP_TYPE_ROOT:
+		aprint_normal(Root Port of PCI-E Root Complex);
+		break;
+	case PCI_PCIE_XCAP_TYPE_UP:
+		aprint_normal(Upstream Port of PCI-E Switch);
+		break;
+	case PCI_PCIE_XCAP_TYPE_DOWN:
+		aprint_normal(Downstream Port of PCI-E Switch);
+		break;
+	case PCI_PCIE_XCAP_TYPE_PCIE2PCI:
+		aprint_normal(PCI-E to PCI/PCI-X Bridge);
+		break;
+	case PCI_PCIE_XCAP_TYPE_PCI2PCIE:
+		aprint_normal(PCI/PCI-X to PCI-E Bridge);
+		break;
+	default:
+		aprint_normal(Device/Port Type 0x% PRIxMAX,
+		__SHIFTOUT(reg, PCI_PCIE_XCAP_TYPE_MASK));
+		break;
+	}
+
+	switch (reg  PCI_PCIE_XCAP_TYPE_MASK) {
+	case PCI_PCIE_XCAP_TYPE_ROOT:
+	case PCI_PCIE_XCAP_TYPE_DOWN:
+	case PCI_PCIE_XCAP_TYPE_PCI2PCIE:
+		reg = pci_conf_read(sc-sc_pc, sc-sc_tag, off + 0x0c);
+		u_int mlw = (reg  4)  0x1f;
+		u_int mls = (reg  0)  0x0f;
+		aprint_normal( x%d @ %d.%dGb/s\n,
+		mlw, (mls * 25) / 10, (mls * 25) % 10);
+
+		reg = pci_conf_read(sc-sc_pc, sc-sc_tag, off + 0x10);
+		if (reg  __BIT(29)) {	/* DLLA */
+			u_int lw = (reg  20)  0x1f;
+			u_int ls = (reg  16)  0x0f;
+			if (lw != mlw || ls != mls) {
+aprint_normal_dev(self,
+link is x%d @ %d.%dGb/s\n,
+lw, (ls * 25) / 10, (ls * 25) % 10);
+			}
+		}
+		break;
+	default:
+		aprint_normal(\n);
+		break;
+	}
+
+	reg = pci_conf_read(sc-sc_pc, sc-sc_tag, off + PCI_PCIE_SLCSR);
+	if (reg  PCI_PCIE_SLCSR_NOTIFY_MASK) {
+		aprint_debug_dev(self, disabling notification events\n);
+		reg = ~PCI_PCIE_SLCSR_NOTIFY_MASK;
+		pci_conf_write(sc-sc_pc, sc-sc_tag,
+		off + PCI_PCIE_SLCSR, reg);
 	}
 }
 
@@ -122,13 +192,13 @@ ppbattach(device_t parent, device_t self
 
 	busdata = pci_conf_read(pc, pa-pa_tag, PPB_REG_BUSINFO);
 
+	ppb_fix_pcie(self);
+
 	if (PPB_BUSINFO_SECONDARY(busdata) == 0) {
 		aprint_normal_dev(self, not configured by system firmware\n);
 		return;
 	}
 
-	ppb_fix_pcie(self);
-
 #if 0
 	/*
 	 * XXX can't do this, because we're not given our bus number

CVS commit: [matt-nb5-mips64] src/sys/dev/mii

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Sat Dec 24 01:31:39 UTC 2011

Modified Files:
src/sys/dev/mii [matt-nb5-mips64]: miidevs.h miidevs_data.h

Log Message:
Regen.


To generate a diff of this commit:
cvs rdiff -u -r1.81.10.3 -r1.81.10.4 src/sys/dev/mii/miidevs.h
cvs rdiff -u -r1.71.10.3 -r1.71.10.4 src/sys/dev/mii/miidevs_data.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/mii/miidevs.h
diff -u src/sys/dev/mii/miidevs.h:1.81.10.3 src/sys/dev/mii/miidevs.h:1.81.10.4
--- src/sys/dev/mii/miidevs.h:1.81.10.3	Fri May 20 14:42:20 2011
+++ src/sys/dev/mii/miidevs.h	Sat Dec 24 01:31:39 2011
@@ -1,10 +1,10 @@
-/*	$NetBSD: miidevs.h,v 1.81.10.3 2011/05/20 14:42:20 matt Exp $	*/
+/*	$NetBSD: miidevs.h,v 1.81.10.4 2011/12/24 01:31:39 matt Exp $	*/
 
 /*
  * THIS FILE AUTOMATICALLY GENERATED.  DO NOT EDIT.
  *
  * generated from:
- *	NetBSD: miidevs,v 1.78.10.5 2011/05/20 14:41:01 matt Exp
+ *	NetBSD: miidevs,v 1.78.10.6 2011/12/24 01:31:15 matt Exp
  */
 
 /*-
@@ -290,6 +290,8 @@
 #define	MII_STR_LEVEL1_LXT1000	LXT1000 1000BASE-T media interface
 
 /* Marvell Semiconductor PHYs */
+#define	MII_MODEL_MARVELL_E1114	0x0009
+#define	MII_STR_MARVELL_E1114	Marvell 88E1114 Gigabit PHY
 #define	MII_MODEL_xxMARVELL_E1011	0x0002
 #define	MII_STR_xxMARVELL_E1011	Marvell 88E1011 Gigabit PHY
 #define	MII_MODEL_xxMARVELL_E1000_3	0x0003

Index: src/sys/dev/mii/miidevs_data.h
diff -u src/sys/dev/mii/miidevs_data.h:1.71.10.3 src/sys/dev/mii/miidevs_data.h:1.71.10.4
--- src/sys/dev/mii/miidevs_data.h:1.71.10.3	Fri May 20 14:42:20 2011
+++ src/sys/dev/mii/miidevs_data.h	Sat Dec 24 01:31:39 2011
@@ -1,10 +1,10 @@
-/*	$NetBSD: miidevs_data.h,v 1.71.10.3 2011/05/20 14:42:20 matt Exp $	*/
+/*	$NetBSD: miidevs_data.h,v 1.71.10.4 2011/12/24 01:31:39 matt Exp $	*/
 
 /*
  * THIS FILE AUTOMATICALLY GENERATED.  DO NOT EDIT.
  *
  * generated from:
- *	NetBSD: miidevs,v 1.78.10.5 2011/05/20 14:41:01 matt Exp
+ *	NetBSD: miidevs,v 1.78.10.6 2011/12/24 01:31:15 matt Exp
  */
 
 /*-
@@ -110,6 +110,7 @@ struct mii_knowndev mii_knowndevs[] = {
  { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT975, MII_STR_LEVEL1_LXT975 },
  { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT1000_OLD, MII_STR_LEVEL1_LXT1000_OLD },
  { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT1000, MII_STR_LEVEL1_LXT1000 },
+ { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1114, MII_STR_MARVELL_E1114 },
  { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1011, MII_STR_xxMARVELL_E1011 },
  { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1000_3, MII_STR_xxMARVELL_E1000_3 },
  { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1000_5, MII_STR_xxMARVELL_E1000_5 },

CVS commit: [matt-nb5-mips64] src/sys/arch/evbmips/conf

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Sat Dec 24 01:39:47 UTC 2011

Modified Files:
src/sys/arch/evbmips/conf [matt-nb5-mips64]: XLSATX32

Log Message:
Remove option that moved to std.rmixl


To generate a diff of this commit:
cvs rdiff -u -r1.1.2.4 -r1.1.2.5 src/sys/arch/evbmips/conf/XLSATX32

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/evbmips/conf/XLSATX32
diff -u src/sys/arch/evbmips/conf/XLSATX32:1.1.2.4 src/sys/arch/evbmips/conf/XLSATX32:1.1.2.5
--- src/sys/arch/evbmips/conf/XLSATX32:1.1.2.4	Fri Dec  2 00:02:01 2011
+++ src/sys/arch/evbmips/conf/XLSATX32	Sat Dec 24 01:39:47 2011
@@ -1,12 +1,11 @@
-# $NetBSD: XLSATX32,v 1.1.2.4 2011/12/02 00:02:01 matt Exp $
+# $NetBSD: XLSATX32,v 1.1.2.5 2011/12/24 01:39:47 matt Exp $
 #
 
-#ident  	XLSATX32-$Revision: 1.1.2.4 $
+#ident  	XLSATX32-$Revision: 1.1.2.5 $
 
 include arch/evbmips/conf/XLSATX
 
 #options 	MEMLIMIT=0x2000			# 512MB 
-options 	ENABLE_MIPS_8KB_PAGE
 options 	ENABLE_MIPS_KSEGX
 
 makeoptions	LP64=no

CVS commit: [matt-nb5-mips64] src/sys/arch/evbmips/conf

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Sat Dec 24 01:40:27 UTC 2011

Modified Files:
src/sys/arch/evbmips/conf [matt-nb5-mips64]: INSTALL_XLSATX32

Log Message:
Don't make uneeded kernels.
Try to mdsetimage if possible.


To generate a diff of this commit:
cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/evbmips/conf/INSTALL_XLSATX32

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/evbmips/conf/INSTALL_XLSATX32
diff -u src/sys/arch/evbmips/conf/INSTALL_XLSATX32:1.1.2.1 src/sys/arch/evbmips/conf/INSTALL_XLSATX32:1.1.2.2
--- src/sys/arch/evbmips/conf/INSTALL_XLSATX32:1.1.2.1	Mon Dec 14 07:24:33 2009
+++ src/sys/arch/evbmips/conf/INSTALL_XLSATX32	Sat Dec 24 01:40:27 2011
@@ -1,8 +1,14 @@
-# $NetBSD: INSTALL_XLSATX32,v 1.1.2.1 2009/12/14 07:24:33 cliff Exp $
+# $NetBSD: INSTALL_XLSATX32,v 1.1.2.2 2011/12/24 01:40:27 matt Exp $
 
 include		arch/evbmips/conf/XLSATX32
 
-#ident		INSTALL_XLSATX32-$Revision: 1.1.2.1 $   
+no config netbsd-wm0
+no config netbsd-sd0a
+no config netbsd-msk0
+
+makeoptions	NEED_MDSETIMAGE=yes
+
+#ident		INSTALL_XLSATX32-$Revision: 1.1.2.2 $   
 
 # Enable the hooks used for initializing the root memory-disk.
 # The ramdisk size must be kept in sync manually with the size of

CVS commit: [matt-nb5-mips64] src/sys/arch/evbmips/conf

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Sat Dec 24 01:42:04 UTC 2011

Modified Files:
src/sys/arch/evbmips/conf [matt-nb5-mips64]: std.rmixl
Added Files:
src/sys/arch/evbmips/conf [matt-nb5-mips64]: std.rmixlp

Log Message:
Update options for rmixl and a new std.rmixlp


To generate a diff of this commit:
cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/evbmips/conf/std.rmixl
cvs rdiff -u -r0 -r1.1.2.1 src/sys/arch/evbmips/conf/std.rmixlp

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/evbmips/conf/std.rmixl
diff -u src/sys/arch/evbmips/conf/std.rmixl:1.1.2.5 src/sys/arch/evbmips/conf/std.rmixl:1.1.2.6
--- src/sys/arch/evbmips/conf/std.rmixl:1.1.2.5	Thu May 26 19:24:31 2011
+++ src/sys/arch/evbmips/conf/std.rmixl	Sat Dec 24 01:42:04 2011
@@ -1,4 +1,4 @@
-# std.rmixl,v 1.1.2.4 2010/03/29 23:31:16 cliff Exp
+# $NetBSD: std.rmixl,v 1.1.2.6 2011/12/24 01:42:04 matt Exp $
 
 machine evbmips mips
 include		conf/std	# MI standard options
@@ -7,16 +7,19 @@ options 	MIPS3_ENABLE_CLOCK_INTR
 
 # Platform support
 #options 	MIPS64
-options		MIPS64_XLR
-options		MIPS64_XLS
-options		MIPS64_RMIXL
+options 	MIPS64_XLR
+options 	MIPS64_XLS
+options 	MIPS64_RMIXL
 
+options 	__PCI_DEV_FUNCORDER
+options 	__HAVE_PCI_CONF_HOOK
+
+options 	MIPS_PAGE_SHIFT=13	# 8KB pages
 
 options 	EXEC_ELF32	# exec ELF32 binaries
 options 	EXEC_SCRIPT	# exec #! scripts
 
 makeoptions	CPUFLAGS+=-mips64
-##makeoptions	CFLAGS+=-mips64
 makeoptions	DEFTEXTADDR=0x8010
 makeoptions	BOARDTYPE=rmixl
 

Added files:

Index: src/sys/arch/evbmips/conf/std.rmixlp
diff -u /dev/null src/sys/arch/evbmips/conf/std.rmixlp:1.1.2.1
--- /dev/null	Sat Dec 24 01:42:04 2011
+++ src/sys/arch/evbmips/conf/std.rmixlp	Sat Dec 24 01:42:04 2011
@@ -0,0 +1,11 @@
+# $NetBSD: std.rmixlp,v 1.1.2.1 2011/12/24 01:42:04 matt Exp $
+
+include		arch/evbmips/conf/std.rmixl
+
+options 	MIPS64R2_RMIXL
+options 	MIPS64_XLP
+no options 	MIPS64_RMIXL
+no options 	MIPS64_XLR
+no options 	MIPS64_XLS
+makeoptions	CPUFLAGS+=-mips64r2 -mno-dsp
+makeoptions	AFLAGS+=-mips64r2

CVS commit: [matt-nb5-mips64] src/sys/arch/evbmips/conf

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Sat Dec 24 01:42:48 UTC 2011

Added Files:
src/sys/arch/evbmips/conf [matt-nb5-mips64]: INSTALL_XLPEVB32 XLPEVB
XLPEVB32

Log Message:
Add config files for the XLPEVB for the XLP8xx board.  (should work on any
XLP eval board).


To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1.2.1 src/sys/arch/evbmips/conf/INSTALL_XLPEVB32 \
src/sys/arch/evbmips/conf/XLPEVB src/sys/arch/evbmips/conf/XLPEVB32

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Added files:

Index: src/sys/arch/evbmips/conf/INSTALL_XLPEVB32
diff -u /dev/null src/sys/arch/evbmips/conf/INSTALL_XLPEVB32:1.1.2.1
--- /dev/null	Sat Dec 24 01:42:48 2011
+++ src/sys/arch/evbmips/conf/INSTALL_XLPEVB32	Sat Dec 24 01:42:48 2011
@@ -0,0 +1,19 @@
+# $NetBSD: INSTALL_XLPEVB32,v 1.1.2.1 2011/12/24 01:42:48 matt Exp $
+
+include		arch/evbmips/conf/XLPEVB32
+
+no config netbsd-wm0
+no config netbsd-sd0a
+
+makeoptions	NEED_MDSETIMAGE=yes
+
+#ident		INSTALL_XLSATX32-$Revision: 1.1.2.1 $   
+
+# Enable the hooks used for initializing the root memory-disk.
+# The ramdisk size must be kept in sync manually with the size of
+# the `ramdisk' image (which is built in distrib/evbmips/ramdisk/ramdisk).
+pseudo-device	md# memory disk device
+options 	MEMORY_DISK_HOOKS
+options 	MEMORY_DISK_IS_ROOT		# force root on memory disk
+options 	MEMORY_DISK_SERVER=0		# no userspace memory disk
+options 	MEMORY_DISK_ROOT_SIZE=12288	# size of memory disk, in blocks
Index: src/sys/arch/evbmips/conf/XLPEVB
diff -u /dev/null src/sys/arch/evbmips/conf/XLPEVB:1.1.2.1
--- /dev/null	Sat Dec 24 01:42:48 2011
+++ src/sys/arch/evbmips/conf/XLPEVB	Sat Dec 24 01:42:48 2011
@@ -0,0 +1,221 @@
+#	$NetBSD: XLPEVB,v 1.1.2.1 2011/12/24 01:42:48 matt Exp $
+
+include 	arch/evbmips/conf/std.rmixlp
+
+#ident 		XLSATX-$Revision: 1.1.2.1 $
+
+#options 	INCLUDE_CONFIG_FILE	# embed config file in kernel binary
+
+maxusers	32
+
+#
+# MEMSIZE can be used to limit memory amount used
+#
+#options 	MEMSIZE=0x1000		# 256MB
+
+#
+# MEMLIMIT can be used to limit memory address used
+#
+defparam opt_memsize.h MEMLIMIT
+#options 	MEMLIMIT=0x1000		# 256MB
+
+options 	NOFPU		# No FPU
+#options 	FPEMUL		# emulate FPU insn
+
+# Standard system options
+options 	KTRACE		# system call tracing support
+options 	SYSVMSG		# System V message queues
+options 	SYSVSEM		# System V semaphores
+options 	SYSVSHM		# System V shared memory
+#options 	SHMMAXPGS=1024	# 1024 pages is the default
+#options 	LKM		# loadable kernel modules
+options 	NTP		# network time protocol
+
+# Debugging options
+options 	DIAGNOSTIC	# extra kernel sanity checking
+options 	DEBUG		# extra kernel debugging support
+#options 	KMEMSTATS	# kernel memory statistics (vmstat -m)
+options 	MSGBUFSIZE=65536 # kernel dmesg buffer
+options 	USERCONF	# userconf(4) support
+#options 	SYSCTL_INCLUDE_DESCR	# Include sysctl descriptions in kernel
+options 	DDB		# kernel dynamic debugger
+options 	DDB_HISTORY_SIZE=100 # enable history editing in DDB
+makeoptions 	DEBUG=-g	# compile full symbol table
+options 	SYMTAB_SPACE=50	# size for embedded symbol table
+#options 	DDB_COMMANDONENTER=trace;show registers
+options 	DB_MAX_LINE=-1
+
+# Compatibility options
+#options 	COMPAT_43	# compatibility with 4.3BSD binaries
+#options 	COMPAT_09	# NetBSD 0.9 binary compatibility
+#options 	COMPAT_10	# NetBSD 1.0 binary compatibility
+#options 	COMPAT_11	# NetBSD 1.1 binary compatibility
+#options 	COMPAT_12	# NetBSD 1.2 binary compatibility
+#options 	COMPAT_13	# NetBSD 1.3 binary compatibility
+#options 	COMPAT_14	# NetBSD 1.4 binary compatibility
+#options 	COMPAT_15	# NetBSD 1.5 binary compatibility
+options 	COMPAT_16	# NetBSD 1.6 binary compatibility
+options 	COMPAT_20	# NetBSD 2.0 binary compatibility
+options 	COMPAT_30	# NetBSD 3.0 compatibility.
+options 	COMPAT_40	# NetBSD 4.0 compatibility.
+#options 	EXEC_ECOFF	# exec ECOFF binaries
+#options 	COMPAT_ULTRIX	# binary compatibility with Ultrix
+options 	COMPAT_BSDPTY	# /dev/[pt]ty?? ptys.
+
+# File systems
+file-system	FFS		# Berkeley Fast Filesystem
+file-system	MFS		# memory-based filesystem
+#file-system 	EXT2FS		# second extended file system (linux)
+file-system	NFS		# Sun NFS-compatible filesystem client
+file-system	KERNFS		# kernel data-structure filesystem
+#file-system	NULLFS		# NULL layered filesystem
+#file-system 	OVERLAY		# overlay file system
+#file-system	FDESC		# user file descriptor filesystem
+#file-system	UMAPFS		# uid/gid remapping filesystem
+#file-system	LFS		# Log-based filesystem (still experimental)
+#file-system	PUFFS		# Userspace file systems (e.g. ntfs-3g  sshfs)
+file-system	PROCFS		# /proc
+file-system	CD9660		# ISO 9660 + Rock Ridge file system
+file-system	TMPFS		# Efficient memory file system
+#file-system	UNION		# union file system
+file-system	MSDOSFS		# MS-DOS FAT filesystem(s).
+#file-system 	CODA

CVS commit: [matt-nb5-mips64] src/sys/nfs

2011-12-23 Thread Matt Thomas

Module Name:src
Committed By:   matt
Date:   Sat Dec 24 02:00:13 UTC 2011

Modified Files:
src/sys/nfs [matt-nb5-mips64]: nfs_serv.c

Log Message:
Fix call to sokvaalloc (now takes 3 arguments)


To generate a diff of this commit:
cvs rdiff -u -r1.138.16.1.4.1 -r1.138.16.1.4.2 src/sys/nfs/nfs_serv.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/nfs/nfs_serv.c
diff -u src/sys/nfs/nfs_serv.c:1.138.16.1.4.1 src/sys/nfs/nfs_serv.c:1.138.16.1.4.2
--- src/sys/nfs/nfs_serv.c:1.138.16.1.4.1	Tue Apr 20 21:29:06 2010
+++ src/sys/nfs/nfs_serv.c	Sat Dec 24 02:00:13 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: nfs_serv.c,v 1.138.16.1.4.1 2010/04/20 21:29:06 matt Exp $	*/
+/*	$NetBSD: nfs_serv.c,v 1.138.16.1.4.2 2011/12/24 02:00:13 matt Exp $	*/
 
 /*
  * Copyright (c) 1989, 1993
@@ -55,7 +55,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: nfs_serv.c,v 1.138.16.1.4.1 2010/04/20 21:29:06 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: nfs_serv.c,v 1.138.16.1.4.2 2011/12/24 02:00:13 matt Exp $);
 
 #include sys/param.h
 #include sys/systm.h
@@ -653,7 +653,7 @@ nfsrv_read(nfsd, slp, lwp, mrq)
 			KASSERT(npages = M_EXT_MAXPAGES); /* XXX */
 
 			/* allocate kva for mbuf data */
-			lva = sokvaalloc(npages  PAGE_SHIFT, slp-ns_so);
+			lva = sokvaalloc(pgoff, npages  PAGE_SHIFT, slp-ns_so);
 			if (lva == 0) {
 /* fall back to VOP_READ */
 goto loan_fail;

CVS commit: src/sys/dev/pci/voyager

2011-12-23 Thread Michael Lorenz

Module Name:src
Committed By:   macallan
Date:   Sat Dec 24 02:28:50 UTC 2011

Modified Files:
src/sys/dev/pci/voyager: voyagerfb.c

Log Message:
don't put alpha values in a variable named alpha since alpha doesn't like
variables conflicting with platform names
( just in case someone figures out how to stick an sm50x into an alpha )


To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/dev/pci/voyager/voyagerfb.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/voyager/voyagerfb.c
diff -u src/sys/dev/pci/voyager/voyagerfb.c:1.12 src/sys/dev/pci/voyager/voyagerfb.c:1.13
--- src/sys/dev/pci/voyager/voyagerfb.c:1.12	Thu Dec 22 07:42:43 2011
+++ src/sys/dev/pci/voyager/voyagerfb.c	Sat Dec 24 02:28:50 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: voyagerfb.c,v 1.12 2011/12/22 07:42:43 macallan Exp $	*/
+/*	$NetBSD: voyagerfb.c,v 1.13 2011/12/24 02:28:50 macallan Exp $	*/
 
 /*
  * Copyright (c) 2009, 2011 Michael Lorenz
@@ -31,7 +31,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: voyagerfb.c,v 1.12 2011/12/22 07:42:43 macallan Exp $);
+__KERNEL_RCSID(0, $NetBSD: voyagerfb.c,v 1.13 2011/12/24 02:28:50 macallan Exp $);
 
 #include sys/param.h
 #include sys/systm.h
@@ -897,7 +897,7 @@ voyagerfb_putchar(void *cookie, int row,
 			 * we can at least use a host blit to go through the
 			 * pipeline instead of having to sync the engine
 			 */
-			int i, r, g, b, alpha;
+			int i, r, g, b, aval;
 			int rf, gf, bf, rb, gb, bb;
 			uint32_t pixel;
 
@@ -921,11 +921,11 @@ voyagerfb_putchar(void *cookie, int row,
 			bf =  fg  0xff;
 			bb =  bg  0xff;
 			for (i = 0; i  wi * he; i++) {
-alpha = *data;
+aval = *data;
 data++;
-r = alpha * rf + (255 - alpha) * rb;
-g = alpha * gf + (255 - alpha) * gb;
-b = alpha * bf + (255 - alpha) * bb;
+r = aval * rf + (255 - aval) * rb;
+g = aval * gf + (255 - aval) * gb;
+b = aval * bf + (255 - aval) * bb;
 pixel = (r  0xff00)  8 |
 (g  0xff00) |
 (b  0xff00)  8;

CVS commit: src/doc

2011-12-23 Thread Izumi Tsutsui

Module Name:src
Committed By:   tsutsui
Date:   Sat Dec 24 05:05:55 UTC 2011

Modified Files:
src/doc: HACKS

Log Message:
Note libc/net/Makefile.inc hostname lookup -fno-tree-ter hacks for gcc 4.5 arm.


To generate a diff of this commit:
cvs rdiff -u -r1.121 -r1.122 src/doc/HACKS

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/doc/HACKS
diff -u src/doc/HACKS:1.121 src/doc/HACKS:1.122
--- src/doc/HACKS:1.121	Tue Nov  8 23:11:42 2011
+++ src/doc/HACKS	Sat Dec 24 05:05:55 2011
@@ -1,4 +1,4 @@
-# $NetBSD: HACKS,v 1.121 2011/11/08 23:11:42 christos Exp $
+# $NetBSD: HACKS,v 1.122 2011/12/24 05:05:55 tsutsui Exp $
 #
 # This file is intended to document workarounds for currently unsolved
 # (mostly) compiler bugs.
@@ -537,6 +537,23 @@ port	arm
 		really should be enough, but turns out not to be.
 	kcah
 
+	hack	gcc-4.5 arm CNAME hostname lookup failure on
+		certain DNS environment (probably -ftree-ter problem)
+	cdate	Sat Dec 24 04:59:00 UTC 2011
+	mdate	
+	who	tsutsui
+	file	lib/libc/net/Makefile.inc 1.79
+	descr	Hostname lookup against CNAMEs by some commands fails
+		on certain DNS environments if lib/libc/net/gethnamaddr.c
+		(ping(8) etc) and lib/libc/net/getaddrinfo.c (ftp(1) etc)
+		are compiled with -O2, even though nslookup(1) against
+		the same CNAME returns proper hostname.
+		They works properly if compiled with -O2 -fno-tree-ter.
+		Also -O2 fails but -O2 -fno-tree-ter works on the following
+		test case in gcc bugzilla:
+		http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48863#c4
+	kcah
+
 
 port	sh3

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