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Re: [PATCH 1/4 v4] of_spi: add generic binding support to specify cs gpio

[Grant Likely]

On Wed,  7 Mar 2012 13:23:06 +0100, Jean-Christophe PLAGNIOL-VILLARD 
plagn...@jcrosoft.com wrote:
 This will allow to use gpio for chip select with no modification in the
 driver binding
 
 When use the cs-gpios, the gpio number will be passed via the cs_gpio field
 and the number of chip select will automatically increased.
 
 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
 Cc: devicetree-disc...@lists.ozlabs.org
 Cc: spi-devel-general@lists.sourceforge.net
 ---
 v4:
   use cs_gpio to pass the gpio number
 
 Best Regards,
 J.
  Documentation/devicetree/bindings/spi/spi-bus.txt |6 ++
  drivers/spi/spi.c |   57 +++-
  include/linux/spi/spi.h   |6 ++
  3 files changed, 66 insertions(+), 3 deletions(-)
 
 diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt 
 b/Documentation/devicetree/bindings/spi/spi-bus.txt
 index e782add..c253379 100644
 --- a/Documentation/devicetree/bindings/spi/spi-bus.txt
 +++ b/Documentation/devicetree/bindings/spi/spi-bus.txt
 @@ -12,6 +12,7 @@ The SPI master node requires the following properties:
  - #size-cells - should be zero.
  - compatible  - name of SPI bus controller following generic names
   recommended practice.
 +- cs-gpios - (optional) gpios chip select.
  No other properties are required in the SPI bus node.  It is assumed
  that a driver for an SPI bus device will understand that it is an SPI bus.
  However, the binding does not attempt to define the specific method for
 @@ -21,6 +22,8 @@ assumption that board specific platform code will be used 
 to manage
  chip selects.  Individual drivers can define additional properties to
  support describing the chip select layout.
  
 +If cs-gpios is used the number of chip select will automatically increased.
 +
  SPI slave nodes must be children of the SPI master node and can
  contain the following properties.
  - reg - (required) chip select address of device.
 @@ -34,6 +37,9 @@ contain the following properties.
  - spi-cs-high - (optional) Empty property indicating device requires
   chip select active high
  
 +If a gpio chipselect is used for the SPI slave the gpio number will be passed
 +via the controller_data
 +
  SPI example for an MPC5200 SPI bus:
   spi@f00 {
   #address-cells = 1;
 diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
 index b2ccdea..c1d0955 100644
 --- a/drivers/spi/spi.c
 +++ b/drivers/spi/spi.c
 @@ -28,6 +28,7 @@
  #include linux/mod_devicetable.h
  #include linux/spi/spi.h
  #include linux/of_spi.h
 +#include linux/of_gpio.h
  #include linux/pm_runtime.h
  #include linux/export.h
  
 @@ -322,6 +323,7 @@ struct spi_device *spi_alloc_device(struct spi_master 
 *master)
   spi-dev.parent = master-dev;
   spi-dev.bus = spi_bus_type;
   spi-dev.release = spidev_release;
 + spi-cs_gpio = -EINVAL;
   device_initialize(spi-dev);
   return spi;
  }
 @@ -339,15 +341,16 @@ EXPORT_SYMBOL_GPL(spi_alloc_device);
  int spi_add_device(struct spi_device *spi)
  {
   static DEFINE_MUTEX(spi_add_lock);
 - struct device *dev = spi-master-dev.parent;
 + struct spi_master *master = spi-master;
 + struct device *dev = master-dev.parent;
   struct device *d;
   int status;
  
   /* Chipselects are numbered 0..max; validate. */
 - if (spi-chip_select = spi-master-num_chipselect) {
 + if (spi-chip_select = master-num_chipselect) {
   dev_err(dev, cs%d = max %d\n,
   spi-chip_select,
 - spi-master-num_chipselect);
 + master-num_chipselect);
   return -EINVAL;
   }
  
 @@ -371,6 +374,13 @@ int spi_add_device(struct spi_device *spi)
   goto done;
   }
  
 + if (master-num_gpio_cs 
 + spi-chip_select = master-first_gpio_cs) {
 + int num = spi-chip_select - master-first_gpio_cs;
 +
 + spi-cs_gpio = master-cs_gpios[num];

spi-cs_gpio isn't used anywhere.

 + }
 +
   /* Drivers may modify this initial i/o setup, but will
* normally rely on the device being setup.  Devices
* using SPI_CS_HIGH can't coexist well otherwise...
 @@ -561,6 +571,43 @@ struct spi_master *spi_alloc_master(struct device *dev, 
 unsigned size)
  }
  EXPORT_SYMBOL_GPL(spi_alloc_master);
  
 +#ifdef CONFIG_OF
 +static int of_spi_register_master(struct spi_master *master)
 +{
 + int nb, i;
 + int *cs;
 + struct device_node *np = master-dev.of_node;
 +
 + if (!np)
 + return 0;
 +
 + nb = of_gpio_named_count(np, cs-gpios);
 +
 + if (nb  1)
 + return 0;
 +
 + cs = devm_kzalloc(master-dev, sizeof(int) * nb, GFP_KERNEL);
 + master-cs_gpios = cs;
 +
 + if (!master-cs_gpios)
 + return -ENOMEM;
 +
 + master-first_gpio_cs = master-num_chipselect;
 + master-num_chipselect += nb;
 + 

Re: [PATCH 6/6] spi/s3c64xx: Allow usage for ARCH_S3C24XX

[Grant Likely]

On Sun, 4 Mar 2012 19:09:10 +0100, Heiko Stübner he...@sntech.de wrote:
 Newer SoCs from the S3C24XX line, namely S3C2416/2443/2450 contain
 hsspi-controllers compatible with the s3c64xx type.
 
 The previous patches enabled platform support for it, so make the
 driver also usable for the S3C24xx architecture.
 
 Signed-off-by: Heiko Stuebner he...@sntech.de

Acked-by: Grant Likely grant.lik...@secretlab.ca

 ---
 As it is part of a series this probably needs an ack from Grant Likely
 and should be merged via the samsung tree.
 
  drivers/spi/Kconfig |2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)
 
 diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
 index ac92194..e411364 100644
 --- a/drivers/spi/Kconfig
 +++ b/drivers/spi/Kconfig
 @@ -299,7 +299,7 @@ config SPI_S3C24XX_FIQ
  
  config SPI_S3C64XX
   tristate Samsung S3C64XX series type SPI
 - depends on (ARCH_S3C64XX || ARCH_S5P64X0 || ARCH_EXYNOS)
 + depends on (ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5P64X0 || ARCH_EXYNOS)
   select S3C64XX_DMA if ARCH_S3C64XX
   help
 SPI driver for Samsung S3C64XX and newer SoCs.
 -- 
 1.7.2.3
 

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Re: [PATCH v3] spi: Add SuperH HSPI prototype driver

[Grant Likely]

On Thu, Mar 1, 2012 at 6:10 PM, Kuninori Morimoto
kuninori.morimoto...@renesas.com wrote:
 This patch adds SuperH HSPI driver.
 It is still prototype driver, but has enough function at this point.

 Signed-off-by: Kuninori Morimoto kuninori.morimoto...@renesas.com

Applied, thanks.

However, the spi subsystem is getting new support for core-queuing in
v3.4.  You should craft a patch before v3.5 to use the new
infrastructure.

g.

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Re: [PATCH] spi: Trivial warning fix

[Grant Likely]

On Mon, 27 Feb 2012 19:29:05 +0530, Shubhrajyoti D shubhrajy...@ti.com wrote:
 The loop count i traverses for ntrans which is unsigned
 so make the loop count i also unsigned.
 
 Fix the below warning
 In file included from drivers/spi/spi-omap2-mcspi.c:38:
 include/linux/spi/spi.h: In function 'spi_message_alloc':
 include/linux/spi/spi.h:556: warning: comparison between signed and unsigned 
 integer expressions
 
 Cc: Vitaly Wool vw...@ru.mvista.com
 Signed-off-by: Shubhrajyoti D shubhrajy...@ti.com
 ---

Applied, thanks.

g.

 Untested !
 
  include/linux/spi/spi.h |2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)
 
 diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
 index 176fce9..6ae4993 100644
 --- a/include/linux/spi/spi.h
 +++ b/include/linux/spi/spi.h
 @@ -549,7 +549,7 @@ static inline struct spi_message 
 *spi_message_alloc(unsigned ntrans, gfp_t flags
   + ntrans * sizeof(struct spi_transfer),
   flags);
   if (m) {
 - int i;
 + unsigned i;
   struct spi_transfer *t = (struct spi_transfer *)(m + 1);
  
   INIT_LIST_HEAD(m-transfers);
 -- 
 1.7.0.4
 
 
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[PATCH 1/4 v5] of_spi: add generic binding support to specify cs gpio

[Jean-Christophe PLAGNIOL-VILLARD]

This will allow to use gpio for chip select with no modification in the
driver binding

When use the cs-gpios, the gpio number will be passed via the cs_gpio field
and the number of chip select will automatically increased.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: devicetree-disc...@lists.ozlabs.org
Cc: spi-devel-general@lists.sourceforge.net
---
v5:
update grant comment to simplify the cs_gpio management

Best Regards,
J.
 Documentation/devicetree/bindings/spi/spi-bus.txt |6 ++
 drivers/spi/spi.c |   55 +++-
 include/linux/spi/spi.h   |4 ++
 3 files changed, 62 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt 
b/Documentation/devicetree/bindings/spi/spi-bus.txt
index e782add..c253379 100644
--- a/Documentation/devicetree/bindings/spi/spi-bus.txt
+++ b/Documentation/devicetree/bindings/spi/spi-bus.txt
@@ -12,6 +12,7 @@ The SPI master node requires the following properties:
 - #size-cells - should be zero.
 - compatible  - name of SPI bus controller following generic names
recommended practice.
+- cs-gpios   - (optional) gpios chip select.
 No other properties are required in the SPI bus node.  It is assumed
 that a driver for an SPI bus device will understand that it is an SPI bus.
 However, the binding does not attempt to define the specific method for
@@ -21,6 +22,8 @@ assumption that board specific platform code will be used to 
manage
 chip selects.  Individual drivers can define additional properties to
 support describing the chip select layout.
 
+If cs-gpios is used the number of chip select will automatically increased.
+
 SPI slave nodes must be children of the SPI master node and can
 contain the following properties.
 - reg - (required) chip select address of device.
@@ -34,6 +37,9 @@ contain the following properties.
 - spi-cs-high - (optional) Empty property indicating device requires
chip select active high
 
+If a gpio chipselect is used for the SPI slave the gpio number will be passed
+via the cs_gpio
+
 SPI example for an MPC5200 SPI bus:
spi@f00 {
#address-cells = 1;
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index b2ccdea..446eee5 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -28,6 +28,7 @@
 #include linux/mod_devicetable.h
 #include linux/spi/spi.h
 #include linux/of_spi.h
+#include linux/of_gpio.h
 #include linux/pm_runtime.h
 #include linux/export.h
 
@@ -322,6 +323,7 @@ struct spi_device *spi_alloc_device(struct spi_master 
*master)
spi-dev.parent = master-dev;
spi-dev.bus = spi_bus_type;
spi-dev.release = spidev_release;
+   spi-cs_gpio = -EINVAL;
device_initialize(spi-dev);
return spi;
 }
@@ -339,15 +341,16 @@ EXPORT_SYMBOL_GPL(spi_alloc_device);
 int spi_add_device(struct spi_device *spi)
 {
static DEFINE_MUTEX(spi_add_lock);
-   struct device *dev = spi-master-dev.parent;
+   struct spi_master *master = spi-master;
+   struct device *dev = master-dev.parent;
struct device *d;
int status;
 
/* Chipselects are numbered 0..max; validate. */
-   if (spi-chip_select = spi-master-num_chipselect) {
+   if (spi-chip_select = master-num_chipselect) {
dev_err(dev, cs%d = max %d\n,
spi-chip_select,
-   spi-master-num_chipselect);
+   master-num_chipselect);
return -EINVAL;
}
 
@@ -371,6 +374,9 @@ int spi_add_device(struct spi_device *spi)
goto done;
}
 
+   if (master-cs_gpios)
+   spi-cs_gpio = master-cs_gpios[spi-chip_select];
+
/* Drivers may modify this initial i/o setup, but will
 * normally rely on the device being setup.  Devices
 * using SPI_CS_HIGH can't coexist well otherwise...
@@ -561,6 +567,45 @@ struct spi_master *spi_alloc_master(struct device *dev, 
unsigned size)
 }
 EXPORT_SYMBOL_GPL(spi_alloc_master);
 
+#ifdef CONFIG_OF
+static int of_spi_register_master(struct spi_master *master)
+{
+   int nb, i;
+   int *cs;
+   struct device_node *np = master-dev.of_node;
+
+   if (!np)
+   return 0;
+
+   nb = of_gpio_named_count(np, cs-gpios);
+
+   if (nb  1)
+   return 0;
+
+   cs = devm_kzalloc(master-dev,
+ sizeof(int) * (master-num_chipselect + nb),
+ GFP_KERNEL);
+   master-cs_gpios = cs;
+
+   if (!master-cs_gpios)
+   return -ENOMEM;
+
+   memset(cs, -EINVAL, master-num_chipselect);
+   master-num_chipselect += nb;
+   cs += master-num_chipselect;
+
+   for (i = 0; i  nb; i++)
+   cs[i] = of_get_named_gpio(np, cs-gpios, i);
+
+   return 0;
+}
+#else
+static int of_spi_register_master(struct 

Re: [PATCH] spi/doc: spi_master_put must be followed up by kfree

[Grant Likely]

On Thu, 23 Feb 2012 10:40:14 +0100, Uwe Kleine-König 
u.kleine-koe...@pengutronix.de wrote:
 Signed-off-by: Uwe Kleine-König u.kleine-koe...@pengutronix.de

Applied, thanks.

g.

 ---
  drivers/spi/spi.c |3 ++-
  1 files changed, 2 insertions(+), 1 deletions(-)
 
 diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
 index b2ccdea..4be88d7 100644
 --- a/drivers/spi/spi.c
 +++ b/drivers/spi/spi.c
 @@ -539,7 +539,8 @@ static struct class spi_master_class = {
   *
   * The caller is responsible for assigning the bus number and initializing
   * the master's methods before calling spi_register_master(); and (after 
 errors
 - * adding the device) calling spi_master_put() to prevent a memory leak.
 + * adding the device) calling spi_master_put() and kfree() to prevent a 
 memory
 + * leak.
   */
  struct spi_master *spi_alloc_master(struct device *dev, unsigned size)
  {
 -- 
 1.7.9
 

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Secret Lab Technologies,Ltd.

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Re: [PATCH] spi: controller drivers don't need to depend on SPI_MASTER explicitly

[Grant Likely]

On Thu, 23 Feb 2012 10:37:55 +0100, Uwe Kleine-König 
u.kleine-koe...@pengutronix.de wrote:
 They are all defined in an if SPI_MASTER ... endif block.
 
 Signed-off-by: Uwe Kleine-König u.kleine-koe...@pengutronix.de

Applied, thanks

g.

 ---
  drivers/spi/Kconfig |   11 +--
  1 files changed, 5 insertions(+), 6 deletions(-)
 
 diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
 index 8293658..c1fb568 100644
 --- a/drivers/spi/Kconfig
 +++ b/drivers/spi/Kconfig
 @@ -126,7 +126,7 @@ config SPI_COLDFIRE_QSPI
  
  config SPI_DAVINCI
   tristate Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller
 - depends on SPI_MASTER  ARCH_DAVINCI
 + depends on ARCH_DAVINCI
   select SPI_BITBANG
   help
 SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules.
 @@ -188,7 +188,7 @@ config SPI_MPC52xx_PSC
  
  config SPI_MPC512x_PSC
   tristate Freescale MPC512x PSC SPI controller
 - depends on SPI_MASTER  PPC_MPC512x
 + depends on PPC_MPC512x
   help
 This enables using the Freescale MPC5121 Programmable Serial
 Controller in SPI master mode.
 @@ -238,7 +238,7 @@ config SPI_OMAP24XX
  
  config SPI_OMAP_100K
   tristate OMAP SPI 100K
 - depends on SPI_MASTER  (ARCH_OMAP850 || ARCH_OMAP730)
 + depends on ARCH_OMAP850 || ARCH_OMAP730
   help
 OMAP SPI 100K master controller for omap7xx boards.
  
 @@ -262,7 +262,7 @@ config SPI_PL022
  
  config SPI_PPC4xx
   tristate PPC4xx SPI Controller
 - depends on PPC32  4xx  SPI_MASTER
 + depends on PPC32  4xx
   select SPI_BITBANG
   help
 This selects a driver for the PPC4xx SPI Controller.
 @@ -326,7 +326,7 @@ config SPI_SH_SCI
  
  config SPI_STMP3XXX
   tristate Freescale STMP37xx/378x SPI/SSP controller
 - depends on ARCH_STMP3XXX  SPI_MASTER
 + depends on ARCH_STMP3XXX
   help
 SPI driver for Freescale STMP37xx/378x SoC SSP interface
  
 @@ -384,7 +384,6 @@ config SPI_NUC900
  
  config SPI_DESIGNWARE
   tristate DesignWare SPI controller core support
 - depends on SPI_MASTER
   help
 general driver for SPI controller core from DesignWare
  
 -- 
 1.7.9
 

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Re: [PATCH] spi/s3c64xx: Convert to using core message queue

[Grant Likely]

On Wed, 15 Feb 2012 14:48:32 -0800, Mark Brown 
broo...@opensource.wolfsonmicro.com wrote:
 Convert the s3c64xx driver to using the new message queue factored out of
 the pl022 driver by Linus Walleij, saving us a nice block of code and
 getting the benefits of improvements implemented in the core.
 
 Signed-off-by: Mark Brown broo...@opensource.wolfsonmicro.com

Applied, thanks

g.

 ---
 
 Only lightly tested thus far.  Linus, it'd be really nice if you could
 add this to your patch queue for this feature until it's merged by
 Grant.
 
  drivers/spi/spi-s3c64xx.c |  125 
 -
  1 files changed, 22 insertions(+), 103 deletions(-)
 
 diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
 index b899af66..1174d80 100644
 --- a/drivers/spi/spi-s3c64xx.c
 +++ b/drivers/spi/spi-s3c64xx.c
 @@ -128,8 +128,6 @@
  
  #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
  
 -#define SUSPND(10)
 -#define SPIBUSY   (11)
  #define RXBUSY(12)
  #define TXBUSY(13)
  
 @@ -144,10 +142,8 @@ struct s3c64xx_spi_dma_data {
   * @clk: Pointer to the spi clock.
   * @src_clk: Pointer to the clock used to generate SPI signals.
   * @master: Pointer to the SPI Protocol master.
 - * @workqueue: Work queue for the SPI xfer requests.
   * @cntrlr_info: Platform specific data for the controller this driver 
 manages.
   * @tgl_spi: Pointer to the last CS left untoggled by the cs_change hint.
 - * @work: Work
   * @queue: To log SPI xfer requests.
   * @lock: Controller specific lock.
   * @state: Set of FLAGS to indicate status.
 @@ -167,10 +163,8 @@ struct s3c64xx_spi_driver_data {
   struct clk  *src_clk;
   struct platform_device  *pdev;
   struct spi_master   *master;
 - struct workqueue_struct *workqueue;
   struct s3c64xx_spi_info  *cntrlr_info;
   struct spi_device   *tgl_spi;
 - struct work_struct  work;
   struct list_headqueue;
   spinlock_t  lock;
   unsigned long   sfr_start;
 @@ -637,9 +631,10 @@ static void s3c64xx_spi_unmap_mssg(struct 
 s3c64xx_spi_driver_data *sdd,
   }
  }
  
 -static void handle_msg(struct s3c64xx_spi_driver_data *sdd,
 - struct spi_message *msg)
 +static int s3c64xx_spi_transfer_one_message(struct spi_master *master,
 + struct spi_message *msg)
  {
 + struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
   struct s3c64xx_spi_info *sci = sdd-cntrlr_info;
   struct spi_device *spi = msg-spi;
   struct s3c64xx_spi_csinfo *cs = spi-controller_data;
 @@ -771,13 +766,15 @@ out:
  
   if (msg-complete)
   msg-complete(msg-context);
 +
 + spi_finalize_current_message(master);
 +
 + return 0;
  }
  
 -static void s3c64xx_spi_work(struct work_struct *work)
 +static int s3c64xx_spi_prepare_transfer(struct spi_master *spi)
  {
 - struct s3c64xx_spi_driver_data *sdd = container_of(work,
 - struct s3c64xx_spi_driver_data, work);
 - unsigned long flags;
 + struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi);
  
   /* Acquire DMA channels */
   while (!acquire_dma(sdd))
 @@ -785,61 +782,18 @@ static void s3c64xx_spi_work(struct work_struct *work)
  
   pm_runtime_get_sync(sdd-pdev-dev);
  
 - spin_lock_irqsave(sdd-lock, flags);
 -
 - while (!list_empty(sdd-queue)
 -  !(sdd-state  SUSPND)) {
 -
 - struct spi_message *msg;
 -
 - msg = container_of(sdd-queue.next, struct spi_message, queue);
 -
 - list_del_init(msg-queue);
 -
 - /* Set Xfer busy flag */
 - sdd-state |= SPIBUSY;
 -
 - spin_unlock_irqrestore(sdd-lock, flags);
 -
 - handle_msg(sdd, msg);
 -
 - spin_lock_irqsave(sdd-lock, flags);
 -
 - sdd-state = ~SPIBUSY;
 - }
 + return 0;
 +}
  
 - spin_unlock_irqrestore(sdd-lock, flags);
 +static int s3c64xx_spi_unprepare_transfer(struct spi_master *spi)
 +{
 + struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi);
  
   /* Free DMA channels */
   sdd-ops-release(sdd-rx_dma.ch, s3c64xx_spi_dma_client);
   sdd-ops-release(sdd-tx_dma.ch, s3c64xx_spi_dma_client);
  
   pm_runtime_put(sdd-pdev-dev);
 -}
 -
 -static int s3c64xx_spi_transfer(struct spi_device *spi,
 - struct spi_message *msg)
 -{
 - struct s3c64xx_spi_driver_data *sdd;
 - unsigned long flags;
 -
 - sdd = spi_master_get_devdata(spi-master);
 -
 - spin_lock_irqsave(sdd-lock, flags);
 -
 - if (sdd-state  SUSPND) {
 - spin_unlock_irqrestore(sdd-lock, flags);
 - return -ESHUTDOWN;
 - }
 -
 - msg-status = -EINPROGRESS;
 - 

Re: [PATCH] spi: Mark spi_register_board_info() __devinit

[Grant Likely]

On Fri, 17 Feb 2012 16:23:29 -0800, Mark Brown 
broo...@opensource.wolfsonmicro.com wrote:
 Some systems have SPI devices located on plugin modules which are
 enumerated at runtime as devices. The drivers for these plugin modules
 need to register their SPI devices at probe() time so want to be able
 to call spi_register_board_info() but that function is currently marked
 as __init rather than __devinit so this usage isn't legal. Change the
 annotation to __devinit to handle this.
 
 Signed-off-by: Mark Brown broo...@opensource.wolfsonmicro.com

Applied, thanks.

g.

 ---
  drivers/spi/spi.c |2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)
 
 diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
 index 909e303..0c833a9 100644
 --- a/drivers/spi/spi.c
 +++ b/drivers/spi/spi.c
 @@ -484,7 +484,7 @@ static void spi_match_master_to_boardinfo(struct 
 spi_master *master,
   * The board info passed can safely be __initdata ... but be careful of
   * any embedded pointers (platform_data, etc), they're copied as-is.
   */
 -int __init
 +int __devinit
  spi_register_board_info(struct spi_board_info const *info, unsigned n)
  {
   struct boardinfo *bi;
 -- 
 1.7.9
 

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Secret Lab Technologies,Ltd.

--
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Re: [PATCH v2] spi-topcliff-pch: fix -Wuninitialized warning

[Grant Likely]

On Tue, 14 Feb 2012 15:35:03 +0100, Danny Kukawka danny.kuka...@bisect.de 
wrote:
 Fix for:
 drivers/spi/spi-topcliff-pch.c: In function ‘pch_spi_handler_sub’:
 drivers/spi/spi-topcliff-pch.c:325:17: warning: ‘bpw_len’ may be
   used uninitialized in this function [-Wuninitialized]
 drivers/spi/spi-topcliff-pch.c:325:42: warning: ‘rx_index’ may be
   used uninitialized in this function [-Wuninitialized]
 drivers/spi/spi-topcliff-pch.c:325:42: warning: ‘tx_index’ may be
   used uninitialized in this function [-Wuninitialized]
 
 Move usage of tx_index, rx_index and bpw_len into the same
 block as where they are set to prevent uninitialized usage.
 
 v2: instead of init variables with 0 move the whole block
 
 Signed-off-by: Danny Kukawka danny.kuka...@bisect.de

Applied, thanks

g.

 ---
  drivers/spi/spi-topcliff-pch.c |   33 +++
  1 files changed, 17 insertions(+), 16 deletions(-)
 
 diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c
 index 10182eb..1107469 100644
 --- a/drivers/spi/spi-topcliff-pch.c
 +++ b/drivers/spi/spi-topcliff-pch.c
 @@ -318,22 +318,23 @@ static void pch_spi_handler_sub(struct pch_spi_data 
 *data, u32 reg_spsr_val,
   data-tx_index = tx_index;
   data-rx_index = rx_index;
  
 - }
 -
 - /* if transfer complete interrupt */
 - if (reg_spsr_val  SPSR_FI_BIT) {
 - if ((tx_index == bpw_len)  (rx_index == tx_index)) {
 - /* disable interrupts */
 - pch_spi_setclr_reg(data-master, PCH_SPCR, 0, PCH_ALL);
 -
 - /* transfer is completed;
 -inform pch_spi_process_messages */
 - data-transfer_complete = true;
 - data-transfer_active = false;
 - wake_up(data-wait);
 - } else {
 - dev_err(data-master-dev,
 - %s : Transfer is not completed, __func__);
 + /* if transfer complete interrupt */
 + if (reg_spsr_val  SPSR_FI_BIT) {
 + if ((tx_index == bpw_len)  (rx_index == tx_index)) {
 + /* disable interrupts */
 + pch_spi_setclr_reg(data-master, PCH_SPCR, 0,
 +PCH_ALL);
 +
 + /* transfer is completed;
 +inform pch_spi_process_messages */
 + data-transfer_complete = true;
 + data-transfer_active = false;
 + wake_up(data-wait);
 + } else {
 + dev_err(data-master-dev,
 + %s : Transfer is not completed,
 + __func__);
 + }
   }
   }
  }
 -- 
 1.7.7.3
 

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Re: [PATCH v4] SPI: add CSR SiRFprimaII SPI controller driver

[Grant Likely]

On Mon, 13 Feb 2012 17:45:38 +0800, Barry Song barry.s...@csr.com wrote:
 From: Zhiwu Song zhiwu.s...@csr.com
 
 CSR SiRFprimaII has two SPIs (SPI0 and SPI1). Features:
 * Master and slave modes
 * 8-/12-/16-/32-bit data unit
 * 256 bytes receive data FIFO and 256 bytes transmit data FIFO
 * Multi-unit frame
 * Configurable SPI_EN (chip select pin) active state
 * Configurable SPI_CLK polarity
 * Configurable SPI_CLK phase
 * Configurable MSB/LSB first
 
 Signed-off-by: Zhiwu Song zhiwu.s...@csr.com
 Signed-off-by: Barry Song baohua.s...@csr.com

Applied, thanks.

However, the spi subsystem now implements core queuing.  I'd like you
to remove the queuing from this driver to use the code supplied by the
core and have a patch ready for v3.5

Thanks,
g.

 ---
  -v4:
  delete controller_data and spi_sirf.h head file, let spi controller driver
  handle all chipselect related issues;
  cleanup some minor issues.
 
  Documentation/devicetree/bindings/spi/spi_sirf.txt |   19 +
  drivers/spi/Kconfig|7 +
  drivers/spi/Makefile   |1 +
  drivers/spi/spi-sirf.c |  687 
 
  4 files changed, 714 insertions(+), 0 deletions(-)
  create mode 100644 Documentation/devicetree/bindings/spi/spi_sirf.txt
  create mode 100644 drivers/spi/spi-sirf.c
 
 diff --git a/Documentation/devicetree/bindings/spi/spi_sirf.txt 
 b/Documentation/devicetree/bindings/spi/spi_sirf.txt
 new file mode 100644
 index 000..dc20cd5
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/spi/spi_sirf.txt
 @@ -0,0 +1,19 @@
 +* CSR SiRFprimaII Serial Peripheral Interface
 +
 +Required properties:
 +- compatible : Should be sirf,prima2-spi
 +- reg : Offset and length of the register set for the device
 +- interrupts : Should contain SPI interrupt
 +- sirf,spi-num-chipselects : Contains the number of the chipselect
 +- cs-gpios : Specifies the gpio pins to be used for chipselects.
 +
 +Example:
 +
 +spi0: spi@b00d {
 + compatible = sirf,prima2-spi;
 + reg = 0xb00d 0x1;
 + interrupts = 15;
 + sirf,spi-num-chipselects = 2;
 + cs-gpios = gpio 18 0,
 +gpio 19 0;
 +};
 diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
 index 3f9a47e..8311cc2 100644
 --- a/drivers/spi/Kconfig
 +++ b/drivers/spi/Kconfig
 @@ -324,6 +324,13 @@ config SPI_SH_SCI
   help
 SPI driver for SuperH SCI blocks.
  
 +config SPI_SIRF
 +tristate CSR SiRFprimaII SPI controller
 + depends on ARCH_PRIMA2
 + select SPI_BITBANG
 + help
 +   SPI driver for CSR SiRFprimaII SoCs
 +
  config SPI_STMP3XXX
   tristate Freescale STMP37xx/378x SPI/SSP controller
   depends on ARCH_STMP3XXX  SPI_MASTER
 diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
 index 61c3261..e919846 100644
 --- a/drivers/spi/Makefile
 +++ b/drivers/spi/Makefile
 @@ -51,6 +51,7 @@ obj-$(CONFIG_SPI_S3C64XX)   += spi-s3c64xx.o
  obj-$(CONFIG_SPI_SH) += spi-sh.o
  obj-$(CONFIG_SPI_SH_MSIOF)   += spi-sh-msiof.o
  obj-$(CONFIG_SPI_SH_SCI) += spi-sh-sci.o
 +obj-$(CONFIG_SPI_SIRF)   += spi-sirf.o
  obj-$(CONFIG_SPI_STMP3XXX)   += spi-stmp.o
  obj-$(CONFIG_SPI_TEGRA)  += spi-tegra.o
  obj-$(CONFIG_SPI_TI_SSP) += spi-ti-ssp.o
 diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c
 new file mode 100644
 index 000..52fe495
 --- /dev/null
 +++ b/drivers/spi/spi-sirf.c
 @@ -0,0 +1,687 @@
 +/*
 + * SPI bus driver for CSR SiRFprimaII
 + *
 + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group 
 company.
 + *
 + * Licensed under GPLv2 or later.
 + */
 +
 +#include linux/module.h
 +#include linux/kernel.h
 +#include linux/slab.h
 +#include linux/clk.h
 +#include linux/interrupt.h
 +#include linux/io.h
 +#include linux/of.h
 +#include linux/bitops.h
 +#include linux/err.h
 +#include linux/platform_device.h
 +#include linux/of_gpio.h
 +#include linux/spi/spi.h
 +#include linux/spi/spi_bitbang.h
 +#include linux/pinctrl/pinmux.h
 +
 +#define DRIVER_NAME sirfsoc_spi
 +
 +#define SIRFSOC_SPI_CTRL 0x
 +#define SIRFSOC_SPI_CMD  0x0004
 +#define SIRFSOC_SPI_TX_RX_EN 0x0008
 +#define SIRFSOC_SPI_INT_EN   0x000C
 +#define SIRFSOC_SPI_INT_STATUS   0x0010
 +#define SIRFSOC_SPI_TX_DMA_IO_CTRL   0x0100
 +#define SIRFSOC_SPI_TX_DMA_IO_LEN0x0104
 +#define SIRFSOC_SPI_TXFIFO_CTRL  0x0108
 +#define SIRFSOC_SPI_TXFIFO_LEVEL_CHK 0x010C
 +#define SIRFSOC_SPI_TXFIFO_OP0x0110
 +#define SIRFSOC_SPI_TXFIFO_STATUS0x0114
 +#define SIRFSOC_SPI_TXFIFO_DATA  0x0118
 +#define SIRFSOC_SPI_RX_DMA_IO_CTRL   0x0120
 +#define SIRFSOC_SPI_RX_DMA_IO_LEN0x0124
 +#define SIRFSOC_SPI_RXFIFO_CTRL  0x0128
 +#define SIRFSOC_SPI_RXFIFO_LEVEL_CHK 0x012C
 +#define SIRFSOC_SPI_RXFIFO_OP0x0130
 +#define 

Re: [PATCH] spi: Compatibility with direction which is used in samsung DMA operation

[Grant Likely]

On Wed, 08 Feb 2012 15:54:40 +0900, Kyoungil Kim ki0351@samsung.com wrote:
 Signed-off-by: Boojin Kim boojin@samsung.com
 Signed-off-by: Kyoungil Kim ki0351@samsung.com

I'm sorry, I don't understand the reason for the patch.  Please help a poor
maintainer out and include the reason *why* the patch is needed in the
commit text.

(repost with a proper commit log message).

g.

 ---
  drivers/spi/spi-s3c64xx.c |   10 +-
  1 files changed, 5 insertions(+), 5 deletions(-)
 
 diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
 index f3b7f6a..1972377 100644
 --- a/drivers/spi/spi-s3c64xx.c
 +++ b/drivers/spi/spi-s3c64xx.c
 @@ -239,7 +239,7 @@ static void s3c64xx_spi_dmacb(void *data)
   struct s3c64xx_spi_dma_data *dma = data;
   unsigned long flags;
  
 - if (dma-direction == DMA_FROM_DEVICE)
 + if (dma-direction == DMA_DEV_TO_MEM)
   sdd = container_of(data,
   struct s3c64xx_spi_driver_data, rx_dma);
   else
 @@ -248,7 +248,7 @@ static void s3c64xx_spi_dmacb(void *data)
  
   spin_lock_irqsave(sdd-lock, flags);
  
 - if (dma-direction == DMA_FROM_DEVICE) {
 + if (dma-direction == DMA_DEV_TO_MEM) {
   sdd-state = ~RXBUSY;
   if (!(sdd-state  TXBUSY))
   complete(sdd-xfer_completion);
 @@ -268,7 +268,7 @@ static void prepare_dma(struct s3c64xx_spi_dma_data *dma,
   struct samsung_dma_prep info;
   struct samsung_dma_config config;
  
 - if (dma-direction == DMA_FROM_DEVICE) {
 + if (dma-direction == DMA_DEV_TO_MEM) {
   sdd = container_of((void *)dma,
   struct s3c64xx_spi_driver_data, rx_dma);
  
 @@ -1028,9 +1028,9 @@ static int __init s3c64xx_spi_probe(struct 
 platform_device *pdev)
   sdd-pdev = pdev;
   sdd-sfr_start = mem_res-start;
   sdd-tx_dma.dmach = dmatx_res-start;
 - sdd-tx_dma.direction = DMA_TO_DEVICE;
 + sdd-tx_dma.direction = DMA_MEM_TO_DEV;
   sdd-rx_dma.dmach = dmarx_res-start;
 - sdd-rx_dma.direction = DMA_FROM_DEVICE;
 + sdd-rx_dma.direction = DMA_DEV_TO_MEM;
  
   sdd-cur_bpw = 8;
  
 -- 
 1.7.1
 
 

-- 
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Secret Lab Technologies,Ltd.

--
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Re: [PATCH v4] spi: add Broadcom BCM63xx SPI controller driver

[Grant Likely]

On Wed,  1 Feb 2012 11:14:09 +0100, Florian Fainelli flor...@openwrt.org 
wrote:
 This patch adds support for the SPI controller found on the Broadcom BCM63xx
 SoCs.
 
 Signed-off-by: Tanguy Bouzeloc tanguy.bouze...@efixo.com
 Signed-off-by: Florian Fainelli flor...@openwrt.org
 Acked-by: Grant Likely grant.lik...@secretlab.ca

Applied, thanks.

In v3.4, the spi subsystem is gaining core support for spi message queues.
You should look at migrating this driver to use it in the v3.5 timeframe.

g.

 ---
 Changes since v3:
 - changed bcm_spi_readb to use readb accessor instead of readw
 - fixed multiple __dev{init,exit} annotations
 
 Changes since v2:
 - reworked bcm63xx_spi_setup_transfer to choose closest spi transfer
   frequency
 - removed invalid 25Mhz frequency
 - fixed some minor checkpatch issues
 
 Changes since v1:
 - switched to the devm_* API which frees resources automatically
 - switched to dev_pm_ops
 - use module_platform_driver
 - remove MODULE_VERSION()
 - fixed return value when clock is not present using PTR_ERR()
 - fixed probe() error path to disable clock in case of failure
 
  drivers/spi/Kconfig   |6 +
  drivers/spi/Makefile  |1 +
  drivers/spi/spi-bcm63xx.c |  486 
 +
  3 files changed, 493 insertions(+), 0 deletions(-)
  create mode 100644 drivers/spi/spi-bcm63xx.c
 
 diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
 index 3f9a47e..16818ac 100644
 --- a/drivers/spi/Kconfig
 +++ b/drivers/spi/Kconfig
 @@ -94,6 +94,12 @@ config SPI_AU1550
 If you say yes to this option, support will be included for the
 PSC SPI controller found on Au1550, Au1200 and Au1300 series.
  
 +config SPI_BCM63XX
 + tristate Broadcom BCM63xx SPI controller
 + depends on BCM63XX
 + help
 +  Enable support for the SPI controller on the Broadcom BCM63xx SoCs.
 +
  config SPI_BITBANG
   tristate Utilities for Bitbanging SPI masters
   help
 diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
 index 61c3261..be38f73 100644
 --- a/drivers/spi/Makefile
 +++ b/drivers/spi/Makefile
 @@ -14,6 +14,7 @@ obj-$(CONFIG_SPI_ALTERA)+= spi-altera.o
  obj-$(CONFIG_SPI_ATMEL)  += spi-atmel.o
  obj-$(CONFIG_SPI_ATH79)  += spi-ath79.o
  obj-$(CONFIG_SPI_AU1550) += spi-au1550.o
 +obj-$(CONFIG_SPI_BCM63XX)+= spi-bcm63xx.o
  obj-$(CONFIG_SPI_BFIN)   += spi-bfin5xx.o
  obj-$(CONFIG_SPI_BFIN_SPORT) += spi-bfin-sport.o
  obj-$(CONFIG_SPI_BITBANG)+= spi-bitbang.o
 diff --git a/drivers/spi/spi-bcm63xx.c b/drivers/spi/spi-bcm63xx.c
 new file mode 100644
 index 000..f01b264
 --- /dev/null
 +++ b/drivers/spi/spi-bcm63xx.c
 @@ -0,0 +1,486 @@
 +/*
 + * Broadcom BCM63xx SPI controller support
 + *
 + * Copyright (C) 2009-2011 Florian Fainelli flor...@openwrt.org
 + * Copyright (C) 2010 Tanguy Bouzeloc tanguy.bouze...@efixo.com
 + *
 + * This program is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU General Public License
 + * as published by the Free Software Foundation; either version 2
 + * of the License, or (at your option) any later version.
 + *
 + * This program is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 + * GNU General Public License for more details.
 + *
 + * You should have received a copy of the GNU General Public License
 + * along with this program; if not, write to the
 + * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
 + */
 +
 +#include linux/kernel.h
 +#include linux/init.h
 +#include linux/clk.h
 +#include linux/io.h
 +#include linux/module.h
 +#include linux/platform_device.h
 +#include linux/delay.h
 +#include linux/interrupt.h
 +#include linux/spi/spi.h
 +#include linux/completion.h
 +#include linux/err.h
 +
 +#include bcm63xx_dev_spi.h
 +
 +#define PFX  KBUILD_MODNAME
 +#define DRV_VER  0.1.2
 +
 +struct bcm63xx_spi {
 + spinlock_t  lock;
 + int stopping;
 + struct completion   done;
 +
 + void __iomem*regs;
 + int irq;
 +
 + /* Platform data */
 + u32 speed_hz;
 + unsignedfifo_size;
 +
 + /* Data buffers */
 + const unsigned char *tx_ptr;
 + unsigned char   *rx_ptr;
 +
 + /* data iomem */
 + u8 __iomem  *tx_io;
 + const u8 __iomem*rx_io;
 +
 + int remaining_bytes;
 +
 + struct clk  *clk;
 + struct platform_device  *pdev;
 +};
 +
 +static inline u8 bcm_spi_readb(struct bcm63xx_spi *bs,
 + unsigned int offset)
 +{
 + return bcm_readb(bs-regs + bcm63xx_spireg(offset));
 +}
 +
 +static inline u16 

[PATCH] spi: Compatibility with direction which is used in samsung DMA operation

[Kyoungil Kim]

I found that there are two kind of direction type.
First one is dma_data_direction defined in include/linux/dma-direction.h.
It is used for parameter of dma_map/unmap_single in spi-s3c64xx.
The other one is dma_transter_direction defined in include/linux/dmaengine.h.
It is used for direction of samsung DMA operation
(arch/arm/plat-samsung/dma-ops.c).
This patch is just some changes to use direction defines
which is used in samsung DMA operation.

Signed-off-by: Boojin Kim boojin@samsung.com
Signed-off-by: Kyoungil Kim ki0351@samsung.com
---
 drivers/spi/spi-s3c64xx.c |   10 +-
 1 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index dcf7e10..003a1bf 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -239,7 +239,7 @@ static void s3c64xx_spi_dmacb(void *data)
struct s3c64xx_spi_dma_data *dma = data;
unsigned long flags;
 
-   if (dma-direction == DMA_FROM_DEVICE)
+   if (dma-direction == DMA_DEV_TO_MEM)
sdd = container_of(data,
struct s3c64xx_spi_driver_data, rx_dma);
else
@@ -248,7 +248,7 @@ static void s3c64xx_spi_dmacb(void *data)
 
spin_lock_irqsave(sdd-lock, flags);
 
-   if (dma-direction == DMA_FROM_DEVICE) {
+   if (dma-direction == DMA_DEV_TO_MEM) {
sdd-state = ~RXBUSY;
if (!(sdd-state  TXBUSY))
complete(sdd-xfer_completion);
@@ -267,7 +267,7 @@ static void prepare_dma(struct s3c64xx_spi_dma_data *dma,
struct s3c64xx_spi_driver_data *sdd;
struct samsung_dma_prep_info info;
 
-   if (dma-direction == DMA_FROM_DEVICE)
+   if (dma-direction == DMA_DEV_TO_MEM) {
sdd = container_of((void *)dma,
struct s3c64xx_spi_driver_data, rx_dma);
else
@@ -1021,9 +1021,9 @@ static int __init s3c64xx_spi_probe(struct 
platform_device *pdev)
sdd-pdev = pdev;
sdd-sfr_start = mem_res-start;
sdd-tx_dma.dmach = dmatx_res-start;
-   sdd-tx_dma.direction = DMA_TO_DEVICE;
+   sdd-tx_dma.direction = DMA_MEM_TO_DEV;
sdd-rx_dma.dmach = dmarx_res-start;
-   sdd-rx_dma.direction = DMA_FROM_DEVICE;
+   sdd-rx_dma.direction = DMA_DEV_TO_MEM;
 
sdd-cur_bpw = 8;
 
-- 
1.7.1


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Re: [PATCH 1/4] spi-topcliff-pch: Modify pci-bus number dynamically to get DMA device info

[Grant Likely]

On Fri,  9 Dec 2011 13:11:42 +0900, Tomoya MORINAGA tomoya.r...@gmail.com 
wrote:
 Signed-off-by: Tomoya MORINAGA tomoya.r...@gmail.com
 ---
  drivers/spi/spi-topcliff-pch.c |3 ++-
  1 files changed, 2 insertions(+), 1 deletions(-)
 
 diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c
 index 99ec279..fcd9462 100644
 --- a/drivers/spi/spi-topcliff-pch.c
 +++ b/drivers/spi/spi-topcliff-pch.c
 @@ -920,7 +920,8 @@ static void pch_spi_request_dma(struct pch_spi_data 
 *data, int bpw)
   dma_cap_set(DMA_SLAVE, mask);
  
   /* Get DMA's dev information */
 - dma_dev = pci_get_bus_and_slot(2, PCI_DEVFN(12, 0));
 + dma_dev = pci_get_bus_and_slot(data-board_dat-pdev-bus-number,
 +PCI_DEVFN(12, 0));

Applied, thanks

g.


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Re: [PATCH RESEND] spi/imx: simplify error handling to free gpios

[Grant Likely]

On Tue, 10 Jan 2012 15:27:36 +0800, Axel Lin axel@gmail.com wrote:
 Simplify the error handling by moving the code to free gpios in one place.
 
 Signed-off-by: Axel Lin axel@gmail.com
 Acked-by: Shawn Guo shawn@linaro.org

Applied, thanks.

g.

 ---
  drivers/spi/spi-imx.c |   11 +++
  1 files changed, 3 insertions(+), 8 deletions(-)
 
 diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
 index c6e697f..31054e3 100644
 --- a/drivers/spi/spi-imx.c
 +++ b/drivers/spi/spi-imx.c
 @@ -793,13 +793,8 @@ static int __devinit spi_imx_probe(struct 
 platform_device *pdev)
  
   ret = gpio_request(spi_imx-chipselect[i], DRIVER_NAME);
   if (ret) {
 - while (i  0) {
 - i--;
 - if (spi_imx-chipselect[i] = 0)
 - gpio_free(spi_imx-chipselect[i]);
 - }
   dev_err(pdev-dev, can't get cs gpios\n);
 - goto out_master_put;
 + goto out_gpio_free;
   }
   }
  
 @@ -881,10 +876,10 @@ out_iounmap:
  out_release_mem:
   release_mem_region(res-start, resource_size(res));
  out_gpio_free:
 - for (i = 0; i  master-num_chipselect; i++)
 + while (--i = 0) {
   if (spi_imx-chipselect[i] = 0)
   gpio_free(spi_imx-chipselect[i]);
 -out_master_put:
 + }
   spi_master_put(master);
   kfree(master);
   platform_set_drvdata(pdev, NULL);
 -- 
 1.7.5.4
 
 
 

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Re: [PATCH 1/4] spi-topcliff-pch: Modify pci-bus number dynamically to get DMA device info

[Grant Likely]

On Thu, 19 Jan 2012 11:34:43 +0900, Tomoya MORINAGA tomoya.r...@gmail.com 
wrote:
 Hi Grant.
 
 More than a month has been passed since I posted the following patches.
 However still not reviewed yet.
 
 [PATCH 1/4] spi-topcliff-pch: Modify pci-bus number dynamically to get
 DMA device info
 [PATCH 2/4] spi-topcliff-pch: Fix issue for transmitting over 4KByte
 [PATCH 3/4][RESEND] spi-topcliff-pch: supports a spi mode setup and
 bit order setup by IO control
 [PATCH 4/4] spi-topcliff-pch: add recovery processing in case wait-event 
 timeout
 
 Could you review these ?

I'm working through my backlog now.  A big part of the problem is my
method of dealing with pending patches really sucked.  I've switched
to using notmuch-vim, which seems to be a much better system for tracking
email that I need to pay attention to.

g.

 
 thanks,
 tomoya
 
 2011/12/9 Tomoya MORINAGA tomoya.r...@gmail.com:
  Signed-off-by: Tomoya MORINAGA tomoya.r...@gmail.com
  ---
   drivers/spi/spi-topcliff-pch.c |    3 ++-
   1 files changed, 2 insertions(+), 1 deletions(-)
 
  diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c
  index 99ec279..fcd9462 100644
  --- a/drivers/spi/spi-topcliff-pch.c
  +++ b/drivers/spi/spi-topcliff-pch.c
  @@ -920,7 +920,8 @@ static void pch_spi_request_dma(struct pch_spi_data 
  *data, int bpw)
         dma_cap_set(DMA_SLAVE, mask);
 
         /* Get DMA's dev information */
  -       dma_dev = pci_get_bus_and_slot(2, PCI_DEVFN(12, 0));
  +       dma_dev = 
  pci_get_bus_and_slot(data-board_dat-pdev-bus-number,
  +                                      PCI_DEVFN(12, 0));
 
         /* Set Tx DMA */
         param = dma-param_tx;
  --
  1.7.4.4
 

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Re: [PATCH V2 1/2] SPI: MIPS: lantiq: add FALC-ON spi driver

[Grant Likely]

On Fri,  9 Dec 2011 15:17:02 +0100, John Crispin blo...@openwrt.org wrote:
 The external bus unit (EBU) found on the FALC-ON SoC has spi emulation that is
 designed for serial flash access. This driver has only been tested with m25p80
 type chips. The hardware has no support for other types of spi peripherals.
 
 Signed-off-by: Thomas Langer thomas.lan...@lantiq.com
 Signed-off-by: John Crispin blo...@openwrt.org
 Cc: spi-devel-general@lists.sourceforge.net
 
 ---
 These 2 patches should go upstream via the MIPS tree

Acked-by: Grant Likely grant.lik...@secretlab.ca
(If I haven't already acked this one)

 
 Changes in V2
 * remove several superflous calls to dev_dbg
 * make use of module_platform_driver
 * remove falcon_spi_cleanup as it was an empty function
 * return real error codes instead of -1
 * fixes operator spacing errors
 * split arch and driver specific patches
 * squash some lines to make use of the full 80 available chars
 * Kconfig is now alphabetic again
 * replace BUG() with WARN_ON()
 
  drivers/spi/Kconfig  |9 +
  drivers/spi/Makefile |1 +
  drivers/spi/spi-falcon.c |  445 
 ++
  3 files changed, 455 insertions(+), 0 deletions(-)
  create mode 100644 drivers/spi/spi-falcon.c
 
 diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
 index a1fd73d..e5ce95d 100644
 --- a/drivers/spi/Kconfig
 +++ b/drivers/spi/Kconfig
 @@ -138,6 +138,15 @@ config SPI_EP93XX
 This enables using the Cirrus EP93xx SPI controller in master
 mode.
  
 +config SPI_FALCON
 + tristate Falcon SPI controller support
 + depends on SOC_FALCON
 + help
 +   The external bus unit (EBU) found on the FALC-ON SoC has SPI
 +   emulation that is designed for serial flash access. This driver
 +   has only been tested with m25p80 type chips. The hardware has no
 +   support for other types of spi peripherals.
 +
  config SPI_GPIO
   tristate GPIO-based bitbanging SPI Master
   depends on GENERIC_GPIO
 diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
 index 61c3261..570894c 100644
 --- a/drivers/spi/Makefile
 +++ b/drivers/spi/Makefile
 @@ -25,6 +25,7 @@ obj-$(CONFIG_SPI_DW_MMIO)   += spi-dw-mmio.o
  obj-$(CONFIG_SPI_DW_PCI) += spi-dw-midpci.o
  spi-dw-midpci-objs   := spi-dw-pci.o spi-dw-mid.o
  obj-$(CONFIG_SPI_EP93XX) += spi-ep93xx.o
 +obj-$(CONFIG_SPI_FALCON) += spi-falcon.o
  obj-$(CONFIG_SPI_FSL_LIB)+= spi-fsl-lib.o
  obj-$(CONFIG_SPI_FSL_ESPI)   += spi-fsl-espi.o
  obj-$(CONFIG_SPI_FSL_SPI)+= spi-fsl-spi.o
 diff --git a/drivers/spi/spi-falcon.c b/drivers/spi/spi-falcon.c
 new file mode 100644
 index 000..7aa044d
 --- /dev/null
 +++ b/drivers/spi/spi-falcon.c
 @@ -0,0 +1,445 @@
 +/*
 + *  This program is free software; you can redistribute it and/or modify it
 + *  under the terms of the GNU General Public License version 2 as published
 + *  by the Free Software Foundation.
 + *
 + *  Copyright (C) 2010 Thomas Langer thomas.lan...@lantiq.com
 + */
 +
 +#include linux/module.h
 +#include linux/device.h
 +#include linux/platform_device.h
 +#include linux/spi/spi.h
 +#include linux/delay.h
 +#include linux/workqueue.h
 +
 +#include lantiq_soc.h
 +
 +#define DRV_NAME falcon_spi
 +
 +#define FALCON_SPI_XFER_BEGIN(1  0)
 +#define FALCON_SPI_XFER_END  (1  1)
 +
 +/* Bus Read Configuration Register0 */
 +#define LTQ_BUSRCON0 0x0010
 +/* Bus Write Configuration Register0 */
 +#define LTQ_BUSWCON0 0x0018
 +/* Serial Flash Configuration Register */
 +#define LTQ_SFCON0x0080
 +/* Serial Flash Time Register */
 +#define LTQ_SFTIME   0x0084
 +/* Serial Flash Status Register */
 +#define LTQ_SFSTAT   0x0088
 +/* Serial Flash Command Register */
 +#define LTQ_SFCMD0x008C
 +/* Serial Flash Address Register */
 +#define LTQ_SFADDR   0x0090
 +/* Serial Flash Data Register */
 +#define LTQ_SFDATA   0x0094
 +/* Serial Flash I/O Control Register */
 +#define LTQ_SFIO 0x0098
 +/* EBU Clock Control Register */
 +#define LTQ_EBUCC0x00C4
 +
 +/* Dummy Phase Length */
 +#define SFCMD_DUMLEN_OFFSET  16
 +#define SFCMD_DUMLEN_MASK0x000F
 +/* Chip Select */
 +#define SFCMD_CS_OFFSET  24
 +#define SFCMD_CS_MASK0x0700
 +/* field offset */
 +#define SFCMD_ALEN_OFFSET20
 +#define SFCMD_ALEN_MASK  0x0070
 +/* SCK Rise-edge Position */
 +#define SFTIME_SCKR_POS_OFFSET   8
 +#define SFTIME_SCKR_POS_MASK 0x0F00
 +/* SCK Period */
 +#define SFTIME_SCK_PER_OFFSET0
 +#define SFTIME_SCK_PER_MASK  0x000F
 +/* SCK Fall-edge Position */
 +#define SFTIME_SCKF_POS_OFFSET   12
 +#define SFTIME_SCKF_POS_MASK 0xF000
 +/* Device Size */
 +#define SFCON_DEV_SIZE_A23_0 0x0300
 +#define SFCON_DEV_SIZE_MASK  0x0F00
 +/* Read Data Position */
 +#define SFTIME_RD_POS_MASK   

Re: [PATCH] spi: Convert to DEFINE_PCI_DEVICE_TABLE

[Grant Likely]

On Thu, 15 Dec 2011 08:11:25 +0800, Axel Lin axel@gmail.com wrote:
 Convert static struct pci_device_id *[] to static DEFINE_PCI_DEVICE_TABLE
 tables.
 
 Signed-off-by: Axel Lin axel@gmail.com

Applied, thanks.

g.

 ---
  drivers/spi/spi-dw-pci.c   |2 +-
  drivers/spi/spi-pxa2xx-pci.c   |2 +-
  drivers/spi/spi-topcliff-pch.c |2 +-
  3 files changed, 3 insertions(+), 3 deletions(-)
 
 diff --git a/drivers/spi/spi-dw-pci.c b/drivers/spi/spi-dw-pci.c
 index f64250e..14f7cc9 100644
 --- a/drivers/spi/spi-dw-pci.c
 +++ b/drivers/spi/spi-dw-pci.c
 @@ -149,7 +149,7 @@ static int spi_resume(struct pci_dev *pdev)
  #define spi_resume   NULL
  #endif
  
 -static const struct pci_device_id pci_ids[] __devinitdata = {
 +static DEFINE_PCI_DEVICE_TABLE(pci_ids) = {
   /* Intel MID platform SPI controller 0 */
   { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0800) },
   {},
 diff --git a/drivers/spi/spi-pxa2xx-pci.c b/drivers/spi/spi-pxa2xx-pci.c
 index 8caa07d..3fb44af 100644
 --- a/drivers/spi/spi-pxa2xx-pci.c
 +++ b/drivers/spi/spi-pxa2xx-pci.c
 @@ -151,7 +151,7 @@ static void __devexit ce4100_spi_remove(struct pci_dev 
 *dev)
   kfree(spi_info);
  }
  
 -static struct pci_device_id ce4100_spi_devices[] __devinitdata = {
 +static DEFINE_PCI_DEVICE_TABLE(ce4100_spi_devices) = {
   { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x2e6a) },
   { },
  };
 diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c
 index 99ec279..17274a5 100644
 --- a/drivers/spi/spi-topcliff-pch.c
 +++ b/drivers/spi/spi-topcliff-pch.c
 @@ -214,7 +214,7 @@ struct pch_pd_dev_save {
   struct pch_spi_board_data *board_dat;
  };
  
 -static struct pci_device_id pch_spi_pcidev_id[] = {
 +static DEFINE_PCI_DEVICE_TABLE(pch_spi_pcidev_id) = {
   { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_GE_SPI),1, },
   { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_SPI), 2, },
   { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7223_SPI), 1, },
 -- 
 1.7.5.4
 
 
 

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Re: [PATCH 2/4] spi-topcliff-pch: Fix issue for transmitting over 4KByte

[Grant Likely]

On Fri,  9 Dec 2011 13:13:27 +0900, Tomoya MORINAGA tomoya.r...@gmail.com 
wrote:
 Currently, when spi-topcliff-pch receives transmit request over 4KByte,
 this driver can't process correctly. This driver needs to divide the data
 into 4Kbyte unit.
 This patch fixes the issue.
 
 Signed-off-by: Tomoya MORINAGA tomoya.r...@gmail.com

Applied, thanks.

g.


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Re: [PATCH 3/4][RESEND] spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control

[Grant Likely]

On Fri,  9 Dec 2011 13:13:28 +0900, Tomoya MORINAGA tomoya.r...@gmail.com 
wrote:
 This patch supports a spi mode setup and bit order setup by IO control.
 spi mode: mode 0 to mode 3
 bit order:LSB first, MSB first
 
 Signed-off-by: Tomoya MORINAGA tomoya.r...@gmail.com

Applied, thanks.

g.

 ---
  drivers/spi/spi-topcliff-pch.c |1 +
  1 files changed, 1 insertions(+), 0 deletions(-)
 
 diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c
 index 7339765..1864555 100644
 --- a/drivers/spi/spi-topcliff-pch.c
 +++ b/drivers/spi/spi-topcliff-pch.c
 @@ -1430,6 +1430,7 @@ static int __devinit pch_spi_pd_probe(struct 
 platform_device *plat_dev)
   master-num_chipselect = PCH_MAX_CS;
   master-setup = pch_spi_setup;
   master-transfer = pch_spi_transfer;
 + master-mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
  
   data-board_dat = board_dat;
   data-plat_dev = plat_dev;
 -- 
 1.7.4.4
 

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Re: [PATCH 4/4] spi-topcliff-pch: add recovery processing in case wait-event timeout

[Grant Likely]

On Fri,  9 Dec 2011 13:13:29 +0900, Tomoya MORINAGA tomoya.r...@gmail.com 
wrote:
 Currently, pch_spi_start_transfer failure is not anticipated.
 This patch adds the processing.
 
 Signed-off-by: Tomoya MORINAGA tomoya.r...@gmail.com

Applied, thanks.

g.

 ---
  drivers/spi/spi-topcliff-pch.c |   10 +-
  1 files changed, 9 insertions(+), 1 deletions(-)
 
 diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c
 index 1864555..10b684c 100644
 --- a/drivers/spi/spi-topcliff-pch.c
 +++ b/drivers/spi/spi-topcliff-pch.c
 @@ -1262,8 +1262,16 @@ static void pch_spi_process_messages(struct 
 work_struct *pwork)
   char *save_rx_buf = data-cur_trans-rx_buf;
   for (i = 0; i  cnt; i ++) {
   pch_spi_handle_dma(data, bpw);
 - if (!pch_spi_start_transfer(data))
 + if (!pch_spi_start_transfer(data)) {
 + data-transfer_complete = true;
 + data-current_msg-status = -EIO;
 + data-current_msg-complete
 +(data-current_msg-context);
 + data-bcurrent_msg_processing = false;
 + data-current_msg = NULL;
 + data-cur_trans = NULL;
   goto out;
 + }
   pch_spi_copy_rx_data_for_dma(data, bpw);
   }
   data-cur_trans-rx_buf = save_rx_buf;
 -- 
 1.7.4.4
 

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Re: [PATCH] spi: Compatibility with direction which is used in samsung DMA operation

[Grant Likely]

On Sat, 10 Mar 2012 09:48:46 +0900, Kyoungil Kim ki0351@samsung.com wrote:
 I found that there are two kind of direction type.
 First one is dma_data_direction defined in include/linux/dma-direction.h.
 It is used for parameter of dma_map/unmap_single in spi-s3c64xx.
 The other one is dma_transter_direction defined in include/linux/dmaengine.h.
 It is used for direction of samsung DMA operation
 (arch/arm/plat-samsung/dma-ops.c).
 This patch is just some changes to use direction defines
 which is used in samsung DMA operation.
 
 Signed-off-by: Boojin Kim boojin@samsung.com
 Signed-off-by: Kyoungil Kim ki0351@samsung.com

Applied, thanks.

g.

 ---
  drivers/spi/spi-s3c64xx.c |   10 +-
  1 files changed, 5 insertions(+), 5 deletions(-)
 
 diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
 index dcf7e10..003a1bf 100644
 --- a/drivers/spi/spi-s3c64xx.c
 +++ b/drivers/spi/spi-s3c64xx.c
 @@ -239,7 +239,7 @@ static void s3c64xx_spi_dmacb(void *data)
   struct s3c64xx_spi_dma_data *dma = data;
   unsigned long flags;
  
 - if (dma-direction == DMA_FROM_DEVICE)
 + if (dma-direction == DMA_DEV_TO_MEM)
   sdd = container_of(data,
   struct s3c64xx_spi_driver_data, rx_dma);
   else
 @@ -248,7 +248,7 @@ static void s3c64xx_spi_dmacb(void *data)
  
   spin_lock_irqsave(sdd-lock, flags);
  
 - if (dma-direction == DMA_FROM_DEVICE) {
 + if (dma-direction == DMA_DEV_TO_MEM) {
   sdd-state = ~RXBUSY;
   if (!(sdd-state  TXBUSY))
   complete(sdd-xfer_completion);
 @@ -267,7 +267,7 @@ static void prepare_dma(struct s3c64xx_spi_dma_data *dma,
   struct s3c64xx_spi_driver_data *sdd;
   struct samsung_dma_prep_info info;
  
 - if (dma-direction == DMA_FROM_DEVICE)
 + if (dma-direction == DMA_DEV_TO_MEM) {
   sdd = container_of((void *)dma,
   struct s3c64xx_spi_driver_data, rx_dma);
   else
 @@ -1021,9 +1021,9 @@ static int __init s3c64xx_spi_probe(struct 
 platform_device *pdev)
   sdd-pdev = pdev;
   sdd-sfr_start = mem_res-start;
   sdd-tx_dma.dmach = dmatx_res-start;
 - sdd-tx_dma.direction = DMA_TO_DEVICE;
 + sdd-tx_dma.direction = DMA_MEM_TO_DEV;
   sdd-rx_dma.dmach = dmarx_res-start;
 - sdd-rx_dma.direction = DMA_FROM_DEVICE;
 + sdd-rx_dma.direction = DMA_DEV_TO_MEM;
  
   sdd-cur_bpw = 8;
  
 -- 
 1.7.1
 

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--
Virtualization  Cloud Management Using Capacity Planning
Cloud computing makes use of virtualization - but cloud computing 
also focuses on allowing computing to be delivered as a service.
http://www.accelacomm.com/jaw/sfnl/114/51521223/
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