RE: [PATCH v2 1/4] spi/davinci: add DT binding documentation
On Wed, Mar 06, 2013 at 01:02:41, Arnd Bergmann wrote: On Tuesday 05 March 2013, Manjunathappa, Prakash wrote: On Mon, Mar 04, 2013 at 21:59:16, Arnd Bergmann wrote: On Monday 04 March 2013 18:29:12 Manjunathappa, Prakash wrote: +- reg: Offset and length of SPI controller register space +- num-cs: Number of chip selects +- ti,davinci-spi-intr-line: interrupt line used to connect the SPI + IP to the interrupt controller withn the SoC. Possible values + are 0 and 1. Manual says one of the two possible interrupt + lines can be tied to the interrupt controller. Set this + based on a specifc SoC configuration. +- interrupts: interrupt number offset at the irq parent I would not call this an offset. It is an interrupt descriptor which may be something other than a simple number. I am planning to drop from this documentation as it is common property. I think it makese sense to document the fact that there should be exactly one interrupt listed in the interrupts property, especially since the hardware has two outputs. Agreed, will consider this property for documenting. Thanks, Prakash -- Symantec Endpoint Protection 12 positioned as A LEADER in The Forrester Wave(TM): Endpoint Security, Q1 2013 and remains a good choice in the endpoint security space. For insight on selecting the right partner to tackle endpoint security challenges, access the full report. http://p.sf.net/sfu/symantec-dev2dev ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
RE: [PATCH v2 1/4] spi/davinci: add DT binding documentation
Hi Arnd, On Mon, Mar 04, 2013 at 21:59:16, Arnd Bergmann wrote: On Monday 04 March 2013 18:29:12 Manjunathappa, Prakash wrote: diff --git a/Documentation/devicetree/bindings/spi/spi-davinci.txt b/Documentation/devicetree/bindings/spi/spi-davinci.txt new file mode 100644 index 000..a62d7a8 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-davinci.txt @@ -0,0 +1,51 @@ +Davinci SPI controller device bindings + +Required properties: +- #address-cells: number of cells required to define a chip select + address on the SPI bus. Should be set to 1. +- #size-cells: should be zero. +- compatible: + - ti,dm644x-spi for SPI used similar to that on DM644x SoC family + - ti,da8xx-spi for SPI used similar to that on DA8xx SoC family In general, you should avoid wildcards in compatible properties. Better use the number of the first chip that introduced the specific version of the device. Correct, will accommodate this change. +- reg: Offset and length of SPI controller register space +- num-cs: Number of chip selects +- ti,davinci-spi-intr-line: interrupt line used to connect the SPI + IP to the interrupt controller withn the SoC. Possible values + are 0 and 1. Manual says one of the two possible interrupt + lines can be tied to the interrupt controller. Set this + based on a specifc SoC configuration. +- interrupts: interrupt number offset at the irq parent I would not call this an offset. It is an interrupt descriptor which may be something other than a simple number. I am planning to drop from this documentation as it is common property. Unfortunately, there is no way to provide an invalid interrupt, otherwise you could just list both interrupts, out of which at least one should be valid, and drop the ti,davinci-spi-intr-line property. This is different from interrupt number, this is used to specifies out of 2 lines from SPI IP which is tied to INTC. Some discussion about it: https://lkml.org/lkml/2012/11/16/404 One thing you could do instead though is to use the interrupt-names property to define irq0 and irq1 interrupts, and in the implementation use the first one you find. In IP specification it is mentioned as spi-intr-line, I prefer to retain this property as davinci-spi-intr-line. Thanks, Prakash -- Everyone hates slow websites. So do we. Make your web apps faster with AppDynamics Download AppDynamics Lite for free today: http://p.sf.net/sfu/appdyn_d2d_feb ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [PATCH v2 1/4] spi/davinci: add DT binding documentation
On 3/5/2013 6:26 PM, Manjunathappa, Prakash wrote: Hi Arnd, On Mon, Mar 04, 2013 at 21:59:16, Arnd Bergmann wrote: On Monday 04 March 2013 18:29:12 Manjunathappa, Prakash wrote: diff --git a/Documentation/devicetree/bindings/spi/spi-davinci.txt b/Documentation/devicetree/bindings/spi/spi-davinci.txt new file mode 100644 index 000..a62d7a8 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-davinci.txt @@ -0,0 +1,51 @@ +Davinci SPI controller device bindings + +Required properties: +- #address-cells: number of cells required to define a chip select + address on the SPI bus. Should be set to 1. +- #size-cells: should be zero. +- compatible: + - ti,dm644x-spi for SPI used similar to that on DM644x SoC family + - ti,da8xx-spi for SPI used similar to that on DA8xx SoC family In general, you should avoid wildcards in compatible properties. Better use the number of the first chip that introduced the specific version of the device. Correct, will accommodate this change. But note that this patch is just documenting bindings already accepted and part of kernel. You probably need another patch which fixes the incorrect bindings and this one can then document in fixed bindings. Thanks, Sekhar -- Everyone hates slow websites. So do we. Make your web apps faster with AppDynamics Download AppDynamics Lite for free today: http://p.sf.net/sfu/appdyn_d2d_feb ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
RE: [PATCH v2 1/4] spi/davinci: add DT binding documentation
On Tue, Mar 05, 2013 at 18:58:54, Nori, Sekhar wrote: On 3/5/2013 6:26 PM, Manjunathappa, Prakash wrote: Hi Arnd, On Mon, Mar 04, 2013 at 21:59:16, Arnd Bergmann wrote: On Monday 04 March 2013 18:29:12 Manjunathappa, Prakash wrote: diff --git a/Documentation/devicetree/bindings/spi/spi-davinci.txt b/Documentation/devicetree/bindings/spi/spi-davinci.txt new file mode 100644 index 000..a62d7a8 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-davinci.txt @@ -0,0 +1,51 @@ +Davinci SPI controller device bindings + +Required properties: +- #address-cells: number of cells required to define a chip select + address on the SPI bus. Should be set to 1. +- #size-cells: should be zero. +- compatible: + - ti,dm644x-spi for SPI used similar to that on DM644x SoC family + - ti,da8xx-spi for SPI used similar to that on DA8xx SoC family In general, you should avoid wildcards in compatible properties. Better use the number of the first chip that introduced the specific version of the device. Correct, will accommodate this change. But note that this patch is just documenting bindings already accepted and part of kernel. You probably need another patch which fixes the incorrect bindings and this one can then document in fixed bindings. Correct Sekhar I meant the same. I will have patch for driver to accommodate above change and a patch for missing binding document. Thanks, Prakash Thanks, Sekhar -- Everyone hates slow websites. So do we. Make your web apps faster with AppDynamics Download AppDynamics Lite for free today: http://p.sf.net/sfu/appdyn_d2d_feb ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [PATCH v2 1/4] spi/davinci: add DT binding documentation
On Tuesday 05 March 2013, Manjunathappa, Prakash wrote: On Mon, Mar 04, 2013 at 21:59:16, Arnd Bergmann wrote: On Monday 04 March 2013 18:29:12 Manjunathappa, Prakash wrote: +- reg: Offset and length of SPI controller register space +- num-cs: Number of chip selects +- ti,davinci-spi-intr-line: interrupt line used to connect the SPI + IP to the interrupt controller withn the SoC. Possible values + are 0 and 1. Manual says one of the two possible interrupt + lines can be tied to the interrupt controller. Set this + based on a specifc SoC configuration. +- interrupts: interrupt number offset at the irq parent I would not call this an offset. It is an interrupt descriptor which may be something other than a simple number. I am planning to drop from this documentation as it is common property. I think it makese sense to document the fact that there should be exactly one interrupt listed in the interrupts property, especially since the hardware has two outputs. Arnd -- Everyone hates slow websites. So do we. Make your web apps faster with AppDynamics Download AppDynamics Lite for free today: http://p.sf.net/sfu/appdyn_d2d_feb ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [PATCH v2 1/4] spi/davinci: add DT binding documentation
On Monday 04 March 2013 18:29:12 Manjunathappa, Prakash wrote: diff --git a/Documentation/devicetree/bindings/spi/spi-davinci.txt b/Documentation/devicetree/bindings/spi/spi-davinci.txt new file mode 100644 index 000..a62d7a8 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-davinci.txt @@ -0,0 +1,51 @@ +Davinci SPI controller device bindings + +Required properties: +- #address-cells: number of cells required to define a chip select + address on the SPI bus. Should be set to 1. +- #size-cells: should be zero. +- compatible: + - ti,dm644x-spi for SPI used similar to that on DM644x SoC family + - ti,da8xx-spi for SPI used similar to that on DA8xx SoC family In general, you should avoid wildcards in compatible properties. Better use the number of the first chip that introduced the specific version of the device. +- reg: Offset and length of SPI controller register space +- num-cs: Number of chip selects +- ti,davinci-spi-intr-line: interrupt line used to connect the SPI + IP to the interrupt controller withn the SoC. Possible values + are 0 and 1. Manual says one of the two possible interrupt + lines can be tied to the interrupt controller. Set this + based on a specifc SoC configuration. +- interrupts: interrupt number offset at the irq parent I would not call this an offset. It is an interrupt descriptor which may be something other than a simple number. Unfortunately, there is no way to provide an invalid interrupt, otherwise you could just list both interrupts, out of which at least one should be valid, and drop the ti,davinci-spi-intr-line property. One thing you could do instead though is to use the interrupt-names property to define irq0 and irq1 interrupts, and in the implementation use the first one you find. Arnd -- Everyone hates slow websites. So do we. Make your web apps faster with AppDynamics Download AppDynamics Lite for free today: http://p.sf.net/sfu/appdyn_d2d_feb ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
