Re: alc(4) support for Atheros AR815x

2011-05-01 Thread Edd Barrett
On Mon, May 02, 2011 at 01:16:55AM +0100, Edd Barrett wrote:
> On Sun, May 01, 2011 at 08:10:56PM +0100, Stuart Henderson wrote:
> > On 2011/05/01 18:35, Edd Barrett wrote:
> > > I have acquired a netboot (packard bell dot s), which I think uses this 
> > > NIC. Is
> > > there an updated diff?
> > 
> > Yes I just took the 2 minutes it took to apply it and fix
> > the minor conflicts and linewrapping issue with the diff.
> > Untested beyond "it builds".
> 
> Stu's diff seems to work, although the first time i booted my bsd.rd I was
> unable to install due to: 
> 
> alc0: watchdog timeout (missed link)

^ this seems to happen quite frequently. I just had the same issue again on the
installed system.

-- 
Best Regards
Edd Barrett

http://www.theunixzoo.co.uk



Re: alc(4) support for Atheros AR815x

2011-05-01 Thread Edd Barrett
On Sun, May 01, 2011 at 08:10:56PM +0100, Stuart Henderson wrote:
> On 2011/05/01 18:35, Edd Barrett wrote:
> > I have acquired a netboot (packard bell dot s), which I think uses this 
> > NIC. Is
> > there an updated diff?
> 
> Yes I just took the 2 minutes it took to apply it and fix
> the minor conflicts and linewrapping issue with the diff.
> Untested beyond "it builds".

Stu's diff seems to work, although the first time i booted my bsd.rd I was
unable to install due to: 

alc0: watchdog timeout (missed link)

I rebooted and tried again and it all went smoothly. The system booted
multiuser and I am able to install packages over the wire.

The BCM4313 wireless is unsupported, but that is another story. If anyone knows
anything about support for this card can they mail me off-list.

Cheers

OpenBSD 4.9-current (GENERIC.MP) #0: Mon May  2 00:51:41 BST 2011
root@ire.config:/usr/src/sys/arch/i386/compile/GENERIC.MP
cpu0: Intel(R) Atom(TM) CPU N455 @ 1.66GHz ("GenuineIntel" 686-class) 1.67 GHz
cpu0: 
FPU,V86,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,EST,TM2,SSSE3,CX16,xTPR,PDCM,MOVBE
real mem  = 1061302272 (1012MB)
avail mem = 1033764864 (985MB)
mainbus0 at root
bios0 at mainbus0: AT/286+ BIOS, date 01/10/11, SMBIOS rev. 2.6 @ 0xe8080 (36 
entries)
bios0: vendor Packard Bell version "V3.14(DDR3)" date 01/10/2011
bios0: Packard Bell DOTS E2
acpi0 at bios0: rev 2
acpi0: sleep states S0 S3 S4 S5
acpi0: tables DSDT FACP HPET APIC MCFG SLIC BOOT SSDT WDAT
acpi0: wakeup devices UHC1(S3) UHC2(S3) UHC3(S3) UHC4(S3) ECHI(S3) EXP1(S4) 
EXP2(S0) EXP3(S4) EXP4(S4) AZAL(S4)
acpitimer0 at acpi0: 3579545 Hz, 24 bits
acpihpet0 at acpi0: 14318179 Hz
acpimadt0 at acpi0 addr 0xfee0: PC-AT compat
cpu0 at mainbus0: apid 0 (boot processor)
cpu0: apic clock running at 166MHz
cpu1 at mainbus0: apid 1 (application processor)
cpu1: Intel(R) Atom(TM) CPU N455 @ 1.66GHz ("GenuineIntel" 686-class) 1.67 GHz
cpu1: 
FPU,V86,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,EST,TM2,SSSE3,CX16,xTPR,PDCM,MOVBE
ioapic0 at mainbus0: apid 4 pa 0xfec0, version 20, 24 pins
ioapic0: misconfigured as apic 0, remapped to apid 4
acpimcfg0 at acpi0 addr 0xe000, bus 0-255
acpiprt0 at acpi0: bus 0 (PCI0)
acpiprt1 at acpi0: bus 1 (EXP1)
acpiprt2 at acpi0: bus 2 (EXP2)
acpiprt3 at acpi0: bus -1 (EXP3)
acpiprt4 at acpi0: bus -1 (EXP4)
acpiec0 at acpi0
acpicpu0 at acpi0: C3, C2, C1, PSS
acpicpu1 at acpi0: C3, C2, C1, PSS
acpipwrres0 at acpi0: FN00
acpitz0 at acpi0: critical temperature 100 degC
acpibtn0 at acpi0: PWRB
acpibtn1 at acpi0: SLPB
acpibtn2 at acpi0: LID0
acpibat0 at acpi0: BAT0 model "13848628933250113" type Lion oem "SANYO "
acpiac0 at acpi0: AC unit online
acpivideo0 at acpi0: OVGA
acpivout0 at acpivideo0: DD02
bios0: ROM list: 0xc/0xda00! 0xce000/0x1000
cpu0: Enhanced SpeedStep 1663 MHz: speeds: 1666, 1333, 1000 MHz
pci0 at mainbus0 bus 0: configuration mode 1 (bios)
pchb0 at pci0 dev 0 function 0 "Intel Pineview DMI" rev 0x00
vga1 at pci0 dev 2 function 0 "Intel Pineview Video" rev 0x00
wsdisplay0 at vga1 mux 1: console (80x25, vt100 emulation)
wsdisplay0: screen 1-5 added (80x25, vt100 emulation)
intagp0 at vga1
agp0 at intagp0: aperture at 0x4000, size 0x1000
inteldrm0 at vga1: apic 4 int 16
drm0 at inteldrm0
"Intel Pineview Video" rev 0x00 at pci0 dev 2 function 1 not configured
azalia0 at pci0 dev 27 function 0 "Intel 82801GB HD Audio" rev 0x02: apic 4 int 
19
azalia0: codecs: Realtek ALC272
audio0 at azalia0
ppb0 at pci0 dev 28 function 0 "Intel 82801GB PCIE" rev 0x02: apic 4 int 16
pci1 at ppb0 bus 1
alc0 at pci1 dev 0 function 0 "Attansic Technology L2C" rev 0xc1: apic 4 int 
16, address 1c:75:08:d5:53:c4
atphy0 at alc0 phy 0: F2 10/100 PHY, rev. 4
ppb1 at pci0 dev 28 function 1 "Intel 82801GB PCIE" rev 0x02: apic 4 int 17
pci2 at ppb1 bus 2
"Broadcom BCM4313" rev 0x01 at pci2 dev 0 function 0 not configured
uhci0 at pci0 dev 29 function 0 "Intel 82801GB USB" rev 0x02: apic 4 int 18
uhci1 at pci0 dev 29 function 1 "Intel 82801GB USB" rev 0x02: apic 4 int 20
uhci2 at pci0 dev 29 function 2 "Intel 82801GB USB" rev 0x02: apic 4 int 21
uhci3 at pci0 dev 29 function 3 "Intel 82801GB USB" rev 0x02: apic 4 int 22
ehci0 at pci0 dev 29 function 7 "Intel 82801GB USB" rev 0x02: apic 4 int 22
usb0 at ehci0: USB revision 2.0
uhub0 at usb0 "Intel EHCI root hub" rev 2.00/1.00 addr 1
ppb2 at pci0 dev 30 function 0 "Intel 82801BAM Hub-to-PCI" rev 0xe2
pci3 at ppb2 bus 5
pcib0 at pci0 dev 31 function 0 "Intel Tigerpoint LPC" rev 0x02
ahci0 at pci0 dev 31 function 2 "Intel 82801GR AHCI" rev 0x02: apic 4 int 17, 
AHCI 1.1
ahci0: PHY offline on port 1
scsibus0 at ahci0: 32 targets
sd0 at scsibus0 targ 0 lun 0:  SCSI3 0/direct 
fixed naa.5000cca62bf2b42f
sd0: 238475MB, 512 bytes/sec, 488397168 sec total
ichiic0 at pci0 dev 31 function 3 "Intel 82801GB SMBus" rev 0x02: apic 4 int 

pf.conf(5) man page "set limit" BNF fix

2011-05-01 Thread Lawrence Teo
PF's "set limit" option allows five memory pools to be specified
(states, frags, src-nodes, tables, and table-entries); however, the
pf.conf BNF grammar specification on the pf.conf(5) man page only
lists three.

The following diff fixes this by completing the list of possible
values for the limit-item symbol. Does it look ok?

Thanks,
Lawrence


Index: pf.conf.5
===
RCS file: /cvs/src/share/man/man5/pf.conf.5,v
retrieving revision 1.492
diff -u -p -r1.492 pf.conf.5
--- pf.conf.5   6 Apr 2011 13:20:44 -   1.492
+++ pf.conf.5   1 May 2011 19:07:49 -
@@ -2799,7 +2799,8 @@ timeout= ( "tcp.first" | "tcp.op
  "adaptive.start" | "adaptive.end" ) number
 
 limit-list = limit-item [ [ "," ] limit-list ]
-limit-item = ( "states" | "frags" | "src-nodes" ) number
+limit-item = ( "states" | "frags" | "src-nodes" | "tables" |
+ "table-entries" ) number
 
 pooltype   = ( "bitmask" | "random" |
  "source-hash" [ ( hex-key | string-key ) ] |



Re: alc(4) support for Atheros AR815x

2011-05-01 Thread Abel Abraham Camarillo Ojeda
I mean... my alc0 still works...


On Sun, May 1, 2011 at 2:49 PM, Abel Abraham Camarillo Ojeda
 wrote:
> On Sun, May 1, 2011 at 2:10 PM, Stuart Henderson 
wrote:
>> On 2011/05/01 18:35, Edd Barrett wrote:
>>> I have acquired a netboot (packard bell dot s), which I think uses this
NIC. Is
>>> there an updated diff?
>>
>> Yes I just took the 2 minutes it took to apply it and fix
>> the minor conflicts and linewrapping issue with the diff.
>> Untested beyond "it builds".
>>
>> Test reports and dmesg lines from existing working alc(4) L1C and
>> L2C wanted. If it makes new chips work that's a bonus, but the
>> important thing is making sure it doesn't break something that
>> already works.
>>
>> Doesn't seem any point disabling interrupts in the ISR though.
>> I haven't touched that in this diff but that should probably be
>> done too.
>>
>> 
>
> Tested here on amd64.mp:
>
> No relevant changes in dmesg (i guess)...
>
> Old dmesg:
>
> OpenBSD 4.9-current (kobj) #0: Tue Apr 26 18:02:56 CDT 2011
> B  B root@maetel.00z:/usr/kobj
> real mem = 1608056832 (1533MB)
> avail mem = 1551200256 (1479MB)
> mainbus0 at root
> bios0 at mainbus0: SMBIOS rev. 2.6 @ 0xfd400 (50 entries)
> bios0: vendor American Megatrends Inc. version "V1.3" date 11/15/2010
> bios0: MSI MS-7623
> acpi0 at bios0: rev 0
> acpi0: sleep states S0 S3 S4 S5
> acpi0: tables DSDT FACP APIC MCFG OEMB SRAT HPET SSDT
> acpi0: wakeup devices PCE2(S4) PCE3(S4) PCE4(S4) PCE5(S4) PCE6(S4)
> PCE7(S4) PCE9(S4) PCEA(S4) PCEB(S4) PCEC(S4) SBAZ(S4) PSKE(S4)
> PSMS(S4) ECIR(S4) PS2K(S3) PS2M(S3) P0PC(S4) UHC1(S4) UHC2(S4)
> UHC3(S4) USB4(S4) UHC5(S4) UHC6(S4) UHC7(S4) PWRB(S3)
> acpitimer0 at acpi0: 3579545 Hz, 32 bits
> acpimadt0 at acpi0 addr 0xfee0: PC-AT compat
> cpu0 at mainbus0: apid 0 (boot processor)
> cpu0: AMD Phenom(tm) II X4 955 Processor, 3200.65 MHz
> cpu0:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS
H,MMX,FXSR,SSE,SSE2,HTT,SSE3,MWAIT,CX16,POPCNT,NXE,MMXX,FFXSR,LONG,3DNOW2,3DN
OW
> cpu0: 64KB 64b/line 2-way I-cache, 64KB 64b/line 2-way D-cache, 512KB
> 64b/line 16-way L2 cache
> cpu0: ITLB 32 4KB entries fully associative, 16 4MB entries fully
associative
> cpu0: DTLB 48 4KB entries fully associative, 48 4MB entries fully
associative
> cpu0: apic clock running at 200MHz
> cpu1 at mainbus0: apid 1 (application processor)
> cpu1: AMD Phenom(tm) II X4 955 Processor, 3200.16 MHz
> cpu1:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS
H,MMX,FXSR,SSE,SSE2,HTT,SSE3,MWAIT,CX16,POPCNT,NXE,MMXX,FFXSR,LONG,3DNOW2,3DN
OW
> cpu1: 64KB 64b/line 2-way I-cache, 64KB 64b/line 2-way D-cache, 512KB
> 64b/line 16-way L2 cache
> cpu1: ITLB 32 4KB entries fully associative, 16 4MB entries fully
associative
> cpu1: DTLB 48 4KB entries fully associative, 48 4MB entries fully
associative
> cpu2 at mainbus0: apid 2 (application processor)
> cpu2: AMD Phenom(tm) II X4 955 Processor, 3200.15 MHz
> cpu2:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS
H,MMX,FXSR,SSE,SSE2,HTT,SSE3,MWAIT,CX16,POPCNT,NXE,MMXX,FFXSR,LONG,3DNOW2,3DN
OW
> cpu2: 64KB 64b/line 2-way I-cache, 64KB 64b/line 2-way D-cache, 512KB
> 64b/line 16-way L2 cache
> cpu2: ITLB 32 4KB entries fully associative, 16 4MB entries fully
associative
> cpu2: DTLB 48 4KB entries fully associative, 48 4MB entries fully
associative
> cpu3 at mainbus0: apid 3 (application processor)
> cpu3: AMD Phenom(tm) II X4 955 Processor, 3200.15 MHz
> cpu3:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS
H,MMX,FXSR,SSE,SSE2,HTT,SSE3,MWAIT,CX16,POPCNT,NXE,MMXX,FFXSR,LONG,3DNOW2,3DN
OW
> cpu3: 64KB 64b/line 2-way I-cache, 64KB 64b/line 2-way D-cache, 512KB
> 64b/line 16-way L2 cache
> cpu3: ITLB 32 4KB entries fully associative, 16 4MB entries fully
associative
> cpu3: DTLB 48 4KB entries fully associative, 48 4MB entries fully
associative
> ioapic0 at mainbus0: apid 4 pa 0xfec0, version 21, 24 pins
> acpimcfg0 at acpi0 addr 0xe000, bus 0-255
> acpihpet0 at acpi0: 14318180 Hz
> acpiprt0 at acpi0: bus 0 (PCI0)
> acpiprt1 at acpi0: bus 1 (P0P1)
> acpiprt2 at acpi0: bus -1 (PCE2)
> acpiprt3 at acpi0: bus -1 (PCE3)
> acpiprt4 at acpi0: bus -1 (PCE4)
> acpiprt5 at acpi0: bus 2 (PCE5)
> acpiprt6 at acpi0: bus -1 (PCE6)
> acpiprt7 at acpi0: bus -1 (PCE7)
> acpiprt8 at acpi0: bus -1 (PCE9)
> acpiprt9 at acpi0: bus -1 (PCEA)
> acpiprt10 at acpi0: bus -1 (PCEB)
> acpiprt11 at acpi0: bus -1 (PCEC)
> acpiprt12 at acpi0: bus 3 (P0PC)
> acpicpu0 at acpi0: PSS
> acpicpu1 at acpi0: PSS
> acpicpu2 at acpi0: PSS
> acpicpu3 at acpi0: PSS
> acpibtn0 at acpi0: PWRB
> pci0 at mainbus0 bus 0
> pchb0 at pci0 dev 0 function 0 "AMD RS780 Host" rev 0x00
> ppb0 at pci0 dev 1 function 0 "AMD RS780 PCIE" rev 0x00
> pci1 at ppb0 bus 1
> vga1 at pci1 dev 5 function 0 vendor "ATI", unknown product 0x9616 rev 0x00
> wsdisplay0 at vga1 mux 1: console (80x25, vt100 emulation)
> wsdisplay0: screen 1-5 added (80x25, vt100 emulation)
> ppb1 

Re: alc(4) support for Atheros AR815x

2011-05-01 Thread Abel Abraham Camarillo Ojeda
On Sun, May 1, 2011 at 2:10 PM, Stuart Henderson  wrote:
> On 2011/05/01 18:35, Edd Barrett wrote:
>> I have acquired a netboot (packard bell dot s), which I think uses this NIC. 
>> Is
>> there an updated diff?
>
> Yes I just took the 2 minutes it took to apply it and fix
> the minor conflicts and linewrapping issue with the diff.
> Untested beyond "it builds".
>
> Test reports and dmesg lines from existing working alc(4) L1C and
> L2C wanted. If it makes new chips work that's a bonus, but the
> important thing is making sure it doesn't break something that
> already works.
>
> Doesn't seem any point disabling interrupts in the ISR though.
> I haven't touched that in this diff but that should probably be
> done too.
>
> 

Tested here on amd64.mp:

No relevant changes in dmesg (i guess)...

Old dmesg:

OpenBSD 4.9-current (kobj) #0: Tue Apr 26 18:02:56 CDT 2011
root@maetel.00z:/usr/kobj
real mem = 1608056832 (1533MB)
avail mem = 1551200256 (1479MB)
mainbus0 at root
bios0 at mainbus0: SMBIOS rev. 2.6 @ 0xfd400 (50 entries)
bios0: vendor American Megatrends Inc. version "V1.3" date 11/15/2010
bios0: MSI MS-7623
acpi0 at bios0: rev 0
acpi0: sleep states S0 S3 S4 S5
acpi0: tables DSDT FACP APIC MCFG OEMB SRAT HPET SSDT
acpi0: wakeup devices PCE2(S4) PCE3(S4) PCE4(S4) PCE5(S4) PCE6(S4)
PCE7(S4) PCE9(S4) PCEA(S4) PCEB(S4) PCEC(S4) SBAZ(S4) PSKE(S4)
PSMS(S4) ECIR(S4) PS2K(S3) PS2M(S3) P0PC(S4) UHC1(S4) UHC2(S4)
UHC3(S4) USB4(S4) UHC5(S4) UHC6(S4) UHC7(S4) PWRB(S3)
acpitimer0 at acpi0: 3579545 Hz, 32 bits
acpimadt0 at acpi0 addr 0xfee0: PC-AT compat
cpu0 at mainbus0: apid 0 (boot processor)
cpu0: AMD Phenom(tm) II X4 955 Processor, 3200.65 MHz
cpu0: 
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,MMX,FXSR,SSE,SSE2,HTT,SSE3,MWAIT,CX16,POPCNT,NXE,MMXX,FFXSR,LONG,3DNOW2,3DNOW
cpu0: 64KB 64b/line 2-way I-cache, 64KB 64b/line 2-way D-cache, 512KB
64b/line 16-way L2 cache
cpu0: ITLB 32 4KB entries fully associative, 16 4MB entries fully associative
cpu0: DTLB 48 4KB entries fully associative, 48 4MB entries fully associative
cpu0: apic clock running at 200MHz
cpu1 at mainbus0: apid 1 (application processor)
cpu1: AMD Phenom(tm) II X4 955 Processor, 3200.16 MHz
cpu1: 
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,MMX,FXSR,SSE,SSE2,HTT,SSE3,MWAIT,CX16,POPCNT,NXE,MMXX,FFXSR,LONG,3DNOW2,3DNOW
cpu1: 64KB 64b/line 2-way I-cache, 64KB 64b/line 2-way D-cache, 512KB
64b/line 16-way L2 cache
cpu1: ITLB 32 4KB entries fully associative, 16 4MB entries fully associative
cpu1: DTLB 48 4KB entries fully associative, 48 4MB entries fully associative
cpu2 at mainbus0: apid 2 (application processor)
cpu2: AMD Phenom(tm) II X4 955 Processor, 3200.15 MHz
cpu2: 
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,MMX,FXSR,SSE,SSE2,HTT,SSE3,MWAIT,CX16,POPCNT,NXE,MMXX,FFXSR,LONG,3DNOW2,3DNOW
cpu2: 64KB 64b/line 2-way I-cache, 64KB 64b/line 2-way D-cache, 512KB
64b/line 16-way L2 cache
cpu2: ITLB 32 4KB entries fully associative, 16 4MB entries fully associative
cpu2: DTLB 48 4KB entries fully associative, 48 4MB entries fully associative
cpu3 at mainbus0: apid 3 (application processor)
cpu3: AMD Phenom(tm) II X4 955 Processor, 3200.15 MHz
cpu3: 
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,MMX,FXSR,SSE,SSE2,HTT,SSE3,MWAIT,CX16,POPCNT,NXE,MMXX,FFXSR,LONG,3DNOW2,3DNOW
cpu3: 64KB 64b/line 2-way I-cache, 64KB 64b/line 2-way D-cache, 512KB
64b/line 16-way L2 cache
cpu3: ITLB 32 4KB entries fully associative, 16 4MB entries fully associative
cpu3: DTLB 48 4KB entries fully associative, 48 4MB entries fully associative
ioapic0 at mainbus0: apid 4 pa 0xfec0, version 21, 24 pins
acpimcfg0 at acpi0 addr 0xe000, bus 0-255
acpihpet0 at acpi0: 14318180 Hz
acpiprt0 at acpi0: bus 0 (PCI0)
acpiprt1 at acpi0: bus 1 (P0P1)
acpiprt2 at acpi0: bus -1 (PCE2)
acpiprt3 at acpi0: bus -1 (PCE3)
acpiprt4 at acpi0: bus -1 (PCE4)
acpiprt5 at acpi0: bus 2 (PCE5)
acpiprt6 at acpi0: bus -1 (PCE6)
acpiprt7 at acpi0: bus -1 (PCE7)
acpiprt8 at acpi0: bus -1 (PCE9)
acpiprt9 at acpi0: bus -1 (PCEA)
acpiprt10 at acpi0: bus -1 (PCEB)
acpiprt11 at acpi0: bus -1 (PCEC)
acpiprt12 at acpi0: bus 3 (P0PC)
acpicpu0 at acpi0: PSS
acpicpu1 at acpi0: PSS
acpicpu2 at acpi0: PSS
acpicpu3 at acpi0: PSS
acpibtn0 at acpi0: PWRB
pci0 at mainbus0 bus 0
pchb0 at pci0 dev 0 function 0 "AMD RS780 Host" rev 0x00
ppb0 at pci0 dev 1 function 0 "AMD RS780 PCIE" rev 0x00
pci1 at ppb0 bus 1
vga1 at pci1 dev 5 function 0 vendor "ATI", unknown product 0x9616 rev 0x00
wsdisplay0 at vga1 mux 1: console (80x25, vt100 emulation)
wsdisplay0: screen 1-5 added (80x25, vt100 emulation)
ppb1 at pci0 dev 5 function 0 "AMD RS780 PCIE" rev 0x00: apic 4 int 17
pci2 at ppb1 bus 2
alc0 at pci2 dev 0 function 0 "Attansic Technology L1C" rev 0xc0: apic
4 int 17, address 6c:62:6d:de:03:76
atphy0 at alc0 phy 0: F1 10/100/1000 PHY, rev. 11
ahci0 at pci0 dev 17 function 0 "ATI SBx00 

Re: alc(4) support for Atheros AR815x

2011-05-01 Thread Stuart Henderson
On 2011/05/01 18:35, Edd Barrett wrote:
> I have acquired a netboot (packard bell dot s), which I think uses this NIC. 
> Is
> there an updated diff?

Yes I just took the 2 minutes it took to apply it and fix
the minor conflicts and linewrapping issue with the diff.
Untested beyond "it builds".

Test reports and dmesg lines from existing working alc(4) L1C and
L2C wanted. If it makes new chips work that's a bonus, but the
important thing is making sure it doesn't break something that
already works.

Doesn't seem any point disabling interrupts in the ISR though.
I haven't touched that in this diff but that should probably be
done too.

Index: share/man/man4/alc.4
===
RCS file: /cvs/src/share/man/man4/alc.4,v
retrieving revision 1.2
diff -u -p -r1.2 alc.4
--- share/man/man4/alc.48 Aug 2009 14:12:41 -   1.2
+++ share/man/man4/alc.41 May 2011 18:55:25 -
@@ -19,7 +19,7 @@
 .Os
 .Sh NAME
 .Nm alc
-.Nd Atheros AR8131/AR8132 10/100/Gigabit Ethernet device
+.Nd Atheros AR813x/AR815x 10/100/Gigabit Ethernet device
 .Sh SYNOPSIS
 .Cd "alc* at pci?"
 .Cd "atphy* at mii?"
@@ -27,8 +27,7 @@
 The
 .Nm
 driver provides support for Ethernet interfaces based on the
-Atheros AR8131/AR8132 Ethernet chipset, also known as
-the Attansic L1C/L2C respectively.
+Atheros AR813x/AR815x Ethernet chipset.
 .Pp
 The
 .Nm
Index: sys/arch/amd64/conf/GENERIC
===
RCS file: /cvs/src/sys/arch/amd64/conf/GENERIC,v
retrieving revision 1.316
diff -u -p -r1.316 GENERIC
--- sys/arch/amd64/conf/GENERIC 10 Apr 2011 20:27:02 -  1.316
+++ sys/arch/amd64/conf/GENERIC 1 May 2011 18:55:25 -
@@ -472,7 +472,7 @@ bce*at pci? # Broadcom 
BCM4401
 vic*   at pci? # VMware VMXnet virtual interface
 et*at pci? # Agere/LSI ET1310
 age*   at pci? # Attansic L1 Ethernet
-alc*   at pci? # Attansic L1C/L2C Ethernet
+alc*   at pci? # Attansic L1C/L1D/L2C Ethernet
 ale*   at pci? # Attansic L1E Ethernet
 lii*   at pci? # Attansic L2 Ethernet
 jme*   at pci? # JMicron JMC250/JMC260 Ethernet
Index: sys/arch/amd64/conf/RAMDISK_CD
===
RCS file: /cvs/src/sys/arch/amd64/conf/RAMDISK_CD,v
retrieving revision 1.116
diff -u -p -r1.116 RAMDISK_CD
--- sys/arch/amd64/conf/RAMDISK_CD  3 Apr 2011 12:32:05 -   1.116
+++ sys/arch/amd64/conf/RAMDISK_CD  1 May 2011 18:55:25 -
@@ -291,7 +291,7 @@ bce*at pci? # Broadcom BCM4401
 vic*   at pci? # VMware VMXnet virtual interface
 et*at pci? # Agere/LSI ET1310
 age*   at pci? # Attansic L1 Ethernet
-alc*   at pci? # Attansic L1C/L2C Ethernet
+alc*   at pci? # Attansic L1C/L1D/L2C Ethernet
 ale*   at pci? # Attansic L1E Ethernet
 lii*   at pci? # Attansic L2 Ethernet
 jme*   at pci? # JMicron JMC250/JMC260 Ethernet
Index: sys/arch/i386/conf/GENERIC
===
RCS file: /cvs/src/sys/arch/i386/conf/GENERIC,v
retrieving revision 1.713
diff -u -p -r1.713 GENERIC
--- sys/arch/i386/conf/GENERIC  10 Apr 2011 20:27:02 -  1.713
+++ sys/arch/i386/conf/GENERIC  1 May 2011 18:55:25 -
@@ -632,7 +632,7 @@ gem*at pci? # Sun 'gem' 
ethernet
 vic*   at pci? # VMware VMXnet virtual interface
 et*at pci? # Agere/LSI ET1310
 age*   at pci? # Attansic L1 Ethernet
-alc*   at pci? # Attansic L1C/L2C Ethernet
+alc*   at pci? # Attansic L1C/L1D/L2C Ethernet
 ale*   at pci? # Attansic L1E Ethernet
 lii*   at pci? # Attansic L2 Ethernet
 jme*   at pci? # JMicron JMC250/JMC260 Ethernet
Index: sys/arch/i386/conf/RAMDISK_CD
===
RCS file: /cvs/src/sys/arch/i386/conf/RAMDISK_CD,v
retrieving revision 1.185
diff -u -p -r1.185 RAMDISK_CD
--- sys/arch/i386/conf/RAMDISK_CD   3 Apr 2011 12:32:05 -   1.185
+++ sys/arch/i386/conf/RAMDISK_CD   1 May 2011 18:55:25 -
@@ -372,7 +372,7 @@ xge*at pci? # Neterion 
Xframe-I/II 1
 vic*   at pci? # VMware VMXnet virtual interface
 et*at pci? # Agere/LSI ET1310
 age*   at pci? # Attansic L1 Ethernet
-alc*   at pci? # Attansic L1C/L2C Ethernet
+alc*   at pci? # Attansic L1C/L1D/L2C Ethernet
 

Re: alc(4) support for Atheros AR815x

2011-05-01 Thread Edd Barrett
On Thu, Apr 28, 2011 at 07:21:16AM +1000, Jonathan Gray wrote:
> On Tue, Jan 25, 2011 at 06:24:28PM +0800, Kevin Lo wrote:
> > Hi,
> > 
> > The following diff adds support for Atheros AR8151/AR8152 chipsets;
> > mostly from FreeBSD. It also fixes an issue i386/6311.
> > Tested on Acer AOD255E.
> 
> Is there an updated diff for this?  It seems this never made it
> into the tree.

I have acquired a netboot (packard bell dot s), which I think uses this NIC. Is
there an updated diff?

Dmesg:

OpenBSD 4.9-current (RAMDISK_CD) #41: Thu Apr 21 00:17:13 MDT 2011
dera...@i386.openbsd.org:/usr/src/sys/arch/i386/compile/RAMDISK_CD
cpu0: Intel(R) Atom(TM) CPU N455 @ 1.66GHz ("GenuineIntel" 686-class) 1.67 GHz
cpu0: 
FPU,V86,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,EST,TM2,SSSE3,CX16,xTPR,PDCM,MOVBE
real mem  = 1061335040 (1012MB)
avail mem = 1036996608 (988MB)
mainbus0 at root
bios0 at mainbus0: AT/286+ BIOS, date 01/10/11, SMBIOS rev. 2.6 @ 0xe8080 (36 
entries)
bios0: vendor Packard Bell version "V3.14(DDR3)" date 01/10/2011
bios0: Packard Bell DOTS E2
acpi0 at bios0: rev 2
acpi0: sleep states S0 S3 S4 S5
acpi0: tables DSDT FACP HPET APIC MCFG SLIC BOOT SSDT WDAT
acpimadt0 at acpi0 addr 0xfee0: PC-AT compat
cpu0 at mainbus0: apid 0 (boot processor)
cpu0: apic clock running at 166MHz
cpu at mainbus0: not configured
ioapic0 at mainbus0: apid 4 pa 0xfec0, version 20, 24 pins
ioapic0: misconfigured as apic 0, remapped to apid 4
acpiprt0 at acpi0: bus 0 (PCI0)
acpiprt1 at acpi0: bus 1 (EXP1)
acpiprt2 at acpi0: bus 2 (EXP2)
acpiprt3 at acpi0: bus -1 (EXP3)
acpiprt4 at acpi0: bus -1 (EXP4)
bios0: ROM list: 0xc/0xda00! 0xce000/0x1000
pci0 at mainbus0 bus 0: configuration mode 1 (bios)
pchb0 at pci0 dev 0 function 0 "Intel Pineview DMI" rev 0x00
vga1 at pci0 dev 2 function 0 "Intel Pineview Video" rev 0x00
wsdisplay0 at vga1 mux 1: console (80x25, vt100 emulation)
"Intel Pineview Video" rev 0x00 at pci0 dev 2 function 1 not configured
"Intel 82801GB HD Audio" rev 0x02 at pci0 dev 27 function 0 not configured
ppb0 at pci0 dev 28 function 0 "Intel 82801GB PCIE" rev 0x02: apic 4 int 16 
(irq 255)
pci1 at ppb0 bus 1
"Attansic Technology L2C" rev 0xc1 at pci1 dev 0 function 0 not configured
ppb1 at pci0 dev 28 function 1 "Intel 82801GB PCIE" rev 0x02: apic 4 int 17 
(irq 255)
pci2 at ppb1 bus 2
"Broadcom BCM4313" rev 0x01 at pci2 dev 0 function 0 not configured
uhci0 at pci0 dev 29 function 0 "Intel 82801GB USB" rev 0x02: apic 4 int 18 
(irq 11)
uhci1 at pci0 dev 29 function 1 "Intel 82801GB USB" rev 0x02: apic 4 int 20 
(irq 10)
uhci2 at pci0 dev 29 function 2 "Intel 82801GB USB" rev 0x02: apic 4 int 21 
(irq 11)
uhci3 at pci0 dev 29 function 3 "Intel 82801GB USB" rev 0x02: apic 4 int 22 
(irq 11)
ehci0 at pci0 dev 29 function 7 "Intel 82801GB USB" rev 0x02: apic 4 int 22 
(irq 11)
usb0 at ehci0: USB revision 2.0
uhub0 at usb0 "Intel EHCI root hub" rev 2.00/1.00 addr 1
ppb2 at pci0 dev 30 function 0 "Intel 82801BAM Hub-to-PCI" rev 0xe2
pci3 at ppb2 bus 5
pcib0 at pci0 dev 31 function 0 "Intel Tigerpoint LPC" rev 0x02
ahci0 at pci0 dev 31 function 2 "Intel 82801GR AHCI" rev 0x02: apic 4 int 17 
(irq 10), AHCI 1.1
ahci0: PHY offline on port 1
scsibus0 at ahci0: 32 targets
sd0 at scsibus0 targ 0 lun 0:  SCSI3 0/direct 
fixed naa.5000cca62bf2b42f
sd0: 238475MB, 512 bytes/sec, 488397168 sec total
"Intel 82801GB SMBus" rev 0x02 at pci0 dev 31 function 3 not configured
usb1 at uhci0: USB revision 1.0
uhub1 at usb1 "Intel UHCI root hub" rev 1.00/1.00 addr 1
usb2 at uhci1: USB revision 1.0
uhub2 at usb2 "Intel UHCI root hub" rev 1.00/1.00 addr 1
usb3 at uhci2: USB revision 1.0
uhub3 at usb3 "Intel UHCI root hub" rev 1.00/1.00 addr 1
usb4 at uhci3: USB revision 1.0
uhub4 at usb4 "Intel UHCI root hub" rev 1.00/1.00 addr 1
isa0 at pcib0
isadma0 at isa0
pckbc0 at isa0 port 0x60/5
pckbd0 at pckbc0 (kbd slot)
pckbc0: using irq 1 for kbd slot
wskbd0 at pckbd0: console keyboard, using wsdisplay0
npx0 at isa0 port 0xf0/16: reported by CPUID; using exception 16
rd0: fixed, 3872 blocks
"Y2B2D0JXB WebCam" rev 2.00/0.04 addr 2 at uhub0 port 4 not configured
softraid0 at root
PXE boot MAC address 1c:75:08:d5:53:c4, interface unknown
root on rd0a swap on rd0b dump on rd0b
umass0 at uhub1 port 2 configuration 1 interface 0 "vendor 0x0204 product 
0x6025" rev 1.10/1.00 addr 2
umass0: using SCSI over Bulk-Only
scsibus1 at umass0: 2 targets, initiator 0
sd1 at scsibus1 targ 1 lun 0:  SCSI2 0/direct removable
sd1: 486MB, 512 bytes/sec, 996415 sec total

-- 
Best Regards
Edd Barrett

http://www.theunixzoo.co.uk



looking for users of "exotic" xorg input drivers

2011-05-01 Thread Matthieu Herrb
Hi,

I'd like to ear back of anyone actually using one of the following X
input drivers on a regular basis:

xf86-input-acecad
xf86-input-citron
xf86-input-fpit
xf86-input-hyperpen
xf86-input-mutouch
xf86-input-penmount 

Those drivers are not really maintained, and probably already broken. 
So far there have been no release of those drivers compatible with the 
Xinput API changes in the X server 1.10.

So I'm seriously considering removing them from Xenocara builds,
unless we find users that really use them.

xf86-input-elographics is also lagging behind, but it has a maintainer
on the X.Org side, so hopefuly the situation will be fixed soon.
-- 
Matthieu Herrb



Curso Herramientas para gestionar la Comunicaci�n Interna q f a g r q

2011-05-01 Thread Robin Laight -Capacitaciones en Comunicaci�n-
the text body



Re: du.c tree use

2011-05-01 Thread Owain Ainsworth
On Sun, May 01, 2011 at 04:21:27PM +0200, Ariane van der Steldt wrote:
> Hi,
> 
> du.c doesn't define its tree prototypes. However, if I understand man tree,
> it should.

The idea being that you're defining the rb functions without first
prototyping them

in this case RB_GENERATE_STATIC would probably be better since it is
only needed within the one file.

> 
> Ok?
> -- 
> Ariane
> 
> 
> Index: du.c
> ===
> RCS file: /cvs/src/usr.bin/du/du.c,v
> retrieving revision 1.23
> diff -u -d -p -r1.23 du.c
> --- du.c  27 Apr 2011 07:52:11 -  1.23
> +++ du.c  1 May 2011 14:10:13 -
> @@ -232,6 +232,7 @@ links_cmp(struct links_entry *e1, struct
>  
>  RB_HEAD(ltree, links_entry) links = RB_INITIALIZER(&links);
>  
> +RB_PROTOTYPE(ltree, links_entry, entry, links_cmp);
>  RB_GENERATE(ltree, links_entry, entry, links_cmp);
> 

-- 
Vital papers will demonstrate their vitality by spontaneously moving
from where you left them to where you can't find them.



du.c tree use

2011-05-01 Thread Ariane van der Steldt
Hi,

du.c doesn't define its tree prototypes. However, if I understand man tree,
it should.

Ok?
-- 
Ariane


Index: du.c
===
RCS file: /cvs/src/usr.bin/du/du.c,v
retrieving revision 1.23
diff -u -d -p -r1.23 du.c
--- du.c27 Apr 2011 07:52:11 -  1.23
+++ du.c1 May 2011 14:10:13 -
@@ -232,6 +232,7 @@ links_cmp(struct links_entry *e1, struct
 
 RB_HEAD(ltree, links_entry) links = RB_INITIALIZER(&links);
 
+RB_PROTOTYPE(ltree, links_entry, entry, links_cmp);
 RB_GENERATE(ltree, links_entry, entry, links_cmp);



Openbsd 4.9 released May 1, 2011

2011-05-01 Thread Bob Beck

May 1, 2011.

We are pleased to announce the official release of OpenBSD 4.9.
This is our 29th release on CD-ROM (and 30th via FTP).  We remain
proud of OpenBSD's record of more than ten years with only two remote
holes in the default install.

As in our previous releases, 4.9 provides significant improvements,
including new features, in nearly all areas of the system:

 - New/extended platforms:
o OpenBSD/amd64 and OpenBSD/i386:
  - Enabled NTFS by default (read-only) on GENERIC kernels.
  - Enabled the vmt(4) driver by default for VMWare tools support
as a guest.
  - SMP kernels can now boot on machines with up to 64 cores.
  - Maximum allocation size for i386 bumped to 2G.
  - Handle >16 disks when searching for kernel boot device.
  - Added support for AES-NI instructions found in recent Intel processors.
  - Further improvements in suspend and resume.
  - Processes are now switched to TSS per cpu on the amd64 platform,
resulting in removal of the old limit of ~4000 processes.
o OpenBSD/hppa:
  - Multiprocessor support.
o OpenBSD/loongson and OpenBSD/sgi:
  - All MIPS64 based platforms now use MI softfloat code, which implements
all MIPS IV specified floating point operations.
o OpenBSD/sparc64:
  - The vdsp(4) driver now supports the vDisk 1.1 protocol, allowing
Solaris to run on top of an OpenBSD control domain.

 - Improved hardware support, including:
o New vte(4) driver for RDC R6040 10/100 Ethernet devices.
o New rdcphy(4) driver for RDC Semiconductor R6040 10/100 Ethernet PHY.
o New rsu(4) driver for Realtek RTL8188SU/RTL8191SU/RTL8192SU USB
  IEEE 802.11b/g/n wireless devices.
o New urtwn(4) driver for Realtek RTL8188CU/RTL8192CU USB IEEE
  802.11b/g/n wireless devices.
o New utwitch(4) driver for YUREX USB twitch/jiggle of knee sensor.
o Support for AR9271, AR9280+AR7010 and AR9287+AR7010 USB IEEE
  802.11a/g/n wireless adapters has been added to athn(4).
o Support for 82583V has been added to em(4).
o Support for Yukon 88E8059 has been added to msk(4).
o Support for SiS191 has been added to se(4).
o Support for SAS2004 has been added to mpii(4).
o Support for NVIDIA MCP89 SATA has been added to pciide(4).
o Support for Mobility Radeon HD 4200 has been added to radeondrm(4).
o pms(4) support has been significantly reworked and expanded.
o MCLGETI support has been added to xl(4).
o Support for low latency interrupt modulation has been added to ix(4).
o Port multiplier support has been added to ahci(4) and sili(4).
o Support for Sun XVR-300 graphics has been added to radeonfb(4).
o Added workaround for BCM5906 A0/1/2 controller silicon bug in bge(4).
o ugen(4) can now be attached along with other drivers to
  multifunction devices.
o umodem(4) now supports more devices.
o umsm(4) now supports more mobile broadband devices.
o Support for more image processing controls was added to uvideo(4).

 - Generic network stack improvements:
o Reworking of the MCLGETI livelock algorithm to improve forwarding
  and host performance under high network load.
o Added support for socket splicing; sockets can be temporarily
  connected so that the kernel moves data without userland intervention.
  This will be used by relayd(8) in the next release.
o Added AES-GCM support for IPsec.
o Added automatic send and receive buffer scaling for TCP.
o Added wpakey option to ifconfig(8) replacing wpa-psk(8).
o TCP acknowledgments are no longer delayed on the loopback interface.
o Network livelock counters are now exported via sysctl(3).
o A radix tree sorting bug was fixed, which results in significant
  improvements to IPsec performance under certain conditions.
o tcpdump(8) now decodes Multicast DNS (mDNS) traffic.
o Wake on Lan support has been added to arp(8).
o Enabled MPLS and mpe(4) by default on GENERIC kernels.
o Added a mpls option to ifconfig(8) to enable MPLS on a per
  interface basis replacing the global sysctl knob.

 - OpenBGPD, OpenOSPFD and other routing daemon improvements:
o bgpd(8) handles various message encoding errors more gracefully now.
o Notification messages are now logged in bgpd(8).
o ospfd(8) will now correctly redistribute overlapping routes.
o ospfctl(8) now prints the LSDB checksum in the show summary output
  for quick verification that two LSDBs are in sync.
o Fixed ldpd(8)'s message parser to work on all architectures and
  more LDP messages are now implemented.
o Various improvements in ospf6d(8).

 - pf(4) improvements:
o The logging subsystem has been largely rewritten, now logging the
  translated addresses again instead of the original ones.
o match log rules cause a log on the fly, showing the packet exactl

Re: EuroBSDCon 2011 - is your proposal in yet?

2011-05-01 Thread Henning Brauer
* Peter N. M. Hansteen  [2011-05-01 11:05]:
> The 10th European BSD conference will take place in Maarssen, the
> Netherlands on 6 - 9 October 2011, a fresh website is up at
> http://2011.eurobsdcon.org/.
> 
> The call for proposals has been out for a while, with the deadline set
> at May 15th (will be extended if necessary).  
> 
> I would very much like to see more OpenBSD proposals,
> please send yours to submiss...@eurobsdcon.org as soon as you have it
> together (perhaps you have something left over from the partially
> cancelled AsiaBSDCon earlier this year?).
> 
> Please help spread the word and make this year's EuroBSDCon an
> OpenBSD-heavy conference!

Ryan and I will be there (at least, that's the plan - careful with
definate statements after AsiaBSDcon :)) and give a talk to pf's
anniversary called "10 years of pf".

and you should come too, wether speaking or "just" attending.

-- 
Henning Brauer, h...@bsws.de, henn...@openbsd.org
BS Web Services, http://bsws.de
Full-Service ISP - Secure Hosting, Mail and DNS Services
Dedicated Servers, Rootservers, Application Hosting



EuroBSDCon 2011 - is your proposal in yet?

2011-05-01 Thread Peter N. M. Hansteen
The 10th European BSD conference will take place in Maarssen, the
Netherlands on 6 - 9 October 2011, a fresh website is up at
http://2011.eurobsdcon.org/.

The call for proposals has been out for a while, with the deadline set
at May 15th (will be extended if necessary).  

I would very much like to see more OpenBSD proposals,
please send yours to submiss...@eurobsdcon.org as soon as you have it
together (perhaps you have something left over from the partially
cancelled AsiaBSDCon earlier this year?).

Please help spread the word and make this year's EuroBSDCon an
OpenBSD-heavy conference!

- Peter

-- 
Peter N. M. Hansteen, member of the first RFC 1149 implementation team
http://bsdly.blogspot.com/ http://www.bsdly.net/ http://www.nuug.no/
"Remember to set the evil bit on all malicious network traffic"
delilah spamd[29949]: 85.152.224.147: disconnected after 42673 seconds.



Re: macppc: support for Dynamic Frequency Switching

2011-05-01 Thread Martin Pieuchot
On 27/04/11(Wed) 14:21, Martin Pieuchot wrote:
> On 27/04/11(Wed) 12:41, Martin Pieuchot wrote:
> > On 26/04/11(Tue) 18:29, Martin Pieuchot wrote:
> > > The following diff adds support for dfs. It requires my precedent patch
> > > about GPIOs. I don't have a machine with a MPC7448 so it's only tested
> > > with a MPC7447A.
> > > 
> > > I'm also interested in various device-tree dumps for further development.
> > > If you can send me yours, contact me off list.
> > 
> > Updated diff, correct the voltage offset in case the value of the reg
> > property is relative to the gpio controller offset.

Here is a manpage as required by jasper@, I'm not sure what to write or
not to, feel free to comment/correct.

Index: dfs.4
===
RCS file: dfs.4
diff -N dfs.4
--- /dev/null   1 Jan 1970 00:00:00 -
+++ dfs.4   1 May 2011 07:03:47 -
@@ -0,0 +1,54 @@
+.\"$OpenBSD$
+.\"
+.\" Copyright (c) 2011 Martin Pieuchot 
+.\"
+.\" Permission to use, copy, modify, and distribute this software for any
+.\" purpose with or without fee is hereby granted, provided that the above
+.\" copyright notice and this permission notice appear in all copies.
+.\"
+.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+.\"
+.Dd $Mdocdate: April 30 2011 $
+.Dt DFS 4 macppc
+.Os
+.Sh NAME
+.Nm dfs
+.Nd Dynamic Frequence Switching
+.Sh SYNOPSIS
+.Cd "dfs* at macgpio?"
+.Sh DESCRIPTION
+The
+.Nm
+driver provides support for the
+.Va "Dynamic Frequence Switching"
+feature found on some PowerPC microprocessors.
+.Pp
+It allows to conserve power by lowering processor operating frequency.
+Depending on the processor model, the processor-to-system bus ratio can
+be either divided by two or four.
+.Sh HARDWARE
+Processors supported by the
+.Nm
+driver are part of the PowerPC G4 family and are found on various iBook
+and PowerBook machines:
+.Bd -literal -offset indent
+MPC7447A   PowerPC 7447 "Apollo 7"
+MPC7448PowerPC 7448 "Apollo 8"
+.Ed
+.Sh SEE ALSO
+.Xr macgpio 4 ,
+.Xr sysctl 8 ,
+.Rs
+.%T MPC7450 RISC Microprocessor Family Reference Manual
+.Re
+.Sh HISTORY
+Support for the
+.Nm
+driver first appeared in
+.Ox 5.0 .