Re: radeon, amdgpu improvements for aarch64
On Thu, 28 Dec 2023 14:51:35 +0100
Tobias Nygren wrote:
> On Thu, 28 Dec 2023 00:19:44 +
> Taylor R Campbell wrote:
>
> > > +#ifdef _LP64
> > > + if (eaddr < (1UL<<40)) {
>
> > Just to confirm: eaddr is inclusive here, right? As in, if the range
> > were [0x1, 0x2), we would have saddr=0x1 eaddr=0x1 (or
> > maybe eaddr=0x1f000), right?
>
> The end boundary is page-aligned non-inclusive. Thus strict less-than
> is correct. I'll change to ((paddr_t)1 << 40) for clarity.
Brain fart. It should be <= of course.
Re: radeon, amdgpu improvements for aarch64
On Thu, 28 Dec 2023 00:19:44 +
Taylor R Campbell wrote:
> > +#ifdef _LP64
> > + if (eaddr < (1UL<<40)) {
> Just to confirm: eaddr is inclusive here, right? As in, if the range
> were [0x1, 0x2), we would have saddr=0x1 eaddr=0x1 (or
> maybe eaddr=0x1f000), right?
The end boundary is page-aligned non-inclusive. Thus strict less-than
is correct. I'll change to ((paddr_t)1 << 40) for clarity.
> > #if defined(__i386__) || defined(__x86_64__)
> > return x86_select_freelist(tag->_bounce_alloc_hi - 1);
> > +#elif defined(__aarch64__)
> > + return VM_FREELIST_FIRST1T;
>
> This should look through the tag->_ranges to choose
> VM_FREELIST_FIRST1T if it has been restricted with
> bus_dmatag_subregion to lie in that range, and VM_FREELIST_DEFAULT if
> not.
Understood. Will try to implement this.
> > --- sys/uvm/uvm_pglist.c21 Dec 2021 08:27:49 - 1.90
> > +++ sys/uvm/uvm_pglist.c27 Dec 2023 22:06:10 -
> > @@ -112,8 +112,9 @@ static int
> > uvm_pglistalloc_c_ps(uvm_physseg_t psi, int num, paddr_t low, paddr_t high,
> > paddr_t alignment, paddr_t boundary, struct pglist *rlist)
> > {
> > - signed int candidate, limit, candidateidx, end, idx, skip;
> > - int pagemask;
> > + long candidate, limit, candidateidx, end, idx;
> > + int skip;
> > + long pagemask;
>
> I don't really have an issue with this but I think we may need to
> switch int to pfn_t for page frame numbers much more systematically.
> Curious how changing only start_hint from int to long helps? (Commit
> message doesn't explain.)
There's some details in PR 57683.
Basically physseg's avil_start and avail_end are already 64-bit (pfn
encoded in paddr_t) but the hint is for some reason 32-bit so it can
overflow leading to an assertion. I agree it would be better to use
pfn_t consistently but that's a larger scope change than avoiding this
specific overflow issue. Since the code uses uimax() alot, extending
to u_long and ulmax() for now seemed most natural.
Re: VirtIO MMIO for amd64
Update I've got current/amd64 booting on an MMIO-backed block device with qemu's microvm machine, in both ACPI and command-line-hack (which passes the "device" address as a kernel parameter). If anybody wants to give it a try: $ qemu-system-x86_64 -M microvm,rtc=on -enable-kvm -m 256 -cpu host -kernel netbsd.gdb -append "root=ld0a console=com rw" -serial stdio -display none -device virtio-blk-device,drive=hd0 -drive file=netbsd.img,format=raw,id=hd0 -no-acpi Note the "rtc=on", without this init_main.c/inittodr(rootfstime) hangs. On the other hand, Firecracker loops on an init sig11 crash, I suspect that might also be related to RTC, I guess I'll have to port a virtio RTC. The branch with this feature is here https://github.com/NetBSDfr/NetBSD-src/tree/mmio_cmdline It includes the GENPVH mode to boot the NetBSD kernel from qemu's -kernel flag. You'll need at least those two: virtio* at cmdlinebus? #virtio* at acpi? ld* at virtio? # Virtio disk device As previously said, virtio* at acpi? also works. -- Emile `iMil' Heitor | https://imil.net
Re: Change max ttys from 8 to 12?
On Tue 19 Dec 2023 at 12:38:19 -, Michael van Elst wrote: > Bumping both limits to 12 (and augmenting keysyms and the keymaps > for this) would align this with the other *BSDs. I agree. It removes an arbitrary asymmetry. > The con side here is that some keyboards either only have 10 function > keys or already use F11 and F12 for other purposes (like DEC keyboard > has F11=ESC, so ctrl-alt-f11 invokes DDB). Sure, but most of the keyboards have 12 function keys and even if some don't, nobody is forced to try to use them. -Olaf. -- ___ Olaf 'Rhialto' Seibert \X/ There is no AI. There is just someone else's work. --I. Rose signature.asc Description: PGP signature
