Re: [time-nuts] SSR-6t Connector

2012-12-22 Thread shalimr9
As long as you don't have to change the 12AU7, you are OK :)

Didier KO4BB

Sent from my Droid Razr 4G LTE wireless tracker.



-Original Message-
From: paul swed paulsw...@gmail.com
To: Discussion of precise time and frequency measurement time-nuts@febo.com
Sent: Fri, 21 Dec 2012 11:18 AM
Subject: Re: [time-nuts] SSR-6t Connector

Funny
My 3801 has been working fine. But I had read on time-nuts the issues with
the flaky rcvr and thats why I became interested. The 3801s are getting
pretty old. I had to change a 6sk7 in the pre-amp. ;-)
Regards
Paul
WB8TSL

On Fri, Dec 21, 2012 at 12:00 PM, Ed Palmer ed_pal...@sasktel.net wrote:

 Since I have a Z3801A this is an interesting development.  Do you expect
 to see improved performance or is this simply to replace a dead VP receiver
 and bring the Z3801A back to life?

 My 6 channel VP receiver was flaky so I replaced it with an 8 channel
 model.  My Holdover Uncertainty Prediction is now oscillating between a
 high of 2 - 3 microseconds and a low of 200 - 300 ns with an oscillation
 period of 7-9 days.  It's only been running for a few weeks so I'll have to
 wait and see if the oscillations die out.  Depending on how things settle,
 there might not be any need (or room) for improvement.

 Ed


 On 12/21/2012 10:26 AM, W2GPS wrote:

 Tom,

 Synergy already has a carrier board to put the SSR-6T receiver into a VP,
 UT,
 UT+, etc. socket. All that is needed is firmware support for the old
 8-channel
 messages. I am planning to implement this capability for Synergy. It's
 just a
 matter of time and priorities. Eventually Synergy will have the solution
 for
 this problem. If you could gather a list of Time-Nuts people who would
 like one
 or more of these and send it to Art that could speed the process along.

 Rick

 -Original Message-
 From: Tom Van Baak [mailto:t...@leapsecond.com]
 Sent: Friday, December 21, 2012 11:15 AM
 To: Discussion of precise time and frequency measurement
 Subject: Re: [time-nuts] SSR-6t Connector

 Hi Paul,

 I'm pretty sure the hp Z3801A and 58503A/B (and perhaps other 1990's era)
 GPSDO
 use the Motorola Oncore VP receiver. It was, and still is, a famous GPS
 timing
 receiver. Later, many GPSDO evolved to use the Motorola/iLotus M12
 receiver.

 The new Synergy SST-6T is a clever combination h/w and s/w that turns a
 uBlox 6T
  PIC into a PCB that is both h/w and s/w compatible with an M12. It's a
 drop-in
 replacement. But as such, it won't work in a device that is uses an old
 Motorola
 UT/GT/VP receiver.

 I suggested that they also come up with a board that is VP compatible,
 but you
 realize the number of 15-year-old Oncore VP's in the field is probably
 not that
 high. It would make an excellent labor-of-love project to create a
 VP-compatible
 uBlox 6T board, but it's probably not something you can make a business
 case
 for.

 /tvb



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Re: [time-nuts] Z3805A cooling requirements?

2012-12-22 Thread Magnus Danielson

Hi Volker,

On 12/22/2012 04:55 AM, Volker Esper wrote:


Although I am dog-tired it gives me no peace...

I come to the following conclusion:
- The long term Allan deviation gets worse, as long, as the effect of
EFC compensating is in the range of tau
- But: It gets back to its normal value after that
- The short term deviation, however, increases slowly, but it doesn't
settle. It's increasing more and more.

So it is the short term stability, that is affected, rather than the
long term stability.

Am I right or wrong?

Perhaps I'm to tired to decide.


You short term will rise with 1/tau in ADEV is due to white noise. This 
noise may be due to the oscillator or (many times) your measurement rig. 
This is expected from theory (see Allan Deviation on Wikipedia).


A free-running OCXO will have a D*tau/sqrt(2) rise due to linear drift. 
If it is beeing steered it would captured by the control loop and 
depending on it's properties there will be some marginal errors due to it.


A free-running OCXO will also experience temperature shifts and that 
will create a ripple effect in the ADEV/MDEV. If it is being steered the 
PLL loop would have issues fighting it which could leave traces in the 
ADEV/MDEV plot.


For systematic effects like these, the ADEV/MDEV/TDEV plot isn't the 
ideal tool. phase/frequency/drift plots and FT of them might be more useful.


However, as you might have realized, a single event of temperature event 
like this averages out on the large scale of things. ADEV and friends 
isn't a good tool for transient properties, as it is a statistical tool 
to establish noise levels of various types. For that purpose single 
freak events of systematic effect needs to be averaged out or even taken 
out.


Doing your plots to show how they vary over time illustrates this in a 
good way. The event is not part of the long-term noise properties.


Cheers,
Magnus

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Re: [time-nuts] Questions about TAC frontend, and some measurements

2012-12-22 Thread FabioEb

I answer here to Bob Bill and Magnus.


Hi
I think I would grab some sort of USB thermometer and start logging 
the room temperature.
CMOS input op-amps are a pretty good way to buffer the integrating 
capacitor.

They are cheap and have very low bias currents.
Bob


The suspect is temperature, the first
thing I'm suspecting is the FE5680A temp coefficient.
I didnt grasp the real numbers, so I tried estimating
the local drift, i.e. the drift value every 2k samples.
Here the results:
http://www.flickr.com/photos/14336723@N08/8296002061/
The drift stays around -3.2x10^-10 then
abruptly goes to -2.4x10^-10, so if the culprit
is the 5680, it's frequency should change about 1x10^-10,
if I didnt screw up all the calculations.
Does this make sense?

As for the buffer opamp, I will try with MCP6001,
cheap and it's input impedance is so high I will be
limited by the pcb...
By the way, my LM358 seem to be injecting 1.5nA
into the ramp capacitor until it levels to around 1-1.5V.


Like Bob said, start logging the temperature.

Since you have about 86400 s period on this behaviour, I expect that
heating up in the morning (sun or just habits of humans roughly
aligned with sun patterns) be the reason, so this would be 
temperature

dependent. Plotting supply voltage may be another reason.



Magnus, I will log some temperatures and voltages.


scope probe set to 10x, DC coupled.


Do you really get 1-2 cycle long difference measures that way?
You risk a high non-linearity at the small difference side otherwise,
as it takes time to wake the transistors.


...


As I commented, you might want 1-2 cycles to pass, so adding a second
DFF might be needed for that task.


So if I'm understanding you are suggesting to measure on the
second 10MHz edge, instead of the first, I would have 100 to 200nS
instead of 0 to 100nS. I didnt think about this, I like the idea!



Like that you try your interpolator wings!


Sorry, I didnt undestand this part.



I do recommend you to check out the Wenzel clock input stage, which
is being deployed in the TADD-2 divider. Squares up sine clocks
nicely.

Cheers,
Magnus




Hi Fabio,
I am not crazy about your 10 MHz input circuit.  You might want to 
consider

investigating John Miles input arrangement at the following web site:
http://www.ke5fx.com/ac.htm
I used it to drive an input to a divider chip without the output 
resistor or

capacitor.

BillWB6BNQ



Magnus and Bill, the input stage I'm using was inspired by
the wenzel second schematic on this page:
http://www.wenzel.com/documents/waveform.html
But you both are right, I'm starting to see that it's
not that stable.
I will try the discrete solution on the wenzel page.
Is the transformer mandatory or I can avoid it?
In case I have some IF-cans but I've never used and
dont know much about them.

Thank you all,
Fabio.

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Re: [time-nuts] Questions about TAC frontend, and some measurements

2012-12-22 Thread Bob Camp
Hi

It is often harder to measure a pulse that goes from 0 to 100 ns than it is to 
measure one that goes from 100 to 200 ns. 

The resolution on the 0 to 100 measure will be 2X, but the non-linearities at 
zero are quite difficult to deal with. The 100 to 200 measure can get to the 
same resolution with some analog tricks. If you are running into an ADC, the 
resolution may already be good enough. There may be no benefit from making it 
2X better. 

For the measurement you are trying to do, 0.1 ns is probably good enough. A 10 
bit ADC would do that at 100 ns span. A 12 bit ADC would do it at a 200 ns 
span. 

Bob

On Dec 22, 2012, at 8:34 AM, fabi...@quipo.it wrote:

 I answer here to Bob Bill and Magnus.
 
 Hi
 I think I would grab some sort of USB thermometer and start logging the room 
 temperature.
 CMOS input op-amps are a pretty good way to buffer the integrating capacitor.
 They are cheap and have very low bias currents.
 Bob
 
 The suspect is temperature, the first
 thing I'm suspecting is the FE5680A temp coefficient.
 I didnt grasp the real numbers, so I tried estimating
 the local drift, i.e. the drift value every 2k samples.
 Here the results:
 http://www.flickr.com/photos/14336723@N08/8296002061/
 The drift stays around -3.2x10^-10 then
 abruptly goes to -2.4x10^-10, so if the culprit
 is the 5680, it's frequency should change about 1x10^-10,
 if I didnt screw up all the calculations.
 Does this make sense?
 
 As for the buffer opamp, I will try with MCP6001,
 cheap and it's input impedance is so high I will be
 limited by the pcb...
 By the way, my LM358 seem to be injecting 1.5nA
 into the ramp capacitor until it levels to around 1-1.5V.
 
 Like Bob said, start logging the temperature.
 
 Since you have about 86400 s period on this behaviour, I expect that
 heating up in the morning (sun or just habits of humans roughly
 aligned with sun patterns) be the reason, so this would be temperature
 dependent. Plotting supply voltage may be another reason.
 
 
 Magnus, I will log some temperatures and voltages.
 
 scope probe set to 10x, DC coupled.
 
 Do you really get 1-2 cycle long difference measures that way?
 You risk a high non-linearity at the small difference side otherwise,
 as it takes time to wake the transistors.
 
 ...
 
 As I commented, you might want 1-2 cycles to pass, so adding a second
 DFF might be needed for that task.
 
 So if I'm understanding you are suggesting to measure on the
 second 10MHz edge, instead of the first, I would have 100 to 200nS
 instead of 0 to 100nS. I didnt think about this, I like the idea!
 
 
 Like that you try your interpolator wings!
 
 Sorry, I didnt undestand this part.
 
 
 I do recommend you to check out the Wenzel clock input stage, which
 is being deployed in the TADD-2 divider. Squares up sine clocks
 nicely.
 
 Cheers,
 Magnus
 
 
 Hi Fabio,
 I am not crazy about your 10 MHz input circuit.  You might want to consider
 investigating John Miles input arrangement at the following web site:
 http://www.ke5fx.com/ac.htm
 I used it to drive an input to a divider chip without the output resistor or
 capacitor.
 
 BillWB6BNQ
 
 
 Magnus and Bill, the input stage I'm using was inspired by
 the wenzel second schematic on this page:
 http://www.wenzel.com/documents/waveform.html
 But you both are right, I'm starting to see that it's
 not that stable.
 I will try the discrete solution on the wenzel page.
 Is the transformer mandatory or I can avoid it?
 In case I have some IF-cans but I've never used and
 dont know much about them.
 
 Thank you all,
 Fabio.
 
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Re: [time-nuts] Questions about TAC frontend, and some measurements

2012-12-22 Thread Magnus Danielson

Dear Fabio,

On 12/22/2012 02:34 PM, fabi...@quipo.it wrote:

I answer here to Bob Bill and Magnus.


Hi
I think I would grab some sort of USB thermometer and start logging
the room temperature.
CMOS input op-amps are a pretty good way to buffer the integrating
capacitor.
They are cheap and have very low bias currents.
Bob


The suspect is temperature, the first
thing I'm suspecting is the FE5680A temp coefficient.


When it comes to phase, your interpolator may also be sensitive.


I didnt grasp the real numbers, so I tried estimating
the local drift, i.e. the drift value every 2k samples.
Here the results:
http://www.flickr.com/photos/14336723@N08/8296002061/
The drift stays around -3.2x10^-10 then
abruptly goes to -2.4x10^-10, so if the culprit
is the 5680, it's frequency should change about 1x10^-10,
if I didnt screw up all the calculations.
Does this make sense?


Sounds a bit on the high side.


As for the buffer opamp, I will try with MCP6001,
cheap and it's input impedance is so high I will be
limited by the pcb...
By the way, my LM358 seem to be injecting 1.5nA
into the ramp capacitor until it levels to around 1-1.5V.


Like Bob said, start logging the temperature.

Since you have about 86400 s period on this behaviour, I expect that
heating up in the morning (sun or just habits of humans roughly
aligned with sun patterns) be the reason, so this would be temperature
dependent. Plotting supply voltage may be another reason.



Magnus, I will log some temperatures and voltages.


Goodie.


scope probe set to 10x, DC coupled.


Do you really get 1-2 cycle long difference measures that way?
You risk a high non-linearity at the small difference side otherwise,
as it takes time to wake the transistors.


...


As I commented, you might want 1-2 cycles to pass, so adding a second
DFF might be needed for that task.


So if I'm understanding you are suggesting to measure on the
second 10MHz edge, instead of the first, I would have 100 to 200nS
instead of 0 to 100nS. I didnt think about this, I like the idea!


Indeed. Some even let one more edge go and measure between 200 and 300 ns.





Like that you try your interpolator wings!


Sorry, I didnt undestand this part.


Trivial, I like that you experiment and build your own interpolator 
design, build experience.




I do recommend you to check out the Wenzel clock input stage, which
is being deployed in the TADD-2 divider. Squares up sine clocks
nicely.

Cheers,
Magnus




Hi Fabio,
I am not crazy about your 10 MHz input circuit. You might want to
consider
investigating John Miles input arrangement at the following web site:
http://www.ke5fx.com/ac.htm
I used it to drive an input to a divider chip without the output
resistor or
capacitor.

BillWB6BNQ



Magnus and Bill, the input stage I'm using was inspired by
the wenzel second schematic on this page:
http://www.wenzel.com/documents/waveform.html
But you both are right, I'm starting to see that it's
not that stable.
I will try the discrete solution on the wenzel page.


Good. It amplifies up the clock so that you will have low jitter.


Is the transformer mandatory or I can avoid it?


You can avoid it, just make sure that you get the transistors properly 
biased, so DC blocking cap and some resistors.



In case I have some IF-cans but I've never used and
dont know much about them.


It's relative benign transistors being used.

Good luck and look forward to your progress reports.

You got me inspired to try something myself. :)

Cheers,
Magnus

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Re: [time-nuts] Z3805A cooling requirements?

2012-12-22 Thread Magnus Danielson

On 12/22/2012 06:44 PM, Volker Esper wrote:

Thank you for your statement, I have to think about it.

It seems to be clear, that ADEV/MDEV aren't the convenient tools for
characterizing such an event. My goal was to answere the question asked
in the beginning of this thread: Does a constant ventilation of the OCXO
affect the deviation curves and if so in what manner? More precisely: do
I have worse deviation due to ventilation?


Well, the deviation curves was only meant to separate various 
phase-noise forms, not systematic effects, even if they may be 
illustrated to some degree using the tool. However, since noise(s) and 
systematic effects have completely different properties in how 
confidence intervals builds, so they are better measured and treated 
separately before being put back together again. For longer taus the 
systematic effects dominates, so drift, temperature, supply voltage and 
pressure kicks in.



  ... phase/frequency/drift plots and FT of them might be more
  useful.

So let's have a look at the time domain. The picture shows the PPS-TI of
the Z3805 (blue: time difference between OCXO and GPS; red: EFC).

In the middle of the diagram we recognize the reaction to the
ventilation. Before that happens, the curve has a somewhat stable high
frequency noise. After starting the ventilation this noise is extremely
varying in amplitude. IMHO that might mean, that Allan deviation will be
affected at the short term values of tau. This seems to coincide with
the MDEV vs time curves of my diagrams.

Agree?


Agree. I wonder if the forced convection is to strong. You don't want to 
hit the limits of the oven control-range. Wonder if this is a long-term 
effect and if even small adjustment to the setup can remove the bursts 
of noise you are seeing.


Cheers,
Magnus

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Re: [time-nuts] How it was Done - A Day in the Life of Five PPSSources..

2012-12-22 Thread Tom Miller

Thanks David. That's good to know. It's an interesting display.

Regards,
Tom


- Original Message - 
From: David Martin drmar...@ivietechnologies.com

To: time-nuts@febo.com
Sent: Friday, December 21, 2012 1:41 PM
Subject: [time-nuts] How it was Done - A Day in the Life of Five 
PPSSources..




How did he set up the video? What camera?


The Rigol DS4024 Scope has a Record Function.

Basically it stores internally a screen capture for each trigger event.

Therefore the Scope itself takes a picture once a second when triggered
by PPS events.

You can then set the Scope to Replay the whole sequence at a given replay
rate.  I set the scope to Replay each captured screen at 1000 screens per
second. The frame counter in the upper right corner of the screen gives you
the delay from the Record Start.

I then took a movie of the screen replay with a hand held camera.

There does not appear to be any way to save or output the saved screens
other than viewing them on the onboard display.

Rigol has extensive USB Drive and LAN Support but nothing I've found
allows me to save the Record Data.
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Re: [time-nuts] Z3805A cooling requirements?

2012-12-22 Thread Volker Esper


 I wonder if the forced convection is to strong. You don't want to
 hit the limits of the oven control-range. Wonder if this is a
 long-term effect and if even small adjustment to the setup can
 remove the bursts of noise you are seeing.

Now, some hours after switching off the fan, I'm discovering such noise 
bursts even without ventilation :-( That means, I can't be sure, that 
the change in deviation for small tau is caused by the ventilation. May 
be it's just within the natural variation.


I have to state, that this experiment can't proof the assumtion that a 
constant air flow affects the deviation curves of an HP 10811 
significantly. Except for the humps in the greater tau ranges - what 
averages out. In fact, if there is any effect, the effect is small.


What could be worked on further: Not comparing the OCXO with the 
internal GPS signal (which is quite noisy in short term) but with an 
external oscillator. I've got an HP 10544 (similar to the 10811), which 
could be the reference for external time interval measurement.


I'll need some more days...

Volker





Am 22.12.2012 19:14, schrieb Magnus Danielson:

On 12/22/2012 06:44 PM, Volker Esper wrote:

Thank you for your statement, I have to think about it.

It seems to be clear, that ADEV/MDEV aren't the convenient tools for
characterizing such an event. My goal was to answere the question asked
in the beginning of this thread: Does a constant ventilation of the OCXO
affect the deviation curves and if so in what manner? More precisely: do
I have worse deviation due to ventilation?


Well, the deviation curves was only meant to separate various
phase-noise forms, not systematic effects, even if they may be
illustrated to some degree using the tool. However, since noise(s) and
systematic effects have completely different properties in how
confidence intervals builds, so they are better measured and treated
separately before being put back together again. For longer taus the
systematic effects dominates, so drift, temperature, supply voltage and
pressure kicks in.


 ... phase/frequency/drift plots and FT of them might be more
 useful.

So let's have a look at the time domain. The picture shows the PPS-TI of
the Z3805 (blue: time difference between OCXO and GPS; red: EFC).

In the middle of the diagram we recognize the reaction to the
ventilation. Before that happens, the curve has a somewhat stable high
frequency noise. After starting the ventilation this noise is extremely
varying in amplitude. IMHO that might mean, that Allan deviation will be
affected at the short term values of tau. This seems to coincide with
the MDEV vs time curves of my diagrams.

Agree?


Agree. I wonder if the forced convection is to strong. You don't want to
hit the limits of the oven control-range. Wonder if this is a long-term
effect and if even small adjustment to the setup can remove the bursts
of noise you are seeing.

Cheers,
Magnus

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Re: [time-nuts] Questions about TAC frontend, and some measurements

2012-12-22 Thread Bruce Griffiths

Magnus Danielson wrote:

Dear Fabio,

On 12/22/2012 02:34 PM, fabi...@quipo.it wrote:

I answer here to Bob Bill and Magnus.


Hi
I think I would grab some sort of USB thermometer and start logging
the room temperature.
CMOS input op-amps are a pretty good way to buffer the integrating
capacitor.
They are cheap and have very low bias currents.
Bob


The suspect is temperature, the first
thing I'm suspecting is the FE5680A temp coefficient.


When it comes to phase, your interpolator may also be sensitive.


I didnt grasp the real numbers, so I tried estimating
the local drift, i.e. the drift value every 2k samples.
Here the results:
http://www.flickr.com/photos/14336723@N08/8296002061/
The drift stays around -3.2x10^-10 then
abruptly goes to -2.4x10^-10, so if the culprit
is the 5680, it's frequency should change about 1x10^-10,
if I didnt screw up all the calculations.
Does this make sense?


Sounds a bit on the high side.


As for the buffer opamp, I will try with MCP6001,
cheap and it's input impedance is so high I will be
limited by the pcb...
By the way, my LM358 seem to be injecting 1.5nA
into the ramp capacitor until it levels to around 1-1.5V.


Like Bob said, start logging the temperature.

Since you have about 86400 s period on this behaviour, I expect that
heating up in the morning (sun or just habits of humans roughly
aligned with sun patterns) be the reason, so this would be temperature
dependent. Plotting supply voltage may be another reason.



Magnus, I will log some temperatures and voltages.


Goodie.


scope probe set to 10x, DC coupled.


Do you really get 1-2 cycle long difference measures that way?
You risk a high non-linearity at the small difference side otherwise,
as it takes time to wake the transistors.


...


As I commented, you might want 1-2 cycles to pass, so adding a second
DFF might be needed for that task.


So if I'm understanding you are suggesting to measure on the
second 10MHz edge, instead of the first, I would have 100 to 200nS
instead of 0 to 100nS. I didnt think about this, I like the idea!


Indeed. Some even let one more edge go and measure between 200 and 300 
ns.






Like that you try your interpolator wings!


Sorry, I didnt undestand this part.


Trivial, I like that you experiment and build your own interpolator 
design, build experience.




I do recommend you to check out the Wenzel clock input stage, which
is being deployed in the TADD-2 divider. Squares up sine clocks
nicely.

Cheers,
Magnus




Hi Fabio,
I am not crazy about your 10 MHz input circuit. You might want to
consider
investigating John Miles input arrangement at the following web site:
http://www.ke5fx.com/ac.htm
I used it to drive an input to a divider chip without the output
resistor or
capacitor.

BillWB6BNQ



Magnus and Bill, the input stage I'm using was inspired by
the wenzel second schematic on this page:
http://www.wenzel.com/documents/waveform.html
But you both are right, I'm starting to see that it's
not that stable.
I will try the discrete solution on the wenzel page.


Good. It amplifies up the clock so that you will have low jitter.


Is the transformer mandatory or I can avoid it?


You can avoid it, just make sure that you get the transistors properly 
biased, so DC blocking cap and some resistors.



In case I have some IF-cans but I've never used and
dont know much about them.


It's relative benign transistors being used.

Good luck and look forward to your progress reports.

You got me inspired to try something myself. :)

Cheers,
Magnus

Using saturated transistors as switches in the current source and 
elsewhere isn't conducive to fast switching.
The traditional arrangement using current mode switches is much faster 
and more predictable.
Buffering the ramp with an opamp requires that the opamp settling time 
be known so that the opamp has fully settled before a sample is taken. 
With a charge redistribution ADC that has a sampling switch connected to 
a capacitor array a buffer isnt usually necessary.


Bruce

Bruce

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Re: [time-nuts] time-nuts Digest, Vol 101, Issue 152

2012-12-22 Thread Volker Esper


Plot 1: MDEV of the time interval reported by GPSDO
Yes, Said, that are important issues.

By the way: I'm now writing in two threads, I don't know, why the 
original thread (Z3805A cooling requirements?) was splitted... Can we 
please move to the original thread?


I am sure, that the noise of the GPSDO PPS-TI data is much to high to 
recognize the effects. I'm going to make a new setup, where I'll compare 
the GPSDO PPS with an external oscilator, e.g. an HP 10544 or the high 
stability reference within my SMX signal generator.


Volker


Am 22.12.2012 05:07, schrieb Said Jackson:

Hi Volker,

What is being plotted here? Efc? Time interval as reported by the GPSDO? 
External counter versus a stable reference?

It looks like the resolution is approaching 10ns/s (1E-08 at 1s), and that the 
short term effects may be hidden in this noise?

The effects are clearly visible in your first GPSCon plot, not sure if we can 
see the short term noise in these plots..

The 10811 I had tested went from ~3E-012 at 100s to ~2E-011 when the fan was 
on, I think both values are quite a bit below the noise floor of your plot so 
probably hard to measure.

Bye,
Said

Sent from my iPad

On Dec 21, 2012, at 6:47 PM, Volker Esperail...@t-online.de  wrote:


Said,

Unfortunately I don't have the equipment to measure the phase noise of an HP 
10811 (yet).

But I did some work on evaluating the results of my fan experiment. Within this posting 
you'll find two diagrams. The first (named 1_DF9PL...) shows five MDEV curves 
(Modified Allan Deviation), each of them measured at different times. Total time span is 
30.5 hours.

At small tau values (up to 1000 s) only a slight increase of sigma over time 
can be noticed. However, at a tau of 5000 s or greater you can watch sigma 
making a big bump. Ok, that's what we expected before.

In diagram no. 1 it's somewhat fussy to recognize the change of a particular sigma(tau). 
Now, that we've got curious, we want to see, how the sigma(tau) changes over time. So 
I've been providing a second diagram (2_...), where sigma(tau) is a function 
of the time.

You can see, for example, the curve of tau=20480s developing a big hump, and 
falling back to a proper value after about 1800 minutes. All curves at a tau 
greater or equal 2560 do so.

At smaller values the curves are esentially less affected, but - they are not 
back at their starting value after 1800 minutes (30 hours)! You could guess, 
that the hump moves up to longer times with increasing sigma - but it doesn't. 
There is something significantly different below tau=2560s.

1 hour ago, I switched off the fan and laid back the aluminium cover. We wait 
and see.

And now, dear time nuts, it's time to go to bed.

Volker




Am 21.12.2012 18:53, schrieb Said Jackson:

Mark,

Your plot still shows excursions of +/-1E-010, about 100x higher base noise 
than the Z3801A/Z3805A are capable of achieving. Wonder where that noise is 
coming from? This noise is probably much higher than the thermal effects.

The original post was the question does my Z380xA have reduced stability if I add a fan 
or similar, I think the answer is shown to be yes.

Volker, I wonder if you also see fan-induced spurs in the phase noise from 1Hz 
to 100Hz. I would not be surprised if the fan vibration adds significant spurs 
to the 10811A crystal.

Bye,
Said

Sent from my iPad

On Dec 21, 2012, at 9:42 AM, Mark Spencermspencer12...@yahoo.ca   wrote:


This plot should show the frequency change more clearly.   (Same data just 
presented differently.)

It seems to me that the noise goes may be going down a bit for a minute or so 
just after the fan is turned on but I don't believe these plots provide 
conclusive evidence of this.


Regards
Mark Spencer

Message: 7
Date: Fri, 21 Dec 2012 09:27:29 -0800
From: Said Jacksonsaidj...@aol.com
To: Discussion of precise time and frequency measurement
 time-nuts@febo.com
Cc: Discussion of precise time and frequency measurement
 time-nuts@febo.com
Subject: Re: [time-nuts] Z3805A cooling requirements?
Message-ID:83ce0384-2996-4155-b51b-9d79910b2...@aol.com
Content-Type: text/plain;
charset=us-ascii

Great plots guys!

Looking at these results I think my original claim still
holds: ADEV goes up when a fan is involved versus no fan,
even on a double oven 10811..

Clearly visible on the 10811, maybe not so much on the MV89
but that unit seems to have frequency moves into the xE-010
region on Marks plot so maybe the effect is just a bit
hidden?

Bye,
Said

Sent from my iPad

On Dec 21, 2012, at 5:44 AM, Volker Esperail...@t-online.de
wrote:


...and the picture of the experiment...



The picture enclosed can give you a first

impression. What we see is

the difference time between the GPS signal and the

OCXO (blue)

(PPS-TI), which is an HP 10811. In red we can see

the EFC. The total

span is 24 h.

Before I applied the fan, the noise was at a

maximum of about +/- 20 ns.

Some hours after starting the fan the noise is much


Re: [time-nuts] time-nuts Digest, Vol 101, Issue 152

2012-12-22 Thread Alan Melia
Volker.look at the subject line, the posting is in your hands, you dont 
need to just use the reply button, as somone did with a digest which 
forked the thread.. This means all the posing under Digest are hidden 
from view and searching. You can edit the subject line but this does not 
always return to the old thread if you use he reply button. I think it 
depends on the mail client.

Alan
G3NYK
- Original Message - 
From: Volker Esper ail...@t-online.de
To: Discussion of precise time and frequency measurement 
time-nuts@febo.com

Sent: Saturday, December 22, 2012 8:44 PM
Subject: Re: [time-nuts] time-nuts Digest, Vol 101, Issue 152




Plot 1: MDEV of the time interval reported by GPSDO
Yes, Said, that are important issues.

By the way: I'm now writing in two threads, I don't know, why the original 
thread (Z3805A cooling requirements?) was splitted... Can we please move 
to the original thread?


I am sure, that the noise of the GPSDO PPS-TI data is much to high to 
recognize the effects. I'm going to make a new setup, where I'll compare 
the GPSDO PPS with an external oscilator, e.g. an HP 10544 or the high 
stability reference within my SMX signal generator.


Volker


Am 22.12.2012 05:07, schrieb Said Jackson:

Hi Volker,

What is being plotted here? Efc? Time interval as reported by the GPSDO? 
External counter versus a stable reference?


It looks like the resolution is approaching 10ns/s (1E-08 at 1s), and 
that the short term effects may be hidden in this noise?


The effects are clearly visible in your first GPSCon plot, not sure if we 
can see the short term noise in these plots..


The 10811 I had tested went from ~3E-012 at 100s to ~2E-011 when the fan 
was on, I think both values are quite a bit below the noise floor of your 
plot so probably hard to measure.


Bye,
Said

Sent from my iPad

On Dec 21, 2012, at 6:47 PM, Volker Esperail...@t-online.de  wrote:


Said,

Unfortunately I don't have the equipment to measure the phase noise of 
an HP 10811 (yet).


But I did some work on evaluating the results of my fan experiment. 
Within this posting you'll find two diagrams. The first (named 
1_DF9PL...) shows five MDEV curves (Modified Allan Deviation), each of 
them measured at different times. Total time span is 30.5 hours.


At small tau values (up to 1000 s) only a slight increase of sigma over 
time can be noticed. However, at a tau of 5000 s or greater you can 
watch sigma making a big bump. Ok, that's what we expected before.


In diagram no. 1 it's somewhat fussy to recognize the change of a 
particular sigma(tau). Now, that we've got curious, we want to see, how 
the sigma(tau) changes over time. So I've been providing a second 
diagram (2_...), where sigma(tau) is a function of the time.


You can see, for example, the curve of tau=20480s developing a big hump, 
and falling back to a proper value after about 1800 minutes. All curves 
at a tau greater or equal 2560 do so.


At smaller values the curves are esentially less affected, but - they 
are not back at their starting value after 1800 minutes (30 hours)! You 
could guess, that the hump moves up to longer times with increasing 
sigma - but it doesn't. There is something significantly different below 
tau=2560s.


1 hour ago, I switched off the fan and laid back the aluminium cover. We 
wait and see.


And now, dear time nuts, it's time to go to bed.

Volker




Am 21.12.2012 18:53, schrieb Said Jackson:

Mark,

Your plot still shows excursions of +/-1E-010, about 100x higher base 
noise than the Z3801A/Z3805A are capable of achieving. Wonder where 
that noise is coming from? This noise is probably much higher than the 
thermal effects.


The original post was the question does my Z380xA have reduced 
stability if I add a fan or similar, I think the answer is shown to be 
yes.


Volker, I wonder if you also see fan-induced spurs in the phase noise 
from 1Hz to 100Hz. I would not be surprised if the fan vibration adds 
significant spurs to the 10811A crystal.


Bye,
Said

Sent from my iPad

On Dec 21, 2012, at 9:42 AM, Mark Spencermspencer12...@yahoo.ca 
wrote:


This plot should show the frequency change more clearly.   (Same data 
just presented differently.)


It seems to me that the noise goes may be going down a bit for a 
minute or so just after the fan is turned on but I don't believe these 
plots provide conclusive evidence of this.



Regards
Mark Spencer

Message: 7
Date: Fri, 21 Dec 2012 09:27:29 -0800
From: Said Jacksonsaidj...@aol.com
To: Discussion of precise time and frequency measurement
 time-nuts@febo.com
Cc: Discussion of precise time and frequency measurement
 time-nuts@febo.com
Subject: Re: [time-nuts] Z3805A cooling requirements?
Message-ID:83ce0384-2996-4155-b51b-9d79910b2...@aol.com
Content-Type: text/plain;
charset=us-ascii

Great plots guys!

Looking at these results I think my original claim still
holds: ADEV goes up when a fan is involved versus no fan,
even on a double oven 

Re: [time-nuts] Questions about TAC frontend, and some measurements

2012-12-22 Thread Fabio Eboli

When it comes to phase, your interpolator may also be sensitive.


Dont know if I was clear enough, just in case I wasnt able
to explain well before: the data I collected didnt came from
the analog interpolator, but from the OutD that is a digital
out. The interpolator is still in it's infancy.


So if I'm understanding you are suggesting to measure on the
second 10MHz edge, instead of the first, I would have 100 to 200nS
instead of 0 to 100nS. I didnt think about this, I like the idea!


Indeed. Some even let one more edge go and measure between 200 and 
300 ns.


I modified the schematic this way to use the second edge:
http://www.flickr.com/photos/14336723@N08/8297438155/


Like that you try your interpolator wings!


Sorry, I didnt undestand this part.


Trivial, I like that you experiment and build your own interpolator
design, build experience.


Thanks, I like to experiment directly when I can.
This puts me in front of the real problems.
And by the way playing with the interpolator is
something that I'm enjoing; that few transistors
are making something that was sort of magic for me before:
converting nanoseconds pulses in something that can be easily
read. In this work I'm only starting and I'm already on the
edge of my little knowledge on electronics, and I'm learning
much from the resources and contributors to this list.



Good luck and look forward to your progress reports.


I will happily keep sharing the work.



You got me inspired to try something myself. :)


Wow :)
Thank you,
Fabio.

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Re: [time-nuts] Questions about TAC frontend, and some measurements

2012-12-22 Thread Fabio Eboli

Hello, Bruce


Using saturated transistors as switches in the current source and
elsewhere isn't conducive to fast switching.
The traditional arrangement using current mode switches is much
faster and more predictable.


This is something I'd like to understand better.

I'm referring to this schematic here:
http://www.flickr.com/photos/14336723@N08/8293076065/
Q2 and Q5 are saturating toward the end of the
ramp pulse, when the ramp capacitor C1 starts
to go up.
I was prepared to see the circuit I designed
fail miserably on switch time, but it seem
to be working, as far as I could see on the DSO.
As far I can understand, the fact that Q2 and Q6
don't saturate, saves the circuit, since
at the end of the ramp, when Q1 and Q5 are
into saturation, Q6 is able to steer the
current to ground, and reverse bias BE (and CB)
of Q5. Is this correct, or I was only
lucky with the specific parts I used?


Buffering the ramp with an opamp requires that the opamp settling
time be known so that the opamp has fully settled before a sample is
taken. With a charge redistribution ADC that has a sampling switch
connected to a capacitor array a buffer isnt usually necessary.

Bruce



I was planning to read the voltage with a microcontroller's ADC.
I will set a fixed delay from the PPS rising edge and start
sampling there. To do so I need that the voltage on integrating
capacitor to stay reasonably stable during the delay.

Fabio

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Re: [time-nuts] Questions about TAC frontend, and some measurements

2012-12-22 Thread Alan Melia
Hi Fabio taking BJTs deep into saturation stores a lot of charge in the 
collector base capacitance. this must br discharged before a state change 
can occur.  LSTTL gets round this and gets the speed at lower currents by 
clamping the collector to only just in saturation with a schottky diode 
between base and collector. Higher speeds are obtained with a long-tail pair 
like configuration, which switches (diverts) the current flow between left 
and right transistors for the two logic states. The current and power 
dissipation is high but speeds 10 times saturated logic are obtainable. see 
ECL, MECL, or PECL logic family schematics.


Alan
G3NYK


- Original Message - 
From: Fabio Eboli fabi...@quipo.it
To: Discussion of precise time and frequency measurement 
time-nuts@febo.com

Sent: Saturday, December 22, 2012 11:00 PM
Subject: Re: [time-nuts] Questions about TAC frontend, and some measurements



Hello, Bruce


Using saturated transistors as switches in the current source and
elsewhere isn't conducive to fast switching.
The traditional arrangement using current mode switches is much
faster and more predictable.


This is something I'd like to understand better.

I'm referring to this schematic here:
http://www.flickr.com/photos/14336723@N08/8293076065/
Q2 and Q5 are saturating toward the end of the
ramp pulse, when the ramp capacitor C1 starts
to go up.
I was prepared to see the circuit I designed
fail miserably on switch time, but it seem
to be working, as far as I could see on the DSO.
As far I can understand, the fact that Q2 and Q6
don't saturate, saves the circuit, since
at the end of the ramp, when Q1 and Q5 are
into saturation, Q6 is able to steer the
current to ground, and reverse bias BE (and CB)
of Q5. Is this correct, or I was only
lucky with the specific parts I used?


Buffering the ramp with an opamp requires that the opamp settling
time be known so that the opamp has fully settled before a sample is
taken. With a charge redistribution ADC that has a sampling switch
connected to a capacitor array a buffer isnt usually necessary.

Bruce



I was planning to read the voltage with a microcontroller's ADC.
I will set a fixed delay from the PPS rising edge and start
sampling there. To do so I need that the voltage on integrating
capacitor to stay reasonably stable during the delay.

Fabio

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Re: [time-nuts] Questions about TAC frontend, and some measurements

2012-12-22 Thread Tom Miller

Google baker clamp for more on this.

Tom

- Original Message - 
From: Alan Melia alan.me...@btinternet.com
To: Discussion of precise time and frequency measurement 
time-nuts@febo.com

Sent: Saturday, December 22, 2012 6:28 PM
Subject: Re: [time-nuts] Questions about TAC frontend, and some measurements


Hi Fabio taking BJTs deep into saturation stores a lot of charge in the
collector base capacitance. this must br discharged before a state change
can occur.  LSTTL gets round this and gets the speed at lower currents by
clamping the collector to only just in saturation with a schottky diode
between base and collector. Higher speeds are obtained with a long-tail pair
like configuration, which switches (diverts) the current flow between left
and right transistors for the two logic states. The current and power
dissipation is high but speeds 10 times saturated logic are obtainable. see
ECL, MECL, or PECL logic family schematics.

Alan
G3NYK


- Original Message - 
From: Fabio Eboli fabi...@quipo.it

To: Discussion of precise time and frequency measurement
time-nuts@febo.com
Sent: Saturday, December 22, 2012 11:00 PM
Subject: Re: [time-nuts] Questions about TAC frontend, and some measurements



Hello, Bruce


Using saturated transistors as switches in the current source and
elsewhere isn't conducive to fast switching.
The traditional arrangement using current mode switches is much
faster and more predictable.


This is something I'd like to understand better.

I'm referring to this schematic here:
http://www.flickr.com/photos/14336723@N08/8293076065/
Q2 and Q5 are saturating toward the end of the
ramp pulse, when the ramp capacitor C1 starts
to go up.
I was prepared to see the circuit I designed
fail miserably on switch time, but it seem
to be working, as far as I could see on the DSO.
As far I can understand, the fact that Q2 and Q6
don't saturate, saves the circuit, since
at the end of the ramp, when Q1 and Q5 are
into saturation, Q6 is able to steer the
current to ground, and reverse bias BE (and CB)
of Q5. Is this correct, or I was only
lucky with the specific parts I used?


Buffering the ramp with an opamp requires that the opamp settling
time be known so that the opamp has fully settled before a sample is
taken. With a charge redistribution ADC that has a sampling switch
connected to a capacitor array a buffer isnt usually necessary.

Bruce



I was planning to read the voltage with a microcontroller's ADC.
I will set a fixed delay from the PPS rising edge and start
sampling there. To do so I need that the voltage on integrating
capacitor to stay reasonably stable during the delay.

Fabio

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Re: [time-nuts] time-nuts Digest, Vol 101, Issue 152

2012-12-22 Thread Volker Esper


Thank you very much for the advice, I didn't know that at all...
Volker


Am 22.12.2012 22:26, schrieb Alan Melia:

Volker.look at the subject line, the posting is in your hands, you
dont need to just use the reply button, as somone did with a digest
which forked the thread.. This means all the posing under Digest
are hidden from view and searching. You can edit the subject line but
this does not always return to the old thread if you use he reply
button. I think it depends on the mail client.
Alan
G3NYK
- Original Message - From: Volker Esper ail...@t-online.de
To: Discussion of precise time and frequency measurement
time-nuts@febo.com
Sent: Saturday, December 22, 2012 8:44 PM
Subject: Re: [time-nuts] time-nuts Digest, Vol 101, Issue 152




Plot 1: MDEV of the time interval reported by GPSDO
Yes, Said, that are important issues.

By the way: I'm now writing in two threads, I don't know, why the
original thread (Z3805A cooling requirements?) was splitted... Can
we please move to the original thread?

I am sure, that the noise of the GPSDO PPS-TI data is much to high to
recognize the effects. I'm going to make a new setup, where I'll
compare the GPSDO PPS with an external oscilator, e.g. an HP 10544 or
the high stability reference within my SMX signal generator.

Volker


Am 22.12.2012 05:07, schrieb Said Jackson:

Hi Volker,

What is being plotted here? Efc? Time interval as reported by the
GPSDO? External counter versus a stable reference?

It looks like the resolution is approaching 10ns/s (1E-08 at 1s), and
that the short term effects may be hidden in this noise?

The effects are clearly visible in your first GPSCon plot, not sure
if we can see the short term noise in these plots..

The 10811 I had tested went from ~3E-012 at 100s to ~2E-011 when the
fan was on, I think both values are quite a bit below the noise floor
of your plot so probably hard to measure.

Bye,
Said

Sent from my iPad

On Dec 21, 2012, at 6:47 PM, Volker Esperail...@t-online.de wrote:


Said,

Unfortunately I don't have the equipment to measure the phase noise
of an HP 10811 (yet).

But I did some work on evaluating the results of my fan experiment.
Within this posting you'll find two diagrams. The first (named
1_DF9PL...) shows five MDEV curves (Modified Allan Deviation),
each of them measured at different times. Total time span is 30.5
hours.

At small tau values (up to 1000 s) only a slight increase of sigma
over time can be noticed. However, at a tau of 5000 s or greater you
can watch sigma making a big bump. Ok, that's what we expected before.

In diagram no. 1 it's somewhat fussy to recognize the change of a
particular sigma(tau). Now, that we've got curious, we want to see,
how the sigma(tau) changes over time. So I've been providing a
second diagram (2_...), where sigma(tau) is a function of the time.

You can see, for example, the curve of tau=20480s developing a big
hump, and falling back to a proper value after about 1800 minutes.
All curves at a tau greater or equal 2560 do so.

At smaller values the curves are esentially less affected, but -
they are not back at their starting value after 1800 minutes (30
hours)! You could guess, that the hump moves up to longer times with
increasing sigma - but it doesn't. There is something significantly
different below tau=2560s.

1 hour ago, I switched off the fan and laid back the aluminium
cover. We wait and see.

And now, dear time nuts, it's time to go to bed.

Volker




Am 21.12.2012 18:53, schrieb Said Jackson:

Mark,

Your plot still shows excursions of +/-1E-010, about 100x higher
base noise than the Z3801A/Z3805A are capable of achieving. Wonder
where that noise is coming from? This noise is probably much higher
than the thermal effects.

The original post was the question does my Z380xA have reduced
stability if I add a fan or similar, I think the answer is shown
to be yes.

Volker, I wonder if you also see fan-induced spurs in the phase
noise from 1Hz to 100Hz. I would not be surprised if the fan
vibration adds significant spurs to the 10811A crystal.

Bye,
Said

Sent from my iPad

On Dec 21, 2012, at 9:42 AM, Mark Spencermspencer12...@yahoo.ca
wrote:


This plot should show the frequency change more clearly. (Same
data just presented differently.)

It seems to me that the noise goes may be going down a bit for a
minute or so just after the fan is turned on but I don't believe
these plots provide conclusive evidence of this.


Regards
Mark Spencer

Message: 7
Date: Fri, 21 Dec 2012 09:27:29 -0800
From: Said Jacksonsaidj...@aol.com
To: Discussion of precise time and frequency measurement
time-nuts@febo.com
Cc: Discussion of precise time and frequency measurement
time-nuts@febo.com
Subject: Re: [time-nuts] Z3805A cooling requirements?
Message-ID:83ce0384-2996-4155-b51b-9d79910b2...@aol.com
Content-Type: text/plain;
charset=us-ascii

Great plots guys!

Looking at these results I think my original claim still
holds: ADEV goes up when a fan is involved 

Re: [time-nuts] Questions about TAC frontend, and some measurements

2012-12-22 Thread Bob Camp
Hi

One very simple question - how good would it do if you just did it all with 
logic gates? Tri-state buffers and things like that….

Now that you are up to a 100 to 200 ns long pulse, a lot of the fiddly stuff 
about can't get a 2 ns pulse through it goes away. 

I'm not suggesting you tear up what you have. It's just something else to try 
and compare.

Bob

On Dec 22, 2012, at 6:00 PM, Fabio Eboli fabi...@quipo.it wrote:

 Hello, Bruce
 
 Using saturated transistors as switches in the current source and
 elsewhere isn't conducive to fast switching.
 The traditional arrangement using current mode switches is much
 faster and more predictable.
 
 This is something I'd like to understand better.
 
 I'm referring to this schematic here:
 http://www.flickr.com/photos/14336723@N08/8293076065/
 Q2 and Q5 are saturating toward the end of the
 ramp pulse, when the ramp capacitor C1 starts
 to go up.
 I was prepared to see the circuit I designed
 fail miserably on switch time, but it seem
 to be working, as far as I could see on the DSO.
 As far I can understand, the fact that Q2 and Q6
 don't saturate, saves the circuit, since
 at the end of the ramp, when Q1 and Q5 are
 into saturation, Q6 is able to steer the
 current to ground, and reverse bias BE (and CB)
 of Q5. Is this correct, or I was only
 lucky with the specific parts I used?
 
 Buffering the ramp with an opamp requires that the opamp settling
 time be known so that the opamp has fully settled before a sample is
 taken. With a charge redistribution ADC that has a sampling switch
 connected to a capacitor array a buffer isnt usually necessary.
 
 Bruce
 
 
 I was planning to read the voltage with a microcontroller's ADC.
 I will set a fixed delay from the PPS rising edge and start
 sampling there. To do so I need that the voltage on integrating
 capacitor to stay reasonably stable during the delay.
 
 Fabio
 
 ___
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 To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
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