Re: [time-nuts] HP53131A Fan/Blower
Sorry I have not been following this thread closely. Isn't the fan a fairly standard size? If not what is unique about it? There is a good chance I have a few around. You are welcome to contact me directly act...@hotmail.com Best Wishes; Thomas Knox Date: Thu, 27 Feb 2014 15:35:19 -0800 From: tonygreen...@inbox.com To: time-nuts@febo.com Subject: [time-nuts] HP53131A Fan/Blower Has anyone found a suitable replacement or a source for the fan/blower in the HP53131A ? I have talked to Agilent and the fan/blower is not a seperate item, its part of the power supply board. TRY FREE IM TOOLPACK at http://www.imtoolpack.com/default.aspx?rc=if5 Capture screenshots, upload images, edit and send them to your friends through IMs, post on Twitter®, Facebook®, MySpace™, LinkedIn® – FAST! ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] HP53131A Fan/Blower
Tony: I replaced a fan in a 53132 by looking up the specs on the existing fan and matching to one that was available. On the 53132 I used Digi-Key 603-1009-ND. The fan was part of the power supply as you said. The wires are soldered to the board. Good Luck, Mike George On 2/27/2014 18:35, Tony Greene wrote: Has anyone found a suitable replacement or a source for the fan/blower in the HP53131A ? I have talked to Agilent and the fan/blower is not a seperate item, its part of the power supply board. TRY FREE IM TOOLPACK at http://www.imtoolpack.com/default.aspx?rc=if5 Capture screenshots, upload images, edit and send them to your friends through IMs, post on Twitter®, Facebook®, MySpace™, LinkedIn® – FAST! ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] 5370 processor boards available
Hi Well “so far they look the same” is a pretty good answer to the question. Running emulated code, that’s the outcome that I would expect. Of course one always has to be careful when you find the expected result :) To me the next layer here is to see if the basic accuracy of the device can be improved in software. My guess is that’s not going to happen, but one should look into it. If that’s a dead end, there’s always putting a CNT-90 like frequency estimator into the code. Bob On Feb 28, 2014, at 2:16 AM, Poul-Henning Kamp p...@phk.freebsd.dk wrote: In message 7984e000-057c-4790-9d20-e4dac1f60...@rtty.us, Bob Camp writes: Is there any performance data on how the card does with a 5370A and / or a 5370B compared to the original CPU on the exact same box? Put another way - does the counter get better or worse with the new card? I realize that an A will do some things with B firmware, that=92s not the question I'm asking. I'm looking for A to A or B to B timing data. I have spent most of my time trying to answer exactly that question and I have not been able to devise any experiment that shows a difference in noiselevels with a credible statistical uncertainty. Interestingly, it is pretty evident from my experiments that the phase-noise of whatever EXT CLK source I use is the main cause of one-shot noise, so if anybody happens to have a *really* clean 10MHz and a 5370, it would be interesting to hear how low it can go. -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 p...@freebsd.org | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] 5370 processor boards available
In message 87caf1a2-d281-4331-b019-b01b06f11...@rtty.us, Bob Camp writes: To me the next layer here is to see if the basic accuracy of the device can be improved in software. I have a hard time seeing how that would happen. I think one of the best chances would be to improve the phase noise of the 200MHz signal. But don't miss the fact that being able to make a LOT more measurements in the same time also improves noise statistically. -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 p...@freebsd.org | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] 5370 processor boards available
If you use a flash-based embedded ARM board, how much is it worth to you that it works everyday? How much is it worth to you that you do not have to rebuild it once a year or once a month? I have several of them and I corrupted one a couple of years ago. It was not something that was on 24/7 and it was not a power outage. I turned it off myself and it did not come back. Fortunately, it had a pretty much stock distribution on it and it was easy to rebuild. I am more careful now. Yet, my Raspberry Pi is on 24/7 and it survived the many storms we have had in the last 2 months (Florida is the lightning capital of the world, as they say) It is perfectly OK to not care, but most of us are used to equipment that powers up each time you need it and that only requires to flip the power switch to off when you are done. It is bad enough to have to properly close Windows (replace with your favorite OS, they all have similar requirements) and most open apps when you are done before turning the switch off on your desktop system. The fact that it may do it 100 times in a row and not fail is not great consolation if it fails at 101. It is a documented failure mode, not pie in the sky. It is only an issue with regard to your own expectations. Do not disparage people who expect more of the hardware than you do. Didier KO4BB On February 27, 2014 9:29:22 PM CST, Brian Lloyd br...@lloyd.com wrote: On Thu, Feb 27, 2014 at 9:03 PM, paul swed paulsw...@gmail.com wrote: Looks like I win the fiver. Really? You power-failed it and corrupted the file system? Johns created a great board for the 5370. However you can't just turn the 5370 off as this lazy person is used to. Really? You tried it and screwed up the file system? Plus I really have to say after a full day of time-nuttery I won't remember to shut the linux down. So thats the need good old shutdown controlled by the power off button. But as Tom says please send the thoughts to John. Regards Paul WB8TSL -- Brian Lloyd, WB6RQN/J79BPL 706 Flightline Drive Spring Branch, TX 78070 br...@lloyd.com +1.916.877.5067 ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. -- Sent from my Motorola Droid Razr 4G LTE wireless tracker while I do other things. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] 5370 processor boards available
On Fri, Feb 28, 2014 at 8:20 AM, Didier Juges shali...@gmail.com wrote: If you use a flash-based embedded ARM board, how much is it worth to you that it works everyday? How much is it worth to you that you do not have to rebuild it once a year or once a month? I have several of them and I corrupted one a couple of years ago. It was not something that was on 24/7 and it was not a power outage. I turned it off myself and it did not come back. OK, you turned it off and it did not come back. Sounds like a different failure from what we are talking about. You did a normal shut down and it failed. Of course we are going to have some number of random failures in normal operation. S--- happens. And I agree that, if the system has a R/W filesystem and there is no power-fail processing provided, odds are good the filesystem will become corrupted during power-fail at some point in time. But has anyone determined whether or not that happens with the BBB in question? Does it have PF processing? Is there PF detection? Does the PSU hold power up long enough for PF processing to complete? Fortunately, it had a pretty much stock distribution on it and it was easy to rebuild. I am more careful now. Yet, my Raspberry Pi is on 24/7 and it survived the many storms we have had in the last 2 months (Florida is the lightning capital of the world, as they say) And the other side is that a group of negatives does not prove the problem does NOT exist, it only suggests that it does not exist, it only suggests that the probability is lower than originally thought. It is perfectly OK to not care, but most of us are used to equipment that powers up each time you need it and that only requires to flip the power switch to off when you are done. Ah, that is not the point. I agree and I *DO* care. I want my test equipment to power up and work EVERY time. I am still waiting for someone to show that this is a real problem and not just an imagined problem. It is bad enough to have to properly close Windows (replace with your favorite OS, they all have similar requirements) and most open apps when you are done before turning the switch off on your desktop system. Most of them let the processor turn off the power after completing shutdown. That does seem like a useful approach. Allow the power switch to initiate the system shutdown and then let the system remove power. Of course, this is a hardware change and in this case the replacement CPU board is supposed to be a drop-in replacement. The fact that it may do it 100 times in a row and not fail is not great consolation if it fails at 101. It is a documented failure mode, not pie in the sky. N, it is STILL pie-in-the-sky because, as far as I can remember back up this thread, no one has experienced an actual failure, only imagined that it is possible, which gets back to my original question: is this a real problem? It is only an issue with regard to your own expectations. Do not disparage people who expect more of the hardware than you do. I am not disparaging anyone. I am approaching this from an engineering standpoint. When presented with a problem from a client/customer, the first thing to do is to qualify the report. And I am not saying that it is NOT a problem, only that it MAY be an IMAGINED problem where none exists. I have no ego involved in all of this. I actually don't care if I am right or wrong. I am presenting a counter thought process in an attempt to balance the discussion. I would happily pay the $5 and then buy the beer for a good laugh after the fact. -- Brian Lloyd, WB6RQN/J79BPL 706 Flightline Drive Spring Branch, TX 78070 br...@lloyd.com +1.916.877.5067 ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] 5370 processor boards available
Gentleman, Tom Van Baak the (co)founder of this group has kindly asked you yesterday to stop this thread. Please do so. Sent From iPhone On Feb 28, 2014, at 6:20, Didier Juges shali...@gmail.com wrote: If you use a flash-based embedded ARM board, how much is it worth to you that it works everyday? How much is it worth to you that you do not have to rebuild it once a year or once a month? I have several of them and I corrupted one a couple of years ago. It was not something that was on 24/7 and it was not a power outage. I turned it off myself and it did not come back. Fortunately, it had a pretty much stock distribution on it and it was easy to rebuild. I am more careful now. Yet, my Raspberry Pi is on 24/7 and it survived the many storms we have had in the last 2 months (Florida is the lightning capital of the world, as they say) It is perfectly OK to not care, but most of us are used to equipment that powers up each time you need it and that only requires to flip the power switch to off when you are done. It is bad enough to have to properly close Windows (replace with your favorite OS, they all have similar requirements) and most open apps when you are done before turning the switch off on your desktop system. The fact that it may do it 100 times in a row and not fail is not great consolation if it fails at 101. It is a documented failure mode, not pie in the sky. It is only an issue with regard to your own expectations. Do not disparage people who expect more of the hardware than you do. Didier KO4BB On February 27, 2014 9:29:22 PM CST, Brian Lloyd br...@lloyd.com wrote: On Thu, Feb 27, 2014 at 9:03 PM, paul swed paulsw...@gmail.com wrote: Looks like I win the fiver. Really? You power-failed it and corrupted the file system? Johns created a great board for the 5370. However you can't just turn the 5370 off as this lazy person is used to. Really? You tried it and screwed up the file system? Plus I really have to say after a full day of time-nuttery I won't remember to shut the linux down. So thats the need good old shutdown controlled by the power off button. But as Tom says please send the thoughts to John. Regards Paul WB8TSL -- Brian Lloyd, WB6RQN/J79BPL 706 Flightline Drive Spring Branch, TX 78070 br...@lloyd.com +1.916.877.5067 ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. -- Sent from my Motorola Droid Razr 4G LTE wireless tracker while I do other things. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] 5370 processor boards available
I think one of the best chances would be to improve the phase noise of the 200MHz signal. But don't miss the fact that being able to make a LOT more measurements in the same time also improves noise statistically. I agree with this. And it makes me wonder if someone on the list is now eyeing the SR 620 as the next classic instrument in need of a time nuts upgrade? It would be very cool if in the end both the hp5370 and the SR620 can be turned into true timestamping counters, a la the Pendulum CNT-9x and the Agilent 53230. /tvb ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO with all-digital phase/time measurement?
Bob wrote: You can achieve very good accuracy, but at the cost of waiting thousands of seconds between phase points; i.e. where your 1PPS coincides with the 10 millionth OCXO pulse. So, as your 1PPS pulse bobs back and forth, you will often encounter an OCXO pulse up to 10ns early, or up to 10ns late. So, might you count 9,999,999 pulses from the OCXO immediately followed by 10,000,001 pulses. Neither of those, by itself is a signal to change the EFC voltage to your OCXO. In fact, it is normal for your count to alternate between the two for long periods, if you are very very close to exactly 10MHz, just from the quantization error on the 1PPS. It is also normal for 1/T to control the time between phase crossings. So you have to wait for two miscounts in a row in the same direction to make a change. I have been puzzled more than once by your comments about only changing the DAC count every several minutes or more. I am not familiar with the circuit you are using, but in a digital PLL the errors (assessed every second) typically feed a digital filter that drives the DAC. So, there is generally a very small correction every second according to the long running average of the individual errors, rather than a large correction after hundreds or thousands of seconds. If you only adjust the DAC every two miscounts in one direction, you are guaranteed to get slipped cycles (which appeared to be one of the problems you were having when comparing oscillators). This is a reasonable way to get an oscillator roughly on frequency if it is substantially off to start with, but it is not a good way to hold an oscillator within ppb of the desired frequency, and no way at all to hold it in phase lock with the reference. If that is really the way the circuit you are using works, perhaps it would be better to implement a proper all-digital PLL with digital filter than trying to get better results out of the circuit you are using than it is capable of delivering. Or, perhaps I'm not understanding what you are doing? Best regards, Charles ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO with all-digital phase/time measurement?
Hi Charles, The problem is that the only information available is the fact that a phase crossing occurred and whether there were more than 10M counts (or less) since the last PPS. The phase error value is not available to me, nor is the sawtooth value; which would of course be of no value. So, if I have a + phase crossing and then a - phase crossing, what do I know? If they are closely spaced, I can guess that the reason for the bouncing is the jitter on the PPS. If they are not closely spaced, then I can't really conclude anything other than that there is a phase offset in one direction or the other.. I could count the number of crossings over time and estimate the angle of the phase crossing, but I can't really be sure of the direction. Also, since this is not a timing receiver, it tends to wander around about 10-20 ns. So, that wander might be the only reason for a +/- count. In the case where there are two + crossings, or two - crossings in a row, it is a 1/T question. And with 1/T, it may be a long time until the next crossing, depending on how close you are in frequency, and how much the receiver wanders around. I'm aware of the limitations of the hardware. That's why I'm working on a TIC daughterboard. I could have used someone else's board, and a different GPS receiver, and on and on, but what fun would that have been? My goal is to do as much as possible with as little extra as possible using this particular board, learn as much as possible, and enjoy myself. I hope that helps. It's entirely possible that I've made some newbie mistake and that there's a good answer available. But, in that case, I would think that someone else would have already applied it to this board. Oh, and my granddaughter has been pestering me the whole time I've been writing this, so I hope I haven't been a bit short. =) Bob From: Charles Steinmetz csteinm...@yandex.com To: Discussion of precise time and frequency measurement time-nuts@febo.com Sent: Friday, February 28, 2014 12:29 PM Subject: Re: [time-nuts] GPSDO with all-digital phase/time measurement? Bob wrote: You can achieve very good accuracy, but at the cost of waiting thousands of seconds between phase points; i.e. where your 1PPS coincides with the 10 millionth OCXO pulse. So, as your 1PPS pulse bobs back and forth, you will often encounter an OCXO pulse up to 10ns early, or up to 10ns late. So, might you count 9,999,999 pulses from the OCXO immediately followed by 10,000,001 pulses. Neither of those, by itself is a signal to change the EFC voltage to your OCXO. In fact, it is normal for your count to alternate between the two for long periods, if you are very very close to exactly 10MHz, just from the quantization error on the 1PPS. It is also normal for 1/T to control the time between phase crossings. So you have to wait for two miscounts in a row in the same direction to make a change. I have been puzzled more than once by your comments about only changing the DAC count every several minutes or more. I am not familiar with the circuit you are using, but in a digital PLL the errors (assessed every second) typically feed a digital filter that drives the DAC. So, there is generally a very small correction every second according to the long running average of the individual errors, rather than a large correction after hundreds or thousands of seconds. If you only adjust the DAC every two miscounts in one direction, you are guaranteed to get slipped cycles (which appeared to be one of the problems you were having when comparing oscillators). This is a reasonable way to get an oscillator roughly on frequency if it is substantially off to start with, but it is not a good way to hold an oscillator within ppb of the desired frequency, and no way at all to hold it in phase lock with the reference. If that is really the way the circuit you are using works, perhaps it would be better to implement a proper all-digital PLL with digital filter than trying to get better results out of the circuit you are using than it is capable of delivering. Or, perhaps I'm not understanding what you are doing? Best regards, Charles ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
[time-nuts] Thunderbolt monitor upgrade
Here comes a brief but shameless plug :) I just released a significant upgrade to my Thunderbolt monitor with support for an optional WiFi module that can emulate John Miles' Lady Heather Server functionality. It allows you to remotely monitor your Thunderbolt via your home network, or over the internet using Lady Heather, without tying a computer and while saving some money with electricity. Please note that while I will upgrade a kit's software for free, I do not sell an upgrade kit, you have to buy the parts yourself, unless enough people were interested. The kit's page on my web site has more information, including a new version of the manual with all the details. Contact me off-list for any question. Didier KO4BB www.ko4bb.com ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO with all-digital phase/time measurement?
Thanks to everyone who responded. I had this bright idea that I would turn off mail delivery and just read the list through the pipermail interface. It works great, until you want to reply to a message. Sorry if this breaks the thread in two. Language is imprecise even when carefully thought out, and I can see I gave some erroneous impressions. What I am really trying to get at, is whether there is any advantage to using an outboard phase detector like the 4046-based circuit recently posted in the arduino GPSDO thread. I get that this is going to provide a much faster measurement of phase error than the digital counter method. (The RC time constant on that circuit looked pretty fast, ~ 1 second.) But if my loop filter has a time constant measured in the 10s or 100s of seconds, I'm not clear what difference this makes. That was the gist of my 100ns/T thought experiment. Ditto on the comment re: long averaging times != infrequent tuning updates. To clarify my requirements a bit more, I am mostly interested in the learning exercise, but it would be nice to end up with a frequency standard capable of supporting symbol periods (coherent) on the order of seconds for VLF and shortwave digital comms experiments. So, a pretty modest goal of, say, 1E-9. Of course, being an engineer I want to do the best job possible with the parts at hand. Toolkit: I have a handful of the 26-MHz Pletronics ebay OCXOs. The spec sheet says +/- 0.5 ppb over 30 seconds short-term stability. I will try to use a GPS module enabling SW sawtooth correction, an NV08C if I could get it. MCU of choice is STM32 (ARM Cortex-M4). I am still reading the fine print but I believe interrupt handling is strictly deterministic. So, based on the OCXO short-term spec and a 1E-9 performance requirement, could I not then estimate the loop time constant at ~100 seconds, and furthermore argue that my TIC has an effective measurement accuracy of 1/(26 MHz)/(100 s) = 0.4 ns ? Meaning, also, that SW sawtooth correction would be worthwhile? Mark KJ6PC ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] HP53131A Fan/Blower
A fan that worked for me: PAPST model 412 (40x40x20mm, 12V, 80mA, 18dBA, see http://www.ebmpapst.com/en/products/compact-fans/axial-compact-fans/axial_compact_fans.php). ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO with all-digital phase/time measurement?
Bob, If your hardware can only measure if the phase leads or lags. I thnk you still want to change the DAC every second. But you don't do it directly. Used a PI controller. (PI is just PID with no D) You phase detector DOES measure the phase error but the resolution is poor, you only get one bit plus the sign. So you must assume a value for the one bit. Just call it 0.5 degrees or whatever. It may not matter much if you guess wrong. So you get either -0.5 or +0.5 for each phase measurement. Then the correction is to be applied each second is Kp * (phase measurement) + Ki (the sum of all phase measurements) Then you set the DAC to whatever it currently is plus the above correction. If your GPSDO is working correctly and in sync the sum of all phase measurements is be nearly zero but if at start up yu are way off the error will add up and you will apply more and more correction. Then it over shoots but the error integrated over time eventually goes to zero. The key d finding Kp and Ki This works if your local oscillation is good enough not to loose or gain a full cycle per second. Have some other way (based on counting cycles) to set it close then let the Pi controller take over. Once teetotal error gets to zero the PI controller should dither the DAC by one count up and down. On Fri, Feb 28, 2014 at 11:31 AM, Bob Stewart b...@evoria.net wrote: Hi Charles, The problem is that the only information available is the fact that a phase crossing occurred and whether there were more than 10M counts (or less) since the last PPS. The phase error value is not available to me, nor is the sawtooth value; which would of course be of no value. So, if I have a + phase crossing and then a - phase crossing, what do I know? If they are closely spaced, I can guess that the reason for the bouncing is the jitter on the PPS. If they are not closely spaced, then I can't really conclude anything other than that there is a phase offset in one direction or the other.. I could count the number of crossings over time and estimate the angle of the phase crossing, but I can't really be sure of the direction. Also, since this is not a timing receiver, it tends to wander around about 10-20 ns. So, that wander might be the only reason for a +/- count. In the case where there are two + crossings, or two - crossings in a row, it is a 1/T question. And with 1/T, it may be a long time until the next crossing, depending on how close you are in frequency, and how much the receiver wanders around. I'm aware of the limitations of the hardware. That's why I'm working on a TIC daughterboard. I could have used someone else's board, and a different GPS receiver, and on and on, but what fun would that have been? My goal is to do as much as possible with as little extra as possible using this particular board, learn as much as possible, and enjoy myself. I hope that helps. It's entirely possible that I've made some newbie mistake and that there's a good answer available. But, in that case, I would think that someone else would have already applied it to this board. Oh, and my granddaughter has been pestering me the whole time I've been writing this, so I hope I haven't been a bit short. =) Bob From: Charles Steinmetz csteinm...@yandex.com To: Discussion of precise time and frequency measurement time-nuts@febo.com Sent: Friday, February 28, 2014 12:29 PM Subject: Re: [time-nuts] GPSDO with all-digital phase/time measurement? Bob wrote: You can achieve very good accuracy, but at the cost of waiting thousands of seconds between phase points; i.e. where your 1PPS coincides with the 10 millionth OCXO pulse. So, as your 1PPS pulse bobs back and forth, you will often encounter an OCXO pulse up to 10ns early, or up to 10ns late. So, might you count 9,999,999 pulses from the OCXO immediately followed by 10,000,001 pulses. Neither of those, by itself is a signal to change the EFC voltage to your OCXO. In fact, it is normal for your count to alternate between the two for long periods, if you are very very close to exactly 10MHz, just from the quantization error on the 1PPS. It is also normal for 1/T to control the time between phase crossings. So you have to wait for two miscounts in a row in the same direction to make a change. I have been puzzled more than once by your comments about only changing the DAC count every several minutes or more. I am not familiar with the circuit you are using, but in a digital PLL the errors (assessed every second) typically feed a digital filter that drives the DAC. So, there is generally a very small correction every second according to the long running average of the individual errors, rather than a large correction after hundreds or thousands of seconds. If you only adjust the DAC every two miscounts in one direction, you are guaranteed to get slipped cycles
[time-nuts] Why using HP5370 ext-ref is (maybe) a bad idea
A long time ago, I found out that the HP5370 is quite sensitive to qualities of the external reference signal and after playing around with it a bit, I decided to run my HP5370 from its own OCXO since that was both reproducible and eliminated what I suspected was the root cause. While playing around with John's new CPU board, and now having a bit more kit in my lab, I decided to revisit this detail. The setup I created is the following: 10 MHz GPS locked lab-standard feeds ext-ref on the HP3336. The HP3336 generates 10MHz/0dBm which feeds ext-ref on the HP5370 The same lab-standard also feeds the start input of the HP5370 which is setup to start-common, TI, 1k samples, output stddev. And then I step the phase of the HP3336 generated 10MHz through 0...360 degrees relative to the lab-standard. The result is the attached plot, where for every 18 degrees the stddev increases by 8-10ps, roughly 40%. This is evidently because the ext-ref on the HP5370 is multiplied to 200MHz, which is what drives the counter circuits. Another way to run this experiment, is to set the HP3336 to 10.001 MHz and log the stddev's over time while the two clocks sweep each other by in phase. Doing it this way can give you a plot of much higher resolution. And that scenario is where the trouble starts: If the HP5370 ref-in clock synchronous to the experimental signals, you will most likely be lucky, but sometimes you will not and the noise will be much larger. If the HP5370 ref is not synchronous, for instance running of its own OCXO, the two phases will sometimes conspire briefly and you get a few noisy samples, but the average will almost always be good. I have not tried to calibrate/trim the HP5370 to see what that does to these spikes, but it would be an interesting experiment. -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 p...@freebsd.org | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence. attachment: hp5370_phase.png___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Why using HP5370 ext-ref is (maybe) a bad idea
On 28/02/14 22:51, Poul-Henning Kamp wrote: A long time ago, I found out that the HP5370 is quite sensitive to qualities of the external reference signal and after playing around with it a bit, I decided to run my HP5370 from its own OCXO since that was both reproducible and eliminated what I suspected was the root cause. While playing around with John's new CPU board, and now having a bit more kit in my lab, I decided to revisit this detail. The setup I created is the following: 10 MHz GPS locked lab-standard feeds ext-ref on the HP3336. The HP3336 generates 10MHz/0dBm which feeds ext-ref on the HP5370 The same lab-standard also feeds the start input of the HP5370 which is setup to start-common, TI, 1k samples, output stddev. And then I step the phase of the HP3336 generated 10MHz through 0...360 degrees relative to the lab-standard. The result is the attached plot, where for every 18 degrees the stddev increases by 8-10ps, roughly 40%. This is evidently because the ext-ref on the HP5370 is multiplied to 200MHz, which is what drives the counter circuits. Another way to run this experiment, is to set the HP3336 to 10.001 MHz and log the stddev's over time while the two clocks sweep each other by in phase. Doing it this way can give you a plot of much higher resolution. And that scenario is where the trouble starts: If the HP5370 ref-in clock synchronous to the experimental signals, you will most likely be lucky, but sometimes you will not and the noise will be much larger. If the HP5370 ref is not synchronous, for instance running of its own OCXO, the two phases will sometimes conspire briefly and you get a few noisy samples, but the average will almost always be good. I have not tried to calibrate/trim the HP5370 to see what that does to these spikes, but it would be an interesting experiment. I'm not a bit surprised. I tried using the normal HP5370 trimming routines, but I found that using my SIA3000 helped a lot on the 200 MHz synthesis chain. Also, as I have told before the board doing the 10 MHz logic spews out a lot of 5 MHz with overtones, which is a simple mod away. Would be interesting to see if you could trim these systematics down by tweaking the syntesis chain. Maybe some peaks is good indicators for a particular stage offset, which would be expected from the x5 followed by x4 multipliers with tons of filters. The 50 MHz tank would be a good prime suspect I would think. Cheers, Magnus ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] 5370 processor boards available
Hi I agree that improving the basic accuracy is a bit of a stretch. The first thing to look for would be temperature sensitivity that you could take out with a correction table. In another post you beat me to the 200 MHz chain and it’s phase locking. One might be able to do something interesting with a digital filter on the PLL ... Bob On Feb 28, 2014, at 8:18 AM, Poul-Henning Kamp p...@phk.freebsd.dk wrote: In message 87caf1a2-d281-4331-b019-b01b06f11...@rtty.us, Bob Camp writes: To me the next layer here is to see if the basic accuracy of the device can be improved in software. I have a hard time seeing how that would happen. I think one of the best chances would be to improve the phase noise of the 200MHz signal. But don't miss the fact that being able to make a LOT more measurements in the same time also improves noise statistically. -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 p...@freebsd.org | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Why using HP5370 ext-ref is (maybe) a bad idea
In message 53110bc6.6010...@rubidium.dyndns.org, Magnus Danielson writes: Also, as I have told before the board doing the 10 MHz logic spews out a lot of 5 MHz with overtones, which is a simple mod away. I remember you mentioning this, but I never did the mod on my counter, got anything I can search for in the mail-archive ? Would be interesting to see if you could trim these systematics down by tweaking the syntesis chain. It is not obvious to me that the 200MHz multiplier is involved in its own capacity, it may simply be that the 200MHz is slewed across the input signal and that the zero-crossing jitter therefore moves into the window where it matters ? -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 p...@freebsd.org | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Why using HP5370 ext-ref is (maybe) a bad idea
On 01/03/14 00:06, Poul-Henning Kamp wrote: In message 53110bc6.6010...@rubidium.dyndns.org, Magnus Danielson writes: Also, as I have told before the board doing the 10 MHz logic spews out a lot of 5 MHz with overtones, which is a simple mod away. I remember you mentioning this, but I never did the mod on my counter, got anything I can search for in the mail-archive ? Not from the top of my head. What I did was that I soldered one of the transistors base to ground (if I recall correctly) so that the comparator got stuck in the state. Fairly straight-forward. Look at the A8 board and the Q8 and Q6. That ECL loop requires the 10 MHz to be reasonably running for the LED to go on. Don't need that when not looking or suspecting problems. ECL having good rise-time creates shit-load of overtones. Would be interesting to see if you could trim these systematics down by tweaking the syntesis chain. It is not obvious to me that the 200MHz multiplier is involved in its own capacity, it may simply be that the 200MHz is slewed across the input signal and that the zero-crossing jitter therefore moves into the window where it matters ? It does not have to be the 200 MHz syntesis, but it can be. The 10 MHz banks at the 50 MHz resonator tank every 50 ns through the transistor, and if de-tuned will the transitions be of the mark the further you go. The same thing for the 200 MHz resonator tank. The filters helps to other frequencies out. The resonator tanks is just re-triggered oscillators which have saw-tooth time-error phase which you can trim down by moving them more onto frequency. Then again, 200 MHz may cross-talk into the signal path and modulate the trigger point. My guess is both happen to a degree. Cheers, Magnus ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Why using HP5370 ext-ref is (maybe) a bad idea
Hi There is a fairly involved alignment process for the multiplier chain. My *guess* is that small tweaks to the alignment could impact these timing spikes. Sub harmonics tend to produce multiple zero crossings that show up as periodic jitter in the output. The offset input peaks may be a better thing to look at as you tweak the multiplier than the “official” adjustment procedure. Bob On Feb 28, 2014, at 7:07 PM, Magnus Danielson mag...@rubidium.dyndns.org wrote: On 01/03/14 00:06, Poul-Henning Kamp wrote: In message 53110bc6.6010...@rubidium.dyndns.org, Magnus Danielson writes: Also, as I have told before the board doing the 10 MHz logic spews out a lot of 5 MHz with overtones, which is a simple mod away. I remember you mentioning this, but I never did the mod on my counter, got anything I can search for in the mail-archive ? Not from the top of my head. What I did was that I soldered one of the transistors base to ground (if I recall correctly) so that the comparator got stuck in the state. Fairly straight-forward. Look at the A8 board and the Q8 and Q6. That ECL loop requires the 10 MHz to be reasonably running for the LED to go on. Don't need that when not looking or suspecting problems. ECL having good rise-time creates shit-load of overtones. Would be interesting to see if you could trim these systematics down by tweaking the syntesis chain. It is not obvious to me that the 200MHz multiplier is involved in its own capacity, it may simply be that the 200MHz is slewed across the input signal and that the zero-crossing jitter therefore moves into the window where it matters ? It does not have to be the 200 MHz syntesis, but it can be. The 10 MHz banks at the 50 MHz resonator tank every 50 ns through the transistor, and if de-tuned will the transitions be of the mark the further you go. The same thing for the 200 MHz resonator tank. The filters helps to other frequencies out. The resonator tanks is just re-triggered oscillators which have saw-tooth time-error phase which you can trim down by moving them more onto frequency. Then again, 200 MHz may cross-talk into the signal path and modulate the trigger point. My guess is both happen to a degree. Cheers, Magnus ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
