On 01/03/14 00:06, Poul-Henning Kamp wrote:
In message <53110bc6.6010...@rubidium.dyndns.org>, Magnus Danielson writes:
Also, as I have told before the board doing the 10 MHz logic spews out a
lot of 5 MHz with overtones, which is a simple mod away.
I remember you mentioning this, but I never did the mod on my counter,
got anything I can search for in the mail-archive ?
Not from the top of my head. What I did was that I soldered one of the
transistors base to ground (if I recall correctly) so that the
comparator got stuck in the state. Fairly straight-forward. Look at the
A8 board and the Q8 and Q6. That ECL loop requires the 10 MHz to be
reasonably running for the LED to go on. Don't need that when not
looking or suspecting problems. ECL having good rise-time creates
shit-load of overtones.
Would be interesting to see if you could trim these systematics down by
tweaking the syntesis chain.
It is not obvious to me that the 200MHz multiplier is involved in
its own capacity, it may simply be that the 200MHz is slewed across
the input signal and that the zero-crossing jitter therefore moves
into the window where it matters ?
It does not have to be the 200 MHz syntesis, but it can be. The 10 MHz
banks at the 50 MHz resonator tank every 50 ns through the transistor,
and if de-tuned will the transitions be of the mark the further you go.
The same thing for the 200 MHz resonator tank. The filters helps to
other frequencies out.
The resonator tanks is just re-triggered oscillators which have
saw-tooth time-error phase which you can trim down by moving them more
onto frequency.
Then again, 200 MHz may cross-talk into the signal path and modulate the
trigger point. My guess is both happen to a degree.
Cheers,
Magnus
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