Re: [time-nuts] Chinese GPSDO 10 MHz error

2015-08-27 Thread Bob Benward
So how does a frequency lock work?  How is it implemented? Can someone sketch a 
schematic?

And what equipment or technique is used to measure a 2hz error at 100GHz?

Bob

 -Original Message-
 From: time-nuts [mailto:time-nuts-boun...@febo.com] On Behalf Of Tim
 Shoppa
 Sent: Wednesday, August 26, 2015 5:18 PM
 To: Discussion of precise time and frequency measurement
 Subject: Re: [time-nuts] Chinese GPSDO 10 MHz error
 
 Full KE5FX evaluation of BG7TBL GPSDO here:
 http://www.ke5fx.com/gpscomp.htm
 
 I'm wondering out loud if it might, like many hobbyist GPSDO's, be
 frequency-locked rather than phase-locked and thus susceptible to 
 last-digit-
 counter bobble in some long-averaging counter.
 
 Tim N3QE
 
 On Wed, Aug 26, 2015 at 3:18 PM, Perry Sandeen via time-nuts  time-
 n...@febo.com wrote:
 
  Hi,
 
 
 
  On the EEVBLOG  (http://www.eevblog.com/forum/index.php)
 
 
 
  They mention that the 2014-11-06version GPSDO that was “most
  extensively tested, so far (by ke5x and others).
 
 
 
  (Has a) known bug, outputfrequency is not exactly 10mhz
  (9,999,999.999,800 Hz). This translates to ~2hzerror at 100ghz.”
 
 
 
  A question is if this bug isjust for this particular model or all
  other versions suspect?
 
 
 
  I realize that in and of itsself it is very small error, but errors
  tend to multiply or cause incorrectconclusions to testing.
 
 
 
  Another question is will the LHdisplay unit they offer work with other
  Trimble units such as are offered byRDR?
 
 
 
  That said, these models seem tobe a very nice turn-key systems.
 
 
 
  Regards,
 
 
 
  Perrier
 
  ___
  time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to
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Re: [time-nuts] Chinese GPSDO 10 MHz error

2015-08-27 Thread Tim Shoppa
Many hobbyist GPSDO's work, by counting OCXO cycles between some number of
GPS PPS assertions.

Software adjusts EFC based on frequency count. Often times the frequency
count used as input to the software has not just random +/- 1 bobble in
last digit, but also an extra count or two in last digit depending on the
hobbyists' gating choices. The systematic extra count or two will result in
a frequency offset between hobbyist GPSDO and PPS. Other times bugs in the
software that drives EFC might result in a systematic frequency offset.

We just had a poster last week who came here with such a scheme.

Tim N3QE

On Wed, Aug 26, 2015 at 11:54 PM, Bob Benward rbenw...@verizon.net wrote:

 So how does a frequency lock work?  How is it implemented? Can someone
 sketch a schematic?

 And what equipment or technique is used to measure a 2hz error at 100GHz?

 Bob

  -Original Message-
  From: time-nuts [mailto:time-nuts-boun...@febo.com] On Behalf Of Tim
  Shoppa
  Sent: Wednesday, August 26, 2015 5:18 PM
  To: Discussion of precise time and frequency measurement
  Subject: Re: [time-nuts] Chinese GPSDO 10 MHz error
 
  Full KE5FX evaluation of BG7TBL GPSDO here:
  http://www.ke5fx.com/gpscomp.htm
 
  I'm wondering out loud if it might, like many hobbyist GPSDO's, be
  frequency-locked rather than phase-locked and thus susceptible to
 last-digit-
  counter bobble in some long-averaging counter.
 
  Tim N3QE
 
  On Wed, Aug 26, 2015 at 3:18 PM, Perry Sandeen via time-nuts  time-
  n...@febo.com wrote:
 
   Hi,
  
  
  
   On the EEVBLOG  (http://www.eevblog.com/forum/index.php)
  
  
  
   They mention that the 2014-11-06version GPSDO that was “most
   extensively tested, so far (by ke5x and others).
  
  
  
   (Has a) known bug, outputfrequency is not exactly 10mhz
   (9,999,999.999,800 Hz). This translates to ~2hzerror at 100ghz.”
  
  
  
   A question is if this bug isjust for this particular model or all
   other versions suspect?
  
  
  
   I realize that in and of itsself it is very small error, but errors
   tend to multiply or cause incorrectconclusions to testing.
  
  
  
   Another question is will the LHdisplay unit they offer work with
 other
   Trimble units such as are offered byRDR?
  
  
  
   That said, these models seem tobe a very nice turn-key systems.
  
  
  
   Regards,
  
  
  
   Perrier
  
   ___
   time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to
   https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
   and follow the instructions there.
  
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 To unsubscribe, go to
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Re: [time-nuts] Chinese GPSDO 10 MHz error

2015-08-27 Thread Mike Feher
Look in the manual for the 8640B as they use FLL there when the lock button is 
pushed on the front panel. Simply, in one case, in lock, the numbers driving 
the frequency readout is saved and then when the oscillator drifts one way or 
the other, an EFC is applied that attempts to make the new readout driver 
number equal to the saved number. Regards - Mike 

Mike B. Feher, EOZ Inc.
89 Arnold Blvd.
Howell, NJ, 07731
732-886-5960 office
908-902-3831 cell

-Original Message-
From: time-nuts [mailto:time-nuts-boun...@febo.com] On Behalf Of Bob Benward
Sent: Wednesday, August 26, 2015 11:55 PM
To: 'Discussion of precise time and frequency measurement'
Subject: Re: [time-nuts] Chinese GPSDO 10 MHz error

So how does a frequency lock work?  How is it implemented? Can someone sketch a 
schematic?

And what equipment or technique is used to measure a 2hz error at 100GHz?

Bob

 -Original Message-
 From: time-nuts [mailto:time-nuts-boun...@febo.com] On Behalf Of Tim 
 Shoppa
 Sent: Wednesday, August 26, 2015 5:18 PM
 To: Discussion of precise time and frequency measurement
 Subject: Re: [time-nuts] Chinese GPSDO 10 MHz error
 
 Full KE5FX evaluation of BG7TBL GPSDO here:
 http://www.ke5fx.com/gpscomp.htm
 
 I'm wondering out loud if it might, like many hobbyist GPSDO's, be 
 frequency-locked rather than phase-locked and thus susceptible to 
 last-digit- counter bobble in some long-averaging counter.
 
 Tim N3QE
 
 On Wed, Aug 26, 2015 at 3:18 PM, Perry Sandeen via time-nuts  time- 
 n...@febo.com wrote:
 
  Hi,
 
 
 
  On the EEVBLOG  (http://www.eevblog.com/forum/index.php)
 
 
 
  They mention that the 2014-11-06version GPSDO that was “most 
  extensively tested, so far (by ke5x and others).
 
 
 
  (Has a) known bug, outputfrequency is not exactly 10mhz
  (9,999,999.999,800 Hz). This translates to ~2hzerror at 100ghz.”
 
 
 
  A question is if this bug isjust for this particular model or all 
  other versions suspect?
 
 
 
  I realize that in and of itsself it is very small error, but 
  errors tend to multiply or cause incorrectconclusions to testing.
 
 
 
  Another question is will the LHdisplay unit they offer work with 
  other Trimble units such as are offered byRDR?
 
 
 
  That said, these models seem tobe a very nice turn-key systems.
 
 
 
  Regards,
 
 
 
  Perrier
 
  ___
  time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to 
  https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
  and follow the instructions there.
 
 ___
 time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to 
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Re: [time-nuts] Chinese GPSDO 10 MHz error

2015-08-27 Thread Azelio Boriani
The simplest form of a frequency locked loop is the XOR gate, when the
driving signals are 50% square waves. To achieve lock, the phase
difference will be proportional to the voltage needed to the VCO to
generate the desired frequency. Start with a 5V digital gate, suppose
your VCO needs 2.5V to be in frequency: the XOR output will be at 50%
duty cycle to generate, out of an RC, 2.5V and the phase difference
(between the reference and the VCO) will be 90 (or 270) degrees. The
difference will be more or less than 90 if the required voltage is
more or less than 2.5V (positive EFC) or will be more or less than 270
if the VCO has a negative EFC.

On Thu, Aug 27, 2015 at 5:54 AM, Bob Benward rbenw...@verizon.net wrote:
 So how does a frequency lock work?  How is it implemented? Can someone sketch 
 a schematic?

 And what equipment or technique is used to measure a 2hz error at 100GHz?

 Bob

 -Original Message-
 From: time-nuts [mailto:time-nuts-boun...@febo.com] On Behalf Of Tim
 Shoppa
 Sent: Wednesday, August 26, 2015 5:18 PM
 To: Discussion of precise time and frequency measurement
 Subject: Re: [time-nuts] Chinese GPSDO 10 MHz error

 Full KE5FX evaluation of BG7TBL GPSDO here:
 http://www.ke5fx.com/gpscomp.htm

 I'm wondering out loud if it might, like many hobbyist GPSDO's, be
 frequency-locked rather than phase-locked and thus susceptible to 
 last-digit-
 counter bobble in some long-averaging counter.

 Tim N3QE

 On Wed, Aug 26, 2015 at 3:18 PM, Perry Sandeen via time-nuts  time-
 n...@febo.com wrote:

  Hi,
 
 
 
  On the EEVBLOG  (http://www.eevblog.com/forum/index.php)
 
 
 
  They mention that the 2014-11-06version GPSDO that was “most
  extensively tested, so far (by ke5x and others).
 
 
 
  (Has a) known bug, outputfrequency is not exactly 10mhz
  (9,999,999.999,800 Hz). This translates to ~2hzerror at 100ghz.”
 
 
 
  A question is if this bug isjust for this particular model or all
  other versions suspect?
 
 
 
  I realize that in and of itsself it is very small error, but errors
  tend to multiply or cause incorrectconclusions to testing.
 
 
 
  Another question is will the LHdisplay unit they offer work with other
  Trimble units such as are offered byRDR?
 
 
 
  That said, these models seem tobe a very nice turn-key systems.
 
 
 
  Regards,
 
 
 
  Perrier
 
  ___
  time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to
  https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
  and follow the instructions there.
 
 ___
 time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to
 https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
 and follow the instructions there.

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 To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
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Re: [time-nuts] Chinese GPSDO 10 MHz error

2015-08-27 Thread Attila Kinali
On Thu, 27 Aug 2015 17:19:34 +0200
Azelio Boriani azelio.bori...@gmail.com wrote:

 The simplest form of a frequency locked loop is the XOR gate, when the
 driving signals are 50% square waves. To achieve lock, the phase
 difference will be proportional to the voltage needed to the VCO to
 generate the desired frequency. Start with a 5V digital gate, suppose
 your VCO needs 2.5V to be in frequency: the XOR output will be at 50%
 duty cycle to generate, out of an RC, 2.5V and the phase difference
 (between the reference and the VCO) will be 90 (or 270) degrees. The
 difference will be more or less than 90 if the required voltage is
 more or less than 2.5V (positive EFC) or will be more or less than 270
 if the VCO has a negative EFC.

This is the description of a XOR gate based PLL, not an FLL.

The basic difference between PLL and FLL is very very simple:
A PLL measures phase, a FLL measures frequency. 

The control loop then steers the measured value to be as close as
possible to a predetermined constant. As this steering loop is not
perfect, there will be a small error. Depending on what is measured,
it's either a phase or a frequency error.

Attila Kinali

-- 
I must not become metastable. 
Metastability is the mind-killer.
Metastability is the little-death that brings total obliteration.
I will face my metastability. 
I will permit it to pass over me and through me. 
And when it has gone past I will turn the inner eye to see its path. 
Where the metastability has gone there will be nothing. Only I will remain.

___
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Re: [time-nuts] Chinese GPSDO 10 MHz error

2015-08-27 Thread Bob Camp
Hi

At the most basic level:

FLL is frequency locked. Consider a lock system driven by an FM discriminator. 
(That’s 
how the idea originally was done.) The output of the detector is a voltage 
proportional to the 
frequency error.  With a simple loop (gain only / no integrator) you have a 
static frequency 
error. More gain gets you less frequency error. 

PLL is a phase locked loop. A system with a DBM running as a detector is an old 
school 
way to do this. The output of the detector is proportional to the phase 
difference. With a simple loop
(gain only, no integrator) you have a static phase error. More gain gets you 
less phase error
and possibly stability issues. 

If you add an integrator to either control loop, things get more complicated. 
If you go further than that they 
get you into a lot of debates :) The distinction between the two is much easier 
to see when each is paired 
with a simple loop. 

Bob


 On Aug 27, 2015, at 7:36 PM, Azelio Boriani azelio.bori...@gmail.com wrote:
 
 Since I have not found a strong definition for the FLL, I assumed: if
 PLL= zero phase error (and so zero frequency error) the FLL= same
 frequency, random phase. The XOR with RC is a perfect fit for this:
 same frequency all the time but phase determined by the EFC needed to
 have that frequency. The phase = constant, in the XOR/RC is true as
 long as the VCO is stable and the EFC has not to be altered to steer
 the VCO, that constant is not a design parameter but walks with the
 VCO frequency movement.
 
 On Thu, Aug 27, 2015 at 10:50 PM, Attila Kinali att...@kinali.ch wrote:
 On Thu, 27 Aug 2015 17:19:34 +0200
 Azelio Boriani azelio.bori...@gmail.com wrote:
 
 The simplest form of a frequency locked loop is the XOR gate, when the
 driving signals are 50% square waves. To achieve lock, the phase
 difference will be proportional to the voltage needed to the VCO to
 generate the desired frequency. Start with a 5V digital gate, suppose
 your VCO needs 2.5V to be in frequency: the XOR output will be at 50%
 duty cycle to generate, out of an RC, 2.5V and the phase difference
 (between the reference and the VCO) will be 90 (or 270) degrees. The
 difference will be more or less than 90 if the required voltage is
 more or less than 2.5V (positive EFC) or will be more or less than 270
 if the VCO has a negative EFC.
 
 This is the description of a XOR gate based PLL, not an FLL.
 
 The basic difference between PLL and FLL is very very simple:
 A PLL measures phase, a FLL measures frequency.
 
 The control loop then steers the measured value to be as close as
 possible to a predetermined constant. As this steering loop is not
 perfect, there will be a small error. Depending on what is measured,
 it's either a phase or a frequency error.
 
Attila Kinali
 
 --
 I must not become metastable.
 Metastability is the mind-killer.
 Metastability is the little-death that brings total obliteration.
 I will face my metastability.
 I will permit it to pass over me and through me.
 And when it has gone past I will turn the inner eye to see its path.
 Where the metastability has gone there will be nothing. Only I will remain.
 
 ___
 time-nuts mailing list -- time-nuts@febo.com
 To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
 and follow the instructions there.
 ___
 time-nuts mailing list -- time-nuts@febo.com
 To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
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Re: [time-nuts] Chinese GPSDO 10 MHz error

2015-08-27 Thread Bob Benward
Attila,
I concur with you, what Azelio described is a standard off the shelf PLL.
An XOR for a Type I phase discriminator, characterized by a 90 degree phase
lock, and with more complicated logic, a Type II PLL which locks at zero
degrees.  In a well designed loop, in both cases over the long term the
frequency is exact, what it does have to a large extent, is phase jitter.

So how does someone measure an error to 2 parts in a hundred billion?  Or is
that a 2 cycle slip in 100 gig cycles?

Thanks to all that replied.

Bob

 -Original Message-
 From: time-nuts [mailto:time-nuts-boun...@febo.com] On Behalf Of Attila
 Kinali
 Sent: Thursday, August 27, 2015 4:51 PM
 To: Discussion of precise time and frequency measurement
 Subject: Re: [time-nuts] Chinese GPSDO 10 MHz error
 
 On Thu, 27 Aug 2015 17:19:34 +0200
 Azelio Boriani azelio.bori...@gmail.com wrote:
 
  The simplest form of a frequency locked loop is the XOR gate, when the
  driving signals are 50% square waves. To achieve lock, the phase
  difference will be proportional to the voltage needed to the VCO to
  generate the desired frequency. Start with a 5V digital gate, suppose
  your VCO needs 2.5V to be in frequency: the XOR output will be at 50%
  duty cycle to generate, out of an RC, 2.5V and the phase difference
  (between the reference and the VCO) will be 90 (or 270) degrees. The
  difference will be more or less than 90 if the required voltage is
  more or less than 2.5V (positive EFC) or will be more or less than 270
  if the VCO has a negative EFC.
 
 This is the description of a XOR gate based PLL, not an FLL.
 
 The basic difference between PLL and FLL is very very simple:
 A PLL measures phase, a FLL measures frequency.
 
 The control loop then steers the measured value to be as close as
possible to
 a predetermined constant. As this steering loop is not perfect, there
will be a
 small error. Depending on what is measured, it's either a phase or a
 frequency error.
 
 Attila Kinali
 
 --
 I must not become metastable.
 Metastability is the mind-killer.
 Metastability is the little-death that brings total obliteration.
 I will face my metastability.
 I will permit it to pass over me and through me.
 And when it has gone past I will turn the inner eye to see its path.
 Where the metastability has gone there will be nothing. Only I will
remain.
 
 ___
 time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to
 https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
 and follow the instructions there.

___
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To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
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Re: [time-nuts] Chinese GPSDO 10 MHz error

2015-08-27 Thread Alex Pummer
it is a bit more complicated FLL need circuit which is sensitive to 
frequency difference, it looks always,  PLL need a phase detector  and 
has a capture range, which is depend mainly on the bandwidth of the loop 
filter
there are combined phase /frequency detectors, which are sequential 
circuits/logic, usually with some uncertainty --and therefore more phase 
noise-- at zero phase difference

73

Alex


On 8/27/2015 1:50 PM, Attila Kinali wrote:

On Thu, 27 Aug 2015 17:19:34 +0200
Azelio Boriani azelio.bori...@gmail.com wrote:


The simplest form of a frequency locked loop is the XOR gate, when the
driving signals are 50% square waves. To achieve lock, the phase
difference will be proportional to the voltage needed to the VCO to
generate the desired frequency. Start with a 5V digital gate, suppose
your VCO needs 2.5V to be in frequency: the XOR output will be at 50%
duty cycle to generate, out of an RC, 2.5V and the phase difference
(between the reference and the VCO) will be 90 (or 270) degrees. The
difference will be more or less than 90 if the required voltage is
more or less than 2.5V (positive EFC) or will be more or less than 270
if the VCO has a negative EFC.

This is the description of a XOR gate based PLL, not an FLL.

The basic difference between PLL and FLL is very very simple:
A PLL measures phase, a FLL measures frequency.

The control loop then steers the measured value to be as close as
possible to a predetermined constant. As this steering loop is not
perfect, there will be a small error. Depending on what is measured,
it's either a phase or a frequency error.

Attila Kinali



___
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.


Re: [time-nuts] Chinese GPSDO 10 MHz error

2015-08-27 Thread Azelio Boriani
Since I have not found a strong definition for the FLL, I assumed: if
PLL= zero phase error (and so zero frequency error) the FLL= same
frequency, random phase. The XOR with RC is a perfect fit for this:
same frequency all the time but phase determined by the EFC needed to
have that frequency. The phase = constant, in the XOR/RC is true as
long as the VCO is stable and the EFC has not to be altered to steer
the VCO, that constant is not a design parameter but walks with the
VCO frequency movement.

On Thu, Aug 27, 2015 at 10:50 PM, Attila Kinali att...@kinali.ch wrote:
 On Thu, 27 Aug 2015 17:19:34 +0200
 Azelio Boriani azelio.bori...@gmail.com wrote:

 The simplest form of a frequency locked loop is the XOR gate, when the
 driving signals are 50% square waves. To achieve lock, the phase
 difference will be proportional to the voltage needed to the VCO to
 generate the desired frequency. Start with a 5V digital gate, suppose
 your VCO needs 2.5V to be in frequency: the XOR output will be at 50%
 duty cycle to generate, out of an RC, 2.5V and the phase difference
 (between the reference and the VCO) will be 90 (or 270) degrees. The
 difference will be more or less than 90 if the required voltage is
 more or less than 2.5V (positive EFC) or will be more or less than 270
 if the VCO has a negative EFC.

 This is the description of a XOR gate based PLL, not an FLL.

 The basic difference between PLL and FLL is very very simple:
 A PLL measures phase, a FLL measures frequency.

 The control loop then steers the measured value to be as close as
 possible to a predetermined constant. As this steering loop is not
 perfect, there will be a small error. Depending on what is measured,
 it's either a phase or a frequency error.

 Attila Kinali

 --
 I must not become metastable.
 Metastability is the mind-killer.
 Metastability is the little-death that brings total obliteration.
 I will face my metastability.
 I will permit it to pass over me and through me.
 And when it has gone past I will turn the inner eye to see its path.
 Where the metastability has gone there will be nothing. Only I will remain.

 ___
 time-nuts mailing list -- time-nuts@febo.com
 To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
 and follow the instructions there.
___
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To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.


Re: [time-nuts] Chinese GPSDO 10 MHz error

2015-08-27 Thread Bob Camp
Hi

 On Aug 26, 2015, at 11:54 PM, Bob Benward rbenw...@verizon.net wrote:
 
 So how does a frequency lock work?  How is it implemented? Can someone sketch 
 a schematic?
 
 And what equipment or technique is used to measure a 2hz error at 100GHz?

As with all things, this is a “that depends sort of thing. You can measure it 
with a (accurate)
wall clock if you wait for 10^11 seconds (that’s quite a while). If you have a 
counter than 
can measure 1x10^-9 s (1 ns) then you can get to 1x10^-11 by watching a pps for 
about a 
hundred seconds. That’s not to bad to do. If you want to do it quickly, there 
are commercial
test boxes (the TimePod is one of many) that will measure much better than this 
at 1 second. 
If you want do it in the basement, a DMTD is a cheap way to do it. 

In all of these cases, you need something “better than” the device you are 
trying to measure to 
use as a comparison standard. Put another way - your counter needs to be 
calibrated to better than 1 ppm 
to measure 1 ppm. In the case of the GPSDO measurement, checking against a Cs 
standard or a 
Hydrogen Maser would work. You might also use a “known good” GPSDO. 

The comparison may be between 1 pps outputs or between 10 MHz outputs. In both 
cases the data 
should be the same. Your choice of 1 pps or 10 MHz needs to match up between 
your measuring 
gear, your DUT, and your reference standard. 

Lots of choices, lots of ways to do it. Many pieces of gear you could use to 
get the job done. 

Bob


 
 Bob
 
 -Original Message-
 From: time-nuts [mailto:time-nuts-boun...@febo.com] On Behalf Of Tim
 Shoppa
 Sent: Wednesday, August 26, 2015 5:18 PM
 To: Discussion of precise time and frequency measurement
 Subject: Re: [time-nuts] Chinese GPSDO 10 MHz error
 
 Full KE5FX evaluation of BG7TBL GPSDO here:
 http://www.ke5fx.com/gpscomp.htm
 
 I'm wondering out loud if it might, like many hobbyist GPSDO's, be
 frequency-locked rather than phase-locked and thus susceptible to 
 last-digit-
 counter bobble in some long-averaging counter.
 
 Tim N3QE
 
 On Wed, Aug 26, 2015 at 3:18 PM, Perry Sandeen via time-nuts  time-
 n...@febo.com wrote:
 
 Hi,
 
 
 
 On the EEVBLOG  (http://www.eevblog.com/forum/index.php)
 
 
 
 They mention that the 2014-11-06version GPSDO that was “most
 extensively tested, so far (by ke5x and others).
 
 
 
 (Has a) known bug, outputfrequency is not exactly 10mhz
 (9,999,999.999,800 Hz). This translates to ~2hzerror at 100ghz.”
 
 
 
 A question is if this bug isjust for this particular model or all
 other versions suspect?
 
 
 
 I realize that in and of itsself it is very small error, but errors
 tend to multiply or cause incorrectconclusions to testing.
 
 
 
 Another question is will the LHdisplay unit they offer work with other
 Trimble units such as are offered byRDR?
 
 
 
 That said, these models seem tobe a very nice turn-key systems.
 
 
 
 Regards,
 
 
 
 Perrier
 
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Re: [time-nuts] Chinese GPSDO 10 MHz error

2015-08-26 Thread Bob Camp
Hi

Further investigation by list members in China came back with the information 
that this particular 
design is indeed a FLL. The error is considered “acceptable” by the designer. 
This is not the case
on the various CDMA oriented GPSDO’s we typically play with in the US and 
Europe. All of those 
designs (as far as I have seen) use PLL’s as their final lock stage. 

Bob

 On Aug 26, 2015, at 3:18 PM, Perry Sandeen via time-nuts time-nuts@febo.com 
 wrote:
 
 Hi,
 
 
  
 On the EEVBLOG  (http://www.eevblog.com/forum/index.php)
 
 
  
 They mention that the 2014-11-06version GPSDO that was “most extensively 
 tested, so far (by ke5x and others).
 
 
  
 (Has a) known bug, outputfrequency is not exactly 10mhz (9,999,999.999,800 
 Hz). This translates to ~2hzerror at 100ghz.”
 
 
  
 A question is if this bug isjust for this particular model or all other 
 versions suspect?
 
 
  
 I realize that in and of itsself it is very small error, but errors tend to 
 multiply or cause incorrectconclusions to testing.
 
 
  
 Another question is will the LHdisplay unit they offer work with other 
 Trimble units such as are offered byRDR?
 
 
  
 That said, these models seem tobe a very nice turn-key systems.
 
 
  
 Regards,
 
 
  
 Perrier
 
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Re: [time-nuts] Chinese GPSDO 10 MHz error

2015-08-26 Thread Tim Shoppa
Full KE5FX evaluation of BG7TBL GPSDO here: http://www.ke5fx.com/gpscomp.htm

I'm wondering out loud if it might, like many hobbyist GPSDO's, be
frequency-locked rather than phase-locked and thus susceptible to
last-digit-counter bobble in some long-averaging counter.

Tim N3QE

On Wed, Aug 26, 2015 at 3:18 PM, Perry Sandeen via time-nuts 
time-nuts@febo.com wrote:

 Hi,



 On the EEVBLOG  (http://www.eevblog.com/forum/index.php)



 They mention that the 2014-11-06version GPSDO that was “most extensively
 tested, so far (by ke5x and others).



 (Has a) known bug, outputfrequency is not exactly 10mhz (9,999,999.999,800
 Hz). This translates to ~2hzerror at 100ghz.”



 A question is if this bug isjust for this particular model or all other
 versions suspect?



 I realize that in and of itsself it is very small error, but errors tend
 to multiply or cause incorrectconclusions to testing.



 Another question is will the LHdisplay unit they offer work with other
 Trimble units such as are offered byRDR?



 That said, these models seem tobe a very nice turn-key systems.



 Regards,



 Perrier

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 To unsubscribe, go to
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[time-nuts] Chinese GPSDO 10 MHz error

2015-08-26 Thread Perry Sandeen via time-nuts
Hi,


 
On the EEVBLOG  (http://www.eevblog.com/forum/index.php)


 
They mention that the 2014-11-06version GPSDO that was “most extensively 
tested, so far (by ke5x and others).


 
(Has a) known bug, outputfrequency is not exactly 10mhz (9,999,999.999,800 Hz). 
This translates to ~2hzerror at 100ghz.”


 
A question is if this bug isjust for this particular model or all other 
versions suspect?


 
I realize that in and of itsself it is very small error, but errors tend to 
multiply or cause incorrectconclusions to testing.


 
Another question is will the LHdisplay unit they offer work with other Trimble 
units such as are offered byRDR?


 
That said, these models seem tobe a very nice turn-key systems.


 
Regards,


 
Perrier

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