it is a bit more complicated FLL need circuit which is sensitive to
frequency difference, it looks always, PLL need a phase detector and
has a capture range, which is depend mainly on the bandwidth of the loop
filter
there are combined phase /frequency detectors, which are sequential
circuits/logic, usually with some uncertainty --and therefore more phase
noise-- at zero phase difference
73
Alex
On 8/27/2015 1:50 PM, Attila Kinali wrote:
On Thu, 27 Aug 2015 17:19:34 +0200
Azelio Boriani <azelio.bori...@gmail.com> wrote:
The simplest form of a frequency locked loop is the XOR gate, when the
driving signals are 50% square waves. To achieve lock, the phase
difference will be proportional to the voltage needed to the VCO to
generate the desired frequency. Start with a 5V digital gate, suppose
your VCO needs 2.5V to be in frequency: the XOR output will be at 50%
duty cycle to generate, out of an RC, 2.5V and the phase difference
(between the reference and the VCO) will be 90 (or 270) degrees. The
difference will be more or less than 90 if the required voltage is
more or less than 2.5V (positive EFC) or will be more or less than 270
if the VCO has a negative EFC.
This is the description of a XOR gate based PLL, not an FLL.
The basic difference between PLL and FLL is very very simple:
A PLL measures phase, a FLL measures frequency.
The control loop then steers the measured value to be as close as
possible to a predetermined constant. As this steering loop is not
perfect, there will be a small error. Depending on what is measured,
it's either a phase or a frequency error.
Attila Kinali
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