Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-21 Thread Steve Rooke
 can no longer claim fs
 timing.  What you can claim is a long term frequency stability in ppm.

OK, so your smart, well done, congratulations! Let's forget about
femtoseconds and shove them firmly in the bin, so no one talk about
them again, OK. Now, if you look at Warren's block diagram you will
see that the reference (device given) and DUT oscillators are feed via
pads (values given) into a mixer. The output of this mixer is fed via
a 100kHz LPF to remove the sum product and then via a simple op-amp
with 100 gain. The rest of the loop is just a way to add the necessary
DC offset such that when the reference and DUT oscillators match, IE.
the average DC out of the mixer is 0V, the EFC on the reference
oscillator is biased correctly. So you can look up the output of a
10811 ocxo and also see the specs to work out the EFC F/V and I'm sure
this information is probably very easily available via the resources
in this list. To be honest, I expect that the EFC voltage deviation is
going to be small relative to the full range. You know that there is a
100kHz R/C filter in the loop so perhaps you can scribble some numbers
down on a piece of paper with your pencil. If you can't, what more do
you need to be able to do this, thanks for your help.

 This is my simple understanding of phase detectors and mixers.  You might
 get there by dividing down a bunch of numbers but I don't think the method
 supports the claim (of fs timing).

Let's kill the fs thing please!

Steve

 Bob



 - Original Message -
  From: Steve Rooke
  To: Discussion of precise time and frequency measurement
  Sent: Sunday, June 20, 2010 2:00 AM
  Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method


  Bob,

  Can I answer this one.

  On 20 June 2010 04:36, Robert Benward rbenw...@verizon.net wrote:
   Warren,
   I was responding to ke5fx comment using a 12-bit, 480-Hz serial DAQ in
   place of the voltage-to-frequency converter in the diagram above. A DAQ
   is a multifaceted data acquisition system, where as in your annotated
   diagram you showed an ADC.

  The DAQ that Warren is referring to to has a 12bit ADC input capable
  of performing up to 480 samples per second.

   I understand it's analog, but you said: Say you have a nice logic gate
 with
   1 ns delay . So back to the analog loop, do you have an analysis that
 gets
   you from EFC to femtosecond stability? PLLs are notorious for phase
 noise,
   the phase noise actually representing the error term that brings the
 loop
   back into lock.

  I personally think the 1fs issue has become way out of hand and people
  are now focussing on that instead of the big picture. Whilst I
  understand that the professional engineers on this list wish to pounce
  on every t that is not crossed, every i that is not dotted, and
  requiring a complete mathematical breakdown of everything, it is not
  going to happen here. If those professional engineers would like to
  assist with the process of understanding and documenting this idea in
  a way that pulls their chain, that would be great, but if it's down to
  pointing the finger at the amateur engineers and laughing, then
  perhaps they need more education in etiquette. Remember the golden
  rule, do unto others as you would wish to be done.

  Sure, some of us do not have the correct technical engineering banter,
  so when we call the World a sort of round ball shape, please don't
  play deaf until we say it's an oblate spheroid. Try to help us
  communicate with you, we are trying to describe things in the best way
  we can and we have something useful to contribute, IE. just take
  Warren's TPLL implementation which seems to be producing good results.
  So why don't we try to understand exactly how it is doing this instead
  of ripping it apart and saying you shouldn't do it that way, you have
  to do it this way. Remember that geezer who invented the lightbulb, he
  didn't work it all out mathematically on paper before he chose
  tungsten, no he did it experimentally and everyone seems to think
  highly of him.

  Steve
  
  
   For your second email:
  
  You are now averaging the repeatable jitter? YES
   I was not questioning the procedure, I was questioning the conclusion;
  
  Are you using a digital phase detector or a mixer as shown? Analog
  Phase detector
   Why the digital analogy if it's all analog?
  
  Do you have an analysis of the loop sensitivity/resolution? No
  analysis, No limit it is analog
   I don't agree with you about the limit, and without an analysis or even
 a
   simple calculation, how do arrive at femtosecond lock? if there is no
   limit, why not a hundred times less?
  
  Why do you say the results are repeatable in the short term vs the long
  term? Long term includes other factors such as non random drift, not
  just random Noise
   Maybe so, but using the short term , is not a license to better jitter
   figures by a factor of 100. Since you are not using digital, I don't
 know
   where

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-21 Thread Steve Rooke
Nigel,

Thanks for letting us have your name.

On 21 June 2010 10:05,  gandal...@aol.com wrote:
 Warren

 Your stock answer of claiming that everyone and his granny is missing  the
 point is wearing a bit thin, and despite your suggestion I have not missed
 anything either and that includes John's results.

But have you looked at the block schematic and understood how it works
from that?

 Those results, as far as they go, look very good, and I have no doubt  you
 deserve credit for what you've achieved, but what YOU seem to have  missed,
 or conveniently continue to ignore, is the need to be able to  prove, or
 provide sufficient information so that someone else can  prove, that your
 results are applicable to a more general case, and at  least to the accuracy 
 that
 you claim.

So the only way to prove this for you is not empirically, it has to be
numerically! Enjoy your wait!

 There will always be empirical design methods, so called rules of  thumb
 for example, and these can be very valuable tools but the results from  such
 methods, indeed the results from any design method, still need to be
 evaluated and confirmed in practice.

And what part of confirmed in practice have you not understood so
far. Your saying one thing and then something different. I am totally
confused by your use of the English language despite coming from
somewhere that teaches the Queen's English.

 In a similar fashion your measurement technique, again as with all others,
 needs validation and proper analysis of its limitations before you can
 truly  come to rely upon it as a stand alone tool.
 It may well be good enough for everything you need but despite  John's
 measurements, and however good his results, what you haven't  demonstrated so
 far is the ability to evaluate those limitations so you can be  sure of that.
 The only way at the moment that you can be really sure of  your
 measurements each and every time is to have someone like John check  your 
 results each
 and every time.

John spent a month testing LOTS of different devices with thei TPLL
against a  TSC trying to see if it would fail but he could not. He
did come to some conclusions as to the limited range that the TPLL can
be used over and we accept that. So, you want to be pedantic and say
that if you can only prove it empirically, then you have to test it in
an infinite number of ways. It's a bloody good job that the guy who
invented the lightbulb only had to do it 14,000 times and not an
infinite number of times as we would all be in the dark now, wouldn't
we.

 It doesn't matter how many times your results are checked and confirmed,
 and it doesn't matter that your technique might be perfect and your results
 might be perfect every time, what you've demonstrated very clearly so far is
  that you just don't know whether or not that's true.

Do you believe in God? Go ahead and prove it!

 I've wondered sometimes if you're just frightened that somebody  might
 prove you wrong but I don't recall anyone suggesting you're actually  wrong,
 all I've seen is folks trying to help you and offer well meant and  useful
 advice that could assist you properly evaluate the limitations of  what you're
 proposing.

Actually, over the whole period that the TPLL has been discussed on
this list it's my observation that a lot of the input from others
has NOT been well meant and  useful advice and your just proving it
here and now.

 However, there must be a definite blockage somewhere because you seem  to
 have gone into auto repeat mode, and for someone who claims not to have time
 to produce any documentation you must have wasted hours and hours churning
 out  the same old smokescreens.

And your still asking the same old questions over and over again when
you should have realised that your not talking to someone who can give
you the answers you need to satisfy YOU. It's no good trying to get
blood out of a stone, perhaps it's your turn to donate some of the red
stuff and try to understand this thing without someone being able to
describe it your language.

OK, I hear you say, so let's have a full schematic for us to work
with. Well, I'll tell you exactly what will happen if that gets put on
the table shall I. There will be a flood of posts from certain
quarters who will say, you shouldn't do it like that, you should do it
like this, what a stupid design, this is all wrong, what a stupid chap
this is! Get the idea. If you haven't already spotted this, this list
is a TOUGH ROOM and there is no sympathy for anyone who is unable to
show they are top of the class. Well, it's for time-nuts, so I agree
it's a bleeding edge technical group but there are a lot of people on
this list who are really fascinated by this area and really want to
learn and contribute. I've thrown up a good deal of stupid ideas
since I joined this group but have learnt a great deal on the subject,
perhaps you should learn some humility.

 Refusing to share your recipe so to speak, with all the 

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-21 Thread Steve Rooke
On 21 June 2010 10:49, Chuck Harris cfhar...@erols.com wrote:
 No disrespect to you or John intended, but that is a data set of one
 experiment.
 We used to call that a High School Proof.

What is not said here is that John spent a month testing the TPLL with
a variety of different sources just to see if he could make it fail
but he could not. Just because you only see one set of results, does
not show the whole picture here..


 It takes an infinite number of experiments of that sort to prove a
 conjecture.

Agreed but statistics would suggest you don't have to go to those lengths.

Cheers,
Steve

 -Chuck Harris

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Steve Rooke - ZL3TUV  G8KVD
The only reason for time is so that everything doesn't happen at once.
- Einstein

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-21 Thread Steve Rooke
On 21 June 2010 11:49, Chuck Harris cfhar...@erols.com wrote:

 If there have been an infinite number of tests done, and all are verified as
 correct, we have a pretty fair idea that the next test done will also be
 correct...
 but the verification is important... without it we cannot know for sure. The
 infinite + 1st test could be the exception that disproves the conjecture.

Surely that is impossible!

Cheers,
Steve
-- 
Steve Rooke - ZL3TUV  G8KVD
The only reason for time is so that everything doesn't happen at once.
- Einstein

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-21 Thread Steve Rooke
There is a fairly detailed block schematic that has been posted, even
a photo of the proto BB just to show how simple it is. Perhaps a full
component level schematic will surface sometime.

I think that the math that is needed to describe this TPLL will have
to come from a third-party if that is what is required anyway.

Steve

On 21 June 2010 12:37, Bob Camp li...@rtty.us wrote:
 Hi

 Schematics of each of the various implementations tired would be nice. That 
 would allow others to implement duplicates and see what happened. Without 
 schematics only approximations can be implemented and analyzed. That 
 generally opens up more issues than it addresses. The nature of the 
 conversation so far is not one that encourages participation or shared 
 experimentation.

 Details of the various experiments attempted would be helpful. The rabbit 
 out o the hat approach to data gets pretty old pretty fast. It's apparent 
 from various oblique references that far more than the run off against the 
 Symmetricom box has been done.

 A more rigorous  approach to the math is needed if this is ever going to be 
 accepted. This is after all an area where hair splitting issues over the math 
 have been a very big deal for at least 40 years.

 Bob


 On Jun 20, 2010, at 7:17 PM, Magnus Danielson wrote:

 On 06/21/2010 12:49 AM, Chuck Harris wrote:
 WarrenS wrote:

 GandalfG8 Posted:
  Snake Oil anyone?

 I nice short response, but it shows missed the MAJOR difference. You
 need to see:
  http://www.thegleam.com/ke5fx/tpll.htm 
 ws

 No disrespect to you or John intended, but that is a data set of one
 experiment.
 We used to call that a High School Proof.

 It takes an infinite number of experiments of that sort to prove a
 conjecture.

 It doesn't prove it, just makes it fairly likely correct.

 But then again, correct is not available here. Sufficiently accurate 
 within some bounds is. These bounds can be of a myriad of types.

 As for the Warren style TPLL, a particular implementation needs to be 
 referred to, both in form of analogue design and digital processing.

 From that limiting properties may be established. Some of these may be 
 compensated for enhanced performance.

 Cheers,
 Magnus

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-- 
Steve Rooke - ZL3TUV  G8KVD
The only reason for time is so that everything doesn't happen at once.
- Einstein

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-20 Thread Steve Rooke
Bob,

Can I answer this one.

On 20 June 2010 04:36, Robert Benward rbenw...@verizon.net wrote:
 Warren,
 I was responding to ke5fx comment using a 12-bit, 480-Hz serial DAQ in
 place of the voltage-to-frequency converter in the diagram above.   A DAQ
 is a multifaceted data acquisition system, where as in your annotated
 diagram you showed an ADC.

The DAQ that Warren is referring to to has a 12bit ADC input capable
of performing up to 480 samples per second.

 I understand it's analog, but you said: Say you have a nice logic gate with
 1 ns delay . So back to the analog loop, do you have an analysis that gets
 you from EFC to femtosecond stability?  PLLs are notorious for phase noise,
 the phase noise actually representing the error term that brings the loop
 back into lock.

I personally think the 1fs issue has become way out of hand and people
are now focussing on that instead of the big picture. Whilst I
understand that the professional engineers on this list wish to pounce
on every t that is not crossed, every i that is not dotted, and
requiring a complete mathematical breakdown of everything, it is not
going to happen here. If those professional engineers would like to
assist with the process of understanding and documenting this idea in
a way that pulls their chain, that would be great, but if it's down to
pointing the finger at the amateur engineers and laughing, then
perhaps they need more education in etiquette. Remember the golden
rule, do unto others as you would wish to be done.

Sure, some of us do not have the correct technical engineering banter,
so when we call the World a sort of round ball shape, please don't
play deaf until we say it's an oblate spheroid. Try to help us
communicate with you, we are trying to describe things in the best way
we can and we have something useful to contribute, IE. just take
Warren's TPLL implementation which seems to be producing good results.
So why don't we try to understand exactly how it is doing this instead
of ripping it apart and saying you shouldn't do it that way, you have
to do it this way. Remember that geezer who invented the lightbulb, he
didn't work it all out mathematically on paper before he chose
tungsten, no he did it experimentally and everyone seems to think
highly of him.

Steve


 For your second email:

You are now averaging the repeatable  jitter?     YES
 I was not questioning the procedure, I was questioning the conclusion;

Are you using a digital phase detector or a mixer as shown?     Analog
Phase detector
 Why the digital analogy if it's all analog?

Do you have an analysis of the loop sensitivity/resolution?        No
analysis, No limit it is analog
 I don't agree with you about the limit, and without an analysis or even a
 simple calculation, how do arrive at femtosecond lock?  if there is no
 limit, why not a hundred times less?

Why do you say the results are repeatable in the short term vs the long
term?    Long term includes other factors such as non random drift, not
just random Noise
 Maybe so, but using the short term , is not a license to better jitter
 figures by a factor of 100.  Since you are not using digital, I don't know
 where this example came from or why it is relevant.

 Is there not a lower limit to how much you can average?         Depends or
 everything, but not up to  1 sec of averaging when the conditions are
 made right
 I don't understand how you arrive at this conclusion


 For your last email:
 What attracted me to the TPLL question now was that you comment that you are
 maintaining a femtosecond lock. Please don't dumb it down for me.  I may not
 understand all the statistical stuff, but I can understand an analysis.


 Bob



 - Original Message -
 From: WarrenS warrensjmail-...@yahoo.com
 To: Discussion of precise time and frequency measurement
 time-nuts@febo.com
 Sent: Saturday, June 19, 2010 3:27 AM
 Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method


 Bob

 Don't know if I can explain it to you, I'm not so good at explaining,
 I'll give it  *ONE*  try.
 Example with some random picked numbers (JUST TO SHOW THE MAIN POINTS).

 I tried,
 All information and test  that are available on the TPLL is on JOHN'S
 KE5FX
 site or in past postings.
 http://www.thegleam.com/ke5fx/tpll.htm

 One other thing I may not of made clear, The analog averaging thing does
 not
 help at low freq like at 1 PPS
 The TPLL works great because it is at a high freq like 5 or 10 MHz.
 DAQ == DataQ == ADC

 I don't think 10ps is achievable under any dynamic conditions IMHO
 OK, I don't really care, use whatever number you want, you'll still end up
 below the Ref osc noise.
 but
 You may be surprised then by what the single shot Aperture uncertainty
 specs are for the kind of devices that really care about this sort of
 thing.
 But then none of that really maters AT ALL,
 because there is NO Digital anything in the simple TPLL before the ADC
 where
 a 10 Hz device would work fine for most.
 I

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-20 Thread Robert Benward
Steve,
I am a professional engineer, but in this arena I am an amateur.  That is 
why I'm asking the questions, not to put down, but to understand some of the 
claims made.  And as I said in one of my previous emails, I've seen amateurs 
run circles around the professionals, and those professional admitting utter 
astonishment at those amateur accomplishments (this is in the area of 
amateur astrophotography).

What I have heard throughout this thread is a lot of bashing of those asking 
the questions, surfacing as derogatory and berating comments on other's 
understanding.  I have also heard much claims to a certain procedure without 
one iota of numerical mumbo-jumbo to back it up.

The issue here is an inability to describe a simple claim.  Pete has 
attempted to put things in simple numbers, and I see where he is going, and 
I concur with some of his calculations.  If one can not describe what 
appears to be a simple procedure, then I must question the basic 
understanding behind the explanation.  If you make a wild claim, and then 
you can't even get the bullet on the paper, then I must question the 
shooter's understanding.

I guess I am not comfortable with the use of femtoseconds to describe 
frequency accuracy.  Technically, a locked PLL is at the exact frequency as 
the reference, as measured in the long term.  The phase between the two may 
not be at zero, that depends on the type of phase detector and the DC 
offsets in the system.  On the short term, phase noise of the reference will 
cause the loop to generate error terms which will change the phase of the 
DUT.  Oscillators are also specified using phase noise, e.g. 135dB down @ 
100Hz.  That specifies how much energy is not in the bandwidth of the 
carrier.  It also implies the phase is constantly changing!  If the phase is 
changing, the error term is changing, and so forth and so on.Your 
measurement can only be as good as your reference oscillator.  A DVM can 
only average this error, it can't give you the instantaneous value of the 
peak deviation of the error signal, which is what you would need to claim fs 
cycle to cycle timing.  Fs units are appropriate for cycle to cycle 
variation, not long term or multicycle assements.  Even the best HP DVM is 
only good to 3ppm on the 100mV scale and the shortest reading is 167us. 
That's 10 orders of magnitude greater that the deviation you are trying to 
measure.  If you average the mixer output, you can no longer claim fs 
timing.  What you can claim is a long term frequency stability in ppm.

This is my simple understanding of phase detectors and mixers.  You might 
get there by dividing down a bunch of numbers but I don't think the method 
supports the claim (of fs timing).

Bob



- Original Message - 
  From: Steve Rooke
  To: Discussion of precise time and frequency measurement
  Sent: Sunday, June 20, 2010 2:00 AM
  Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method


  Bob,

  Can I answer this one.

  On 20 June 2010 04:36, Robert Benward rbenw...@verizon.net wrote:
   Warren,
   I was responding to ke5fx comment using a 12-bit, 480-Hz serial DAQ in
   place of the voltage-to-frequency converter in the diagram above. A DAQ
   is a multifaceted data acquisition system, where as in your annotated
   diagram you showed an ADC.

  The DAQ that Warren is referring to to has a 12bit ADC input capable
  of performing up to 480 samples per second.

   I understand it's analog, but you said: Say you have a nice logic gate 
with
   1 ns delay . So back to the analog loop, do you have an analysis that 
gets
   you from EFC to femtosecond stability? PLLs are notorious for phase 
noise,
   the phase noise actually representing the error term that brings the 
loop
   back into lock.

  I personally think the 1fs issue has become way out of hand and people
  are now focussing on that instead of the big picture. Whilst I
  understand that the professional engineers on this list wish to pounce
  on every t that is not crossed, every i that is not dotted, and
  requiring a complete mathematical breakdown of everything, it is not
  going to happen here. If those professional engineers would like to
  assist with the process of understanding and documenting this idea in
  a way that pulls their chain, that would be great, but if it's down to
  pointing the finger at the amateur engineers and laughing, then
  perhaps they need more education in etiquette. Remember the golden
  rule, do unto others as you would wish to be done.

  Sure, some of us do not have the correct technical engineering banter,
  so when we call the World a sort of round ball shape, please don't
  play deaf until we say it's an oblate spheroid. Try to help us
  communicate with you, we are trying to describe things in the best way
  we can and we have something useful to contribute, IE. just take
  Warren's TPLL implementation which seems to be producing good results.
  So why don't we try

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-20 Thread WarrenS
 the simple TPLL works, then you 
are Greatly underestimating my abilities.

(It's not Luck that it works as good as it does)

and concerning your latest question,
The answers is yes, a noise floor resolution of 1e-12 at 100Hz does mean it 
must have useful resolution down to at least 10 fs, 1e-14 seconds

and no I'm not going to explain why that is so either.

ws

***
**
[time-nuts] Advantages  Disadvantages of the TPLL Method
Robert Benward rbenward at verizon.net
Sun Jun 20 14:46:09 UTC 2010

Steve,
I am a professional engineer, but in this arena I am an amateur.  That is
why I'm asking the questions, not to put down, but to understand some of the
claims made.  And as I said in one of my previous emails, I've seen amateurs
run circles around the professionals, and those professional admitting utter
astonishment at those amateur accomplishments (this is in the area of
amateur astrophotography).

What I have heard throughout this thread is a lot of bashing of those asking
the questions, surfacing as derogatory and berating comments on other's
understanding.  I have also heard much claims to a certain procedure without
one iota of numerical mumbo-jumbo to back it up.

The issue here is an inability to describe a simple claim.  Pete has
attempted to put things in simple numbers, and I see where he is going, and
I concur with some of his calculations.  If one can not describe what
appears to be a simple procedure, then I must question the basic
understanding behind the explanation.  If you make a wild claim, and then
you can't even get the bullet on the paper, then I must question the
shooter's understanding.

I guess I am not comfortable with the use of femtoseconds to describe
frequency accuracy.  Technically, a locked PLL is at the exact frequency as
the reference, as measured in the long term.  The phase between the two may
not be at zero, that depends on the type of phase detector and the DC
offsets in the system.  On the short term, phase noise of the reference will
cause the loop to generate error terms which will change the phase of the
DUT.  Oscillators are also specified using phase noise, e.g. 135dB down @
100Hz.  That specifies how much energy is not in the bandwidth of the
carrier.  It also implies the phase is constantly changing!  If the phase is
changing, the error term is changing, and so forth and so on.Your
measurement can only be as good as your reference oscillator.  A DVM can
only average this error, it can't give you the instantaneous value of the
peak deviation of the error signal, which is what you would need to claim fs
cycle to cycle timing.  Fs units are appropriate for cycle to cycle
variation, not long term or multicycle assements.  Even the best HP DVM is
only good to 3ppm on the 100mV scale and the shortest reading is 167us.
That's 10 orders of magnitude greater that the deviation you are trying to
measure.  If you average the mixer output, you can no longer claim fs
timing.  What you can claim is a long term frequency stability in ppm.

This is my simple understanding of phase detectors and mixers.  You might
get there by dividing down a bunch of numbers but I don't think the method
supports the claim (of fs timing).

Bob



- Original Message - 
 From: Steve Rooke

 To: Discussion of precise time and frequency measurement
 Sent: Sunday, June 20, 2010 2:00 AM
 Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method


 Bob,

 Can I answer this one.

 On 20 June 2010 04:36, Robert Benward rbenward at verizon.net wrote:
  Warren,
  I was responding to ke5fx comment using a 12-bit, 480-Hz serial DAQ in
  place of the voltage-to-frequency converter in the diagram above. A DAQ
  is a multifaceted data acquisition system, where as in your annotated
  diagram you showed an ADC.

 The DAQ that Warren is referring to to has a 12bit ADC input capable
 of performing up to 480 samples per second.

  I understand it's analog, but you said: Say you have a nice logic gate
with
  1 ns delay . So back to the analog loop, do you have an analysis that
gets
  you from EFC to femtosecond stability? PLLs are notorious for phase
noise,
  the phase noise actually representing the error term that brings the
loop
  back into lock.

 I personally think the 1fs issue has become way out of hand and people
 are now focussing on that instead of the big picture. Whilst I
 understand that the professional engineers on this list wish to pounce
 on every t that is not crossed, every i that is not dotted, and
 requiring a complete mathematical breakdown of everything, it is not
 going to happen here. If those professional engineers would like to
 assist with the process of understanding and documenting this idea in
 a way that pulls their chain, that would be great, but if it's down to
 pointing the finger at the amateur engineers and laughing, then
 perhaps they need more education in etiquette. Remember the golden
 rule, do unto others

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-20 Thread WarrenS


GandalfG8 Posted:
 Snake Oil anyone?

I nice short response, 
but 
it shows missed the MAJOR difference. You need to see:
  http://www.thegleam.com/ke5fx/tpll.htm   


ws


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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-20 Thread GandalfG8
 
In a message dated 20/06/2010 22:11:51 GMT Daylight Time,  
warrensjmail-...@yahoo.com writes:

I nice  short response, 
but 
it shows missed the MAJOR difference. You need to  see:
  http://www.thegleam.com/ke5fx/tpll.htm



-
Warren
 
Your stock answer of claiming that everyone and his granny is missing  the 
point is wearing a bit thin, and despite your suggestion I have not missed  
anything either and that includes John's results.
 
Those results, as far as they go, look very good, and I have no doubt  you 
deserve credit for what you've achieved, but what YOU seem to have  missed, 
or conveniently continue to ignore, is the need to be able to  prove, or 
provide sufficient information so that someone else can  prove, that your 
results are applicable to a more general case, and at  least to the accuracy 
that 
you claim.
 
There will always be empirical design methods, so called rules of  thumb 
for example, and these can be very valuable tools but the results from  such 
methods, indeed the results from any design method, still need to be  
evaluated and confirmed in practice.
 
In a similar fashion your measurement technique, again as with all others,  
needs validation and proper analysis of its limitations before you can 
truly  come to rely upon it as a stand alone tool.
It may well be good enough for everything you need but despite  John's 
measurements, and however good his results, what you haven't  demonstrated so 
far is the ability to evaluate those limitations so you can be  sure of that.
The only way at the moment that you can be really sure of  your 
measurements each and every time is to have someone like John check  your 
results each 
and every time.
 
It doesn't matter how many times your results are checked and confirmed,  
and it doesn't matter that your technique might be perfect and your results  
might be perfect every time, what you've demonstrated very clearly so far is 
 that you just don't know whether or not that's true.
 
I've wondered sometimes if you're just frightened that somebody  might 
prove you wrong but I don't recall anyone suggesting you're actually  wrong, 
all I've seen is folks trying to help you and offer well meant and  useful 
advice that could assist you properly evaluate the limitations of  what you're 
proposing.
However, there must be a definite blockage somewhere because you seem  to 
have gone into auto repeat mode, and for someone who claims not to have time  
to produce any documentation you must have wasted hours and hours churning 
out  the same old smokescreens.
 
Refusing to share your recipe so to speak, with all the bullshit  you've 
come up with as to why that shouldn't be necessary, and to insult  and 
attempt to belittle those who have tried to advise you, with all that  crap 
about 
the experts who just don't understand how it works etc  etc, well, sorry 
mate but that really is the mark of a true snake oil  salesman and, if 
nothing else, you've certainly got that off to  perfection.
 
regards
 
Nigel
GM8PZR
 
 
 
 
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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-20 Thread Chuck Harris

WarrenS wrote:


GandalfG8 Posted:
  Snake Oil anyone?

I nice short response, but it shows missed the MAJOR difference. You
need to see:
 http://www.thegleam.com/ke5fx/tpll.htm 
ws


No disrespect to you or John intended, but that is a data set of one experiment.
We used to call that a High School Proof.

It takes an infinite number of experiments of that sort to prove a conjecture.

-Chuck Harris

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-20 Thread Magnus Danielson

On 06/21/2010 12:49 AM, Chuck Harris wrote:

WarrenS wrote:


GandalfG8 Posted:
 Snake Oil anyone?

I nice short response, but it shows missed the MAJOR difference. You
need to see:
 http://www.thegleam.com/ke5fx/tpll.htm 
ws


No disrespect to you or John intended, but that is a data set of one
experiment.
We used to call that a High School Proof.

It takes an infinite number of experiments of that sort to prove a
conjecture.


It doesn't prove it, just makes it fairly likely correct.

But then again, correct is not available here. Sufficiently accurate 
within some bounds is. These bounds can be of a myriad of types.


As for the Warren style TPLL, a particular implementation needs to be 
referred to, both in form of analogue design and digital processing.


From that limiting properties may be established. Some of these may be 
compensated for enhanced performance.


Cheers,
Magnus

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-20 Thread Chuck Harris

Magnus Danielson wrote:

On 06/21/2010 12:49 AM, Chuck Harris wrote:

WarrenS wrote:


GandalfG8 Posted:
 Snake Oil anyone?

I nice short response, but it shows missed the MAJOR difference. You
need to see:
 http://www.thegleam.com/ke5fx/tpll.htm 
ws


No disrespect to you or John intended, but that is a data set of one
experiment.
We used to call that a High School Proof.

It takes an infinite number of experiments of that sort to prove a
conjecture.


It doesn't prove it, just makes it fairly likely correct.


Notice the quotation marks around the word prove in the above sentence.

That is an English language construct that is meant to show that something
is not quite right about the thing in the quotes.  In this case, I am indicating
a looser version of prove than would usually be expected.

If there have been an infinite number of tests done, and all are verified as
correct, we have a pretty fair idea that the next test done will also be 
correct...
but the verification is important... without it we cannot know for sure. The
infinite + 1st test could be the exception that disproves the conjecture.


But then again, correct is not available here. Sufficiently accurate
within some bounds is. These bounds can be of a myriad of types.


Absolutely!  But because of our lack of information about the plan of the
device we will never know if Warren's a genius, or just another fool.
(I notice by your use of correct that you already know about that quote thingy
 I mentioned above ;-)


As for the Warren style TPLL, a particular implementation needs to be
referred to, both in form of analogue design and digital processing.

 From that limiting properties may be established. Some of these may be
compensated for enhanced performance.


Yep!  That is the scientific method.

-Chuck Harris

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-20 Thread Bob Camp
Hi

Schematics of each of the various implementations tired would be nice. That 
would allow others to implement duplicates and see what happened. Without 
schematics only approximations can be implemented and analyzed. That generally 
opens up more issues than it addresses. The nature of the conversation so far 
is not one that encourages participation or shared experimentation. 

Details of the various experiments attempted would be helpful. The rabbit out 
o the hat approach to data gets pretty old pretty fast. It's apparent from 
various oblique references that far more than the run off against the 
Symmetricom box has been done. 

A more rigorous  approach to the math is needed if this is ever going to be 
accepted. This is after all an area where hair splitting issues over the math 
have been a very big deal for at least 40 years. 

Bob


On Jun 20, 2010, at 7:17 PM, Magnus Danielson wrote:

 On 06/21/2010 12:49 AM, Chuck Harris wrote:
 WarrenS wrote:
 
 GandalfG8 Posted:
  Snake Oil anyone?
 
 I nice short response, but it shows missed the MAJOR difference. You
 need to see:
  http://www.thegleam.com/ke5fx/tpll.htm 
 ws
 
 No disrespect to you or John intended, but that is a data set of one
 experiment.
 We used to call that a High School Proof.
 
 It takes an infinite number of experiments of that sort to prove a
 conjecture.
 
 It doesn't prove it, just makes it fairly likely correct.
 
 But then again, correct is not available here. Sufficiently accurate within 
 some bounds is. These bounds can be of a myriad of types.
 
 As for the Warren style TPLL, a particular implementation needs to be 
 referred to, both in form of analogue design and digital processing.
 
 From that limiting properties may be established. Some of these may be 
 compensated for enhanced performance.
 
 Cheers,
 Magnus
 
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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-20 Thread WarrenS


Well so much for my short 'berry' answers, that did not last long, sorry 
berry readers.


You think you are tired of hearing the same ol repeated stuff over and over 
and over ...,

Think about how tired I am of needing to repeat it.

The simple TPLL works good enough to measure any OCXO that I'm aware of.
(Oh yea, I said that already about a hundred times, and tested it more than 
that)
To me and some others that has now been proven well enough to make this 
method useful.

What else do you and most others need to know to use it?
Do you need to know exactly why mine works so good or how to make it better 
or how good one could make it with 'new' parts??


When was the last time anyone needed to fully understand the inter workings 
and details and limitations of their cell phone or TV or their TSC 5120A 
before they were able to make use of it?
I don't need to understand it better, remember I'm the one with the working 
unit.

I'm not looking to make mine better than I already know how to do.

What I have made more than clear by now, is that they should not rely on me 
to tell them exactly how I did it,

If someone wants to understand it better, then they should build their own.
If they are not able to do that or at the VERY least come up with their own 
schematic with the information given on John's report, then they certainly 
are not going to be able to improve on it or analyze it.


What I have missed the point of and do not understand, is why any real 
expert would ever need to know exactly how I did it, before they are able to 
analyze it.
It is so simple that they can do it any number of different ways.  Why do 
they ONLY want to analyze mine?
They need to make their own schematic and analyze it. If they find it works 
worse than I've said, sent me a copy and I'll tell them what they did wrong.
Likely theirs will work and analyze much better that what I've done and 
said, because most will not make the KISS compromises that I have, and will 
not want to use the same 6 or so parts I had in my parts bin.



what you've demonstrated very clearly so far is
that you just don't know whether or not that's true. (how good the results 
are)
That is close to right. It is others that do not know, I do agree to that 
much.
I know the limitations of what I've built and that it is not perfect and I 
know how to make it even better.

But it is good enough and I do already know how good that is.
And the reason some say that I must now prove this to others is what I don't 
yet get.

I'm not trying to get anyone to believe I know what I'm doing,
I'm just trying to convince others that the TPLL method can work and is a 
viable alternative sometimes.

Now it would seem that has already been done by all of John's test.

Some have suggested that I should just stop responding to these post, it is 
going nowhere, and they are right,

but I have to admit, I'm having too much fun.
And if this can bring a little joy or education to others or make the TPLL 
better understood then it is worth it,

even when it is at my expense.

wow OK, I must concede that JUST because this TPLL BB has ALWAYS worked in 
the past for every condition and for hundreds of test,
this is not conclusive prove that it will not be completely wrong any or 
every time in the future.
If this is the point that is now trying to be made with one of the later 
post,

Then at least ONE of us, is on the wrong SITE.

OH, and here is the real topper for all this.
Because I have made something that is so very basic and simple and obvious 
and cheap and with so few parts and using a method that some so called 
expert(s) did  not seem to know about or understand because it is so old, 
then I must be a fool or a genius.

SO Why is it OR? did you ever consider maybe it is both. :-)
It is pretty obvious with the hindsight that I've gained about some Nut 
experts, that only a real fool would of ever started this project, let alone 
try and tell ANYONE about it.


Have fun and do try and do what you enjoy or at least enjoy what you're 
doing.

I am.
ws

**

[time-nuts] Advantages  Disadvantages of the TPLL Method
GandalfG8 at aol.com GandalfG8 at aol.com
Sun Jun 20 22:05:14 UTC 2010

In a message dated 20/06/2010 22:11:51 GMT Daylight Time,
warrensjmail-one at yahoo.com writes:

I nice  short response,
but
it shows missed the MAJOR difference. You need to  see:
  http://www.thegleam.com/ke5fx/tpll.htm  

-
Warren

Your stock answer of claiming that everyone and his granny is missing  the
point is wearing a bit thin, and despite your suggestion I have not missed
anything either and that includes John's results.

Those results, as far as they go, look very good, and I have no doubt  you
deserve credit for what you've achieved, but what YOU seem to have  missed,
or conveniently continue to ignore, is the need to be able to  prove, or
provide sufficient information so that someone else can  prove, that your
results are applicable to a 

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-20 Thread John Allen
IMHO, this comment is totally uncalled for, regardless...

Also, it is unsigned - poor etiquette.

John Allen - 
-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On Behalf
Of gandal...@aol.com
Sent: Sunday, June 20, 2010 4:07 PM
To: time-nuts@febo.com
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method

 
In a message dated 20/06/2010 18:47:41 GMT Daylight Time,  
warrensjmail-...@yahoo.com writes:

Short  summery for the Berry readers:
The simple TPLL BB works fine and is better  than any OXCO that it has been 
used with.
The fact that some so called  experts do not believe or understand why, 
does 
not change that proven  fact.
*
and the longer story for those that have nothing better to  do all day long.
For others that have been around for a while and have  endured reading the 
silly exchanges here,
I do apologize for yet  another round of the same NS.
But it would seem that some have missed a few  important points about this 
subject.

I do not apologize for the  fact that I can not /or will not explain every 
detail of the simple  TPLL BB that I've built in a way that satisfies  all.
but


--
 
Snake Oil anyone?
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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-20 Thread Steve Rooke
On 21 June 2010 08:07,  gandal...@aol.com wrote:

 In a message dated 20/06/2010 18:47:41 GMT Daylight Time,
 warrensjmail-...@yahoo.com writes:

 Short  summery for the Berry readers:
 The simple TPLL BB works fine and is better  than any OXCO that it has been
 used with.
 The fact that some so called  experts do not believe or understand why,
 does
 not change that proven  fact.
 *
 and the longer story for those that have nothing better to  do all day long.
 For others that have been around for a while and have  endured reading the
 silly exchanges here,
 I do apologize for yet  another round of the same NS.
 But it would seem that some have missed a few  important points about this
 subject.

 I do not apologize for the  fact that I can not /or will not explain every
 detail of the simple  TPLL BB that I've built in a way that satisfies  all.
 but


 --

 Snake Oil anyone?

Well, Mr. Smartypants, the difference here is that his Snake Oil has
been proven to work. I don't particularly care how the thing works
mathematically, I'm more interested in the results. If you want to get
bogged down in the nitty gritty instead of looking at the big picture
then you are the one loosing out here.

A respected member of this list carried out tests of this TPLL
implementation against a  expensive piece of equipment and found
it produced very similar results over an expected range of usability
with a lot of different DUT and spending a month doing it. Stop trying
to extract stuff out of Warren that he has already said he is unable
to give you. He is an amateur experimental engineer (no offence
intended Warren) and as such doesn't have, or need, to understand this
stuff mathematically or in the secret special language that only the
professional engineering gods know. He has something you don't have,
he has a $10 gadgit that produces results that are easily good enough
for many on this list. So it looks like your the looser here!

Steve



-- 
Steve Rooke - ZL3TUV  G8KVD
The only reason for time is so that everything doesn't happen at once.
- Einstein

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-19 Thread WarrenS

Bob

Don't know if I can explain it to you, I'm not so good at explaining, 
I'll give it  *ONE*  try.

Example with some random picked numbers (JUST TO SHOW THE MAIN POINTS).


I tried,
All information and test  that are available on the TPLL is on JOHN'S KE5FX 
site or in past postings.

http://www.thegleam.com/ke5fx/tpll.htm

One other thing I may not of made clear, The analog averaging thing does not 
help at low freq like at 1 PPS

The TPLL works great because it is at a high freq like 5 or 10 MHz.
DAQ == DataQ == ADC


I don't think 10ps is achievable under any dynamic conditions IMHO
OK, I don't really care, use whatever number you want, you'll still end up 
below the Ref osc noise.

but
You may be surprised then by what the single shot Aperture uncertainty 
specs are for the kind of devices that really care about this sort of thing.

But then none of that really maters AT ALL,
because there is NO Digital anything in the simple TPLL before the ADC where 
a 10 Hz device would work fine for most.
I just gave you an example to try and answer your question on digital logic 
which was:
How do you do fs when most digital logic has jitter several of orders of 
magnitude greater?


ws

***
[time-nuts] Advantages  Disadvantages of the TPLL Method
Robert Benward rbenward at verizon.net
Sat Jun 19 03:18:05 UTC 2010

Warren,
Is there not a lower limit to how much you can average?  Yes, it's the sqrt 
of the number of samples, but doesn't noise,

hardware, and other perturbations limit the usefulness of this method?

Then one can get repeatable results say 100 times better from cycle to 
cycle in the short term.

so down to 10ps repeatable.


Why do you say the results are repeatable in the short term vs the long 
term?  Isn't what you defined above
(repeatability) the opposite of jitter?  Jitter I thought was cycle to cycle 
variation in prop delay.  On 1ns prop
devices, I don't think 50-100ps jitter is unreasonable under the most 
optimum conditions, the most careful circuit
layout, and constant repeatable inputs.  I don't think 10ps is achievable 
under any dynamic conditions IMHO.



One can average 1,000,000 readings of the 10 ps jitter
If they are truly random, that can give you a 1e-3 improvement (square 
root of number of samples averaged)


You are now averaging the repeatable  jitter.

KE5FX's website shows a diagram and a link to your diagram as well.  Are you 
using a digital phase detector or a mixer
as shown?  BTW, KE5FX refers to DAQ as your update to the design, where I 
believe he meant an ADC.


You have my curiosity peaked.  Do you have an analysis of the loop 
sensitivity/resolution?


Bob


- Original Message - 
From: WarrenS warrensjmail-one at yahoo.com
To: Discussion of precise time and frequency measurement time-nuts at 
febo.com

Sent: Friday, June 18, 2010 6:49 PM
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method



Bob posted

can you explain it to me?


Don't know, I'll give it ONE try.
I'm not so good at explaining, but it is pretty basic if one does not 
start assuming that it can not be done at the

start.
It is mostly about averaging lots of those transitions, and the real trick 
is that it is not Digital.
Analog has no lower limits except manly for Johnson noise type effects 
(mostly).


Example with some random picked numbers.
and assuming all analog that has no digital steps in it to limit 
resolution or add noise.


Say you have a nice logic gate with 1 ns delay
If you make it all nice and clean, and repeatable such as constant PS, 
rise time etc.
Then one can get repeatable results say 100 times better from cycle to 
cycle in the short term.

so down to 10ps repeatable.
Now make things even more clean with no variations and assuming random 
noise.
Now if one is doing this at 10 MHz and only cares about the average over 
0.1 sec (10 Hz)

One can average 1,000,000 readings of the 10 ps jitter
If they are truly random, that can give you a 1e-3 improvement (square 
root of number of samples averaged)
so now down to 10 fs of average jitter at 10 Hz for a 10 MHZ gate starting 
with a 1ns initial delay.


OF course if Anything changes at all, it will drift much more than that, 
which may or may not mater much depending on

what one is doing.
If you only really care about the difference between any two consecutive 
100 ms reading that are next to each other,

as is (mostly) the case in ADEV, then not a big deal.

IF it does matter or you want to do better, the next step is to do it all 
differential, so you are looking at only the
different of two separate independent but equal circuits. Differential can 
give, say a 1000 to one or better

improvement in drift due to common things such as temperature etc.

If that helps explain the basics, good, if not you need to ask others to 
explain it better.


And yes there all kinds of things that can  do go wrong and many ways to 
screw it up.

so as easy as it sounds, it does take a bit

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-19 Thread Magnus Danielson

On 06/19/2010 12:49 AM, WarrenS wrote:

Say you have a nice logic gate with 1 ns delay
If you make it all nice and clean, and repeatable such as constant PS,
rise time etc.
Then one can get repeatable results say 100 times better from cycle to
cycle in the short term.
so down to 10ps repeatable.
Now make things even more clean with no variations and assuming random
noise.
Now if one is doing this at 10 MHz and only cares about the average over
0.1 sec (10 Hz)
One can average 1,000,000 readings of the 10 ps jitter
If they are truly random, that can give you a 1e-3 improvement (square
root of number of samples averaged)
so now down to 10 fs of average jitter at 10 Hz for a 10 MHZ gate
starting with a 1ns initial delay.


The square root improvement assumes white noise, and will work when 
white noise dominates. A logical gate or any other amplifier will also 
have flicker noise, which doesn't average out like that. The meaningful 
length of averaging thus depends on the cut-off frequency between white 
and flicker noise. To analyse it, Allan variance and friends needs to be 
applied. Thus, only for short-term stability may straight averaging work 
for estimation.


Cheers,
Magnus

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-19 Thread Bob Camp
Hi

Since ADEV is a measurement of noise, you want to be very careful about just 
which noise you keep and which noise you throw away. 

Bob

On Jun 19, 2010, at 7:06 AM, Magnus Danielson wrote:

 On 06/19/2010 12:49 AM, WarrenS wrote:
 Say you have a nice logic gate with 1 ns delay
 If you make it all nice and clean, and repeatable such as constant PS,
 rise time etc.
 Then one can get repeatable results say 100 times better from cycle to
 cycle in the short term.
 so down to 10ps repeatable.
 Now make things even more clean with no variations and assuming random
 noise.
 Now if one is doing this at 10 MHz and only cares about the average over
 0.1 sec (10 Hz)
 One can average 1,000,000 readings of the 10 ps jitter
 If they are truly random, that can give you a 1e-3 improvement (square
 root of number of samples averaged)
 so now down to 10 fs of average jitter at 10 Hz for a 10 MHZ gate
 starting with a 1ns initial delay.
 
 The square root improvement assumes white noise, and will work when white 
 noise dominates. A logical gate or any other amplifier will also have flicker 
 noise, which doesn't average out like that. The meaningful length of 
 averaging thus depends on the cut-off frequency between white and flicker 
 noise. To analyse it, Allan variance and friends needs to be applied. Thus, 
 only for short-term stability may straight averaging work for estimation.
 
 Cheers,
 Magnus
 
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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-19 Thread Robert Benward
Warren,
I was responding to ke5fx comment using a 12-bit, 480-Hz serial DAQ in 
place of the voltage-to-frequency converter in the diagram above.   A DAQ 
is a multifaceted data acquisition system, where as in your annotated 
diagram you showed an ADC.

I understand it's analog, but you said: Say you have a nice logic gate with 
1 ns delay . So back to the analog loop, do you have an analysis that gets 
you from EFC to femtosecond stability?  PLLs are notorious for phase noise, 
the phase noise actually representing the error term that brings the loop 
back into lock.



For your second email:

You are now averaging the repeatable  jitter? YES
I was not questioning the procedure, I was questioning the conclusion;

Are you using a digital phase detector or a mixer as shown? Analog
Phase detector
Why the digital analogy if it's all analog?

Do you have an analysis of the loop sensitivity/resolution?No
analysis, No limit it is analog
I don't agree with you about the limit, and without an analysis or even a 
simple calculation, how do arrive at femtosecond lock?  if there is no 
limit, why not a hundred times less?

Why do you say the results are repeatable in the short term vs the long
term?Long term includes other factors such as non random drift, not
just random Noise
Maybe so, but using the short term , is not a license to better jitter 
figures by a factor of 100.  Since you are not using digital, I don't know 
where this example came from or why it is relevant.

 Is there not a lower limit to how much you can average? Depends or
 everything, but not up to  1 sec of averaging when the conditions are
 made right
I don't understand how you arrive at this conclusion


For your last email:
What attracted me to the TPLL question now was that you comment that you are 
maintaining a femtosecond lock. Please don't dumb it down for me.  I may not 
understand all the statistical stuff, but I can understand an analysis.


Bob



- Original Message - 
From: WarrenS warrensjmail-...@yahoo.com
To: Discussion of precise time and frequency measurement 
time-nuts@febo.com
Sent: Saturday, June 19, 2010 3:27 AM
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method


 Bob

 Don't know if I can explain it to you, I'm not so good at explaining,
 I'll give it  *ONE*  try.
 Example with some random picked numbers (JUST TO SHOW THE MAIN POINTS).

 I tried,
 All information and test  that are available on the TPLL is on JOHN'S 
 KE5FX
 site or in past postings.
 http://www.thegleam.com/ke5fx/tpll.htm

 One other thing I may not of made clear, The analog averaging thing does 
 not
 help at low freq like at 1 PPS
 The TPLL works great because it is at a high freq like 5 or 10 MHz.
 DAQ == DataQ == ADC

 I don't think 10ps is achievable under any dynamic conditions IMHO
 OK, I don't really care, use whatever number you want, you'll still end up
 below the Ref osc noise.
 but
 You may be surprised then by what the single shot Aperture uncertainty
 specs are for the kind of devices that really care about this sort of 
 thing.
 But then none of that really maters AT ALL,
 because there is NO Digital anything in the simple TPLL before the ADC 
 where
 a 10 Hz device would work fine for most.
 I just gave you an example to try and answer your question on digital 
 logic
 which was:
 How do you do fs when most digital logic has jitter several of orders of
 magnitude greater?

 ws

 ***
 [time-nuts] Advantages  Disadvantages of the TPLL Method
 Robert Benward rbenward at verizon.net
 Sat Jun 19 03:18:05 UTC 2010

 Warren,
 Is there not a lower limit to how much you can average?  Yes, it's the 
 sqrt
 of the number of samples, but doesn't noise,
 hardware, and other perturbations limit the usefulness of this method?

 Then one can get repeatable results say 100 times better from cycle to
 cycle in the short term.
 so down to 10ps repeatable.

 Why do you say the results are repeatable in the short term vs the long
 term?  Isn't what you defined above
 (repeatability) the opposite of jitter?  Jitter I thought was cycle to 
 cycle
 variation in prop delay.  On 1ns prop
 devices, I don't think 50-100ps jitter is unreasonable under the most
 optimum conditions, the most careful circuit
 layout, and constant repeatable inputs.  I don't think 10ps is achievable
 under any dynamic conditions IMHO.

 One can average 1,000,000 readings of the 10 ps jitter
 If they are truly random, that can give you a 1e-3 improvement (square
 root of number of samples averaged)

 You are now averaging the repeatable  jitter.

 KE5FX's website shows a diagram and a link to your diagram as well.  Are 
 you
 using a digital phase detector or a mixer
 as shown?  BTW, KE5FX refers to DAQ as your update to the design, where I
 believe he meant an ADC.

 You have my curiosity peaked.  Do you have an analysis of the loop
 sensitivity/resolution?

 Bob


 - Original Message - 
 From: WarrenS

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-19 Thread WarrenS

Magnus posted:

The square root improvement assumes white noise
A logical gate or any other amplifier will also have flicker noise,
To analyze it, Allan variance and friends needs to be applied.


No disagreements
What some may be missing is that this side tracked discussion and has little 
at all do directly with the Simple TPLL method or it's limitations when 
doing ADEV.
What the above has to do with is the effect of high speed averaging on 
different frequencies
If the noise is high freq then averaging works great as stated (or even 
better)
BUT say the frequency of the  noise_signal is at a low frequency such as 10 
Hz and under  (a typical flicker or 1/F noise)
Does anyone need to have a detailed explanation or fancy math paper on why 
averaging a Noise_signal for under 100ms (no mater samples are used) would 
NOT get rid of the longer that 100ms (10 Hz) noise?

If they do not know why, then I can not or well not help with that.

Back to the TPLL
Adev is used to show the effect of all the noise signals aftering they have 
been averaged (integrated) over tau0.
Integrating all signal noises, be it white, pink, black and blue, and yes 
even flicker noise over Tau0 like the TPLL does,  then gives the correct raw 
data to be able do ADEV for any and all noise types. This is something that 
the Phase type methods do not do as easy or as well.


Maybe it would help to think of it as the Averaging (and intigrating) is 
getting rid of all the unwanted High freq noise above Tau0 that are not 
suppose to be include in or contribute to ADEV, so that the system can 
measure all the noises at and below Tau0 freq which are suppose to be 
included in ADEV.
So the fact that averaging does not get rid of flicker noise, IS NOT A BAD 
THING for finding the correct Adev, IT IS A GOOD THING.
And the fact that averaging by intigration at tau0 to get rid of the 
noise_Frequencies above Tau0 is not as bad thing as some have clamed in the 
past but a GOOD thing


ws

*

[time-nuts] Advantages  Disadvantages of the TPLL Method
Magnus Danielson magnus at rubidium.dyndns.org
Sat Jun 19 11:06:41 UTC 2010

On 06/19/2010 12:49 AM, WarrenS wrote:

Say you have a nice logic gate with 1 ns delay
If you make it all nice and clean, and repeatable such as constant PS,
rise time etc.
Then one can get repeatable results say 100 times better from cycle to
cycle in the short term.
so down to 10ps repeatable.
Now make things even more clean with no variations and assuming random
noise.
Now if one is doing this at 10 MHz and only cares about the average over
0.1 sec (10 Hz)
One can average 1,000,000 readings of the 10 ps jitter
If they are truly random, that can give you a 1e-3 improvement (square
root of number of samples averaged)
so now down to 10 fs of average jitter at 10 Hz for a 10 MHZ gate
starting with a 1ns initial delay.


The square root improvement assumes white noise, and will work when
white noise dominates. A logical gate or any other amplifier will also
have flicker noise, which doesn't average out like that. The meaningful
length of averaging thus depends on the cut-off frequency between white
and flicker noise. To analyse it, Allan variance and friends needs to be
applied. Thus, only for short-term stability may straight averaging work
for estimation.

Cheers,
Magnus 



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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-19 Thread WarrenS

Bob

I tried, (more than once), and now we are heading way off subject.
I should of known better and learned by my past mistakers and stuck to the 
TPLL performance issues.

Which TPLL graph or plot do you not understand?
You need to ask the experts about the rest.

ws



[time-nuts] Advantages  Disadvantages of the TPLL Method
Robert Benward rbenward at verizon.net
Sat Jun 19 16:36:50 UTC 2010

Warren,
I was responding to ke5fx comment using a 12-bit, 480-Hz serial DAQ in
place of the voltage-to-frequency converter in the diagram above.   A DAQ
is a multifaceted data acquisition system, where as in your annotated
diagram you showed an ADC.

I understand it's analog, but you said: Say you have a nice logic gate with
1 ns delay . So back to the analog loop, do you have an analysis that gets
you from EFC to femtosecond stability?  PLLs are notorious for phase noise,
the phase noise actually representing the error term that brings the loop
back into lock.

For your second email:


You are now averaging the repeatable  jitter? YES

I was not questioning the procedure, I was questioning the conclusion;


Are you using a digital phase detector or a mixer as shown? Analog
Phase detector

Why the digital analogy if it's all analog?


Do you have an analysis of the loop sensitivity/resolution?No
analysis, No limit it is analog

I don't agree with you about the limit, and without an analysis or even a
simple calculation, how do arrive at femtosecond lock?  if there is no
limit, why not a hundred times less?


Why do you say the results are repeatable in the short term vs the long
term?Long term includes other factors such as non random drift, not
just random Noise

Maybe so, but using the short term , is not a license to better jitter
figures by a factor of 100.  Since you are not using digital, I don't know
where this example came from or why it is relevant.


Is there not a lower limit to how much you can average? Depends or
everything, but not up to  1 sec of averaging when the conditions are
made right

I don't understand how you arrive at this conclusion


For your last email:
What attracted me to the TPLL question now was that you comment that you are
maintaining a femtosecond lock. Please don't dumb it down for me.  I may not
understand all the statistical stuff, but I can understand an analysis.

Bob

**

- Original Message - 
From: WarrenS warrensjmail-one at yahoo.com

To: Discussion of precise time and frequency measurement
time-nuts at febo.com
Sent: Saturday, June 19, 2010 3:27 AM
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method



Bob


Don't know if I can explain it to you, I'm not so good at explaining,
I'll give it  *ONE*  try.
Example with some random picked numbers (JUST TO SHOW THE MAIN POINTS).


I tried,
All information and test  that are available on the TPLL is on JOHN'S
KE5FX
site or in past postings.
http://www.thegleam.com/ke5fx/tpll.htm

One other thing I may not of made clear, The analog averaging thing does
not
help at low freq like at 1 PPS
The TPLL works great because it is at a high freq like 5 or 10 MHz.
DAQ == DataQ == ADC


I don't think 10ps is achievable under any dynamic conditions IMHO

OK, I don't really care, use whatever number you want, you'll still end up
below the Ref osc noise.
but
You may be surprised then by what the single shot Aperture uncertainty
specs are for the kind of devices that really care about this sort of
thing.
But then none of that really maters AT ALL,
because there is NO Digital anything in the simple TPLL before the ADC
where
a 10 Hz device would work fine for most.
I just gave you an example to try and answer your question on digital
logic
which was:

How do you do fs when most digital logic has jitter several of orders of
magnitude greater?


ws

***
[time-nuts] Advantages  Disadvantages of the TPLL Method
Robert Benward rbenward at verizon.net
Sat Jun 19 03:18:05 UTC 2010

Warren,
Is there not a lower limit to how much you can average?  Yes, it's the
sqrt
of the number of samples, but doesn't noise,
hardware, and other perturbations limit the usefulness of this method?


Then one can get repeatable results say 100 times better from cycle to
cycle in the short term.
so down to 10ps repeatable.


Why do you say the results are repeatable in the short term vs the long
term?  Isn't what you defined above
(repeatability) the opposite of jitter?  Jitter I thought was cycle to
cycle
variation in prop delay.  On 1ns prop
devices, I don't think 50-100ps jitter is unreasonable under the most
optimum conditions, the most careful circuit
layout, and constant repeatable inputs.  I don't think 10ps is achievable
under any dynamic conditions IMHO.


One can average 1,000,000 readings of the 10 ps jitter
If they are truly random, that can give you a 1e-3 improvement (square
root of number of samples averaged)


You are now averaging

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-19 Thread Robert Benward
Warren,
All I wanted was an explanation of how you arrived at femtosecond timing. 
You gave me analogies instead.  Since you cannot explain it, I ask anyone 
else on this listbot if they can put it in proper context for me.

Thank you for your effort regardless.

Bob
  - Original Message - 
  From: WarrenS
  To: Discussion of precise time and frequency measurement
  Sent: Saturday, June 19, 2010 2:07 PM
  Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method


  Bob

  I tried, (more than once), and now we are heading way off subject.
  I should of known better and learned by my past mistakers and stuck to the
  TPLL performance issues.
  Which TPLL graph or plot do you not understand?
  You need to ask the experts about the rest.

  ws

  

  [time-nuts] Advantages  Disadvantages of the TPLL Method
  Robert Benward rbenward at verizon.net
  Sat Jun 19 16:36:50 UTC 2010

  Warren,
  I was responding to ke5fx comment using a 12-bit, 480-Hz serial DAQ in
  place of the voltage-to-frequency converter in the diagram above.   A DAQ
  is a multifaceted data acquisition system, where as in your annotated
  diagram you showed an ADC.

  I understand it's analog, but you said: Say you have a nice logic gate 
with
  1 ns delay . So back to the analog loop, do you have an analysis that 
gets
  you from EFC to femtosecond stability?  PLLs are notorious for phase 
noise,
  the phase noise actually representing the error term that brings the loop
  back into lock.

  For your second email:

  You are now averaging the repeatable  jitter? YES
  I was not questioning the procedure, I was questioning the conclusion;

  Are you using a digital phase detector or a mixer as shown? Analog
  Phase detector
  Why the digital analogy if it's all analog?

  Do you have an analysis of the loop sensitivity/resolution?No
  analysis, No limit it is analog
  I don't agree with you about the limit, and without an analysis or even a
  simple calculation, how do arrive at femtosecond lock?  if there is no
  limit, why not a hundred times less?

  Why do you say the results are repeatable in the short term vs the long
  term?Long term includes other factors such as non random drift, not
  just random Noise
  Maybe so, but using the short term , is not a license to better jitter
  figures by a factor of 100.  Since you are not using digital, I don't know
  where this example came from or why it is relevant.

   Is there not a lower limit to how much you can average? Depends 
or
   everything, but not up to  1 sec of averaging when the conditions are
   made right
  I don't understand how you arrive at this conclusion


  For your last email:
  What attracted me to the TPLL question now was that you comment that you 
are
  maintaining a femtosecond lock. Please don't dumb it down for me.  I may 
not
  understand all the statistical stuff, but I can understand an analysis.

  Bob

  **

  - Original Message - 
  From: WarrenS warrensjmail-one at yahoo.com
  To: Discussion of precise time and frequency measurement
  time-nuts at febo.com
  Sent: Saturday, June 19, 2010 3:27 AM
  Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method


   Bob
  
   Don't know if I can explain it to you, I'm not so good at explaining,
   I'll give it  *ONE*  try.
   Example with some random picked numbers (JUST TO SHOW THE MAIN 
POINTS).
  
   I tried,
   All information and test  that are available on the TPLL is on JOHN'S
   KE5FX
   site or in past postings.
   http://www.thegleam.com/ke5fx/tpll.htm
  
   One other thing I may not of made clear, The analog averaging thing does
   not
   help at low freq like at 1 PPS
   The TPLL works great because it is at a high freq like 5 or 10 MHz.
   DAQ == DataQ == ADC
  
   I don't think 10ps is achievable under any dynamic conditions IMHO
   OK, I don't really care, use whatever number you want, you'll still end 
up
   below the Ref osc noise.
   but
   You may be surprised then by what the single shot Aperture uncertainty
   specs are for the kind of devices that really care about this sort of
   thing.
   But then none of that really maters AT ALL,
   because there is NO Digital anything in the simple TPLL before the ADC
   where
   a 10 Hz device would work fine for most.
   I just gave you an example to try and answer your question on digital
   logic
   which was:
   How do you do fs when most digital logic has jitter several of orders 
of
   magnitude greater?
  
   ws
  
   ***
   [time-nuts] Advantages  Disadvantages of the TPLL Method
   Robert Benward rbenward at verizon.net
   Sat Jun 19 03:18:05 UTC 2010
  
   Warren,
   Is there not a lower limit to how much you can average?  Yes, it's the
   sqrt
   of the number of samples, but doesn't noise,
   hardware, and other perturbations limit the usefulness of this method?
  
   Then one can get repeatable results say 100

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-19 Thread Pete Rawson
Bob,

I might shed some light on this topic, but my comments apply only
to a few measurements made in my shop, not part of any PLL scheme.
My intent was to determine the apparent noise floor of a Minicircuits
SYPD-2 phase detector; a low offset, low conversion loss, DBM.
The SYPD-2 IF port was terminated in 600 ohms in parallel with
0.1uF.

The SYPD-2 was first characterized for DC output sensitivity with
10MHz @+7dBm on RF   10.0001MHz @+7dBm on LO. At this
drive level, the IF output is triangular  the gain was found to be
800 mV/Rad at 0VDC. I did not perform a tolerance analysis on this
measurement  can only estimate the error at +/- 40mV/Rad.

The 90 deg offset of the SYPD-2 was measured at  500uV using
+7dBm input power to both RF  LO ports. This measurement was
performed to monitor the 90 deg offset DC for any obvious instability
which might make lower level readings useless; the offset was stable
to +/- 2uV over several minutes.

Finally, the mixer was driven with +7dBm at both ports, but the LO
port signal was delayed by a 90 deg hybrid splitter + a 500ps, DC
to 2GHz, adjustable phase shifter. This configuration allows very
fine (5K part settable resolution) adjustment to reach 0VDC output
from the SYPD-2. The DC output stability was +/- 4uV/ minute after
allowing an hour to reach thermal  mechanical equilibrium
( having no room temperature transients from my heating system).

If the phase sensitivity can be assumed to scale down linearly,
then 4uV resolution = 5uRad (80fs) @ 10MHz. With more care,
or better equipment, 10fs resolution might be possible; but it
will be difficult. Without knowing the noise type involved, it's
unclear what benefit might be provided by averaging. More
work needs to be done.

Pete Rawson


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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-19 Thread Robert Benward
Hi Pete,
I calculated about 0.5uV/V for 10fs, so we are on the same page.  I will 
need to read this several times for it to sink in, but I much appreciate the 
calculations and technical reply!

Thanks!

Bob


  - Original Message - 
  From: Pete Rawson
  To: Discussion of precise time and frequency measurement
  Sent: Saturday, June 19, 2010 5:08 PM
  Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method


  Bob,

  I might shed some light on this topic, but my comments apply only
  to a few measurements made in my shop, not part of any PLL scheme.
  My intent was to determine the apparent noise floor of a Minicircuits
  SYPD-2 phase detector; a low offset, low conversion loss, DBM.
  The SYPD-2 IF port was terminated in 600 ohms in parallel with
  0.1uF.

  The SYPD-2 was first characterized for DC output sensitivity with
  10MHz @+7dBm on RF   10.0001MHz @+7dBm on LO. At this
  drive level, the IF output is triangular  the gain was found to be
  800 mV/Rad at 0VDC. I did not perform a tolerance analysis on this
  measurement  can only estimate the error at +/- 40mV/Rad.

  The 90 deg offset of the SYPD-2 was measured at  500uV using
  +7dBm input power to both RF  LO ports. This measurement was
  performed to monitor the 90 deg offset DC for any obvious instability
  which might make lower level readings useless; the offset was stable
  to +/- 2uV over several minutes.

  Finally, the mixer was driven with +7dBm at both ports, but the LO
  port signal was delayed by a 90 deg hybrid splitter + a 500ps, DC
  to 2GHz, adjustable phase shifter. This configuration allows very
  fine (5K part settable resolution) adjustment to reach 0VDC output
  from the SYPD-2. The DC output stability was +/- 4uV/ minute after
  allowing an hour to reach thermal  mechanical equilibrium
  ( having no room temperature transients from my heating system).

  If the phase sensitivity can be assumed to scale down linearly,
  then 4uV resolution = 5uRad (80fs) @ 10MHz. With more care,
  or better equipment, 10fs resolution might be possible; but it
  will be difficult. Without knowing the noise type involved, it's
  unclear what benefit might be provided by averaging. More
  work needs to be done.

  Pete Rawson


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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-18 Thread WarrenS

Charles posted

its operation needs to be characterized if technically oriented folks are 
to be expected to take you seriously.


If a simple BB that works as well as that one, does not already do that, 
then nothing else I'm able or willing to do or say is going to change much.
It is a good thing that people can accept things when shown that they work, 
even when they do not fully understand how.
Or else there would no acceptance of much of anything including gravity, 
computers, email,  women or Windows.


So your point is?  and why do you think I care?  Maybe you are missing the 
point of my intended audience.
After all, I'm not the one that is lost or the one that does not know now it 
works. I have a working unit that, I know how it works and how to test it.




how you determined phase locking down to femtosecond levels,  ...


You do indeed have many valid technical questions that I'd try and explain 
in a way that you could understand,
IF my goal was still to try and educate you, or if I thought there was ANY 
chance I'd be able to do so.

You seem to again of missed the point of my last answer,
One with enough technical ability can see what John's data says from his 
noise floor measurements.

But
If you do not understand that or how I'm doing it by measuring the PD 
output, then
I can not teach or show you how, even if I still wanted to try. My past 
failed attempts prove that.
So I'll just continue to do what I do best, and that is to make and test 
TPLL BBs for myself.


If you were thinking that I am one that can or am willing to try and teach 
you basic or advanced anything, then you are greatly over estimating my 
abilities and/or my patience. You need to look else where if you want to 
read a fancy math paper on how and why this all works or how to measure it.
If you can't find one to your liking and still want to know how to measure 
fs stuff, I'm sure if you ask nicely in a new thread, others would be more 
than willing to help you out with something that you could understand and 
accept.
Then again if I missed your point and your only goal is to verify if I now 
how to do it, then I can save you some trouble,
Yes the TPLL and I know how to measure fs phase differences, and we both 
know how to integrate along with a lot of other basic things including even 
adding two plus two.  (and I doubt that you understand that last point 
either,  Don't take it so personal, It is likely not just your problem)


BTW, one of the other points you seem to be missing in how I can measure  
test things so easy that others can find so hard to do.
After all I do have a big advantages over most, I can use another one of my 
GP PLL BB as a tester.

As I've point out before, they can do much more than just ADEV.
But then you would not be expected to know that without an advantage list.



Seems like it is again 'Time to Push the Reset.Button' on this thread's 
subject, cause this has got way off the subject.
As long as it is so far off the subject of advantages  disadvantages, I'll 
add, in response to what others have said both on and off line.


IF others want to build a TPLL using buffer amps, or VFC, or difference Ref 
Osc, or multiple Ref osc, or a digital version or with cross correlation, or 
using different software, or different algorithms, or different connectors, 
or more parts,  or more expensive parts or cheaper parts, or that works 
better with some imaginary unreal data set, or over a wider freq range, or 
over a longer tau, or at a lower level, or with less injection locking, or 
any of the other thing's that have been brought up,
by all means, Go for it. I've tried to encourage others to do it their your 
own way. No single solution is best for all situations.


What several of the suggestions show is that many do not yet know how simple 
a TPLL can be made or do they even understand exactly how the 3 basic parts 
work together.
I have consider all the suggestions and tried many of them and so far have 
found the variations unnecessary for my applications.
Also I have not heard about any H/W that others have built, only a lot of 
criticism from some about what I've done or said or not said.
No problem, If others do not like what I've done or the way I've done it or 
tested it, even when many of them do not know what it is or how it works,

by all means they should do it there own way.

What I've done is to test one of my simple TPLL versions and show that it's 
performance is good enough to be limited by the OCXO.

That is all, Don't read more into my comments than that.
The simple TPLL does not go down to 1e-15.  What I said is that is the limit 
of the low cost AMP that I choose, and it insures the amp has no significant 
negative effect.
Of course all is not perfect, nor is this is the best that a TPLL can be 
made, not even close. But it is good enough for me.
I know how to made it better, much better, with lower noise, more 
resolution, faster, lower tau, smaller or bigger, more 

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-18 Thread Robert Benward

Warren,
I'm a newbie, so can you explain it to me?  Femto anything is something 
mostly reserved for a well equipped lab.  How do you do it when most digital 
logic has jitter several of orders of magnitude greater?


Bob


- Original Message - 
From: WarrenS warrensjmail-...@yahoo.com
To: Discussion of precise time and frequency measurement 
time-nuts@febo.com

Sent: Friday, June 18, 2010 3:58 PM
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method



Charles posted


its operation needs to be characterized if technically oriented folks are
to be expected to take you seriously.


If a simple BB that works as well as that one, does not already do that,
then nothing else I'm able or willing to do or say is going to change 
much.
It is a good thing that people can accept things when shown that they 
work,

even when they do not fully understand how.
Or else there would no acceptance of much of anything including gravity,
computers, email,  women or Windows.

So your point is?  and why do you think I care?  Maybe you are missing the
point of my intended audience.
After all, I'm not the one that is lost or the one that does not know now 
it

works. I have a working unit that, I know how it works and how to test it.



how you determined phase locking down to femtosecond levels,  ...


You do indeed have many valid technical questions that I'd try and explain
in a way that you could understand,
IF my goal was still to try and educate you, or if I thought there was ANY
chance I'd be able to do so.
You seem to again of missed the point of my last answer,
One with enough technical ability can see what John's data says from his
noise floor measurements.
But
If you do not understand that or how I'm doing it by measuring the PD
output, then
I can not teach or show you how, even if I still wanted to try. My past
failed attempts prove that.
So I'll just continue to do what I do best, and that is to make and test
TPLL BBs for myself.

If you were thinking that I am one that can or am willing to try and teach
you basic or advanced anything, then you are greatly over estimating my
abilities and/or my patience. You need to look else where if you want to
read a fancy math paper on how and why this all works or how to measure 
it.

If you can't find one to your liking and still want to know how to measure
fs stuff, I'm sure if you ask nicely in a new thread, others would be more
than willing to help you out with something that you could understand and
accept.
Then again if I missed your point and your only goal is to verify if I now
how to do it, then I can save you some trouble,
Yes the TPLL and I know how to measure fs phase differences, and we both
know how to integrate along with a lot of other basic things including 
even

adding two plus two.  (and I doubt that you understand that last point
either,  Don't take it so personal, It is likely not just your problem)

BTW, one of the other points you seem to be missing in how I can measure 
test things so easy that others can find so hard to do.
After all I do have a big advantages over most, I can use another one of 
my

GP PLL BB as a tester.
As I've point out before, they can do much more than just ADEV.
But then you would not be expected to know that without an advantage list.



Seems like it is again 'Time to Push the Reset.Button' on this thread's
subject, cause this has got way off the subject.
As long as it is so far off the subject of advantages  disadvantages, 
I'll

add, in response to what others have said both on and off line.

IF others want to build a TPLL using buffer amps, or VFC, or difference 
Ref
Osc, or multiple Ref osc, or a digital version or with cross correlation, 
or
using different software, or different algorithms, or different 
connectors,

or more parts,  or more expensive parts or cheaper parts, or that works
better with some imaginary unreal data set, or over a wider freq range, or
over a longer tau, or at a lower level, or with less injection locking, or
any of the other thing's that have been brought up,
by all means, Go for it. I've tried to encourage others to do it their 
your

own way. No single solution is best for all situations.

What several of the suggestions show is that many do not yet know how 
simple
a TPLL can be made or do they even understand exactly how the 3 basic 
parts

work together.
I have consider all the suggestions and tried many of them and so far have
found the variations unnecessary for my applications.
Also I have not heard about any H/W that others have built, only a lot of
criticism from some about what I've done or said or not said.
No problem, If others do not like what I've done or the way I've done it 
or

tested it, even when many of them do not know what it is or how it works,
by all means they should do it there own way.

What I've done is to test one of my simple TPLL versions and show that 
it's

performance is good enough to be limited by the OCXO.
That is all, Don't

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-18 Thread WarrenS

Bob posted

can you explain it to me?


Don't know, I'll give it ONE try.
I'm not so good at explaining, but it is pretty basic if one does not start 
assuming that it can not be done at the start.
It is mostly about averaging lots of those transitions, and the real trick 
is that it is not Digital.
Analog has no lower limits except manly for Johnson noise type effects 
(mostly).


Example with some random picked numbers.
and assuming all analog that has no digital steps in it to limit resolution 
or add noise.


Say you have a nice logic gate with 1 ns delay
If you make it all nice and clean, and repeatable such as constant PS, rise 
time etc.
Then one can get repeatable results say 100 times better from cycle to cycle 
in the short term.

so down to 10ps repeatable.
Now make things even more clean with no variations and assuming random 
noise.
Now if one is doing this at 10 MHz and only cares about the average over 0.1 
sec (10 Hz)

One can average 1,000,000 readings of the 10 ps jitter
If they are truly random, that can give you a 1e-3 improvement (square root 
of number of samples averaged)
so now down to 10 fs of average jitter at 10 Hz for a 10 MHZ gate starting 
with a 1ns initial delay.


OF course if Anything changes at all, it will drift much more than that, 
which may or may not mater much depending on what one is doing.
If you only really care about the difference between any two consecutive 100 
ms reading that are next to each other, as is (mostly) the case in ADEV, 
then not a big deal.


IF it does matter or you want to do better, the next step is to do it all 
differential, so you are looking at only the different of two separate 
independent but equal circuits. Differential can give, say a 1000 to one or 
better improvement in drift due to common things such as temperature etc.


If that helps explain the basics, good, if not you need to ask others to 
explain it better.


And yes there all kinds of things that can  do go wrong and many ways to 
screw it up.

so as easy as it sounds, it does take a bit of skill and art to do it.
Especially when one realizes that you are measuring things  0.001 in of 
distance change will have major effects on because of the speed of light.

(approx 1ft /ns, 0.01 in/ps, 1 micron/4fs)


Now if one starts out, not with a gate but a phase detector that is made for 
such things, and averages enough (but not to long) and is real careful,

1fs resolution is possible in the 100 Hz range with 10 MHz

10 MHz  1fs at 100 Hz gives 1e-13 freq variation resolution at tau 10ms
The simple BB TPLL is only getting about a tenth of that, (as shown on 
John's test plots)  so it can be made much better with enough care, if 
anyone has a ref osc that needs it.
But as I am always so quick to point out, the BB tester was not optimized 
for any one thing, It's performance was selected as a compromise for 'KISS' 
reasons.  (KISS = Keep It Simple so the experts can understand.)


please let me know on or off line if I'm wasting my time trying to explain 
this to the non nut experts without the help of the fancy math papers.


ws

*

Warren,
I'm a newbie, so can you explain it to me?  Femto anything is something
mostly reserved for a well equipped lab.  How do you do it when most digital
logic has jitter several of orders of magnitude greater?

Bob
*
[time-nuts] Advantages  Disadvantages of the TPLL Method
Robert Benward rbenward at verizon.net
Fri Jun 18 20:23:40 UTC 2010
Previous message: [time-nuts] Advantages  Disadvantages of the TPLL Method
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

Warren,
I'm a newbie, so can you explain it to me?  Femto anything is something
mostly reserved for a well equipped lab.  How do you do it when most digital
logic has jitter several of orders of magnitude greater?

Bob

*

- Original Message - 
From: WarrenS warrensjmail-one at yahoo.com

To: Discussion of precise time and frequency measurement
time-nuts at febo.com
Sent: Friday, June 18, 2010 3:58 PM
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method



Charles posted


its operation needs to be characterized if technically oriented folks are
to be expected to take you seriously.


If a simple BB that works as well as that one, does not already do that,
then nothing else I'm able or willing to do or say is going to change
much.
It is a good thing that people can accept things when shown that they
work,
even when they do not fully understand how.
Or else there would no acceptance of much of anything including gravity,
computers, email,  women or Windows.

So your point is?  and why do you think I care?  Maybe you are missing the
point of my intended audience.
After all, I'm not the one that is lost or the one that does not know now
it
works. I have a working unit that, I know how it works and how to test it.



how you determined phase locking down to femtosecond levels,  ...


You do

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-18 Thread Charles P. Steinmetz

Warren wrote:


you are greatly over estimating my abilities


Probably true, even of my estimation.

Best regards,

Charles


==
Better to remain silent and be thought a fool, than to speak up and 
remove all doubt.
  Attributed to Mark Twain, though not verified 




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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-18 Thread Robert Benward

Warren,
Is there not a lower limit to how much you can average?  Yes, it's the sqrt of the number of samples, but doesn't noise, 
hardware, and other perturbations limit the usefulness of this method?



Then one can get repeatable results say 100 times better from cycle to cycle in 
the short term.
so down to 10ps repeatable.


Why do you say the results are repeatable in the short term vs the long term?  Isn't what you defined above 
(repeatability) the opposite of jitter?  Jitter I thought was cycle to cycle variation in prop delay.  On 1ns prop 
devices, I don't think 50-100ps jitter is unreasonable under the most optimum conditions, the most careful circuit 
layout, and constant repeatable inputs.  I don't think 10ps is achievable under any dynamic conditions IMHO.



One can average 1,000,000 readings of the 10 ps jitter
If they are truly random, that can give you a 1e-3 improvement (square root of 
number of samples averaged)


You are now averaging the repeatable  jitter.

KE5FX's website shows a diagram and a link to your diagram as well.  Are you using a digital phase detector or a mixer 
as shown?  BTW, KE5FX refers to DAQ as your update to the design, where I believe he meant an ADC.


You have my curiosity peaked.  Do you have an analysis of the loop 
sensitivity/resolution?

Bob


- Original Message - 
From: WarrenS warrensjmail-...@yahoo.com

To: Discussion of precise time and frequency measurement time-nuts@febo.com
Sent: Friday, June 18, 2010 6:49 PM
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method



Bob posted

can you explain it to me?


Don't know, I'll give it ONE try.
I'm not so good at explaining, but it is pretty basic if one does not start assuming that it can not be done at the 
start.

It is mostly about averaging lots of those transitions, and the real trick is 
that it is not Digital.
Analog has no lower limits except manly for Johnson noise type effects (mostly).

Example with some random picked numbers.
and assuming all analog that has no digital steps in it to limit resolution or 
add noise.

Say you have a nice logic gate with 1 ns delay
If you make it all nice and clean, and repeatable such as constant PS, rise 
time etc.
Then one can get repeatable results say 100 times better from cycle to cycle in 
the short term.
so down to 10ps repeatable.
Now make things even more clean with no variations and assuming random noise.
Now if one is doing this at 10 MHz and only cares about the average over 0.1 
sec (10 Hz)
One can average 1,000,000 readings of the 10 ps jitter
If they are truly random, that can give you a 1e-3 improvement (square root of 
number of samples averaged)
so now down to 10 fs of average jitter at 10 Hz for a 10 MHZ gate starting with 
a 1ns initial delay.

OF course if Anything changes at all, it will drift much more than that, which may or may not mater much depending on 
what one is doing.
If you only really care about the difference between any two consecutive 100 ms reading that are next to each other, 
as is (mostly) the case in ADEV, then not a big deal.


IF it does matter or you want to do better, the next step is to do it all differential, so you are looking at only the 
different of two separate independent but equal circuits. Differential can give, say a 1000 to one or better 
improvement in drift due to common things such as temperature etc.


If that helps explain the basics, good, if not you need to ask others to 
explain it better.

And yes there all kinds of things that can  do go wrong and many ways to screw 
it up.
so as easy as it sounds, it does take a bit of skill and art to do it.
Especially when one realizes that you are measuring things  0.001 in of distance change will have major effects on 
because of the speed of light.

(approx 1ft /ns, 0.01 in/ps, 1 micron/4fs)


Now if one starts out, not with a gate but a phase detector that is made for such things, and averages enough (but not 
to long) and is real careful,

1fs resolution is possible in the 100 Hz range with 10 MHz

10 MHz  1fs at 100 Hz gives 1e-13 freq variation resolution at tau 10ms
The simple BB TPLL is only getting about a tenth of that, (as shown on John's test plots)  so it can be made much 
better with enough care, if anyone has a ref osc that needs it.
But as I am always so quick to point out, the BB tester was not optimized for any one thing, It's performance was 
selected as a compromise for 'KISS' reasons.  (KISS = Keep It Simple so the experts can understand.)


please let me know on or off line if I'm wasting my time trying to explain this to the non nut experts without the 
help of the fancy math papers.


ws

*

Warren,
I'm a newbie, so can you explain it to me?  Femto anything is something
mostly reserved for a well equipped lab.  How do you do it when most digital
logic has jitter several of orders of magnitude greater?

Bob
*
[time-nuts] Advantages  Disadvantages of the TPLL Method

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-17 Thread SAL CORNACCHIA

Hi Warren, how do I change the com port in Lady Heather software.

Thank You
Best regards,
Sal C. Cornacchia
Electronic RF Microwave Engineer (Ret.) 


  





From: WarrenS warrensjmail-...@yahoo.com
To: Discussion of precise time and frequency time-nuts@febo.com
Sent: Thu, June 17, 2010 1:29:57 AM
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method

Charles

 I'm curious how you determined that the oscillators are being held to 
 within femtoseconds of each other.
I done  it several ways including measuring the PD output.

You seem to be missing how insignificant an 1-e6 injection locking to EFC 
gain ratio is.
I can't detail, to your satisfaction, all the hundreds of test that show no 
significant effect of so many different things.

For an independent test that may help you with things you missed see:
http://www.ke5fx.com/tpll.htm

ws

***
[time-nuts] Advantages  Disadvantages of the TPLL Method
Charles P. Steinmetz charles_steinmetz at lavabit.com
Thu Jun 17 02:10:31 UTC 2010

Warren wrote:
Charles Posted:

How much EFC is required depends, in part, on the strength of the pulling.
There are three varying inputs.

NOT at ALL what my test have shown so I guess we do NOT agree on this.
The point you missed, is only the EFC is changing significantly
because of the high gain and BW.
It insures the two Oscillators are held to within  femtoseconds of
each other, to at least out to the e-16 at large taus.
So other things are held constant enough that their effects are kept
below any ref Osc effects.

Why must everything be a matter of other people missing something?  I
understand how oscillators behave with respect to injection
pulling/locking, and how that might affect the operation and accuracy
of a system such as you are using.  I myself noted that Magnus had
suggested the effect may not be significant in such a system, but
that drawing that conclusion for any particular design would require
careful experiments and, hopefully, backup by mathematical
analysis.  How is that missing anything?

The carefully constructed experiments, that show it works as
advertised have been done, and the most important ones have been posted.

Forgive me if I missed something, but all I saw regarding the
relative gains of the error loop and the injection loop were (i) that
you increased the coupling by a factor of 1000 and (ii) that you
used a variable attenuator.  If you did carefully designed
experiments, nothing I saw posted suggested it.

This is a potentially important point because some oscillators one
might want to test (or use as a reference) may be very much more
sensitive to injection locking (pulling, actually) than the ones you
are using.  Therefore, the behavior should be characterized so users
can determine whether it might affect their results.  It didn't seem
to have any effect using the oscillators I had is not really a very
useful characterization of the behavior.  [I do see that in a
subsequent message you asked for suggestions for further tests.]

I'm curious how you determined that the oscillators are being held to
within femtoseconds of each other.  And, how many femtoseconds?

Best regards,

Charles 


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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-17 Thread Bob Camp
Hi

A handy reference on Lady Heather is here:

http://www.thegleam.com/ke5fx/heather/readme.htm

To change the com to port 3 you launch it with a /3 on the command line. 

In my case the Target line under properties is:

C:\Program Files\Heather\heather.exe /3

You get to that particular properties page by right clicking on the LH icon
on the desktop in Windows. 

Bob

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of SAL CORNACCHIA
Sent: Thursday, June 17, 2010 11:25 AM
To: WarrenS; Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method


Hi Warren, how do I change the com port in Lady Heather software.

Thank You
Best regards,
Sal C. Cornacchia
Electronic RF Microwave Engineer (Ret.) 


  





From: WarrenS warrensjmail-...@yahoo.com
To: Discussion of precise time and frequency time-nuts@febo.com
Sent: Thu, June 17, 2010 1:29:57 AM
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method

Charles

 I'm curious how you determined that the oscillators are being held to 
 within femtoseconds of each other.
I done  it several ways including measuring the PD output.

You seem to be missing how insignificant an 1-e6 injection locking to EFC 
gain ratio is.
I can't detail, to your satisfaction, all the hundreds of test that show no 
significant effect of so many different things.

For an independent test that may help you with things you missed see:
http://www.ke5fx.com/tpll.htm

ws

***
[time-nuts] Advantages  Disadvantages of the TPLL Method
Charles P. Steinmetz charles_steinmetz at lavabit.com
Thu Jun 17 02:10:31 UTC 2010

Warren wrote:
Charles Posted:

How much EFC is required depends, in part, on the strength of the pulling.
There are three varying inputs.

NOT at ALL what my test have shown so I guess we do NOT agree on this.
The point you missed, is only the EFC is changing significantly
because of the high gain and BW.
It insures the two Oscillators are held to within  femtoseconds of
each other, to at least out to the e-16 at large taus.
So other things are held constant enough that their effects are kept
below any ref Osc effects.

Why must everything be a matter of other people missing something?  I
understand how oscillators behave with respect to injection
pulling/locking, and how that might affect the operation and accuracy
of a system such as you are using.  I myself noted that Magnus had
suggested the effect may not be significant in such a system, but
that drawing that conclusion for any particular design would require
careful experiments and, hopefully, backup by mathematical
analysis.  How is that missing anything?

The carefully constructed experiments, that show it works as
advertised have been done, and the most important ones have been posted.

Forgive me if I missed something, but all I saw regarding the
relative gains of the error loop and the injection loop were (i) that
you increased the coupling by a factor of 1000 and (ii) that you
used a variable attenuator.  If you did carefully designed
experiments, nothing I saw posted suggested it.

This is a potentially important point because some oscillators one
might want to test (or use as a reference) may be very much more
sensitive to injection locking (pulling, actually) than the ones you
are using.  Therefore, the behavior should be characterized so users
can determine whether it might affect their results.  It didn't seem
to have any effect using the oscillators I had is not really a very
useful characterization of the behavior.  [I do see that in a
subsequent message you asked for suggestions for further tests.]

I'm curious how you determined that the oscillators are being held to
within femtoseconds of each other.  And, how many femtoseconds?

Best regards,

Charles 


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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-17 Thread SAL CORNACCHIA

Thank You Bob, I will try it and will advise it it works for me.

Best regards,

Sal C. Cornacchia
Electronic RF Microwave Engineer (Ret.) 


 




From: Bob Camp li...@rtty.us
To: Discussion of precise time and frequency measurement time-nuts@febo.com
Sent: Thu, June 17, 2010 12:10:03 PM
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method

Hi

A handy reference on Lady Heather is here:

http://www.thegleam.com/ke5fx/heather/readme.htm

To change the com to port 3 you launch it with a /3 on the command line. 

In my case the Target line under properties is:

C:\Program Files\Heather\heather.exe /3

You get to that particular properties page by right clicking on the LH icon
on the desktop in Windows. 

Bob

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of SAL CORNACCHIA
Sent: Thursday, June 17, 2010 11:25 AM
To: WarrenS; Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method


Hi Warren, how do I change the com port in Lady Heather software.

Thank You
Best regards,
Sal C. Cornacchia
Electronic RF Microwave Engineer (Ret.) 


  





From: WarrenS warrensjmail-...@yahoo.com
To: Discussion of precise time and frequency time-nuts@febo.com
Sent: Thu, June 17, 2010 1:29:57 AM
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method

Charles

 I'm curious how you determined that the oscillators are being held to 
 within femtoseconds of each other.
I done  it several ways including measuring the PD output.

You seem to be missing how insignificant an 1-e6 injection locking to EFC 
gain ratio is.
I can't detail, to your satisfaction, all the hundreds of test that show no 
significant effect of so many different things.

For an independent test that may help you with things you missed see:
http://www.ke5fx.com/tpll.htm

ws

***
[time-nuts] Advantages  Disadvantages of the TPLL Method
Charles P. Steinmetz charles_steinmetz at lavabit.com
Thu Jun 17 02:10:31 UTC 2010

Warren wrote:
Charles Posted:

How much EFC is required depends, in part, on the strength of the pulling.
There are three varying inputs.

NOT at ALL what my test have shown so I guess we do NOT agree on this.
The point you missed, is only the EFC is changing significantly
because of the high gain and BW.
It insures the two Oscillators are held to within  femtoseconds of
each other, to at least out to the e-16 at large taus.
So other things are held constant enough that their effects are kept
below any ref Osc effects.

Why must everything be a matter of other people missing something?  I
understand how oscillators behave with respect to injection
pulling/locking, and how that might affect the operation and accuracy
of a system such as you are using.  I myself noted that Magnus had
suggested the effect may not be significant in such a system, but
that drawing that conclusion for any particular design would require
careful experiments and, hopefully, backup by mathematical
analysis.  How is that missing anything?

The carefully constructed experiments, that show it works as
advertised have been done, and the most important ones have been posted.

Forgive me if I missed something, but all I saw regarding the
relative gains of the error loop and the injection loop were (i) that
you increased the coupling by a factor of 1000 and (ii) that you
used a variable attenuator.  If you did carefully designed
experiments, nothing I saw posted suggested it.

This is a potentially important point because some oscillators one
might want to test (or use as a reference) may be very much more
sensitive to injection locking (pulling, actually) than the ones you
are using.  Therefore, the behavior should be characterized so users
can determine whether it might affect their results.  It didn't seem
to have any effect using the oscillators I had is not really a very
useful characterization of the behavior.  [I do see that in a
subsequent message you asked for suggestions for further tests.]

I'm curious how you determined that the oscillators are being held to
within femtoseconds of each other.  And, how many femtoseconds?

Best regards,

Charles 


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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-16 Thread Bob Camp
Hi

The gotcha is that the injection gain is phase angle dependent.

Bob


On Jun 16, 2010, at 1:57 AM, Magnus Danielson wrote:

 On 06/16/2010 05:45 AM, Charles P. Steinmetz wrote:
 Warren wrote:
 
 Charles posted:
 but the locked frequency will be different from both oscillators'
 free-running frequency and
 the EFC will not correctly indicate the test oscillator deviation
 because it isn't the only control input in the system.
 
 Good point and No argument (except for the deviation part)
 Because the EFC is the only control input THAT IS VARYING.
 
 No, it's not. The strength with which each oscillator pulls on the other
 also varies as the equilibrium frequency (the result of all three
 recursive control inputs) moves around relative to the two instantaneous
 free-running frequencies. How much EFC is required depends, in part, on
 the strength of the pulling. There are three varying inputs.
 
 Magnus suggested that the effect of injection locking may be enough
 smaller than the EFC input that it has little practical significance.
 That may be so, but when dealing with measurement accuracy in the
 hundreds or tens ot ppt, this needs to be verified by the results of
 carefully constructed experiments and hopefully also supported by
 mathematical analysis.
 
 What you get is a scale error. Consider that you have an amplifier gain of 
 1000 and the injection locking provide a gain of 1, that will result in 
 actual gain of 1001 and the gain error on the EFC will become 1000/1001. 
 Considering that Allan deviation estimation has problem of its own, this 
 scale error is not significant. What you do need to check is that the 
 relationship between intended gain and injection gain is sufficiently 
 different. Since oscillator frequency from EFC may not be completely correct, 
 we already want calibration of that scale factor (K_O) and the gain error due 
 to injection locking would be included into that correction factor.
 
 So, sufficiently small amount of injection locking gain will change the 
 apparent EFC coefficient K_O [Rad/sV] on which the scale of TPLL frequency 
 measurements depends. The fractional frequency observed is
 
 y(t) = 2*pi*f_0 / K_O,eff EFC(t)
 
 Cheers,
 Magnus
 
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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-16 Thread Bill Hawkins
In my world, successive gains multiply, not add.

A series of three gains of 10 gives a gain of 1000, not 30.

What am I missing?

Bill Hawkins
 

-Original Message-
From: Magnus Danielson
Sent: Wednesday, June 16, 2010 12:58 AM

What you get is a scale error. Consider that you have an amplifier gain 
of 1000 and the injection locking provide a gain of 1, that will result 
in actual gain of 1001 and the gain error on the EFC will become 
1000/1001.


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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-16 Thread WarrenS

Bob posted

The gotcha is that the injection gain is phase angle dependent.


So what? and it is also dependant on a whole bunch of other stuff, amplitude 
being a major one.
And the gotcha you to your gotcha is that the phase difference in the TPLL 
is fixed at very close at 90 deg.

(zero on the PD with in uv,  a few femtoseconds variation)

Just to put this subject to rest, I tried to measure the ratio of EFC gain 
to injection lock gain

at near zero PD output at the nominal signal levels I'm using.

The problem is this is analog.
Analog unlike digital has some limits of about 1 PPM  (1e-6) and 50 nv 
(5e-8)
The IL ratio seems to be below 1e-6 so I have been unable to measure the 
ratio.
The effect seems to be below the noise level of the reference Osc so that 
also makes it a bit hard to get a good number.

Anyone have any suggestion how to go about measuring an effect this low?

Until I can measure the IL effect more accurately,
I'm just going to have go with the more general statement that
the TPLL method is limited by the Reference Osc.
If the reference osc or DUT Injection Lock sensitivity is more than say 
around 1e5 times the 10811,
It is best to add an external buffer to be save to keep the gain errors 
below 10%.


ws

**
[time-nuts] Advantages  Disadvantages of the TPLL Method
Bob Camp lists at rtty.us
Wed Jun 16 11:34:27 UTC 2010

Hi

The gotcha is that the injection gain is phase angle dependent.

Bob

**

On Jun 16, 2010, at 1:57 AM, Magnus Danielson wrote:


On 06/16/2010 05:45 AM, Charles P. Steinmetz wrote:

Warren wrote:


Charles posted:

but the locked frequency will be different from both oscillators'
free-running frequency and
the EFC will not correctly indicate the test oscillator deviation
because it isn't the only control input in the system.


Good point and No argument (except for the deviation part)
Because the EFC is the only control input THAT IS VARYING.


No, it's not. The strength with which each oscillator pulls on the other
also varies as the equilibrium frequency (the result of all three
recursive control inputs) moves around relative to the two instantaneous
free-running frequencies. How much EFC is required depends, in part, on
the strength of the pulling. There are three varying inputs.

Magnus suggested that the effect of injection locking may be enough
smaller than the EFC input that it has little practical significance.
That may be so, but when dealing with measurement accuracy in the
hundreds or tens ot ppt, this needs to be verified by the results of
carefully constructed experiments and hopefully also supported by
mathematical analysis.


What you get is a scale error. Consider that you have an amplifier gain of 
1000 and the injection locking provide a gain of 1, that will result in 
actual gain of 1001 and the gain error on the EFC will become 1000/1001. 
Considering that Allan deviation estimation has problem of its own, this 
scale error is not significant. What you do need to check is that the 
relationship between intended gain and injection gain is sufficiently 
different. Since oscillator frequency from EFC may not be completely 
correct, we already want calibration of that scale factor (K_O) and the 
gain error due to injection locking would be included into that correction 
factor.


So, sufficiently small amount of injection locking gain will change the 
apparent EFC coefficient K_O [Rad/sV] on which the scale of TPLL frequency 
measurements depends. The fractional frequency observed is


y(t) = 2*pi*f_0 / K_O,eff EFC(t)

Cheers,
Magnus



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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-16 Thread Bob Camp
Hi

If the oscillator you have happens to injection lock at 90 degrees, or quite
near it, then that's not going to help. If the oscillator you have likes to
lock at 21 degrees then it will help you out. The angle varies device to
device.

Bob

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of WarrenS
Sent: Wednesday, June 16, 2010 11:46 AM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method

Bob posted
The gotcha is that the injection gain is phase angle dependent.

So what? and it is also dependant on a whole bunch of other stuff, amplitude

being a major one.
And the gotcha you to your gotcha is that the phase difference in the TPLL 
is fixed at very close at 90 deg.
(zero on the PD with in uv,  a few femtoseconds variation)

Just to put this subject to rest, I tried to measure the ratio of EFC gain 
to injection lock gain
at near zero PD output at the nominal signal levels I'm using.

The problem is this is analog.
Analog unlike digital has some limits of about 1 PPM  (1e-6) and 50 nv 
(5e-8)
The IL ratio seems to be below 1e-6 so I have been unable to measure the 
ratio.
The effect seems to be below the noise level of the reference Osc so that 
also makes it a bit hard to get a good number.
Anyone have any suggestion how to go about measuring an effect this low?

Until I can measure the IL effect more accurately,
I'm just going to have go with the more general statement that
the TPLL method is limited by the Reference Osc.
If the reference osc or DUT Injection Lock sensitivity is more than say 
around 1e5 times the 10811,
It is best to add an external buffer to be save to keep the gain errors 
below 10%.

ws

**
[time-nuts] Advantages  Disadvantages of the TPLL Method
Bob Camp lists at rtty.us
Wed Jun 16 11:34:27 UTC 2010

Hi

The gotcha is that the injection gain is phase angle dependent.

Bob

**

On Jun 16, 2010, at 1:57 AM, Magnus Danielson wrote:

 On 06/16/2010 05:45 AM, Charles P. Steinmetz wrote:
 Warren wrote:

 Charles posted:
 but the locked frequency will be different from both oscillators'
 free-running frequency and
 the EFC will not correctly indicate the test oscillator deviation
 because it isn't the only control input in the system.

 Good point and No argument (except for the deviation part)
 Because the EFC is the only control input THAT IS VARYING.

 No, it's not. The strength with which each oscillator pulls on the other
 also varies as the equilibrium frequency (the result of all three
 recursive control inputs) moves around relative to the two instantaneous
 free-running frequencies. How much EFC is required depends, in part, on
 the strength of the pulling. There are three varying inputs.

 Magnus suggested that the effect of injection locking may be enough
 smaller than the EFC input that it has little practical significance.
 That may be so, but when dealing with measurement accuracy in the
 hundreds or tens ot ppt, this needs to be verified by the results of
 carefully constructed experiments and hopefully also supported by
 mathematical analysis.

 What you get is a scale error. Consider that you have an amplifier gain of

 1000 and the injection locking provide a gain of 1, that will result in 
 actual gain of 1001 and the gain error on the EFC will become 1000/1001. 
 Considering that Allan deviation estimation has problem of its own, this 
 scale error is not significant. What you do need to check is that the 
 relationship between intended gain and injection gain is sufficiently 
 different. Since oscillator frequency from EFC may not be completely 
 correct, we already want calibration of that scale factor (K_O) and the 
 gain error due to injection locking would be included into that correction

 factor.

 So, sufficiently small amount of injection locking gain will change the 
 apparent EFC coefficient K_O [Rad/sV] on which the scale of TPLL frequency

 measurements depends. The fractional frequency observed is

 y(t) = 2*pi*f_0 / K_O,eff EFC(t)

 Cheers,
 Magnus
 

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-16 Thread Magnus Danielson

On 06/16/2010 04:30 PM, Bill Hawkins wrote:

In my world, successive gains multiply, not add.

A series of three gains of 10 gives a gain of 1000, not 30.

What am I missing?


They are parallel.

Cheers,
Magnus

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-16 Thread Magnus Danielson

On 06/16/2010 06:16 PM, Bob Camp wrote:

Hi

If the oscillator you have happens to injection lock at 90 degrees, or quite
near it, then that's not going to help. If the oscillator you have likes to
lock at 21 degrees then it will help you out. The angle varies device to
device.


If the injection lock gain is significantly less than the intended loop 
gain, then it may have any angle without significant influence. If these 
gains is close, it matters and if the injection lock gain is larger, it 
will dominate and care much be taken to ensure stable phase in order to 
have a stable gain.


A tight PLL has a fairly high gain, so if the injection lock gain is 
sufficiently low (should always be verified!) then the effect should be 
low enought.


The Wolaver analysis assumes a phase angle, so the model includes the 
angle-effect.


Cheers,
Magnus

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-16 Thread Charles P. Steinmetz

Warren wrote:


Charles Posted:


How much EFC is required depends, in part, on the strength of the pulling.
There are three varying inputs.


NOT at ALL what my test have shown so I guess we do NOT agree on this.
The point you missed, is only the EFC is changing significantly 
because of the high gain and BW.
It insures the two Oscillators are held to within  femtoseconds of 
each other, to at least out to the e-16 at large taus.
So other things are held constant enough that their effects are kept 
below any ref Osc effects.


Why must everything be a matter of other people missing something?  I 
understand how oscillators behave with respect to injection 
pulling/locking, and how that might affect the operation and accuracy 
of a system such as you are using.  I myself noted that Magnus had 
suggested the effect may not be significant in such a system, but 
that drawing that conclusion for any particular design would require 
careful experiments and, hopefully, backup by mathematical 
analysis.  How is that missing anything?


The carefully constructed experiments, that show it works as 
advertised have been done, and the most important ones have been posted.


Forgive me if I missed something, but all I saw regarding the 
relative gains of the error loop and the injection loop were (i) that 
you increased the coupling by a factor of 1000 and (ii) that you 
used a variable attenuator.  If you did carefully designed 
experiments, nothing I saw posted suggested it.


This is a potentially important point because some oscillators one 
might want to test (or use as a reference) may be very much more 
sensitive to injection locking (pulling, actually) than the ones you 
are using.  Therefore, the behavior should be characterized so users 
can determine whether it might affect their results.  It didn't seem 
to have any effect using the oscillators I had is not really a very 
useful characterization of the behavior.  [I do see that in a 
subsequent message you asked for suggestions for further tests.]


I'm curious how you determined that the oscillators are being held to 
within femtoseconds of each other.  And, how many femtoseconds?


Best regards,

Charles






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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-16 Thread WarrenS

Charles

I'm curious how you determined that the oscillators are being held to 
within femtoseconds of each other.

I done  it several ways including measuring the PD output.

You seem to be missing how insignificant an 1-e6 injection locking to EFC 
gain ratio is.
I can't detail, to your satisfaction, all the hundreds of test that show no 
significant effect of so many different things.


For an independent test that may help you with things you missed see:
http://www.ke5fx.com/tpll.htm

ws

***
[time-nuts] Advantages  Disadvantages of the TPLL Method
Charles P. Steinmetz charles_steinmetz at lavabit.com
Thu Jun 17 02:10:31 UTC 2010

Warren wrote:

Charles Posted:


How much EFC is required depends, in part, on the strength of the pulling.
There are three varying inputs.


NOT at ALL what my test have shown so I guess we do NOT agree on this.
The point you missed, is only the EFC is changing significantly
because of the high gain and BW.
It insures the two Oscillators are held to within  femtoseconds of
each other, to at least out to the e-16 at large taus.
So other things are held constant enough that their effects are kept
below any ref Osc effects.


Why must everything be a matter of other people missing something?  I
understand how oscillators behave with respect to injection
pulling/locking, and how that might affect the operation and accuracy
of a system such as you are using.  I myself noted that Magnus had
suggested the effect may not be significant in such a system, but
that drawing that conclusion for any particular design would require
careful experiments and, hopefully, backup by mathematical
analysis.  How is that missing anything?


The carefully constructed experiments, that show it works as
advertised have been done, and the most important ones have been posted.


Forgive me if I missed something, but all I saw regarding the
relative gains of the error loop and the injection loop were (i) that
you increased the coupling by a factor of 1000 and (ii) that you
used a variable attenuator.  If you did carefully designed
experiments, nothing I saw posted suggested it.

This is a potentially important point because some oscillators one
might want to test (or use as a reference) may be very much more
sensitive to injection locking (pulling, actually) than the ones you
are using.  Therefore, the behavior should be characterized so users
can determine whether it might affect their results.  It didn't seem
to have any effect using the oscillators I had is not really a very
useful characterization of the behavior.  [I do see that in a
subsequent message you asked for suggestions for further tests.]

I'm curious how you determined that the oscillators are being held to
within femtoseconds of each other.  And, how many femtoseconds?

Best regards,

Charles 



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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-15 Thread Bob Camp
Hi

With any phase lock system injection locking can indeed be a problem. Since 
it's dependent both on frequency offset and phase angle, checking for it can be 
tricky. I've seen an unfortunately large amount of data where injection locking 
was the issue. There are a number of ways of checking for it, each with their 
own issues (and hardware requirements).  

Bob

On Jun 15, 2010, at 1:39 AM, Bruce Griffiths wrote:

 WarrenS wrote:
 Bruce posted
 If and only if injection locking isn't significant.
 
 No problem then, because it is not significant.
 For each and every oscillator pair someone may try?
 Can place this one under the 'ADVANTAGE' side.
 
 That's descending into the murky realms of pseudoscience.
 At best you've only shown this to be true for the particular oscillator pair 
 being compared.
 Not only must the effect of injection locking be insignificant for the 
 reference, it has to be insignificant for the test oscillator as well.
 If injection locking is an issue the efc gain with the loop open will differ 
 from the efc gain with the loop closed.
 
 I have tested this thoroughly in many ways.
 I do understand the concerns and doubts, especially with an unbuffered HP 
 10811 as the reference.
 The 10811s are pretty sensitive to injection locking and phase pulling.
 Unlike most other methods, one of the many unique properties that the TPLL 
 method has is that injection locking is normally not a problem with it.
 It will change the loop parameters in particular the efc gain.
 Its just a matter of how much it affects the efc gain.
 I find it is generally unnecessary to buffer either the Ref Osc or the DUT.
 This is one of the many features that helps make the simple TPLL so simple.
 (also it does not hurt or change anything to add a proper buffer)
 The lack of injection locking is one of the advantages that contributes to 
 its exceptional and unbelievable performance.
 
 But Adler's equation indicates that an oscillator is much more to susceptible 
 to injection effects when the injected signal frequency is very close to the 
 oscillator frequency.
 
 I did not leave the buffers out of the simple TPLL BB that was tested 
 because of my lack of knowledge, but because of my extra knowledge on the 
 subject that showed that they were unnecessary.
 More than once, I have tried to explain the reason why injection locking is 
 not a problem with my version of the TPLL method, but until one proves it 
 for their self, more words from me will not help.
 I do understand the skepticism and doubt, and I know why it is so hard to 
 believe this for those that have not worked with is this type of method 
 before.
 I guess someone should write one of those fancy math papers, if it has not 
 already been done, that explains it in more convincing terms than I've been 
 able to.
 It is hard for me to believe that paper has not already been written, But 
 then it is hard for me to believe that the TPLL is not used more often. 
 There are plenty of places that one of the TPLL methods well give the best 
 overall solution.
 
 ws
 
 ***
 
 Bruce
 [time-nuts] Advantages  Disadvantages of the TPLL Method
 Bruce Griffiths bruce.griffiths at xtra.co.nz
 
 WarrenS wrote:
 Long explanations, cause I try to explain, the best I can, when I say
 something is WRONG or misleading
 
 Magnus Posted:
 EFC linearity will remain an issue for analog oscillators.
 The oscillator gain will differ depending on offset voltage and
 temperature.
 
 TRUE it is an issue, but somewhat misleading because it need NOT be a
 problem or limitation (mostly)
 EFC Linearity can be an issue because the TPLL is limited by the
 performance of the reference oscillator in lots of ways.
 BUT
 Oscillator EFC gain or linearity are not likely to be of much concern
 or a limitation for high end performance.
 
 The gain nonlinearity I've measured can vary two to one over the full
 range of a good Oscillator but it is more like 10% over the normally
 used range, if one stays well away from the end points.
 NOT so good but livable if you are not making something real accurate.
 BUT
 For all my accurate stuff, when using a HP 10811, I limit the
 full-scale change to 1e-9 or 1e-8 at most.
 This uses such a small part of the total EFC range, that the
 nonlinearity effects are generally below the noise level and of little
 concern at all.
 
 The fact that Oscillator gain does differ with the EFC voltage (offset
 voltage), means if you want to get max accuracy out of the TPLL, it
 will need to be calibrated at the EFC offset voltage it is being used
 at.  One simple solution, if the OSC also has a independent manual
 Freq adjustment like the single oven 10811, is to use it always set
 the EFC voltage to be near zero volts.
 BTW calibration need not be much of a problem, because it can be a
 static calibration.
 If and only if injection locking isn't significant.
 This needs to be established for each setup.
 The simplest way to take 

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-15 Thread WarrenS

Bruce posted


But Adler's equation indicates that an oscillator is much more
susceptible to injection effects when the injected signal frequency is
very close to the oscillator frequency.

No argument,
BUT
The thing that you  (and maybe Adler?) are missing is that effect goes away 
when the two frequencies ARE exactly the same.
I'm not talking close, I'm talking the exact same freq with phase held in 
quadrature within single digit femtoseconds.
BIG difference, Once that is understood, then that sort of answers your 
other comments.



For each and every oscillator pair someone may try?
Can't say for sure, I've only tried the ones I've tried, but even the ones 
that are highly susceptible were OK.



At best you've only shown this to be true for the particular oscillator 
pair being compared.
Yep, maybe I'm just real lucking again and it only applies to all the ones 
I've tested.




That's descending into the murky realms of pseudoscience.

OR as I see it, it is using just a little common sense.
When is the last time you heard of a problem with an oscillator injection 
locking to it's self?




Not only must the effect of injection locking be insignificant for the
reference, it has to be insignificant for the test oscillator as well.
NO argument, If you are testing a DUT what this does effect, then one should 
buffer it or take other precaution.
If you want to make sure the tester is not effecting the osc there is 
another choice besides the Buffer.
DON'T connected it. The tester will work at better than -60 dB signal levels 
and if one just gets a couple of small wires close that is enough signal 
coupling that one can made 1 sec and slower tau readings.
OR you do both the buffer and antennas you can test the OSC from across the 
room.
Which side of the list do you think that should go on, advantages or 
disadvantages?




If injection locking is an issue the efc gain with the loop
open will differ from the efc gain with the loop closed.
It will change the loop parameters in particular the efc gain.
Its just a matter of how much it affects the efc gain.
NO argument, The PLL loop is never opened. THAT will screw up everything and 
cause the injection, delta gain,  etc.


Sounds like it is time for someone to find or write another one of the fancy 
math papers that covers this case.


ws

*
[time-nuts] Advantages  Disadvantages of the TPLL Method
Bruce Griffiths bruce.griffiths at xtra.co.nz
Tue Jun 15 05:39:31 UTC 2010

WarrenS wrote:

Bruce posted

If and only if injection locking isn't significant.


No problem then, because it is not significant.

For each and every oscillator pair someone may try?

Can place this one under the 'ADVANTAGE' side.


That's descending into the murky realms of pseudoscience.
At best you've only shown this to be true for the particular oscillator
pair being compared.
Not only must the effect of injection locking be insignificant for the
reference, it has to be insignificant for the test oscillator as well.
If injection locking is an issue the efc gain with the loop open will
differ from the efc gain with the loop closed.


I have tested this thoroughly in many ways.
I do understand the concerns and doubts, especially with an unbuffered
HP 10811 as the reference.
The 10811s are pretty sensitive to injection locking and phase pulling.
Unlike most other methods, one of the many unique properties that the
TPLL method has is that injection locking is normally not a problem
with it.

It will change the loop parameters in particular the efc gain.
Its just a matter of how much it affects the efc gain.

I find it is generally unnecessary to buffer either the Ref Osc or the
DUT.
This is one of the many features that helps make the simple TPLL so
simple.
(also it does not hurt or change anything to add a proper buffer)
The lack of injection locking is one of the advantages that
contributes to its exceptional and unbelievable performance.


But Adler's equation indicates that an oscillator is much more to
susceptible to injection effects when the injected signal frequency is
very close to the oscillator frequency.


I did not leave the buffers out of the simple TPLL BB that was tested
because of my lack of knowledge, but because of my extra knowledge
on the subject that showed that they were unnecessary.
More than once, I have tried to explain the reason why injection
locking is not a problem with my version of the TPLL method, but until
one proves it for their self, more words from me will not help.
I do understand the skepticism and doubt, and I know why it is so hard
to believe this for those that have not worked with is this type of
method before.
I guess someone should write one of those fancy math papers, if it has
not already been done, that explains it in more convincing terms than
I've been able to.
It is hard for me to believe that paper has not already been written,
But then it is hard for me to believe that the TPLL is not used more
often. 

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-15 Thread WarrenS

Bob posted


Since it's dependent both on frequency offset and phase angle,
When there is no freq offset as in the wsTPLL and no changing of phase 
angle,

I'm saying that injection locking no longer applies.
The thing that some may be missing is that the DUT Osc is cloned by the 
reference Osc.
There is no significant difference between them. (within the PLL bandwidth 
which is  than tau0)

An oscillator is not going to injection to its self (as far as I know)
NOW, Frequency offset due to loading effects, that is another issue and a 
possible problem, so I'm surprised it has not yet been brought up.


I've seen an unfortunately large amount of data where injection locking 
was the issue.
No argument, me too. That is why the lack of injection locking problems with 
the wsTPLL goes high on the advantage side.


checking for it can be tricky. There are a number of ways of checking for 
it,
No argument, and I do know how to test for it, I also know how to do 
integrate and I know how to add 2 + 2.
What I do not know how to do is to get a simple, basic, obvious point 
across.



ws

**
[time-nuts] Advantages  Disadvantages of the TPLL Method
Bob Camp lists at rtty.us
Tue Jun 15 11:48:10 UTC 2010

Hi

With any phase lock system injection locking can indeed be a problem. Since 
it's dependent both on frequency offset and phase angle, checking for it can 
be tricky. I've seen an unfortunately large amount of data where injection 
locking was the issue. There are a number of ways of checking for it, each 
with their own issues (and hardware requirements).


Bob
*
On Jun 15, 2010, at 1:39 AM, Bruce Griffiths wrote:


WarrenS wrote:

Bruce posted

If and only if injection locking isn't significant.


No problem then, because it is not significant.

For each and every oscillator pair someone may try?

Can place this one under the 'ADVANTAGE' side.


That's descending into the murky realms of pseudoscience.
At best you've only shown this to be true for the particular oscillator 
pair being compared.
Not only must the effect of injection locking be insignificant for the 
reference, it has to be insignificant for the test oscillator as well.
If injection locking is an issue the efc gain with the loop open will 
differ from the efc gain with the loop closed.



I have tested this thoroughly in many ways.
I do understand the concerns and doubts, especially with an unbuffered HP 
10811 as the reference.

The 10811s are pretty sensitive to injection locking and phase pulling.
Unlike most other methods, one of the many unique properties that the 
TPLL method has is that injection locking is normally not a problem with 
it.

It will change the loop parameters in particular the efc gain.
Its just a matter of how much it affects the efc gain.
I find it is generally unnecessary to buffer either the Ref Osc or the 
DUT.
This is one of the many features that helps make the simple TPLL so 
simple.

(also it does not hurt or change anything to add a proper buffer)
The lack of injection locking is one of the advantages that contributes 
to its exceptional and unbelievable performance.


But Adler's equation indicates that an oscillator is much more to 
susceptible to injection effects when the injected signal frequency is 
very close to the oscillator frequency.


I did not leave the buffers out of the simple TPLL BB that was tested 
because of my lack of knowledge, but because of my extra knowledge on 
the subject that showed that they were unnecessary.
More than once, I have tried to explain the reason why injection locking 
is not a problem with my version of the TPLL method, but until one proves 
it for their self, more words from me will not help.
I do understand the skepticism and doubt, and I know why it is so hard to 
believe this for those that have not worked with is this type of method 
before.
I guess someone should write one of those fancy math papers, if it has 
not already been done, that explains it in more convincing terms than 
I've been able to.
It is hard for me to believe that paper has not already been written, But 
then it is hard for me to believe that the TPLL is not used more often. 
There are plenty of places that one of the TPLL methods well give the 
best overall solution.


ws

***


Bruce

[time-nuts] Advantages  Disadvantages of the TPLL Method
Bruce Griffiths bruce.griffiths at xtra.co.nz

WarrenS wrote:

Long explanations, cause I try to explain, the best I can, when I say
something is WRONG or misleading

Magnus Posted:

EFC linearity will remain an issue for analog oscillators.
The oscillator gain will differ depending on offset voltage and
temperature.


TRUE it is an issue, but somewhat misleading because it need NOT be a
problem or limitation (mostly)
EFC Linearity can be an issue because the TPLL is limited by the
performance of the reference oscillator in lots of ways.
BUT
Oscillator EFC gain or linearity are not likely to be of much 

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-15 Thread Charles P. Steinmetz

Warren wrote:

The thing that you  (and maybe Adler?) are missing is that effect 
goes away when the two frequencies ARE exactly the same.
I'm not talking close, I'm talking the exact same freq with phase 
held in quadrature within single digit femtoseconds.
BIG difference, Once that is understood, then that sort of answers 
your other comments.


Actually, this is not true.  If either or both oscillators are 
affected by injection locking (and they pretty much all are, to some 
degree -- in this connection, note that you want to make measurements 
down to E-12 or better [I thought you mentioned E-14 somewhere early 
on], so even the least bit of IL will affect the results), what you 
have is two control inputs to the controlled oscillator (the EFC and 
the reference oscillator) and one control input to the reference 
oscillator (the oscillator under test, which is itself controlled by 
both EFC and the reference oscillator).  They will reach equilibrium 
(unless the recursive feedback is unstable), but the locked frequency 
will be different from both oscillators' free-running frequency and 
the EFC will not correctly indicate the test oscillator deviation 
because it isn't the only control input in the system.


Best regards,

Charles





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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-15 Thread Bob Camp
Hi

If the two oscillators are locked by input to the EFC then the EFC voltage
will reproduce the phase / frequency of the DUT on the reference (they are
phase locked via the PLL). 

If the two oscillators are locked by injection locking, small changes in the
EFC is no longer needed to keep them in phase / frequency alignment. The
injection lock bypasses the pll within the injection lock bandwidth. It's a
second control loop in parallel with the PLL. Since the two oscillators are
already locked (by injection) the EFC information is suppressed within the
injection lock bandwidth, but not outside it. It's not a brick wall filter,
the normal stuff applies to exactly how much you have lost on the EFC from
the injection lock. 

This is not some sort of math mumbo jumbo. I've physically seen it happen
multiple times on real hardware on the bench in the lab. It happens on
breadboards built from scratch. It happens with HP 3048's. It's a very real
limit when doing any at output frequency PLL's. 

Bob

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of WarrenS
Sent: Tuesday, June 15, 2010 10:04 AM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method

Bob posted

Since it's dependent both on frequency offset and phase angle,
When there is no freq offset as in the wsTPLL and no changing of phase 
angle,
I'm saying that injection locking no longer applies.
The thing that some may be missing is that the DUT Osc is cloned by the 
reference Osc.
There is no significant difference between them. (within the PLL bandwidth 
which is  than tau0)
An oscillator is not going to injection to its self (as far as I know)
NOW, Frequency offset due to loading effects, that is another issue and a 
possible problem, so I'm surprised it has not yet been brought up.

 I've seen an unfortunately large amount of data where injection locking 
 was the issue.
No argument, me too. That is why the lack of injection locking problems with

the wsTPLL goes high on the advantage side.

checking for it can be tricky. There are a number of ways of checking for 
it,
No argument, and I do know how to test for it, I also know how to do 
integrate and I know how to add 2 + 2.
What I do not know how to do is to get a simple, basic, obvious point 
across.


ws

**
[time-nuts] Advantages  Disadvantages of the TPLL Method
Bob Camp lists at rtty.us
Tue Jun 15 11:48:10 UTC 2010

Hi

With any phase lock system injection locking can indeed be a problem. Since 
it's dependent both on frequency offset and phase angle, checking for it can

be tricky. I've seen an unfortunately large amount of data where injection 
locking was the issue. There are a number of ways of checking for it, each 
with their own issues (and hardware requirements).

Bob
*
On Jun 15, 2010, at 1:39 AM, Bruce Griffiths wrote:

 WarrenS wrote:
 Bruce posted
 If and only if injection locking isn't significant.

 No problem then, because it is not significant.
 For each and every oscillator pair someone may try?
 Can place this one under the 'ADVANTAGE' side.

 That's descending into the murky realms of pseudoscience.
 At best you've only shown this to be true for the particular oscillator 
 pair being compared.
 Not only must the effect of injection locking be insignificant for the 
 reference, it has to be insignificant for the test oscillator as well.
 If injection locking is an issue the efc gain with the loop open will 
 differ from the efc gain with the loop closed.

 I have tested this thoroughly in many ways.
 I do understand the concerns and doubts, especially with an unbuffered HP

 10811 as the reference.
 The 10811s are pretty sensitive to injection locking and phase pulling.
 Unlike most other methods, one of the many unique properties that the 
 TPLL method has is that injection locking is normally not a problem with 
 it.
 It will change the loop parameters in particular the efc gain.
 Its just a matter of how much it affects the efc gain.
 I find it is generally unnecessary to buffer either the Ref Osc or the 
 DUT.
 This is one of the many features that helps make the simple TPLL so 
 simple.
 (also it does not hurt or change anything to add a proper buffer)
 The lack of injection locking is one of the advantages that contributes 
 to its exceptional and unbelievable performance.

 But Adler's equation indicates that an oscillator is much more to 
 susceptible to injection effects when the injected signal frequency is 
 very close to the oscillator frequency.

 I did not leave the buffers out of the simple TPLL BB that was tested 
 because of my lack of knowledge, but because of my extra knowledge on 
 the subject that showed that they were unnecessary.
 More than once, I have tried to explain the reason why injection locking 
 is not a problem with my version of the TPLL method, but until one proves

 it for their self

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-15 Thread WarrenS


Charles posted:
but the locked frequency will be different from both oscillators' 
free-running frequency and

the EFC will not correctly indicate the test oscillator deviation
because it isn't the only control input in the system.

Good point and No argument  (except for the deviation part)
Because the EFC is the only control input THAT IS VARYING.

Also what I have said in the past, maybe unclearly:
NOW, Frequency offset due to loading effects, that is another issue and a
possible problem, so I'm surprised it has not yet been brought up.

The effects you are talking about are there and can be significant and are 
easy to measure (with a second TPLL tester) but the BIG IMPORTANT point is 
they are a fixed type of offset error and constant and do not effect the 
Delta EFC with delta freq change.
The effect you state is a limit for the absolute accuracy of the DUT's 
frequency measurment that the tester can make but it does not limit the 
delta freq accuracy.(which is all that is really required for ADEV.)


BTW the way I reduce that effect you are talking about so that it also 
becomes significant, compared to the accuracy of the Ref osc, is to add 
attenuator pads in both osc paths. This does raise the noise floor some, but 
the noise floor is so low that it can be raised and still not be significant 
compared to the Ref osc, so it allows a good compromise to be made.


simple Example:
Take an osc that has some IL, buffer up its output real good at 90 deg and 
now couple just a little of that buffered signal into the osc output. The 
1e-11 to e-12 freq shift that will cause does not cause the osc to become 
unstable or have some other significant different EFC shape, It just causes 
the freq to change a little (offset) about the same as any other fixed and 
constant load would have.


In any case there are lots of little subtle things that are going on that I 
can not address in a single email, so that is why all I clam is that the 
simple TPLL is better than the reference Osc, so it is good enough.
And YES it can be made MUCH better, if one uses more than a single active 
part, but so what? for most things it is good enough as is.


**

Charles posted:

Warren wrote:


The thing that you  (and maybe Adler?) are missing is that effect
goes away when the two frequencies ARE exactly the same.
I'm not talking close, I'm talking the exact same freq with phase
held in quadrature within single digit femtoseconds.
BIG difference, Once that is understood, then that sort of answers
your other comments.


Actually, this is not true.  If either or both oscillators are
affected by injection locking (and they pretty much all are, to some
degree -- in this connection, note that you want to make measurements
down to E-12 or better [I thought you mentioned E-14 somewhere early
on], so even the least bit of IL will affect the results), what you
have is two control inputs to the controlled oscillator (the EFC and
the reference oscillator) and one control input to the reference
oscillator (the oscillator under test, which is itself controlled by
both EFC and the reference oscillator).  They will reach equilibrium
(unless the recursive feedback is unstable), but the locked frequency
will be different from both oscillators' free-running frequency and
the EFC will not correctly indicate the test oscillator deviation
because it isn't the only control input in the system.

Best regards,

Charles 



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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-15 Thread John Miles
I was surprised at the lack of it in this case.  The 10811s are usually
fairly vulnerable to it; you certainly can't feed two of them into the mixer
on a 3048A without using isolation amps.  But then, the loop BW is about a
thousand times wider in the TPLL than in a traditional loose-PLL phase noise
test set.

-- john, KE5FX

 -Original Message-
 From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com]on
 Behalf Of Bob Camp
 Sent: Tuesday, June 15, 2010 4:48 AM
 To: Discussion of precise time and frequency measurement
 Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method


 Hi

 With any phase lock system injection locking can indeed be a
 problem. Since it's dependent both on frequency offset and phase
 angle, checking for it can be tricky. I've seen an unfortunately
 large amount of data where injection locking was the issue. There
 are a number of ways of checking for it, each with their own
 issues (and hardware requirements).

 Bob




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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-15 Thread WarrenS


Bob posted:
If the two oscillators are locked by injection locking, small changes in the
EFC is no longer needed to keep them in phase / frequency alignment.

No disagreement
I guess the thing you may be missing is that there is so much gain and BW in 
the TPLL EFC feedback loop that it complexly overpowers any injection 
locking tendency and makes its effect insignificant
This I have tested for in many ways, one way was to increase the cross 
coupling between the oscillators by 1000.


If you can not believe that I know how to test for this or add 2 numbers,
I'd suggest you try it for yourself with a TPLL and stop speculating how I'm 
wrong.
Injection locking and its friends is not a problem with the simple TPLL 
tester using 10811 ref osc, and the 3db  5 db pads shown in my block 
diagram.


ws



Hi

If the two oscillators are locked by input to the EFC then the EFC voltage
will reproduce the phase / frequency of the DUT on the reference (they are
phase locked via the PLL).

If the two oscillators are locked by injection locking, small changes in the
EFC is no longer needed to keep them in phase / frequency alignment. The
injection lock bypasses the pll within the injection lock bandwidth. It's a
second control loop in parallel with the PLL. Since the two oscillators are
already locked (by injection) the EFC information is suppressed within the
injection lock bandwidth, but not outside it. It's not a brick wall filter,
the normal stuff applies to exactly how much you have lost on the EFC from
the injection lock.

This is not some sort of math mumbo jumbo. I've physically seen it happen
multiple times on real hardware on the bench in the lab. It happens on
breadboards built from scratch. It happens with HP 3048's. It's a very real
limit when doing any at output frequency PLL's.

Bob

-Original Message-
From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] 
On

Behalf Of WarrenS
Sent: Tuesday, June 15, 2010 10:04 AM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method

Bob posted


Since it's dependent both on frequency offset and phase angle,

When there is no freq offset as in the wsTPLL and no changing of phase
angle,
I'm saying that injection locking no longer applies.
The thing that some may be missing is that the DUT Osc is cloned by the
reference Osc.
There is no significant difference between them. (within the PLL bandwidth
which is  than tau0)
An oscillator is not going to injection to its self (as far as I know)
NOW, Frequency offset due to loading effects, that is another issue and a
possible problem, so I'm surprised it has not yet been brought up.


I've seen an unfortunately large amount of data where injection locking
was the issue.

No argument, me too. That is why the lack of injection locking problems with

the wsTPLL goes high on the advantage side.


checking for it can be tricky. There are a number of ways of checking for
it,

No argument, and I do know how to test for it, I also know how to do
integrate and I know how to add 2 + 2.
What I do not know how to do is to get a simple, basic, obvious point
across.


ws

**
[time-nuts] Advantages  Disadvantages of the TPLL Method
Bob Camp lists at rtty.us
Tue Jun 15 11:48:10 UTC 2010

Hi

With any phase lock system injection locking can indeed be a problem. Since
it's dependent both on frequency offset and phase angle, checking for it can

be tricky. I've seen an unfortunately large amount of data where injection
locking was the issue. There are a number of ways of checking for it, each
with their own issues (and hardware requirements).

Bob
*
On Jun 15, 2010, at 1:39 AM, Bruce Griffiths wrote:


WarrenS wrote:

Bruce posted

If and only if injection locking isn't significant.


No problem then, because it is not significant.

For each and every oscillator pair someone may try?

Can place this one under the 'ADVANTAGE' side.


That's descending into the murky realms of pseudoscience.
At best you've only shown this to be true for the particular oscillator
pair being compared.
Not only must the effect of injection locking be insignificant for the
reference, it has to be insignificant for the test oscillator as well.
If injection locking is an issue the efc gain with the loop open will
differ from the efc gain with the loop closed.


I have tested this thoroughly in many ways.
I do understand the concerns and doubts, especially with an unbuffered HP



10811 as the reference.
The 10811s are pretty sensitive to injection locking and phase pulling.
Unlike most other methods, one of the many unique properties that the
TPLL method has is that injection locking is normally not a problem with
it.

It will change the loop parameters in particular the efc gain.
Its just a matter of how much it affects the efc gain.

I find it is generally unnecessary to buffer either the Ref Osc or the
DUT

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-15 Thread Magnus Danielson

On 06/15/2010 03:28 PM, WarrenS wrote:

Bruce posted


But Adler's equation indicates that an oscillator is much more
susceptible to injection effects when the injected signal frequency is
very close to the oscillator frequency.

No argument,
BUT
The thing that you (and maybe Adler?) are missing is that effect goes
away when the two frequencies ARE exactly the same.
I'm not talking close, I'm talking the exact same freq with phase held
in quadrature within single digit femtoseconds.
BIG difference, Once that is understood, then that sort of answers your
other comments.


Actually, as we have this in a PLL, it doesn't work out quite like that. 
Wolaver shows how the PLL is modified with an additional proportional 
path (his analysis is on active PI loop, but the additional proportional 
path also applies to active lag loops).


For the active PI loop, the injection locking will modulate the PLL 
bandwidth. I would need to analyse the details for an active lag filter, 
but since the gain increases in the loop, so will the loop frequency. 
The implication for the EFC is that not all the gain goes through the 
amplifier, so the EFC deviations will become less. However, a tight PLL 
has high gain for starters, so unless there is very high injection gain 
the effect will be very modest. If the gain is calibrated during closed 
loop conditions and the injection is relatively stable, then the effect 
is essentially cancelled anyway. I would assume that the gain-change of 
typical injection is a small fraction of loop gain, so then it is a 
small effect that should not affect the results to much. It may be good 
to measure the injection gain and compare it to the loop gain.


For a loose PLL, as being used for phase noise measurements, injection 
locking is a much bigger concern.


But, the effect is there even when the frequency is the same. It is just 
that the application in tight PLL makes it very small.



For each and every oscillator pair someone may try?

Can't say for sure, I've only tried the ones I've tried, but even the
ones that are highly susceptible were OK.



At best you've only shown this to be true for the particular
oscillator pair being compared.

Yep, maybe I'm just real lucking again and it only applies to all the
ones I've tested.



That's descending into the murky realms of pseudoscience.

OR as I see it, it is using just a little common sense.
When is the last time you heard of a problem with an oscillator
injection locking to it's self?


I think these can be answered by much better arguments than 
pseudoscience or pure luck. The loop gain dominates over the injection 
gain and thus makes it a minor effect. and that by applying analysis.



Not only must the effect of injection locking be insignificant for the
reference, it has to be insignificant for the test oscillator as well.

NO argument, If you are testing a DUT what this does effect, then one
should buffer it or take other precaution.
If you want to make sure the tester is not effecting the osc there is
another choice besides the Buffer.
DON'T connected it. The tester will work at better than -60 dB signal
levels and if one just gets a couple of small wires close that is enough
signal coupling that one can made 1 sec and slower tau readings.
OR you do both the buffer and antennas you can test the OSC from across
the room.
Which side of the list do you think that should go on, advantages or
disadvantages?


Neither. It's a characteristic, it needs to be analyzed. If the DUT is 
very sensitive, then additional care may be taken or maybe it just isn't 
a very good solution.



If injection locking is an issue the efc gain with the loop
open will differ from the efc gain with the loop closed.
It will change the loop parameters in particular the efc gain.
Its just a matter of how much it affects the efc gain.

NO argument, The PLL loop is never opened. THAT will screw up everything
and cause the injection, delta gain, etc.

Sounds like it is time for someone to find or write another one of the
fancy math papers that covers this case.


Page 102-104 in Dan Wolavers book covers this with sufficiently clarity 
that I could answer this. I have been trying to hint to this before. 
Anyway, page 103 is a very instructive conversion from different 
representations of a PI-loop with injection into a simpler form. The 
math follows up and remaining analysis becomes very easy to do.


Cheers,
Magnus

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-15 Thread WarrenS

Bob posted
The injection lock gain rises at 1/f. At some point it's going to be 
greater

than the gain through the EFC.

It would seem to me with that argument then nothing works, everything in the 
universal will all be at the same frequency sooner or later.

fortunately
The PLL feedback gain also rises due to the 'PI' integrator at the same 1/f 
rate, and starts out way ahead.
Don't think the injection lock is ever going to catch up, at least not in 
OUR life times.


The offset cause by the effect of Loading is a different subject, and has 
also been taken care of (good enough).


ws

*
Hi

The injection lock gain rises at 1/f. At some point it's going to be greater
than the gain through the EFC.

Bob

-Original Message-
From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] 
On

Behalf Of WarrenS
Sent: Tuesday, June 15, 2010 1:37 PM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method


Bob posted:
If the two oscillators are locked by injection locking, small changes in the
EFC is no longer needed to keep them in phase / frequency alignment.

No disagreement
I guess the thing you may be missing is that there is so much gain and BW in

the TPLL EFC feedback loop that it complexly overpowers any injection
locking tendency and makes its effect insignificant
This I have tested for in many ways, one way was to increase the cross
coupling between the oscillators by 1000.

If you can not believe that I know how to test for this or add 2 numbers,
I'd suggest you try it for yourself with a TPLL and stop speculating how I'm

wrong.
Injection locking and its friends is not a problem with the simple TPLL
tester using 10811 ref osc, and the 3db  5 db pads shown in my block
diagram.

ws



Hi

If the two oscillators are locked by input to the EFC then the EFC voltage
will reproduce the phase / frequency of the DUT on the reference (they are
phase locked via the PLL).

If the two oscillators are locked by injection locking, small changes in the
EFC is no longer needed to keep them in phase / frequency alignment. The
injection lock bypasses the pll within the injection lock bandwidth. It's a
second control loop in parallel with the PLL. Since the two oscillators are
already locked (by injection) the EFC information is suppressed within the
injection lock bandwidth, but not outside it. It's not a brick wall filter,
the normal stuff applies to exactly how much you have lost on the EFC from
the injection lock.

This is not some sort of math mumbo jumbo. I've physically seen it happen
multiple times on real hardware on the bench in the lab. It happens on
breadboards built from scratch. It happens with HP 3048's. It's a very real
limit when doing any at output frequency PLL's.

Bob

-Original Message-
From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com]
On
Behalf Of WarrenS
Sent: Tuesday, June 15, 2010 10:04 AM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method

Bob posted


Since it's dependent both on frequency offset and phase angle,

When there is no freq offset as in the wsTPLL and no changing of phase
angle,
I'm saying that injection locking no longer applies.
The thing that some may be missing is that the DUT Osc is cloned by the
reference Osc.
There is no significant difference between them. (within the PLL bandwidth
which is  than tau0)
An oscillator is not going to injection to its self (as far as I know)
NOW, Frequency offset due to loading effects, that is another issue and a
possible problem, so I'm surprised it has not yet been brought up.


I've seen an unfortunately large amount of data where injection locking
was the issue.

No argument, me too. That is why the lack of injection locking problems with

the wsTPLL goes high on the advantage side.


checking for it can be tricky. There are a number of ways of checking for
it,

No argument, and I do know how to test for it, I also know how to do
integrate and I know how to add 2 + 2.
What I do not know how to do is to get a simple, basic, obvious point
across.


ws

**
[time-nuts] Advantages  Disadvantages of the TPLL Method
Bob Camp lists at rtty.us
Tue Jun 15 11:48:10 UTC 2010

Hi

With any phase lock system injection locking can indeed be a problem. Since
it's dependent both on frequency offset and phase angle, checking for it can

be tricky. I've seen an unfortunately large amount of data where injection
locking was the issue. There are a number of ways of checking for it, each
with their own issues (and hardware requirements).

Bob
*
On Jun 15, 2010, at 1:39 AM, Bruce Griffiths wrote:


WarrenS wrote:

Bruce posted

If and only if injection locking isn't significant.


No problem then, because it is not significant.

For each and every oscillator pair someone may try?

Can place

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-15 Thread WarrenS

Magnus posted a bunch of good stuff,


Neither. It's a characteristic, it needs to be analyzed. If the DUT is
very sensitive, then additional care may be taken or maybe it just isn't
a very good solution.


We have little disagreements for the most part. Except maybe for if it 
should be on 'the list'.
The characteristics are what makes the advantages and disadvantages, so they 
belong on the list.


The high natural rejection that the TPLL has to injection locking makes it 
much less sensitive than any other system, so it lets one keep it simple. 
TO me that is an advantage.


I did test for the effect by connecting the REF osc to the DUT osc with a 
variable attenuator, and could not make the TPLL system start to fail until 
I the coupling got so low that it started to short out the two signals, and 
still it was working, just got a bit noisier
I called the results of that test good enough and moved on to other ways of 
testing.

All of which it also passed with flying colors

Another  subtle side effect of that advantages is that the cables do not to 
be shielded so well.

example:
If I bring a third osc's that is connect to a RG58 BNC shielded cable and is 
offset in freq by 1 to 10 Hz
The effect of coupling (and or Injection locking)  between to BNC shielded 
cables can be seem at the Tester output.


What I have found is if I want to get the full accuracy of the TPLL, I can 
not have an offset osc cable on the same table, unless it is fully enclosed 
in a RF proof box.


ws

**

[time-nuts] Advantages  Disadvantages of the TPLL Method
Magnus Danielson magnus at rubidium.dyndns.org
Tue Jun 15 17:53:49 UTC 2010


On 06/15/2010 03:28 PM, WarrenS wrote:

Bruce posted


But Adler's equation indicates that an oscillator is much more
susceptible to injection effects when the injected signal frequency is
very close to the oscillator frequency.

No argument,
BUT
The thing that you (and maybe Adler?) are missing is that effect goes
away when the two frequencies ARE exactly the same.
I'm not talking close, I'm talking the exact same freq with phase held
in quadrature within single digit femtoseconds.
BIG difference, Once that is understood, then that sort of answers your
other comments.


Actually, as we have this in a PLL, it doesn't work out quite like that.
Wolaver shows how the PLL is modified with an additional proportional
path (his analysis is on active PI loop, but the additional proportional
path also applies to active lag loops).

For the active PI loop, the injection locking will modulate the PLL
bandwidth. I would need to analyse the details for an active lag filter,
but since the gain increases in the loop, so will the loop frequency.
The implication for the EFC is that not all the gain goes through the
amplifier, so the EFC deviations will become less. However, a tight PLL
has high gain for starters, so unless there is very high injection gain
the effect will be very modest. If the gain is calibrated during closed
loop conditions and the injection is relatively stable, then the effect
is essentially cancelled anyway. I would assume that the gain-change of
typical injection is a small fraction of loop gain, so then it is a
small effect that should not affect the results to much. It may be good
to measure the injection gain and compare it to the loop gain.

For a loose PLL, as being used for phase noise measurements, injection
locking is a much bigger concern.

But, the effect is there even when the frequency is the same. It is just
that the application in tight PLL makes it very small.


For each and every oscillator pair someone may try?

Can't say for sure, I've only tried the ones I've tried, but even the
ones that are highly susceptible were OK.



At best you've only shown this to be true for the particular
oscillator pair being compared.

Yep, maybe I'm just real lucking again and it only applies to all the
ones I've tested.



That's descending into the murky realms of pseudoscience.

OR as I see it, it is using just a little common sense.
When is the last time you heard of a problem with an oscillator
injection locking to it's self?


I think these can be answered by much better arguments than
pseudoscience or pure luck. The loop gain dominates over the injection
gain and thus makes it a minor effect. and that by applying analysis.


Not only must the effect of injection locking be insignificant for the
reference, it has to be insignificant for the test oscillator as well.

NO argument, If you are testing a DUT what this does effect, then one
should buffer it or take other precaution.
If you want to make sure the tester is not effecting the osc there is
another choice besides the Buffer.
DON'T connected it. The tester will work at better than -60 dB signal
levels and if one just gets a couple of small wires close that is enough
signal coupling that one can made 1 sec and slower tau readings.
OR you do both the buffer and antennas you can test the OSC from across
the 

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-15 Thread Magnus Danielson

Hi Warren,

On 06/15/2010 08:49 PM, WarrenS wrote:

Magnus posted a bunch of good stuff,


Neither. It's a characteristic, it needs to be analyzed. If the DUT is
very sensitive, then additional care may be taken or maybe it just isn't
a very good solution.


We have little disagreements for the most part. Except maybe for if it
should be on 'the list'.
The characteristics are what makes the advantages and disadvantages, so
they belong on the list.


Well, it depends on the oscillators involved... so it is just not 
given... but assuming a fairly typical oscillator for our world, then it 
would end up on the advantage side.



The high natural rejection that the TPLL has to injection locking makes
it much less sensitive than any other system, so it lets one keep it
simple. TO me that is an advantage.


Hmm, yes... for the typical oscillator yes...


I did test for the effect by connecting the REF osc to the DUT osc with
a variable attenuator, and could not make the TPLL system start to fail
until I the coupling got so low that it started to short out the two
signals, and still it was working, just got a bit noisier
I called the results of that test good enough and moved on to other ways
of testing.
All of which it also passed with flying colors


Noiser as you added gain...


Another subtle side effect of that advantages is that the cables do not
to be shielded so well.
example:
If I bring a third osc's that is connect to a RG58 BNC shielded cable
and is offset in freq by 1 to 10 Hz
The effect of coupling (and or Injection locking) between to BNC
shielded cables can be seem at the Tester output.

What I have found is if I want to get the full accuracy of the TPLL, I
can not have an offset osc cable on the same table, unless it is fully
enclosed in a RF proof box.


That would help, definitly.

Cheers,
Magnus

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-15 Thread Didier Juges
I promised myself I would not get into this any more, but here we go again...

 WarrenS warrensjmail-...@yahoo.com wrote: 
 
 Charles posted:
 but the locked frequency will be different from both oscillators' 
 free-running frequency and
 the EFC will not correctly indicate the test oscillator deviation
 because it isn't the only control input in the system.
 
 Good point and No argument  (except for the deviation part)
 Because the EFC is the only control input THAT IS VARYING.
 

Any parasitic control input is a problem in that system, like any other system.
I thought the point of all this was to measure the noise of an oscillator?
If it is noisy (and they all are, to some level, otherwise you would not need 
to measure it), then its frequency (or phase) is varying. 

If the test oscillator is coupled (via injection locking) to the reference 
oscillator, the test oscillator will force the ref oscillator to follow its 
noise without the need to move the EFC. The EFC voltage will be stable (because 
the oscillators move together), while you have two synchronously noisy 
oscillators. If you measure the EFC, you will be left to believe your 
oscillator is better than it is.

Please note that the effect is not simply a scaling factor, because injection 
locking is a non-linear effect, or rather it is a mostly linear effect over a 
typically very limited dynamic range. Small variations will be totally coupled, 
where larger ones could possibly unlock the oscillators, producing steps in the 
EFC voltage. Said another way, you cannot eliminate the effects of injection 
locking by post-processing the data.

Injection locking is a parasitic control input and it is a problem with ANY 
method that purports to measure noise. Ignore it at your own risk, but don't 
say it does not matter, unless you want to prove something we already know.

Didier


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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-15 Thread Bob Camp
Hi

What is the configuration of your loop?

Bob

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of WarrenS
Sent: Tuesday, June 15, 2010 2:16 PM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method

Bob posted
The injection lock gain rises at 1/f. At some point it's going to be 
greater
than the gain through the EFC.

It would seem to me with that argument then nothing works, everything in the

universal will all be at the same frequency sooner or later.
fortunately
The PLL feedback gain also rises due to the 'PI' integrator at the same 1/f 
rate, and starts out way ahead.
Don't think the injection lock is ever going to catch up, at least not in 
OUR life times.

The offset cause by the effect of Loading is a different subject, and has 
also been taken care of (good enough).

ws

*
Hi

The injection lock gain rises at 1/f. At some point it's going to be greater
than the gain through the EFC.

Bob

-Original Message-
From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] 
On
Behalf Of WarrenS
Sent: Tuesday, June 15, 2010 1:37 PM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method


Bob posted:
If the two oscillators are locked by injection locking, small changes in the
EFC is no longer needed to keep them in phase / frequency alignment.

No disagreement
I guess the thing you may be missing is that there is so much gain and BW in

the TPLL EFC feedback loop that it complexly overpowers any injection
locking tendency and makes its effect insignificant
This I have tested for in many ways, one way was to increase the cross
coupling between the oscillators by 1000.

If you can not believe that I know how to test for this or add 2 numbers,
I'd suggest you try it for yourself with a TPLL and stop speculating how I'm

wrong.
Injection locking and its friends is not a problem with the simple TPLL
tester using 10811 ref osc, and the 3db  5 db pads shown in my block
diagram.

ws



Hi

If the two oscillators are locked by input to the EFC then the EFC voltage
will reproduce the phase / frequency of the DUT on the reference (they are
phase locked via the PLL).

If the two oscillators are locked by injection locking, small changes in the
EFC is no longer needed to keep them in phase / frequency alignment. The
injection lock bypasses the pll within the injection lock bandwidth. It's a
second control loop in parallel with the PLL. Since the two oscillators are
already locked (by injection) the EFC information is suppressed within the
injection lock bandwidth, but not outside it. It's not a brick wall filter,
the normal stuff applies to exactly how much you have lost on the EFC from
the injection lock.

This is not some sort of math mumbo jumbo. I've physically seen it happen
multiple times on real hardware on the bench in the lab. It happens on
breadboards built from scratch. It happens with HP 3048's. It's a very real
limit when doing any at output frequency PLL's.

Bob

-Original Message-
From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com]
On
Behalf Of WarrenS
Sent: Tuesday, June 15, 2010 10:04 AM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method

Bob posted

Since it's dependent both on frequency offset and phase angle,
When there is no freq offset as in the wsTPLL and no changing of phase
angle,
I'm saying that injection locking no longer applies.
The thing that some may be missing is that the DUT Osc is cloned by the
reference Osc.
There is no significant difference between them. (within the PLL bandwidth
which is  than tau0)
An oscillator is not going to injection to its self (as far as I know)
NOW, Frequency offset due to loading effects, that is another issue and a
possible problem, so I'm surprised it has not yet been brought up.

 I've seen an unfortunately large amount of data where injection locking
 was the issue.
No argument, me too. That is why the lack of injection locking problems with

the wsTPLL goes high on the advantage side.

checking for it can be tricky. There are a number of ways of checking for
it,
No argument, and I do know how to test for it, I also know how to do
integrate and I know how to add 2 + 2.
What I do not know how to do is to get a simple, basic, obvious point
across.


ws

**
[time-nuts] Advantages  Disadvantages of the TPLL Method
Bob Camp lists at rtty.us
Tue Jun 15 11:48:10 UTC 2010

Hi

With any phase lock system injection locking can indeed be a problem. Since
it's dependent both on frequency offset and phase angle, checking for it can

be tricky. I've seen an unfortunately large amount of data where injection
locking was the issue. There are a number of ways of checking for it, each

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-15 Thread Charles P. Steinmetz

Warren wrote:


Charles posted:
but the locked frequency will be different from both oscillators' 
free-running frequency and

the EFC will not correctly indicate the test oscillator deviation
because it isn't the only control input in the system.


Good point and No argument  (except for the deviation part)
Because the EFC is the only control input THAT IS VARYING.


No, it's not.  The strength with which each oscillator pulls on the 
other also varies as the equilibrium frequency (the result of all 
three recursive control inputs) moves around relative to the two 
instantaneous free-running frequencies.  How much EFC is required 
depends, in part, on the strength of the pulling.  There are three 
varying inputs.


Magnus suggested that the effect of injection locking may be enough 
smaller than the EFC input that it has little practical 
significance.  That may be so, but when dealing with measurement 
accuracy in the hundreds or tens ot ppt, this needs to be verified by 
the results of carefully constructed experiments and hopefully also 
supported by mathematical analysis.


Best regards,

Charles





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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-15 Thread WarrenS

Charles Posted:

 when dealing with measurement accuracy in the hundreds or tens of ppt, 
this needs to be verified by
the results of carefully constructed experiments and hopefully also 
supported by mathematical analysis.


No argument, on that part.
The carefully constructed experiments, that show it works as advertised 
have been done, and the most important ones have been posted.

(unless you mean the experiments must be done by you)
Still waiting for someone to do the mathematical analysis.


How much EFC is required depends, in part, on the strength of the pulling.
There are three varying inputs.


NOT at ALL what my test have shown so I guess we do NOT agree on this.
The point you missed, is only the EFC is changing significantly because of 
the high gain and BW.
It insures the two Oscillators are held to within  femtoseconds of each 
other, to at least out to the e-16 at large taus.
So other things are held constant enough that their effects are kept below 
any ref Osc effects.


But no mater who is correct, It does work, which is the more important thing 
at this stage.


ws

***
time-nuts] Advantages  Disadvantages of the TPLL Method
Charles P. Steinmetz charles_steinmetz at lavabit.com
Wed Jun 16 03:45:03 UTC 2010

Warren wrote:


Charles posted:

but the locked frequency will be different from both oscillators'
free-running frequency and
the EFC will not correctly indicate the test oscillator deviation
because it isn't the only control input in the system.


Good point and No argument  (except for the deviation part)
Because the EFC is the only control input THAT IS VARYING.


No, it's not.  The strength with which each oscillator pulls on the
other also varies as the equilibrium frequency (the result of all
three recursive control inputs) moves around relative to the two
instantaneous free-running frequencies.  How much EFC is required
depends, in part, on the strength of the pulling.  There are three
varying inputs.

Magnus suggested that the effect of injection locking may be enough
smaller than the EFC input that it has little practical
significance.  That may be so, but when dealing with measurement
accuracy in the hundreds or tens ot ppt, this needs to be verified by
the results of carefully constructed experiments and hopefully also
supported by mathematical analysis.

Best regards,

Charles 



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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-15 Thread Magnus Danielson

On 06/16/2010 05:45 AM, Charles P. Steinmetz wrote:

Warren wrote:


Charles posted:

but the locked frequency will be different from both oscillators'
free-running frequency and
the EFC will not correctly indicate the test oscillator deviation
because it isn't the only control input in the system.


Good point and No argument (except for the deviation part)
Because the EFC is the only control input THAT IS VARYING.


No, it's not. The strength with which each oscillator pulls on the other
also varies as the equilibrium frequency (the result of all three
recursive control inputs) moves around relative to the two instantaneous
free-running frequencies. How much EFC is required depends, in part, on
the strength of the pulling. There are three varying inputs.

Magnus suggested that the effect of injection locking may be enough
smaller than the EFC input that it has little practical significance.
That may be so, but when dealing with measurement accuracy in the
hundreds or tens ot ppt, this needs to be verified by the results of
carefully constructed experiments and hopefully also supported by
mathematical analysis.


What you get is a scale error. Consider that you have an amplifier gain 
of 1000 and the injection locking provide a gain of 1, that will result 
in actual gain of 1001 and the gain error on the EFC will become 
1000/1001. Considering that Allan deviation estimation has problem of 
its own, this scale error is not significant. What you do need to check 
is that the relationship between intended gain and injection gain is 
sufficiently different. Since oscillator frequency from EFC may not be 
completely correct, we already want calibration of that scale factor 
(K_O) and the gain error due to injection locking would be included into 
that correction factor.


So, sufficiently small amount of injection locking gain will change the 
apparent EFC coefficient K_O [Rad/sV] on which the scale of TPLL 
frequency measurements depends. The fractional frequency observed is


y(t) = 2*pi*f_0 / K_O,eff EFC(t)

Cheers,
Magnus

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-14 Thread Magnus Danielson

Steve,

On 06/14/2010 04:49 AM, Steve Rooke wrote:

On 14 June 2010 10:46, Magnus Danielsonmag...@rubidium.dyndns.org  wrote:


Still puts it in the mid-tau range as a method. The useful range and
precision of a particular implementation of the method will vary.


By putting a GPSDO in the usual place of the DUT and putting the 10811
in place of the reference oscillator it could work well beyond the
1000s point. CAVEAT: this only works for a DUT that has an EFC that is
reasonably linear.


EFC linearity will remain an issue for analog oscillators. The 
oscillator gain will differ depending on offset voltage and temperature.



So if you are just thinking about the TPLL for taking ADEV data from 0.1
to 1000 sec, then you're are missing 90% of the other useful stuff it
can do as good or better than most anything thing else out there, and
all for the same $10 (my cost).


The typical price-tag of a 10811 is in 100-150 USD. I think it is reasonable
to assume that a TPLL weighs in at about 200 USD with all support mixers,
amplifiers, ADCs etc. It's not bad, but if you don't have the parts that's
about what you need to spend at least.


If you really wanted to be a scrooge, you could open the case on one
of those plethera of HP intruments and temporarily borrow that 10811
that is just sitting there. As for something like a ADC, you could
find a DAQ on fleeBay which could do duty here and also be a useful
tool for general purpose use. Heck, you can use your sound card to
digitize the EFC, provided it is DC coupled.


If you don't have the parts, then it will set you back with at least 
that number. If you have the parts, you have already invested in them 
and payed for them that way. You may be lucky to be given the 
oscillator, but honestly you can't rely on that. I just want the cost 
numbers to be more reasonably given. It is still a fairly cheap solution.



BTW, with a couple of minor configuration changes, the TPLL BreadBoard
can be transformed into a LPLL,
so the usefulness of the basic Universal TPLL BB circuit has even more
possibilities.
In fact one could make yet another list of all the additional things it
can do with no added cost,
just by changing a few jumpers and values.
But those things are for later discussions, one windmill at a time.


Measurement of phase noise is what the LPLL is good at, especially when done
in cross-correlation mode. Interferometric setups use the mixers better.
Both these techniques could be used for LPLL and TPLL measures.


Do you have some pointers to these setups please Magnus?


Look at Enrico Rubiolas site where his publications and presentations 
should be inspirational. His focus is on LPLLs. but the methodology of 
cross-correlation and interferometric setup should be as viable in the 
TPLL world.


Cheers,
Magnus


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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-14 Thread Steve Rooke
Thanks Magnus!

On 14 June 2010 20:45, Magnus Danielson mag...@rubidium.dyndns.org wrote:
 Steve,

 On 06/14/2010 04:49 AM, Steve Rooke wrote:

 On 14 June 2010 10:46, Magnus Danielsonmag...@rubidium.dyndns.org
  wrote:

 Still puts it in the mid-tau range as a method. The useful range and
 precision of a particular implementation of the method will vary.

 By putting a GPSDO in the usual place of the DUT and putting the 10811
 in place of the reference oscillator it could work well beyond the
 1000s point. CAVEAT: this only works for a DUT that has an EFC that is
 reasonably linear.

 EFC linearity will remain an issue for analog oscillators. The oscillator
 gain will differ depending on offset voltage and temperature.

 So if you are just thinking about the TPLL for taking ADEV data from 0.1
 to 1000 sec, then you're are missing 90% of the other useful stuff it
 can do as good or better than most anything thing else out there, and
 all for the same $10 (my cost).

 The typical price-tag of a 10811 is in 100-150 USD. I think it is
 reasonable
 to assume that a TPLL weighs in at about 200 USD with all support mixers,
 amplifiers, ADCs etc. It's not bad, but if you don't have the parts
 that's
 about what you need to spend at least.

 If you really wanted to be a scrooge, you could open the case on one
 of those plethera of HP intruments and temporarily borrow that 10811
 that is just sitting there. As for something like a ADC, you could
 find a DAQ on fleeBay which could do duty here and also be a useful
 tool for general purpose use. Heck, you can use your sound card to
 digitize the EFC, provided it is DC coupled.

 If you don't have the parts, then it will set you back with at least that
 number. If you have the parts, you have already invested in them and payed
 for them that way. You may be lucky to be given the oscillator, but honestly
 you can't rely on that. I just want the cost numbers to be more reasonably
 given. It is still a fairly cheap solution.

 BTW, with a couple of minor configuration changes, the TPLL BreadBoard
 can be transformed into a LPLL,
 so the usefulness of the basic Universal TPLL BB circuit has even more
 possibilities.
 In fact one could make yet another list of all the additional things it
 can do with no added cost,
 just by changing a few jumpers and values.
 But those things are for later discussions, one windmill at a time.

 Measurement of phase noise is what the LPLL is good at, especially when
 done
 in cross-correlation mode. Interferometric setups use the mixers better.
 Both these techniques could be used for LPLL and TPLL measures.

 Do you have some pointers to these setups please Magnus?

 Look at Enrico Rubiolas site where his publications and presentations should
 be inspirational. His focus is on LPLLs. but the methodology of
 cross-correlation and interferometric setup should be as viable in the TPLL
 world.

 Cheers,
 Magnus


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-- 
Steve Rooke - ZL3TUV  G8KVD
The only reason for time is so that everything doesn't happen at once.
- Einstein

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-14 Thread WarrenS
Long explanations, cause I try to explain, the best I can, when I say 
something is WRONG or misleading


Magnus Posted:

EFC linearity will remain an issue for analog oscillators.
The oscillator gain will differ depending on offset voltage and 
temperature.


TRUE it is an issue, but somewhat misleading because it need NOT be a 
problem or limitation (mostly)
EFC Linearity can be an issue because the TPLL is limited by the 
performance of the reference oscillator in lots of ways.

BUT
Oscillator EFC gain or linearity are not likely to be of much concern or a 
limitation for high end performance.


The gain nonlinearity I've measured can vary two to one over the full range 
of a good Oscillator but it is more like 10% over the normally used range, 
if one stays well away from the end points.

NOT so good but livable if you are not making something real accurate.
BUT
For all my accurate stuff, when using a HP 10811, I limit the full-scale 
change to 1e-9 or 1e-8 at most.
This uses such a small part of the total EFC range, that the nonlinearity 
effects are generally below the noise level and of little concern at all.


The fact that Oscillator gain does differ with the EFC voltage (offset 
voltage), means if you want to get max accuracy out of the TPLL, it will 
need to be calibrated at the EFC offset voltage it is being used at.  One 
simple solution, if the OSC also has a independent manual Freq adjustment 
like the single oven 10811, is to use it always set the EFC voltage to be 
near zero volts.
BTW calibration need not be much of a problem, because it can be a static 
calibration. What I use for a finial calibration  check is the 2G turn 
over, which I measure very accurately by other means before hand and then 
use that as a known freq offset to check operation and calibration. Of 
course there are any number of other ways.


As far as temperature having ANY effect on EFC gain, that is a total NON 
issue.
If temperature had any effect on EFC Gain then Temperature would also effect 
Osc Frequency at a fixed EFC voltage,

which would then effect the OSC freq drift and stability,
that would then effect anything that the Osc was used for, NOT just the 
TPLL.

The TPLL actually has a slight advantage over other methods,
because the PLL will adjust the freq to be correct, even if the EFC effect 
should change.





I think it is reasonable to assume that a TPLL weighs in at about
200 USD with all support mixers, amplifiers, ADCs etc.  if you don't have 
the parts

It is still a fairly cheap solution.


Yes I think that is ONE reasonable number to use and a fair conclusion.
BUT there are others.
The EBAY cost of the TPLL can be easy under $10, not including the reference 
Osc and the ADC.


Do note, NONE of items above are plural, Only one is needed per system 
unlike some other methods.
Because the cost of the Ref Osc is so variable and depends so much on what 
one is doing, I have noticed that its cost is generally not included in the 
base price. I think even on the $20K+  TSC 5120A that the reference Osc is 
an extra cost option.


The ADC is another BIG variable, depending on your needs and skill level and 
junk box, almost no limit in cost at the high end,
and can be as low as $0.00 dollars if you are a student doing a science 
project.
It can also be as low as $1.00 if one is good at programming PICS or other 
micros with built in ADC's.


The only other major part in the TPLL with any cost over $1 is the Phase 
detector.
The one I use most is a micro-circuits $15 single price device, but I've 
used all sorts of dual balanced mixers,
and if one is real cheap and good at design, I have found that a PD based on 
a 50 cent XOR gate works fine.


ws

*


On 14 June 2010 10:46, Magnus Danielson Posted:



Steve

Still puts it in the mid-tau range as a method. The useful range and
precision of a particular implementation of the method will vary.


By putting a GPSDO in the usual place of the DUT and putting the 10811
in place of the reference oscillator it could work well beyond the
1000s point. CAVEAT: this only works for a DUT that has an EFC that is
reasonably linear.


EFC linearity will remain an issue for analog oscillators. The
oscillator gain will differ depending on offset voltage and temperature.


So if you are just thinking about the TPLL for taking ADEV data from 0.1
to 1000 sec, then you're are missing 90% of the other useful stuff it
can do as good or better than most anything thing else out there, and
all for the same $10 (my cost).


The typical price-tag of a 10811 is in 100-150 USD. I think it is 
reasonable

to assume that a TPLL weighs in at about 200 USD with all support mixers,
amplifiers, ADCs etc. It's not bad, but if you don't have the parts 
that's

about what you need to spend at least.


If you really wanted to be a scrooge, you could open the case on one
of those plethera of HP intruments and temporarily borrow that 10811
that is just sitting there. 

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-14 Thread WarrenS

Steve posted


Add smilies as you see fit.
But can it make a decent cup of char?
Can you add a cup-holder, those are essential these days.
So does it grind wheat to make flower then; by golly, this thing is 
versatile.


Funny or sarcastic, depending where one puts the smilies, but I would not 
yet count anything out. :-)
A major limitation for me with the simple TPLL has been it only test things 
that are very close in freq to it's reference Frequency, which I mistakenly 
considered was the same as it's controlled Ref oscillator .


Necessity can be the mother of innovation
I recently had a need to test an off freq Osc that was not within range of 
the 10811 Osc I normally use with my TPLL.

Simple solution turned out to be.
Use the TPLL's  controlled 10811 as the reference for my freq synthesizer 
and use the fully adjustable synthesizer output as the reference freq of the 
TPLL.  After a couple of minor changes in level and Bandwidth, I now have a 
full frequency range TPLL tester.
OF course the performance is still limited by the quality and B/W of the 
TPLL's reference signal which now must include any synthesizer limitations, 
BUT being limited to a single fixed frequency is no longer one of the 
limitations.


IN fact it is now obvious to me that ANY reference freq can be used with the 
simple TPLL, as long as it is derived in some way from a EFC controlled OSC. 
The controlled oscillator freq can be divided, multiplied, mixed up or down 
or used with a synthesizer, same as any PLL, and this opens up a whole new 
range of uses for the TPLL. (and a new set of trade offs)
No longer a $10 solution, but then a had an eBay synthesizer setting around 
already, so it did not add any extra cost for me.


ws

**


[time-nuts] Advantages  Disadvantages of the TPLL Method
Steve Rooke sar10538 at gmail.com
Mon Jun 14 02:37:32 UTC 2010

Warren,

Penny dropped!

On 14 June 2010 05:29, WarrenS warrensjmail-one at yahoo.com wrote:

Magnus Posted


The TPLL is a mid-tau stability test, since it's sweet-spot is in the
0,1 - 1000 s range. Short-term is better handled in LPLL phase-noise
measurements.


Mostly agree, it is a mid-tau device, but also consider:

The simple TPLL can be used to find the 1ms to 10 ms ADEV as good and 
maybe?

better than ANYthing else.
AND I use it to find the drift and ADEV of my dual oven HP 10811's out to
weeks, so there is no long term limit.
(the trick is to control the DUT and not the Reference when doing long 
term

testing)


Of course, provided that the DUT has an EFC, you can put this in place
of the reference oscillator and put a, say, GPSDO in place of where
the DUT normally goes. This will certainly extend things at long Tau
out as far as you wish. As for short tau, it would be better to
convert the circuit to LPLL.


BUT
I find the TPLL method is useful for MUCH more than just getting ADEV 
data.

As such it's sweet spot extends from below 0.004 ms  (250 Hz)
all the way up to  weeks, when the DUT is the controlled Osc.


Either 0.004 s or 4 ms methinks. You would have to make sure that the
B/W from the mixer out right to the ability to control the reference
oscillator is that wide. This could be verified by breaking off the
EFC and injecting 250Hz into there and seeing if the original feed to
the EFC follows it.


ALSO the simple TPLL is very Good and useful for seeing and measuring the
effects of temperature, line noise, vibration, PS,  load, and just about
everything else that effects the frequency stability of an oscillators 
below

1 KHz or so.


Providing that the reference oscillator is not subjected to those
effects at the same time (isolation).

So if you are just thinking about the TPLL for taking ADEV data from 0.1 
to
1000 sec, then you're are missing 90% of the other useful stuff it can do 
as
good or better than most anything thing else out there, and all for the 
same

$10 (my cost).


If you have some stock items that you can borrow for this job and
not just dedicate it to the TPLL. Still, that is not an unreasonable
assumption for many.


If still in doubt about some of the TPLL's other high end performance
capabilities, try the swinging osc test with ANYthing else and see if you
can match the simple TPLL's performance.

If one would make a list for the non ADEV uses and advantages of the 
simple

TPLL
It would indeed be very long list, and it does not take any fancy write up
to see that, just a bit of open minded thinking.


But can it make a decent cup of char?


BTW, with a couple of minor configuration changes, the TPLL BreadBoard can
be transformed into a LPLL,
so the usefulness of the basic Universal TPLL BB circuit has even more
possibilities.
In fact one could make yet another list of all the additional things it 
can

do with no added cost,


Can you add a cup-holder, those are essential these days.


just by changing a few jumpers and values.
But those things are for later discussions, one windmill at a time.


So 

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-14 Thread Bruce Griffiths

WarrenS wrote:
Long explanations, cause I try to explain, the best I can, when I say 
something is WRONG or misleading


Magnus Posted:

EFC linearity will remain an issue for analog oscillators.
The oscillator gain will differ depending on offset voltage and 
temperature.


TRUE it is an issue, but somewhat misleading because it need NOT be a 
problem or limitation (mostly)
EFC Linearity can be an issue because the TPLL is limited by the 
performance of the reference oscillator in lots of ways.

BUT
Oscillator EFC gain or linearity are not likely to be of much concern 
or a limitation for high end performance.


The gain nonlinearity I've measured can vary two to one over the full 
range of a good Oscillator but it is more like 10% over the normally 
used range, if one stays well away from the end points.

NOT so good but livable if you are not making something real accurate.
BUT
For all my accurate stuff, when using a HP 10811, I limit the 
full-scale change to 1e-9 or 1e-8 at most.
This uses such a small part of the total EFC range, that the 
nonlinearity effects are generally below the noise level and of little 
concern at all.


The fact that Oscillator gain does differ with the EFC voltage (offset 
voltage), means if you want to get max accuracy out of the TPLL, it 
will need to be calibrated at the EFC offset voltage it is being used 
at.  One simple solution, if the OSC also has a independent manual 
Freq adjustment like the single oven 10811, is to use it always set 
the EFC voltage to be near zero volts.
BTW calibration need not be much of a problem, because it can be a 
static calibration. 

If and only if injection locking isn't significant.
This needs to be established for each setup.
The simplest way to take the effects of injection locking into account 
is to measure the effective EFC gain with the loop closed.



What I use for a finial calibration  check is the 2G turn over, which 
I measure very accurately by other means before hand and then use that 
as a known freq offset to check operation and calibration. Of course 
there are any number of other ways.


As far as temperature having ANY effect on EFC gain, that is a total 
NON issue.
If temperature had any effect on EFC Gain then Temperature would also 
effect Osc Frequency at a fixed EFC voltage,

which would then effect the OSC freq drift and stability,
that would then effect anything that the Osc was used for, NOT just 
the TPLL.

The TPLL actually has a slight advantage over other methods,
because the PLL will adjust the freq to be correct, even if the EFC 
effect should change.





I think it is reasonable to assume that a TPLL weighs in at about
200 USD with all support mixers, amplifiers, ADCs etc.  if you don't 
have the parts

It is still a fairly cheap solution.


Yes I think that is ONE reasonable number to use and a fair conclusion.
BUT there are others.
The EBAY cost of the TPLL can be easy under $10, not including the 
reference Osc and the ADC.


Do note, NONE of items above are plural, Only one is needed per system 
unlike some other methods.
Because the cost of the Ref Osc is so variable and depends so much on 
what one is doing, I have noticed that its cost is generally not 
included in the base price. I think even on the $20K+  TSC 5120A that 
the reference Osc is an extra cost option.


The ADC is another BIG variable, depending on your needs and skill 
level and junk box, almost no limit in cost at the high end,
and can be as low as $0.00 dollars if you are a student doing a 
science project.
It can also be as low as $1.00 if one is good at programming PICS or 
other micros with built in ADC's.


The only other major part in the TPLL with any cost over $1 is the 
Phase detector.
The one I use most is a micro-circuits $15 single price device, but 
I've used all sorts of dual balanced mixers,
and if one is real cheap and good at design, I have found that a PD 
based on a 50 cent XOR gate works fine.


ws

*



Bruce


On 14 June 2010 10:46, Magnus Danielson Posted:



Steve

Still puts it in the mid-tau range as a method. The useful range and
precision of a particular implementation of the method will vary.


By putting a GPSDO in the usual place of the DUT and putting the 10811
in place of the reference oscillator it could work well beyond the
1000s point. CAVEAT: this only works for a DUT that has an EFC that is
reasonably linear.


EFC linearity will remain an issue for analog oscillators. The
oscillator gain will differ depending on offset voltage and temperature.

So if you are just thinking about the TPLL for taking ADEV data 
from 0.1

to 1000 sec, then you're are missing 90% of the other useful stuff it
can do as good or better than most anything thing else out there, and
all for the same $10 (my cost).


The typical price-tag of a 10811 is in 100-150 USD. I think it is 
reasonable
to assume that a TPLL weighs in at about 200 USD with all support 
mixers,
amplifiers, ADCs etc. 

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-14 Thread WarrenS

Bruce posted

If and only if injection locking isn't significant.


No problem then, because it is not significant.
Can place this one under the 'ADVANTAGE' side.

I have tested this thoroughly in many ways.
I do understand the concerns and doubts, especially with an unbuffered HP 
10811 as the reference.

The 10811s are pretty sensitive to injection locking and phase pulling.
Unlike most other methods, one of the many unique properties that the TPLL 
method has is that injection locking is normally not a problem with it.

I find it is generally unnecessary to buffer either the Ref Osc or the DUT.
This is one of the many features that helps make the simple TPLL so simple.
(also it does not hurt or change anything to add a proper buffer)
The lack of injection locking is one of the advantages that contributes to 
its exceptional and unbelievable performance.


I did not leave the buffers out of the simple TPLL BB that was tested 
because of my lack of knowledge, but because of my extra knowledge on the 
subject that showed that they were unnecessary.
More than once, I have tried to explain the reason why injection locking is 
not a problem with my version of the TPLL method, but until one proves it 
for their self, more words from me will not help.
I do understand the skepticism and doubt, and I know why it is so hard to 
believe this for those that have not worked with is this type of method 
before.
I guess someone should write one of those fancy math papers, if it has not 
already been done, that explains it in more convincing terms than I've been 
able to.
It is hard for me to believe that paper has not already been written, But 
then it is hard for me to believe that the TPLL is not used more often. 
There are plenty of places that one of the TPLL methods well give the best 
overall solution.


ws

***

[time-nuts] Advantages  Disadvantages of the TPLL Method
Bruce Griffiths bruce.griffiths at xtra.co.nz

WarrenS wrote:

Long explanations, cause I try to explain, the best I can, when I say
something is WRONG or misleading

Magnus Posted:

EFC linearity will remain an issue for analog oscillators.
The oscillator gain will differ depending on offset voltage and
temperature.


TRUE it is an issue, but somewhat misleading because it need NOT be a
problem or limitation (mostly)
EFC Linearity can be an issue because the TPLL is limited by the
performance of the reference oscillator in lots of ways.
BUT
Oscillator EFC gain or linearity are not likely to be of much concern
or a limitation for high end performance.

The gain nonlinearity I've measured can vary two to one over the full
range of a good Oscillator but it is more like 10% over the normally
used range, if one stays well away from the end points.
NOT so good but livable if you are not making something real accurate.
BUT
For all my accurate stuff, when using a HP 10811, I limit the
full-scale change to 1e-9 or 1e-8 at most.
This uses such a small part of the total EFC range, that the
nonlinearity effects are generally below the noise level and of little
concern at all.

The fact that Oscillator gain does differ with the EFC voltage (offset
voltage), means if you want to get max accuracy out of the TPLL, it
will need to be calibrated at the EFC offset voltage it is being used
at.  One simple solution, if the OSC also has a independent manual
Freq adjustment like the single oven 10811, is to use it always set
the EFC voltage to be near zero volts.
BTW calibration need not be much of a problem, because it can be a
static calibration.

If and only if injection locking isn't significant.
This needs to be established for each setup.
The simplest way to take the effects of injection locking into account
is to measure the effective EFC gain with the loop closed.



What I use for a finial calibration  check is the 2G turn over, which
I measure very accurately by other means before hand and then use that
as a known freq offset to check operation and calibration. Of course
there are any number of other ways.

As far as temperature having ANY effect on EFC gain, that is a total
NON issue.
If temperature had any effect on EFC Gain then Temperature would also
effect Osc Frequency at a fixed EFC voltage,
which would then effect the OSC freq drift and stability,
that would then effect anything that the Osc was used for, NOT just
the TPLL.
The TPLL actually has a slight advantage over other methods,
because the PLL will adjust the freq to be correct, even if the EFC
effect should change.




I think it is reasonable to assume that a TPLL weighs in at about
200 USD with all support mixers, amplifiers, ADCs etc.  if you don't
have the parts

It is still a fairly cheap solution.


Yes I think that is ONE reasonable number to use and a fair conclusion.
BUT there are others.
The EBAY cost of the TPLL can be easy under $10, not including the
reference Osc and the ADC.

Do note, NONE of items above are plural, Only one is needed per system
unlike 

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-14 Thread Magnus Danielson

On 06/14/2010 06:13 PM, WarrenS wrote:

Long explanations, cause I try to explain, the best I can, when I say
something is WRONG or misleading

Magnus Posted:

EFC linearity will remain an issue for analog oscillators.
The oscillator gain will differ depending on offset voltage and
temperature.


TRUE it is an issue, but somewhat misleading because it need NOT be a
problem or limitation (mostly)
EFC Linearity can be an issue because the TPLL is limited by the
performance of the reference oscillator in lots of ways.
BUT
Oscillator EFC gain or linearity are not likely to be of much concern or
a limitation for high end performance.

The gain nonlinearity I've measured can vary two to one over the full
range of a good Oscillator but it is more like 10% over the normally
used range, if one stays well away from the end points.
NOT so good but livable if you are not making something real accurate.
BUT
For all my accurate stuff, when using a HP 10811, I limit the full-scale
change to 1e-9 or 1e-8 at most.
This uses such a small part of the total EFC range, that the
nonlinearity effects are generally below the noise level and of little
concern at all.

The fact that Oscillator gain does differ with the EFC voltage (offset
voltage), means if you want to get max accuracy out of the TPLL, it will
need to be calibrated at the EFC offset voltage it is being used at. One
simple solution, if the OSC also has a independent manual Freq
adjustment like the single oven 10811, is to use it always set the EFC
voltage to be near zero volts.
BTW calibration need not be much of a problem, because it can be a
static calibration. What I use for a finial calibration  check is the
2G turn over, which I measure very accurately by other means before hand
and then use that as a known freq offset to check operation and
calibration. Of course there are any number of other ways.


The main point I am trying to make is that it may not be useful to read 
the number of the data-sheet, but calibration methods should be 
performed. Should not be particularly hard to do, but if you do not make 
provisions for it, it will become a scaling error issue.


Hand-trimming the coarse offset should be done if far away.


As far as temperature having ANY effect on EFC gain, that is a total NON
issue.
If temperature had any effect on EFC Gain then Temperature would also
effect Osc Frequency at a fixed EFC voltage,
which would then effect the OSC freq drift and stability,
that would then effect anything that the Osc was used for, NOT just the
TPLL.
The TPLL actually has a slight advantage over other methods,
because the PLL will adjust the freq to be correct, even if the EFC
effect should change.


Yes, but since we derive our measurements from that EFC our sampled data 
will change so it will creep into the sample-series. Hand-calibrating 
towards zero EFC and let it stabilize should work well enough. 
Identifying potential problems is the first step to finding ways to 
avoid or compensate for them.



I think it is reasonable to assume that a TPLL weighs in at about
200 USD with all support mixers, amplifiers, ADCs etc. if you don't
have the parts

It is still a fairly cheap solution.


Yes I think that is ONE reasonable number to use and a fair conclusion.
BUT there are others.
The EBAY cost of the TPLL can be easy under $10, not including the
reference Osc and the ADC.


The point I was trying to make that the total cost was more around 200 
USD including ref oscillator and ADC.



Do note, NONE of items above are plural, Only one is needed per system
unlike some other methods.
Because the cost of the Ref Osc is so variable and depends so much on
what one is doing, I have noticed that its cost is generally not
included in the base price. I think even on the $20K+ TSC 5120A that the
reference Osc is an extra cost option.


The reference oscillator plays a different role in that system.


The ADC is another BIG variable, depending on your needs and skill level
and junk box, almost no limit in cost at the high end,
and can be as low as $0.00 dollars if you are a student doing a science
project.
It can also be as low as $1.00 if one is good at programming PICS or
other micros with built in ADC's.


Indeed. Cheap audio-boards could be hacked up.


The only other major part in the TPLL with any cost over $1 is the Phase
detector.
The one I use most is a micro-circuits $15 single price device, but I've
used all sorts of dual balanced mixers,
and if one is real cheap and good at design, I have found that a PD
based on a 50 cent XOR gate works fine.


You may get very low on some of these, but what I was aiming for was a 
more average price for the average builder. You are usually not all that 
lucky when you want to. Also, recall that packaging and transport adds 
on top of that, including import taxes and VAT... which I did not included.


Your milage may vary a lot. I just 200 USD is a more realistic value. It 
doesn't make it less valuable as a tool, I am 

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-14 Thread WarrenS

Magnus posted:

The main point I am trying to make is that it may not be useful to read the 
number of the data-sheet,

One of my short comings, I never even considered one would do that.
I guess it would be possible if one only needed say 50% accuracy for small 
differences.

Right it needs to be calibrated, It's analog.


Hand-trimming the coarse offset should be done if far away.

Yes, the TPLL BB has provisions for
course manual offset,  med H/W offset  and Software offset
Can put that one under the disadvantage list also.
It is not like Digital, One has to understand the differences and when to 
use which offset.



Yes, but since we derive our measurements from that EFC our
sampled data will change so it will creep into the sample-series.
What I find effective is to recheck the TPLL reference by exchanging the DUT 
with a known freq every day or so (with my reference), or can be done as 
much as one needs ( 100 sec, hr etc) as long as it is properly taken into 
account.
It takes only a second or so to place a full accuracy calibration marker on 
the plot or the data log,
that takes into account all drifts including the TPLL ref osc, based on a 
separate fixed reference freq that can be CS or anything.



You may get very low on some of these, but what I was aiming
for was a more average price for the average builder.
The point I was trying to make that the total cost was
more around 200 USD including ref oscillator and ADC.
I just think 200 USD is a more realistic cost (value).

No disagreement,
My point which is different than yours, is it all depends on how much effort 
 design time one wants to put into it.
Total parts cost can be kept under $10 in small production runs (even 
without eBay) including all but the Reference OSC.
For the reference OSC there is all kinds of lower and higher cost devices 
that would be suitable for some.



We seem to agree on all the major points so far.
Hard to have much of a discussion when two agree.

So time to bring up something that we may NOT agree on.
Bandwidth and the bandwidth filter freq used with the TPLL has little effect 
as long as its freq is  than about 2x tau0 freq,
Unlike most other Phase methods, where the optimal Bandwidth is tau0 or 1/2 
trau0.
Before some go ballistic over the comment, consider what the effect of the 
Tau0 integration is on the oversampled TPLL Frequency data.


Example:  because most are confused by my mixed use of freq, time constant, 
tau0  and BW

Tau0 = 0.1 sec, 100 ms, 10 sample per second  (all the same)
Phase methods need an optimal Bandwidth of  5Hz, or 10 Hz or 100ms or ... 
depending on which paper you read.

The optimal wsTPLL method BW for tau0 = 20 Hz
(greater BW does not change the ADEV results, like it does with Phase).
and the TPLL optimal BW for tau0 of 1 sec is = than 2 Hz
and the optimal BW for TPLL of tau0 of 10ms is = than 200 Hz

Note that BIG difference is, unlike Phase methods, a single filter freq can 
be selected that works for all TPLL tau0

It does not have to be changed for each tau0
(in the above example the H/W BW filter should be  = than 200 Hz for any 
tau0 =10ms)


AND I'm suggesting that goes at the top of the advantages list, right above 
simple.
Now I expect that will restart the name calling from some before they even 
think.


ws

**

[time-nuts] Advantages  Disadvantages of the TPLL Method
Magnus Danielson magnus at rubidium.dyndns.org
Mon Jun 14 22:25:11 UTC 2010

On 06/14/2010 06:13 PM, WarrenS wrote:

Long explanations, cause I try to explain, the best I can, when I say
something is WRONG or misleading

Magnus Posted:

EFC linearity will remain an issue for analog oscillators.
The oscillator gain will differ depending on offset voltage and
temperature.


TRUE it is an issue, but somewhat misleading because it need NOT be a
problem or limitation (mostly)
EFC Linearity can be an issue because the TPLL is limited by the
performance of the reference oscillator in lots of ways.
BUT
Oscillator EFC gain or linearity are not likely to be of much concern or
a limitation for high end performance.

The gain nonlinearity I've measured can vary two to one over the full
range of a good Oscillator but it is more like 10% over the normally
used range, if one stays well away from the end points.
NOT so good but livable if you are not making something real accurate.
BUT
For all my accurate stuff, when using a HP 10811, I limit the full-scale
change to 1e-9 or 1e-8 at most.
This uses such a small part of the total EFC range, that the
nonlinearity effects are generally below the noise level and of little
concern at all.

The fact that Oscillator gain does differ with the EFC voltage (offset
voltage), means if you want to get max accuracy out of the TPLL, it will
need to be calibrated at the EFC offset voltage it is being used at. One
simple solution, if the OSC also has a independent manual Freq
adjustment like the single oven 10811, is to use it always set the EFC
voltage to be near 

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-14 Thread Bruce Griffiths

WarrenS wrote:

Bruce posted

If and only if injection locking isn't significant.


No problem then, because it is not significant.

For each and every oscillator pair someone may try?

Can place this one under the 'ADVANTAGE' side.


That's descending into the murky realms of pseudoscience.
At best you've only shown this to be true for the particular oscillator 
pair being compared.
Not only must the effect of injection locking be insignificant for the 
reference, it has to be insignificant for the test oscillator as well.
If injection locking is an issue the efc gain with the loop open will 
differ from the efc gain with the loop closed.



I have tested this thoroughly in many ways.
I do understand the concerns and doubts, especially with an unbuffered 
HP 10811 as the reference.

The 10811s are pretty sensitive to injection locking and phase pulling.
Unlike most other methods, one of the many unique properties that the 
TPLL method has is that injection locking is normally not a problem 
with it.

It will change the loop parameters in particular the efc gain.
Its just a matter of how much it affects the efc gain.
I find it is generally unnecessary to buffer either the Ref Osc or the 
DUT.
This is one of the many features that helps make the simple TPLL so 
simple.

(also it does not hurt or change anything to add a proper buffer)
The lack of injection locking is one of the advantages that 
contributes to its exceptional and unbelievable performance.


But Adler's equation indicates that an oscillator is much more to 
susceptible to injection effects when the injected signal frequency is 
very close to the oscillator frequency.


I did not leave the buffers out of the simple TPLL BB that was tested 
because of my lack of knowledge, but because of my extra knowledge 
on the subject that showed that they were unnecessary.
More than once, I have tried to explain the reason why injection 
locking is not a problem with my version of the TPLL method, but until 
one proves it for their self, more words from me will not help.
I do understand the skepticism and doubt, and I know why it is so hard 
to believe this for those that have not worked with is this type of 
method before.
I guess someone should write one of those fancy math papers, if it has 
not already been done, that explains it in more convincing terms than 
I've been able to.
It is hard for me to believe that paper has not already been written, 
But then it is hard for me to believe that the TPLL is not used more 
often. There are plenty of places that one of the TPLL methods well 
give the best overall solution.


ws

***


Bruce

[time-nuts] Advantages  Disadvantages of the TPLL Method
Bruce Griffiths bruce.griffiths at xtra.co.nz

WarrenS wrote:

Long explanations, cause I try to explain, the best I can, when I say
something is WRONG or misleading

Magnus Posted:

EFC linearity will remain an issue for analog oscillators.
The oscillator gain will differ depending on offset voltage and
temperature.


TRUE it is an issue, but somewhat misleading because it need NOT be a
problem or limitation (mostly)
EFC Linearity can be an issue because the TPLL is limited by the
performance of the reference oscillator in lots of ways.
BUT
Oscillator EFC gain or linearity are not likely to be of much concern
or a limitation for high end performance.

The gain nonlinearity I've measured can vary two to one over the full
range of a good Oscillator but it is more like 10% over the normally
used range, if one stays well away from the end points.
NOT so good but livable if you are not making something real accurate.
BUT
For all my accurate stuff, when using a HP 10811, I limit the
full-scale change to 1e-9 or 1e-8 at most.
This uses such a small part of the total EFC range, that the
nonlinearity effects are generally below the noise level and of little
concern at all.

The fact that Oscillator gain does differ with the EFC voltage (offset
voltage), means if you want to get max accuracy out of the TPLL, it
will need to be calibrated at the EFC offset voltage it is being used
at.  One simple solution, if the OSC also has a independent manual
Freq adjustment like the single oven 10811, is to use it always set
the EFC voltage to be near zero volts.
BTW calibration need not be much of a problem, because it can be a
static calibration.

If and only if injection locking isn't significant.
This needs to be established for each setup.
The simplest way to take the effects of injection locking into account
is to measure the effective EFC gain with the loop closed.



What I use for a finial calibration  check is the 2G turn over, which
I measure very accurately by other means before hand and then use that
as a known freq offset to check operation and calibration. Of course
there are any number of other ways.

As far as temperature having ANY effect on EFC gain, that is a total
NON issue.
If temperature had any effect on EFC Gain then Temperature 

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-13 Thread Tom Van Baak

Here are a couple of really good articles that describe many
methods of phase/frequency measurement, including TPLL.
You'll see some nice advantage/disadvantage lists in several
of these documents, which is why I'm posting the links.

Warren  Bruce, please look at the first five documents at least.
John too. Lots of TPLL info. This is all worth reading. I don't
know why I didn't find some of these papers six months ago.


System Phase Noise Calculation and Measurement Techniques
http://www.mpdigest.com/issue/Articles/2009/sept/spectrum/Default.asp
-- short article, nice summary.

PN9000 Automated Phase Noise Measurement System Application Note #1
http://www.aeroflex.com/ats/products/prodfiles/appnotes/12/app1.pdf
-- see section 2; TPLL is section 2.2.

Oscillator Phase Noise Measurements using the Phase Lock Method
http://ravoltek.net/dippa/dippa_rajala_olli.pdf
-- TPLL, equations, graphs, error analysis, photos, schematics, parts list.

An investigation into the phase noise of quartz crystal oscillators
http://etd.sun.ac.za/bitstream/10019/337/1/BentleyB.pdf
-- see chapter 4 or at least section 4.3; TPLL is 4.3.3.2.

PN9000 Automated Phase Noise Measurement System Application Note #2
http://smartdata.usbid.com/datasheets/usbid/2000/2000-q4/app2.pdf
http://www.datasheetarchive.com/pdf/Datasheet-010/DSA00173368.pdf
-- theory of operation, TPLL


A General Theory of Phase Noise in Electrical Oscillators
http://www.chic.caltech.edu/Publications/general_full.PDF
-- too deep for me.

Phase Noise Measurement. Using the Phase Lock Technique
http://www.chem.duke.edu/~boris/datasheets/AN1639_phase_noise.pdf
http://www.lansdale.com/Articles/an1639.pdf
-- might be applicable.

Correlation-based phase noise measurements
http://www.femto-st.fr/~rubiola/pdf-others/correl-report.pdf 
-- for John Miles


Practical Problems Involving Phase Noise Measurements
http://tycho.usno.navy.mil/ptti/ptti2001/paper42.pdf
--  also for John.

/tvb

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-13 Thread Magnus Danielson

Warren,

On 06/13/2010 05:45 AM, WarrenS wrote:


Thanks for the positive contrbution, A good example of one of the TPLL's
obvious disadvantages.
The simple cheap analog version of the TPLL is limited by it's need to
have a dedicated Ref OSC.

One way I have got around that problem, which would not apply to all, is
to put the DUT unit as the controlled OSC, and use a special Tbolt as
the reference Oscillator.
The other way around the problem is the Digital version of the TPLL that
uses DSS.


I think one should best break the TPLL into three different cases, as 
they have different characteristics.



BTW that limitation is not nearly as big as one would think. This is
because the long term accuracy is already limited by the reference osc,
so one would not generally use this kind of system out past 1000 sec or
so anyway. So If doing long term multichannel Osc, One would likely be
MUCH better off with a more basic undersampled Phase system for long
term testing and just go thru and cheek each Osc one at time for a short
time with a low tau tester such as this type.


The TPLL is a mid-tau stability test, since it's sweet-spot is in the 
0,1 - 1000 s range. Short-term is better handled in LPLL phase-noise 
measurements.



Keep the advantages and disadvantages coming in, so the Time Nuts can
compare which methods work best for their application.
Now if we just had some place to log the responses.


Could be arranged. Best way would naturally be to whip up a draft 
article providing a survey. It may be useful to break up detailed 
analysis in separate articles. There is many details in this.



Summery: If you have multi oscillators to test simultaneously that do
not have EFC input, and that you want to do continuous sampling on, and
do not have multiple TSC boxes, the TPLL is not the right tool for the job.


Agreed... for large N.


Be better off with one simple lower resolution multiplexed time stamped
TI phase system and a single TPLL.


Actually that might not be what you want, the articles Bruce referred to 
points out some interesting problems which also needs to be understood 
as one progresses down that path.


For me, finding those articles was a good side-consequence of this 
discussion.



Bruce posted:

The poor cost scaling of the tight PLL system is another reason
why it has fallen out of favour for those who have more than
2 frequency standards to compare simultaneously.


Thanks for that opinion, but I don't think we should list the above as a
unique disadvantage.
Maybe need a new column heading for that one, Any name suggestions?


It's a conditioned disadvantage, but still a disadvantage. Doesn't apply 
for 1 or 2 channel systems.



Does not sound all that valid or unique of a reason to me.
It seems the same can be said about a TSC or any new high cost system.


Indeed. This is the N channel condition. The DTMT system proved much 
cheaper for many-channel setups. Infact, the many-channel setup 
situation has very few solutions even today when looking at commercial 
boxes.



I would think a more important reason is that the simple TPLL is not a
universal do all system.
Because the simple analog version is Limited by it's reference Osc in
many ways,
This does give it some possible major disadvantages like not working so
good with a CS or Rb standard.
If one has more time than money, there are ways around that.


Sure is. The TPLL method does not fit all needs. It's fine, we just need 
to quantify properly what needs it fits. The N-channel case is a 
limitation which may or may not apply to a particular case.


For most hobbyists and many commercial usages, the N-channel case is not 
a serious limit.


It could also be argued that for small N (say 8) the cost would still 
not be prohibiting. Personally I lack mixers and such to setup an 
8-channel system, as I already have more than 8 10811 and an 8-channel 
ADC system suitable for the task. Oh, I still count myself as a hobbyist.


Cheers,
Magnus

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-13 Thread John Miles


 Correlation-based phase noise measurements
 http://www.femto-st.fr/~rubiola/pdf-others/correl-report.pdf
 -- for John Miles

 Practical Problems Involving Phase Noise Measurements
 http://tycho.usno.navy.mil/ptti/ptti2001/paper42.pdf
 --  also for John.

I've got these in my collection, but it never hurts to go back over them.
Both these papers, of course, end their exploration of averaged correlation
by saying and here a dynamic signal analyzer is typically used. :-P

It turns out that the common OCXO I was using has a higher PN floor than I
thought (about -154 dBc/Hz) so I'll probably switch to independent OCXOs
before delving into this too much further.

-- john, KE5FX


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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-13 Thread Magnus Danielson

John,

On 06/13/2010 10:00 AM, John Miles wrote:




Correlation-based phase noise measurements
http://www.femto-st.fr/~rubiola/pdf-others/correl-report.pdf
-- for John Miles

Practical Problems Involving Phase Noise Measurements
http://tycho.usno.navy.mil/ptti/ptti2001/paper42.pdf
--  also for John.


I've got these in my collection, but it never hurts to go back over them.
Both these papers, of course, end their exploration of averaged correlation
by saying and here a dynamic signal analyzer is typically used. :-P


Which is how they say problem solved by somebody else.


It turns out that the common OCXO I was using has a higher PN floor than I
thought (about -154 dBc/Hz) so I'll probably switch to independent OCXOs
before delving into this too much further.


You where kind of measuring the noise floor of your setup.

Cheers,
Magnus

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-13 Thread Didier Juges
Tom,

I took the liberty of converting your post into an entry in my Time-Nuts
Wiki:
http://www.ko4bb.com/dokuwiki/doku.php?id=precision_timing:phase_frequency_m
easurement_methods

Please note anyone can edit this Wiki or create new pages.

Didier 

 -Original Message-
 From: time-nuts-boun...@febo.com 
 [mailto:time-nuts-boun...@febo.com] On Behalf Of Tom Van Baak
 Sent: Sunday, June 13, 2010 1:35 AM
 To: Discussion of precise time and frequency measurement
 Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method
 
 Here are a couple of really good articles that describe many 
 methods of phase/frequency measurement, including TPLL.
 You'll see some nice advantage/disadvantage lists in 
 several of these documents, which is why I'm posting the links.
 
 Warren  Bruce, please look at the first five documents at least.
 John too. Lots of TPLL info. This is all worth reading. I 
 don't know why I didn't find some of these papers six months ago.
 
 
 System Phase Noise Calculation and Measurement Techniques 
 http://www.mpdigest.com/issue/Articles/2009/sept/spectrum/Default.asp
 -- short article, nice summary.
 
 PN9000 Automated Phase Noise Measurement System Application 
 Note #1 
 http://www.aeroflex.com/ats/products/prodfiles/appnotes/12/app1.pdf
 -- see section 2; TPLL is section 2.2.
 
 Oscillator Phase Noise Measurements using the Phase Lock 
 Method http://ravoltek.net/dippa/dippa_rajala_olli.pdf
 -- TPLL, equations, graphs, error analysis, photos, 
 schematics, parts list.
 
 An investigation into the phase noise of quartz crystal 
 oscillators http://etd.sun.ac.za/bitstream/10019/337/1/BentleyB.pdf
 -- see chapter 4 or at least section 4.3; TPLL is 4.3.3.2.
 
 PN9000 Automated Phase Noise Measurement System Application 
 Note #2 
 http://smartdata.usbid.com/datasheets/usbid/2000/2000-q4/app2.pdf
 http://www.datasheetarchive.com/pdf/Datasheet-010/DSA00173368.pdf
 -- theory of operation, TPLL
 
 
 A General Theory of Phase Noise in Electrical Oscillators 
 http://www.chic.caltech.edu/Publications/general_full.PDF
 -- too deep for me.
 
 Phase Noise Measurement. Using the Phase Lock Technique 
 http://www.chem.duke.edu/~boris/datasheets/AN1639_phase_noise.pdf
 http://www.lansdale.com/Articles/an1639.pdf
 -- might be applicable.
 
 Correlation-based phase noise measurements 
 http://www.femto-st.fr/~rubiola/pdf-others/correl-report.pdf
 -- for John Miles
 
 Practical Problems Involving Phase Noise Measurements 
 http://tycho.usno.navy.mil/ptti/ptti2001/paper42.pdf
 --  also for John.
 
 /tvb
 
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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-13 Thread Steve Rooke
Didier

On 13 June 2010 21:51, Didier Juges did...@cox.net wrote:
 Tom,

 I took the liberty of converting your post into an entry in my Time-Nuts
 Wiki:
 http://www.ko4bb.com/dokuwiki/doku.php?id=precision_timing:phase_frequency_m
 easurement_methods

Just to let you know that your link got busted by a line-wrap
somewhere so it is not clickable and has to be cut and pasted into
place.

But it could be just the World hating me again :)

Cheers,
Steve

 Please note anyone can edit this Wiki or create new pages.

 Didier

 -Original Message-
 From: time-nuts-boun...@febo.com
 [mailto:time-nuts-boun...@febo.com] On Behalf Of Tom Van Baak
 Sent: Sunday, June 13, 2010 1:35 AM
 To: Discussion of precise time and frequency measurement
 Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method

 Here are a couple of really good articles that describe many
 methods of phase/frequency measurement, including TPLL.
 You'll see some nice advantage/disadvantage lists in
 several of these documents, which is why I'm posting the links.

 Warren  Bruce, please look at the first five documents at least.
 John too. Lots of TPLL info. This is all worth reading. I
 don't know why I didn't find some of these papers six months ago.


 System Phase Noise Calculation and Measurement Techniques
 http://www.mpdigest.com/issue/Articles/2009/sept/spectrum/Default.asp
 -- short article, nice summary.

 PN9000 Automated Phase Noise Measurement System Application
 Note #1
 http://www.aeroflex.com/ats/products/prodfiles/appnotes/12/app1.pdf
 -- see section 2; TPLL is section 2.2.

 Oscillator Phase Noise Measurements using the Phase Lock
 Method http://ravoltek.net/dippa/dippa_rajala_olli.pdf
 -- TPLL, equations, graphs, error analysis, photos,
 schematics, parts list.

 An investigation into the phase noise of quartz crystal
 oscillators http://etd.sun.ac.za/bitstream/10019/337/1/BentleyB.pdf
 -- see chapter 4 or at least section 4.3; TPLL is 4.3.3.2.

 PN9000 Automated Phase Noise Measurement System Application
 Note #2
 http://smartdata.usbid.com/datasheets/usbid/2000/2000-q4/app2.pdf
 http://www.datasheetarchive.com/pdf/Datasheet-010/DSA00173368.pdf
 -- theory of operation, TPLL


 A General Theory of Phase Noise in Electrical Oscillators
 http://www.chic.caltech.edu/Publications/general_full.PDF
 -- too deep for me.

 Phase Noise Measurement. Using the Phase Lock Technique
 http://www.chem.duke.edu/~boris/datasheets/AN1639_phase_noise.pdf
 http://www.lansdale.com/Articles/an1639.pdf
 -- might be applicable.

 Correlation-based phase noise measurements
 http://www.femto-st.fr/~rubiola/pdf-others/correl-report.pdf
 -- for John Miles

 Practical Problems Involving Phase Noise Measurements
 http://tycho.usno.navy.mil/ptti/ptti2001/paper42.pdf
 --  also for John.

 /tvb

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-- 
Steve Rooke - ZL3TUV  G8KVD
The only reason for time is so that everything doesn't happen at once.
- Einstein

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-13 Thread Didier Juges
I saw that. There is nothing I can do about it other than by using a url
shortener which I am reluctant to do because of the obfuscation and
potential for abuse.

I assume that by now everyone knows how to deal with these problems, and if
someone does not, now is a good time to brush up...

Didier 

 -Original Message-
 From: time-nuts-boun...@febo.com 
 [mailto:time-nuts-boun...@febo.com] On Behalf Of Steve Rooke
 Sent: Sunday, June 13, 2010 5:17 AM
 To: Discussion of precise time and frequency measurement
 Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method
 
 Didier
 
 On 13 June 2010 21:51, Didier Juges did...@cox.net wrote:
  Tom,
 
  I took the liberty of converting your post into an entry in my 
  Time-Nuts
  Wiki:
  
 http://www.ko4bb.com/dokuwiki/doku.php?id=precision_timing:phase_frequ
  ency_m
  easurement_methods
 
 Just to let you know that your link got busted by a line-wrap 
 somewhere so it is not clickable and has to be cut and pasted 
 into place.
 
 But it could be just the World hating me again :)
 
 Cheers,
 Steve
 
  Please note anyone can edit this Wiki or create new pages.
 
  Didier
 
  -Original Message-
  From: time-nuts-boun...@febo.com
  [mailto:time-nuts-boun...@febo.com] On Behalf Of Tom Van Baak
  Sent: Sunday, June 13, 2010 1:35 AM
  To: Discussion of precise time and frequency measurement
  Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL 
  Method
 
  Here are a couple of really good articles that describe 
 many methods 
  of phase/frequency measurement, including TPLL.
  You'll see some nice advantage/disadvantage lists in several of 
  these documents, which is why I'm posting the links.
 
  Warren  Bruce, please look at the first five documents at least.
  John too. Lots of TPLL info. This is all worth reading. I 
 don't know 
  why I didn't find some of these papers six months ago.
 
 
  System Phase Noise Calculation and Measurement Techniques 
  
 http://www.mpdigest.com/issue/Articles/2009/sept/spectrum/Default.asp
  -- short article, nice summary.
 
  PN9000 Automated Phase Noise Measurement System 
 Application Note #1 
  http://www.aeroflex.com/ats/products/prodfiles/appnotes/12/app1.pdf
  -- see section 2; TPLL is section 2.2.
 
  Oscillator Phase Noise Measurements using the Phase Lock Method 
  http://ravoltek.net/dippa/dippa_rajala_olli.pdf
  -- TPLL, equations, graphs, error analysis, photos, 
 schematics, parts 
  list.
 
  An investigation into the phase noise of quartz crystal 
 oscillators 
  http://etd.sun.ac.za/bitstream/10019/337/1/BentleyB.pdf
  -- see chapter 4 or at least section 4.3; TPLL is 4.3.3.2.
 
  PN9000 Automated Phase Noise Measurement System 
 Application Note #2 
  http://smartdata.usbid.com/datasheets/usbid/2000/2000-q4/app2.pdf
  http://www.datasheetarchive.com/pdf/Datasheet-010/DSA00173368.pdf
  -- theory of operation, TPLL
 
 
  A General Theory of Phase Noise in Electrical Oscillators 
  http://www.chic.caltech.edu/Publications/general_full.PDF
  -- too deep for me.
 
  Phase Noise Measurement. Using the Phase Lock Technique 
  http://www.chem.duke.edu/~boris/datasheets/AN1639_phase_noise.pdf
  http://www.lansdale.com/Articles/an1639.pdf
  -- might be applicable.
 
  Correlation-based phase noise measurements 
  http://www.femto-st.fr/~rubiola/pdf-others/correl-report.pdf
  -- for John Miles
 
  Practical Problems Involving Phase Noise Measurements 
  http://tycho.usno.navy.mil/ptti/ptti2001/paper42.pdf
  --  also for John.
 
  /tvb
 
  ___
  time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to 
  https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
  and follow the instructions there.
 
 
 
  ___
  time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to 
  https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
  and follow the instructions there.
 
 
 
 
 --
 Steve Rooke - ZL3TUV  G8KVD
 The only reason for time is so that everything doesn't happen at once.
 - Einstein
 
 ___
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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-13 Thread Hal Murray
 Just to let you know that your link got busted by a line-wrap 
 somewhere so it is not clickable and has to be cut and pasted 
 into place.

 I saw that. There is nothing I can do about it other than by using a url
 shortener which I am reluctant to do because of the obfuscation and
 potential for abuse. 

One approach is to use a URL shortener but also include the long URL even 
though it will get chopped up and such.  The key idea is that at least some 
of the target audience will be able to decrypt the line wrapping and/or other 
mangling and reconstruct the target URL if the url shortening service goes 
tits-up.

Both bit.ly and tinyurl.com are reasonably on the ball about blocking 
spammers from using their services.  There may be (many?) other anti-spam URL 
shorteners that I don't know about.  (Some of of the shorteners seem to be 
run by spammers.)



-- 
These are my opinions, not necessarily my employer's.  I hate spam.




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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-13 Thread Steve Wiseman
On 13/06/2010, Didier Juges did...@cox.net wrote:
 I saw that. There is nothing I can do about it other than by using a url
 shortener

You can hint to most email clients that you'd like lines unbroken,
using angle brackets
This may work...
http://www.ko4bb.com/dokuwiki/doku.php?id=precision_timing:phase_frequency_measurement_methods

Steve

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-13 Thread Didier Juges
Steve,

This seems to work with your email client sending and Outlook here receiving
(I received that link unbroken), but the same link I just sent was broken,
so it seems Outlook is doing that on the way out, but not on the way in...

I should have known, Microsoft...

Bottom line, no sure way to fix it, therefore the use of brain matter is
recommended...

Didier

 -Original Message-
 From: time-nuts-boun...@febo.com 
 [mailto:time-nuts-boun...@febo.com] On Behalf Of Steve Wiseman
 Sent: Sunday, June 13, 2010 9:57 AM
 To: Discussion of precise time and frequency measurement
 Subject: Re: [time-nuts] Advantages  Disadvantages of the TPLL Method
 
 On 13/06/2010, Didier Juges did...@cox.net wrote:
  I saw that. There is nothing I can do about it other than 
 by using a 
  url shortener
 
 You can hint to most email clients that you'd like lines 
 unbroken, using angle brackets This may work...
 http://www.ko4bb.com/dokuwiki/doku.php?id=precision_timing:ph
ase_frequency_measurement_methods
 
 Steve
 
 ___
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 go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
 and follow the instructions there.
 


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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-13 Thread WarrenS

Magnus Posted


The TPLL is a mid-tau stability test, since it's sweet-spot is in the
0,1 - 1000 s range. Short-term is better handled in LPLL phase-noise
measurements.


Mostly agree, it is a mid-tau device, but also consider:

The simple TPLL can be used to find the 1ms to 10 ms ADEV as good and maybe? 
better than ANYthing else.
AND I use it to find the drift and ADEV of my dual oven HP 10811's out to 
weeks, so there is no long term limit.
(the trick is to control the DUT and not the Reference when doing long term 
testing)

BUT
I find the TPLL method is useful for MUCH more than just getting ADEV data.
As such it's sweet spot extends from below 0.004 ms  (250 Hz)
all the way up to  weeks, when the DUT is the controlled Osc.

ALSO the simple TPLL is very Good and useful for seeing and measuring the 
effects of temperature, line noise, vibration, PS,  load, and just about 
everything else that effects the frequency stability of an oscillators below 
1 KHz or so.
So if you are just thinking about the TPLL for taking ADEV data from 0.1 to 
1000 sec, then you're are missing 90% of the other useful stuff it can do as 
good or better than most anything thing else out there, and all for the same 
$10 (my cost).


If still in doubt about some of the TPLL's other high end performance 
capabilities, try the swinging osc test with ANYthing else and see if you 
can match the simple TPLL's performance.


If one would make a list for the non ADEV uses and advantages of the simple 
TPLL
It would indeed be very long list, and it does not take any fancy write up 
to see that, just a bit of open minded thinking.



BTW, with a couple of minor configuration changes, the TPLL BreadBoard can 
be transformed into a LPLL,
so the usefulness of the basic Universal TPLL BB circuit has even more 
possibilities.
In fact one could make yet another list of all the additional things it can 
do with no added cost,

just by changing a few jumpers and values.
But those things are for later discussions, one windmill at a time.

ws


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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-13 Thread WarrenS


I went quickly thru Tom's reference list and was unable to fine anything 
that had much if anything to do directly with the NIST, the NBS, or the 
slightly modified ws TPLL method.
All of those papers seem to be about how to measure Phase noise, NOT 
frequency stability, and from what I was able to find, the measurements they 
were making were not taken from the EFC line put from the mixer/PhaseDector 
output. Big Difference, makes that more like a LPLL type method.


As far as the list of disadvantages that I could find, the one under what 
Tom said was a good TPLL example, said:
 The phase lock loop must be very precisely controlled, since it effects 
measurement results is clearly not what NBS or I'm doing.
Neither does the schematic in another paper have anything to do with the 
simple TPLL method.


Lots of good and useful stuff there, Just nothing (I could find) on the TPLL 
method that we have been discussing here.
If anyone could point out something that I missed, it would make my search 
for any relevant things easier.


ws
*

Tom,

I took the liberty of converting your post into an entry in my 
Time-NutsWiki:

http://www.ko4bb.com/dokuwiki/doku.php?id=precision_timing:phase_frequency_measurement_methodsPlease
 note anyone can edit this Wiki or create new pages.Didier

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-13 Thread Steve Rooke
Warren,

Penny dropped!

On 14 June 2010 05:29, WarrenS warrensjmail-...@yahoo.com wrote:
 Magnus Posted

 The TPLL is a mid-tau stability test, since it's sweet-spot is in the
 0,1 - 1000 s range. Short-term is better handled in LPLL phase-noise
 measurements.

 Mostly agree, it is a mid-tau device, but also consider:

 The simple TPLL can be used to find the 1ms to 10 ms ADEV as good and maybe?
 better than ANYthing else.
 AND I use it to find the drift and ADEV of my dual oven HP 10811's out to
 weeks, so there is no long term limit.
 (the trick is to control the DUT and not the Reference when doing long term
 testing)

Of course, provided that the DUT has an EFC, you can put this in place
of the reference oscillator and put a, say, GPSDO in place of where
the DUT normally goes. This will certainly extend things at long Tau
out as far as you wish. As for short tau, it would be better to
convert the circuit to LPLL.

 BUT
 I find the TPLL method is useful for MUCH more than just getting ADEV data.
 As such it's sweet spot extends from below 0.004 ms  (250 Hz)
 all the way up to  weeks, when the DUT is the controlled Osc.

Either 0.004 s or 4 ms methinks. You would have to make sure that the
B/W from the mixer out right to the ability to control the reference
oscillator is that wide. This could be verified by breaking off the
EFC and injecting 250Hz into there and seeing if the original feed to
the EFC follows it.

 ALSO the simple TPLL is very Good and useful for seeing and measuring the
 effects of temperature, line noise, vibration, PS,  load, and just about
 everything else that effects the frequency stability of an oscillators below
 1 KHz or so.

Providing that the reference oscillator is not subjected to those
effects at the same time (isolation).

 So if you are just thinking about the TPLL for taking ADEV data from 0.1 to
 1000 sec, then you're are missing 90% of the other useful stuff it can do as
 good or better than most anything thing else out there, and all for the same
 $10 (my cost).

If you have some stock items that you can borrow for this job and
not just dedicate it to the TPLL. Still, that is not an unreasonable
assumption for many.

 If still in doubt about some of the TPLL's other high end performance
 capabilities, try the swinging osc test with ANYthing else and see if you
 can match the simple TPLL's performance.

 If one would make a list for the non ADEV uses and advantages of the simple
 TPLL
 It would indeed be very long list, and it does not take any fancy write up
 to see that, just a bit of open minded thinking.

But can it make a decent cup of char?

 BTW, with a couple of minor configuration changes, the TPLL BreadBoard can
 be transformed into a LPLL,
 so the usefulness of the basic Universal TPLL BB circuit has even more
 possibilities.
 In fact one could make yet another list of all the additional things it can
 do with no added cost,

Can you add a cup-holder, those are essential these days.

 just by changing a few jumpers and values.
 But those things are for later discussions, one windmill at a time.

So does it grind wheat to make flower then; by golly, this thing is versatile.

Add smilies as you see fit.

Cheers,
Steve

 ws


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Steve Rooke - ZL3TUV  G8KVD
The only reason for time is so that everything doesn't happen at once.
- Einstein

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-13 Thread Steve Rooke
On 14 June 2010 10:46, Magnus Danielson mag...@rubidium.dyndns.org wrote:

 Still puts it in the mid-tau range as a method. The useful range and
 precision of a particular implementation of the method will vary.

By putting a GPSDO in the usual place of the DUT and putting the 10811
in place of the reference oscillator it could work well beyond the
1000s point. CAVEAT: this only works for a DUT that has an EFC that is
reasonably linear.

 So if you are just thinking about the TPLL for taking ADEV data from 0.1
 to 1000 sec, then you're are missing 90% of the other useful stuff it
 can do as good or better than most anything thing else out there, and
 all for the same $10 (my cost).

 The typical price-tag of a 10811 is in 100-150 USD. I think it is reasonable
 to assume that a TPLL weighs in at about 200 USD with all support mixers,
 amplifiers, ADCs etc. It's not bad, but if you don't have the parts that's
 about what you need to spend at least.

If you really wanted to be a scrooge, you could open the case on one
of those plethera of HP intruments and temporarily borrow that 10811
that is just sitting there. As for something like a ADC, you could
find a DAQ on fleeBay which could do duty here and also be a useful
tool for general purpose use. Heck, you can use your sound card to
digitize the EFC, provided it is DC coupled.

 BTW, with a couple of minor configuration changes, the TPLL BreadBoard
 can be transformed into a LPLL,
 so the usefulness of the basic Universal TPLL BB circuit has even more
 possibilities.
 In fact one could make yet another list of all the additional things it
 can do with no added cost,
 just by changing a few jumpers and values.
 But those things are for later discussions, one windmill at a time.

 Measurement of phase noise is what the LPLL is good at, especially when done
 in cross-correlation mode. Interferometric setups use the mixers better.
 Both these techniques could be used for LPLL and TPLL measures.

Do you have some pointers to these setups please Magnus?

Cheers,
Steve

 Cheers,
 Magnus

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-12 Thread Bruce Griffiths

WarrenS wrote:

subject: Advantages  Disadvantages of the TPLL Method.

Here is a new and unique Idea that may be useful for many.
Rather than focusing on what some members may or may not already know,
or  how good or bad one specific working BB configuration is.
How about focusing on what the TPLL method can and can not do well.
If someone will make a place to post and compile a  couple of list,
I can start it off with what I've learned so far:


DISADVANTAGES of the TPLL method:
---
#1) The TPLL method is limited by it's reference OSC.
   
This isn't necessarily correct, one could use a pair of tight PLL loops 
and use correlation techniques to reduce the contribution of the 
reference oscillator noise.



The ref osc (or the DUT)  needs to have an Analog/or Digital EFC control input 
with a bandwidth that is wider than the desired Tau0

#2)  It basically measures Freq and not Phase differences, and few understand 
how and why it works so well or it's many advantages.
   
This is not true, there is no inherent SNR advantage in measuring 
frequency changes as opposed to measuring phase differences.
When the phase measurement system and the frequency measurement systems 
being compared have the same noise bandwidth then the measurement floors 
are comparable.
For example, the TSC5120A is a narrow band system based on measuring 
phase differences with a comparable or lower noise floor than your 
implementation of the tight PLL.


The common technique of using a time interval counter to measure the 
phase difference between 2 RF signals once ever second or so is a 
wideband technique with severe undersampling, consequently the system 
noise floor is much higher than for narrow bandwidth techniques. If the 
phase difference between the 2 signals were measured more frequently and 
digitally low pass filtered the noise will be much lower.


Since one has to calculate average frequency from the frequency samples 
by integration/averaging this is mathematically equivalent to 
reconstructing the phase change between the start and end of the 
averaging time (Tau0).


One effect of undersampling is to convert (in the sampled data) a 
proportion of any flicker phase noise (and other non white phase noise 
components) to white phase noise.

The effect of this is to change the ADEV vs Tau plots from their true shape.

With a single pole RC filter the required minimum sampling rate to 
ensure that such effects are acceptably small cannot be known unless the 
phase  noise spectra of the 2 oscillators being compared is known.


However the extra phase noise filtering due to the finite PLL bandwidth 
(including any EFC filtering built in to the reference oscillator) 
allows an estimate of the maximum sampling rate likely to be required to 
ensure that such phase noise whitening effects are acceptably small.



#3) TBD



ADVANTAGES of the TPLL method:
---
1 thru 30) same as I've posted several times before.
I'm sure others will find many more if they try it or at least understand it 
better.

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Bruce


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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-12 Thread Magnus Danielson

On 06/12/2010 11:29 PM, Bruce Griffiths wrote:

WarrenS wrote:

subject: Advantages Disadvantages of the TPLL Method.

Here is a new and unique Idea that may be useful for many.
Rather than focusing on what some members may or may not already know,
or how good or bad one specific working BB configuration is.
How about focusing on what the TPLL method can and can not do well.
If someone will make a place to post and compile a couple of list,
I can start it off with what I've learned so far:


DISADVANTAGES of the TPLL method:
---
#1) The TPLL method is limited by it's reference OSC.

This isn't necessarily correct, one could use a pair of tight PLL loops
and use correlation techniques to reduce the contribution of the
reference oscillator noise.


True. The same technique is being used for LPLL phase noise 
measurements. The reference oscillator will still be a limit, but wither 
you can go below the reference oscillator noise or not is what makes the 
difference. Such a setup costs about twice of a single-channel TPLL. 
Usually there is two ADC channels available.


The cross-correlation processing isn't too hard to achieve and is 
efficiently performed using FFTs and a little support-processing. FFTW 
is a good tool to toss the FFT processing to. The remaining wrapping is 
in a few ten lines of codes or so. Going down the FFT path will give the 
frequency plot for free, getting it back into the time-domain cost extra.



The ref osc (or the DUT) needs to have an Analog/or Digital EFC
control input with a bandwidth that is wider than the desired Tau0

#2) It basically measures Freq and not Phase differences, and few
understand how and why it works so well or it's many advantages.

This is not true, there is no inherent SNR advantage in measuring
frequency changes as opposed to measuring phase differences.
When the phase measurement system and the frequency measurement systems
being compared have the same noise bandwidth then the measurement floors
are comparable.
For example, the TSC5120A is a narrow band system based on measuring
phase differences with a comparable or lower noise floor than your
implementation of the tight PLL.

The common technique of using a time interval counter to measure the
phase difference between 2 RF signals once ever second or so is a
wideband technique with severe undersampling, consequently the system
noise floor is much higher than for narrow bandwidth techniques. If the
phase difference between the 2 signals were measured more frequently and
digitally low pass filtered the noise will be much lower.


Using time-stamping counters at high rate would be possible if being 
able to cope with the rate of samples. You want a frontend to do that if 
you want to run continously.


As for digital filtering. When doing measurements in the 0,1 - 1000 s 
range for the G.813 measurements, a 10 Hz low-pass filter is being required.



Since one has to calculate average frequency from the frequency samples
by integration/averaging this is mathematically equivalent to
reconstructing the phase change between the start and end of the
averaging time (Tau0).


Depends on the details. Some counters (SR620 for instance) can have 
biases for frequency data which their time-difference measures do not 
have. A TPLL does not suffer from that particular problem, as it cranks 
out its frequency estimation by a different method.



One effect of undersampling is to convert (in the sampled data) a
proportion of any flicker phase noise (and other non white phase noise
components) to white phase noise.
The effect of this is to change the ADEV vs Tau plots from their true
shape.


Care to hand a reference or two for this statement?

Regardless, care must be taken to ensure high enough bandwidth compared 
to the tau for the measurements not to be affected.


Cheers,
Magnus

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-12 Thread Bruce Griffiths

Magnus Danielson wrote:

On 06/12/2010 11:29 PM, Bruce Griffiths wrote:

WarrenS wrote:

subject: Advantages Disadvantages of the TPLL Method.

Here is a new and unique Idea that may be useful for many.
Rather than focusing on what some members may or may not already know,
or how good or bad one specific working BB configuration is.
How about focusing on what the TPLL method can and can not do well.
If someone will make a place to post and compile a couple of list,
I can start it off with what I've learned so far:


DISADVANTAGES of the TPLL method:
---
#1) The TPLL method is limited by it's reference OSC.

This isn't necessarily correct, one could use a pair of tight PLL loops
and use correlation techniques to reduce the contribution of the
reference oscillator noise.


True. The same technique is being used for LPLL phase noise 
measurements. The reference oscillator will still be a limit, but 
wither you can go below the reference oscillator noise or not is what 
makes the difference. Such a setup costs about twice of a 
single-channel TPLL. Usually there is two ADC channels available.


Yes the cost of the reference oscillator dominates the system cost, the 
additional $10 (omitting the cost of the phase detector) to implement 
the tight PLL is relatively insignificant.
The cross-correlation processing isn't too hard to achieve and is 
efficiently performed using FFTs and a little support-processing. FFTW 
is a good tool to toss the FFT processing to. The remaining wrapping 
is in a few ten lines of codes or so. Going down the FFT path will 
give the frequency plot for free, getting it back into the time-domain 
cost extra.


If one is calculating the FFT then it is possible to calculate ADEV 
directly from the FFT (of the frequency samples) with little additional 
effort, for the relevant formulae see:


http://hal.archives-ouvertes.fr/docs/00/37/63/05/PDF/alaa_p1_v4a.pdf

Note such processing doesn't increase the cost of the system as one 
needs a PC to calculate frequency stability measures, unless one 
wants/needs to do it in real time.


One disadvantage of a tight PLL system is that finite EFC range and EFC 
non linearity may preclude its application to noisier sources.
Linearising the EFC transfer function will help but the reference 
oscillator EFC range will ultimately provide an upper limit to the 
measurable noise.





The ref osc (or the DUT) needs to have an Analog/or Digital EFC
control input with a bandwidth that is wider than the desired Tau0

#2) It basically measures Freq and not Phase differences, and few
understand how and why it works so well or it's many advantages.

This is not true, there is no inherent SNR advantage in measuring
frequency changes as opposed to measuring phase differences.
When the phase measurement system and the frequency measurement systems
being compared have the same noise bandwidth then the measurement floors
are comparable.
For example, the TSC5120A is a narrow band system based on measuring
phase differences with a comparable or lower noise floor than your
implementation of the tight PLL.

The common technique of using a time interval counter to measure the
phase difference between 2 RF signals once ever second or so is a
wideband technique with severe undersampling, consequently the system
noise floor is much higher than for narrow bandwidth techniques. If the
phase difference between the 2 signals were measured more frequently and
digitally low pass filtered the noise will be much lower.


Using time-stamping counters at high rate would be possible if being 
able to cope with the rate of samples. You want a frontend to do that 
if you want to run continously.


As for digital filtering. When doing measurements in the 0,1 - 1000 s 
range for the G.813 measurements, a 10 Hz low-pass filter is being 
required.



Since one has to calculate average frequency from the frequency samples
by integration/averaging this is mathematically equivalent to
reconstructing the phase change between the start and end of the
averaging time (Tau0).


Depends on the details. Some counters (SR620 for instance) can have 
biases for frequency data which their time-difference measures do not 
have. A TPLL does not suffer from that particular problem, as it 
cranks out its frequency estimation by a different method.
Yes, but I thought that we were calculating the required averages from 
the frequency (EFC) samples by approximating the required integrals.







One effect of undersampling is to convert (in the sampled data) a
proportion of any flicker phase noise (and other non white phase noise
components) to white phase noise.
The effect of this is to change the ADEV vs Tau plots from their true
shape.


Care to hand a reference or two for this statement?

References for the whitening effect of undersampling:
http://www.obs-besancon.fr/tf/publis/metrologia98a.pdf
http://www.obs-besancon.fr/tf/publis/metrologia98b.pdf

The 

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-12 Thread Bruce Griffiths
Another disadvantage of the Tight PLL system that only applies to 
multichannel systems is that a dedicated reference oscillator is 
required for each channel.

i.e. for an N channel system N reference oscillators are required.
If correlation techniques were to be employed then an N channel system 
requires 2N reference oscillators.


N channel versions of Dual Mixer systems by contrast only need a single 
offset oscillator and a single reference oscillator.
Similarly an N channel heterodyne system only requires a single offset 
oscillator.


An N channel direct RF phase sampling system (like that employed by the 
2 channel TSC5120A) only requires a single samplign clock source.


An N channel time interval counter that periodically (eg at a 1Hz rate) 
measures phase differences between 2 RF signals only requires a single 
reference source.
The above system can be regarded as an undersampled version of the 
direct RF phase sampling system.


The poor cost scaling of the tight PLL system is another reason why it 
has fallen out of favour for those who have more than 2 frequency 
standards to compare simultaneously.


Bruce


WarrenS wrote:


Great start
Now if we just had a list that someone would add the advantages and 
disadvantages to, so that any non relevant stuff could be easily seen 
and removed or moved to a third list, It would all become much clearer.


ws



Magnus Danielson wrote:

On 06/12/2010 11:29 PM, Bruce Griffiths wrote:

WarrenS wrote:

subject: Advantages Disadvantages of the TPLL Method.

Here is a new and unique Idea that may be useful for many.
Rather than focusing on what some members may or may not already know,
or how good or bad one specific working BB configuration is.
How about focusing on what the TPLL method can and can not do well.
If someone will make a place to post and compile a couple of list,
I can start it off with what I've learned so far:


DISADVANTAGES of the TPLL method:
---
#1) The TPLL method is limited by it's reference OSC.

This isn't necessarily correct, one could use a pair of tight PLL loops
and use correlation techniques to reduce the contribution of the
reference oscillator noise.


True. The same technique is being used for LPLL phase noise
measurements. The reference oscillator will still be a limit, but
wither you can go below the reference oscillator noise or not is what
makes the difference. Such a setup costs about twice of a
single-channel TPLL. Usually there is two ADC channels available.


Yes the cost of the reference oscillator dominates the system cost, the
additional $10 (omitting the cost of the phase detector) to implement
the tight PLL is relatively insignificant.

The cross-correlation processing isn't too hard to achieve and is
efficiently performed using FFTs and a little support-processing. FFTW
is a good tool to toss the FFT processing to. The remaining wrapping
is in a few ten lines of codes or so. Going down the FFT path will
give the frequency plot for free, getting it back into the time-domain
cost extra.


If one is calculating the FFT then it is possible to calculate ADEV
directly from the FFT (of the frequency samples) with little additional
effort, for the relevant formulae see:

http://hal.archives-ouvertes.fr/docs/00/37/63/05/PDF/alaa_p1_v4a.pdf

Note such processing doesn't increase the cost of the system as one
needs a PC to calculate frequency stability measures, unless one
wants/needs to do it in real time.

One disadvantage of a tight PLL system is that finite EFC range and EFC
non linearity may preclude its application to noisier sources.
Linearising the EFC transfer function will help but the reference
oscillator EFC range will ultimately provide an upper limit to the
measurable noise.




The ref osc (or the DUT) needs to have an Analog/or Digital EFC
control input with a bandwidth that is wider than the desired Tau0

#2) It basically measures Freq and not Phase differences, and few
understand how and why it works so well or it's many advantages.

This is not true, there is no inherent SNR advantage in measuring
frequency changes as opposed to measuring phase differences.
When the phase measurement system and the frequency measurement systems
being compared have the same noise bandwidth then the measurement 
floors

are comparable.
For example, the TSC5120A is a narrow band system based on measuring
phase differences with a comparable or lower noise floor than your
implementation of the tight PLL.

The common technique of using a time interval counter to measure the
phase difference between 2 RF signals once ever second or so is a
wideband technique with severe undersampling, consequently the system
noise floor is much higher than for narrow bandwidth techniques. If the
phase difference between the 2 signals were measured more frequently 
and

digitally low pass filtered the noise will be much lower.


Using time-stamping counters at high rate 

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-12 Thread WarrenS


Thanks for the positive contrbution,  A good example of one of the TPLL's 
obvious disadvantages.
The simple cheap analog version of the TPLL is limited by it's need to have 
a dedicated Ref OSC.


One way I have got around that problem, which would not apply to all, is to 
put the DUT unit as the controlled OSC, and use a special Tbolt as the 
reference Oscillator.
The other way around the problem is the Digital version of the TPLL that 
uses DSS.


BTW that limitation is not nearly as big as one would think. This is because 
the long term accuracy is already limited by the reference osc, so one would 
not generally use this kind of system out past 1000 sec or so anyway.  So If 
doing long term multichannel Osc, One would likely be MUCH better off with a 
more basic  undersampled Phase system for long term testing and just go thru 
and cheek each Osc one at time for a short time with a low tau tester such 
as this type.


Keep the advantages and disadvantages coming in, so the Time Nuts can 
compare which methods work best for their application.

Now if we just had some place to log the responses.

Summery: If you have multi oscillators to test simultaneously that do not 
have EFC input, and that you want to do continuous sampling on, and do not 
have multiple TSC boxes,  the TPLL is not the right tool for the job.
Be better off with one simple lower resolution multiplexed time stamped TI 
phase system and a single TPLL.


Bruce posted:

The poor cost scaling of the tight PLL system is another reason
why it has fallen out of favour for those who have more than
2 frequency standards to compare simultaneously.


Thanks for that opinion, but I don't think we should list the above as a 
unique disadvantage.

Maybe need a new column heading for that one, Any name suggestions?
Does not sound all that valid or unique of a reason to me.
It seems the same can be said about a TSC or any new high cost system.
I would think a more important reason is that the simple TPLL is not a 
universal do all system.
Because the simple analog version is Limited by it's reference Osc in many 
ways,
This does give it some possible major disadvantages like not working so good 
with a CS or Rb standard.

If one has more time than money, there are ways around that.

ws

***

Bruce Griffiths bruce.griffiths at xtra.co.nz
Sun Jun 13 01:25:13 UTC 2010

Another disadvantage of the Tight PLL system that only applies to
multichannel systems is that a dedicated reference oscillator is
required for each channel.
i.e. for an N channel system N reference oscillators are required.
If correlation techniques were to be employed then an N channel system
requires 2N reference oscillators.

N channel versions of Dual Mixer systems by contrast only need a single
offset oscillator and a single reference oscillator.
Similarly an N channel heterodyne system only requires a single offset
oscillator.

An N channel direct RF phase sampling system (like that employed by the
2 channel TSC5120A) only requires a single samplign clock source.

An N channel time interval counter that periodically (eg at a 1Hz rate)
measures phase differences between 2 RF signals only requires a single
reference source.
The above system can be regarded as an undersampled version of the
direct RF phase sampling system.

The poor cost scaling of the tight PLL system is another reason why it
has fallen out of favour for those who have more than 2 frequency
standards to compare simultaneously.

Bruce


WarrenS wrote:


Great start
Now if we just had a list that someone would add the advantages and
disadvantages to, so that any non relevant stuff could be easily seen
and removed or moved to a third list, It would all become much clearer.

ws



Magnus Danielson wrote:

On 06/12/2010 11:29 PM, Bruce Griffiths wrote:

WarrenS wrote:

subject: Advantages Disadvantages of the TPLL Method.

Here is a new and unique Idea that may be useful for many.
Rather than focusing on what some members may or may not already know,
or how good or bad one specific working BB configuration is.
How about focusing on what the TPLL method can and can not do well.
If someone will make a place to post and compile a couple of list,
I can start it off with what I've learned so far:


DISADVANTAGES of the TPLL method:
---
#1) The TPLL method is limited by it's reference OSC.

This isn't necessarily correct, one could use a pair of tight PLL loops
and use correlation techniques to reduce the contribution of the
reference oscillator noise.


True. The same technique is being used for LPLL phase noise
measurements. The reference oscillator will still be a limit, but
wither you can go below the reference oscillator noise or not is what
makes the difference. Such a setup costs about twice of a
single-channel TPLL. Usually there is two ADC channels available.


Yes the cost of the reference oscillator dominates the system cost, the

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-12 Thread Bruce Griffiths

WarrenS wrote:


Thanks for the positive contrbution,  A good example of one of the 
TPLL's obvious disadvantages.
The simple cheap analog version of the TPLL is limited by it's need to 
have a dedicated Ref OSC.


One way I have got around that problem, which would not apply to all, 
is to put the DUT unit as the controlled OSC, and use a special Tbolt 
as the reference Oscillator.
The other way around the problem is the Digital version of the TPLL 
that uses DSS.


BTW that limitation is not nearly as big as one would think. This is 
because the long term accuracy is already limited by the reference 
osc, so one would not generally use this kind of system out past 1000 
sec or so anyway.  So If doing long term multichannel Osc, One would 
likely be MUCH better off with a more basic  undersampled Phase system 
for long term testing and just go thru and cheek each Osc one at time 
for a short time with a low tau tester such as this type.


Keep the advantages and disadvantages coming in, so the Time Nuts can 
compare which methods work best for their application.

Now if we just had some place to log the responses.

Summery: If you have multi oscillators to test simultaneously that do 
not have EFC input, and that you want to do continuous sampling on, 
and do not have multiple TSC boxes,  the TPLL is not the right tool 
for the job.
Be better off with one simple lower resolution multiplexed time 
stamped TI phase system and a single TPLL.


If one has a production requirement to test/compare several hundred 
oscillators simultaneously, the TSC5120A and its variants, being 2 
channel instruments, aren't really that useful even if one could afford 
several hundred of them. Such a requirement may be difficult to meet 
within a modest budget whilst still achieving the performance 
requirements (eg 1E-13/tau system noise).


Even with a much smaller number of oscillators (eg 8 -16) devising an 
affordable measurement system may be challenging.



Bruce

Bruce posted:

The poor cost scaling of the tight PLL system is another reason
why it has fallen out of favour for those who have more than
2 frequency standards to compare simultaneously.


Thanks for that opinion, but I don't think we should list the above as 
a unique disadvantage.

Maybe need a new column heading for that one, Any name suggestions?
Does not sound all that valid or unique of a reason to me.
It seems the same can be said about a TSC or any new high cost system.
I would think a more important reason is that the simple TPLL is not a 
universal do all system.
Because the simple analog version is Limited by it's reference Osc 
in many ways,
This does give it some possible major disadvantages like not working 
so good with a CS or Rb standard.

If one has more time than money, there are ways around that.

ws

***

Bruce Griffiths bruce.griffiths at xtra.co.nz
Sun Jun 13 01:25:13 UTC 2010

Another disadvantage of the Tight PLL system that only applies to
multichannel systems is that a dedicated reference oscillator is
required for each channel.
i.e. for an N channel system N reference oscillators are required.
If correlation techniques were to be employed then an N channel system
requires 2N reference oscillators.

N channel versions of Dual Mixer systems by contrast only need a single
offset oscillator and a single reference oscillator.
Similarly an N channel heterodyne system only requires a single offset
oscillator.

An N channel direct RF phase sampling system (like that employed by the
2 channel TSC5120A) only requires a single samplign clock source.

An N channel time interval counter that periodically (eg at a 1Hz rate)
measures phase differences between 2 RF signals only requires a single
reference source.
The above system can be regarded as an undersampled version of the
direct RF phase sampling system.

The poor cost scaling of the tight PLL system is another reason why it
has fallen out of favour for those who have more than 2 frequency
standards to compare simultaneously.

Bruce


WarrenS wrote:


Great start
Now if we just had a list that someone would add the advantages and
disadvantages to, so that any non relevant stuff could be easily seen
and removed or moved to a third list, It would all become much clearer.

ws



Magnus Danielson wrote:

On 06/12/2010 11:29 PM, Bruce Griffiths wrote:

WarrenS wrote:

subject: Advantages Disadvantages of the TPLL Method.

Here is a new and unique Idea that may be useful for many.
Rather than focusing on what some members may or may not already 
know,

or how good or bad one specific working BB configuration is.
How about focusing on what the TPLL method can and can not do well.
If someone will make a place to post and compile a couple of list,
I can start it off with what I've learned so far:


DISADVANTAGES of the TPLL method:
---
#1) The TPLL method is limited by it's reference OSC.
This isn't necessarily