[time-nuts] 53230A TIC and TimeLab

2018-10-03 Thread AC0XU (Jim)
I have recently acquited a 53230A counter and have tried to measure ADEV of a 
GPSDO with it. I am suspicious of the ADEV numbers reported by TimeLab V1.31 
because

1) Timelab disagrees significantly with the ADEV numbers reported by the 53230A 
itself.  In this case, with 1 sec sample intervals, the 53230A reports an ADEV 
of about 370 micro Hz (or 3.7e-11). Time lab reports  1.5e-11 @0.01 sec sample 
period, 2e-11 @0.1 sec sample period, 6e-11 @1sec sample period - all at 
tau=1sec.

2) When I use TimeLab to select different sample intervals, the whole ADEV 
curve shifts left (with smaller sample intervals) or right (with larger sample 
intervals).

Its as if TimeLab does not correctly account for the sample interval, but am I 
just not using the Timelab/counter setup correctly?

Thanks!


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Re: [time-nuts] Oscillators

2018-10-03 Thread David Smith
Hi Bob,

I'll be on vacation for the next two weeks and out of internet range part of 
the time. Please consider my earlier request at the appropriate time.

Best regards,

Dave Smith 

-Original Message-
From: time-nuts  On Behalf Of Bob Martin
Sent: Wednesday, October 3, 2018 1:48 PM
To: Time Nuta 
Subject: [time-nuts] Oscillators

Time-Nuts,

I'm already getting requests from people who can't read!
Please don't contact me until everyone has a chance to process the list of 
oscillators.

Cheers

Bob

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[time-nuts] NIST Time and Frequency Publication Database

2018-10-03 Thread Magnus Danielson
Fellow time-nuts,

I just wanted to remind you about the wonderful resource that the NIST
Time and Frequency Publication Database is. It's a good way to find lots
of good articles.

https://tf.nist.gov/general/publications.htm

Once you find an article, search on the writes names to find more good
stuff.

Today was the day when I accidentally found an article that I co-wrote.
Somewhat proud of that.

Interesting writers to search for is Allan, Weiss, Barnes, Howe, Walls,
Nelson, Hati, Gray and Stein should get you started.

"regenerative" is a good search there for regenerative dividers for
instance.

David Howe has written "Interpreting Oscillatory Frequency Stability
Plots" for instance, which may be of some interest for some here:
https://tf.nist.gov/general/pdf/1808.pdf
I just found it. Happy to find fellow Bill Riley, Francois Vernotte and
Charles Greenhall in the acknowledgement section.

Cheers,
Magnus

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Re: [time-nuts] Oscillators away

2018-10-03 Thread David Smith
Hi Bob,

Thanks for making these available to group members.

I could make use of either of your Rb, 10 MHz., osc's (17 or 18). I am in need 
of a high stab osc for my Amateur Radio microwave rover station. These 
stabilize the Tx/Rx frequencies in the transverters.

Best regards,

Dave Smith W6TE

-Original Message-
From: time-nuts  On Behalf Of Bob Martin
Sent: Wednesday, October 3, 2018 1:30 PM
To: Time Nuta 
Subject: [time-nuts] Oscillators away

Time-Nuts,

   I have a number of oscillators to give away.

The link to images, along with a few datasheets is below:

https://eur02.safelinks.protection.outlook.com/?url=https%3A%2F%2Fapp.box.com%2Fs%2Fhq22jbe3jdfzhfqnot1hxcvjqwdooj6mdata=02%7C01%7C%7Cf13503bc38694d036d9608d6296f220c%7C84df9e7fe9f640afb435%7C1%7C0%7C636741954614227721sdata=6EedT8y4j28OaqaLkJG3RIelonoml90SOhGXfRN4uC0%3Dreserved=0

Note that there are two pages in the Box.com folder.

I'm willing to part with them, one or two to a customer, in return for the cost 
of shipping.

For myself, I'd prefer they to go to those who will use them.
So, if you want one, please tell me how you plan to incorporate it into your 
timing system.

If you have questions about individual oscillators please send then to the 
group because the answers can then be shared. The moderator can decide whether 
this is a viable process.

Other than the moderator, please DO NOT not contact me directly for now. In a 
week or so I'll send a message to the group to begin the request process.  This 
should allow everyone time to consider their needs and possibilities.

Some of the devices are valuable and I may share your requests with the group 
or individuals in the group as a sanity check for your request.

Again, please don't contact me directly until everyone has a chance to review 
the list and I send the post to begin.  The selection process will be off-list.

Thanks,

Bob Martin

Oscillator List

Osc 1
Efratom EMXO Series Sub-Miniature Military Quartz Crystal Oscillator
  Old Unit 10MHz sine out - data sheet in Box link

Osc2
Efratom EMXO Series Sub-Miniature Military Quartz Crystal Oscillator
  Old Unit 10.23MHz sine out - data sheet in Box link.

Osc3
  OCXO Morion MV200 10MHz sine

OSC4
  OCXO Symmetricom STP2640 LF 10MHz sine

Osc5
  OCXO Unknown CQE 0140/0020 DOC3098 10MHz sine
  Size like Milliren 250 series

Osc6
  OCXO Morion MV200 10MHz sine
  Attached to mixer based locking circuitry
  Designed to lock to external reference.
  If you want it, you will need to show how you plan to use
  it appropriately.

Osc7
  OXCO Morion MV83M 5.0MHz sine
  Mounted in box with regulator and SMA output

Osc8
  OXCO MTI Milliren 250-0700-B 5.0MHz sine
  Mounted in cast Bud box with iso-amp to raise output level.

Osc9
  OXCO MTI Milliren 240-0536-C 16.0MHz square

Osc10
  OXCO MTI Milliren 240-0551-C 16.0MHz square

Osc11
  OCXO MTI Milliren 220-0199 32MHz square quant = 4
  Output of board is 16MHz square wave 3V into 50 ohms.
  "Lockoscillator" boards designed to lock
  automatically to 5 or 10MHz reference. Locking is
  mixer/integrator based. Used in 5MHz steered DDS's.
  If you want one you will need to have be explicit
  regarding your application.

Osc 12
   OXCO MTI Milliren 220-0199 32.0MHz square quant. = 4

Osc13
  OXCO MTI-Milliren 220-0199 32MHz doubled to 64.0MHz
  Mounted in box with mixer doubler, filters and
  sine to square wave converter.

Osc14
  OXCO MTI Milliren 220-0224 77.76MHz square

Osc15
  VCXO Vectron 155.52MHz PECL out

Osc16
  TCXO Vectron TC-210-DFC-S5711 100MHz PECL out
  Data sheet in Box link.

Osc17
  Symmetricom SA.35m Rubidium 10MHz sine
  Verified sine out

Osc18
  Stanford Research PRS10B Rubidium 10MHz sine
  Verified sine out and PPS

Some items were dumpster dived including Osc4, Osc17 and Osc18.





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[time-nuts] Oscillators away

2018-10-03 Thread Bob Martin

Time-Nuts,

  I have a number of oscillators to give away.

The link to images, along with a few datasheets is below:

https://app.box.com/s/hq22jbe3jdfzhfqnot1hxcvjqwdooj6m

Note that there are two pages in the Box.com folder.

I'm willing to part with them, one or two to a customer, in return
for the cost of shipping.

For myself, I'd prefer they to go to those who will use them.
So, if you want one, please tell me how you plan to incorporate it 
into your timing system.


If you have questions about individual oscillators please send then 
to the group because the answers can then be shared. The moderator 
can decide whether this is a viable process.


Other than the moderator, please DO NOT not contact me directly for 
now. In a week or so I'll send a message to the group to begin the 
request process.  This should allow everyone time to consider their 
needs and possibilities.


Some of the devices are valuable and I may share your requests with 
the group or individuals in the group as a sanity check for your 
request.


Again, please don't contact me directly until everyone has a chance
to review the list and I send the post to begin.  The selection 
process will be off-list.


Thanks,

Bob Martin

Oscillator List

Osc 1
Efratom EMXO Series Sub-Miniature Military Quartz Crystal Oscillator
 Old Unit 10MHz sine out - data sheet in Box link

Osc2
Efratom EMXO Series Sub-Miniature Military Quartz Crystal Oscillator
 Old Unit 10.23MHz sine out - data sheet in Box link.

Osc3
 OCXO Morion MV200 10MHz sine

OSC4
 OCXO Symmetricom STP2640 LF 10MHz sine

Osc5
 OCXO Unknown CQE 0140/0020 DOC3098 10MHz sine
 Size like Milliren 250 series

Osc6
 OCXO Morion MV200 10MHz sine
 Attached to mixer based locking circuitry
 Designed to lock to external reference.
 If you want it, you will need to show how you plan to use
 it appropriately.

Osc7
 OXCO Morion MV83M 5.0MHz sine
 Mounted in box with regulator and SMA output

Osc8
 OXCO MTI Milliren 250-0700-B 5.0MHz sine
 Mounted in cast Bud box with iso-amp to raise output level.

Osc9
 OXCO MTI Milliren 240-0536-C 16.0MHz square

Osc10
 OXCO MTI Milliren 240-0551-C 16.0MHz square

Osc11
 OCXO MTI Milliren 220-0199 32MHz square quant = 4
 Output of board is 16MHz square wave 3V into 50 ohms.
 "Lockoscillator" boards designed to lock
 automatically to 5 or 10MHz reference. Locking is
 mixer/integrator based. Used in 5MHz steered DDS's.
 If you want one you will need to have be explicit
 regarding your application.

Osc 12
  OXCO MTI Milliren 220-0199 32.0MHz square quant. = 4

Osc13
 OXCO MTI-Milliren 220-0199 32MHz doubled to 64.0MHz
 Mounted in box with mixer doubler, filters and
 sine to square wave converter.

Osc14
 OXCO MTI Milliren 220-0224 77.76MHz square

Osc15
 VCXO Vectron 155.52MHz PECL out

Osc16
 TCXO Vectron TC-210-DFC-S5711 100MHz PECL out
 Data sheet in Box link.

Osc17
 Symmetricom SA.35m Rubidium 10MHz sine
 Verified sine out

Osc18
 Stanford Research PRS10B Rubidium 10MHz sine
 Verified sine out and PPS

Some items were dumpster dived including Osc4, Osc17 and
Osc18.





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Re: [time-nuts] 10 MHz -> 16 MHz

2018-10-03 Thread Bruce Griffiths
Brian
There are 2 parallel feedback paths one tuned to 6MHz and the other tuned to 
16MHz.
They can either share the same amp or use separate amplifiers. There's a NIST 
paper on using them to divide by factors other than 2 (e.g. 3, 5 etc).
https://tf.nist.gov/general/pdf/1890.pdf

Bruce
> On 04 October 2018 at 00:54 "Brian, WA1ZMS"  wrote:
> 
> 
> Bruce-
> 
> Does such a dual conjugate regen divider use a single mixer with the BPFs in 
> parallel?   Or are there multiple loops?  I'm trying to visualize the 
> topology.
> 
> I've built a few divide-by-2 regen dividers (both worked very well) but 
> nothing else.
> 
> -Brian
> 
> 
> > On Sep 30, 2018, at 4:25 PM, Bruce Griffiths  
> > wrote:
> > 
> > A low phase noise method is to use a dual conjugate regenerative divider 
> > with 6MHz and 16Mhz bandpass filters in the feedback loop to produce 16Mhz 
> > output.
> > 
> > For 12MHz output use 2MHz and 12MHz bandpass filters in the feedback loop. 
> > 
> > Bruce
> >> On 01 October 2018 at 09:05 Bob kb8tq  wrote:
> >> 
> >> 
> >> Hi
> >> 
> >> If (as originally specified) noise and jitter are not a big deal - there 
> >> are a lot 
> >> of chips out there like the ICS570. They are designed to do weird ratio 
> >> frequency
> >> conversions so 10 to 12 or 10 to 16 are trivial for them. The Clockblock 
> >> board was
> >> one way to get it all put together. 
> >> 
> >> Bob
> >> 
> >>> On Sep 30, 2018, at 12:05 PM, Gerhard Hoffmann  wrote:
> >>> 
> >>> 
>  Am 30.09.2018 um 16:49 schrieb Attila Kinali:
>  
>  The simplest way I can think of is the following:
>  Use a 74LV8154 to divide the 10MHz down to 152.587890625Hz.
>  Use the capture timer unit of the uC to measure the phase of the
>  pulse. Use any kind of DAC (internal, external, PWM,...) to steer
>  the 16MHz VCO. Depending on how fast the timer unit runs, this
>  will give you something in the order of 10-200ns dead-band.
>  By choosing the right frequency for the timer unit, one can
>  get it to "dither" a bit and then use averaging.
>  
>  For lower jitter, use one half of a Nutt interpolator
>  to get the timing difference between the 152Hz signal
>  and the 16MHz (ie similar to what the SRS FS740 does).
>  Use something akin Nick Sayer's time-to-amplitude converter
>  for the fine measurement.
>  
>  Same works equally well for 12MHz.
>  
>  
> 
> 
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Re: [time-nuts] black holes and list email - Earthlink

2018-10-03 Thread jimlux

On 10/3/18 7:36 AM, John Ackermann N8UR wrote:
Yes, the new list provider has their own spam filtering system which is 
different from (and probably better than) the one I had on the old 
febo.com.  However, it does blacklist addresses from some of the more 
popular spam-producing ISP servers.  As Jim mentioned, the tools seem to 
be pretty good for getting off the list.



It takes about an hour or so..to remove yourself, and you do get a 
response email saying it's been done.  Of course, the problem is that 
when you resend your mail, it will go through a different MTA, and might 
have an IP that's been blocked.


As a practical matter, looking over those IPs in their logs, it looks 
like the blacklist provider "gets offended" every few weeks..





John


On 10/03/2018 10:25 AM, jimlux wrote:
Several times over the past month, I've found that my emails to the 
list were blocked because they appeared to be junkmail because they 
came from an IP address (an earthlink MTA) on a black list.


Fortunately, you get a bounce message, so you can go to the blacklist 
and ask it to be removed which typically happens in a few hours.


https://spameatingmonkey.com/lookup/209.86.89.62

(or .64, or .69, etc)

Or, you can just resend the email, and most likely it goes through a 
different MTA at Earthlink, which doesn't happen to have it's IP on 
the list.





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Re: [time-nuts] black holes and list email - Earthlink

2018-10-03 Thread John Ackermann N8UR
Yes, the new list provider has their own spam filtering system which is 
different from (and probably better than) the one I had on the old 
febo.com.  However, it does blacklist addresses from some of the more 
popular spam-producing ISP servers.  As Jim mentioned, the tools seem to 
be pretty good for getting off the list.


John


On 10/03/2018 10:25 AM, jimlux wrote:
Several times over the past month, I've found that my emails to the list 
were blocked because they appeared to be junkmail because they came from 
an IP address (an earthlink MTA) on a black list.


Fortunately, you get a bounce message, so you can go to the blacklist 
and ask it to be removed which typically happens in a few hours.


https://spameatingmonkey.com/lookup/209.86.89.62

(or .64, or .69, etc)

Or, you can just resend the email, and most likely it goes through a 
different MTA at Earthlink, which doesn't happen to have it's IP on the 
list.





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[time-nuts] black holes and list email - Earthlink

2018-10-03 Thread jimlux
Several times over the past month, I've found that my emails to the list 
were blocked because they appeared to be junkmail because they came from 
an IP address (an earthlink MTA) on a black list.


Fortunately, you get a bounce message, so you can go to the blacklist 
and ask it to be removed which typically happens in a few hours.


https://spameatingmonkey.com/lookup/209.86.89.62

(or .64, or .69, etc)

Or, you can just resend the email, and most likely it goes through a 
different MTA at Earthlink, which doesn't happen to have it's IP on the 
list.





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Re: [time-nuts] 10 MHz -> 16 MHz

2018-10-03 Thread Magnus Danielson
Hi Brian,

The typical ones have two amplifier chains in parallel and one mixer.
You take the output from the amplifier branch of your liking.

The hard part is to tune them to run in synchronous mode and ensure they
stay there, or else there is a beat pattern causing excessive jitter
over that of the synchronous mode.

Cheers,
Magnus

On 10/3/18 1:54 PM, Brian, WA1ZMS wrote:
> Bruce-
> 
> Does such a dual conjugate regen divider use a single mixer with the BPFs in 
> parallel?   Or are there multiple loops?  I'm trying to visualize the 
> topology.
> 
> I've built a few divide-by-2 regen dividers (both worked very well) but 
> nothing else.
> 
> -Brian
> 
> 
>> On Sep 30, 2018, at 4:25 PM, Bruce Griffiths  
>> wrote:
>>
>> A low phase noise method is to use a dual conjugate regenerative divider 
>> with 6MHz and 16Mhz bandpass filters in the feedback loop to produce 16Mhz 
>> output.
>>
>> For 12MHz output use 2MHz and 12MHz bandpass filters in the feedback loop. 
>>
>> Bruce
>>> On 01 October 2018 at 09:05 Bob kb8tq  wrote:
>>>
>>>
>>> Hi
>>>
>>> If (as originally specified) noise and jitter are not a big deal - there 
>>> are a lot 
>>> of chips out there like the ICS570. They are designed to do weird ratio 
>>> frequency
>>> conversions so 10 to 12 or 10 to 16 are trivial for them. The Clockblock 
>>> board was
>>> one way to get it all put together. 
>>>
>>> Bob
>>>
 On Sep 30, 2018, at 12:05 PM, Gerhard Hoffmann  wrote:


> Am 30.09.2018 um 16:49 schrieb Attila Kinali:
>
> The simplest way I can think of is the following:
> Use a 74LV8154 to divide the 10MHz down to 152.587890625Hz.
> Use the capture timer unit of the uC to measure the phase of the
> pulse. Use any kind of DAC (internal, external, PWM,...) to steer
> the 16MHz VCO. Depending on how fast the timer unit runs, this
> will give you something in the order of 10-200ns dead-band.
> By choosing the right frequency for the timer unit, one can
> get it to "dither" a bit and then use averaging.
>
> For lower jitter, use one half of a Nutt interpolator
> to get the timing difference between the 152Hz signal
> and the 16MHz (ie similar to what the SRS FS740 does).
> Use something akin Nick Sayer's time-to-amplitude converter
> for the fine measurement.
>
> Same works equally well for 12MHz.
>
>
> 
> 
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Re: [time-nuts] 10MHz standard for comms receivers

2018-10-03 Thread Dave B via time-nuts
The problem with that approach to EMC compliance, is all it does is fool
the QP detector in the test/measurement RX.

It does nothing to actually reduce the amount of radiated crud, in
essence, it's the result of excessive "Bean counting" by the production
costs tracking types.

Small parts may not radiate that much, but what they are driving could
do. Especially if that in turn is driving something over a length of cable!

Regards.

Dave B.



On 02/10/18 17:00, time-nuts-requ...@lists.febo.com wrote:
> The main reason for spread spectrum is to make EMI requirements easier to 
> pass. 
> Once you get to a small enough part, it really doesn?t generate all that much 
> EMI internally.
> Again, a lot of assumptions get into that. 

-- 
Created on and sent from a Unix like PC running and using free and open source 
software.
::

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Re: [time-nuts] Software

2018-10-03 Thread jimlux

On 10/2/18 8:39 PM, Hal Murray wrote:


rich...@karlquist.com said:

At least for me. I took 1 course in Fortran 50 years ago, and that was the
extent of my software education. During my whole career, I have too busy
being well paid to design hardware, to have any time left over to learn
software.  After Fortran was over, there was the Pascal fad, then the C fad,
etc, now I guess Python is the latest. Never got involved in any of that.


Interesting.

All the hardware people I've worked with have been reasonably happy working on
software.  That may be more common in the digital world.

As an example, most people write PAL code as logic equations rather than
schematics.

It would be interesting to compare the costs of hardware vs software for a big
chip project over time.



Like most things, "it depends" - here, I'm going to talk about embedded 
applications (as would be typical for a "time-nuts" widget of some sort)


From a "first unit" cost standpoint, in general software is 
cheaper/easier than FPGA code. It might also be cheaper in hardware on 
recurring cost basis. Purpose designed processors tend to be faster and 
lower power, and cheaper than FPGA instantiated processors - ultimately, 
it takes less sand to make them.





There are orders of magnitude more C programmers available than FPGA 
folks. And there are more of both of them then folks who can design an ASIC.


The maturity of the development tools for "software" is far greater than 
for FPGA and they are cheaper. There are things like documentation 
generators, debuggers, code analyzers, integrated development 
environments, and on and on for software. There are multiple vendors for 
each.


In the FPGA world, we're just starting to get analysis capabilities that 
look for things like clock domain crossings that might cause trouble, 
decent library management tools.  I don't know that there are FPGA 
equivalents to static code analysis tools like Coverity, CodeSONAR, 
Semmle, etc.  There probably are, but I'm going to bet that they've only 
been out for a few years, and don't have decades of use behind them like 
most software tools do.


In terms of debugging - whether it's "printf() to the console" or 
embedded hardware debugger supports like the SPARC/GRMON combination - 
there's a lot more support for software debugging than in an FPGA.  Part 
of this is that FPGA designs tend to be timing critical - you can't just 
add a block of code that dumps a bunch of values to a device or file. 
Tools like ChipScope in the Xilinx family do let you look at some stuff 
(like having a oscilloscope or logic analyzer in your design) - but the 
scale and practicality is limited.


Just the time required to turn around a new design after fixing a bug is 
typically faster with software.  On the Xilinx Virtex 6 designs I'm 
working with, resynthesizing the bitstream takes on the order of 30-45 
minutes.  I haven't had a C compile take that long in years, except when 
I was compiling some package from source on a Beagle.  For most software 
applications, recompile is a matter of <1 minute (if you're not working 
in an interactive or JIT language where the time is zero).



Maturity of software libraries vs embedded components for FPGAs - for a 
given function, it is far more likely that there are multiple high 
quality software implementations than for a FPGA. Look at something like 
BLAS (for linear algebra) or FFTW - folks have been optimizing numerical 
libraries for decades - you want a Radix 17 FFT for some reason, and 
there's probably one out there: in 3 different languages, and either 
platform indpendent or with a well defined path to 
optimizing/configuring them for a given platform.


In FPGA land, there's some standard building blocks: FFTs, FIR 
filters,NCOs, various common interfaces (Ethernet, serial port) - but 
often, there's one or two instances, they're somewhat tied to a specific 
architecture, and tend to be straightforward implementations.  And 
they're not necessarily cross platform supported - I made the mistake a 
few years ago of thinking that I could move a digital down converter 
from Virtex 2 to Virtex 6, but discovered that the IP cores (from 
Xilinx) used were supported on Virtex 2 but not Virtex 6, and the new 
cores worked entirely differently. Over a span of a few years, we got 
virtually no code-reuse - for a very non-sophisticated, non-platform 
specific design - an oscillator, multiplier, CIC decimator and FIR filter.


I can still use the original 10-15 line FORTRAN Radix2 FFT from that 
IEEE transactions paper in the late 60s without much trouble.
An awful lot of people reuse a CRC calculation code for 8 bit 
microcontrollers that originated in a paper by Aram Perez "Byte-wise CRC 
Calculations" in IEEE Micro June 1983. It works, why change it.



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Re: [time-nuts] 10 MHz -> 16 MHz

2018-10-03 Thread Brian, WA1ZMS
Bruce-

Does such a dual conjugate regen divider use a single mixer with the BPFs in 
parallel?   Or are there multiple loops?  I'm trying to visualize the topology.

I've built a few divide-by-2 regen dividers (both worked very well) but nothing 
else.

-Brian


> On Sep 30, 2018, at 4:25 PM, Bruce Griffiths  
> wrote:
> 
> A low phase noise method is to use a dual conjugate regenerative divider with 
> 6MHz and 16Mhz bandpass filters in the feedback loop to produce 16Mhz output.
> 
> For 12MHz output use 2MHz and 12MHz bandpass filters in the feedback loop. 
> 
> Bruce
>> On 01 October 2018 at 09:05 Bob kb8tq  wrote:
>> 
>> 
>> Hi
>> 
>> If (as originally specified) noise and jitter are not a big deal - there are 
>> a lot 
>> of chips out there like the ICS570. They are designed to do weird ratio 
>> frequency
>> conversions so 10 to 12 or 10 to 16 are trivial for them. The Clockblock 
>> board was
>> one way to get it all put together. 
>> 
>> Bob
>> 
>>> On Sep 30, 2018, at 12:05 PM, Gerhard Hoffmann  wrote:
>>> 
>>> 
 Am 30.09.2018 um 16:49 schrieb Attila Kinali:
 
 The simplest way I can think of is the following:
 Use a 74LV8154 to divide the 10MHz down to 152.587890625Hz.
 Use the capture timer unit of the uC to measure the phase of the
 pulse. Use any kind of DAC (internal, external, PWM,...) to steer
 the 16MHz VCO. Depending on how fast the timer unit runs, this
 will give you something in the order of 10-200ns dead-band.
 By choosing the right frequency for the timer unit, one can
 get it to "dither" a bit and then use averaging.
 
 For lower jitter, use one half of a Nutt interpolator
 to get the timing difference between the 152Hz signal
 and the 16MHz (ie similar to what the SRS FS740 does).
 Use something akin Nick Sayer's time-to-amplitude converter
 for the fine measurement.
 
 Same works equally well for 12MHz.
 
 


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Re: [time-nuts] Software

2018-10-03 Thread Jim Palfreyman
Interesting read.

I've been programming since the mid 70's (started with a 2650 and TI59).
Graduated in Computer Science and mathematics in 1984, did Honours in
Computer Science in 1985.

Fast forward decades and I completed a Masters in Astrophysics and a Ph.D.
in astrophysics as well.

Hate Fortran and Cobol, but can program in 15+ languages and am especially
good at C.

But, here's something interesting. I picked up R during my Ph.D.

I'm now paid professionally to program in R.

R is *different*. Every variable is a vector. Even if it's a million rows,
a billion rows - that's fine. You have to think differently. Despite all my
experience, this is now one of my favourite languages.

Statisticians embraced R decades ago. Every statistical test is freely
available. Need to do Allan variance? It's done. Need to do a Lomb-Scargle
periodogram? Done. Combine that with publication quality plots as well.

I think time-nuts should have a serious look at this language. It's
available on all platforms for free. RStudio is what you need to look for.

Jim

On Wed, 3 Oct 2018 at 19:19, ew via time-nuts 
wrote:

> In the seventies at TI most software was done in the Equipment Group and
> they did super stuff.We send emails globally and when I traveled I did it
> with a Silent 700. Did performance reviews from Norway using rubber cups
> and phone handset.Military group was an other story.. Lost our shirt on GPS
> because we underestimated the software part 300K code. Was a wake up call
> and I was asked to set up a department strictly for code development. Did
> focus on management. Never in my professional life had an 8 to 5 job. Just
> like Rick, Fortran 50 years ago and focus on the job at hand. Most my
> professional life was ion management.  After retirement fortunate to meet
> Brook Shera and Richard Mc Corkle and still looking for team members to
> fill their void.We have some exciting projectsBert Kehren
>
> In a message dated 10/2/2018 11:40:49 PM Eastern Standard Time,
> hmur...@megapathdsl.net writes:
>
>
> rich...@karlquist.com said:> At least for me. I took 1 course in Fortran
> 50 years ago, and that was the> extent of my software education. During my
> whole career, I have too busy> being well paid to design hardware, to have
> any time left over to learn> software.  After Fortran was over, there was
> the Pascal fad, then the C fad,> etc, now I guess Python is the latest.
> Never got involved in any of that.
> Interesting.
> All the hardware people I've worked with have been reasonably happy
> working on software.  That may be more common in the digital world.
> As an example, most people write PAL code as logic equations rather than
> schematics.
> It would be interesting to compare the costs of hardware vs software for a
> big chip project over time.
>
>
> -- These are my opinions.  I hate spam.
>
>
>
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Re: [time-nuts] Software

2018-10-03 Thread ew via time-nuts
In the seventies at TI most software was done in the Equipment Group and they 
did super stuff.We send emails globally and when I traveled I did it with a 
Silent 700. Did performance reviews from Norway using rubber cups and phone 
handset.Military group was an other story.. Lost our shirt on GPS because we 
underestimated the software part 300K code. Was a wake up call and I was asked 
to set up a department strictly for code development. Did focus on management. 
Never in my professional life had an 8 to 5 job. Just like Rick, Fortran 50 
years ago and focus on the job at hand. Most my professional life was ion 
management.  After retirement fortunate to meet Brook Shera and Richard Mc 
Corkle and still looking for team members to fill their void.We have some 
exciting projectsBert Kehren

In a message dated 10/2/2018 11:40:49 PM Eastern Standard Time, 
hmur...@megapathdsl.net writes:


rich...@karlquist.com said:> At least for me. I took 1 course in Fortran 50 
years ago, and that was the> extent of my software education. During my whole 
career, I have too busy> being well paid to design hardware, to have any time 
left over to learn> software.  After Fortran was over, there was the Pascal 
fad, then the C fad,> etc, now I guess Python is the latest. Never got involved 
in any of that. 
Interesting.
All the hardware people I've worked with have been reasonably happy working on 
software.  That may be more common in the digital world.
As an example, most people write PAL code as logic equations rather than 
schematics.
It would be interesting to compare the costs of hardware vs software for a big 
chip project over time.


-- These are my opinions.  I hate spam.



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