Re: [U-Boot] [U-BOOT] nand merge problem
zy...@ingenic.cn wrote:
Hi, xiangfu
Maybe the drivers of mtd in linux-2.6.24.3 can be as reference.
Best Regards
thanks, now it's output :
nand_get_flash_type: second ID read did not match 43,20 against 84,84
I will let you know the progress.
now the hwcontrol is
--
static void jz_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
struct nand_chip *this = (struct nand_chip *)(mtd-priv);
unsigned int nandaddr = (unsigned int)this-IO_ADDR_W;
if (ctrl NAND_CTRL_CHANGE) {
if (ctrl NAND_CLE)
nandaddr = nandaddr | 0x8000;
else
nandaddr = nandaddr ~0x8000;
if (ctrl NAND_ALE)
this-IO_ADDR_W = (void __iomem *)((unsigned
long)(this-IO_ADDR_W) |
0x0001);
else
this-IO_ADDR_W = (void __iomem *)((unsigned
long)(this-IO_ADDR_W)
~0x0001);
if (ctrl NAND_NCE) {
this-IO_ADDR_W = this-IO_ADDR_R = (void __iomem
*)NAND_DATA_PORT1;
REG_EMC_NFCSR |= EMC_NFCSR_NFCE1;
} else {
REG_EMC_NFCSR = ~EMC_NFCSR_NFCE1;
REG_EMC_NFCSR = ~EMC_NFCSR_NFCE2;
REG_EMC_NFCSR = ~EMC_NFCSR_NFCE3;
REG_EMC_NFCSR = ~EMC_NFCSR_NFCE4;
}
}
this-IO_ADDR_W = (void __iomem *)nandaddr;
if (cmd != NAND_CMD_NONE)
writeb(cmd, this-IO_ADDR_W);
}
--
Best Regards
Xiangfu Liu
jabber : xiangf...@gmail.com
skype : xiangfu.z
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Re: [U-Boot] [PATCH] ARM Cortex A8: Move OMAP3 specific reset handler to OMAP3 code
On 09:30 Sat 30 May , Dirk Behme wrote: Reset is SoC specific and not ARM Cortex A8 generic. Move it from generic code to OMAP3 SoC specific file. CC: Kim, Heung Jun river...@gmail.com Signed-off-by: Dirk Behme dirk.be...@googlemail.com --- This patches fixes the second issue found by riverful in http://lists.denx.de/pipermail/u-boot/2009-May/053433.html The first issue is fixed by http://lists.denx.de/pipermail/u-boot/2009-May/053444.html cpu/arm_cortexa8/omap3/lowlevel_init.S | 12 cpu/arm_cortexa8/start.S | 14 -- 2 files changed, 12 insertions(+), 14 deletions(-) Index: u-boot-arm/cpu/arm_cortexa8/omap3/lowlevel_init.S === --- u-boot-arm.orig/cpu/arm_cortexa8/omap3/lowlevel_init.S +++ u-boot-arm/cpu/arm_cortexa8/omap3/lowlevel_init.S @@ -181,6 +181,18 @@ lowlevel_init: /* back to arch calling code */ mov pc, lr +.global reset_cpu +reset_cpu: + ldr r1, rstctl @ get addr for global reset + @ reg + mov r3, #0x2@ full reset pll + mpu + str r3, [r1]@ force reset + mov r0, r0 +_loop_forever: + b _loop_forever +rstctl: + .word PRM_RSTCTRL + please move this to reset.S other wise fine Best Regards, J. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: Kirkwood: Basic SOCs support
On 00:16 Sat 30 May , Prafulla Wadaskar wrote:
-Original Message-
From: Jean-Christophe PLAGNIOL-VILLARD [mailto:plagn...@jcrosoft.com]
Sent: Saturday, May 30, 2009 3:52 AM
To: Prafulla Wadaskar
Cc: u-boot@lists.denx.de; Manas Saksena; Ronen Shitrit;
Nicolas Pitre; Ashish Karkare; Prabhanjan Sarnaik; Lennert Buijtenhek
Subject: Re: [U-Boot] [PATCH] arm: Kirkwood: Basic SOCs support
+ *
+ * Reference Documentation:
+ * Mbus-L to Mbus Bridge Registers Configuration.
+ * (Sec 25.1 and 25.3 of Datasheet)
+ */
+int kw_config_adr_windows(void)
+{
+ struct kwwin_registers *winregs =
+ (struct kwwin_registers *)KW_CPU_WIN_BASE;
+
+ writel(KWCPU_WIN_CTRL_DATA(0xc, KWCPU_TARGET_PCIE,
+ KWCPU_ATTR_PCIE_MEM, KWCPU_WIN_ENABLE),
+ winregs[0].ctrl);
+
+ writel(0x9000, winregs[0].base);
any chance to have some macro for the 0x9000 co...
Hi Jean,
Base address, remap address high, remap address low are the registers need to
be programmed
with some address value.
Making it macro will not make much sense since the code line itself is
readable for objective
so please explain this in the code
Best Regards,
J.
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Re: [U-Boot] [PATCH v2] arch_misc_init support for ARM architectures
On 16:12 Sat 30 May , Prafulla Wadaskar wrote: This patch is required for Kirkwood support may be used by other ARM architectures Signed-off-by: Prafulla Wadaskar prafu...@marvell.com --- applied to arm/next Best Regards, J. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM DaVinci: EMIF settings
On 19:46 Sun 03 May , Thomas Lange wrote: NAND module should not modify EMIF registers unrelated to CS2 that is used for NAND, i.e. do not modify EWAIT config register or registers for other Chip Selects. Without this patch, EMIF configurations made in board_init() will be invalidated. Signed-off-by: Thomas Lange tho...@corelatus.se --- David, Sandeep is one of you can test it on some boards too? Best Regards, J. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ppc4xx/net: Fix MDIO clock setup
This patch fixes MDIO clock setup in case when OPB frequency is 100MHz. Current code assumes that the value of sysinfo.freqOPB is 1 when OPB frequency is 100MHz. In reality it is 10001. As a result MDIO clock is set to incorrect value, larger than 2.5MHz, thus violating the standard. This in not a problem on boards equipped with Marvell PHYs (e.g. Canyonlands), since those PHYs support MDIO clocks up to 8.3MHz, but can be a problem for other PHYs (e.g. Realtek ones). Signed-off-by: Felix Radensky fe...@embedded-sol.com --- drivers/net/4xx_enet.c | 10 ++ 1 files changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/net/4xx_enet.c b/drivers/net/4xx_enet.c index 918373b..7bf3e0a 100644 --- a/drivers/net/4xx_enet.c +++ b/drivers/net/4xx_enet.c @@ -871,6 +871,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ defined(CONFIG_405EX) + u32 opbfreq; sys_info_t sysinfo; #if defined(CONFIG_440GX) || defined(CONFIG_440SPE) || \ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ @@ -997,12 +998,13 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) /* Whack the M1 register */ mode_reg = 0x0; mode_reg = ~0x0038; - if (sysinfo.freqOPB = 5000); - else if (sysinfo.freqOPB = 6667) + opbfreq = sysinfo.freqOPB / 100; + if (opbfreq = 50); + else if (opbfreq = 66) mode_reg |= EMAC_M1_OBCI_66; - else if (sysinfo.freqOPB = 8333) + else if (opbfreq = 83) mode_reg |= EMAC_M1_OBCI_83; - else if (sysinfo.freqOPB = 1) + else if (opbfreq = 100) mode_reg |= EMAC_M1_OBCI_100; else mode_reg |= EMAC_M1_OBCI_GT100; -- 1.5.4.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] spi: Add Marvell Kirkwood SPI driver
Dear Prafulla Wadaskar, In message 1243626217-9232-4-git-send-email-prafu...@marvell.com you wrote: This patch adds a SPI driver for the Marvell Kirkwood SoC's. + /* program spi clock prescaller using max_hz */ + writel(KWSPI_ADRLEN_3BYTE | data, spireg-cfg); + debug(data = 0x%08x \n, data); Please do not print trailing white space. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Just about every computer on the market today runs Unix, except the Mac (and nobody cares about it). - Bill Joy 6/21/85 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net: Add Marvell Kirkwood gigabit ethernet driver
Dear Prafulla Wadaskar,
In message 1243626217-9232-6-git-send-email-prafu...@marvell.com you wrote:
This patch adds a egiga driver for the Marvell Kirkwood SoC's.
...
+ /* check parameters */
+ if ((phy_adr KWGBE_PHY_SMI_DEV_ADDR_OFFS)
+ ~KWGBE_PHY_SMI_DEV_ADDR_MASK) {
+ printf(Illegal phy address\n);
^^
+ return -EINVAL;
+ }
+ if ((reg_ofs KWGBE_SMI_REG_ADDR_OFFS)
+ ~KWGBE_SMI_REG_ADDR_MASK) {
+ printf(Illegal register offset\n);
^^^
If you priont an error message, please print a helpful one, i. e.
provide the information what failed the test, and why.
+static int kwgbe_send(struct eth_device *dev, volatile void *dataptr, int
datasize)
+{
+ struct kwgbe_device *dkwgbe = to_dkwgbe(dev);
+ struct kwgbe_registers *regs = dkwgbe-regs;
+ struct kwgbe_txdesc *p_txdesc = dkwgbe-p_txdesc;
+
+ if ((u32)dataptr 0x07) {
+ printf(Err..xmit dataptr not 64bit aligned\n);
Ditto. The user does not even know which driver this is coming from.
Also, please write dataptr 0x07.
+ while (p_txdesc-cmd_sts KWGBE_BUFFER_OWNED_BY_DMA) {
+ /* return fail if error is detected */
+ if (p_txdesc-cmd_sts (KWGBE_UR_ERROR | KWGBE_RL_ERROR)) {
+ printf(Err..in xmit packet\n);
Ditto.
+static int kwgbe_recv(struct eth_device *dev)
+{
+ volatile struct kwgbe_device *dkwgbe = to_dkwgbe(dev);
+ volatile struct kwgbe_rxdesc *p_rxdesc_curr= dkwgbe-p_rxdesc_curr;
+
+ /* Sanity check */
+ if (p_rxdesc_curr == NULL) {
+ printf(Err.. null ptr \n);
Please do not print trailing white space.
Also, this error message could be more helpful if you printed where it
happened, and which pointer was unexpectedly NULL.
And so on - please check rest of this file, and all other files for
_helpful_ error messages.
Best regards,
Wolfgang Denk
--
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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- Terry Pratchett, _Moving Pictures_
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Re: [U-Boot] [PATCH] cpu_misc_init support for ARM architectures
Dear Prafulla Wadaskar, In message 1243626217-9232-1-git-send-email-prafu...@marvell.com you wrote: This patch is required for Kirkwood support may be used by other ARM architectures I see some (8 ?) patches posted as follow-up - are these supposed to be a series, i. e. do they in any way depend on each other, or need to be applied in a specific order? If so, then please post as numbered patches. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de To the systems programmer, users and applications serve only to provide a test load. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Marvell MV88F6281GTW_GE Board support
Dear Prafulla Wadaskar, In message 1243626217-9232-7-git-send-email-prafu...@marvell.com you wrote: This is Marvell's 88F6281_A0 based custom board developed for wireless access point product This patch is tested for- 1. Boot from DRAM/SPI flash/NFS 2. File transfer using tftp and loadb 3. SPI flash read/write/erase 4. Booting Linux kernel and RFS from SPI flash Reviewed-by: Ronen Shitrit rshit...@marvell.com Signed-off-by: Prafulla Wadaskar prafu...@marvell.com --- MAKEALL |1 + Makefile|3 + board/Marvell/mv88f6281gtw_ge/Makefile | 51 ++ board/Marvell/mv88f6281gtw_ge/config.mk | 25 +++ board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c | 141 + board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.h | 36 + include/configs/mv88f6281gtw_ge.h | 188 +++ 7 files changed, 445 insertions(+), 0 deletions(-) create mode 100644 board/Marvell/mv88f6281gtw_ge/Makefile create mode 100644 board/Marvell/mv88f6281gtw_ge/config.mk create mode 100644 board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c create mode 100644 board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.h create mode 100644 include/configs/mv88f6281gtw_ge.h Entry in MAINTAINERS file is missing. diff --git a/include/configs/mv88f6281gtw_ge.h b/include/configs/mv88f6281gtw_ge.h new file mode 100644 index 000..8735b9e --- /dev/null +++ b/include/configs/mv88f6281gtw_ge.h ... +/* + * Commands configuration + */ +#define CONFIG_CMD_ENV +#define CONFIG_CMD_RUN +#define CONFIG_CMD_LOADB +#define CONFIG_CMD_NET +#define CONFIG_CMD_AUTOSCRIPT +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_BOOTD +#define CONFIG_CMD_SAVEENV +#define CONFIG_CMD_SF Please sort such lists. ... +#define CONFIG_MTDPARTS spi0.0:512k(uboot), \ + 5...@512k(psm), 2...@1m(kernel),1...@3m(rootfs)\0 For readability, you might want to omit the redundant offet values here. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de You may call me by my name, Wirth, or by my value, Worth. - Nicklaus Wirth ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Marvell Sheevaplug Board support
Dear Prafulla Wadaskar,
In message 1243626217-9232-8-git-send-email-prafu...@marvell.com you wrote:
Reference:
http://plugcomputer.org/
http://openplug.org/plugwiki/index.php/Das_U-boot_plug_support
This patch is tested for-
1. Boot from DRAM/NAND flash
2. File transfer using tftp
3. NAND flash read/write/erase
4. Linux kernel and RFS Boot from NAND
Signed-off-by: Prafulla Wadaskar prafu...@marvell.com
---
MAKEALL |1 +
Makefile |4 +-
board/Marvell/sheevaplug/Makefile | 51 +
board/Marvell/sheevaplug/config.mk| 25 +
board/Marvell/sheevaplug/sheevaplug.c | 135 +++
board/Marvell/sheevaplug/sheevaplug.h | 37 +++
include/configs/sheevaplug.h | 192
+
7 files changed, 444 insertions(+), 1 deletions(-)
create mode 100644 board/Marvell/sheevaplug/Makefile
create mode 100644 board/Marvell/sheevaplug/config.mk
create mode 100644 board/Marvell/sheevaplug/sheevaplug.c
create mode 100644 board/Marvell/sheevaplug/sheevaplug.h
create mode 100644 include/configs/sheevaplug.h
Entry in MAINTAINERS missing.
...
+/*
+ * Commands configuration
+ */
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_AUTOSCRIPT
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_SAVEENV
+#define CONFIG_CMD_NAND
Please sort.
...
+#define CONFIG_MTDPARTS orion_nand:512k(uboot),
\
+ 1...@4m(psm), 3...@1m(kernel),1...@5m(rootfs) rw\0
Do you really want to have such an unusal and unexpectad setup?
+/*
+ * Ethernet Driver configuration
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
I recommend to keep command definitions close together. Move up?
+#define CONFIG_NETCONSOLE/* include NetConsole support */
+#define CONFIG_NET_MULTI /* specify more that one ports available */
+#define CONFIG_MII /* expose smi ove miiphy interface */
+#define CONFIG_KIRKWOOD_EGIGA/* Enable kirkwood Gbe Controller
Driver */
+#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
+#define CONFIG_KIRKWOOD_EGIGA_PORTS {1,0} /* enable port 0 only */
+#define CONFIG_PHY_BASE_ADR 0
+#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
+#endif /* CONFIG_CMD_NET */
Best regards,
Wolfgang Denk
--
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Perl already has an IDE. It's called Unix.
-- Tom Christiansen in 375bd...@cs.colorado.edu
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Re: [U-Boot] [PATCH] spi: Add Marvell Kirkwood SPI driver
...My first pass says this patch doesn't touch on my domain. Is there something I'm missing? On Fri, May 29, 2009 at 5:24 PM, Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com wrote: On 01:13 Sat 30 May , Prafulla Wadaskar wrote: This patch adds a SPI driver for the Marvell Kirkwood SoC's. Signed-off-by: Prafulla Wadaskar prafu...@marvell.com Looks fine Andy fot you? Best Regards, J. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] Marvell Sheevaplug Board support
Dear Prafulla Wadaskar,
In message 1243682141-12239-1-git-send-email-prafu...@marvell.com you wrote:
Reference:
http://plugcomputer.org/
http://openplug.org/plugwiki/index.php/Das_U-boot_plug_support
This patch is tested for-
1. Boot from DRAM/NAND flash
2. File transfer using tftp
3. NAND flash read/write/erase
4. Linux kernel and RFS Boot from NAND
Entry in MAINTAINERS missing.
...
+/*
+ * Commands configuration
+ */
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_AUTOSCRIPT
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_SAVEENV
+#define CONFIG_CMD_NAND
Please sort such lists.
...
+#define CONFIG_MTDPARTS orion_nand:512k(uboot),
\
+ 1...@4m(psm),3...@1m(kernel),1...@5m(rootfs) rw\0
Is this weird partition setup intentional?
...
+/*
+ * Ethernet Driver configuration
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
I prefer to have all command related definition close together. Move
up?
+#define CONFIG_NETCONSOLE/* include NetConsole support */
+#define CONFIG_NET_MULTI /* specify more that one ports available */
+#define CONFIG_MII /* expose smi ove miiphy interface */
+#define CONFIG_KIRKWOOD_EGIGA/* Enable kirkwood Gbe Controller
Driver */
+#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
+#define CONFIG_KIRKWOOD_EGIGA_PORTS {1,0} /* enable port 0 only */
+#define CONFIG_PHY_BASE_ADR 0
+#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
+#endif /* CONFIG_CMD_NET */
...
Best regards,
Wolfgang Denk
--
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Totally illogical, there was no chance.
-- Spock, The Galileo Seven, stardate 2822.3
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Re: [U-Boot] [PATCH V2] board support patch for phyCORE-MPC5200B-tiny
Dear Jon Smirl,
In message 20090530194126.12535.19728.st...@terra you wrote:
Add support for the Phytec phyCORE-MPC5200B-tiny. Code originally from
Pengutronix.de.
Added MAKEALL and MAINTAINER entry per last posting.
...
+#ifndef CONFIG_SYS_RAMBOOT
+static void sdram_start(int hi_addr)
+{
+ long hi_addr_bit = hi_addr ? 0x0100 : 0;
+
+ /* unlock mode register */
+ out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_CTRL,
+ (SDRAM_CONTROL | 0x8000 | hi_addr_bit));
+
+ /* precharge all banks */
+ out_be32 ((unsigned __iomem *)MPC5XXX_SDRAM_CTRL,
+ (SDRAM_CONTROL | 0x8002 | hi_addr_bit));
Please use a proper C struct to describe the memory controller's
register layout and get rid of all these casts.
+#if SDRAM_DDR
Better use #ifdef here.
...
+void init_ide_reset(void)
+{
+ debug(init_ide_reset\n);
+
+ /* Configure PSC2_4 as GPIO output for ATA reset */
+ setbits_be32((unsigned __iomem *)MPC5XXX_WU_GPIO_ENABLE, GPIO_PSC2_4);
+ setbits_be32((unsigned __iomem *)MPC5XXX_WU_GPIO_DIR, GPIO_PSC2_4);
+ /* Deassert reset */
+ setbits_be32((unsigned __iomem *)MPC5XXX_WU_GPIO_DATA_O, GPIO_PSC2_4);
+}
Ditto here, and in thew rest of the patch.
+void ide_set_reset(int idereset)
+{
+ debug(ide_reset(%d)\n, idereset);
+
+ if (idereset) {
+ clrbits_be32((unsigned __iomem *)
+ MPC5XXX_WU_GPIO_DATA_O, GPIO_PSC2_4);
+ /* Make a delay. MPC5200 spec says 25 usec min */
+ udelay(50);
+ } else
+ setbits_be32((unsigned __iomem *)
+ MPC5XXX_WU_GPIO_DATA_O, GPIO_PSC2_4);
Please use braces for multiline statements.
...
diff --git a/include/configs/pcm030.h b/include/configs/pcm030.h
new file mode 100644
index 000..2d10366
--- /dev/null
+++ b/include/configs/pcm030.h
...
+/* To build RAMBOOT, add this to the main Makefile
+...@[ -z $(findstring RAMBOOT_,$@) ] || \
+ { echo TEXT_BASE = 0x0010 board/phycore_mpc5200b_tiny/\
+ config.tmp ; \
+ echo ... with RAMBOOT configuration ; \
+ echo ... remember to make sure that MBAR is already \
+ switched to 0xF000 !!! ; \
+ }
+*/
This does not belong into the board configuration file. Evantually
you want to provide additional documentation for this board? In any
case, please provide _clear_ instructions. Just adding above lines
of code to the main Makefile (say, at the end, since you give no
beppter instructions) will probably not work as intended.
+#define CONFIG_BOARDINFO Phytec Phycore mpc5200b tiny
Too long. Please be terse.
+/*-
+High Level Configuration Options
+(easy to change)
+-*/
+#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
+#define CONFIG_MPC5200 1 /* (more precisely an MPC5200
CPU) */
+#define CONFIG_MPC5200_DDR 1 /* (with DDR-SDRAM) */
+#define CONFIG_PHYCORE_MPC5200B_TINY 1 /* phyCORE-MPC5200B - */
+ /* FEC configuration and IDE */
+#define CONFIG_SYS_MPC5XXX_CLKIN /* ... running at 33.33MHz */
Please verify: 33.33 MHz or 33.333000 MHz or 33.000 MHz?
+#define BOOTFLAG_COLD0x01/* Normal Power-On: Boot from
FLASH */
+#define BOOTFLAG_WARM0x02/* Software reboot */
+
+/*-
+Serial console configuration
+-*/
+#define CONFIG_PSC_CONSOLE 3 /* console is on PSC3 - */
+ /*define gps port conf. */
+ /* register later on to */
+ /*enable UART function! */
+#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200,
230400 }
+
+/*
+ * Command line configuration.
+ */
+#include config_cmd_default.h
+
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+
+#define CONFIG_TIMESTAMP1 /* Print image info with
timestamp */
+
+#if (TEXT_BASE == 0xFF00)/* Boot low */
+#define CONFIG_SYS_LOWBOOT 1
+#endif
+/* RAMBOOT will be defined automatically in memory section */
+
+#define CONFIG_JFFS2_CMDLINE
+#define MTDIDS_DEFAULT nor0=physmap-flash.0
+#define MTDPARTS_DEFAULT mtdparts=physmap-flash.0:256k(ubootl), \
+
Re: [U-Boot] [U-BOot] new cpu(Ingenic), new board(PI)
Dear xiangfu, In message 4a21e74f.6080...@gmail.com you wrote: there is two branch in my git[2]. [xiangfu] this one , I try to merge with the upstream. [u-boot] is the upstream. I use git diff u-boot..xiangfu ~/pi_project.patch to generate the patch[1]. No. Please use git-format-patch to create patches. Make sure to split your changes lgically into commits - the commits should be small and orthogonal to each other. Please see http://www.denx.de/wiki/U-Boot/Patches for details. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Pray: To ask that the laws of the universe be annulled in behalf of a single petitioner confessedly unworthy. - Ambrose Bierce ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] mips: add endianness support
Dear Jean-Christophe PLAGNIOL-VILLARD, In message 1243107758-4528-2-git-send-email-plagn...@jcrosoft.com you wrote: curently we need to specify the endian of each board in the LDS in order to unify all of them add full endianness support by default the mips platforms will be compiled as big-endian to compile it as little-endian define CONFIG_CPU_LITTLE_ENDIAN Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com Is this patch number (2 of 3) a misnomer? I cannot make heads nor tails of this patch. It seems to be a new version of a previously submitted patch, but it is not marked as such? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Thought for the day: What if there were no hypothetical situations? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] mips: unify lds
Dear Jean-Christophe PLAGNIOL-VILLARD, In message 1243107758-4528-3-git-send-email-plagn...@jcrosoft.com you wrote: all mips boards except a few use the same cpu lds so move it to cpu/$(CPU) that could be overwrite in following order SOC BOARD via the corresponding config.mk NAK. Please use complete words and understandable language for commit messages. Avoid home-made abbreviations that nobody else uses. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de When all is said and done, more is said than done. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2] board support patch for phyCORE-MPC5200B-tiny
On Sun, May 31, 2009 at 6:11 PM, Wolfgang Denk w...@denx.de wrote: +/*--- + Environment settings +---*/ +#if 0 +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0xfe) +#define CONFIG_ENV_SIZE 0x2 +#define CONFIG_ENV_SECT_SIZE 0x2 +#else +#define CONFIG_ENV_IS_IN_EEPROM 1 +#define CONFIG_ENV_OFFSET 0x00 /* environment starts at the */ + /*beginning of the EEPROM */ +#define CONFIG_ENV_SIZE CONFIG_SYS_EEPROM_SIZE +#endif +#define CONFIG_ENV_OVERWRITE 1 Are you sure? This is pessimal choice. EEPROM is slow and unreliable. After you decided for a solution, then please remove the (then) dead code. Phytec ships default with the boards using the EEPROM. But, I'm with you and I flip the #if to use the FLASH. Both FLASH and EEPROM work. The flash has 128KB page size which wastes a lot of space holding a 2KB environment so I see why some people want to stick with EEPROM. So I'd like to keep them both in place. Would it be better if the FLASH section was a comment? -- Jon Smirl jonsm...@gmail.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH 1/2] sh: make lds more generic
Hi, Wolfgang. 2009/5/27 Wolfgang Denk w...@denx.de: Dear Nobuhiro Iwamatsu, In message 29ab51dc0905262313h17934f09u904a4e7325207...@mail.gmail.com you wrote: 2009/5/14 Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com: currently the sh lds need to sync the lds enty and TEXT_BASE manualy and the reloc_dst is based on it instead provide it now from the ldflags tested on r2dplus Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com Cc: Nobuhiro Iwamatsu iwamatsu.nobuh...@renesas.com Appilied these patch collection. Thank you! Sorry, but I don't agree. The commit message is terrible. sh lds need to sync the lds enty - what is that suppoosed to mean? I insist on readable and understandable commit messages. OK , you are right. Jean-Christophe, please update commit message and resend. Best regards, Nobuhiro -- Nobuhiro Iwamatsu ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2] board support patch for phyCORE-MPC5200B-tiny
On Sun, May 31, 2009 at 6:11 PM, Wolfgang Denk w...@denx.de wrote: +#define CONFIG_SYS_LOAD_ADDR 0x10 /* default load address */ This used to be a reasonable choice with Linux 2.4.4; it ain't so any more. What should it be? -- Jon Smirl jonsm...@gmail.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Pull request u-boot-blackfin.git
The following changes since commit 5520ab1f7685721314dcfb7cdcc7c15e6571473f: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-blackfin are available in the git repository at: git://www.denx.de/git/u-boot-blackfin.git master Mike Frysinger (2): Blackfin: fix if() logic in bootrom evt1 check Blackfin: spi: fix pin handling of SPI0 SSEL4 drivers/spi/bfin_spi.c |2 +- include/asm-blackfin/blackfin-config-pre.h |2 +- 2 files changed, 2 insertions(+), 2 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/3][Net][ARM] Moved Davinci Ethernet driver to drivers/net
This driver has been renamed davinci_emac.c Signed-off-by: Ben Warren biggerbadder...@gmail.com --- Change in V3: Renamed driver to davinci_emac cpu/arm926ejs/davinci/Makefile |2 +- drivers/net/Makefile |1 + .../davinci/ether.c = drivers/net/davinci_emac.c |0 3 files changed, 2 insertions(+), 1 deletions(-) rename cpu/arm926ejs/davinci/ether.c = drivers/net/davinci_emac.c (100%) diff --git a/cpu/arm926ejs/davinci/Makefile b/cpu/arm926ejs/davinci/Makefile index 6eaa89c..e45ad25 100644 --- a/cpu/arm926ejs/davinci/Makefile +++ b/cpu/arm926ejs/davinci/Makefile @@ -30,7 +30,7 @@ LIB = $(obj)lib$(SOC).a COBJS-y+= cpu.o timer.o psc.o COBJS-$(CONFIG_SOC_DM355) += dm355.o COBJS-$(CONFIG_SOC_DM644X) += dm644x.o -COBJS-$(CONFIG_DRIVER_TI_EMAC) += ether.o lxt972.o dp83848.o +COBJS-$(CONFIG_DRIVER_TI_EMAC) += lxt972.o dp83848.o SOBJS = reset.o diff --git a/drivers/net/Makefile b/drivers/net/Makefile index a360a50..26f1ea6 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -64,6 +64,7 @@ COBJS-$(CONFIG_SH_ETHER) += sh_eth.o COBJS-$(CONFIG_DRIVER_SMC9) += smc9.o COBJS-$(CONFIG_DRIVER_SMC911X) += smc911x.o COBJS-$(CONFIG_TIGON3) += tigon3.o bcm570x_autoneg.o 5701rls.o +COBJS-$(CONFIG_DRIVER_TI_EMAC) += davinci_emac.o COBJS-$(CONFIG_TSEC_ENET) += tsec.o COBJS-$(CONFIG_TSI108_ETH) += tsi108_eth.o COBJS-$(CONFIG_ULI526X) += uli526x.o diff --git a/cpu/arm926ejs/davinci/ether.c b/drivers/net/davinci_emac.c similarity index 100% rename from cpu/arm926ejs/davinci/ether.c rename to drivers/net/davinci_emac.c -- 1.5.6.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 3/3][Net][ARM] Switched davinci_emac Ethernet driver to use newer API
Added CONFIG_NET_MULTI to all Davinci boards
Removed all calls to Davinci network driver from board code
Added cpu_eth_init() to cpu/arm926ejs/cpu.c
Signed-off-by: Ben Warren biggerbadder...@gmail.com
---
Change in V3: Renamed driver to davinci_emac
board/davinci/common/misc.h |1 -
board/davinci/dvevm/dvevm.c |3 -
board/davinci/schmoogie/schmoogie.c |3 -
board/davinci/sffsdr/sffsdr.c |3 -
board/davinci/sonata/sonata.c |3 -
cpu/arm926ejs/davinci/cpu.c | 12 ++
drivers/net/davinci_emac.c | 70 ---
include/configs/davinci_dvevm.h |1 +
include/configs/davinci_schmoogie.h |1 +
include/configs/davinci_sffsdr.h|1 +
include/configs/davinci_sonata.h|1 +
include/netdev.h|1 +
net/eth.c |4 --
13 files changed, 41 insertions(+), 63 deletions(-)
diff --git a/board/davinci/common/misc.h b/board/davinci/common/misc.h
index 316159a..dc3cc41 100644
--- a/board/davinci/common/misc.h
+++ b/board/davinci/common/misc.h
@@ -22,7 +22,6 @@
#ifndef __MISC_H
#define __MISC_H
-extern int eth_hw_init(void);
int dvevm_read_mac_address(uint8_t *buf);
void dv_configure_mac_address(uint8_t *rom_enetaddr);
diff --git a/board/davinci/dvevm/dvevm.c b/board/davinci/dvevm/dvevm.c
index 8f38633..98937a9 100644
--- a/board/davinci/dvevm/dvevm.c
+++ b/board/davinci/dvevm/dvevm.c
@@ -73,9 +73,6 @@ int misc_init_r(void)
if (dvevm_read_mac_address(eeprom_enetaddr))
dv_configure_mac_address(eeprom_enetaddr);
- if (!eth_hw_init())
- printf(ethernet init failed!\n);
-
i2c_read(0x39, 0x00, 1, video_mode, 1);
setenv(videostd, ((video_mode 0x80) ? pal : ntsc));
diff --git a/board/davinci/schmoogie/schmoogie.c
b/board/davinci/schmoogie/schmoogie.c
index 6e0f591..19c9580 100644
--- a/board/davinci/schmoogie/schmoogie.c
+++ b/board/davinci/schmoogie/schmoogie.c
@@ -130,8 +130,5 @@ int misc_init_r(void)
forceenv(serial#, (char *)tmp[0]);
}
- if (!eth_hw_init())
- printf(ethernet init failed!\n);
-
return(0);
}
diff --git a/board/davinci/sffsdr/sffsdr.c b/board/davinci/sffsdr/sffsdr.c
index 7f4ee36..c24b9e1 100644
--- a/board/davinci/sffsdr/sffsdr.c
+++ b/board/davinci/sffsdr/sffsdr.c
@@ -143,8 +143,5 @@ int misc_init_r(void)
if (sffsdr_read_mac_address(eeprom_enetaddr))
dv_configure_mac_address(eeprom_enetaddr);
- if (!eth_hw_init())
- printf(Ethernet init failed\n);
-
return(0);
}
diff --git a/board/davinci/sonata/sonata.c b/board/davinci/sonata/sonata.c
index a0bea05..7f9d9bb 100644
--- a/board/davinci/sonata/sonata.c
+++ b/board/davinci/sonata/sonata.c
@@ -70,8 +70,5 @@ int misc_init_r(void)
if (dvevm_read_mac_address(eeprom_enetaddr))
dv_configure_mac_address(eeprom_enetaddr);
- if (!eth_hw_init())
- printf(ethernet init failed!\n);
-
return(0);
}
diff --git a/cpu/arm926ejs/davinci/cpu.c b/cpu/arm926ejs/davinci/cpu.c
index 29aead6..fcd1f1a 100644
--- a/cpu/arm926ejs/davinci/cpu.c
+++ b/cpu/arm926ejs/davinci/cpu.c
@@ -21,6 +21,7 @@
*/
#include common.h
+#include netdev.h
#include asm/arch/hardware.h
@@ -129,3 +130,14 @@ int print_cpuinfo(void)
#endif
+/*
+ * Initializes on-chip ethernet controllers.
+ * to override, implement board_eth_init()
+ */
+int cpu_eth_init(bd_t *bis)
+{
+#if defined(CONFIG_DRIVER_TI_EMAC)
+ davinci_emac_initialize();
+#endif
+ return 0;
+}
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c
index f5cec05..7c5dace 100644
--- a/drivers/net/davinci_emac.c
+++ b/drivers/net/davinci_emac.c
@@ -40,17 +40,12 @@
#include command.h
#include net.h
#include miiphy.h
+#include malloc.h
#include asm/arch/emac_defs.h
unsigned int emac_dbg = 0;
#define debug_emac(fmt,args...)if (emac_dbg) printf(fmt,##args)
-/* Internal static functions */
-static int davinci_eth_hw_init (void);
-static int davinci_eth_open (void);
-static int davinci_eth_close (void);
-static int davinci_eth_send_packet (volatile void *packet, int length);
-static int davinci_eth_rcv_packet (void);
static void davinci_eth_mdio_enable(void);
static int gen_init_phy(int phy_addr);
@@ -58,38 +53,10 @@ static int gen_is_phy_connected(int phy_addr);
static int gen_get_link_speed(int phy_addr);
static int gen_auto_negotiate(int phy_addr);
-/* Wrappers exported to the U-Boot proper */
-int eth_hw_init(void)
-{
- return(davinci_eth_hw_init());
-}
-
-int eth_init(bd_t * bd)
-{
- return(davinci_eth_open());
-}
-
-void eth_halt(void)
-{
- davinci_eth_close();
-}
-
-int eth_send(volatile void *packet, int length)
-{
- return(davinci_eth_send_packet(packet, length));
-}
-
-int eth_rx(void)
-{
- return(davinci_eth_rcv_packet());
-}
-
void
Re: [U-Boot] [PATCH] net: Add Marvell Kirkwood gigabit ethernet driver
Prafulla Wadaskar wrote: -Original Message- From: Ben Warren [mailto:biggerbadder...@gmail.com] Sent: Saturday, May 30, 2009 4:51 AM To: Jean-Christophe PLAGNIOL-VILLARD Cc: Prafulla Wadaskar; u-boot@lists.denx.de; Manas Saksena; Ronen Shitrit; Nicolas Pitre; Ashish Karkare; Prabhanjan Sarnaik; Lennert Buijtenhek Subject: Re: [U-Boot] [PATCH] net: Add Marvell Kirkwood gigabit ethernet driver Jean-Christophe PLAGNIOL-VILLARD wrote: On 01:13 Sat 30 May , Prafulla Wadaskar wrote: This patch adds a egiga driver for the Marvell Kirkwood SoC's. Contributors: Yotam Admon yo...@marvell.com Michael Blostein michae...@marvell.com Reviewed-by: Ronen Shitrit rshit...@marvell.com Acked-by: Stefan Rose s...@denx.de Signed-off-by: Prafulla Wadaskar prafu...@marvell.com Ben if it's ok for you I'll apply with rest of the series Best Regards, J. I'll look at it this weekend. Hi Ben, I have put the huge efforts to tune it specially for code size reduction. Whereas I have lost only network statistics and packet info print debugging features. Now it looks more simpler and cleaner :-) Hopefully it will stand as per your suggestions. Much appreciated! Thanks a lot. It looks really good - please just take care of Wolfgang's concerns about error messages and it'll be ready for inclusion. regards, Ben ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 2/3][Net][ARM] Initial cleanup of Davinci Ethernet driver
Removed pointless #ifdefs
Moved functions around in file in preparation for switch to newer API
Signed-off-by: Ben Warren biggerbadder...@gmail.com
---
Change in V3: Renamed driver to davinci_emac
drivers/net/davinci_emac.c | 146 +
1 files changed, 69 insertions(+), 77 deletions(-)
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c
index f6f81df..f5cec05 100644
--- a/drivers/net/davinci_emac.c
+++ b/drivers/net/davinci_emac.c
@@ -42,10 +42,6 @@
#include miiphy.h
#include asm/arch/emac_defs.h
-#ifdef CONFIG_DRIVER_TI_EMAC
-
-#ifdef CONFIG_CMD_NET
-
unsigned int emac_dbg = 0;
#define debug_emac(fmt,args...)if (emac_dbg) printf(fmt,##args)
@@ -291,77 +287,6 @@ int davinci_eth_miiphy_initialize(bd_t *bis)
}
#endif
-/*
- * This function initializes the emac hardware. It does NOT initialize
- * EMAC modules power or pin multiplexors, that is done by board_init()
- * much earlier in bootup process. Returns 1 on success, 0 otherwise.
- */
-static int davinci_eth_hw_init(void)
-{
- u_int32_t phy_id;
- u_int16_t tmp;
- int i;
-
- davinci_eth_mdio_enable();
-
- for (i = 0; i 256; i++) {
- if (adap_mdio-ALIVE)
- break;
- udelay(10);
- }
-
- if (i = 256) {
- printf(No ETH PHY detected!!!\n);
- return(0);
- }
-
- /* Find if a PHY is connected and get it's address */
- if (!davinci_eth_phy_detect())
- return(0);
-
- /* Get PHY ID and initialize phy_ops for a detected PHY */
- if (!davinci_eth_phy_read(active_phy_addr, PHY_PHYIDR1, tmp)) {
- active_phy_addr = 0xff;
- return(0);
- }
-
- phy_id = (tmp 16) 0x;
-
- if (!davinci_eth_phy_read(active_phy_addr, PHY_PHYIDR2, tmp)) {
- active_phy_addr = 0xff;
- return(0);
- }
-
- phy_id |= tmp 0x;
-
- switch (phy_id) {
- case PHY_LXT972:
- sprintf(phy.name, LXT972 @ 0x%02x, active_phy_addr);
- phy.init = lxt972_init_phy;
- phy.is_phy_connected = lxt972_is_phy_connected;
- phy.get_link_speed = lxt972_get_link_speed;
- phy.auto_negotiate = lxt972_auto_negotiate;
- break;
- case PHY_DP83848:
- sprintf(phy.name, DP83848 @ 0x%02x, active_phy_addr);
- phy.init = dp83848_init_phy;
- phy.is_phy_connected = dp83848_is_phy_connected;
- phy.get_link_speed = dp83848_get_link_speed;
- phy.auto_negotiate = dp83848_auto_negotiate;
- break;
- default:
- sprintf(phy.name, GENERIC @ 0x%02x, active_phy_addr);
- phy.init = gen_init_phy;
- phy.is_phy_connected = gen_is_phy_connected;
- phy.get_link_speed = gen_get_link_speed;
- phy.auto_negotiate = gen_auto_negotiate;
- }
-
- printf(Ethernet PHY: %s\n, phy.name);
-
- return(1);
-}
-
/* Eth device open */
static int davinci_eth_open(void)
@@ -650,6 +575,73 @@ static int davinci_eth_rcv_packet (void)
return (0);
}
-#endif /* CONFIG_CMD_NET */
+/*
+ * This function initializes the emac hardware. It does NOT initialize
+ * EMAC modules power or pin multiplexors, that is done by board_init()
+ * much earlier in bootup process. Returns 1 on success, 0 otherwise.
+ */
+static int davinci_eth_hw_init(void)
+{
+ u_int32_t phy_id;
+ u_int16_t tmp;
+ int i;
+
+ davinci_eth_mdio_enable();
+
+ for (i = 0; i 256; i++) {
+ if (adap_mdio-ALIVE)
+ break;
+ udelay(10);
+ }
+
+ if (i = 256) {
+ printf(No ETH PHY detected!!!\n);
+ return(0);
+ }
+
+ /* Find if a PHY is connected and get it's address */
+ if (!davinci_eth_phy_detect())
+ return(0);
+
+ /* Get PHY ID and initialize phy_ops for a detected PHY */
+ if (!davinci_eth_phy_read(active_phy_addr, PHY_PHYIDR1, tmp)) {
+ active_phy_addr = 0xff;
+ return(0);
+ }
-#endif /* CONFIG_DRIVER_TI_EMAC */
+ phy_id = (tmp 16) 0x;
+
+ if (!davinci_eth_phy_read(active_phy_addr, PHY_PHYIDR2, tmp)) {
+ active_phy_addr = 0xff;
+ return(0);
+ }
+
+ phy_id |= tmp 0x;
+
+ switch (phy_id) {
+ case PHY_LXT972:
+ sprintf(phy.name, LXT972 @ 0x%02x, active_phy_addr);
+ phy.init = lxt972_init_phy;
+ phy.is_phy_connected =
Re: [U-Boot] [PATCH] ppc4xx/net: Fix MDIO clock setup
Hi Felix, Felix Radensky wrote: This patch fixes MDIO clock setup in case when OPB frequency is 100MHz. Current code assumes that the value of sysinfo.freqOPB is 1 when OPB frequency is 100MHz. In reality it is 10001. As a result MDIO clock is set to incorrect value, larger than 2.5MHz, thus violating the standard. This in not a problem on boards equipped with Marvell PHYs (e.g. Canyonlands), since those PHYs support MDIO clocks up to 8.3MHz, but can be a problem for other PHYs (e.g. Realtek ones). Signed-off-by: Felix Radensky fe...@embedded-sol.com Applied to net/next thanks, Ben ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH/next] Blackfin: bfin_mac: do portmuxing earlier to allow board override
Hi Mike, Mike Frysinger wrote: Some boards may want to undo some pin muxing for the EMAC (like when a board doesn't have the RX error interrupt hooked up), but in order to do that, we need to do portmuxing during the eth init step. Signed-off-by: Mike Frysinger vap...@gentoo.org CC: Ben Warren biggerbadder...@gmail.com --- Applied to net/next. thanks, Ben P.S. - isn't there some way you could move this stuff to board code? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
